Commit | Line | Data |
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8c4c1818 JM |
1 | /* Simulator instruction semantics for bpfbf. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
3666a048 | 5 | Copyright (C) 1996-2021 Free Software Foundation, Inc. |
8c4c1818 JM |
6 | |
7 | This file is part of the GNU simulators. | |
8 | ||
9 | This file is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3, or (at your option) | |
12 | any later version. | |
13 | ||
14 | It is distributed in the hope that it will be useful, but WITHOUT | |
15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
16 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
17 | License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #define WANT_CPU bpfbf | |
26 | #define WANT_CPU_BPFBF | |
27 | ||
28 | #include "sim-main.h" | |
29 | #include "cgen-mem.h" | |
30 | #include "cgen-ops.h" | |
31 | ||
32 | #undef GET_ATTR | |
33 | #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) | |
34 | ||
35 | /* This is used so that we can compile two copies of the semantic code, | |
36 | one with full feature support and one without that runs fast(er). | |
37 | FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ | |
38 | #if FAST_P | |
39 | #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) | |
40 | #undef CGEN_TRACE_RESULT | |
41 | #define CGEN_TRACE_RESULT(cpu, abuf, name, type, val) | |
42 | #else | |
43 | #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) | |
44 | #endif | |
45 | ||
46 | /* x-invalid: --invalid-- */ | |
47 | ||
48 | static SEM_PC | |
49 | SEM_FN_NAME (bpfbf_ebpfle,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
50 | { | |
51 | #define FLD(f) abuf->fields.sfmt_empty.f | |
52 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
53 | int UNUSED written = 0; | |
54 | IADDR UNUSED pc = abuf->addr; | |
55 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
56 | ||
57 | { | |
58 | /* Update the recorded pc in the cpu state struct. | |
59 | Only necessary for WITH_SCACHE case, but to avoid the | |
60 | conditional compilation .... */ | |
61 | SET_H_PC (pc); | |
62 | /* Virtual insns have zero size. Overwrite vpc with address of next insn | |
63 | using the default-insn-bitsize spec. When executing insns in parallel | |
64 | we may want to queue the fault and continue execution. */ | |
65 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
66 | vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); | |
67 | } | |
68 | ||
69 | return vpc; | |
70 | #undef FLD | |
71 | } | |
72 | ||
73 | /* x-after: --after-- */ | |
74 | ||
75 | static SEM_PC | |
76 | SEM_FN_NAME (bpfbf_ebpfle,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
77 | { | |
78 | #define FLD(f) abuf->fields.sfmt_empty.f | |
79 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
80 | int UNUSED written = 0; | |
81 | IADDR UNUSED pc = abuf->addr; | |
82 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
83 | ||
84 | { | |
85 | #if WITH_SCACHE_PBB_BPFBF_EBPFLE | |
86 | bpfbf_ebpfle_pbb_after (current_cpu, sem_arg); | |
87 | #endif | |
88 | } | |
89 | ||
90 | return vpc; | |
91 | #undef FLD | |
92 | } | |
93 | ||
94 | /* x-before: --before-- */ | |
95 | ||
96 | static SEM_PC | |
97 | SEM_FN_NAME (bpfbf_ebpfle,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
98 | { | |
99 | #define FLD(f) abuf->fields.sfmt_empty.f | |
100 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
101 | int UNUSED written = 0; | |
102 | IADDR UNUSED pc = abuf->addr; | |
103 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
104 | ||
105 | { | |
106 | #if WITH_SCACHE_PBB_BPFBF_EBPFLE | |
107 | bpfbf_ebpfle_pbb_before (current_cpu, sem_arg); | |
108 | #endif | |
109 | } | |
110 | ||
111 | return vpc; | |
112 | #undef FLD | |
113 | } | |
114 | ||
115 | /* x-cti-chain: --cti-chain-- */ | |
116 | ||
117 | static SEM_PC | |
118 | SEM_FN_NAME (bpfbf_ebpfle,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
119 | { | |
120 | #define FLD(f) abuf->fields.sfmt_empty.f | |
121 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
122 | int UNUSED written = 0; | |
123 | IADDR UNUSED pc = abuf->addr; | |
124 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
125 | ||
126 | { | |
127 | #if WITH_SCACHE_PBB_BPFBF_EBPFLE | |
128 | #ifdef DEFINE_SWITCH | |
129 | vpc = bpfbf_ebpfle_pbb_cti_chain (current_cpu, sem_arg, | |
130 | pbb_br_type, pbb_br_npc); | |
131 | BREAK (sem); | |
132 | #else | |
133 | /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ | |
134 | vpc = bpfbf_ebpfle_pbb_cti_chain (current_cpu, sem_arg, | |
135 | CPU_PBB_BR_TYPE (current_cpu), | |
136 | CPU_PBB_BR_NPC (current_cpu)); | |
137 | #endif | |
138 | #endif | |
139 | } | |
140 | ||
141 | return vpc; | |
142 | #undef FLD | |
143 | } | |
144 | ||
145 | /* x-chain: --chain-- */ | |
146 | ||
147 | static SEM_PC | |
148 | SEM_FN_NAME (bpfbf_ebpfle,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
149 | { | |
150 | #define FLD(f) abuf->fields.sfmt_empty.f | |
151 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
152 | int UNUSED written = 0; | |
153 | IADDR UNUSED pc = abuf->addr; | |
154 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
155 | ||
156 | { | |
157 | #if WITH_SCACHE_PBB_BPFBF_EBPFLE | |
158 | vpc = bpfbf_ebpfle_pbb_chain (current_cpu, sem_arg); | |
159 | #ifdef DEFINE_SWITCH | |
160 | BREAK (sem); | |
161 | #endif | |
162 | #endif | |
163 | } | |
164 | ||
165 | return vpc; | |
166 | #undef FLD | |
167 | } | |
168 | ||
169 | /* x-begin: --begin-- */ | |
170 | ||
171 | static SEM_PC | |
172 | SEM_FN_NAME (bpfbf_ebpfle,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
173 | { | |
174 | #define FLD(f) abuf->fields.sfmt_empty.f | |
175 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
176 | int UNUSED written = 0; | |
177 | IADDR UNUSED pc = abuf->addr; | |
178 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
179 | ||
180 | { | |
181 | #if WITH_SCACHE_PBB_BPFBF_EBPFLE | |
182 | #if defined DEFINE_SWITCH || defined FAST_P | |
183 | /* In the switch case FAST_P is a constant, allowing several optimizations | |
184 | in any called inline functions. */ | |
185 | vpc = bpfbf_ebpfle_pbb_begin (current_cpu, FAST_P); | |
186 | #else | |
187 | #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ | |
188 | vpc = bpfbf_ebpfle_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); | |
189 | #else | |
190 | vpc = bpfbf_ebpfle_pbb_begin (current_cpu, 0); | |
191 | #endif | |
192 | #endif | |
193 | #endif | |
194 | } | |
195 | ||
196 | return vpc; | |
197 | #undef FLD | |
198 | } | |
199 | ||
200 | /* addile: add $dstle,$imm32 */ | |
201 | ||
202 | static SEM_PC | |
203 | SEM_FN_NAME (bpfbf_ebpfle,addile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
204 | { | |
205 | #define FLD(f) abuf->fields.sfmt_stble.f | |
206 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
207 | int UNUSED written = 0; | |
208 | IADDR UNUSED pc = abuf->addr; | |
209 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
210 | ||
211 | { | |
212 | DI opval = ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
213 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
214 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
215 | } | |
216 | ||
217 | return vpc; | |
218 | #undef FLD | |
219 | } | |
220 | ||
221 | /* addrle: add $dstle,$srcle */ | |
222 | ||
223 | static SEM_PC | |
224 | SEM_FN_NAME (bpfbf_ebpfle,addrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
225 | { | |
226 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
227 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
228 | int UNUSED written = 0; | |
229 | IADDR UNUSED pc = abuf->addr; | |
230 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
231 | ||
232 | { | |
233 | DI opval = ADDDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
234 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
235 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
236 | } | |
237 | ||
238 | return vpc; | |
239 | #undef FLD | |
240 | } | |
241 | ||
242 | /* add32ile: add32 $dstle,$imm32 */ | |
243 | ||
244 | static SEM_PC | |
245 | SEM_FN_NAME (bpfbf_ebpfle,add32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
246 | { | |
247 | #define FLD(f) abuf->fields.sfmt_stble.f | |
248 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
249 | int UNUSED written = 0; | |
250 | IADDR UNUSED pc = abuf->addr; | |
251 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
252 | ||
253 | { | |
254 | USI opval = ADDSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
255 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
256 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
257 | } | |
258 | ||
259 | return vpc; | |
260 | #undef FLD | |
261 | } | |
262 | ||
263 | /* add32rle: add32 $dstle,$srcle */ | |
264 | ||
265 | static SEM_PC | |
266 | SEM_FN_NAME (bpfbf_ebpfle,add32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
267 | { | |
268 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
269 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
270 | int UNUSED written = 0; | |
271 | IADDR UNUSED pc = abuf->addr; | |
272 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
273 | ||
274 | { | |
275 | USI opval = ADDSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
276 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
277 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
278 | } | |
279 | ||
280 | return vpc; | |
281 | #undef FLD | |
282 | } | |
283 | ||
284 | /* subile: sub $dstle,$imm32 */ | |
285 | ||
286 | static SEM_PC | |
287 | SEM_FN_NAME (bpfbf_ebpfle,subile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
288 | { | |
289 | #define FLD(f) abuf->fields.sfmt_stble.f | |
290 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
291 | int UNUSED written = 0; | |
292 | IADDR UNUSED pc = abuf->addr; | |
293 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
294 | ||
295 | { | |
296 | DI opval = SUBDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
297 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
298 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
299 | } | |
300 | ||
301 | return vpc; | |
302 | #undef FLD | |
303 | } | |
304 | ||
305 | /* subrle: sub $dstle,$srcle */ | |
306 | ||
307 | static SEM_PC | |
308 | SEM_FN_NAME (bpfbf_ebpfle,subrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
309 | { | |
310 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
311 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
312 | int UNUSED written = 0; | |
313 | IADDR UNUSED pc = abuf->addr; | |
314 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
315 | ||
316 | { | |
317 | DI opval = SUBDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
318 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
319 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
320 | } | |
321 | ||
322 | return vpc; | |
323 | #undef FLD | |
324 | } | |
325 | ||
326 | /* sub32ile: sub32 $dstle,$imm32 */ | |
327 | ||
328 | static SEM_PC | |
329 | SEM_FN_NAME (bpfbf_ebpfle,sub32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
330 | { | |
331 | #define FLD(f) abuf->fields.sfmt_stble.f | |
332 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
333 | int UNUSED written = 0; | |
334 | IADDR UNUSED pc = abuf->addr; | |
335 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
336 | ||
337 | { | |
338 | USI opval = SUBSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
339 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
340 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
341 | } | |
342 | ||
343 | return vpc; | |
344 | #undef FLD | |
345 | } | |
346 | ||
347 | /* sub32rle: sub32 $dstle,$srcle */ | |
348 | ||
349 | static SEM_PC | |
350 | SEM_FN_NAME (bpfbf_ebpfle,sub32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
351 | { | |
352 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
353 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
354 | int UNUSED written = 0; | |
355 | IADDR UNUSED pc = abuf->addr; | |
356 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
357 | ||
358 | { | |
359 | USI opval = SUBSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
360 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
361 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
362 | } | |
363 | ||
364 | return vpc; | |
365 | #undef FLD | |
366 | } | |
367 | ||
368 | /* mulile: mul $dstle,$imm32 */ | |
369 | ||
370 | static SEM_PC | |
371 | SEM_FN_NAME (bpfbf_ebpfle,mulile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
372 | { | |
373 | #define FLD(f) abuf->fields.sfmt_stble.f | |
374 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
375 | int UNUSED written = 0; | |
376 | IADDR UNUSED pc = abuf->addr; | |
377 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
378 | ||
379 | { | |
380 | DI opval = MULDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
381 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
382 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
383 | } | |
384 | ||
385 | return vpc; | |
386 | #undef FLD | |
387 | } | |
388 | ||
389 | /* mulrle: mul $dstle,$srcle */ | |
390 | ||
391 | static SEM_PC | |
392 | SEM_FN_NAME (bpfbf_ebpfle,mulrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
393 | { | |
394 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
395 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
396 | int UNUSED written = 0; | |
397 | IADDR UNUSED pc = abuf->addr; | |
398 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
399 | ||
400 | { | |
401 | DI opval = MULDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
402 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
403 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
404 | } | |
405 | ||
406 | return vpc; | |
407 | #undef FLD | |
408 | } | |
409 | ||
410 | /* mul32ile: mul32 $dstle,$imm32 */ | |
411 | ||
412 | static SEM_PC | |
413 | SEM_FN_NAME (bpfbf_ebpfle,mul32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
414 | { | |
415 | #define FLD(f) abuf->fields.sfmt_stble.f | |
416 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
417 | int UNUSED written = 0; | |
418 | IADDR UNUSED pc = abuf->addr; | |
419 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
420 | ||
421 | { | |
422 | USI opval = MULSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
423 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
424 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
425 | } | |
426 | ||
427 | return vpc; | |
428 | #undef FLD | |
429 | } | |
430 | ||
431 | /* mul32rle: mul32 $dstle,$srcle */ | |
432 | ||
433 | static SEM_PC | |
434 | SEM_FN_NAME (bpfbf_ebpfle,mul32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
435 | { | |
436 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
437 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
438 | int UNUSED written = 0; | |
439 | IADDR UNUSED pc = abuf->addr; | |
440 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
441 | ||
442 | { | |
443 | USI opval = MULSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
444 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
445 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
446 | } | |
447 | ||
448 | return vpc; | |
449 | #undef FLD | |
450 | } | |
451 | ||
452 | /* divile: div $dstle,$imm32 */ | |
453 | ||
454 | static SEM_PC | |
455 | SEM_FN_NAME (bpfbf_ebpfle,divile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
456 | { | |
457 | #define FLD(f) abuf->fields.sfmt_stble.f | |
458 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
459 | int UNUSED written = 0; | |
460 | IADDR UNUSED pc = abuf->addr; | |
461 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
462 | ||
463 | { | |
3ad6c194 | 464 | DI opval = UDIVDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); |
8c4c1818 JM |
465 | CPU (h_gpr[FLD (f_dstle)]) = opval; |
466 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
467 | } | |
468 | ||
469 | return vpc; | |
470 | #undef FLD | |
471 | } | |
472 | ||
473 | /* divrle: div $dstle,$srcle */ | |
474 | ||
475 | static SEM_PC | |
476 | SEM_FN_NAME (bpfbf_ebpfle,divrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
477 | { | |
478 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
479 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
480 | int UNUSED written = 0; | |
481 | IADDR UNUSED pc = abuf->addr; | |
482 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
483 | ||
484 | { | |
3ad6c194 | 485 | DI opval = UDIVDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); |
8c4c1818 JM |
486 | CPU (h_gpr[FLD (f_dstle)]) = opval; |
487 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
488 | } | |
489 | ||
490 | return vpc; | |
491 | #undef FLD | |
492 | } | |
493 | ||
494 | /* div32ile: div32 $dstle,$imm32 */ | |
495 | ||
496 | static SEM_PC | |
497 | SEM_FN_NAME (bpfbf_ebpfle,div32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
498 | { | |
499 | #define FLD(f) abuf->fields.sfmt_stble.f | |
500 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
501 | int UNUSED written = 0; | |
502 | IADDR UNUSED pc = abuf->addr; | |
503 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
504 | ||
505 | { | |
3ad6c194 | 506 | USI opval = UDIVSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); |
8c4c1818 JM |
507 | CPU (h_gpr[FLD (f_dstle)]) = opval; |
508 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
509 | } | |
510 | ||
511 | return vpc; | |
512 | #undef FLD | |
513 | } | |
514 | ||
515 | /* div32rle: div32 $dstle,$srcle */ | |
516 | ||
517 | static SEM_PC | |
518 | SEM_FN_NAME (bpfbf_ebpfle,div32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
519 | { | |
520 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
521 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
522 | int UNUSED written = 0; | |
523 | IADDR UNUSED pc = abuf->addr; | |
524 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
525 | ||
526 | { | |
3ad6c194 | 527 | USI opval = UDIVSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); |
8c4c1818 JM |
528 | CPU (h_gpr[FLD (f_dstle)]) = opval; |
529 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
530 | } | |
531 | ||
532 | return vpc; | |
533 | #undef FLD | |
534 | } | |
535 | ||
536 | /* orile: or $dstle,$imm32 */ | |
537 | ||
538 | static SEM_PC | |
539 | SEM_FN_NAME (bpfbf_ebpfle,orile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
540 | { | |
541 | #define FLD(f) abuf->fields.sfmt_stble.f | |
542 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
543 | int UNUSED written = 0; | |
544 | IADDR UNUSED pc = abuf->addr; | |
545 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
546 | ||
547 | { | |
548 | DI opval = ORDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
549 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
550 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
551 | } | |
552 | ||
553 | return vpc; | |
554 | #undef FLD | |
555 | } | |
556 | ||
557 | /* orrle: or $dstle,$srcle */ | |
558 | ||
559 | static SEM_PC | |
560 | SEM_FN_NAME (bpfbf_ebpfle,orrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
561 | { | |
562 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
563 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
564 | int UNUSED written = 0; | |
565 | IADDR UNUSED pc = abuf->addr; | |
566 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
567 | ||
568 | { | |
569 | DI opval = ORDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
570 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
571 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
572 | } | |
573 | ||
574 | return vpc; | |
575 | #undef FLD | |
576 | } | |
577 | ||
578 | /* or32ile: or32 $dstle,$imm32 */ | |
579 | ||
580 | static SEM_PC | |
581 | SEM_FN_NAME (bpfbf_ebpfle,or32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
582 | { | |
583 | #define FLD(f) abuf->fields.sfmt_stble.f | |
584 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
585 | int UNUSED written = 0; | |
586 | IADDR UNUSED pc = abuf->addr; | |
587 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
588 | ||
589 | { | |
590 | USI opval = ORSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
591 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
592 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
593 | } | |
594 | ||
595 | return vpc; | |
596 | #undef FLD | |
597 | } | |
598 | ||
599 | /* or32rle: or32 $dstle,$srcle */ | |
600 | ||
601 | static SEM_PC | |
602 | SEM_FN_NAME (bpfbf_ebpfle,or32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
603 | { | |
604 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
605 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
606 | int UNUSED written = 0; | |
607 | IADDR UNUSED pc = abuf->addr; | |
608 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
609 | ||
610 | { | |
611 | USI opval = ORSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
612 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
613 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
614 | } | |
615 | ||
616 | return vpc; | |
617 | #undef FLD | |
618 | } | |
619 | ||
620 | /* andile: and $dstle,$imm32 */ | |
621 | ||
622 | static SEM_PC | |
623 | SEM_FN_NAME (bpfbf_ebpfle,andile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
624 | { | |
625 | #define FLD(f) abuf->fields.sfmt_stble.f | |
626 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
627 | int UNUSED written = 0; | |
628 | IADDR UNUSED pc = abuf->addr; | |
629 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
630 | ||
631 | { | |
632 | DI opval = ANDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
633 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
634 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
635 | } | |
636 | ||
637 | return vpc; | |
638 | #undef FLD | |
639 | } | |
640 | ||
641 | /* andrle: and $dstle,$srcle */ | |
642 | ||
643 | static SEM_PC | |
644 | SEM_FN_NAME (bpfbf_ebpfle,andrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
645 | { | |
646 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
647 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
648 | int UNUSED written = 0; | |
649 | IADDR UNUSED pc = abuf->addr; | |
650 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
651 | ||
652 | { | |
653 | DI opval = ANDDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
654 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
655 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
656 | } | |
657 | ||
658 | return vpc; | |
659 | #undef FLD | |
660 | } | |
661 | ||
662 | /* and32ile: and32 $dstle,$imm32 */ | |
663 | ||
664 | static SEM_PC | |
665 | SEM_FN_NAME (bpfbf_ebpfle,and32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
666 | { | |
667 | #define FLD(f) abuf->fields.sfmt_stble.f | |
668 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
669 | int UNUSED written = 0; | |
670 | IADDR UNUSED pc = abuf->addr; | |
671 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
672 | ||
673 | { | |
674 | USI opval = ANDSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
675 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
676 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
677 | } | |
678 | ||
679 | return vpc; | |
680 | #undef FLD | |
681 | } | |
682 | ||
683 | /* and32rle: and32 $dstle,$srcle */ | |
684 | ||
685 | static SEM_PC | |
686 | SEM_FN_NAME (bpfbf_ebpfle,and32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
687 | { | |
688 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
689 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
690 | int UNUSED written = 0; | |
691 | IADDR UNUSED pc = abuf->addr; | |
692 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
693 | ||
694 | { | |
695 | USI opval = ANDSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
696 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
697 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
698 | } | |
699 | ||
700 | return vpc; | |
701 | #undef FLD | |
702 | } | |
703 | ||
704 | /* lshile: lsh $dstle,$imm32 */ | |
705 | ||
706 | static SEM_PC | |
707 | SEM_FN_NAME (bpfbf_ebpfle,lshile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
708 | { | |
709 | #define FLD(f) abuf->fields.sfmt_stble.f | |
710 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
711 | int UNUSED written = 0; | |
712 | IADDR UNUSED pc = abuf->addr; | |
713 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
714 | ||
715 | { | |
716 | DI opval = SLLDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
717 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
718 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
719 | } | |
720 | ||
721 | return vpc; | |
722 | #undef FLD | |
723 | } | |
724 | ||
725 | /* lshrle: lsh $dstle,$srcle */ | |
726 | ||
727 | static SEM_PC | |
728 | SEM_FN_NAME (bpfbf_ebpfle,lshrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
729 | { | |
730 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
731 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
732 | int UNUSED written = 0; | |
733 | IADDR UNUSED pc = abuf->addr; | |
734 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
735 | ||
736 | { | |
737 | DI opval = SLLDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
738 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
739 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
740 | } | |
741 | ||
742 | return vpc; | |
743 | #undef FLD | |
744 | } | |
745 | ||
746 | /* lsh32ile: lsh32 $dstle,$imm32 */ | |
747 | ||
748 | static SEM_PC | |
749 | SEM_FN_NAME (bpfbf_ebpfle,lsh32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
750 | { | |
751 | #define FLD(f) abuf->fields.sfmt_stble.f | |
752 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
753 | int UNUSED written = 0; | |
754 | IADDR UNUSED pc = abuf->addr; | |
755 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
756 | ||
757 | { | |
758 | USI opval = SLLSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
759 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
760 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
761 | } | |
762 | ||
763 | return vpc; | |
764 | #undef FLD | |
765 | } | |
766 | ||
767 | /* lsh32rle: lsh32 $dstle,$srcle */ | |
768 | ||
769 | static SEM_PC | |
770 | SEM_FN_NAME (bpfbf_ebpfle,lsh32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
771 | { | |
772 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
773 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
774 | int UNUSED written = 0; | |
775 | IADDR UNUSED pc = abuf->addr; | |
776 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
777 | ||
778 | { | |
779 | USI opval = SLLSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
780 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
781 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
782 | } | |
783 | ||
784 | return vpc; | |
785 | #undef FLD | |
786 | } | |
787 | ||
788 | /* rshile: rsh $dstle,$imm32 */ | |
789 | ||
790 | static SEM_PC | |
791 | SEM_FN_NAME (bpfbf_ebpfle,rshile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
792 | { | |
793 | #define FLD(f) abuf->fields.sfmt_stble.f | |
794 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
795 | int UNUSED written = 0; | |
796 | IADDR UNUSED pc = abuf->addr; | |
797 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
798 | ||
799 | { | |
800 | DI opval = SRLDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
801 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
802 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
803 | } | |
804 | ||
805 | return vpc; | |
806 | #undef FLD | |
807 | } | |
808 | ||
809 | /* rshrle: rsh $dstle,$srcle */ | |
810 | ||
811 | static SEM_PC | |
812 | SEM_FN_NAME (bpfbf_ebpfle,rshrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
813 | { | |
814 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
815 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
816 | int UNUSED written = 0; | |
817 | IADDR UNUSED pc = abuf->addr; | |
818 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
819 | ||
820 | { | |
821 | DI opval = SRLDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
822 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
823 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
824 | } | |
825 | ||
826 | return vpc; | |
827 | #undef FLD | |
828 | } | |
829 | ||
830 | /* rsh32ile: rsh32 $dstle,$imm32 */ | |
831 | ||
832 | static SEM_PC | |
833 | SEM_FN_NAME (bpfbf_ebpfle,rsh32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
834 | { | |
835 | #define FLD(f) abuf->fields.sfmt_stble.f | |
836 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
837 | int UNUSED written = 0; | |
838 | IADDR UNUSED pc = abuf->addr; | |
839 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
840 | ||
841 | { | |
842 | USI opval = SRLSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
843 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
844 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
845 | } | |
846 | ||
847 | return vpc; | |
848 | #undef FLD | |
849 | } | |
850 | ||
851 | /* rsh32rle: rsh32 $dstle,$srcle */ | |
852 | ||
853 | static SEM_PC | |
854 | SEM_FN_NAME (bpfbf_ebpfle,rsh32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
855 | { | |
856 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
857 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
858 | int UNUSED written = 0; | |
859 | IADDR UNUSED pc = abuf->addr; | |
860 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
861 | ||
862 | { | |
863 | USI opval = SRLSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
864 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
865 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
866 | } | |
867 | ||
868 | return vpc; | |
869 | #undef FLD | |
870 | } | |
871 | ||
872 | /* modile: mod $dstle,$imm32 */ | |
873 | ||
874 | static SEM_PC | |
875 | SEM_FN_NAME (bpfbf_ebpfle,modile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
876 | { | |
877 | #define FLD(f) abuf->fields.sfmt_stble.f | |
878 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
879 | int UNUSED written = 0; | |
880 | IADDR UNUSED pc = abuf->addr; | |
881 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
882 | ||
883 | { | |
3ad6c194 | 884 | DI opval = UMODDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); |
8c4c1818 JM |
885 | CPU (h_gpr[FLD (f_dstle)]) = opval; |
886 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
887 | } | |
888 | ||
889 | return vpc; | |
890 | #undef FLD | |
891 | } | |
892 | ||
893 | /* modrle: mod $dstle,$srcle */ | |
894 | ||
895 | static SEM_PC | |
896 | SEM_FN_NAME (bpfbf_ebpfle,modrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
897 | { | |
898 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
899 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
900 | int UNUSED written = 0; | |
901 | IADDR UNUSED pc = abuf->addr; | |
902 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
903 | ||
904 | { | |
3ad6c194 | 905 | DI opval = UMODDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); |
8c4c1818 JM |
906 | CPU (h_gpr[FLD (f_dstle)]) = opval; |
907 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
908 | } | |
909 | ||
910 | return vpc; | |
911 | #undef FLD | |
912 | } | |
913 | ||
914 | /* mod32ile: mod32 $dstle,$imm32 */ | |
915 | ||
916 | static SEM_PC | |
917 | SEM_FN_NAME (bpfbf_ebpfle,mod32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
918 | { | |
919 | #define FLD(f) abuf->fields.sfmt_stble.f | |
920 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
921 | int UNUSED written = 0; | |
922 | IADDR UNUSED pc = abuf->addr; | |
923 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
924 | ||
925 | { | |
3ad6c194 | 926 | USI opval = UMODSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); |
8c4c1818 JM |
927 | CPU (h_gpr[FLD (f_dstle)]) = opval; |
928 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
929 | } | |
930 | ||
931 | return vpc; | |
932 | #undef FLD | |
933 | } | |
934 | ||
935 | /* mod32rle: mod32 $dstle,$srcle */ | |
936 | ||
937 | static SEM_PC | |
938 | SEM_FN_NAME (bpfbf_ebpfle,mod32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
939 | { | |
940 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
941 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
942 | int UNUSED written = 0; | |
943 | IADDR UNUSED pc = abuf->addr; | |
944 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
945 | ||
946 | { | |
3ad6c194 | 947 | USI opval = UMODSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); |
8c4c1818 JM |
948 | CPU (h_gpr[FLD (f_dstle)]) = opval; |
949 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
950 | } | |
951 | ||
952 | return vpc; | |
953 | #undef FLD | |
954 | } | |
955 | ||
956 | /* xorile: xor $dstle,$imm32 */ | |
957 | ||
958 | static SEM_PC | |
959 | SEM_FN_NAME (bpfbf_ebpfle,xorile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
960 | { | |
961 | #define FLD(f) abuf->fields.sfmt_stble.f | |
962 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
963 | int UNUSED written = 0; | |
964 | IADDR UNUSED pc = abuf->addr; | |
965 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
966 | ||
967 | { | |
968 | DI opval = XORDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
969 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
970 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
971 | } | |
972 | ||
973 | return vpc; | |
974 | #undef FLD | |
975 | } | |
976 | ||
977 | /* xorrle: xor $dstle,$srcle */ | |
978 | ||
979 | static SEM_PC | |
980 | SEM_FN_NAME (bpfbf_ebpfle,xorrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
981 | { | |
982 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
983 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
984 | int UNUSED written = 0; | |
985 | IADDR UNUSED pc = abuf->addr; | |
986 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
987 | ||
988 | { | |
989 | DI opval = XORDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
990 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
991 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
992 | } | |
993 | ||
994 | return vpc; | |
995 | #undef FLD | |
996 | } | |
997 | ||
998 | /* xor32ile: xor32 $dstle,$imm32 */ | |
999 | ||
1000 | static SEM_PC | |
1001 | SEM_FN_NAME (bpfbf_ebpfle,xor32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1002 | { | |
1003 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1004 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1005 | int UNUSED written = 0; | |
1006 | IADDR UNUSED pc = abuf->addr; | |
1007 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1008 | ||
1009 | { | |
1010 | USI opval = XORSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
1011 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1012 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1013 | } | |
1014 | ||
1015 | return vpc; | |
1016 | #undef FLD | |
1017 | } | |
1018 | ||
1019 | /* xor32rle: xor32 $dstle,$srcle */ | |
1020 | ||
1021 | static SEM_PC | |
1022 | SEM_FN_NAME (bpfbf_ebpfle,xor32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1023 | { | |
1024 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1025 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1026 | int UNUSED written = 0; | |
1027 | IADDR UNUSED pc = abuf->addr; | |
1028 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1029 | ||
1030 | { | |
1031 | USI opval = XORSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
1032 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1033 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1034 | } | |
1035 | ||
1036 | return vpc; | |
1037 | #undef FLD | |
1038 | } | |
1039 | ||
1040 | /* arshile: arsh $dstle,$imm32 */ | |
1041 | ||
1042 | static SEM_PC | |
1043 | SEM_FN_NAME (bpfbf_ebpfle,arshile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1044 | { | |
1045 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1046 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1047 | int UNUSED written = 0; | |
1048 | IADDR UNUSED pc = abuf->addr; | |
1049 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1050 | ||
1051 | { | |
1052 | DI opval = SRADI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
1053 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1054 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1055 | } | |
1056 | ||
1057 | return vpc; | |
1058 | #undef FLD | |
1059 | } | |
1060 | ||
1061 | /* arshrle: arsh $dstle,$srcle */ | |
1062 | ||
1063 | static SEM_PC | |
1064 | SEM_FN_NAME (bpfbf_ebpfle,arshrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1065 | { | |
1066 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1067 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1068 | int UNUSED written = 0; | |
1069 | IADDR UNUSED pc = abuf->addr; | |
1070 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1071 | ||
1072 | { | |
1073 | DI opval = SRADI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
1074 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1075 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1076 | } | |
1077 | ||
1078 | return vpc; | |
1079 | #undef FLD | |
1080 | } | |
1081 | ||
1082 | /* arsh32ile: arsh32 $dstle,$imm32 */ | |
1083 | ||
1084 | static SEM_PC | |
1085 | SEM_FN_NAME (bpfbf_ebpfle,arsh32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1086 | { | |
1087 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1088 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1089 | int UNUSED written = 0; | |
1090 | IADDR UNUSED pc = abuf->addr; | |
1091 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1092 | ||
1093 | { | |
1094 | USI opval = SRASI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
1095 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1096 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1097 | } | |
1098 | ||
1099 | return vpc; | |
1100 | #undef FLD | |
1101 | } | |
1102 | ||
1103 | /* arsh32rle: arsh32 $dstle,$srcle */ | |
1104 | ||
1105 | static SEM_PC | |
1106 | SEM_FN_NAME (bpfbf_ebpfle,arsh32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1107 | { | |
1108 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1109 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1110 | int UNUSED written = 0; | |
1111 | IADDR UNUSED pc = abuf->addr; | |
1112 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1113 | ||
1114 | { | |
1115 | USI opval = SRASI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)])); | |
1116 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1117 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1118 | } | |
1119 | ||
1120 | return vpc; | |
1121 | #undef FLD | |
1122 | } | |
1123 | ||
1124 | /* negle: neg $dstle */ | |
1125 | ||
1126 | static SEM_PC | |
1127 | SEM_FN_NAME (bpfbf_ebpfle,negle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1128 | { | |
1129 | #define FLD(f) abuf->fields.sfmt_lddwle.f | |
1130 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1131 | int UNUSED written = 0; | |
1132 | IADDR UNUSED pc = abuf->addr; | |
1133 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1134 | ||
1135 | { | |
1136 | DI opval = NEGDI (CPU (h_gpr[FLD (f_dstle)])); | |
1137 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1138 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1139 | } | |
1140 | ||
1141 | return vpc; | |
1142 | #undef FLD | |
1143 | } | |
1144 | ||
1145 | /* neg32le: neg32 $dstle */ | |
1146 | ||
1147 | static SEM_PC | |
1148 | SEM_FN_NAME (bpfbf_ebpfle,neg32le) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1149 | { | |
1150 | #define FLD(f) abuf->fields.sfmt_lddwle.f | |
1151 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1152 | int UNUSED written = 0; | |
1153 | IADDR UNUSED pc = abuf->addr; | |
1154 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1155 | ||
1156 | { | |
1157 | USI opval = NEGSI (CPU (h_gpr[FLD (f_dstle)])); | |
1158 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1159 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1160 | } | |
1161 | ||
1162 | return vpc; | |
1163 | #undef FLD | |
1164 | } | |
1165 | ||
1166 | /* movile: mov $dstle,$imm32 */ | |
1167 | ||
1168 | static SEM_PC | |
1169 | SEM_FN_NAME (bpfbf_ebpfle,movile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1170 | { | |
1171 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1172 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1173 | int UNUSED written = 0; | |
1174 | IADDR UNUSED pc = abuf->addr; | |
1175 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1176 | ||
1177 | { | |
1178 | DI opval = FLD (f_imm32); | |
1179 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1180 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1181 | } | |
1182 | ||
1183 | return vpc; | |
1184 | #undef FLD | |
1185 | } | |
1186 | ||
1187 | /* movrle: mov $dstle,$srcle */ | |
1188 | ||
1189 | static SEM_PC | |
1190 | SEM_FN_NAME (bpfbf_ebpfle,movrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1191 | { | |
1192 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1193 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1194 | int UNUSED written = 0; | |
1195 | IADDR UNUSED pc = abuf->addr; | |
1196 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1197 | ||
1198 | { | |
1199 | DI opval = CPU (h_gpr[FLD (f_srcle)]); | |
1200 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1201 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1202 | } | |
1203 | ||
1204 | return vpc; | |
1205 | #undef FLD | |
1206 | } | |
1207 | ||
1208 | /* mov32ile: mov32 $dstle,$imm32 */ | |
1209 | ||
1210 | static SEM_PC | |
1211 | SEM_FN_NAME (bpfbf_ebpfle,mov32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1212 | { | |
1213 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1214 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1215 | int UNUSED written = 0; | |
1216 | IADDR UNUSED pc = abuf->addr; | |
1217 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1218 | ||
1219 | { | |
1220 | USI opval = FLD (f_imm32); | |
1221 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1222 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1223 | } | |
1224 | ||
1225 | return vpc; | |
1226 | #undef FLD | |
1227 | } | |
1228 | ||
1229 | /* mov32rle: mov32 $dstle,$srcle */ | |
1230 | ||
1231 | static SEM_PC | |
1232 | SEM_FN_NAME (bpfbf_ebpfle,mov32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1233 | { | |
1234 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1235 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1236 | int UNUSED written = 0; | |
1237 | IADDR UNUSED pc = abuf->addr; | |
1238 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1239 | ||
1240 | { | |
1241 | USI opval = CPU (h_gpr[FLD (f_srcle)]); | |
1242 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1243 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1244 | } | |
1245 | ||
1246 | return vpc; | |
1247 | #undef FLD | |
1248 | } | |
1249 | ||
1250 | /* endlele: endle $dstle,$endsize */ | |
1251 | ||
1252 | static SEM_PC | |
1253 | SEM_FN_NAME (bpfbf_ebpfle,endlele) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1254 | { | |
1255 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1256 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1257 | int UNUSED written = 0; | |
1258 | IADDR UNUSED pc = abuf->addr; | |
1259 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1260 | ||
1261 | { | |
1262 | DI opval = bpfbf_endle (current_cpu, CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
1263 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1264 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1265 | } | |
1266 | ||
1267 | return vpc; | |
1268 | #undef FLD | |
1269 | } | |
1270 | ||
1271 | /* endbele: endbe $dstle,$endsize */ | |
1272 | ||
1273 | static SEM_PC | |
1274 | SEM_FN_NAME (bpfbf_ebpfle,endbele) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1275 | { | |
1276 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1277 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1278 | int UNUSED written = 0; | |
1279 | IADDR UNUSED pc = abuf->addr; | |
1280 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1281 | ||
1282 | { | |
1283 | DI opval = bpfbf_endbe (current_cpu, CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32)); | |
1284 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1285 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1286 | } | |
1287 | ||
1288 | return vpc; | |
1289 | #undef FLD | |
1290 | } | |
1291 | ||
1292 | /* lddwle: lddw $dstle,$imm64 */ | |
1293 | ||
1294 | static SEM_PC | |
1295 | SEM_FN_NAME (bpfbf_ebpfle,lddwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1296 | { | |
1297 | #define FLD(f) abuf->fields.sfmt_lddwle.f | |
1298 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1299 | int UNUSED written = 0; | |
1300 | IADDR UNUSED pc = abuf->addr; | |
1301 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 16); | |
1302 | ||
1303 | { | |
1304 | DI opval = FLD (f_imm64); | |
1305 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1306 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1307 | } | |
1308 | ||
1309 | return vpc; | |
1310 | #undef FLD | |
1311 | } | |
1312 | ||
1313 | /* ldabsw: ldabsw $imm32 */ | |
1314 | ||
1315 | static SEM_PC | |
1316 | SEM_FN_NAME (bpfbf_ebpfle,ldabsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1317 | { | |
1318 | #define FLD(f) abuf->fields.sfmt_ldindwle.f | |
1319 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1320 | int UNUSED written = 0; | |
1321 | IADDR UNUSED pc = abuf->addr; | |
1322 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1323 | ||
1324 | { | |
1325 | SI opval = GETMEMSI (current_cpu, pc, ADDDI (GETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[((UINT) 6)]), bpfbf_skb_data_offset (current_cpu))), FLD (f_imm32))); | |
1326 | CPU (h_gpr[((UINT) 0)]) = opval; | |
1327 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1328 | } | |
1329 | ||
1330 | return vpc; | |
1331 | #undef FLD | |
1332 | } | |
1333 | ||
1334 | /* ldabsh: ldabsh $imm32 */ | |
1335 | ||
1336 | static SEM_PC | |
1337 | SEM_FN_NAME (bpfbf_ebpfle,ldabsh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1338 | { | |
1339 | #define FLD(f) abuf->fields.sfmt_ldindwle.f | |
1340 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1341 | int UNUSED written = 0; | |
1342 | IADDR UNUSED pc = abuf->addr; | |
1343 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1344 | ||
1345 | { | |
1346 | HI opval = GETMEMHI (current_cpu, pc, ADDDI (GETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[((UINT) 6)]), bpfbf_skb_data_offset (current_cpu))), FLD (f_imm32))); | |
1347 | CPU (h_gpr[((UINT) 0)]) = opval; | |
1348 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1349 | } | |
1350 | ||
1351 | return vpc; | |
1352 | #undef FLD | |
1353 | } | |
1354 | ||
1355 | /* ldabsb: ldabsb $imm32 */ | |
1356 | ||
1357 | static SEM_PC | |
1358 | SEM_FN_NAME (bpfbf_ebpfle,ldabsb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1359 | { | |
1360 | #define FLD(f) abuf->fields.sfmt_ldindwle.f | |
1361 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1362 | int UNUSED written = 0; | |
1363 | IADDR UNUSED pc = abuf->addr; | |
1364 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1365 | ||
1366 | { | |
1367 | QI opval = GETMEMQI (current_cpu, pc, ADDDI (GETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[((UINT) 6)]), bpfbf_skb_data_offset (current_cpu))), FLD (f_imm32))); | |
1368 | CPU (h_gpr[((UINT) 0)]) = opval; | |
1369 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1370 | } | |
1371 | ||
1372 | return vpc; | |
1373 | #undef FLD | |
1374 | } | |
1375 | ||
1376 | /* ldabsdw: ldabsdw $imm32 */ | |
1377 | ||
1378 | static SEM_PC | |
1379 | SEM_FN_NAME (bpfbf_ebpfle,ldabsdw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1380 | { | |
1381 | #define FLD(f) abuf->fields.sfmt_ldindwle.f | |
1382 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1383 | int UNUSED written = 0; | |
1384 | IADDR UNUSED pc = abuf->addr; | |
1385 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1386 | ||
1387 | { | |
1388 | DI opval = GETMEMDI (current_cpu, pc, ADDDI (GETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[((UINT) 6)]), bpfbf_skb_data_offset (current_cpu))), FLD (f_imm32))); | |
1389 | CPU (h_gpr[((UINT) 0)]) = opval; | |
1390 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1391 | } | |
1392 | ||
1393 | return vpc; | |
1394 | #undef FLD | |
1395 | } | |
1396 | ||
1397 | /* ldindwle: ldindw $srcle,$imm32 */ | |
1398 | ||
1399 | static SEM_PC | |
1400 | SEM_FN_NAME (bpfbf_ebpfle,ldindwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1401 | { | |
1402 | #define FLD(f) abuf->fields.sfmt_ldindwle.f | |
1403 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1404 | int UNUSED written = 0; | |
1405 | IADDR UNUSED pc = abuf->addr; | |
1406 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1407 | ||
1408 | { | |
1409 | SI opval = GETMEMSI (current_cpu, pc, ADDDI (GETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[((UINT) 6)]), bpfbf_skb_data_offset (current_cpu))), ADDDI (CPU (h_gpr[FLD (f_srcle)]), FLD (f_imm32)))); | |
1410 | CPU (h_gpr[((UINT) 0)]) = opval; | |
1411 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1412 | } | |
1413 | ||
1414 | return vpc; | |
1415 | #undef FLD | |
1416 | } | |
1417 | ||
1418 | /* ldindhle: ldindh $srcle,$imm32 */ | |
1419 | ||
1420 | static SEM_PC | |
1421 | SEM_FN_NAME (bpfbf_ebpfle,ldindhle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1422 | { | |
1423 | #define FLD(f) abuf->fields.sfmt_ldindwle.f | |
1424 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1425 | int UNUSED written = 0; | |
1426 | IADDR UNUSED pc = abuf->addr; | |
1427 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1428 | ||
1429 | { | |
1430 | HI opval = GETMEMHI (current_cpu, pc, ADDDI (GETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[((UINT) 6)]), bpfbf_skb_data_offset (current_cpu))), ADDDI (CPU (h_gpr[FLD (f_srcle)]), FLD (f_imm32)))); | |
1431 | CPU (h_gpr[((UINT) 0)]) = opval; | |
1432 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1433 | } | |
1434 | ||
1435 | return vpc; | |
1436 | #undef FLD | |
1437 | } | |
1438 | ||
1439 | /* ldindble: ldindb $srcle,$imm32 */ | |
1440 | ||
1441 | static SEM_PC | |
1442 | SEM_FN_NAME (bpfbf_ebpfle,ldindble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1443 | { | |
1444 | #define FLD(f) abuf->fields.sfmt_ldindwle.f | |
1445 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1446 | int UNUSED written = 0; | |
1447 | IADDR UNUSED pc = abuf->addr; | |
1448 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1449 | ||
1450 | { | |
1451 | QI opval = GETMEMQI (current_cpu, pc, ADDDI (GETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[((UINT) 6)]), bpfbf_skb_data_offset (current_cpu))), ADDDI (CPU (h_gpr[FLD (f_srcle)]), FLD (f_imm32)))); | |
1452 | CPU (h_gpr[((UINT) 0)]) = opval; | |
1453 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1454 | } | |
1455 | ||
1456 | return vpc; | |
1457 | #undef FLD | |
1458 | } | |
1459 | ||
1460 | /* ldinddwle: ldinddw $srcle,$imm32 */ | |
1461 | ||
1462 | static SEM_PC | |
1463 | SEM_FN_NAME (bpfbf_ebpfle,ldinddwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1464 | { | |
1465 | #define FLD(f) abuf->fields.sfmt_ldindwle.f | |
1466 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1467 | int UNUSED written = 0; | |
1468 | IADDR UNUSED pc = abuf->addr; | |
1469 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1470 | ||
1471 | { | |
1472 | DI opval = GETMEMDI (current_cpu, pc, ADDDI (GETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[((UINT) 6)]), bpfbf_skb_data_offset (current_cpu))), ADDDI (CPU (h_gpr[FLD (f_srcle)]), FLD (f_imm32)))); | |
1473 | CPU (h_gpr[((UINT) 0)]) = opval; | |
1474 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1475 | } | |
1476 | ||
1477 | return vpc; | |
1478 | #undef FLD | |
1479 | } | |
1480 | ||
1481 | /* ldxwle: ldxw $dstle,[$srcle+$offset16] */ | |
1482 | ||
1483 | static SEM_PC | |
1484 | SEM_FN_NAME (bpfbf_ebpfle,ldxwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1485 | { | |
1486 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1487 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1488 | int UNUSED written = 0; | |
1489 | IADDR UNUSED pc = abuf->addr; | |
1490 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1491 | ||
1492 | { | |
1493 | SI opval = GETMEMSI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_srcle)]), FLD (f_offset16))); | |
1494 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1495 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1496 | } | |
1497 | ||
1498 | return vpc; | |
1499 | #undef FLD | |
1500 | } | |
1501 | ||
1502 | /* ldxhle: ldxh $dstle,[$srcle+$offset16] */ | |
1503 | ||
1504 | static SEM_PC | |
1505 | SEM_FN_NAME (bpfbf_ebpfle,ldxhle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1506 | { | |
1507 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1508 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1509 | int UNUSED written = 0; | |
1510 | IADDR UNUSED pc = abuf->addr; | |
1511 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1512 | ||
1513 | { | |
1514 | HI opval = GETMEMHI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_srcle)]), FLD (f_offset16))); | |
1515 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1516 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1517 | } | |
1518 | ||
1519 | return vpc; | |
1520 | #undef FLD | |
1521 | } | |
1522 | ||
1523 | /* ldxble: ldxb $dstle,[$srcle+$offset16] */ | |
1524 | ||
1525 | static SEM_PC | |
1526 | SEM_FN_NAME (bpfbf_ebpfle,ldxble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1527 | { | |
1528 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1529 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1530 | int UNUSED written = 0; | |
1531 | IADDR UNUSED pc = abuf->addr; | |
1532 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1533 | ||
1534 | { | |
1535 | QI opval = GETMEMQI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_srcle)]), FLD (f_offset16))); | |
1536 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1537 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval); | |
1538 | } | |
1539 | ||
1540 | return vpc; | |
1541 | #undef FLD | |
1542 | } | |
1543 | ||
1544 | /* ldxdwle: ldxdw $dstle,[$srcle+$offset16] */ | |
1545 | ||
1546 | static SEM_PC | |
1547 | SEM_FN_NAME (bpfbf_ebpfle,ldxdwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1548 | { | |
1549 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1550 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1551 | int UNUSED written = 0; | |
1552 | IADDR UNUSED pc = abuf->addr; | |
1553 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1554 | ||
1555 | { | |
1556 | DI opval = GETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_srcle)]), FLD (f_offset16))); | |
1557 | CPU (h_gpr[FLD (f_dstle)]) = opval; | |
1558 | CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'D', opval); | |
1559 | } | |
1560 | ||
1561 | return vpc; | |
1562 | #undef FLD | |
1563 | } | |
1564 | ||
1565 | /* stxwle: stxw [$dstle+$offset16],$srcle */ | |
1566 | ||
1567 | static SEM_PC | |
1568 | SEM_FN_NAME (bpfbf_ebpfle,stxwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1569 | { | |
1570 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1571 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1572 | int UNUSED written = 0; | |
1573 | IADDR UNUSED pc = abuf->addr; | |
1574 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1575 | ||
1576 | { | |
1577 | SI opval = CPU (h_gpr[FLD (f_srcle)]); | |
1578 | SETMEMSI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16)), opval); | |
1579 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1580 | } | |
1581 | ||
1582 | return vpc; | |
1583 | #undef FLD | |
1584 | } | |
1585 | ||
1586 | /* stxhle: stxh [$dstle+$offset16],$srcle */ | |
1587 | ||
1588 | static SEM_PC | |
1589 | SEM_FN_NAME (bpfbf_ebpfle,stxhle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1590 | { | |
1591 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1592 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1593 | int UNUSED written = 0; | |
1594 | IADDR UNUSED pc = abuf->addr; | |
1595 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1596 | ||
1597 | { | |
1598 | HI opval = CPU (h_gpr[FLD (f_srcle)]); | |
1599 | SETMEMHI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16)), opval); | |
1600 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1601 | } | |
1602 | ||
1603 | return vpc; | |
1604 | #undef FLD | |
1605 | } | |
1606 | ||
1607 | /* stxble: stxb [$dstle+$offset16],$srcle */ | |
1608 | ||
1609 | static SEM_PC | |
1610 | SEM_FN_NAME (bpfbf_ebpfle,stxble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1611 | { | |
1612 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1613 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1614 | int UNUSED written = 0; | |
1615 | IADDR UNUSED pc = abuf->addr; | |
1616 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1617 | ||
1618 | { | |
1619 | QI opval = CPU (h_gpr[FLD (f_srcle)]); | |
1620 | SETMEMQI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16)), opval); | |
1621 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1622 | } | |
1623 | ||
1624 | return vpc; | |
1625 | #undef FLD | |
1626 | } | |
1627 | ||
1628 | /* stxdwle: stxdw [$dstle+$offset16],$srcle */ | |
1629 | ||
1630 | static SEM_PC | |
1631 | SEM_FN_NAME (bpfbf_ebpfle,stxdwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1632 | { | |
1633 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1634 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1635 | int UNUSED written = 0; | |
1636 | IADDR UNUSED pc = abuf->addr; | |
1637 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1638 | ||
1639 | { | |
1640 | DI opval = CPU (h_gpr[FLD (f_srcle)]); | |
1641 | SETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16)), opval); | |
1642 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); | |
1643 | } | |
1644 | ||
1645 | return vpc; | |
1646 | #undef FLD | |
1647 | } | |
1648 | ||
1649 | /* stble: stb [$dstle+$offset16],$imm32 */ | |
1650 | ||
1651 | static SEM_PC | |
1652 | SEM_FN_NAME (bpfbf_ebpfle,stble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1653 | { | |
1654 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1655 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1656 | int UNUSED written = 0; | |
1657 | IADDR UNUSED pc = abuf->addr; | |
1658 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1659 | ||
1660 | { | |
1661 | QI opval = FLD (f_imm32); | |
1662 | SETMEMQI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16)), opval); | |
1663 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1664 | } | |
1665 | ||
1666 | return vpc; | |
1667 | #undef FLD | |
1668 | } | |
1669 | ||
1670 | /* sthle: sth [$dstle+$offset16],$imm32 */ | |
1671 | ||
1672 | static SEM_PC | |
1673 | SEM_FN_NAME (bpfbf_ebpfle,sthle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1674 | { | |
1675 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1676 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1677 | int UNUSED written = 0; | |
1678 | IADDR UNUSED pc = abuf->addr; | |
1679 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1680 | ||
1681 | { | |
1682 | HI opval = FLD (f_imm32); | |
1683 | SETMEMHI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16)), opval); | |
1684 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1685 | } | |
1686 | ||
1687 | return vpc; | |
1688 | #undef FLD | |
1689 | } | |
1690 | ||
1691 | /* stwle: stw [$dstle+$offset16],$imm32 */ | |
1692 | ||
1693 | static SEM_PC | |
1694 | SEM_FN_NAME (bpfbf_ebpfle,stwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1695 | { | |
1696 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1697 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1698 | int UNUSED written = 0; | |
1699 | IADDR UNUSED pc = abuf->addr; | |
1700 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1701 | ||
1702 | { | |
1703 | SI opval = FLD (f_imm32); | |
1704 | SETMEMSI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16)), opval); | |
1705 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1706 | } | |
1707 | ||
1708 | return vpc; | |
1709 | #undef FLD | |
1710 | } | |
1711 | ||
1712 | /* stdwle: stdw [$dstle+$offset16],$imm32 */ | |
1713 | ||
1714 | static SEM_PC | |
1715 | SEM_FN_NAME (bpfbf_ebpfle,stdwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1716 | { | |
1717 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1718 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1719 | int UNUSED written = 0; | |
1720 | IADDR UNUSED pc = abuf->addr; | |
1721 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1722 | ||
1723 | { | |
1724 | DI opval = FLD (f_imm32); | |
1725 | SETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16)), opval); | |
1726 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); | |
1727 | } | |
1728 | ||
1729 | return vpc; | |
1730 | #undef FLD | |
1731 | } | |
1732 | ||
1733 | /* jeqile: jeq $dstle,$imm32,$disp16 */ | |
1734 | ||
1735 | static SEM_PC | |
1736 | SEM_FN_NAME (bpfbf_ebpfle,jeqile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1737 | { | |
1738 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1739 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1740 | int UNUSED written = 0; | |
1741 | IADDR UNUSED pc = abuf->addr; | |
1742 | SEM_BRANCH_INIT | |
1743 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1744 | ||
1745 | if (EQDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
1746 | { | |
1747 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
1748 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
1749 | written |= (1 << 4); | |
1750 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
1751 | } | |
1752 | } | |
1753 | ||
1754 | abuf->written = written; | |
1755 | SEM_BRANCH_FINI (vpc); | |
1756 | return vpc; | |
1757 | #undef FLD | |
1758 | } | |
1759 | ||
1760 | /* jeqrle: jeq $dstle,$srcle,$disp16 */ | |
1761 | ||
1762 | static SEM_PC | |
1763 | SEM_FN_NAME (bpfbf_ebpfle,jeqrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1764 | { | |
1765 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1766 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1767 | int UNUSED written = 0; | |
1768 | IADDR UNUSED pc = abuf->addr; | |
1769 | SEM_BRANCH_INIT | |
1770 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1771 | ||
1772 | if (EQDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
1773 | { | |
1774 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
1775 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
1776 | written |= (1 << 4); | |
1777 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
1778 | } | |
1779 | } | |
1780 | ||
1781 | abuf->written = written; | |
1782 | SEM_BRANCH_FINI (vpc); | |
1783 | return vpc; | |
1784 | #undef FLD | |
1785 | } | |
1786 | ||
1787 | /* jeq32ile: jeq32 $dstle,$imm32,$disp16 */ | |
1788 | ||
1789 | static SEM_PC | |
1790 | SEM_FN_NAME (bpfbf_ebpfle,jeq32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1791 | { | |
1792 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1793 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1794 | int UNUSED written = 0; | |
1795 | IADDR UNUSED pc = abuf->addr; | |
1796 | SEM_BRANCH_INIT | |
1797 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1798 | ||
1799 | if (EQSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
1800 | { | |
1801 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
1802 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
1803 | written |= (1 << 4); | |
1804 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
1805 | } | |
1806 | } | |
1807 | ||
1808 | abuf->written = written; | |
1809 | SEM_BRANCH_FINI (vpc); | |
1810 | return vpc; | |
1811 | #undef FLD | |
1812 | } | |
1813 | ||
1814 | /* jeq32rle: jeq32 $dstle,$srcle,$disp16 */ | |
1815 | ||
1816 | static SEM_PC | |
1817 | SEM_FN_NAME (bpfbf_ebpfle,jeq32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1818 | { | |
1819 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1820 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1821 | int UNUSED written = 0; | |
1822 | IADDR UNUSED pc = abuf->addr; | |
1823 | SEM_BRANCH_INIT | |
1824 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1825 | ||
1826 | if (EQSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
1827 | { | |
1828 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
1829 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
1830 | written |= (1 << 4); | |
1831 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
1832 | } | |
1833 | } | |
1834 | ||
1835 | abuf->written = written; | |
1836 | SEM_BRANCH_FINI (vpc); | |
1837 | return vpc; | |
1838 | #undef FLD | |
1839 | } | |
1840 | ||
1841 | /* jgtile: jgt $dstle,$imm32,$disp16 */ | |
1842 | ||
1843 | static SEM_PC | |
1844 | SEM_FN_NAME (bpfbf_ebpfle,jgtile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1845 | { | |
1846 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1847 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1848 | int UNUSED written = 0; | |
1849 | IADDR UNUSED pc = abuf->addr; | |
1850 | SEM_BRANCH_INIT | |
1851 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1852 | ||
1853 | if (GTUDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
1854 | { | |
1855 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
1856 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
1857 | written |= (1 << 4); | |
1858 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
1859 | } | |
1860 | } | |
1861 | ||
1862 | abuf->written = written; | |
1863 | SEM_BRANCH_FINI (vpc); | |
1864 | return vpc; | |
1865 | #undef FLD | |
1866 | } | |
1867 | ||
1868 | /* jgtrle: jgt $dstle,$srcle,$disp16 */ | |
1869 | ||
1870 | static SEM_PC | |
1871 | SEM_FN_NAME (bpfbf_ebpfle,jgtrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1872 | { | |
1873 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1874 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1875 | int UNUSED written = 0; | |
1876 | IADDR UNUSED pc = abuf->addr; | |
1877 | SEM_BRANCH_INIT | |
1878 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1879 | ||
1880 | if (GTUDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
1881 | { | |
1882 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
1883 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
1884 | written |= (1 << 4); | |
1885 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
1886 | } | |
1887 | } | |
1888 | ||
1889 | abuf->written = written; | |
1890 | SEM_BRANCH_FINI (vpc); | |
1891 | return vpc; | |
1892 | #undef FLD | |
1893 | } | |
1894 | ||
1895 | /* jgt32ile: jgt32 $dstle,$imm32,$disp16 */ | |
1896 | ||
1897 | static SEM_PC | |
1898 | SEM_FN_NAME (bpfbf_ebpfle,jgt32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1899 | { | |
1900 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1901 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1902 | int UNUSED written = 0; | |
1903 | IADDR UNUSED pc = abuf->addr; | |
1904 | SEM_BRANCH_INIT | |
1905 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1906 | ||
1907 | if (GTUSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
1908 | { | |
1909 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
1910 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
1911 | written |= (1 << 4); | |
1912 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
1913 | } | |
1914 | } | |
1915 | ||
1916 | abuf->written = written; | |
1917 | SEM_BRANCH_FINI (vpc); | |
1918 | return vpc; | |
1919 | #undef FLD | |
1920 | } | |
1921 | ||
1922 | /* jgt32rle: jgt32 $dstle,$srcle,$disp16 */ | |
1923 | ||
1924 | static SEM_PC | |
1925 | SEM_FN_NAME (bpfbf_ebpfle,jgt32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1926 | { | |
1927 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1928 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1929 | int UNUSED written = 0; | |
1930 | IADDR UNUSED pc = abuf->addr; | |
1931 | SEM_BRANCH_INIT | |
1932 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1933 | ||
1934 | if (GTUSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
1935 | { | |
1936 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
1937 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
1938 | written |= (1 << 4); | |
1939 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
1940 | } | |
1941 | } | |
1942 | ||
1943 | abuf->written = written; | |
1944 | SEM_BRANCH_FINI (vpc); | |
1945 | return vpc; | |
1946 | #undef FLD | |
1947 | } | |
1948 | ||
1949 | /* jgeile: jge $dstle,$imm32,$disp16 */ | |
1950 | ||
1951 | static SEM_PC | |
1952 | SEM_FN_NAME (bpfbf_ebpfle,jgeile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1953 | { | |
1954 | #define FLD(f) abuf->fields.sfmt_stble.f | |
1955 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1956 | int UNUSED written = 0; | |
1957 | IADDR UNUSED pc = abuf->addr; | |
1958 | SEM_BRANCH_INIT | |
1959 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1960 | ||
1961 | if (GEUDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
1962 | { | |
1963 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
1964 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
1965 | written |= (1 << 4); | |
1966 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
1967 | } | |
1968 | } | |
1969 | ||
1970 | abuf->written = written; | |
1971 | SEM_BRANCH_FINI (vpc); | |
1972 | return vpc; | |
1973 | #undef FLD | |
1974 | } | |
1975 | ||
1976 | /* jgerle: jge $dstle,$srcle,$disp16 */ | |
1977 | ||
1978 | static SEM_PC | |
1979 | SEM_FN_NAME (bpfbf_ebpfle,jgerle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1980 | { | |
1981 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
1982 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1983 | int UNUSED written = 0; | |
1984 | IADDR UNUSED pc = abuf->addr; | |
1985 | SEM_BRANCH_INIT | |
1986 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
1987 | ||
1988 | if (GEUDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
1989 | { | |
1990 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
1991 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
1992 | written |= (1 << 4); | |
1993 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
1994 | } | |
1995 | } | |
1996 | ||
1997 | abuf->written = written; | |
1998 | SEM_BRANCH_FINI (vpc); | |
1999 | return vpc; | |
2000 | #undef FLD | |
2001 | } | |
2002 | ||
2003 | /* jge32ile: jge32 $dstle,$imm32,$disp16 */ | |
2004 | ||
2005 | static SEM_PC | |
2006 | SEM_FN_NAME (bpfbf_ebpfle,jge32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2007 | { | |
2008 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2009 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2010 | int UNUSED written = 0; | |
2011 | IADDR UNUSED pc = abuf->addr; | |
2012 | SEM_BRANCH_INIT | |
2013 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2014 | ||
2015 | if (GEUSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2016 | { | |
2017 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2018 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2019 | written |= (1 << 4); | |
2020 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2021 | } | |
2022 | } | |
2023 | ||
2024 | abuf->written = written; | |
2025 | SEM_BRANCH_FINI (vpc); | |
2026 | return vpc; | |
2027 | #undef FLD | |
2028 | } | |
2029 | ||
2030 | /* jge32rle: jge32 $dstle,$srcle,$disp16 */ | |
2031 | ||
2032 | static SEM_PC | |
2033 | SEM_FN_NAME (bpfbf_ebpfle,jge32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2034 | { | |
2035 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2036 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2037 | int UNUSED written = 0; | |
2038 | IADDR UNUSED pc = abuf->addr; | |
2039 | SEM_BRANCH_INIT | |
2040 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2041 | ||
2042 | if (GEUSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2043 | { | |
2044 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2045 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2046 | written |= (1 << 4); | |
2047 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2048 | } | |
2049 | } | |
2050 | ||
2051 | abuf->written = written; | |
2052 | SEM_BRANCH_FINI (vpc); | |
2053 | return vpc; | |
2054 | #undef FLD | |
2055 | } | |
2056 | ||
2057 | /* jltile: jlt $dstle,$imm32,$disp16 */ | |
2058 | ||
2059 | static SEM_PC | |
2060 | SEM_FN_NAME (bpfbf_ebpfle,jltile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2061 | { | |
2062 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2063 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2064 | int UNUSED written = 0; | |
2065 | IADDR UNUSED pc = abuf->addr; | |
2066 | SEM_BRANCH_INIT | |
2067 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2068 | ||
2069 | if (LTUDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2070 | { | |
2071 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2072 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2073 | written |= (1 << 4); | |
2074 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2075 | } | |
2076 | } | |
2077 | ||
2078 | abuf->written = written; | |
2079 | SEM_BRANCH_FINI (vpc); | |
2080 | return vpc; | |
2081 | #undef FLD | |
2082 | } | |
2083 | ||
2084 | /* jltrle: jlt $dstle,$srcle,$disp16 */ | |
2085 | ||
2086 | static SEM_PC | |
2087 | SEM_FN_NAME (bpfbf_ebpfle,jltrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2088 | { | |
2089 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2090 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2091 | int UNUSED written = 0; | |
2092 | IADDR UNUSED pc = abuf->addr; | |
2093 | SEM_BRANCH_INIT | |
2094 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2095 | ||
2096 | if (LTUDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2097 | { | |
2098 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2099 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2100 | written |= (1 << 4); | |
2101 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2102 | } | |
2103 | } | |
2104 | ||
2105 | abuf->written = written; | |
2106 | SEM_BRANCH_FINI (vpc); | |
2107 | return vpc; | |
2108 | #undef FLD | |
2109 | } | |
2110 | ||
2111 | /* jlt32ile: jlt32 $dstle,$imm32,$disp16 */ | |
2112 | ||
2113 | static SEM_PC | |
2114 | SEM_FN_NAME (bpfbf_ebpfle,jlt32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2115 | { | |
2116 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2117 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2118 | int UNUSED written = 0; | |
2119 | IADDR UNUSED pc = abuf->addr; | |
2120 | SEM_BRANCH_INIT | |
2121 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2122 | ||
2123 | if (LTUSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2124 | { | |
2125 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2126 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2127 | written |= (1 << 4); | |
2128 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2129 | } | |
2130 | } | |
2131 | ||
2132 | abuf->written = written; | |
2133 | SEM_BRANCH_FINI (vpc); | |
2134 | return vpc; | |
2135 | #undef FLD | |
2136 | } | |
2137 | ||
2138 | /* jlt32rle: jlt32 $dstle,$srcle,$disp16 */ | |
2139 | ||
2140 | static SEM_PC | |
2141 | SEM_FN_NAME (bpfbf_ebpfle,jlt32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2142 | { | |
2143 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2144 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2145 | int UNUSED written = 0; | |
2146 | IADDR UNUSED pc = abuf->addr; | |
2147 | SEM_BRANCH_INIT | |
2148 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2149 | ||
2150 | if (LTUSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2151 | { | |
2152 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2153 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2154 | written |= (1 << 4); | |
2155 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2156 | } | |
2157 | } | |
2158 | ||
2159 | abuf->written = written; | |
2160 | SEM_BRANCH_FINI (vpc); | |
2161 | return vpc; | |
2162 | #undef FLD | |
2163 | } | |
2164 | ||
2165 | /* jleile: jle $dstle,$imm32,$disp16 */ | |
2166 | ||
2167 | static SEM_PC | |
2168 | SEM_FN_NAME (bpfbf_ebpfle,jleile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2169 | { | |
2170 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2171 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2172 | int UNUSED written = 0; | |
2173 | IADDR UNUSED pc = abuf->addr; | |
2174 | SEM_BRANCH_INIT | |
2175 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2176 | ||
2177 | if (LEUDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2178 | { | |
2179 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2180 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2181 | written |= (1 << 4); | |
2182 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2183 | } | |
2184 | } | |
2185 | ||
2186 | abuf->written = written; | |
2187 | SEM_BRANCH_FINI (vpc); | |
2188 | return vpc; | |
2189 | #undef FLD | |
2190 | } | |
2191 | ||
2192 | /* jlerle: jle $dstle,$srcle,$disp16 */ | |
2193 | ||
2194 | static SEM_PC | |
2195 | SEM_FN_NAME (bpfbf_ebpfle,jlerle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2196 | { | |
2197 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2198 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2199 | int UNUSED written = 0; | |
2200 | IADDR UNUSED pc = abuf->addr; | |
2201 | SEM_BRANCH_INIT | |
2202 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2203 | ||
2204 | if (LEUDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2205 | { | |
2206 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2207 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2208 | written |= (1 << 4); | |
2209 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2210 | } | |
2211 | } | |
2212 | ||
2213 | abuf->written = written; | |
2214 | SEM_BRANCH_FINI (vpc); | |
2215 | return vpc; | |
2216 | #undef FLD | |
2217 | } | |
2218 | ||
2219 | /* jle32ile: jle32 $dstle,$imm32,$disp16 */ | |
2220 | ||
2221 | static SEM_PC | |
2222 | SEM_FN_NAME (bpfbf_ebpfle,jle32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2223 | { | |
2224 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2225 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2226 | int UNUSED written = 0; | |
2227 | IADDR UNUSED pc = abuf->addr; | |
2228 | SEM_BRANCH_INIT | |
2229 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2230 | ||
2231 | if (LEUSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2232 | { | |
2233 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2234 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2235 | written |= (1 << 4); | |
2236 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2237 | } | |
2238 | } | |
2239 | ||
2240 | abuf->written = written; | |
2241 | SEM_BRANCH_FINI (vpc); | |
2242 | return vpc; | |
2243 | #undef FLD | |
2244 | } | |
2245 | ||
2246 | /* jle32rle: jle32 $dstle,$srcle,$disp16 */ | |
2247 | ||
2248 | static SEM_PC | |
2249 | SEM_FN_NAME (bpfbf_ebpfle,jle32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2250 | { | |
2251 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2252 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2253 | int UNUSED written = 0; | |
2254 | IADDR UNUSED pc = abuf->addr; | |
2255 | SEM_BRANCH_INIT | |
2256 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2257 | ||
2258 | if (LEUSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2259 | { | |
2260 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2261 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2262 | written |= (1 << 4); | |
2263 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2264 | } | |
2265 | } | |
2266 | ||
2267 | abuf->written = written; | |
2268 | SEM_BRANCH_FINI (vpc); | |
2269 | return vpc; | |
2270 | #undef FLD | |
2271 | } | |
2272 | ||
2273 | /* jsetile: jset $dstle,$imm32,$disp16 */ | |
2274 | ||
2275 | static SEM_PC | |
2276 | SEM_FN_NAME (bpfbf_ebpfle,jsetile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2277 | { | |
2278 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2279 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2280 | int UNUSED written = 0; | |
2281 | IADDR UNUSED pc = abuf->addr; | |
2282 | SEM_BRANCH_INIT | |
2283 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2284 | ||
2285 | if (ANDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2286 | { | |
2287 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2288 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2289 | written |= (1 << 4); | |
2290 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2291 | } | |
2292 | } | |
2293 | ||
2294 | abuf->written = written; | |
2295 | SEM_BRANCH_FINI (vpc); | |
2296 | return vpc; | |
2297 | #undef FLD | |
2298 | } | |
2299 | ||
2300 | /* jsetrle: jset $dstle,$srcle,$disp16 */ | |
2301 | ||
2302 | static SEM_PC | |
2303 | SEM_FN_NAME (bpfbf_ebpfle,jsetrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2304 | { | |
2305 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2306 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2307 | int UNUSED written = 0; | |
2308 | IADDR UNUSED pc = abuf->addr; | |
2309 | SEM_BRANCH_INIT | |
2310 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2311 | ||
2312 | if (ANDDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2313 | { | |
2314 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2315 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2316 | written |= (1 << 4); | |
2317 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2318 | } | |
2319 | } | |
2320 | ||
2321 | abuf->written = written; | |
2322 | SEM_BRANCH_FINI (vpc); | |
2323 | return vpc; | |
2324 | #undef FLD | |
2325 | } | |
2326 | ||
2327 | /* jset32ile: jset32 $dstle,$imm32,$disp16 */ | |
2328 | ||
2329 | static SEM_PC | |
2330 | SEM_FN_NAME (bpfbf_ebpfle,jset32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2331 | { | |
2332 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2333 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2334 | int UNUSED written = 0; | |
2335 | IADDR UNUSED pc = abuf->addr; | |
2336 | SEM_BRANCH_INIT | |
2337 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2338 | ||
2339 | if (ANDSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2340 | { | |
2341 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2342 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2343 | written |= (1 << 4); | |
2344 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2345 | } | |
2346 | } | |
2347 | ||
2348 | abuf->written = written; | |
2349 | SEM_BRANCH_FINI (vpc); | |
2350 | return vpc; | |
2351 | #undef FLD | |
2352 | } | |
2353 | ||
2354 | /* jset32rle: jset32 $dstle,$srcle,$disp16 */ | |
2355 | ||
2356 | static SEM_PC | |
2357 | SEM_FN_NAME (bpfbf_ebpfle,jset32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2358 | { | |
2359 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2360 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2361 | int UNUSED written = 0; | |
2362 | IADDR UNUSED pc = abuf->addr; | |
2363 | SEM_BRANCH_INIT | |
2364 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2365 | ||
2366 | if (ANDSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2367 | { | |
2368 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2369 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2370 | written |= (1 << 4); | |
2371 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2372 | } | |
2373 | } | |
2374 | ||
2375 | abuf->written = written; | |
2376 | SEM_BRANCH_FINI (vpc); | |
2377 | return vpc; | |
2378 | #undef FLD | |
2379 | } | |
2380 | ||
2381 | /* jneile: jne $dstle,$imm32,$disp16 */ | |
2382 | ||
2383 | static SEM_PC | |
2384 | SEM_FN_NAME (bpfbf_ebpfle,jneile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2385 | { | |
2386 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2387 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2388 | int UNUSED written = 0; | |
2389 | IADDR UNUSED pc = abuf->addr; | |
2390 | SEM_BRANCH_INIT | |
2391 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2392 | ||
2393 | if (NEDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2394 | { | |
2395 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2396 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2397 | written |= (1 << 4); | |
2398 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2399 | } | |
2400 | } | |
2401 | ||
2402 | abuf->written = written; | |
2403 | SEM_BRANCH_FINI (vpc); | |
2404 | return vpc; | |
2405 | #undef FLD | |
2406 | } | |
2407 | ||
2408 | /* jnerle: jne $dstle,$srcle,$disp16 */ | |
2409 | ||
2410 | static SEM_PC | |
2411 | SEM_FN_NAME (bpfbf_ebpfle,jnerle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2412 | { | |
2413 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2414 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2415 | int UNUSED written = 0; | |
2416 | IADDR UNUSED pc = abuf->addr; | |
2417 | SEM_BRANCH_INIT | |
2418 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2419 | ||
2420 | if (NEDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2421 | { | |
2422 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2423 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2424 | written |= (1 << 4); | |
2425 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2426 | } | |
2427 | } | |
2428 | ||
2429 | abuf->written = written; | |
2430 | SEM_BRANCH_FINI (vpc); | |
2431 | return vpc; | |
2432 | #undef FLD | |
2433 | } | |
2434 | ||
2435 | /* jne32ile: jne32 $dstle,$imm32,$disp16 */ | |
2436 | ||
2437 | static SEM_PC | |
2438 | SEM_FN_NAME (bpfbf_ebpfle,jne32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2439 | { | |
2440 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2441 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2442 | int UNUSED written = 0; | |
2443 | IADDR UNUSED pc = abuf->addr; | |
2444 | SEM_BRANCH_INIT | |
2445 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2446 | ||
2447 | if (NESI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2448 | { | |
2449 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2450 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2451 | written |= (1 << 4); | |
2452 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2453 | } | |
2454 | } | |
2455 | ||
2456 | abuf->written = written; | |
2457 | SEM_BRANCH_FINI (vpc); | |
2458 | return vpc; | |
2459 | #undef FLD | |
2460 | } | |
2461 | ||
2462 | /* jne32rle: jne32 $dstle,$srcle,$disp16 */ | |
2463 | ||
2464 | static SEM_PC | |
2465 | SEM_FN_NAME (bpfbf_ebpfle,jne32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2466 | { | |
2467 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2468 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2469 | int UNUSED written = 0; | |
2470 | IADDR UNUSED pc = abuf->addr; | |
2471 | SEM_BRANCH_INIT | |
2472 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2473 | ||
2474 | if (NESI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2475 | { | |
2476 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2477 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2478 | written |= (1 << 4); | |
2479 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2480 | } | |
2481 | } | |
2482 | ||
2483 | abuf->written = written; | |
2484 | SEM_BRANCH_FINI (vpc); | |
2485 | return vpc; | |
2486 | #undef FLD | |
2487 | } | |
2488 | ||
2489 | /* jsgtile: jsgt $dstle,$imm32,$disp16 */ | |
2490 | ||
2491 | static SEM_PC | |
2492 | SEM_FN_NAME (bpfbf_ebpfle,jsgtile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2493 | { | |
2494 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2495 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2496 | int UNUSED written = 0; | |
2497 | IADDR UNUSED pc = abuf->addr; | |
2498 | SEM_BRANCH_INIT | |
2499 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2500 | ||
2501 | if (GTDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2502 | { | |
2503 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2504 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2505 | written |= (1 << 4); | |
2506 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2507 | } | |
2508 | } | |
2509 | ||
2510 | abuf->written = written; | |
2511 | SEM_BRANCH_FINI (vpc); | |
2512 | return vpc; | |
2513 | #undef FLD | |
2514 | } | |
2515 | ||
2516 | /* jsgtrle: jsgt $dstle,$srcle,$disp16 */ | |
2517 | ||
2518 | static SEM_PC | |
2519 | SEM_FN_NAME (bpfbf_ebpfle,jsgtrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2520 | { | |
2521 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2522 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2523 | int UNUSED written = 0; | |
2524 | IADDR UNUSED pc = abuf->addr; | |
2525 | SEM_BRANCH_INIT | |
2526 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2527 | ||
2528 | if (GTDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2529 | { | |
2530 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2531 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2532 | written |= (1 << 4); | |
2533 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2534 | } | |
2535 | } | |
2536 | ||
2537 | abuf->written = written; | |
2538 | SEM_BRANCH_FINI (vpc); | |
2539 | return vpc; | |
2540 | #undef FLD | |
2541 | } | |
2542 | ||
2543 | /* jsgt32ile: jsgt32 $dstle,$imm32,$disp16 */ | |
2544 | ||
2545 | static SEM_PC | |
2546 | SEM_FN_NAME (bpfbf_ebpfle,jsgt32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2547 | { | |
2548 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2549 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2550 | int UNUSED written = 0; | |
2551 | IADDR UNUSED pc = abuf->addr; | |
2552 | SEM_BRANCH_INIT | |
2553 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2554 | ||
2555 | if (GTSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2556 | { | |
2557 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2558 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2559 | written |= (1 << 4); | |
2560 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2561 | } | |
2562 | } | |
2563 | ||
2564 | abuf->written = written; | |
2565 | SEM_BRANCH_FINI (vpc); | |
2566 | return vpc; | |
2567 | #undef FLD | |
2568 | } | |
2569 | ||
2570 | /* jsgt32rle: jsgt32 $dstle,$srcle,$disp16 */ | |
2571 | ||
2572 | static SEM_PC | |
2573 | SEM_FN_NAME (bpfbf_ebpfle,jsgt32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2574 | { | |
2575 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2576 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2577 | int UNUSED written = 0; | |
2578 | IADDR UNUSED pc = abuf->addr; | |
2579 | SEM_BRANCH_INIT | |
2580 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2581 | ||
2582 | if (GTSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2583 | { | |
2584 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2585 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2586 | written |= (1 << 4); | |
2587 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2588 | } | |
2589 | } | |
2590 | ||
2591 | abuf->written = written; | |
2592 | SEM_BRANCH_FINI (vpc); | |
2593 | return vpc; | |
2594 | #undef FLD | |
2595 | } | |
2596 | ||
2597 | /* jsgeile: jsge $dstle,$imm32,$disp16 */ | |
2598 | ||
2599 | static SEM_PC | |
2600 | SEM_FN_NAME (bpfbf_ebpfle,jsgeile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2601 | { | |
2602 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2603 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2604 | int UNUSED written = 0; | |
2605 | IADDR UNUSED pc = abuf->addr; | |
2606 | SEM_BRANCH_INIT | |
2607 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2608 | ||
2609 | if (GEDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2610 | { | |
2611 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2612 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2613 | written |= (1 << 4); | |
2614 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2615 | } | |
2616 | } | |
2617 | ||
2618 | abuf->written = written; | |
2619 | SEM_BRANCH_FINI (vpc); | |
2620 | return vpc; | |
2621 | #undef FLD | |
2622 | } | |
2623 | ||
2624 | /* jsgerle: jsge $dstle,$srcle,$disp16 */ | |
2625 | ||
2626 | static SEM_PC | |
2627 | SEM_FN_NAME (bpfbf_ebpfle,jsgerle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2628 | { | |
2629 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2630 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2631 | int UNUSED written = 0; | |
2632 | IADDR UNUSED pc = abuf->addr; | |
2633 | SEM_BRANCH_INIT | |
2634 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2635 | ||
2636 | if (GEDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2637 | { | |
2638 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2639 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2640 | written |= (1 << 4); | |
2641 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2642 | } | |
2643 | } | |
2644 | ||
2645 | abuf->written = written; | |
2646 | SEM_BRANCH_FINI (vpc); | |
2647 | return vpc; | |
2648 | #undef FLD | |
2649 | } | |
2650 | ||
2651 | /* jsge32ile: jsge32 $dstle,$imm32,$disp16 */ | |
2652 | ||
2653 | static SEM_PC | |
2654 | SEM_FN_NAME (bpfbf_ebpfle,jsge32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2655 | { | |
2656 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2657 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2658 | int UNUSED written = 0; | |
2659 | IADDR UNUSED pc = abuf->addr; | |
2660 | SEM_BRANCH_INIT | |
2661 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2662 | ||
2663 | if (GESI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2664 | { | |
2665 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2666 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2667 | written |= (1 << 4); | |
2668 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2669 | } | |
2670 | } | |
2671 | ||
2672 | abuf->written = written; | |
2673 | SEM_BRANCH_FINI (vpc); | |
2674 | return vpc; | |
2675 | #undef FLD | |
2676 | } | |
2677 | ||
2678 | /* jsge32rle: jsge32 $dstle,$srcle,$disp16 */ | |
2679 | ||
2680 | static SEM_PC | |
2681 | SEM_FN_NAME (bpfbf_ebpfle,jsge32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2682 | { | |
2683 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2684 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2685 | int UNUSED written = 0; | |
2686 | IADDR UNUSED pc = abuf->addr; | |
2687 | SEM_BRANCH_INIT | |
2688 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2689 | ||
2690 | if (GESI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2691 | { | |
2692 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2693 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2694 | written |= (1 << 4); | |
2695 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2696 | } | |
2697 | } | |
2698 | ||
2699 | abuf->written = written; | |
2700 | SEM_BRANCH_FINI (vpc); | |
2701 | return vpc; | |
2702 | #undef FLD | |
2703 | } | |
2704 | ||
2705 | /* jsltile: jslt $dstle,$imm32,$disp16 */ | |
2706 | ||
2707 | static SEM_PC | |
2708 | SEM_FN_NAME (bpfbf_ebpfle,jsltile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2709 | { | |
2710 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2711 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2712 | int UNUSED written = 0; | |
2713 | IADDR UNUSED pc = abuf->addr; | |
2714 | SEM_BRANCH_INIT | |
2715 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2716 | ||
2717 | if (LTDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2718 | { | |
2719 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2720 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2721 | written |= (1 << 4); | |
2722 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2723 | } | |
2724 | } | |
2725 | ||
2726 | abuf->written = written; | |
2727 | SEM_BRANCH_FINI (vpc); | |
2728 | return vpc; | |
2729 | #undef FLD | |
2730 | } | |
2731 | ||
2732 | /* jsltrle: jslt $dstle,$srcle,$disp16 */ | |
2733 | ||
2734 | static SEM_PC | |
2735 | SEM_FN_NAME (bpfbf_ebpfle,jsltrle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2736 | { | |
2737 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2738 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2739 | int UNUSED written = 0; | |
2740 | IADDR UNUSED pc = abuf->addr; | |
2741 | SEM_BRANCH_INIT | |
2742 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2743 | ||
2744 | if (LTDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2745 | { | |
2746 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2747 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2748 | written |= (1 << 4); | |
2749 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2750 | } | |
2751 | } | |
2752 | ||
2753 | abuf->written = written; | |
2754 | SEM_BRANCH_FINI (vpc); | |
2755 | return vpc; | |
2756 | #undef FLD | |
2757 | } | |
2758 | ||
2759 | /* jslt32ile: jslt32 $dstle,$imm32,$disp16 */ | |
2760 | ||
2761 | static SEM_PC | |
2762 | SEM_FN_NAME (bpfbf_ebpfle,jslt32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2763 | { | |
2764 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2765 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2766 | int UNUSED written = 0; | |
2767 | IADDR UNUSED pc = abuf->addr; | |
2768 | SEM_BRANCH_INIT | |
2769 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2770 | ||
2771 | if (LTSI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2772 | { | |
2773 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2774 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2775 | written |= (1 << 4); | |
2776 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2777 | } | |
2778 | } | |
2779 | ||
2780 | abuf->written = written; | |
2781 | SEM_BRANCH_FINI (vpc); | |
2782 | return vpc; | |
2783 | #undef FLD | |
2784 | } | |
2785 | ||
2786 | /* jslt32rle: jslt32 $dstle,$srcle,$disp16 */ | |
2787 | ||
2788 | static SEM_PC | |
2789 | SEM_FN_NAME (bpfbf_ebpfle,jslt32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2790 | { | |
2791 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2792 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2793 | int UNUSED written = 0; | |
2794 | IADDR UNUSED pc = abuf->addr; | |
2795 | SEM_BRANCH_INIT | |
2796 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2797 | ||
2798 | if (LTSI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2799 | { | |
2800 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2801 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2802 | written |= (1 << 4); | |
2803 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2804 | } | |
2805 | } | |
2806 | ||
2807 | abuf->written = written; | |
2808 | SEM_BRANCH_FINI (vpc); | |
2809 | return vpc; | |
2810 | #undef FLD | |
2811 | } | |
2812 | ||
2813 | /* jsleile: jsle $dstle,$imm32,$disp16 */ | |
2814 | ||
2815 | static SEM_PC | |
2816 | SEM_FN_NAME (bpfbf_ebpfle,jsleile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2817 | { | |
2818 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2819 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2820 | int UNUSED written = 0; | |
2821 | IADDR UNUSED pc = abuf->addr; | |
2822 | SEM_BRANCH_INIT | |
2823 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2824 | ||
2825 | if (LEDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2826 | { | |
2827 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2828 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2829 | written |= (1 << 4); | |
2830 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2831 | } | |
2832 | } | |
2833 | ||
2834 | abuf->written = written; | |
2835 | SEM_BRANCH_FINI (vpc); | |
2836 | return vpc; | |
2837 | #undef FLD | |
2838 | } | |
2839 | ||
2840 | /* jslerle: jsle $dstle,$srcle,$disp16 */ | |
2841 | ||
2842 | static SEM_PC | |
2843 | SEM_FN_NAME (bpfbf_ebpfle,jslerle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2844 | { | |
2845 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2846 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2847 | int UNUSED written = 0; | |
2848 | IADDR UNUSED pc = abuf->addr; | |
2849 | SEM_BRANCH_INIT | |
2850 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2851 | ||
2852 | if (LEDI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2853 | { | |
2854 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2855 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2856 | written |= (1 << 4); | |
2857 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2858 | } | |
2859 | } | |
2860 | ||
2861 | abuf->written = written; | |
2862 | SEM_BRANCH_FINI (vpc); | |
2863 | return vpc; | |
2864 | #undef FLD | |
2865 | } | |
2866 | ||
2867 | /* jsle32ile: jsle32 $dstle,$imm32,$disp16 */ | |
2868 | ||
2869 | static SEM_PC | |
2870 | SEM_FN_NAME (bpfbf_ebpfle,jsle32ile) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2871 | { | |
2872 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2873 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2874 | int UNUSED written = 0; | |
2875 | IADDR UNUSED pc = abuf->addr; | |
2876 | SEM_BRANCH_INIT | |
2877 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2878 | ||
2879 | if (LESI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_imm32))) { | |
2880 | { | |
2881 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2882 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2883 | written |= (1 << 4); | |
2884 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2885 | } | |
2886 | } | |
2887 | ||
2888 | abuf->written = written; | |
2889 | SEM_BRANCH_FINI (vpc); | |
2890 | return vpc; | |
2891 | #undef FLD | |
2892 | } | |
2893 | ||
2894 | /* jsle32rle: jsle32 $dstle,$srcle,$disp16 */ | |
2895 | ||
2896 | static SEM_PC | |
2897 | SEM_FN_NAME (bpfbf_ebpfle,jsle32rle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2898 | { | |
2899 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2900 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2901 | int UNUSED written = 0; | |
2902 | IADDR UNUSED pc = abuf->addr; | |
2903 | SEM_BRANCH_INIT | |
2904 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2905 | ||
2906 | if (LESI (CPU (h_gpr[FLD (f_dstle)]), CPU (h_gpr[FLD (f_srcle)]))) { | |
2907 | { | |
2908 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2909 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2910 | written |= (1 << 4); | |
2911 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2912 | } | |
2913 | } | |
2914 | ||
2915 | abuf->written = written; | |
2916 | SEM_BRANCH_FINI (vpc); | |
2917 | return vpc; | |
2918 | #undef FLD | |
2919 | } | |
2920 | ||
2921 | /* callle: call $disp32 */ | |
2922 | ||
2923 | static SEM_PC | |
2924 | SEM_FN_NAME (bpfbf_ebpfle,callle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2925 | { | |
2926 | #define FLD(f) abuf->fields.sfmt_ldindwle.f | |
2927 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2928 | int UNUSED written = 0; | |
2929 | IADDR UNUSED pc = abuf->addr; | |
2930 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2931 | ||
2932 | bpfbf_call (current_cpu, FLD (f_imm32), FLD (f_srcle)); | |
2933 | ||
2934 | return vpc; | |
2935 | #undef FLD | |
2936 | } | |
2937 | ||
2938 | /* ja: ja $disp16 */ | |
2939 | ||
2940 | static SEM_PC | |
2941 | SEM_FN_NAME (bpfbf_ebpfle,ja) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2942 | { | |
2943 | #define FLD(f) abuf->fields.sfmt_stble.f | |
2944 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2945 | int UNUSED written = 0; | |
2946 | IADDR UNUSED pc = abuf->addr; | |
2947 | SEM_BRANCH_INIT | |
2948 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2949 | ||
2950 | { | |
2951 | DI opval = ADDDI (pc, MULDI (ADDHI (FLD (f_offset16), 1), 8)); | |
2952 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
2953 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); | |
2954 | } | |
2955 | ||
2956 | SEM_BRANCH_FINI (vpc); | |
2957 | return vpc; | |
2958 | #undef FLD | |
2959 | } | |
2960 | ||
2961 | /* exit: exit */ | |
2962 | ||
2963 | static SEM_PC | |
2964 | SEM_FN_NAME (bpfbf_ebpfle,exit) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2965 | { | |
2966 | #define FLD(f) abuf->fields.sfmt_empty.f | |
2967 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2968 | int UNUSED written = 0; | |
2969 | IADDR UNUSED pc = abuf->addr; | |
2970 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2971 | ||
2972 | bpfbf_exit (current_cpu); | |
2973 | ||
2974 | return vpc; | |
2975 | #undef FLD | |
2976 | } | |
2977 | ||
2978 | /* xadddwle: xadddw [$dstle+$offset16],$srcle */ | |
2979 | ||
2980 | static SEM_PC | |
2981 | SEM_FN_NAME (bpfbf_ebpfle,xadddwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
2982 | { | |
2983 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
2984 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
2985 | int UNUSED written = 0; | |
2986 | IADDR UNUSED pc = abuf->addr; | |
2987 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2988 | ||
2989 | { | |
2990 | DI tmp_tmp; | |
2991 | tmp_tmp = GETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16))); | |
2992 | { | |
2993 | DI opval = ADDDI (tmp_tmp, CPU (h_gpr[FLD (f_srcle)])); | |
2994 | SETMEMDI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16)), opval); | |
2995 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'D', opval); | |
2996 | } | |
2997 | } | |
2998 | ||
2999 | return vpc; | |
3000 | #undef FLD | |
3001 | } | |
3002 | ||
3003 | /* xaddwle: xaddw [$dstle+$offset16],$srcle */ | |
3004 | ||
3005 | static SEM_PC | |
3006 | SEM_FN_NAME (bpfbf_ebpfle,xaddwle) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
3007 | { | |
3008 | #define FLD(f) abuf->fields.sfmt_ldxwle.f | |
3009 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3010 | int UNUSED written = 0; | |
3011 | IADDR UNUSED pc = abuf->addr; | |
3012 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3013 | ||
3014 | { | |
3015 | SI tmp_tmp; | |
3016 | tmp_tmp = GETMEMSI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16))); | |
3017 | { | |
3018 | SI opval = ADDSI (tmp_tmp, CPU (h_gpr[FLD (f_srcle)])); | |
3019 | SETMEMSI (current_cpu, pc, ADDDI (CPU (h_gpr[FLD (f_dstle)]), FLD (f_offset16)), opval); | |
3020 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
3021 | } | |
3022 | } | |
3023 | ||
3024 | return vpc; | |
3025 | #undef FLD | |
3026 | } | |
3027 | ||
3028 | /* brkpt: brkpt */ | |
3029 | ||
3030 | static SEM_PC | |
3031 | SEM_FN_NAME (bpfbf_ebpfle,brkpt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
3032 | { | |
3033 | #define FLD(f) abuf->fields.sfmt_empty.f | |
3034 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
3035 | int UNUSED written = 0; | |
3036 | IADDR UNUSED pc = abuf->addr; | |
3037 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3038 | ||
3039 | bpfbf_breakpoint (current_cpu); | |
3040 | ||
3041 | return vpc; | |
3042 | #undef FLD | |
3043 | } | |
3044 | ||
3045 | /* Table of all semantic fns. */ | |
3046 | ||
3047 | static const struct sem_fn_desc sem_fns[] = { | |
3048 | { BPFBF_EBPFLE_INSN_X_INVALID, SEM_FN_NAME (bpfbf_ebpfle,x_invalid) }, | |
3049 | { BPFBF_EBPFLE_INSN_X_AFTER, SEM_FN_NAME (bpfbf_ebpfle,x_after) }, | |
3050 | { BPFBF_EBPFLE_INSN_X_BEFORE, SEM_FN_NAME (bpfbf_ebpfle,x_before) }, | |
3051 | { BPFBF_EBPFLE_INSN_X_CTI_CHAIN, SEM_FN_NAME (bpfbf_ebpfle,x_cti_chain) }, | |
3052 | { BPFBF_EBPFLE_INSN_X_CHAIN, SEM_FN_NAME (bpfbf_ebpfle,x_chain) }, | |
3053 | { BPFBF_EBPFLE_INSN_X_BEGIN, SEM_FN_NAME (bpfbf_ebpfle,x_begin) }, | |
3054 | { BPFBF_EBPFLE_INSN_ADDILE, SEM_FN_NAME (bpfbf_ebpfle,addile) }, | |
3055 | { BPFBF_EBPFLE_INSN_ADDRLE, SEM_FN_NAME (bpfbf_ebpfle,addrle) }, | |
3056 | { BPFBF_EBPFLE_INSN_ADD32ILE, SEM_FN_NAME (bpfbf_ebpfle,add32ile) }, | |
3057 | { BPFBF_EBPFLE_INSN_ADD32RLE, SEM_FN_NAME (bpfbf_ebpfle,add32rle) }, | |
3058 | { BPFBF_EBPFLE_INSN_SUBILE, SEM_FN_NAME (bpfbf_ebpfle,subile) }, | |
3059 | { BPFBF_EBPFLE_INSN_SUBRLE, SEM_FN_NAME (bpfbf_ebpfle,subrle) }, | |
3060 | { BPFBF_EBPFLE_INSN_SUB32ILE, SEM_FN_NAME (bpfbf_ebpfle,sub32ile) }, | |
3061 | { BPFBF_EBPFLE_INSN_SUB32RLE, SEM_FN_NAME (bpfbf_ebpfle,sub32rle) }, | |
3062 | { BPFBF_EBPFLE_INSN_MULILE, SEM_FN_NAME (bpfbf_ebpfle,mulile) }, | |
3063 | { BPFBF_EBPFLE_INSN_MULRLE, SEM_FN_NAME (bpfbf_ebpfle,mulrle) }, | |
3064 | { BPFBF_EBPFLE_INSN_MUL32ILE, SEM_FN_NAME (bpfbf_ebpfle,mul32ile) }, | |
3065 | { BPFBF_EBPFLE_INSN_MUL32RLE, SEM_FN_NAME (bpfbf_ebpfle,mul32rle) }, | |
3066 | { BPFBF_EBPFLE_INSN_DIVILE, SEM_FN_NAME (bpfbf_ebpfle,divile) }, | |
3067 | { BPFBF_EBPFLE_INSN_DIVRLE, SEM_FN_NAME (bpfbf_ebpfle,divrle) }, | |
3068 | { BPFBF_EBPFLE_INSN_DIV32ILE, SEM_FN_NAME (bpfbf_ebpfle,div32ile) }, | |
3069 | { BPFBF_EBPFLE_INSN_DIV32RLE, SEM_FN_NAME (bpfbf_ebpfle,div32rle) }, | |
3070 | { BPFBF_EBPFLE_INSN_ORILE, SEM_FN_NAME (bpfbf_ebpfle,orile) }, | |
3071 | { BPFBF_EBPFLE_INSN_ORRLE, SEM_FN_NAME (bpfbf_ebpfle,orrle) }, | |
3072 | { BPFBF_EBPFLE_INSN_OR32ILE, SEM_FN_NAME (bpfbf_ebpfle,or32ile) }, | |
3073 | { BPFBF_EBPFLE_INSN_OR32RLE, SEM_FN_NAME (bpfbf_ebpfle,or32rle) }, | |
3074 | { BPFBF_EBPFLE_INSN_ANDILE, SEM_FN_NAME (bpfbf_ebpfle,andile) }, | |
3075 | { BPFBF_EBPFLE_INSN_ANDRLE, SEM_FN_NAME (bpfbf_ebpfle,andrle) }, | |
3076 | { BPFBF_EBPFLE_INSN_AND32ILE, SEM_FN_NAME (bpfbf_ebpfle,and32ile) }, | |
3077 | { BPFBF_EBPFLE_INSN_AND32RLE, SEM_FN_NAME (bpfbf_ebpfle,and32rle) }, | |
3078 | { BPFBF_EBPFLE_INSN_LSHILE, SEM_FN_NAME (bpfbf_ebpfle,lshile) }, | |
3079 | { BPFBF_EBPFLE_INSN_LSHRLE, SEM_FN_NAME (bpfbf_ebpfle,lshrle) }, | |
3080 | { BPFBF_EBPFLE_INSN_LSH32ILE, SEM_FN_NAME (bpfbf_ebpfle,lsh32ile) }, | |
3081 | { BPFBF_EBPFLE_INSN_LSH32RLE, SEM_FN_NAME (bpfbf_ebpfle,lsh32rle) }, | |
3082 | { BPFBF_EBPFLE_INSN_RSHILE, SEM_FN_NAME (bpfbf_ebpfle,rshile) }, | |
3083 | { BPFBF_EBPFLE_INSN_RSHRLE, SEM_FN_NAME (bpfbf_ebpfle,rshrle) }, | |
3084 | { BPFBF_EBPFLE_INSN_RSH32ILE, SEM_FN_NAME (bpfbf_ebpfle,rsh32ile) }, | |
3085 | { BPFBF_EBPFLE_INSN_RSH32RLE, SEM_FN_NAME (bpfbf_ebpfle,rsh32rle) }, | |
3086 | { BPFBF_EBPFLE_INSN_MODILE, SEM_FN_NAME (bpfbf_ebpfle,modile) }, | |
3087 | { BPFBF_EBPFLE_INSN_MODRLE, SEM_FN_NAME (bpfbf_ebpfle,modrle) }, | |
3088 | { BPFBF_EBPFLE_INSN_MOD32ILE, SEM_FN_NAME (bpfbf_ebpfle,mod32ile) }, | |
3089 | { BPFBF_EBPFLE_INSN_MOD32RLE, SEM_FN_NAME (bpfbf_ebpfle,mod32rle) }, | |
3090 | { BPFBF_EBPFLE_INSN_XORILE, SEM_FN_NAME (bpfbf_ebpfle,xorile) }, | |
3091 | { BPFBF_EBPFLE_INSN_XORRLE, SEM_FN_NAME (bpfbf_ebpfle,xorrle) }, | |
3092 | { BPFBF_EBPFLE_INSN_XOR32ILE, SEM_FN_NAME (bpfbf_ebpfle,xor32ile) }, | |
3093 | { BPFBF_EBPFLE_INSN_XOR32RLE, SEM_FN_NAME (bpfbf_ebpfle,xor32rle) }, | |
3094 | { BPFBF_EBPFLE_INSN_ARSHILE, SEM_FN_NAME (bpfbf_ebpfle,arshile) }, | |
3095 | { BPFBF_EBPFLE_INSN_ARSHRLE, SEM_FN_NAME (bpfbf_ebpfle,arshrle) }, | |
3096 | { BPFBF_EBPFLE_INSN_ARSH32ILE, SEM_FN_NAME (bpfbf_ebpfle,arsh32ile) }, | |
3097 | { BPFBF_EBPFLE_INSN_ARSH32RLE, SEM_FN_NAME (bpfbf_ebpfle,arsh32rle) }, | |
3098 | { BPFBF_EBPFLE_INSN_NEGLE, SEM_FN_NAME (bpfbf_ebpfle,negle) }, | |
3099 | { BPFBF_EBPFLE_INSN_NEG32LE, SEM_FN_NAME (bpfbf_ebpfle,neg32le) }, | |
3100 | { BPFBF_EBPFLE_INSN_MOVILE, SEM_FN_NAME (bpfbf_ebpfle,movile) }, | |
3101 | { BPFBF_EBPFLE_INSN_MOVRLE, SEM_FN_NAME (bpfbf_ebpfle,movrle) }, | |
3102 | { BPFBF_EBPFLE_INSN_MOV32ILE, SEM_FN_NAME (bpfbf_ebpfle,mov32ile) }, | |
3103 | { BPFBF_EBPFLE_INSN_MOV32RLE, SEM_FN_NAME (bpfbf_ebpfle,mov32rle) }, | |
3104 | { BPFBF_EBPFLE_INSN_ENDLELE, SEM_FN_NAME (bpfbf_ebpfle,endlele) }, | |
3105 | { BPFBF_EBPFLE_INSN_ENDBELE, SEM_FN_NAME (bpfbf_ebpfle,endbele) }, | |
3106 | { BPFBF_EBPFLE_INSN_LDDWLE, SEM_FN_NAME (bpfbf_ebpfle,lddwle) }, | |
3107 | { BPFBF_EBPFLE_INSN_LDABSW, SEM_FN_NAME (bpfbf_ebpfle,ldabsw) }, | |
3108 | { BPFBF_EBPFLE_INSN_LDABSH, SEM_FN_NAME (bpfbf_ebpfle,ldabsh) }, | |
3109 | { BPFBF_EBPFLE_INSN_LDABSB, SEM_FN_NAME (bpfbf_ebpfle,ldabsb) }, | |
3110 | { BPFBF_EBPFLE_INSN_LDABSDW, SEM_FN_NAME (bpfbf_ebpfle,ldabsdw) }, | |
3111 | { BPFBF_EBPFLE_INSN_LDINDWLE, SEM_FN_NAME (bpfbf_ebpfle,ldindwle) }, | |
3112 | { BPFBF_EBPFLE_INSN_LDINDHLE, SEM_FN_NAME (bpfbf_ebpfle,ldindhle) }, | |
3113 | { BPFBF_EBPFLE_INSN_LDINDBLE, SEM_FN_NAME (bpfbf_ebpfle,ldindble) }, | |
3114 | { BPFBF_EBPFLE_INSN_LDINDDWLE, SEM_FN_NAME (bpfbf_ebpfle,ldinddwle) }, | |
3115 | { BPFBF_EBPFLE_INSN_LDXWLE, SEM_FN_NAME (bpfbf_ebpfle,ldxwle) }, | |
3116 | { BPFBF_EBPFLE_INSN_LDXHLE, SEM_FN_NAME (bpfbf_ebpfle,ldxhle) }, | |
3117 | { BPFBF_EBPFLE_INSN_LDXBLE, SEM_FN_NAME (bpfbf_ebpfle,ldxble) }, | |
3118 | { BPFBF_EBPFLE_INSN_LDXDWLE, SEM_FN_NAME (bpfbf_ebpfle,ldxdwle) }, | |
3119 | { BPFBF_EBPFLE_INSN_STXWLE, SEM_FN_NAME (bpfbf_ebpfle,stxwle) }, | |
3120 | { BPFBF_EBPFLE_INSN_STXHLE, SEM_FN_NAME (bpfbf_ebpfle,stxhle) }, | |
3121 | { BPFBF_EBPFLE_INSN_STXBLE, SEM_FN_NAME (bpfbf_ebpfle,stxble) }, | |
3122 | { BPFBF_EBPFLE_INSN_STXDWLE, SEM_FN_NAME (bpfbf_ebpfle,stxdwle) }, | |
3123 | { BPFBF_EBPFLE_INSN_STBLE, SEM_FN_NAME (bpfbf_ebpfle,stble) }, | |
3124 | { BPFBF_EBPFLE_INSN_STHLE, SEM_FN_NAME (bpfbf_ebpfle,sthle) }, | |
3125 | { BPFBF_EBPFLE_INSN_STWLE, SEM_FN_NAME (bpfbf_ebpfle,stwle) }, | |
3126 | { BPFBF_EBPFLE_INSN_STDWLE, SEM_FN_NAME (bpfbf_ebpfle,stdwle) }, | |
3127 | { BPFBF_EBPFLE_INSN_JEQILE, SEM_FN_NAME (bpfbf_ebpfle,jeqile) }, | |
3128 | { BPFBF_EBPFLE_INSN_JEQRLE, SEM_FN_NAME (bpfbf_ebpfle,jeqrle) }, | |
3129 | { BPFBF_EBPFLE_INSN_JEQ32ILE, SEM_FN_NAME (bpfbf_ebpfle,jeq32ile) }, | |
3130 | { BPFBF_EBPFLE_INSN_JEQ32RLE, SEM_FN_NAME (bpfbf_ebpfle,jeq32rle) }, | |
3131 | { BPFBF_EBPFLE_INSN_JGTILE, SEM_FN_NAME (bpfbf_ebpfle,jgtile) }, | |
3132 | { BPFBF_EBPFLE_INSN_JGTRLE, SEM_FN_NAME (bpfbf_ebpfle,jgtrle) }, | |
3133 | { BPFBF_EBPFLE_INSN_JGT32ILE, SEM_FN_NAME (bpfbf_ebpfle,jgt32ile) }, | |
3134 | { BPFBF_EBPFLE_INSN_JGT32RLE, SEM_FN_NAME (bpfbf_ebpfle,jgt32rle) }, | |
3135 | { BPFBF_EBPFLE_INSN_JGEILE, SEM_FN_NAME (bpfbf_ebpfle,jgeile) }, | |
3136 | { BPFBF_EBPFLE_INSN_JGERLE, SEM_FN_NAME (bpfbf_ebpfle,jgerle) }, | |
3137 | { BPFBF_EBPFLE_INSN_JGE32ILE, SEM_FN_NAME (bpfbf_ebpfle,jge32ile) }, | |
3138 | { BPFBF_EBPFLE_INSN_JGE32RLE, SEM_FN_NAME (bpfbf_ebpfle,jge32rle) }, | |
3139 | { BPFBF_EBPFLE_INSN_JLTILE, SEM_FN_NAME (bpfbf_ebpfle,jltile) }, | |
3140 | { BPFBF_EBPFLE_INSN_JLTRLE, SEM_FN_NAME (bpfbf_ebpfle,jltrle) }, | |
3141 | { BPFBF_EBPFLE_INSN_JLT32ILE, SEM_FN_NAME (bpfbf_ebpfle,jlt32ile) }, | |
3142 | { BPFBF_EBPFLE_INSN_JLT32RLE, SEM_FN_NAME (bpfbf_ebpfle,jlt32rle) }, | |
3143 | { BPFBF_EBPFLE_INSN_JLEILE, SEM_FN_NAME (bpfbf_ebpfle,jleile) }, | |
3144 | { BPFBF_EBPFLE_INSN_JLERLE, SEM_FN_NAME (bpfbf_ebpfle,jlerle) }, | |
3145 | { BPFBF_EBPFLE_INSN_JLE32ILE, SEM_FN_NAME (bpfbf_ebpfle,jle32ile) }, | |
3146 | { BPFBF_EBPFLE_INSN_JLE32RLE, SEM_FN_NAME (bpfbf_ebpfle,jle32rle) }, | |
3147 | { BPFBF_EBPFLE_INSN_JSETILE, SEM_FN_NAME (bpfbf_ebpfle,jsetile) }, | |
3148 | { BPFBF_EBPFLE_INSN_JSETRLE, SEM_FN_NAME (bpfbf_ebpfle,jsetrle) }, | |
3149 | { BPFBF_EBPFLE_INSN_JSET32ILE, SEM_FN_NAME (bpfbf_ebpfle,jset32ile) }, | |
3150 | { BPFBF_EBPFLE_INSN_JSET32RLE, SEM_FN_NAME (bpfbf_ebpfle,jset32rle) }, | |
3151 | { BPFBF_EBPFLE_INSN_JNEILE, SEM_FN_NAME (bpfbf_ebpfle,jneile) }, | |
3152 | { BPFBF_EBPFLE_INSN_JNERLE, SEM_FN_NAME (bpfbf_ebpfle,jnerle) }, | |
3153 | { BPFBF_EBPFLE_INSN_JNE32ILE, SEM_FN_NAME (bpfbf_ebpfle,jne32ile) }, | |
3154 | { BPFBF_EBPFLE_INSN_JNE32RLE, SEM_FN_NAME (bpfbf_ebpfle,jne32rle) }, | |
3155 | { BPFBF_EBPFLE_INSN_JSGTILE, SEM_FN_NAME (bpfbf_ebpfle,jsgtile) }, | |
3156 | { BPFBF_EBPFLE_INSN_JSGTRLE, SEM_FN_NAME (bpfbf_ebpfle,jsgtrle) }, | |
3157 | { BPFBF_EBPFLE_INSN_JSGT32ILE, SEM_FN_NAME (bpfbf_ebpfle,jsgt32ile) }, | |
3158 | { BPFBF_EBPFLE_INSN_JSGT32RLE, SEM_FN_NAME (bpfbf_ebpfle,jsgt32rle) }, | |
3159 | { BPFBF_EBPFLE_INSN_JSGEILE, SEM_FN_NAME (bpfbf_ebpfle,jsgeile) }, | |
3160 | { BPFBF_EBPFLE_INSN_JSGERLE, SEM_FN_NAME (bpfbf_ebpfle,jsgerle) }, | |
3161 | { BPFBF_EBPFLE_INSN_JSGE32ILE, SEM_FN_NAME (bpfbf_ebpfle,jsge32ile) }, | |
3162 | { BPFBF_EBPFLE_INSN_JSGE32RLE, SEM_FN_NAME (bpfbf_ebpfle,jsge32rle) }, | |
3163 | { BPFBF_EBPFLE_INSN_JSLTILE, SEM_FN_NAME (bpfbf_ebpfle,jsltile) }, | |
3164 | { BPFBF_EBPFLE_INSN_JSLTRLE, SEM_FN_NAME (bpfbf_ebpfle,jsltrle) }, | |
3165 | { BPFBF_EBPFLE_INSN_JSLT32ILE, SEM_FN_NAME (bpfbf_ebpfle,jslt32ile) }, | |
3166 | { BPFBF_EBPFLE_INSN_JSLT32RLE, SEM_FN_NAME (bpfbf_ebpfle,jslt32rle) }, | |
3167 | { BPFBF_EBPFLE_INSN_JSLEILE, SEM_FN_NAME (bpfbf_ebpfle,jsleile) }, | |
3168 | { BPFBF_EBPFLE_INSN_JSLERLE, SEM_FN_NAME (bpfbf_ebpfle,jslerle) }, | |
3169 | { BPFBF_EBPFLE_INSN_JSLE32ILE, SEM_FN_NAME (bpfbf_ebpfle,jsle32ile) }, | |
3170 | { BPFBF_EBPFLE_INSN_JSLE32RLE, SEM_FN_NAME (bpfbf_ebpfle,jsle32rle) }, | |
3171 | { BPFBF_EBPFLE_INSN_CALLLE, SEM_FN_NAME (bpfbf_ebpfle,callle) }, | |
3172 | { BPFBF_EBPFLE_INSN_JA, SEM_FN_NAME (bpfbf_ebpfle,ja) }, | |
3173 | { BPFBF_EBPFLE_INSN_EXIT, SEM_FN_NAME (bpfbf_ebpfle,exit) }, | |
3174 | { BPFBF_EBPFLE_INSN_XADDDWLE, SEM_FN_NAME (bpfbf_ebpfle,xadddwle) }, | |
3175 | { BPFBF_EBPFLE_INSN_XADDWLE, SEM_FN_NAME (bpfbf_ebpfle,xaddwle) }, | |
3176 | { BPFBF_EBPFLE_INSN_BRKPT, SEM_FN_NAME (bpfbf_ebpfle,brkpt) }, | |
3177 | { 0, 0 } | |
3178 | }; | |
3179 | ||
3180 | /* Add the semantic fns to IDESC_TABLE. */ | |
3181 | ||
3182 | void | |
3183 | SEM_FN_NAME (bpfbf_ebpfle,init_idesc_table) (SIM_CPU *current_cpu) | |
3184 | { | |
3185 | IDESC *idesc_table = CPU_IDESC (current_cpu); | |
3186 | const struct sem_fn_desc *sf; | |
3187 | int mach_num = MACH_NUM (CPU_MACH (current_cpu)); | |
3188 | ||
3189 | for (sf = &sem_fns[0]; sf->fn != 0; ++sf) | |
3190 | { | |
3191 | const CGEN_INSN *insn = idesc_table[sf->index].idata; | |
3192 | int valid_p = (CGEN_INSN_VIRTUAL_P (insn) | |
3193 | || CGEN_INSN_MACH_HAS_P (insn, mach_num)); | |
3194 | #if FAST_P | |
3195 | if (valid_p) | |
3196 | idesc_table[sf->index].sem_fast = sf->fn; | |
3197 | else | |
3198 | idesc_table[sf->index].sem_fast = SEM_FN_NAME (bpfbf_ebpfle,x_invalid); | |
3199 | #else | |
3200 | if (valid_p) | |
3201 | idesc_table[sf->index].sem_full = sf->fn; | |
3202 | else | |
3203 | idesc_table[sf->index].sem_full = SEM_FN_NAME (bpfbf_ebpfle,x_invalid); | |
3204 | #endif | |
3205 | } | |
3206 | } | |
3207 |