[deliverable/binutils-gdb.git] / sim / common / cgen-fpu.h

/* CGEN fpu support
   Copyright (C) 1999 Cygnus Solutions.
   Copyright (C) 2010 Doug Evans.  */

#ifndef CGEN_FPU_H
#define CGEN_FPU_H

/* Floating point support is a little more complicated.
   We want to support using either host fp insns or an accurate fp library.
   We also want to support easily added variants (e.g. modified ieee).
   This is done by vectoring all calls through a table.  */

typedef USI SF;
typedef UDI DF;
typedef struct { SI parts[3]; } XF;
typedef struct { SI parts[4]; } TF;

#ifndef TARGET_EXT_FP_WORDS
#define TARGET_EXT_FP_WORDS 4
#endif

/* Supported floating point conversion kinds (rounding modes).
   FIXME: The IEEE rounding modes need to be implemented.  */

typedef enum {
  FPCONV_DEFAULT = 0,
  FPCONV_TIES_TO_EVEN = 1,
  FPCONV_TIES_TO_AWAY = 2,
  FPCONV_TOWARD_ZERO = 3,
  FPCONV_TOWARD_POSITIVE = 4,
  FPCONV_TOWARD_NEGATIVE = 5
} CGEN_FPCONV_KIND;

/* forward decl */
typedef struct cgen_fp_ops CGEN_FP_OPS;

/* Instance of an fpu.  */

typedef struct {
  /* Usually a pointer back to the SIM_CPU struct.  */
  void* owner;
  /* Pointer to ops struct, rather than copy of it, to avoid bloating
     SIM_CPU struct.  */
  CGEN_FP_OPS* ops;
} CGEN_FPU;

/* result of cmp */

typedef enum {
  /* ??? May wish to distinguish qnan/snan here.  */
  FP_CMP_EQ, FP_CMP_LT, FP_CMP_GT, FP_CMP_NAN
} CGEN_FP_CMP;

/* error handler */

typedef void (CGEN_FPU_ERROR_FN) (CGEN_FPU*, int);

/* fpu operation table */

struct cgen_fp_ops {

  /* error (e.g. signalling nan) handler, supplied by owner */

  CGEN_FPU_ERROR_FN *error;

  /* basic SF ops */

  SF (*addsf) (CGEN_FPU*, SF, SF);
  SF (*subsf) (CGEN_FPU*, SF, SF);
  SF (*mulsf) (CGEN_FPU*, SF, SF);
  SF (*divsf) (CGEN_FPU*, SF, SF);
  SF (*remsf) (CGEN_FPU*, SF, SF);
  SF (*negsf) (CGEN_FPU*, SF);
  SF (*abssf) (CGEN_FPU*, SF);
  SF (*sqrtsf) (CGEN_FPU*, SF);
  SF (*invsf) (CGEN_FPU*, SF);
  SF (*cossf) (CGEN_FPU*, SF);
  SF (*sinsf) (CGEN_FPU*, SF);
  SF (*minsf) (CGEN_FPU*, SF, SF);
  SF (*maxsf) (CGEN_FPU*, SF, SF);

  /* ??? to be revisited */
  CGEN_FP_CMP (*cmpsf) (CGEN_FPU*, SF, SF);
  int (*eqsf) (CGEN_FPU*, SF, SF);
  int (*nesf) (CGEN_FPU*, SF, SF);
  int (*ltsf) (CGEN_FPU*, SF, SF);
  int (*lesf) (CGEN_FPU*, SF, SF);
  int (*gtsf) (CGEN_FPU*, SF, SF);
  int (*gesf) (CGEN_FPU*, SF, SF);

  /* basic DF ops */

  DF (*adddf) (CGEN_FPU*, DF, DF);
  DF (*subdf) (CGEN_FPU*, DF, DF);
  DF (*muldf) (CGEN_FPU*, DF, DF);
  DF (*divdf) (CGEN_FPU*, DF, DF);
  DF (*remdf) (CGEN_FPU*, DF, DF);
  DF (*negdf) (CGEN_FPU*, DF);
  DF (*absdf) (CGEN_FPU*, DF);
  DF (*sqrtdf) (CGEN_FPU*, DF);
  DF (*invdf) (CGEN_FPU*, DF);
  DF (*cosdf) (CGEN_FPU*, DF);
  DF (*sindf) (CGEN_FPU*, DF);
  DF (*mindf) (CGEN_FPU*, DF, DF);
  DF (*maxdf) (CGEN_FPU*, DF, DF);

  /* ??? to be revisited */
  CGEN_FP_CMP (*cmpdf) (CGEN_FPU*, DF, DF);
  int (*eqdf) (CGEN_FPU*, DF, DF);
  int (*nedf) (CGEN_FPU*, DF, DF);
  int (*ltdf) (CGEN_FPU*, DF, DF);
  int (*ledf) (CGEN_FPU*, DF, DF);
  int (*gtdf) (CGEN_FPU*, DF, DF);
  int (*gedf) (CGEN_FPU*, DF, DF);

  /* SF/DF conversion ops */

  DF (*fextsfdf) (CGEN_FPU*, int, SF);
  SF (*ftruncdfsf) (CGEN_FPU*, int, DF);

  SF (*floatsisf) (CGEN_FPU*, int, SI);
  SF (*floatdisf) (CGEN_FPU*, int, DI);
  SF (*ufloatsisf) (CGEN_FPU*, int, USI);
  SF (*ufloatdisf) (CGEN_FPU*, int, UDI);

  SI (*fixsfsi) (CGEN_FPU*, int, SF);
  DI (*fixsfdi) (CGEN_FPU*, int, SF);
  USI (*ufixsfsi) (CGEN_FPU*, int, SF);
  UDI (*ufixsfdi) (CGEN_FPU*, int, SF);

  DF (*floatsidf) (CGEN_FPU*, int, SI);
  DF (*floatdidf) (CGEN_FPU*, int, DI);
  DF (*ufloatsidf) (CGEN_FPU*, int, USI);
  DF (*ufloatdidf) (CGEN_FPU*, int, UDI);

  SI (*fixdfsi) (CGEN_FPU*, int, DF);
  DI (*fixdfdi) (CGEN_FPU*, int, DF);
  USI (*ufixdfsi) (CGEN_FPU*, int, DF);
  UDI (*ufixdfdi) (CGEN_FPU*, int, DF);

  /* XF mode support (kept separate 'cus not always present) */

  XF (*addxf) (CGEN_FPU*, XF, XF);
  XF (*subxf) (CGEN_FPU*, XF, XF);
  XF (*mulxf) (CGEN_FPU*, XF, XF);
  XF (*divxf) (CGEN_FPU*, XF, XF);
  XF (*remxf) (CGEN_FPU*, XF, XF);
  XF (*negxf) (CGEN_FPU*, XF);
  XF (*absxf) (CGEN_FPU*, XF);
  XF (*sqrtxf) (CGEN_FPU*, XF);
  XF (*invxf) (CGEN_FPU*, XF);
  XF (*cosxf) (CGEN_FPU*, XF);
  XF (*sinxf) (CGEN_FPU*, XF);
  XF (*minxf) (CGEN_FPU*, XF, XF);
  XF (*maxxf) (CGEN_FPU*, XF, XF);

  CGEN_FP_CMP (*cmpxf) (CGEN_FPU*, XF, XF);
  int (*eqxf) (CGEN_FPU*, XF, XF);
  int (*nexf) (CGEN_FPU*, XF, XF);
  int (*ltxf) (CGEN_FPU*, XF, XF);
  int (*lexf) (CGEN_FPU*, XF, XF);
  int (*gtxf) (CGEN_FPU*, XF, XF);
  int (*gexf) (CGEN_FPU*, XF, XF);

  XF (*extsfxf) (CGEN_FPU*, int, SF);
  XF (*extdfxf) (CGEN_FPU*, int, DF);
  SF (*truncxfsf) (CGEN_FPU*, int, XF);
  DF (*truncxfdf) (CGEN_FPU*, int, XF);

  XF (*floatsixf) (CGEN_FPU*, int, SI);
  XF (*floatdixf) (CGEN_FPU*, int, DI);
  XF (*ufloatsixf) (CGEN_FPU*, int, USI);
  XF (*ufloatdixf) (CGEN_FPU*, int, UDI);

  SI (*fixxfsi) (CGEN_FPU*, int, XF);
  DI (*fixxfdi) (CGEN_FPU*, int, XF);
  USI (*ufixxfsi) (CGEN_FPU*, int, XF);
  UDI (*ufixxfdi) (CGEN_FPU*, int, XF);

  /* TF mode support (kept separate 'cus not always present) */

  TF (*addtf) (CGEN_FPU*, TF, TF);
  TF (*subtf) (CGEN_FPU*, TF, TF);
  TF (*multf) (CGEN_FPU*, TF, TF);
  TF (*divtf) (CGEN_FPU*, TF, TF);
  TF (*remtf) (CGEN_FPU*, TF, TF);
  TF (*negtf) (CGEN_FPU*, TF);
  TF (*abstf) (CGEN_FPU*, TF);
  TF (*sqrttf) (CGEN_FPU*, TF);
  TF (*invtf) (CGEN_FPU*, TF);
  TF (*costf) (CGEN_FPU*, TF);
  TF (*sintf) (CGEN_FPU*, TF);
  TF (*mintf) (CGEN_FPU*, TF, TF);
  TF (*maxtf) (CGEN_FPU*, TF, TF);

  CGEN_FP_CMP (*cmptf) (CGEN_FPU*, TF, TF);
  int (*eqtf) (CGEN_FPU*, TF, TF);
  int (*netf) (CGEN_FPU*, TF, TF);
  int (*lttf) (CGEN_FPU*, TF, TF);
  int (*letf) (CGEN_FPU*, TF, TF);
  int (*gttf) (CGEN_FPU*, TF, TF);
  int (*getf) (CGEN_FPU*, TF, TF);

  TF (*extsftf) (CGEN_FPU*, int, SF);
  TF (*extdftf) (CGEN_FPU*, int, DF);
  SF (*trunctfsf) (CGEN_FPU*, int, TF);
  DF (*trunctfdf) (CGEN_FPU*, int, TF);

  TF (*floatsitf) (CGEN_FPU*, int, SI);
  TF (*floatditf) (CGEN_FPU*, int, DI);
  TF (*ufloatsitf) (CGEN_FPU*, int, USI);
  TF (*ufloatditf) (CGEN_FPU*, int, UDI);

  SI (*fixtfsi) (CGEN_FPU*, int, TF);
  DI (*fixtfdi) (CGEN_FPU*, int, TF);
  USI (*ufixtfsi) (CGEN_FPU*, int, TF);
  UDI (*ufixtfdi) (CGEN_FPU*, int, TF);

};

extern void cgen_init_accurate_fpu (SIM_CPU*, CGEN_FPU*, CGEN_FPU_ERROR_FN*);

BI cgen_sf_snan_p (CGEN_FPU*, SF);
BI cgen_df_snan_p (CGEN_FPU*, DF);

/* no-op fp error handler */
extern CGEN_FPU_ERROR_FN cgen_fpu_ignore_errors;

#endif /* CGEN_FPU_H */
Commit	Line	Data
3535ad49	1	/* CGEN fpu support
d2c7a1a6 DE	2	Copyright (C) 1999 Cygnus Solutions.
d2c7a1a6 DE	3	Copyright (C) 2010 Doug Evans. */
3535ad49 JM	4
	5	#ifndef CGEN_FPU_H
	6	#define CGEN_FPU_H
	7
	8	/* Floating point support is a little more complicated.
	9	We want to support using either host fp insns or an accurate fp library.
	10	We also want to support easily added variants (e.g. modified ieee).
	11	This is done by vectoring all calls through a table. */
	12
	13	typedef USI SF;
	14	typedef UDI DF;
	15	typedef struct { SI parts[3]; } XF;
	16	typedef struct { SI parts[4]; } TF;
	17
	18	#ifndef TARGET_EXT_FP_WORDS
	19	#define TARGET_EXT_FP_WORDS 4
	20	#endif
	21
d2c7a1a6 DE	22	/* Supported floating point conversion kinds (rounding modes).
	23	FIXME: The IEEE rounding modes need to be implemented. */
	24
	25	typedef enum {
	26	FPCONV_DEFAULT = 0,
	27	FPCONV_TIES_TO_EVEN = 1,
	28	FPCONV_TIES_TO_AWAY = 2,
	29	FPCONV_TOWARD_ZERO = 3,
	30	FPCONV_TOWARD_POSITIVE = 4,
	31	FPCONV_TOWARD_NEGATIVE = 5
	32	} CGEN_FPCONV_KIND;
	33
3535ad49 JM	34	/* forward decl */
	35	typedef struct cgen_fp_ops CGEN_FP_OPS;
	36
	37	/* Instance of an fpu. */
	38
	39	typedef struct {
	40	/* Usually a pointer back to the SIM_CPU struct. */
	41	void* owner;
	42	/* Pointer to ops struct, rather than copy of it, to avoid bloating
	43	SIM_CPU struct. */
	44	CGEN_FP_OPS* ops;
	45	} CGEN_FPU;
	46
	47	/* result of cmp */
	48
	49	typedef enum {
	50	/* ??? May wish to distinguish qnan/snan here. */
	51	FP_CMP_EQ, FP_CMP_LT, FP_CMP_GT, FP_CMP_NAN
	52	} CGEN_FP_CMP;
	53
	54	/* error handler */
	55
	56	typedef void (CGEN_FPU_ERROR_FN) (CGEN_FPU*, int);
	57
	58	/* fpu operation table */
	59
	60	struct cgen_fp_ops {
	61
	62	/* error (e.g. signalling nan) handler, supplied by owner */
	63
	64	CGEN_FPU_ERROR_FN *error;
	65
	66	/* basic SF ops */
	67
	68	SF (addsf) (CGEN_FPU, SF, SF);
	69	SF (subsf) (CGEN_FPU, SF, SF);
	70	SF (mulsf) (CGEN_FPU, SF, SF);
	71	SF (divsf) (CGEN_FPU, SF, SF);
07b95864	72	SF (remsf) (CGEN_FPU, SF, SF);
3535ad49 JM	73	SF (negsf) (CGEN_FPU, SF);
	74	SF (abssf) (CGEN_FPU, SF);
	75	SF (sqrtsf) (CGEN_FPU, SF);
	76	SF (invsf) (CGEN_FPU, SF);
	77	SF (cossf) (CGEN_FPU, SF);
	78	SF (sinsf) (CGEN_FPU, SF);
	79	SF (minsf) (CGEN_FPU, SF, SF);
	80	SF (maxsf) (CGEN_FPU, SF, SF);
	81
	82	/* ??? to be revisited */
	83	CGEN_FP_CMP (cmpsf) (CGEN_FPU, SF, SF);
	84	int (eqsf) (CGEN_FPU, SF, SF);
	85	int (nesf) (CGEN_FPU, SF, SF);
	86	int (ltsf) (CGEN_FPU, SF, SF);
	87	int (lesf) (CGEN_FPU, SF, SF);
	88	int (gtsf) (CGEN_FPU, SF, SF);
	89	int (gesf) (CGEN_FPU, SF, SF);
	90
	91	/* basic DF ops */
	92
	93	DF (adddf) (CGEN_FPU, DF, DF);
	94	DF (subdf) (CGEN_FPU, DF, DF);
	95	DF (muldf) (CGEN_FPU, DF, DF);
	96	DF (divdf) (CGEN_FPU, DF, DF);
07b95864	97	DF (remdf) (CGEN_FPU, DF, DF);
3535ad49 JM	98	DF (negdf) (CGEN_FPU, DF);
	99	DF (absdf) (CGEN_FPU, DF);
	100	DF (sqrtdf) (CGEN_FPU, DF);
	101	DF (invdf) (CGEN_FPU, DF);
	102	DF (cosdf) (CGEN_FPU, DF);
	103	DF (sindf) (CGEN_FPU, DF);
	104	DF (mindf) (CGEN_FPU, DF, DF);
	105	DF (maxdf) (CGEN_FPU, DF, DF);
	106
	107	/* ??? to be revisited */
	108	CGEN_FP_CMP (cmpdf) (CGEN_FPU, DF, DF);
	109	int (eqdf) (CGEN_FPU, DF, DF);
	110	int (nedf) (CGEN_FPU, DF, DF);
	111	int (ltdf) (CGEN_FPU, DF, DF);
	112	int (ledf) (CGEN_FPU, DF, DF);
	113	int (gtdf) (CGEN_FPU, DF, DF);
	114	int (gedf) (CGEN_FPU, DF, DF);
	115
	116	/* SF/DF conversion ops */
	117
d2c7a1a6 DE	118	DF (fextsfdf) (CGEN_FPU, int, SF);
d2c7a1a6 DE	119	SF (ftruncdfsf) (CGEN_FPU, int, DF);
3535ad49	120
d2c7a1a6 DE	121	SF (floatsisf) (CGEN_FPU, int, SI);
	122	SF (floatdisf) (CGEN_FPU, int, DI);
	123	SF (ufloatsisf) (CGEN_FPU, int, USI);
	124	SF (ufloatdisf) (CGEN_FPU, int, UDI);
3535ad49	125
d2c7a1a6 DE	126	SI (fixsfsi) (CGEN_FPU, int, SF);
	127	DI (fixsfdi) (CGEN_FPU, int, SF);
	128	USI (ufixsfsi) (CGEN_FPU, int, SF);
	129	UDI (ufixsfdi) (CGEN_FPU, int, SF);
3535ad49	130
d2c7a1a6 DE	131	DF (floatsidf) (CGEN_FPU, int, SI);
	132	DF (floatdidf) (CGEN_FPU, int, DI);
	133	DF (ufloatsidf) (CGEN_FPU, int, USI);
	134	DF (ufloatdidf) (CGEN_FPU, int, UDI);
3535ad49	135
d2c7a1a6 DE	136	SI (fixdfsi) (CGEN_FPU, int, DF);
	137	DI (fixdfdi) (CGEN_FPU, int, DF);
	138	USI (ufixdfsi) (CGEN_FPU, int, DF);
	139	UDI (ufixdfdi) (CGEN_FPU, int, DF);
3535ad49 JM	140
	141	/* XF mode support (kept separate 'cus not always present) */
	142
	143	XF (addxf) (CGEN_FPU, XF, XF);
	144	XF (subxf) (CGEN_FPU, XF, XF);
	145	XF (mulxf) (CGEN_FPU, XF, XF);
	146	XF (divxf) (CGEN_FPU, XF, XF);
07b95864	147	XF (remxf) (CGEN_FPU, XF, XF);
3535ad49 JM	148	XF (negxf) (CGEN_FPU, XF);
	149	XF (absxf) (CGEN_FPU, XF);
	150	XF (sqrtxf) (CGEN_FPU, XF);
	151	XF (invxf) (CGEN_FPU, XF);
	152	XF (cosxf) (CGEN_FPU, XF);
	153	XF (sinxf) (CGEN_FPU, XF);
	154	XF (minxf) (CGEN_FPU, XF, XF);
	155	XF (maxxf) (CGEN_FPU, XF, XF);
	156
	157	CGEN_FP_CMP (cmpxf) (CGEN_FPU, XF, XF);
	158	int (eqxf) (CGEN_FPU, XF, XF);
	159	int (nexf) (CGEN_FPU, XF, XF);
	160	int (ltxf) (CGEN_FPU, XF, XF);
	161	int (lexf) (CGEN_FPU, XF, XF);
	162	int (gtxf) (CGEN_FPU, XF, XF);
	163	int (gexf) (CGEN_FPU, XF, XF);
	164
d2c7a1a6 DE	165	XF (extsfxf) (CGEN_FPU, int, SF);
	166	XF (extdfxf) (CGEN_FPU, int, DF);
	167	SF (truncxfsf) (CGEN_FPU, int, XF);
	168	DF (truncxfdf) (CGEN_FPU, int, XF);
3535ad49	169
d2c7a1a6 DE	170	XF (floatsixf) (CGEN_FPU, int, SI);
	171	XF (floatdixf) (CGEN_FPU, int, DI);
	172	XF (ufloatsixf) (CGEN_FPU, int, USI);
	173	XF (ufloatdixf) (CGEN_FPU, int, UDI);
3535ad49	174
d2c7a1a6 DE	175	SI (fixxfsi) (CGEN_FPU, int, XF);
	176	DI (fixxfdi) (CGEN_FPU, int, XF);
	177	USI (ufixxfsi) (CGEN_FPU, int, XF);
	178	UDI (ufixxfdi) (CGEN_FPU, int, XF);
3535ad49 JM	179
	180	/* TF mode support (kept separate 'cus not always present) */
	181
	182	TF (addtf) (CGEN_FPU, TF, TF);
	183	TF (subtf) (CGEN_FPU, TF, TF);
	184	TF (multf) (CGEN_FPU, TF, TF);
	185	TF (divtf) (CGEN_FPU, TF, TF);
07b95864	186	TF (remtf) (CGEN_FPU, TF, TF);
3535ad49 JM	187	TF (negtf) (CGEN_FPU, TF);
	188	TF (abstf) (CGEN_FPU, TF);
	189	TF (sqrttf) (CGEN_FPU, TF);
	190	TF (invtf) (CGEN_FPU, TF);
	191	TF (costf) (CGEN_FPU, TF);
	192	TF (sintf) (CGEN_FPU, TF);
	193	TF (mintf) (CGEN_FPU, TF, TF);
	194	TF (maxtf) (CGEN_FPU, TF, TF);
	195
	196	CGEN_FP_CMP (cmptf) (CGEN_FPU, TF, TF);
	197	int (eqtf) (CGEN_FPU, TF, TF);
	198	int (netf) (CGEN_FPU, TF, TF);
	199	int (lttf) (CGEN_FPU, TF, TF);
	200	int (letf) (CGEN_FPU, TF, TF);
	201	int (gttf) (CGEN_FPU, TF, TF);
	202	int (getf) (CGEN_FPU, TF, TF);
	203
d2c7a1a6 DE	204	TF (extsftf) (CGEN_FPU, int, SF);
	205	TF (extdftf) (CGEN_FPU, int, DF);
	206	SF (trunctfsf) (CGEN_FPU, int, TF);
	207	DF (trunctfdf) (CGEN_FPU, int, TF);
3535ad49	208
d2c7a1a6 DE	209	TF (floatsitf) (CGEN_FPU, int, SI);
	210	TF (floatditf) (CGEN_FPU, int, DI);
	211	TF (ufloatsitf) (CGEN_FPU, int, USI);
	212	TF (ufloatditf) (CGEN_FPU, int, UDI);
3535ad49	213
d2c7a1a6 DE	214	SI (fixtfsi) (CGEN_FPU, int, TF);
	215	DI (fixtfdi) (CGEN_FPU, int, TF);
	216	USI (ufixtfsi) (CGEN_FPU, int, TF);
	217	UDI (ufixtfdi) (CGEN_FPU, int, TF);
3535ad49 JM	218
	219	};
	220
	221	extern void cgen_init_accurate_fpu (SIM_CPU, CGEN_FPU, CGEN_FPU_ERROR_FN*);
	222
	223	BI cgen_sf_snan_p (CGEN_FPU*, SF);
	224	BI cgen_df_snan_p (CGEN_FPU*, DF);
	225
	226	/* no-op fp error handler */
	227	extern CGEN_FPU_ERROR_FN cgen_fpu_ignore_errors;
	228
	229	#endif /* CGEN_FPU_H */