Commit | Line | Data |
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c906108c | 1 | /* Simulator pseudo baseclass. |
836cc9f4 | 2 | |
618f726f | 3 | Copyright 1997-2016 Free Software Foundation, Inc. |
836cc9f4 | 4 | |
c906108c SS |
5 | Contributed by Cygnus Support. |
6 | ||
7 | This file is part of GDB, the GNU debugger. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
4744ac1b JB |
11 | the Free Software Foundation; either version 3 of the License, or |
12 | (at your option) any later version. | |
c906108c SS |
13 | |
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
4744ac1b JB |
19 | You should have received a copy of the GNU General Public License |
20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
c906108c SS |
21 | |
22 | ||
23 | /* Simulator state pseudo baseclass. | |
24 | ||
25 | Each simulator is required to have the file ``sim-main.h''. That | |
26 | file includes ``sim-basics.h'', defines the base type ``sim_cia'' | |
27 | (the data type that contains complete current instruction address | |
28 | information), include ``sim-base.h'': | |
29 | ||
30 | #include "sim-basics.h" | |
c906108c SS |
31 | /-* If `sim_cia' is not an integral value (e.g. a struct), define |
32 | CIA_ADDR to return the integral value. *-/ | |
7e83aa92 | 33 | /-* typedef struct {...} sim_cia; *-/ |
c906108c SS |
34 | /-* #define CIA_ADDR(cia) (...) *-/ |
35 | #include "sim-base.h" | |
028f6515 | 36 | |
c906108c SS |
37 | finally, two data types `struct _sim_cpu' and `struct sim_state' |
38 | are defined: | |
39 | ||
40 | struct _sim_cpu { | |
41 | ... simulator specific members ... | |
42 | sim_cpu_base base; | |
43 | }; | |
44 | ||
45 | struct sim_state { | |
294bcb78 | 46 | sim_cpu *cpu[MAX_NR_PROCESSORS]; |
c906108c SS |
47 | ... simulator specific members ... |
48 | sim_state_base base; | |
49 | }; | |
50 | ||
51 | Note that `base' appears last. This makes `base.magic' appear last | |
52 | in the entire struct and helps catch miscompilation errors. */ | |
53 | ||
54 | ||
55 | #ifndef SIM_BASE_H | |
56 | #define SIM_BASE_H | |
57 | ||
58 | /* Pre-declare certain types. */ | |
59 | ||
60 | /* typedef <target-dependant> sim_cia; */ | |
61 | #ifndef NULL_CIA | |
62 | #define NULL_CIA ((sim_cia) 0) | |
63 | #endif | |
64 | /* Return the current instruction address as a number. | |
65 | Some targets treat the current instruction address as a struct | |
66 | (e.g. for delay slot handling). */ | |
67 | #ifndef CIA_ADDR | |
68 | #define CIA_ADDR(cia) (cia) | |
7e83aa92 | 69 | typedef address_word sim_cia; |
c906108c SS |
70 | #endif |
71 | #ifndef INVALID_INSTRUCTION_ADDRESS | |
72 | #define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1) | |
73 | #endif | |
74 | ||
20bca71d MF |
75 | /* TODO: Probably should just delete SIM_CPU. */ |
76 | typedef struct _sim_cpu SIM_CPU; | |
c906108c SS |
77 | typedef struct _sim_cpu sim_cpu; |
78 | ||
79 | #include "sim-module.h" | |
80 | ||
81 | #include "sim-trace.h" | |
82 | #include "sim-core.h" | |
83 | #include "sim-events.h" | |
84 | #include "sim-profile.h" | |
c906108c | 85 | #include "sim-model.h" |
c906108c SS |
86 | #include "sim-io.h" |
87 | #include "sim-engine.h" | |
88 | #include "sim-watch.h" | |
89 | #include "sim-memopt.h" | |
c906108c SS |
90 | #include "sim-cpu.h" |
91 | ||
92 | /* Global pointer to current state while sim_resume is running. | |
93 | On a machine with lots of registers, it might be possible to reserve | |
94 | one of them for current_state. However on a machine with few registers | |
95 | current_state can't permanently live in one and indirecting through it | |
96 | will be slower [in which case one can have sim_resume set globals from | |
97 | current_state for faster access]. | |
98 | If CURRENT_STATE_REG is defined, it means current_state is living in | |
99 | a global register. */ | |
100 | ||
101 | ||
102 | #ifdef CURRENT_STATE_REG | |
103 | /* FIXME: wip */ | |
104 | #else | |
105 | extern struct sim_state *current_state; | |
106 | #endif | |
107 | ||
108 | ||
109 | /* The simulator may provide different (and faster) definition. */ | |
110 | #ifndef CURRENT_STATE | |
111 | #define CURRENT_STATE current_state | |
112 | #endif | |
113 | ||
114 | ||
78e9aa70 MF |
115 | /* We require all sims to dynamically allocate cpus. See comment up top about |
116 | struct sim_state. */ | |
117 | #if (WITH_SMP) | |
118 | # define STATE_CPU(sd, n) ((sd)->cpu[n]) | |
119 | #else | |
120 | # define STATE_CPU(sd, n) ((sd)->cpu[0]) | |
121 | #endif | |
122 | ||
123 | ||
c906108c SS |
124 | typedef struct { |
125 | ||
126 | /* Simulator's argv[0]. */ | |
127 | const char *my_name; | |
128 | #define STATE_MY_NAME(sd) ((sd)->base.my_name) | |
129 | ||
130 | /* Who opened the simulator. */ | |
131 | SIM_OPEN_KIND open_kind; | |
132 | #define STATE_OPEN_KIND(sd) ((sd)->base.open_kind) | |
133 | ||
134 | /* The host callbacks. */ | |
135 | struct host_callback_struct *callback; | |
136 | #define STATE_CALLBACK(sd) ((sd)->base.callback) | |
137 | ||
138 | /* The type of simulation environment (user/operating). */ | |
139 | enum sim_environment environment; | |
140 | #define STATE_ENVIRONMENT(sd) ((sd)->base.environment) | |
141 | ||
142 | #if 0 /* FIXME: Not ready yet. */ | |
143 | /* Stuff defined in sim-config.h. */ | |
144 | struct sim_config config; | |
145 | #define STATE_CONFIG(sd) ((sd)->base.config) | |
146 | #endif | |
147 | ||
148 | /* List of installed module `init' handlers. */ | |
149 | struct module_list *modules; | |
150 | #define STATE_MODULES(sd) ((sd)->base.modules) | |
151 | ||
152 | /* Supported options. */ | |
153 | struct option_list *options; | |
154 | #define STATE_OPTIONS(sd) ((sd)->base.options) | |
155 | ||
156 | /* Non-zero if -v specified. */ | |
157 | int verbose_p; | |
158 | #define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p) | |
159 | ||
160 | /* Non cpu-specific trace data. See sim-trace.h. */ | |
161 | TRACE_DATA trace_data; | |
162 | #define STATE_TRACE_DATA(sd) (& (sd)->base.trace_data) | |
163 | ||
164 | /* If non NULL, the BFD architecture specified on the command line */ | |
165 | const struct bfd_arch_info *architecture; | |
166 | #define STATE_ARCHITECTURE(sd) ((sd)->base.architecture) | |
167 | ||
168 | /* If non NULL, the bfd target specified on the command line */ | |
169 | const char *target; | |
170 | #define STATE_TARGET(sd) ((sd)->base.target) | |
171 | ||
172 | /* In standalone simulator, this is the program's arguments passed | |
173 | on the command line. */ | |
174 | char **prog_argv; | |
175 | #define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv) | |
176 | ||
177 | /* The program's bfd. */ | |
6b4a8935 | 178 | struct bfd *prog_bfd; |
c906108c SS |
179 | #define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd) |
180 | ||
181 | /* Symbol table for prog_bfd */ | |
fc0a2244 | 182 | struct bfd_symbol **prog_syms; |
c906108c SS |
183 | #define STATE_PROG_SYMS(sd) ((sd)->base.prog_syms) |
184 | ||
185 | /* The program's text section. */ | |
198beae2 | 186 | struct bfd_section *text_section; |
c906108c | 187 | /* Starting and ending text section addresses from the bfd. */ |
7e129781 | 188 | bfd_vma text_start, text_end; |
c906108c SS |
189 | #define STATE_TEXT_SECTION(sd) ((sd)->base.text_section) |
190 | #define STATE_TEXT_START(sd) ((sd)->base.text_start) | |
191 | #define STATE_TEXT_END(sd) ((sd)->base.text_end) | |
192 | ||
193 | /* Start address, set when the program is loaded from the bfd. */ | |
7e129781 | 194 | bfd_vma start_addr; |
c906108c SS |
195 | #define STATE_START_ADDR(sd) ((sd)->base.start_addr) |
196 | ||
197 | /* Size of the simulator's cache, if any. | |
198 | This is not the target's cache. It is the cache the simulator uses | |
199 | to process instructions. */ | |
200 | unsigned int scache_size; | |
201 | #define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size) | |
202 | ||
c906108c SS |
203 | /* core memory bus */ |
204 | #define STATE_CORE(sd) (&(sd)->base.core) | |
205 | sim_core core; | |
206 | ||
207 | /* Record of memory sections added via the memory-options interface. */ | |
208 | #define STATE_MEMOPT(sd) ((sd)->base.memopt) | |
209 | sim_memopt *memopt; | |
210 | ||
211 | /* event handler */ | |
212 | #define STATE_EVENTS(sd) (&(sd)->base.events) | |
213 | sim_events events; | |
214 | ||
215 | /* generic halt/resume engine */ | |
216 | sim_engine engine; | |
217 | #define STATE_ENGINE(sd) (&(sd)->base.engine) | |
218 | ||
219 | /* generic watchpoint support */ | |
220 | sim_watchpoints watchpoints; | |
221 | #define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints) | |
222 | ||
c906108c SS |
223 | #if WITH_HW |
224 | struct sim_hw *hw; | |
225 | #define STATE_HW(sd) ((sd)->base.hw) | |
226 | #endif | |
227 | ||
43e526b9 JM |
228 | /* Should image loads be performed using the LMA or VMA? Older |
229 | simulators use the VMA while newer simulators prefer the LMA. */ | |
230 | int load_at_lma_p; | |
231 | #define STATE_LOAD_AT_LMA_P(SD) ((SD)->base.load_at_lma_p) | |
232 | ||
c906108c SS |
233 | /* Marker for those wanting to do sanity checks. |
234 | This should remain the last member of this struct to help catch | |
235 | miscompilation errors. */ | |
236 | int magic; | |
237 | #define SIM_MAGIC_NUMBER 0x4242 | |
238 | #define STATE_MAGIC(sd) ((sd)->base.magic) | |
239 | } sim_state_base; | |
240 | ||
241 | /* Functions for allocating/freeing a sim_state. */ | |
bdca5ee4 TT |
242 | SIM_DESC sim_state_alloc (SIM_OPEN_KIND kind, host_callback *callback); |
243 | void sim_state_free (SIM_DESC); | |
c906108c SS |
244 | |
245 | #endif /* SIM_BASE_H */ |