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d6fea803 AC |
1 | /* This file is part of the program psim. |
2 | ||
3 | Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au> | |
4 | Copyright (C) 1997, Free Software Foundation, Inc. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | ||
20 | */ | |
21 | ||
22 | ||
23 | #ifndef _SIM_BITS_H_ | |
24 | #define _SIM_BITS_H_ | |
25 | ||
26 | ||
27 | /* bit manipulation routines: | |
28 | ||
29 | Bit numbering: The bits are numbered according to the target ISA's | |
30 | convention. That being controlled by WITH_TARGET_WORD_MSB. For | |
31 | the PowerPC (WITH_TARGET_WORD_MSB == 0) the numbering is 0..31 | |
32 | while for the MIPS (WITH_TARGET_WORD_MSB == 31) it is 31..0. | |
33 | ||
34 | Size convention: Each macro is in three forms - <MACRO>32 which | |
35 | operates in 32bit quantity (bits are numbered 0..31); <MACRO>64 | |
36 | which operates using 64bit quantites (and bits are numbered 0..63); | |
37 | and <MACRO> which operates using the bit size of the target | |
38 | architecture (bits are still numbered 0..63), with 32bit | |
39 | architectures ignoring the first 32bits leaving bit 32 as the most | |
40 | significant. | |
41 | ||
30efae3a AC |
42 | NB: Use EXTRACTED, MSEXTRACTED and LSEXTRACTED as a guideline for |
43 | naming. LSMASK and LSMASKED are wrong. | |
44 | ||
d6fea803 AC |
45 | BIT*(POS): Constant with just 1 bit set. |
46 | ||
47 | LSBIT*(OFFSET): Constant with just 1 bit set - LS bit is zero. | |
48 | ||
49 | MSBIT*(OFFSET): Constant with just 1 bit set - MS bit is zero. | |
50 | ||
51 | MASK*(FIRST, LAST): Constant with bits [FIRST .. LAST] set. The | |
52 | <MACRO> (no size) version permits FIRST >= LAST and generates a | |
53 | wrapped bit mask vis ([0..LAST] | [FIRST..LSB]). | |
54 | ||
75b3697d | 55 | LSMASK*(FIRST, LAST): Like MASK - LS bit is zero. |
d6fea803 | 56 | |
75b3697d | 57 | MSMASK*(FIRST, LAST): Like MASK - LS bit is zero. |
d6fea803 AC |
58 | |
59 | MASKED*(VALUE, FIRST, LAST): Masks out all but bits [FIRST | |
60 | .. LAST]. | |
61 | ||
75b3697d | 62 | LSMASKED*(VALUE, FIRST, LAST): Like MASKED - LS bit is zero. |
d6fea803 | 63 | |
75b3697d | 64 | MSMASKED*(VALUE, FIRST, LAST): Like MASKED - MS bit is zero. |
d6fea803 AC |
65 | |
66 | EXTRACTED*(VALUE, FIRST, LAST): Masks out bits [FIRST .. LAST] but | |
67 | also right shifts the masked value so that bit LAST becomes the | |
68 | least significant (right most). | |
69 | ||
30efae3a AC |
70 | LSEXTRACTED*(VALUE, FIRST, LAST): Same as extracted - LS bit is |
71 | zero. | |
72 | ||
73 | MSEXTRACTED*(VALUE, FIRST, LAST): Same as extracted - MS bit is | |
74 | zero. | |
75 | ||
d6fea803 AC |
76 | SHUFFLED**(VALUE, OLD, NEW): Mask then move a single bit from OLD |
77 | new NEW. | |
78 | ||
79 | MOVED**(VALUE, OLD_FIRST, OLD_LAST, NEW_FIRST, NEW_LAST): Moves | |
80 | things around so that bits OLD_FIRST..OLD_LAST are masked then | |
81 | moved to NEW_FIRST..NEW_LAST. | |
82 | ||
83 | INSERTED*(VALUE, FIRST, LAST): Takes VALUE and `inserts' the (LAST | |
84 | - FIRST + 1) least significant bits into bit positions [ FIRST | |
85 | .. LAST ]. This is almost the complement to EXTRACTED. | |
86 | ||
87 | IEA_MASKED(SHOULD_MASK, ADDR): Convert the address to the targets | |
88 | natural size. If in 32bit mode, discard the high 32bits. | |
89 | ||
75b3697d AC |
90 | EXTENDED*(VALUE): Convert the `*' bit value to the targets natural |
91 | word size. Sign extned the value if needed. | |
d6fea803 AC |
92 | |
93 | ALIGN_*(VALUE): Round upwards the value so that it is aligned. | |
94 | ||
95 | FLOOR_*(VALUE): Truncate the value so that it is aligned. | |
96 | ||
97 | ROTL*(VALUE, NR_BITS): Return the value rotated by NR_BITS left. | |
98 | ||
99 | ROTR*(VALUE, NR_BITS): Return the value rotated by NR_BITS right. | |
100 | ||
101 | SEXT*(VAL, SIGN_BIT): Treat SIGN_BIT as the sign, extend it. | |
102 | ||
103 | Note: Only the BIT* and MASK* macros return a constant that can be | |
104 | used in variable declarations. | |
105 | ||
106 | */ | |
107 | ||
108 | ||
109 | /* compute the number of bits between START and STOP */ | |
110 | ||
111 | #if (WITH_TARGET_WORD_MSB == 0) | |
112 | #define _MAKE_WIDTH(START, STOP) (STOP - START + 1) | |
113 | #else | |
114 | #define _MAKE_WIDTH(START, STOP) (START - STOP + 1) | |
115 | #endif | |
116 | ||
117 | ||
118 | ||
119 | /* compute the number shifts required to move a bit between LSB (MSB) | |
120 | and POS */ | |
121 | ||
122 | #if (WITH_TARGET_WORD_MSB == 0) | |
123 | #define _LSB_SHIFT(WIDTH, POS) (WIDTH - 1 - POS) | |
124 | #else | |
125 | #define _LSB_SHIFT(WIDTH, POS) (POS) | |
126 | #endif | |
127 | ||
128 | #if (WITH_TARGET_WORD_MSB == 0) | |
129 | #define _MSB_SHIFT(WIDTH, POS) (POS) | |
130 | #else | |
131 | #define _MSB_SHIFT(WIDTH, POS) (WIDTH - 1 - POS) | |
132 | #endif | |
133 | ||
134 | ||
135 | /* compute the absolute bit position given the OFFSET from the MSB(LSB) | |
136 | NB: _MAKE_xxx_POS (WIDTH, _MAKE_xxx_SHIFT (WIDTH, POS)) == POS */ | |
137 | ||
138 | #if (WITH_TARGET_WORD_MSB == 0) | |
139 | #define _MSB_POS(WIDTH, SHIFT) (SHIFT) | |
140 | #else | |
141 | #define _MSB_POS(WIDTH, SHIFT) (WIDTH - 1 - SHIFT) | |
142 | #endif | |
143 | ||
144 | #if (WITH_TARGET_WORD_MSB == 0) | |
145 | #define _LSB_POS(WIDTH, SHIFT) (WIDTH - 1 - SHIFT) | |
146 | #else | |
147 | #define _LSB_POS(WIDTH, SHIFT) (SHIFT) | |
148 | #endif | |
149 | ||
150 | ||
151 | /* convert a 64 bit position into a corresponding 32bit position. MSB | |
152 | pos handles the posibility that the bit lies beyond the 32bit | |
153 | boundary */ | |
154 | ||
155 | #if (WITH_TARGET_WORD_MSB == 0) | |
156 | #define _MSB_32(START, STOP) (START <= STOP \ | |
157 | ? (START < 32 ? 0 : START - 32) \ | |
158 | : (STOP < 32 ? 0 : STOP - 32)) | |
159 | #else | |
160 | #define _MSB_32(START, STOP) (START >= STOP \ | |
161 | ? (START >= 32 ? 31 : START) \ | |
162 | : (STOP >= 32 ? 31 : STOP)) | |
163 | #endif | |
164 | ||
165 | #if (WITH_TARGET_WORD_MSB == 0) | |
166 | #define _LSB_32(START, STOP) (START <= STOP \ | |
167 | ? (STOP < 32 ? 0 : STOP - 32) \ | |
168 | : (START < 32 ? 0 : START - 32)) | |
169 | #else | |
170 | #define _LSB_32(START, STOP) (START >= STOP \ | |
171 | ? (STOP >= 32 ? 31 : STOP) \ | |
172 | : (START >= 32 ? 31 : START)) | |
173 | #endif | |
174 | ||
175 | #if (WITH_TARGET_WORD_MSB == 0) | |
176 | #define _MSB(START, STOP) (START <= STOP ? START : STOP) | |
177 | #else | |
178 | #define _MSB(START, STOP) (START >= STOP ? START : STOP) | |
179 | #endif | |
180 | ||
181 | #if (WITH_TARGET_WORD_MSB == 0) | |
182 | #define _LSB(START, STOP) (START <= STOP ? STOP : START) | |
183 | #else | |
184 | #define _LSB(START, STOP) (START >= STOP ? STOP : START) | |
185 | #endif | |
186 | ||
187 | ||
75b3697d AC |
188 | /* LS/MS Bit operations */ |
189 | ||
190 | #define LSBIT8(POS) ((unsigned8)1 << (POS)) | |
191 | #define LSBIT16(POS) ((unsigned16)1 << (POS)) | |
192 | #define LSBIT32(POS) ((unsigned32)1 << (POS)) | |
193 | #define LSBIT64(POS) ((unsigned64)1 << (POS)) | |
194 | #define LSBIT(POS) ((unsigned_word)1 << (POS)) | |
195 | ||
196 | #define MSBIT8(POS) ((unsigned8)1 << (8 - 1 - (POS))) | |
197 | #define MSBIT16(POS) ((unsigned16)1 << (16 - 1 - (POS))) | |
198 | #define MSBIT32(POS) ((unsigned32)1 << (32 - 1 - (POS))) | |
199 | #define MSBIT64(POS) ((unsigned64)1 << (64 - 1 - (POS))) | |
200 | #define MSBIT(POS) ((unsigned_word)1 << (WITH_TARGET_WORD_BITSIZE - 1 - (POS))) | |
201 | ||
202 | ||
d6fea803 AC |
203 | /* Bit operations */ |
204 | ||
205 | #define _BITn(WIDTH, POS) ((natural##WIDTH)1 \ | |
206 | << _LSB_SHIFT (WIDTH, POS)) | |
207 | ||
208 | #define BIT4(POS) (1 << _LSB_SHIFT (4, (POS))) | |
209 | #define BIT5(POS) (1 << _LSB_SHIFT (5, (POS))) | |
210 | #define BIT8(POS) (1 << _LSB_SHIFT (8, (POS))) | |
211 | #define BIT10(POS) (1 << _LSB_SHIFT (10, (POS))) | |
212 | #define BIT16(POS) _BITn (16, (POS)) | |
213 | #define BIT32(POS) _BITn (32, (POS)) | |
214 | #define BIT64(POS) _BITn (64, (POS)) | |
215 | ||
216 | #if (WITH_TARGET_WORD_BITSIZE == 64) | |
217 | #define BIT(POS) BIT64(POS) | |
218 | #endif | |
219 | #if (WITH_TARGET_WORD_BITSIZE == 32) | |
220 | #if (WITH_TARGET_WORD_MSB == 0) | |
221 | #define BIT(POS) ((POS) < 32 \ | |
222 | ? 0 \ | |
223 | : (1 << ((POS) < 32 ? 0 : _LSB_SHIFT(64, (POS))))) | |
224 | #else | |
225 | #define BIT(POS) ((POS) >= 32 \ | |
226 | ? 0 \ | |
227 | : (1 << ((POS) >= 32 ? 0 : (POS)))) | |
228 | #endif | |
229 | #endif | |
230 | #if !defined (BIT) | |
231 | #error "BIT never defined" | |
232 | #endif | |
233 | ||
234 | ||
d6fea803 AC |
235 | /* multi bit mask */ |
236 | ||
237 | /* 111111 -> mmll11 -> mm11ll */ | |
238 | #define _MASKn(WIDTH, START, STOP) (((unsigned##WIDTH)(-1) \ | |
239 | >> (_MSB_SHIFT (WIDTH, START) \ | |
240 | + _LSB_SHIFT (WIDTH, STOP))) \ | |
241 | << _LSB_SHIFT (WIDTH, STOP)) | |
242 | ||
d6fea803 AC |
243 | #if (WITH_TARGET_WORD_MSB == 0) |
244 | #define _POS_LE(START, STOP) (START <= STOP) | |
245 | #else | |
246 | #define _POS_LE(START, STOP) (STOP <= START) | |
247 | #endif | |
248 | ||
249 | #if (WITH_TARGET_WORD_BITSIZE == 64) | |
250 | #define MASK(START, STOP) \ | |
251 | (_POS_LE ((START), (STOP)) \ | |
252 | ? _MASKn(64, \ | |
253 | _MSB ((START), (STOP)), \ | |
254 | _LSB ((START), (STOP)) ) \ | |
255 | : (_MASKn(64, _MSB_POS (64, 0), (STOP)) \ | |
256 | | _MASKn(64, (START), _LSB_POS (64, 0)))) | |
257 | #endif | |
258 | #if (WITH_TARGET_WORD_BITSIZE == 32) | |
259 | #define MASK(START, STOP) \ | |
260 | (_POS_LE ((START), (STOP)) \ | |
261 | ? (_POS_LE ((STOP), _MSB_POS (64, 31)) \ | |
262 | ? 0 \ | |
263 | : _MASKn (32, \ | |
264 | _MSB_32 ((START), (STOP)), \ | |
265 | _LSB_32 ((START), (STOP)))) \ | |
266 | : (_MASKn (32, \ | |
267 | _LSB_32 ((START), (STOP)), \ | |
268 | _LSB_POS (32, 0)) \ | |
269 | | (_POS_LE ((STOP), _MSB_POS (64, 31)) \ | |
270 | ? 0 \ | |
271 | : _MASKn (32, \ | |
272 | _MSB_POS (32, 0), \ | |
273 | _MSB_32 ((START), (STOP)))))) | |
274 | #endif | |
275 | #if !defined (MASK) | |
276 | #error "MASK never undefined" | |
277 | #endif | |
278 | ||
279 | ||
d6fea803 AC |
280 | /* Multi-bit mask on least significant bits */ |
281 | ||
75b3697d AC |
282 | #define _LSMASKn(WIDTH, FIRST, LAST) _MASKn (WIDTH, \ |
283 | _LSB_POS (WIDTH, FIRST), \ | |
284 | _LSB_POS (WIDTH, LAST)) | |
d6fea803 | 285 | |
75b3697d AC |
286 | #define LSMASK16(FIRST, LAST) _LSMASKn (16, (FIRST), (LAST)) |
287 | #define LSMASK32(FIRST, LAST) _LSMASKn (32, (FIRST), (LAST)) | |
288 | #define LSMASK64(FIRST, LAST) _LSMASKn (64, (FIRST), (LAST)) | |
d6fea803 | 289 | |
75b3697d | 290 | #define LSMASK(FIRST, LAST) (MASK (_LSB_POS (64, FIRST), _LSB_POS (64, LAST))) |
d6fea803 AC |
291 | |
292 | ||
293 | /* Multi-bit mask on most significant bits */ | |
294 | ||
75b3697d AC |
295 | #define _MSMASKn(WIDTH, FIRST, LAST) _MASKn (WIDTH, \ |
296 | _MSB_POS (WIDTH, FIRST), \ | |
297 | _MSB_POS (WIDTH, LAST)) | |
d6fea803 | 298 | |
75b3697d AC |
299 | #define MSMASK16(FIRST, LAST) _MSMASKn (16, (FIRST), (LAST)) |
300 | #define MSMASK32(FIRST, LAST) _MSMASKn (32, (FIRST), (LAST)) | |
301 | #define MSMASK64(FIRST, LAST) _MSMASKn (64, (FIRST), (LAST)) | |
d6fea803 | 302 | |
75b3697d | 303 | #define MSMASK(FIRST, LAST) (MASK (_MSB_POS (64, FIRST), _MSB_POS (64, LAST))) |
d6fea803 | 304 | |
d6fea803 | 305 | |
d6fea803 | 306 | |
75b3697d AC |
307 | #if (WITH_TARGET_WORD_MSB == 0) |
308 | #define MASK16 MSMASK16 | |
309 | #define MASK32 MSMASK32 | |
310 | #define MASK64 MSMASK64 | |
311 | #else | |
312 | #define MASK16 LSMASK16 | |
313 | #define MASK32 LSMASK32 | |
314 | #define MASK64 LSMASK64 | |
315 | #endif | |
d6fea803 AC |
316 | |
317 | ||
d6fea803 | 318 | |
75b3697d | 319 | /* mask the required bits, leaving them in place */ |
d6fea803 | 320 | |
75b3697d AC |
321 | INLINE_SIM_BITS(unsigned16) LSMASKED16 (unsigned16 word, int first, int last); |
322 | INLINE_SIM_BITS(unsigned32) LSMASKED32 (unsigned32 word, int first, int last); | |
323 | INLINE_SIM_BITS(unsigned64) LSMASKED64 (unsigned64 word, int first, int last); | |
d6fea803 | 324 | |
75b3697d | 325 | INLINE_SIM_BITS(unsigned_word) LSMASKED (unsigned_word word, int first, int last); |
d6fea803 | 326 | |
75b3697d AC |
327 | INLINE_SIM_BITS(unsigned16) MSMASKED16 (unsigned16 word, int first, int last); |
328 | INLINE_SIM_BITS(unsigned32) MSMASKED32 (unsigned32 word, int first, int last); | |
329 | INLINE_SIM_BITS(unsigned64) MSMASKED64 (unsigned64 word, int first, int last); | |
d6fea803 | 330 | |
75b3697d | 331 | INLINE_SIM_BITS(unsigned_word) MSMASKED (unsigned_word word, int first, int last); |
d6fea803 | 332 | |
75b3697d AC |
333 | #if (WITH_TARGET_WORD_MSB == 0) |
334 | #define MASKED16 MSMASKED16 | |
335 | #define MASKED32 MSMASKED32 | |
336 | #define MASKED64 MSMASKED64 | |
337 | #define MASKED MSMASKED | |
338 | #else | |
339 | #define MASKED16 LSMASKED16 | |
340 | #define MASKED32 LSMASKED32 | |
341 | #define MASKED64 LSMASKED64 | |
342 | #define MASKED LSMASKED | |
343 | #endif | |
d6fea803 AC |
344 | |
345 | ||
346 | ||
347 | /* extract the required bits aligning them with the lsb */ | |
348 | ||
75b3697d AC |
349 | INLINE_SIM_BITS(unsigned16) LSEXTRACTED16 (unsigned16 val, int start, int stop); |
350 | INLINE_SIM_BITS(unsigned32) LSEXTRACTED32 (unsigned32 val, int start, int stop); | |
351 | INLINE_SIM_BITS(unsigned64) LSEXTRACTED64 (unsigned64 val, int start, int stop); | |
352 | ||
353 | INLINE_SIM_BITS(unsigned_word) LSEXTRACTED (unsigned_word val, int start, int stop); | |
30efae3a | 354 | |
75b3697d AC |
355 | INLINE_SIM_BITS(unsigned16) MSEXTRACTED16 (unsigned16 val, int start, int stop); |
356 | INLINE_SIM_BITS(unsigned32) MSEXTRACTED32 (unsigned32 val, int start, int stop); | |
357 | INLINE_SIM_BITS(unsigned64) MSEXTRACTED64 (unsigned64 val, int start, int stop); | |
358 | ||
359 | INLINE_SIM_BITS(unsigned_word) MSEXTRACTED (unsigned_word val, int start, int stop); | |
30efae3a AC |
360 | |
361 | #if (WITH_TARGET_WORD_MSB == 0) | |
75b3697d | 362 | #define EXTRACTED16 MSEXTRACTED16 |
30efae3a | 363 | #define EXTRACTED32 MSEXTRACTED32 |
75b3697d AC |
364 | #define EXTRACTED64 MSEXTRACTED64 |
365 | #define EXTRACTED MSEXTRACTED | |
30efae3a | 366 | #else |
75b3697d | 367 | #define EXTRACTED16 LSEXTRACTED16 |
30efae3a | 368 | #define EXTRACTED32 LSEXTRACTED32 |
75b3697d AC |
369 | #define EXTRACTED64 LSEXTRACTED64 |
370 | #define EXTRACTED LSEXTRACTED | |
30efae3a AC |
371 | #endif |
372 | ||
373 | ||
374 | ||
d6fea803 AC |
375 | /* move a single bit around */ |
376 | /* NB: the wierdness (N>O?N-O:0) is to stop a warning from GCC */ | |
377 | #define _SHUFFLEDn(N, WORD, OLD, NEW) \ | |
378 | ((OLD) < (NEW) \ | |
379 | ? (((unsigned##N)(WORD) \ | |
380 | >> (((NEW) > (OLD)) ? ((NEW) - (OLD)) : 0)) \ | |
381 | & MASK32((NEW), (NEW))) \ | |
382 | : (((unsigned##N)(WORD) \ | |
383 | << (((OLD) > (NEW)) ? ((OLD) - (NEW)) : 0)) \ | |
384 | & MASK32((NEW), (NEW)))) | |
385 | ||
386 | #define SHUFFLED32(WORD, OLD, NEW) _SHUFFLEDn (32, WORD, OLD, NEW) | |
387 | #define SHUFFLED64(WORD, OLD, NEW) _SHUFFLEDn (64, WORD, OLD, NEW) | |
388 | ||
389 | #define SHUFFLED(WORD, OLD, NEW) _SHUFFLEDn (_word, WORD, OLD, NEW) | |
390 | ||
391 | ||
392 | /* move a group of bits around */ | |
393 | ||
75b3697d AC |
394 | INLINE_SIM_BITS(unsigned16) INSERTED16 (unsigned16 val, int start, int stop); |
395 | INLINE_SIM_BITS(unsigned32) INSERTED32 (unsigned32 val, int start, int stop); | |
396 | INLINE_SIM_BITS(unsigned64) INSERTED64 (unsigned64 val, int start, int stop); | |
397 | ||
398 | INLINE_SIM_BITS(unsigned_word) INSERTED (unsigned_word val, int start, int stop); | |
399 | ||
d6fea803 | 400 | |
d6fea803 | 401 | |
75b3697d | 402 | /* Sign extend the quantity to the targets natural word size */ |
d6fea803 | 403 | |
75b3697d AC |
404 | #define EXTEND8(X) ((signed_word)(signed8)(X)) |
405 | #define EXTEND16(X) ((signed_word)(signed16)(X)) | |
406 | #define EXTEND32(X) ((signed_word)(signed32)(X)) | |
407 | #define EXTEND64(X) ((signed_word)(signed64)(X)) | |
d6fea803 AC |
408 | |
409 | /* depending on MODE return a 64bit or 32bit (sign extended) value */ | |
410 | #if (WITH_TARGET_WORD_BITSIZE == 64) | |
411 | #define EXTENDED(X) ((signed64)(signed32)(X)) | |
412 | #endif | |
413 | #if (WITH_TARGET_WORD_BITSIZE == 32) | |
414 | #define EXTENDED(X) (X) | |
415 | #endif | |
416 | ||
417 | ||
418 | /* memory alignment macro's */ | |
419 | #define _ALIGNa(A,X) (((X) + ((A) - 1)) & ~((A) - 1)) | |
420 | #define _FLOORa(A,X) ((X) & ~((A) - 1)) | |
421 | ||
422 | #define ALIGN_8(X) _ALIGNa (8, X) | |
423 | #define ALIGN_16(X) _ALIGNa (16, X) | |
424 | ||
425 | #define ALIGN_PAGE(X) _ALIGNa (0x1000, X) | |
426 | #define FLOOR_PAGE(X) ((X) & ~(0x1000 - 1)) | |
427 | ||
428 | ||
429 | /* bit bliting macro's */ | |
430 | #define BLIT32(V, POS, BIT) \ | |
431 | do { \ | |
432 | if (BIT) \ | |
433 | V |= BIT32 (POS); \ | |
434 | else \ | |
435 | V &= ~BIT32 (POS); \ | |
436 | } while (0) | |
437 | #define MBLIT32(V, LO, HI, VAL) \ | |
438 | do { \ | |
439 | (V) = (((V) & ~MASK32 ((LO), (HI))) \ | |
440 | | INSERTED32 (VAL, LO, HI)); \ | |
441 | } while (0) | |
442 | ||
443 | ||
444 | ||
445 | /* some rotate functions. The generic macro's ROT, ROTL, ROTR are | |
446 | intentionally omited. */ | |
447 | ||
448 | ||
449 | INLINE_SIM_BITS(unsigned16) ROT16 (unsigned16 val, int shift); | |
450 | INLINE_SIM_BITS(unsigned32) ROT32 (unsigned32 val, int shift); | |
451 | INLINE_SIM_BITS(unsigned64) ROT64 (unsigned64 val, int shift); | |
452 | ||
453 | ||
75b3697d AC |
454 | INLINE_SIM_BITS(unsigned16) ROTL16 (unsigned16 val, int shift); |
455 | INLINE_SIM_BITS(unsigned32) ROTL32 (unsigned32 val, int shift); | |
456 | INLINE_SIM_BITS(unsigned64) ROTL64 (unsigned64 val, int shift); | |
d6fea803 AC |
457 | |
458 | ||
75b3697d AC |
459 | INLINE_SIM_BITS(unsigned16) ROTR16 (unsigned16 val, int shift); |
460 | INLINE_SIM_BITS(unsigned32) ROTR32 (unsigned32 val, int shift); | |
461 | INLINE_SIM_BITS(unsigned64) ROTR64 (unsigned64 val, int shift); | |
d6fea803 AC |
462 | |
463 | ||
464 | ||
465 | /* Sign extension operations */ | |
466 | ||
75b3697d AC |
467 | INLINE_SIM_BITS(unsigned16) SEXT16 (signed16 val, int sign_bit); |
468 | INLINE_SIM_BITS(unsigned32) SEXT32 (signed32 val, int sign_bit); | |
469 | INLINE_SIM_BITS(unsigned64) SEXT64 (signed64 val, int sign_bit); | |
d6fea803 | 470 | |
75b3697d | 471 | INLINE_SIM_BITS(unsigned_word) SEXT (signed_word val, int sign_bit); |
d6fea803 AC |
472 | |
473 | ||
474 | ||
475 | #if ((SIM_BITS_INLINE & INCLUDE_MODULE) && (SIM_BITS_INLINE & INCLUDED_BY_MODULE)) | |
476 | #include "sim-bits.c" | |
477 | #endif | |
478 | ||
479 | #endif /* _SIM_BITS_H_ */ |