Update copyright year range in all GDB files.
[deliverable/binutils-gdb.git] / sim / cr16 / gencode.c
CommitLineData
fee8ec00 1/* Simulation code for the CR16 processor.
b811d2c2 2 Copyright (C) 2008-2020 Free Software Foundation, Inc.
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3 Contributed by M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com>
4
5 This file is part of GDB, the GNU debugger.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
dc3cf14f 9 the Free Software Foundation; either version 3, or (at your option)
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10 any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
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17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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19
20
21#include "config.h"
22#include <stdio.h>
23#include <ctype.h>
24#include <limits.h>
5aedb83b 25#include <string.h>
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26#include "ansidecl.h"
27#include "opcode/cr16.h"
28
bdca5ee4
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29static void write_header (void);
30static void write_opcodes (void);
31static void write_template (void);
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32
33int
948b4ede 34main (int argc, char *argv[])
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35{
36 if ((argc > 1) && (strcmp (argv[1],"-h") == 0))
37 write_header();
38 else if ((argc > 1) && (strcmp (argv[1],"-t") == 0))
39 write_template ();
40 else
41 write_opcodes();
42 return 0;
43}
44
45
46static void
5aedb83b 47write_header (void)
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48{
49 int i = 0;
50
51 /* Start searching from end of instruction table. */
52 const inst *instruction = &cr16_instruction[NUMOPCODES - 1];
53
54 /* Loop over instruction table until a full match is found. */
55 for ( ; i < NUMOPCODES; i++)
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56 printf("void OP_%lX_%X (SIM_DESC, SIM_CPU *);\t\t/* %s */\n",
57 cr16_instruction[i].match, (32 - cr16_instruction[i].match_bits),
58 cr16_instruction[i].mnemonic);
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59}
60
61
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62/* write_template creates a file all required functions,
63 ready to be filled out. */
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64
65static void
5aedb83b 66write_template (void)
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67{
68 int i = 0,j, k, flags;
69
267b3b8e 70 printf ("#include \"sim-main.h\"\n");
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71 printf ("#include \"simops.h\"\n\n");
72
73 for ( ; i < NUMOPCODES; i++)
74 {
75 if (cr16_instruction[i].size != 0)
948b4ede 76{
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77 printf ("/* %s */\nvoid\nOP_%lX_%X (SIM_DESC sd, SIM_CPU *cpu)\n{\n",
78 cr16_instruction[i].mnemonic, cr16_instruction[i].match,
79 (32 - cr16_instruction[i].match_bits));
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80
81 /* count operands. */
82 j = 0;
83 for (k=0;k<5;k++)
84 {
85 if (cr16_instruction[i].operands[k].op_type == dummy)
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86 break;
87 else
88 j++;
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89 }
90 switch (j)
91 {
92 case 0:
93 printf ("printf(\" %s\\n\");\n",cr16_instruction[i].mnemonic);
94 break;
95 case 1:
96 printf ("printf(\" %s\\t%%x\\n\",OP[0]);\n",cr16_instruction[i].mnemonic);
97 break;
98 case 2:
99 printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",cr16_instruction[i].mnemonic);
100 break;
101 case 3:
102 printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",cr16_instruction[i].mnemonic);
103 break;
104 default:
105 fprintf (stderr,"Too many operands: %d\n",j);
106 }
107 printf ("}\n\n");
108}
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109 }
110}
111
112
113long Opcodes[512];
114static int curop=0;
115
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116#if 0
117static void
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118check_opcodes( long op)
119{
120 int i;
121
122 for (i=0;i<curop;i++)
123 if (Opcodes[i] == op)
5aedb83b 124 fprintf(stderr,"DUPLICATE OPCODES: %lx\n", op);
fee8ec00 125}
5aedb83b 126#endif
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127
128static void
5aedb83b 129write_opcodes (void)
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130{
131 int i = 0, j = 0, k;
132
948b4ede 133 /* write out opcode table. */
267b3b8e 134 printf ("#include \"sim-main.h\"\n");
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135 printf ("#include \"simops.h\"\n\n");
136 printf ("struct simops Simops[] = {\n");
137
948b4ede 138 for (i = NUMOPCODES-1; i >= 0; --i)
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139 {
140 if (cr16_instruction[i].size != 0)
948b4ede 141{
5aedb83b 142 printf (" { \"%s\", %u, %d, %ld, %u, \"OP_%lX_%X\", OP_%lX_%X, ",
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143 cr16_instruction[i].mnemonic, cr16_instruction[i].size,
144 cr16_instruction[i].match_bits, cr16_instruction[i].match,
145 cr16_instruction[i].flags, ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)),
948b4ede 146 (32 - cr16_instruction[i].match_bits),
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147 ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)), (32 - cr16_instruction[i].match_bits));
148
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149 j = 0;
150 for (k=0;k<5;k++)
151 {
152 if (cr16_instruction[i].operands[k].op_type == dummy)
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153 break;
154 else
155 j++;
fee8ec00 156 }
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157 printf ("%d, ",j);
158
159 j = 0;
160 for (k=0;k<4;k++)
161 {
162 int optype = cr16_instruction[i].operands[k].op_type;
163 int shift = cr16_instruction[i].operands[k].shift;
164 if (j == 0)
165 printf ("{");
166 else
167 printf (", ");
168 printf ("{");
169 printf ("%d,%d",optype, shift);
170 printf ("}");
171 j = 1;
172 }
173 if (j)
174 printf ("}");
175 printf ("},\n");
176 }
177 }
5aedb83b 178 printf (" { \"NULL\",1,8,0,0,\"OP_0_20\",OP_0_20,0,{{0,0},{0,0},{0,0},{0,0}}},\n};\n");
fee8ec00 179}
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