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f6bcefef HPN |
1 | # Makefile template for Configure for the CRIS simulator, based on a mix |
2 | # of the ones for m32r and i960. | |
3 | # | |
4 | # Copyright (C) 2004, 2005 Free Software Foundation, Inc. | |
5 | # Contributed by Axis Communications. | |
6 | # | |
7 | # This program is free software; you can redistribute it and/or modify | |
8 | # it under the terms of the GNU General Public License as published by | |
9 | # the Free Software Foundation; either version 2 of the License, or | |
10 | # (at your option) any later version. | |
11 | # | |
12 | # This program is distributed in the hope that it will be useful, | |
13 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | # GNU General Public License for more details. | |
16 | # | |
17 | # You should have received a copy of the GNU General Public License along | |
18 | # with this program; if not, write to the Free Software Foundation, Inc., | |
19 | # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
20 | ||
21 | ## COMMON_PRE_CONFIG_FRAG | |
22 | ||
23 | CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o semcrisv10f-switch.o modelv10.o mloopv10f.o | |
24 | CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o semcrisv32f-switch.o modelv32.o mloopv32f.o | |
25 | ||
26 | CONFIG_DEVICES = dv-sockser.o | |
27 | CONFIG_DEVICES = | |
28 | ||
29 | SIM_OBJS = \ | |
30 | $(SIM_NEW_COMMON_OBJS) \ | |
31 | sim-cpu.o \ | |
32 | sim-hload.o \ | |
33 | sim-hrw.o \ | |
34 | sim-model.o \ | |
35 | sim-reg.o \ | |
36 | cgen-utils.o cgen-trace.o cgen-scache.o \ | |
37 | cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ | |
38 | sim-if.o arch.o \ | |
39 | $(CRISV10F_OBJS) \ | |
40 | $(CRISV32F_OBJS) \ | |
41 | traps.o devices.o \ | |
42 | $(CONFIG_DEVICES) \ | |
43 | cris-desc.o | |
44 | ||
45 | # Extra headers included by sim-main.h. | |
46 | # FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS. | |
47 | SIM_EXTRA_DEPS = \ | |
48 | $(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \ | |
49 | arch.h cpuall.h cris-sim.h cris-desc.h | |
50 | ||
51 | SIM_RUN_OBJS = nrun.o | |
52 | SIM_EXTRA_CLEAN = cris-clean | |
53 | ||
54 | # This selects the cris newlib/libgloss syscall definitions. | |
55 | NL_TARGET = -DNL_TARGET_cris | |
56 | ||
57 | ## COMMON_POST_CONFIG_FRAG | |
58 | ||
59 | CGEN_CPU_DIR = $(CGENDIR)/../cpu | |
60 | ||
61 | arch = cris | |
62 | ||
63 | sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(sim-core_h) $(sim-options_h) | |
64 | ||
65 | arch.o: arch.c $(SIM_MAIN_DEPS) | |
66 | ||
67 | traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) $(sim-options_h) | |
68 | devices.o: devices.c $(SIM_MAIN_DEPS) | |
69 | ||
70 | # CRISV10 objs | |
71 | ||
72 | CRISV10F_INCLUDE_DEPS = \ | |
73 | $(CGEN_MAIN_CPU_DEPS) \ | |
74 | cpuv10.h decodev10.h engv10.h | |
75 | ||
76 | crisv10f.o: crisv10f.c cris-tmpl.c $(CRISV10F_INCLUDE_DEPS) | |
77 | ||
78 | # FIXME: What is mono and what does "Use of `mono' is wip" mean (other | |
79 | # than the apparent; some "mono" feature is work in progress)? | |
80 | mloopv10f.c engv10.h: stamp-v10fmloop | |
81 | stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile | |
82 | $(SHELL) $(srccom)/genmloop.sh \ | |
83 | -mono -no-fast -pbb -switch semcrisv10f-switch.c \ | |
84 | -cpu crisv10f -infile $(srcdir)/mloop.in | |
85 | $(SHELL) $(srcroot)/move-if-change eng.hin engv10.h | |
86 | $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c | |
87 | touch stamp-v10fmloop | |
88 | mloopv10f.o: mloopv10f.c semcrisv10f-switch.c $(CRISV10F_INCLUDE_DEPS) | |
89 | ||
90 | cpuv10.o: cpuv10.c $(CRISV10F_INCLUDE_DEPS) | |
91 | decodev10.o: decodev10.c $(CRISV10F_INCLUDE_DEPS) | |
92 | semcrisv10f-switch.o: semcrisv10f-switch.c $(CRISV10F_INCLUDE_DEPS) | |
93 | modelv10.o: modelv10.c $(CRISV10F_INCLUDE_DEPS) | |
94 | ||
95 | # CRISV32 objs | |
96 | ||
97 | CRISV32F_INCLUDE_DEPS = \ | |
98 | $(CGEN_MAIN_CPU_DEPS) \ | |
99 | cpuv32.h decodev32.h engv32.h | |
100 | ||
101 | crisv32f.o: crisv32f.c cris-tmpl.c $(CRISV32F_INCLUDE_DEPS) | |
102 | ||
103 | # FIXME: What is mono and what does "Use of `mono' is wip" mean (other | |
104 | # than the apparent; some "mono" feature is work in progress)? | |
105 | mloopv32f.c engv32.h: stamp-v32fmloop | |
106 | stamp-v32fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile | |
107 | $(SHELL) $(srccom)/genmloop.sh \ | |
108 | -mono -no-fast -pbb -switch semcrisv32f-switch.c \ | |
109 | -cpu crisv32f -infile $(srcdir)/mloop.in | |
110 | $(SHELL) $(srcroot)/move-if-change eng.hin engv32.h | |
111 | $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c | |
112 | touch stamp-v32fmloop | |
113 | mloopv32f.o: mloopv32f.c semcrisv32f-switch.c $(CRISV32F_INCLUDE_DEPS) | |
114 | ||
115 | cpuv32.o: cpuv32.c $(CRISV32F_INCLUDE_DEPS) | |
116 | decodev32.o: decodev32.c $(CRISV32F_INCLUDE_DEPS) | |
117 | semcrisv32f-switch.o: semcrisv32f-switch.c $(CRISV32F_INCLUDE_DEPS) | |
118 | modelv32.o: modelv32.c $(CRISV32F_INCLUDE_DEPS) | |
119 | ||
120 | cris-clean: | |
121 | for v in 10 32; do \ | |
122 | rm -f mloopv$${v}f.c engv$${v}.h stamp-v$${v}fmloop; \ | |
123 | rm -f stamp-v$${v}fcpu; \ | |
124 | done | |
125 | -rm -f stamp-arch stamp-desc | |
126 | -rm -f tmp-* | |
127 | ||
128 | # cgen support, enable with --enable-cgen-maint | |
129 | CGEN_MAINT = ; @true | |
130 | # The following line is commented in or out depending upon --enable-cgen-maint. | |
131 | @CGEN_MAINT@CGEN_MAINT = | |
132 | ||
133 | # Useful when making CGEN-generated files manually, without --enable-cgen-maint. | |
134 | stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc | |
135 | ||
136 | stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile | |
137 | $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \ | |
138 | archfile=$(CGEN_CPU_DIR)/cris.cpu \ | |
139 | FLAGS="with-scache with-profile=fn" | |
140 | touch stamp-arch | |
141 | arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch | |
142 | ||
143 | stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile | |
144 | $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ | |
145 | archfile=$(CGEN_CPU_DIR)/cris.cpu \ | |
146 | cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)" | |
147 | $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c | |
148 | touch stamp-v10fcpu | |
149 | cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu | |
150 | ||
151 | stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile | |
152 | $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ | |
153 | archfile=$(CGEN_CPU_DIR)/cris.cpu \ | |
154 | cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)" | |
155 | $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c | |
156 | touch stamp-v32fcpu | |
157 | cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu | |
158 | ||
159 | stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile | |
160 | $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \ | |
161 | archfile=$(CGEN_CPU_DIR)/cris.cpu \ | |
162 | cpu=cris mach=all | |
163 | touch stamp-desc | |
164 | cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc |