Commit | Line | Data |
---|---|---|
0dbdd753 NC |
1 | 2000-07-05 Nick Clifton <nickc@cygnus.com> |
2 | ||
3 | * d30v-insns: Change minimum loop size limit to 0x10. | |
4 | ||
eb2d80b4 AC |
5 | Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> |
6 | ||
7 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
8 | ||
f23b768a NC |
9 | 2000-04-12 Frank Ch. Eigler <fche@redhat.com> |
10 | ||
11 | * cpu.h (GPR_CLEAR): New macro. | |
12 | (GPR_SET): Removed macro. | |
13 | ||
d4f3574e SS |
14 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
15 | ||
16 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
17 | ||
18 | Wed Sep 1 11:38:21 1999 Andrew Cagney <cagney@b1.cygnus.com> | |
19 | ||
20 | * d30v-insns: Cast CIA to LONG in printfs. | |
21 | ||
22 | Tue Aug 31 01:32:22 1999 Andrew Cagney <cagney@b1.cygnus.com> | |
23 | ||
24 | * cpu.h (unqueue_writes): Add declaration. | |
25 | ||
ac9a91a7 JM |
26 | 1999-05-27 Michael Meissner <meissner@cygnus.com> |
27 | ||
28 | * d30v-insns (do_repeat): Print a warning if a REPEAT or REPEATI | |
29 | instruction loop is too small. | |
30 | ||
cd0fc7c3 SS |
31 | 1999-05-08 Felix Lee <flee@cygnus.com> |
32 | ||
33 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
34 | ||
7a292a7a SS |
35 | 1999-03-16 Martin Hunt <hunt@cygnus.com> |
36 | From Frank Ch. Eigler <fche@cygnus.com> | |
37 | ||
38 | * cpu.h (mvtsys_left_p): New flag for MVTSYS instruction history. | |
39 | * d30v-insns (mvtsys): Set this flag instead of left_kills_right_p. | |
40 | (do_sath): Detect MVTSYS by new flag. | |
41 | * engine.c (unqueue_writes): Detect MVTSYS by new flag. | |
42 | (do_2_short, do_parallel): Initialize new flag. | |
43 | ||
44 | 1999-02-26 Frank Ch. Eigler <fche@cygnus.com> | |
45 | ||
46 | * tconfig.in (SIM_HANDLES_LMA): Make it so. | |
47 | ||
c906108c SS |
48 | 1999-01-12 Frank Ch. Eigler <fche@cygnus.com> |
49 | ||
50 | * engine.c (unqueue_writes): Make PSW conflict resolution code | |
51 | conditional - disable it for MVTSYS || insn case. | |
52 | ||
53 | 1999-01-11 Frank Ch. Eigler <fche@cygnus.com> | |
54 | ||
55 | * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG | |
56 | update. | |
57 | * engine.c (unqueue_writes): Make non-static. Remove PSW_V/VA | |
58 | special case. | |
59 | (do_parallel): Don't drain PSW write queue for MVTSYS || insn. | |
60 | ||
61 | 1999-01-07 Frank Ch. Eigler <fche@cygnus.com> | |
62 | ||
63 | * d30v-insns (do_ld2h): Sign-extend loaded half-words. | |
64 | ||
65 | 1999-01-05 Frank Ch. Eigler <fche@cygnus.com> | |
66 | ||
67 | * d30v-insns (do_ld2h): Read memory in word units. | |
68 | (do_ld4bh): Ditto. Correct sign extension. | |
69 | (do_ld4bhu): Ditto. | |
70 | (do_st2h): Write memory in word units. | |
71 | (do_st4hb): Ditto. | |
72 | (st4hb): Correct mnemonic in igen template. | |
73 | ||
74 | 1998-12-08 Frank Ch. Eigler <fche@cygnus.com> | |
75 | ||
76 | * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn. | |
77 | (do_ld2w): Ditto. | |
78 | (do_ld4bh): Ditto. | |
79 | (do_ld4bhu): Ditto. | |
80 | (do_mulx2h): Ditto. | |
81 | ||
82 | 1998-12-03 Frank Ch. Eigler <fche@cygnus.com> | |
83 | ||
84 | * d30v-insns (do_repeat): Don't set RP for repeat count 1. | |
85 | ||
86 | 1998-12-03 Frank Ch. Eigler <fche@cygnus.com> | |
87 | ||
88 | * d30v-insns (do_src): Treat shift count -32 naturally instead of | |
89 | producing zero result. | |
90 | ||
91 | 1998-11-22 Frank Ch. Eigler <fche@cygnus.com> | |
92 | ||
93 | * d30v-insns (do_src): Limit SRC shift count to -32 .. 31. | |
94 | ||
95 | 1998-11-16 Frank Ch. Eigler <fche@cygnus.com> | |
96 | ||
97 | * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2. | |
98 | * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here. | |
99 | ||
100 | 1998-11-12 Frank Ch. Eigler <fche@cygnus.com> | |
101 | ||
102 | * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated | |
103 | RPT_IS_CALL macro. | |
104 | * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call. | |
105 | * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto. | |
106 | (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto. | |
107 | * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead. | |
108 | (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto. | |
109 | * engine.c (sim_engine_run): Remove conditional setting of R62 based | |
110 | upon RPT_IS_CALL. | |
111 | ||
112 | 1998-11-08 Frank Ch. Eigler <fche@cygnus.com> | |
113 | ||
114 | * sim-calls.c (sim_open): Add dummy memory range over control | |
115 | register region (0x40000000..0x4000FFFF). | |
116 | ||
117 | 1998-11-06 Frank Ch. Eigler <fche@cygnus.com> | |
118 | ||
119 | * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0. | |
120 | ||
121 | Tue Oct 13 11:01:16 1998 Frank Ch. Eigler <fche@cygnus.com> | |
122 | ||
123 | * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift | |
124 | count -32 to produce zero result. | |
125 | (do_src): Ditto for shift count == -64. | |
126 | ||
127 | Mon Oct 12 23:04:11 1998 Frank Ch. Eigler <fche@cygnus.com> | |
128 | ||
129 | * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking. | |
130 | (do_sra,do_srl): Use loop to limit shift count to -32 .. 31. | |
131 | (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31. | |
132 | (sra2h,srl2h): Use loop to limit shift count to -16 .. 15. | |
133 | (do_src): Use loop to limit shift count to -64 .. 63. | |
134 | ||
135 | Fri Oct 9 16:46:52 1998 Doug Evans <devans@canuck.cygnus.com> | |
136 | ||
137 | * sim-calls.c (get_insn_name): New fn. | |
138 | (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS. | |
139 | * sim-main.h (MAX_INSNS,INSN_NAME): Delete. | |
140 | ||
141 | Mon Sep 28 10:43:28 1998 Frank Ch. Eigler <fche@cygnus.com> | |
142 | ||
143 | * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use | |
144 | correct MSB bit numbers for sign extension masks. | |
145 | ||
146 | Fri Sep 25 17:32:27 1998 Frank Ch. Eigler <fche@cygnus.com> | |
147 | ||
148 | * engine.c (do_parallel): Unqueue writes if MU instruction was | |
149 | a MVTSYS, as identified by its left_kills_right_p side-effect. | |
150 | ||
151 | Fri Sep 25 12:31:34 1998 Frank Ch. Eigler <fche@cygnus.com> | |
152 | ||
153 | * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask | |
154 | shift/rotate counts to number of bits in width of operand; no | |
155 | longer saturate at maxima. | |
156 | ||
157 | Tue Jul 14 18:39:23 1998 Frank Ch. Eigler <fche@cygnus.com> | |
158 | ||
159 | * cpu.h (left_kills_right_p): New flag for non-branch instructions | |
160 | that, when executed in left slot of a -> sequential pair, kill the | |
161 | right slot. | |
162 | * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands. | |
163 | * engine.c (do_2_short): Respect flag. | |
164 | ||
165 | Thu Jun 4 16:48:58 1998 David Taylor <taylor@texas.cygnus.com> | |
166 | ||
167 | * d30v-insns (do_trap): don't save the bPSW and PSW based on | |
168 | current values because an instruction done in parallel with | |
169 | the trap might change them, instead set a flag do that | |
170 | unqueue_writes will take care of it. | |
171 | * engine.c (unqueue_writes): finish trap handling | |
172 | * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP | |
173 | to make use of it; set by do_trap, tested and cleared by | |
174 | unqueue_writes. | |
175 | ||
176 | Tue May 19 16:07:04 1998 Frank Ch. Eigler <fche@cygnus.com> | |
177 | ||
178 | * engine.c (unqueue_writes): Suppress the all enqueued writes to | |
179 | the same flags in PSW except the last. | |
180 | ||
181 | Fri May 15 11:38:59 1998 Frank Ch. Eigler <fche@cygnus.com> | |
182 | ||
183 | * d30v-insns (RETI): Correct instruction spelling to "reit". | |
184 | ||
185 | Thu May 14 09:34:20 1998 Frank Ch. Eigler <fche@cygnus.com> | |
186 | ||
187 | * d30v-insns (dbt): Handle DBT at end of repeat block. | |
188 | (do_trap, dbt): Clear PSW_RP if at end of repeat block. | |
189 | ||
190 | Thu May 14 07:41:41 1998 Frank Ch. Eigler <fche@cygnus.com> | |
191 | ||
192 | * engine.c (sim_engine_run): Trigger DDBT based on previous PC, | |
193 | instead of next PC. | |
194 | ||
195 | Wed May 13 11:03:40 1998 Frank Ch. Eigler <fche@cygnus.com> | |
196 | ||
197 | * engine.c (sim_engine_run): Move DDBT handling after instruction | |
198 | decode/execute stage. | |
199 | ||
200 | Tue May 12 12:14:53 1998 Frank Ch. Eigler <fche@cygnus.com> | |
201 | ||
202 | * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to | |
203 | properly handle negative saturation inputs. | |
204 | ||
205 | Tue May 12 11:11:26 1998 Frank Ch. Eigler <fche@cygnus.com> | |
206 | ||
207 | * engine.c (sim_engine_run): Decrement RPT_C only under more | |
208 | restricted conditions. | |
209 | ||
210 | Mon May 11 17:33:46 1998 Frank Ch. Eigler <fche@cygnus.com> | |
211 | ||
212 | * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data | |
213 | unchanged. | |
214 | ||
215 | Mon May 11 16:27:04 1998 Frank Ch. Eigler <fche@cygnus.com> | |
216 | ||
217 | * engine.c (sim_engine_run): Implement DDBT (debugger debug trap) | |
218 | functionality. | |
219 | ||
220 | Fri May 8 16:44:19 1998 Frank Ch. Eigler <fche@cygnus.com> | |
221 | ||
222 | * d30v-insns (do_trap): Set bPC to RPT_S if trap is last | |
223 | instruction in repeat block. | |
224 | (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch | |
225 | is last instruction in repeat block. | |
226 | ||
227 | Fri May 8 11:06:50 1998 Frank Ch. Eigler <fche@cygnus.com> | |
228 | ||
229 | * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag | |
230 | macro. | |
231 | * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit. | |
232 | ||
233 | Wed May 6 19:40:56 1998 Doug Evans <devans@canuck.cygnus.com> | |
234 | ||
235 | * sim-main.h (INSN_NAME): New arg `cpu'. | |
236 | ||
237 | Fri May 1 14:24:30 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
238 | ||
239 | * d30v-insns: Fix parameter list to sim_engine_abort. | |
240 | ||
241 | Thu Apr 30 14:28:00 1998 Fred Fish <fnf@cygnus.com> | |
242 | ||
243 | * d30v-insns (do_sath): Add additional argument that determines | |
244 | whether or not the F4 (PSW_S) bit in the PSW is updated. | |
245 | (SAT2H): Do not update PSW_S bit. | |
246 | (SATHp): Do update PSW_S bit. | |
247 | ||
248 | Tue Apr 28 23:36:00 1998 Fred Fish <fnf@cygnus.com> | |
249 | ||
250 | * d30v-insns (SRAHp, SRLHp): Immediate values are signed 6 bit | |
251 | values, not 5 bit values. | |
252 | ||
253 | Wed Apr 29 12:57:55 1998 Frank Ch. Eigler <fche@cygnus.com> | |
254 | ||
255 | * d30v-insns (do_incr): Check modular arithmetic limits after | |
256 | postincrement/postdecrement, rather than before, to match | |
257 | erroneous hardware behavior. | |
258 | ||
259 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
260 | ||
261 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
262 | ||
263 | Mon Apr 27 19:42:00 1998 Fred Fish <fnf@cygnus.com> | |
264 | ||
265 | * d30v-insns (do_trap): Clear all bits in PSW except SM and DB. | |
266 | ||
267 | Mon Apr 27 14:55:00 1998 Fred Fish <fnf@cygnus.com> | |
268 | ||
269 | * d30v-insns (do_mulx2h): Low order results go in ra+1, high | |
270 | order in ra. | |
271 | ||
272 | Mon Apr 27 14:42:00 1998 Fred Fish <fnf@cygnus.com> | |
273 | ||
274 | * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed | |
275 | multiply of high and low fields from operands. | |
276 | ||
277 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> | |
278 | ||
279 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
280 | * config.in: Ditto. | |
281 | ||
282 | Sun Apr 26 15:20:20 1998 Tom Tromey <tromey@cygnus.com> | |
283 | ||
284 | * acconfig.h: New file. | |
285 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
286 | ||
287 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> | |
288 | ||
289 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
290 | * config.in: Ditto. | |
291 | ||
292 | Fri Apr 24 11:20:00 1998 Tom Tromey <tromey@cygnus.com> | |
293 | ||
294 | * configure.in: Don't call sinclude. | |
295 | ||
296 | Wed Apr 22 21:23:00 1998 Fred Fish <fnf@cygnus.com> | |
297 | ||
298 | * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc. | |
299 | * d30v-insns (MVTACC): Use new RbU and RcU macros. | |
300 | ||
301 | Wed Apr 22 20:52:00 1998 Fred Fish <fnf@cygnus.com> | |
302 | ||
303 | * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL. | |
304 | * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of | |
305 | RbH and RbL. | |
306 | ||
307 | Mon Apr 13 16:59:00 1998 Fred Fish <fnf@cygnus.com> | |
308 | ||
309 | * d30v-insns (do_srl): Avoid undefined behavior of host compiler | |
310 | when shifting left by more than 31 bits. | |
311 | ||
312 | Tue Apr 7 18:09:00 1998 Fred Fish <fnf@cygnus.com> | |
313 | ||
314 | * engine.c (sim_engine_run): Remove at_loop_end variable. Add | |
315 | rp_was_set and rpt_c_was_nonzero variables. Major restructuring of | |
316 | code before and after instruction execution to properly handle state | |
317 | of the RP bit in the PSW, the value in RPT_C, and other loop related | |
318 | problems. | |
319 | ||
320 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
321 | ||
322 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
323 | ||
324 | Fri Apr 3 15:26:00 1998 Fred Fish <fnf@cygnus.com> | |
325 | ||
326 | * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded | |
327 | BASE_ADDRESS constant. | |
328 | * cpu.h (BASE_ADDRESS): Remove constant not used any longer. | |
329 | ||
330 | Fri Apr 3 14:42:00 1998 Fred Fish <fnf@cygnus.com> | |
331 | ||
332 | * cpu.h (EIT_VB): Define macro to access EIT_VB register. | |
333 | (EIT_VB_DEFAULT): Define value of EIT_VB register after reset. | |
334 | * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT. | |
335 | ||
336 | Tue Mar 31 19:00:00 1998 Fred Fish <fnf@cygnus.com> | |
337 | ||
338 | * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than | |
339 | just pcdisp. | |
340 | ||
341 | Mon Mar 30 20:30:00 1998 Fred Fish <fnf@cygnus.com> | |
342 | ||
343 | * engine.c (sim_engine_run): Add at_loop_end. Rework end of loop | |
344 | code to use this to both reset PSW_RP when needed and to set PC | |
345 | to RPT_S for another pass through the loop. | |
346 | ||
347 | Mon Mar 30 16:12:00 1998 Fred Fish <fnf@cygnus.com> | |
348 | ||
349 | * engine.c (sim_engine_run): Change code that handles RPT_* regs | |
350 | and PSW_RP bit in PSW so that PSW_RP is always set while executing | |
351 | the loop and loop terminates upon completion of the pass for which | |
352 | RPT_C is zero. More closely follow logic in architecture manual. | |
353 | ||
354 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
355 | ||
356 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
357 | ||
358 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
359 | ||
360 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
361 | ||
362 | Thu Mar 19 00:25:43 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
363 | ||
364 | * sim-calls.c (sim_open): Move memory-region commands back to | |
365 | before the call to sim_parse_args. | |
366 | (d30v_option_handler): Implement extmem-size option using | |
367 | memory-delete and memory-region commands. | |
368 | ||
369 | * sim-calls.c (d30v_option_handler): Use ANSI-C argument list, | |
370 | correct number and type of arguments. | |
371 | ||
372 | Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
373 | ||
374 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
375 | ||
376 | Wed Mar 11 13:56:32 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
377 | ||
378 | * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map, | |
379 | read_map and write_map resp. | |
380 | ||
381 | * cpu.c (d30v_read_mem, d30v_write_mem): Ditto. | |
382 | ||
383 | Mon Mar 2 13:34:08 1998 Fred Fish <fnf@cygnus.com> | |
384 | ||
385 | * d30v-insns (do_repeat): Abort repeat instructions that have | |
386 | a repeat count of zero. | |
387 | ||
388 | Fri Feb 27 18:44:12 1998 Doug Evans <devans@canuck.cygnus.com> | |
389 | ||
390 | * sim-calls.c (sim_open): Update call to sim_add_option_table. | |
391 | ||
392 | Thu Feb 26 18:34:31 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
393 | ||
394 | * sim-calls.c (sim_info): Delete. | |
395 | ||
396 | Wed Feb 25 14:44:58 1998 Michael Meissner <meissner@cygnus.com> | |
397 | ||
398 | * d30v-insns (mvtsys): If moving to EIT_VB register, and with | |
399 | valid bits. Optimize code somewhat. | |
400 | ||
401 | * cpu.h (eit_vector_base_cr): New CR we need to special case. | |
402 | (EIT_VALID): Valid bits for EIT_VB register. | |
403 | ||
404 | * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is | |
405 | in the low 16 bits of the register. | |
406 | ||
407 | * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back | |
408 | results. | |
409 | (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing | |
410 | result back to the registers. | |
411 | ||
412 | Tue Feb 24 18:09:52 1998 Fred Fish <fnf@cygnus.com> | |
413 | ||
414 | * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force | |
415 | r0 to always be zero. | |
416 | * cpu.h (GPR_SET): Define. | |
417 | ||
418 | Tue Feb 24 14:12:57 1998 Michael Meissner <meissner@cygnus.com> | |
419 | ||
420 | * d30v-insns (do_sath): Do saturation in 32 bits, before | |
421 | converting to 16. | |
422 | (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend. | |
423 | (do_sath_p): Delete, no longer used. | |
424 | (sathp): Call do_sath, not do_sath_p. | |
425 | ||
426 | Mon Feb 23 15:55:14 1998 Michael Meissner <meissner@cygnus.com> | |
427 | ||
428 | * d30v-insns (illegal,wrong_slot): Print \n after PC and before we | |
429 | call sim_engine_halt. | |
430 | (sr{a,l}hp): Implement missing instructions. | |
431 | (do_trap): Print high order PSW bits in human readable fashion. | |
432 | (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP. | |
433 | ||
434 | * alu.h (PSW_SET_QUEUE): New macro to set PSW bits. | |
435 | ||
436 | * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C | |
437 | being > 0. If RPT_C is decremented to 0, clear PSW RP bit. | |
438 | ||
439 | Fri Feb 20 10:13:34 1998 Fred Fish <fnf@cygnus.com> | |
440 | ||
441 | * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020. | |
442 | ||
443 | Tue Feb 17 12:39:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
444 | ||
445 | * sim-calls.c (sim_store_register, sim_fetch_register): Pass in | |
446 | length parameter. Return -1. | |
447 | ||
448 | Fri Feb 6 17:39:54 1998 Michael Meissner <meissner@cygnus.com> | |
449 | ||
450 | * d30v-insns (do_dbrai): Correct typo, use shift, not comparison. | |
451 | ||
452 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
453 | ||
454 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
455 | ||
456 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
457 | ||
458 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
459 | ||
460 | Fri Jan 30 08:29:20 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
461 | ||
462 | * engine.c (sim_engine_run): Add parameter nr_cpus. | |
463 | ||
464 | Fri Jan 30 17:09:37 1998 Michael Meissner <meissner@cygnus.com> | |
465 | ||
466 | * d30v-insns (jsrtzr): Check for register == 0, not != 0. | |
467 | ||
468 | Wed Jan 21 17:52:04 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
469 | ||
470 | * engine.c (do_stack_swap): Make type of new_sp unsigned. | |
471 | ||
472 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> | |
473 | ||
474 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
475 | ||
476 | Mon Jan 5 16:04:17 1998 Andrew Cagney <cagney@sanguine.cygnus.com> | |
477 | ||
478 | * sim-calls.c (sim_info): Call profile_print. | |
479 | ||
480 | * sim-main.h: Enable instruction profiling. | |
481 | ||
482 | Thu Dec 18 12:21:38 1997 Michael Meissner <meissner@cygnus.com> | |
483 | ||
484 | * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry | |
485 | and overflow bits. Don't look at the current value of PSW. | |
486 | (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in | |
487 | question. Don't look at the current value of PSW. | |
488 | ||
489 | * d30v-insns: All instructions that set the PSW, will only queue | |
490 | up the particular bits in question that were set by the | |
491 | instruction. Don't look at the current value of PSW. | |
492 | ||
493 | Wed Dec 17 11:41:44 1997 Michael Meissner <meissner@cygnus.com> | |
494 | ||
495 | * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW. | |
496 | (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set. | |
497 | ||
498 | * engine.c (trace_alu32): When changing BPSW/DPSW, print the | |
499 | special PSW bits. | |
500 | ||
501 | * d30v-insns (do_cmp_cc): Fix cmpps and cmpng. | |
502 | (do_cmp{,u}_cc): Print which cc value was used if not in switch | |
503 | statement. | |
504 | (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}. | |
505 | (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID. | |
506 | ||
507 | Tue Dec 16 18:17:26 1997 Michael Meissner <meissner@cygnus.com> | |
508 | ||
509 | * d30v-insns (mulx2h): Add missing instruction. Complain if | |
510 | register is not even. | |
511 | (do_{add,sub}h_ppp): Get correct high/low values. Also correctly | |
512 | handle short immediates. | |
513 | (do_ld{2w,4bh}): Don't load r0 if ra == 0. | |
514 | ||
515 | * engine.c (d30v_interrupt_event): Remove unused variable | |
516 | (unqueue_writes): Ditto. | |
517 | ||
518 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
519 | ||
520 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
521 | * config.in: Ditto. | |
522 | ||
523 | Sat Dec 13 23:40:17 1997 Michael Meissner <meissner@cygnus.com> | |
524 | ||
525 | * cpu.h (_write{32,64}): New structures for keeping track of | |
526 | queued writes to registers. | |
527 | (_sim_cpu): Add _write{32,64} structures. Make is_delayed_call | |
528 | unsigned32 also. | |
529 | (WRITE{32,64}*): New macros for queueing up writes to registers. | |
530 | ||
531 | * alu.h (ALU16_END): Take field that says whether we are setting | |
532 | the high or low half word. Queue up changes to registers. | |
533 | (ALU32_END): Queue up changes to registers. | |
534 | (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up. | |
535 | ||
536 | * sim-main.h (do_stack_swap): Remove declaration. | |
537 | ||
538 | * engine.c (do_stack_swap): Make static. | |
539 | (unqueue_writes): New function to unqueue all changes to 32 and 64 | |
540 | bit registers in order. Implement --trace-alu. Reset high water | |
541 | marks for # of queued registers. If PSW changed, possibly update | |
542 | stack pointer. | |
543 | (do_{long,2_short,parallel}): Unqueue register writes at the | |
544 | appropriate time. | |
545 | ||
546 | * d30v-insns: Modify all insns to queue changes to registers, | |
547 | rather than do them immediately so that parallel instructions get | |
548 | the right values for inputs. Rewrite 16 bit operations to be done | |
549 | in terms of masked 32 bit registers. Don't call do_stack_swap any | |
550 | more here. | |
551 | ||
552 | Thu Dec 11 10:06:02 1997 Michael Meissner <meissner@cygnus.com> | |
553 | ||
554 | * sim-calls.c (d30v_option_handler): Add support for --extmem-size | |
555 | to size external memory. | |
556 | (sim_open): Ditto. Default if no --extmem-size option is 8 meg. | |
557 | ||
558 | Wed Dec 10 01:08:24 1997 Jim Blandy <jimb@zwingli.cygnus.com> | |
559 | ||
560 | * d30v-insns (do_rot2h): Clip rotate amounts to four bits. The | |
561 | upper bits, and the sign of the rotation amount, are red herrings. | |
562 | (do_sra, do_srl): Handle shifts greater than 32 bits. | |
563 | (do_srah, do_sral): Properly sign-extend value and shift amount. | |
564 | Handle shifts larger than 16 bits. | |
565 | ||
566 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
567 | ||
568 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
569 | ||
570 | Mon Dec 1 15:10:44 1997 Michael Meissner <meissner@cygnus.com> | |
571 | ||
572 | * d30v-insns (do_sub2h): For short instruction, correctly | |
573 | dupplicate lower 16 bits of immediate in upper 16 bits. | |
574 | (sat2z): Fix typo that ignored the upper half of the register. | |
575 | (do_satz): If < 0, set *ra to 0, if not call do_sat. | |
576 | (mvtsys): Before setting PSW, and with PSW_VALID. | |
577 | ||
578 | * cpu.h (PSW_VALID): Mask for bits in PSW that is valid. | |
579 | ||
580 | Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
581 | ||
582 | * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in | |
583 | printf, return dummy at end. | |
584 | ||
585 | Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
586 | ||
587 | * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with | |
588 | ALU_ADDC. | |
589 | (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C. | |
590 | (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB. | |
591 | (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B. | |
592 | ||
593 | * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of | |
594 | ALU16_HAD_CARRY. | |
595 | (ALU32_END): Ditto. | |
596 | ||
597 | * sim-main.h (string.h, strings.h): Include. | |
598 | ||
599 | * sim-calls.c: Delete inclusion of string.h and strings.h. | |
600 | ||
601 | Sun Nov 30 17:29:25 1997 Michael Meissner <meissner@cygnus.com> | |
602 | ||
603 | * configure.in (--enable-sim-trapdump): New switch to control | |
604 | whether traps 0..30 dump out the registers or do the real trap. | |
605 | * configure: Regenerate. | |
606 | ||
607 | * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if | |
608 | appropriate --{en,dis}able-sim-trapdump is done. | |
609 | ||
610 | * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE. | |
611 | (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump. | |
612 | (d30v_option_handler): Add support for --trace-trapdump. | |
613 | (d30v_options): Ditto. | |
614 | (sim_open): Ditto. | |
615 | ||
616 | * d30v-insns (do_trap): Do register dump if --trace-trapdump and | |
617 | not the system call trap. Remove support for calling old function | |
618 | sim_io_syscalls. | |
619 | ||
620 | Sat Nov 29 18:54:55 1997 Michael Meissner <meissner@cygnus.com> | |
621 | ||
622 | * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields. | |
623 | (TRACE_CALL_P): Non-zero if --trace-call. | |
624 | (TRACE_ACTION): Non-zero if there is a tracing action at the end | |
625 | of processing an instruction boundary. | |
626 | (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return. | |
627 | (d30v_next_insn): Delete, now trace_action field in cpu state. | |
628 | ||
629 | * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu | |
630 | state. | |
631 | (return_occurred): Minimum saved register to check is now 34. | |
632 | ||
633 | * engine.c (sim_engine_run): Change call tracing to use | |
634 | trace_action field in cpu state. | |
635 | ||
636 | * sim-calls.c (d30v_option_handler): Handle d30v specific options. | |
637 | (d30v_options): D30V specific options. Right now, --trace-call. | |
638 | (sim_open): Register d30v specific options. | |
639 | ||
640 | * d30v-insns (call, return insns): Move --trace-debug call/return | |
641 | tracing action to d30v specific --trace-call option. | |
642 | ||
643 | Fri Nov 28 20:12:48 1997 Michael Meissner <meissner@cygnus.com> | |
644 | ||
645 | * cpu.h (CREG): Rename from CR. | |
646 | ||
647 | * d30v-insns (do_{addc,subb}): Explicitly import the carry bit. | |
648 | (do_trap): Use CREG, not CR. Switch to using cb_syscall. | |
649 | ||
650 | Thu Nov 27 19:25:43 1997 Michael Meissner <meissner@cygnus.com> | |
651 | ||
652 | * cpu.h (ACC): Define as short cut to accumulators. | |
653 | ||
654 | * d30v-insns (do_rot): Delete explicit function, use ROT32 to do | |
655 | rotate instruction. | |
656 | (do_trap): Make trap 30 print out accumulators and first 16 | |
657 | control registers as well. | |
658 | (do_avg): Sign extend to 64 bit type before doing add/shift. | |
659 | (do_avg2h): Sign extend 16 bit chunks before doing add/shift. | |
660 | ||
661 | Wed Nov 26 15:20:24 1997 Doug Evans <devans@canuck.cygnus.com> | |
662 | ||
663 | * Makefile.in (NL_TARGET): Define. | |
664 | ||
665 | Wed Nov 26 16:55:38 1997 Michael Meissner <meissner@cygnus.com> | |
666 | ||
667 | * cpu.h (d30v_next_insn): New flag for things we are supposed to | |
668 | trace between instruction words. | |
669 | ({call,return}_occurred): Remove index argument. | |
670 | (d30v_{read,write}_mem): Add declarations. | |
671 | ||
672 | * cpu.c (d30v_next_insn): New flag for things we are supposed to | |
673 | trace between instruction words. | |
674 | ({call,return}_occurred): Remove index argument. | |
675 | (d30v_{read,write}_mem): New functions for reading/writing | |
676 | simulated memory in the new common system call support. | |
677 | ||
678 | * d30v-insns: Set emacs C mode. | |
679 | (call/return insns): Set bit to trace call at instruction | |
680 | boundary, rather than doing it here. | |
681 | (do_trap): Set up to use new common system call interface. | |
682 | ||
683 | * engine.c (sim_engine_run): If d30v_next_insn is non zero, do | |
684 | function call/return tracing. | |
685 | ||
686 | Mon Nov 24 16:40:49 1997 Michael Meissner <meissner@cygnus.com> | |
687 | ||
688 | * d30v-insns (bnot): Correctly reset bit in question. | |
689 | (do_trap): Use common system call emulation support, rather than | |
690 | our home grown support. | |
691 | ||
692 | Sun Nov 23 22:47:20 1997 Michael Meissner <meissner@cygnus.com> | |
693 | ||
694 | * d30v-insns (mvfacc): Immediate field is unsigned, allowing | |
695 | shifts of up to 63 to be encoded. Also do shift signed, rather | |
696 | than unsigned. | |
697 | ||
698 | * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants. | |
699 | ||
700 | * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign | |
701 | extends. | |
702 | ||
703 | Sat Nov 22 19:04:34 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
704 | ||
705 | * d30v-insns (illegal, wrong_slot): Replace SIGILL with | |
706 | SIM_SIGILL. | |
707 | ||
708 | * sim-calls.c (signal.h): Do not include, replaced by | |
709 | sim-signal.h. | |
710 | ||
711 | * sim-main.h (signal.h): Do not include, include sim-signal.h | |
712 | instead. | |
713 | ||
714 | Fri Nov 21 09:33:54 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
715 | ||
716 | * cpu.c (call_occurred): Use ZALLOC instead of xmalloc. | |
717 | (return_occurred): Use zfree instead of free. | |
718 | ||
719 | Wed Nov 19 13:28:09 1997 Michael Meissner <meissner@cygnus.com> | |
720 | ||
721 | * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include | |
722 | files in $(ENGINE_H). | |
723 | ||
724 | * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes | |
725 | a VAL argument to add/subtract along with the carry. | |
726 | ||
727 | Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> | |
728 | ||
729 | * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). | |
730 | ||
731 | Tue Nov 18 13:56:15 1997 Michael Meissner <meissner@cygnus.com> | |
732 | ||
733 | * d30v-insns (do_trap): Change to new system call numbers. Add | |
734 | read emulation. | |
735 | ||
736 | Mon Nov 17 14:43:45 1997 Michael Meissner <meissner@cygnus.com> | |
737 | ||
738 | * d30v-insns (mulx): Add mulx instruction. | |
739 | ||
740 | Sun Nov 16 19:06:56 1997 Michael Meissner <meissner@cygnus.com> | |
741 | ||
742 | * cpu.c ({call,return}_occurred): New trace functions to mark | |
743 | function calls and returns and check whether all saved registers | |
744 | really were saved. | |
745 | ||
746 | * cpu.h ({call,return}_occurred): Add declaration. | |
747 | ||
748 | * d30v-insns ({bsr, jsr} patterns): Call call_occurred if | |
749 | --trace-debug to trace function calls. | |
750 | (jmp register pattern): If this is a jump r62 and --trace-debug, | |
751 | call return_occurred to trace function calls. | |
752 | (bsr{tnz,tzr}): Move setting r62 inside conditional against reg. | |
753 | (do_ld2w): Grab memory in 64-bit chunk, to check alignment. | |
754 | (do_st2w): Ditto. | |
755 | ||
756 | Sat Nov 15 20:57:57 1997 Michael Meissner <meissner@cygnus.com> | |
757 | ||
758 | * d30v-insns: Undo changes from Nov. 11, allowing for odd register | |
759 | pairs, since the machine doesn't support such usage. Trap on odd | |
760 | registers, rather than give a warning. Keep do_src and do_trap | |
761 | changes. | |
762 | ||
763 | Fri Nov 14 11:59:29 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
764 | ||
765 | * d30v-insns (do_trap): Pacify compiler warnings for printf calls. | |
766 | ||
767 | Tue Nov 11 18:26:03 1997 Michael Meissner <meissner@cygnus.com> | |
768 | ||
769 | * d30v-insns (not_r63_reg): Rename from make_even_reg, only check | |
770 | for register being r63. Change callers ld2{h,w}, ld4bh{,u}. | |
771 | (get_reg_not_r63): Rename from get_even_reg, and only check for | |
772 | register r63. Change callers st2{w,h}, st4b. | |
773 | (do_src): Correct register pair for shift left. | |
774 | (do_trap): Temporarily make trap 30 print out the registers. | |
775 | ||
776 | Tue Nov 4 08:51:22 1997 Michael Meissner <meissner@cygnus.com> | |
777 | ||
778 | * d30v-insns (do_trap): Make trap 31 be used for system calls. | |
779 | Add primitive write and exit system calls. | |
780 | ||
781 | * Makefile (FILTER): New make variable to filter out known igen | |
782 | warnings. | |
783 | (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter | |
784 | out warnings that should be ignored by default. | |
785 | ||
786 | Fri Oct 31 19:36:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
787 | ||
788 | * sim-calls.c (sim_open): Change EIT to memory region. | |
789 | ||
790 | Fri Oct 17 16:51:31 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
791 | ||
792 | * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT. | |
793 | (ALU32_END): Get result from ALU32_OVERFLOW_RESULT. | |
794 | ||
795 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
796 | ||
797 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
798 | ||
799 | Mon Sep 29 15:23:35 1997 Stu Grossman <grossman@babylon-5.cygnus.com> | |
800 | ||
801 | * d30v-insns (MVFSYS MVTSYS): Fix bit patterns so that these | |
802 | instructions get recognised. | |
803 | ||
804 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
805 | ||
806 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
807 | ||
808 | Wed Sep 24 17:51:43 1997 Stu Grossman <grossman@babylon-5.cygnus.com> | |
809 | ||
810 | * Makefile.in (SIM_OBJS): Add sim-break.o. | |
811 | * (INCLUDE_DEPS): Add tconfig.h. | |
812 | * alu.h (MEM STORE): Change to sim_core_read/write_unaligned to | |
813 | allow for trapping unaligned accesses. | |
814 | * cpu.h: Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint | |
815 | mechanism. | |
816 | * d30v-insn (short syscall): Use syscall 5 for breakpoint insn. | |
817 | * sim-calls.c (sim_fetch_register sim_store_register): Implement. | |
818 | * tconfig.in: Define SIM_HAVE_BREAKPOINTS to enable intrinsic | |
819 | breakpoint mechanism. | |
820 | ||
821 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
822 | ||
823 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
824 | ||
825 | Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
826 | ||
827 | * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN, | |
828 | SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common. | |
829 | (SIM_EXTRA_CFLAGS): Update. | |
830 | ||
831 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
832 | ||
833 | * configure.in: Specify strict alignment. | |
834 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
835 | ||
836 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
837 | ||
838 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
839 | ||
840 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
841 | ||
842 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
843 | ||
844 | Fri Sep 12 16:13:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
845 | ||
846 | * sim-calls.c (sim_open): Change memory to | |
847 | internal inst. RAM h'00000000-h'0000ffff (64KB) | |
848 | internal data RAM h'20000000-h'20007fff (32KB) | |
849 | external RAM h'80000000-h'803fffff (4MB) | |
850 | EIT h'fffff000-h'ffffffff | |
851 | ||
852 | ||
853 | Thu Sep 11 08:59:34 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
854 | ||
855 | * Makefile.in (SIM_OBJS): Add sim-hrw.o module. | |
856 | ||
857 | * sim-calls.c (sim_read): Delete. use sim-hrw. | |
858 | (sim_write): Delete, use sim-hrw. | |
859 | ||
860 | ||
861 | Tue Sep 9 01:36:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
862 | ||
863 | * ic-d30v (imm_5): Update nr args passed to LSMASKED. | |
864 | ||
865 | * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix, | |
866 | computing the max sat value incorrectly. | |
867 | ||
868 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> | |
869 | ||
870 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
871 | ||
872 | Fri Sep 5 09:15:33 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
873 | ||
874 | * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit | |
875 | type cast instead of SIGNED64 macro. | |
876 | ||
877 | Thu Sep 4 10:28:45 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
878 | ||
879 | * Makefile.in (SIM_OBJS): Include sim-memopt.o module. | |
880 | ||
881 | * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach | |
882 | calls. | |
883 | (sim_open): If no memory, use memory commands to establish d30v | |
884 | ram. | |
885 | (d30v_option_handler): Delete, replased by sim-memopt.c. | |
886 | (sim_create_inferior): Call sim_module_init. | |
887 | ||
888 | * sim-main.h (struct sim_state): Remove members eit_ram, | |
889 | sizeof_eit_ram, external_ram, baseof_external_ram, | |
890 | sizeof_external_ram. Using generic memory model instead. | |
891 | ||
892 | Mon Sep 1 11:04:09 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
893 | ||
894 | * sim-calls.c (sim_open): Use sim_state_alloc. | |
895 | ||
896 | Sat Aug 30 10:01:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
897 | ||
898 | * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define. | |
899 | ||
900 | * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS | |
901 | not -1. | |
902 | ||
903 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
904 | ||
905 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
906 | * config.in: Ditto. | |
907 | ||
908 | Wed Aug 27 13:41:54 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
909 | ||
910 | * sim-calls.c (sim_open): Add call to sim_analyze_program, update | |
911 | call to sim_config. | |
912 | ||
913 | * sim-calls.c (sim_create_inferior): Add ABFD argument. | |
914 | Initialize CPU registers including PC. | |
915 | (sim_load): Delete, using sim-hload. | |
916 | ||
917 | * Makefile.in (SIM_OBJS): Add sim-hload.o module. | |
918 | ||
919 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
920 | ||
921 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
922 | * config.in: Ditto. | |
923 | ||
924 | Mon Aug 25 15:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
925 | ||
926 | * sim-calls.c (sim_open): Add ABFD argument. | |
927 | (sim_open): Move sim_config call to after sim_parse_args. | |
928 | (sim_open): Check sim_config return status. | |
929 | ||
930 | Fri Aug 22 16:38:59 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
931 | ||
932 | * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp. | |
933 | (do_subh_ppp): Compute rc=rb-src instead of src-rb. | |
934 | (do_addh_ppp): Ditto. | |
935 | ||
936 | Fri Jun 27 14:43:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
937 | ||
938 | * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was | |
939 | wrong. Update handling of PSW[DS] bit. | |
940 | (dbt): Fix debug trap address. | |
941 | ||
942 | * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers. | |
943 | ||
944 | Tue Jun 24 12:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
945 | ||
946 | * d30v-insns (DBT, RTD): Swap the stack after updating the PSW. | |
947 | (DBT): Use PSW_SET to update PSW. | |
948 | ||
949 | * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit. | |
950 | ||
951 | Tue Jun 24 12:16:14 1997 Andrew Cagney <cagney@b2.cygnus.com> | |
952 | ||
953 | * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so | |
954 | that they are of class %s instead of class function. | |
955 | ||
956 | Tue Jun 10 12:26:39 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
957 | ||
958 | * sim-main.h (engine_error, engine_restart, engine_halt, | |
959 | engine_run_until_stop): Delete prototypes. Functions deleted | |
960 | earlier. | |
961 | (do_interrupt_handler): Add prototype. | |
962 | (sim_state): Add pending_event member to struct. | |
963 | ||
964 | * sim-calls.c (sim_open): Configure interrupt handler. | |
965 | * engine.c (d30v_interrupt_event): New function. Deliver external | |
966 | interrupt to processor. | |
967 | ||
968 | * d30v-insns (do_stack_swap): Move function from here. | |
969 | * engine.c (do_stack_swap): To here. | |
970 | * sim-main.h (do_stack_swap): Add prototype. | |
971 | ||
972 | * cpu.h (registers): Change current_sp to an int. | |
973 | * d30v-insn (do_stack_swap): Update. | |
974 | ||
975 | Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
976 | ||
977 | * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of | |
978 | instruction. | |
979 | (str_XXX): Fix case of XX == 3 - return "-". | |
980 | ||
981 | Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
982 | ||
983 | * engine.c (sim_engine_run): Issuing L->R and R->L instructions in | |
984 | wrong order. | |
985 | ||
986 | * d30v-insn (CMPUcc imm long): With of RB field should be 6 not | |
987 | three. | |
988 | (MUL, MUL2H, MULHX): X field 01 instead of 10. | |
989 | ||
990 | Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
991 | ||
992 | * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW. | |
993 | (dbt, rtd): New instructions. | |
994 | ||
995 | * cpu.h (NR_CONTROL_REGISTERS): Now 15. | |
996 | (debug_program_status_word_cr, debug_program_counter_cr): Add | |
997 | debug control registers. Renumber other control registers. | |
998 | (PSW_DS): New PSW bit. | |
999 | (DPC, DPSW): Define. | |
1000 | ||
1001 | Wed May 28 13:45:47 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1002 | ||
1003 | * engine.c (sim_engine_run): Check the event queue on every cycle. | |
1004 | ||
1005 | * sim-calls.c (sim_size): Delete. | |
1006 | (sim_do_command): Call sim_args_command. | |
1007 | (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct. | |
1008 | (simulation): Delete global now depend on sd argument. | |
1009 | (sim_open): Initialize sim-watch. | |
1010 | (d30v_option_handler): New function, parse mem-size argument. | |
1011 | ||
1012 | Tue May 27 14:03:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1013 | ||
1014 | * sim-calls.c (sim_set_callbacks): Delete. | |
1015 | (sim_write): Pass NULL cpu arg to sim_core_write_buffer. | |
1016 | ||
1017 | * engine.c (engine_init): Delete. Handled in sim_open. | |
1018 | (engine_create): Ditto. | |
1019 | ||
1020 | Tue May 20 10:15:35 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1021 | ||
1022 | * sim-calls.c (sim_open): Add callback argument. | |
1023 | (sim_set_callbacks): Delete SIM_DESC argument. | |
1024 | ||
1025 | Mon May 19 14:59:32 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1026 | ||
1027 | * sim-calls.c (sim_open): Set the sim.base magic number. | |
1028 | ||
1029 | Fri May 16 15:25:59 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1030 | ||
1031 | * d30v-insns: Replace engine_error with common sim_engine_abort. | |
1032 | * cpu.c (is_condition_ok, is_wrong_slot): Ditto. | |
1033 | ||
1034 | * engine.c (engine_run_until_stop): Rename this. | |
1035 | (sim_engine_run): To this. Simplify - most moved to common. | |
1036 | ||
1037 | * sim-calls.c (sim_stop_reason, sim_resume, sim_stop): | |
1038 | Delete. Replaced by common code. | |
1039 | ||
1040 | * engine.c (engine_error, engine_restart, engine_halt): Ditto. | |
1041 | ||
1042 | * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK): | |
1043 | Define as NOPs. | |
1044 | ||
1045 | Mon May 5 23:05:41 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1046 | ||
1047 | * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in | |
1048 | ../common. | |
1049 | * sim-calls.c (sim_open): Ditto. | |
1050 | ||
1051 | * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright | |
1052 | notice. | |
1053 | ||
1054 | Fri May 2 12:01:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1055 | ||
1056 | * sim-calls.c (sim-options.h, sim-utils.h): Include. | |
1057 | * Makefile.in (sim-calls.o): Add dependencies. | |
1058 | ||
1059 | * d30v-insns (address_word): Remove cia argument from support | |
1060 | functions, igen now does this automatically. | |
1061 | ||
1062 | * Makefile.in (tmp-igen): Include line number information in | |
1063 | generated files. | |
1064 | ||
1065 | * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to | |
1066 | simulator base type sim_state_base. | |
1067 | (sim-core.h, sim-events.h, sim-io.h): Replace with #include | |
1068 | "sim-base.h". | |
1069 | ||
1070 | * sim-main.h (sim_state): Track recomendations in common | |
1071 | directory. | |
1072 | * cpu.h (sim_cpu): Ditto. | |
1073 | * engine.c (do_2_short, do_parallel): Ditto. | |
1074 | * cpu.h (GPR): Ditto. | |
1075 | * alu.h (MEM, IMEM, STORE): Ditto. | |
1076 | * cpu.c (is_wrong_slot): Ditto. | |
1077 | * ic-d30v (Aa, Ab): Ditto. | |
1078 | ||
1079 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
1080 | ||
1081 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1082 | * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o. | |
1083 | * sim-calls.c (sim_open): Call sim_module_uninstall if argument | |
1084 | parsing fails. Call sim_post_argv_init. | |
1085 | (sim_close): Call sim_module_uninstall. | |
1086 | ||
1087 | Fri Apr 18 13:44:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
1088 | ||
1089 | * sim-calls.c (sim_stop): New function. | |
1090 | ||
1091 | Thu Apr 17 02:57:55 1997 Doug Evans <dje@canuck.cygnus.com> | |
1092 | ||
1093 | * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o. | |
1094 | (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete. | |
1095 | (SIM_RUN_OBJS): Change from run.o to nrun.o. | |
1096 | * cpu.h (sim_cpu): New member base. Delete members trace, sd. | |
1097 | (cpu_traces): Delete. | |
1098 | * engine.c (engine_init): Set backlink from cpu to state. | |
1099 | * sim-calls.c: #include bfd.h. | |
1100 | (sim_open): Set STATE_OPEN_KIND. Call sim_pre_argv_init, | |
1101 | sim_parse_args. | |
1102 | (sim_load): Return SIM_RC. New arg abfd. | |
1103 | Call sim_load_file to load file into simulator. | |
1104 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
1105 | (sim_trace): Delete. | |
1106 | * sim-main.h (struct sim_state): sim_state_base is typedef now. | |
1107 | (STATE_CPU): Define. | |
1108 | ||
1109 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1110 | ||
1111 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1112 | * config.in: Ditto. | |
1113 | ||
1114 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> | |
1115 | ||
1116 | * Makefile.in (SIM_EXTRA_DEPS): Define. | |
1117 | (SIM_OBJS): Add sim-utils.o. | |
1118 | (SIM_GEN): Delete tmp-common. | |
1119 | (SIM_EXTRA_CLEAN): Delete clean-common. | |
1120 | (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in. | |
1121 | (tmp-common,clean-common): Delete. | |
1122 | (ENGINE_H): sim-state.h renamed to sim-main.h. | |
1123 | (clean-igen): Delete tmp-insns. | |
1124 | ||
1125 | * cpu.c: sim-state.h renamed to sim-main.h. | |
1126 | * engine.c: Likewise. | |
1127 | * sim-calls.c: Likewise. | |
1128 | (zalloc,zfree): Moved to ../common/sim-utils.c. | |
1129 | * sim-main.h: Renamed from sim-state.h. | |
1130 | ||
1131 | * sim-calls.c (sim_open): New arg `kind'. | |
1132 | ||
1133 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1134 | ||
1135 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1136 | ||
1137 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
1138 | ||
1139 | Wed Apr 2 11:13:15 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1140 | ||
1141 | * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o | |
1142 | ||
1143 | * engine.c (current_target_byte_order, current_host_byte_order, | |
1144 | current_environment, current_alignment, current_floating_point, | |
1145 | current_model_issue, current_stdio): Delete, moved to | |
1146 | ../common/sim-config.c | |
1147 | ||
1148 | Mon Mar 24 14:50:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1149 | ||
1150 | * d30v-insns (do_ldw): Load 4 bytes not 2. | |
1151 | (do_incr, LD*, ST*): Increment register not its value. | |
1152 | ||
1153 | Mon Mar 24 09:59:53 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1154 | ||
1155 | * cpu.c (is_wrong_slot): Ditto. | |
1156 | (is_condition_ok): Ditto. | |
1157 | ||
1158 | * sim-calls.c (sim_trace): Ditto. | |
1159 | ||
1160 | * engine.c (engine_init): Ditto. | |
1161 | (do_2_short): Ditto. | |
1162 | (engine_run_until_stop): Ditto. | |
1163 | ||
1164 | * d30v-insns (void): Update. For functions, remove `SIM_DESC sd' | |
1165 | and `cpu *processor' arguments as igen now handles this. | |
1166 | ||
1167 | * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable | |
1168 | processor to cpu. | |
1169 | ||
1170 | * sim-state.h: Update. | |
1171 | ||
1172 | Fri Mar 21 12:52:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1173 | ||
1174 | * d30v-insns (do_sat): Correct calculation of saturate lower | |
1175 | bound. | |
1176 | (do_sath): Ditto. | |
1177 | (do_satzh, do_satz): Arguments should be signed. | |
1178 | ||
1179 | * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for | |
1180 | moment. | |
1181 | (filter_filename): Drop. | |
1182 | ||
1183 | * cpu.h (is_wrong_slot): Correct declaration name - was | |
1184 | is_valid_slot. | |
1185 | ||
1186 | * engine.c (do_parallel): Plicate GCC. | |
1187 | (engine_error): Ditto. | |
1188 | (engine_run_until_stop): Ditto. | |
1189 | * cpu.c (is_wrong_slot): Ditto. | |
1190 | (is_condition_ok): Ditto. | |
1191 | * sim-calls.c (sim_size): Ditto. | |
1192 | (sim_read): Ditto. | |
1193 | (sim_trace): Ditto. | |
1194 | ||
1195 | * engine.h, engine.c (engine_create): Add missing prototype to | |
1196 | header file. Clean up missing variables. | |
1197 | ||
1198 | * configure.in (unistd.h, string.h, strings.h): Configure in. | |
1199 | * configure, config.in: Rebuild. | |
1200 | ||
1201 | Thu Mar 20 19:40:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1202 | ||
1203 | * d30v-insns (void): Provide a second emul instruction using a | |
1204 | branch prefix. | |
1205 | ||
1206 | Tue Mar 18 20:51:42 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1207 | ||
1208 | * d30v-insn (do_sat*): Pass all necessary args. | |
1209 | ||
1210 | Tue Mar 18 18:49:10 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1211 | ||
1212 | * d30v-insns (SAT*): Issue warning when bit overflow. | |
1213 | (EMUL): Exit with GPR[2] not 2. | |
1214 | ||
1215 | Tue Mar 18 14:24:09 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1216 | ||
1217 | * sim-state.h: New file rename engine.h. | |
1218 | (sim_state): Rename engine strut to sim_state, rename events and | |
1219 | core members. | |
1220 | ||
1221 | * engine.c: Update. | |
1222 | * cpu.h, cpu.c: Ditto. | |
1223 | * alu.h: Ditto. | |
1224 | * d30v-insns: Ditto. | |
1225 | * sim-calls.c: Ditto. | |
1226 | ||
1227 | * Makefile.in (sim-*.c): Moved to ../common. | |
1228 | ||
1229 | Tue Mar 18 10:39:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1230 | ||
1231 | * d30v-insns (do_mac): Adding wrong register. | |
1232 | (do_macs): Ditto. | |
1233 | (do_msub): Ditto. | |
1234 | (do_msubs): Ditto. | |
1235 | ||
1236 | * ic-d30v: Put back definitions of RaH, RaL, et.al. | |
1237 | (do_sra2h, do_srah): Use. | |
1238 | (do_srl2h, do_srlh): Use. | |
1239 | ||
1240 | * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate. | |
1241 | ||
1242 | Tue Mar 18 03:01:25 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1243 | ||
1244 | * d30v-insns: Specify wild insted of reserved bits. | |
1245 | (void): | |
1246 | ||
1247 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1248 | ||
1249 | * configure: Re-generate. | |
1250 | ||
1251 | Mon Mar 17 14:35:37 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1252 | ||
1253 | * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_* | |
1254 | options. Allow RESERVED_BITS to be configured. | |
1255 | * configure: Re-generate. | |
1256 | ||
1257 | * Makefile.in (sim-*.h): Drop, not needed. | |
1258 | (sim-*.c): Make each explicit so that they automatically update. | |
1259 | ||
1260 | Sat Mar 15 02:34:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1261 | ||
1262 | * ic-d30v (imm long): Incorrect calculation. | |
1263 | ||
1264 | * d30v-insns (EMUL): Finish exit, write-string emul-call. | |
1265 | ||
1266 | * sim-calls.c (sim_trace): Have sim-trace enable basic instruction | |
1267 | tracing. | |
1268 | ||
1269 | Sat Mar 15 02:10:31 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1270 | ||
1271 | * configure.in: Enable common options - endian, inline and | |
1272 | warnings. | |
1273 | * configure: Regenerate. | |
1274 | ||
1275 | Fri Mar 14 16:11:50 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1276 | ||
1277 | * Makefile.in (cpu.o): Update dependencies. | |
1278 | * cpu.c (is_condition_ok): Update PSW bit manipulations. | |
1279 | ||
1280 | Fri Mar 14 12:49:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1281 | ||
1282 | * configure.in: Autoconfig m4 | |
1283 | * configure: Regenerate. | |
1284 | ||
1285 | * Makefile.in: Use m4 to preprocess d30v-insns. | |
1286 | * d30v-insn: Adjust. | |
1287 | ||
1288 | Thu Mar 13 12:44:54 1997 Doug Evans <dje@canuck.cygnus.com> | |
1289 | ||
1290 | * sim-calls.c (sim_open): New SIM_DESC result. Argument is now | |
1291 | in argv form. | |
1292 | (other sim_*): New SIM_DESC argument. | |
1293 | ||
1294 | Wed Mar 12 19:05:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1295 | ||
1296 | * sim-calls.c (sim_open): Create all the d30v RAM blocks. | |
1297 | ||
1298 | * engine.c (engine_run_until_stop): Handle delayed subroutine | |
1299 | call. | |
1300 | * d30v-insn: Ditto. | |
1301 | ||
1302 | * ic-d30v: For Rb and Rc always return the value and not the | |
1303 | equation. | |
1304 | * d30v-insn: Use. | |
1305 | ||
1306 | * ic-d30v (val_Ra): Returns 0 or RA. | |
1307 | * d30v-insn: Use. | |
1308 | ||
1309 | * d30v-insn (make_even_reg, get_even_reg): New functions. Force | |
1310 | the register index to be even, issusing a warning if it was not. | |
1311 | (LD*, ST*): Use. | |
1312 | ||
1313 | Wed Mar 12 14:57:26 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1314 | ||
1315 | * d30v-insns (do_trap): Implement TRAP instruction. | |
1316 | ||
1317 | * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag | |
1318 | onto PSW bit. | |
1319 | * ic-d30v: Drop F* expressions. | |
1320 | * d30v-insn: Use more explicit PSW_FLAG_ ops. | |
1321 | * cpu.h (PSW_*): Redo PSW bit values. | |
1322 | * alu.h (ALU*_END): Update. Fix setting of overflow - logic was | |
1323 | backwards. | |
1324 | ||
1325 | * d30v-insn (MVFSYS, MVTSYS): Implement. | |
1326 | * cpu.h (PSWH, PSWL): New macros for high, low word of PSW. | |
1327 | ||
1328 | Wed Mar 12 14:12:11 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1329 | ||
1330 | * cpu.h (RPT_IS_CALL): New macro for processor field | |
1331 | is_delayed_call. That in turn used as a flag to indicate if a | |
1332 | delayed branch or delayed call is to occure. | |
1333 | * d30v-insns (do_dbra): Set/clear RPT_IS_CALL; | |
1334 | (do_dbrai): Ditto. | |
1335 | (do_dbsr): Ditto. | |
1336 | (do_dbsr): Ditto. | |
1337 | (do_djmp): Ditto. | |
1338 | (do_djmpi): Dotto. | |
1339 | (do_djsr): Ditto. | |
1340 | (do_djsri): Ditto. | |
1341 | (void): | |
1342 | ||
1343 | * d30v-insn (do_incr): Finish - handle modulo registers. | |
1344 | ||
1345 | * d30v-insns (CMPU): Include all possible compare | |
1346 | operations. Issue a warning where op defined by the processor | |
1347 | spec. | |
1348 | ||
1349 | Wed Mar 12 13:55:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1350 | ||
1351 | * d30v-insns: Add a new instruction class _EMUL and a new | |
1352 | instruction EMUL that emulates a few basic IO operations. | |
1353 | ||
1354 | * Makefile.in (tmp-igen): Filter in emul instructions. | |
1355 | ||
1356 | Fri Mar 7 20:32:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
1357 | ||
1358 | * d30v-insns (void): Fill in the gaps. | |
1359 | ||
1360 | Wed Feb 26 09:31:10 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au> | |
1361 | ||
1362 | * Makefile.in (tmp-igen): Include ic-d30v in dependencies. | |
1363 | ||
1364 | * ic-d30v (cache): Update to use H_word, L_word added to | |
1365 | sim-endian.h. | |
1366 | ||
1367 | Tue Feb 25 15:26:51 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au> | |
1368 | ||
1369 | * Makefile.in (tmp-igen): Correctly run $(MAKE). | |
1370 | ||
1371 | Thu Feb 20 20:30:31 1997 Andrew Cagney <cagney@critters.cygnus.com> | |
1372 | ||
1373 | * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated | |
1374 | files dependant on tmp-igen. Define ENGINE_H. | |
1375 | ||
1376 | Sun Feb 16 16:42:48 1997 Andrew Cagney <cagney@critters.cygnus.com> | |
1377 | ||
1378 | * configure.in: New file - follow Doug Evans instructions. | |
1379 | * Makefile.in: Ditto. | |
1380 |