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c906108c SS |
1 | /* fr30 exception, interrupt, and trap (EIT) support |
2 | Copyright (C) 1998, 1999 Free Software Foundation, Inc. | |
3 | Contributed by Cygnus Solutions. | |
4 | ||
5 | This file is part of the GNU simulators. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License along | |
18 | with this program; if not, write to the Free Software Foundation, Inc., | |
19 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "sim-main.h" | |
22 | #include "targ-vals.h" | |
23 | #include "cgen-engine.h" | |
24 | ||
25 | /* The semantic code invokes this for invalid (unrecognized) instructions. */ | |
26 | ||
27 | void | |
28 | sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia) | |
29 | { | |
30 | SIM_DESC sd = CPU_STATE (current_cpu); | |
31 | ||
32 | #if 0 | |
33 | if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) | |
34 | { | |
35 | h_bsm_set (current_cpu, h_sm_get (current_cpu)); | |
36 | h_bie_set (current_cpu, h_ie_get (current_cpu)); | |
37 | h_bcond_set (current_cpu, h_cond_get (current_cpu)); | |
38 | /* sm not changed */ | |
39 | h_ie_set (current_cpu, 0); | |
40 | h_cond_set (current_cpu, 0); | |
41 | ||
42 | h_bpc_set (current_cpu, cia); | |
43 | ||
44 | sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, | |
45 | EIT_RSVD_INSN_ADDR); | |
46 | } | |
47 | else | |
48 | #endif | |
49 | sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL); | |
50 | } | |
51 | ||
52 | /* Process an address exception. */ | |
53 | ||
54 | void | |
55 | fr30_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, | |
56 | unsigned int map, int nr_bytes, address_word addr, | |
57 | transfer_type transfer, sim_core_signals sig) | |
58 | { | |
59 | #if 0 | |
60 | if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) | |
61 | { | |
62 | h_bsm_set (current_cpu, h_sm_get (current_cpu)); | |
63 | h_bie_set (current_cpu, h_ie_get (current_cpu)); | |
64 | h_bcond_set (current_cpu, h_cond_get (current_cpu)); | |
65 | /* sm not changed */ | |
66 | h_ie_set (current_cpu, 0); | |
67 | h_cond_set (current_cpu, 0); | |
68 | ||
69 | h_bpc_set (current_cpu, cia); | |
70 | ||
71 | sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, | |
72 | EIT_ADDR_EXCP_ADDR); | |
73 | } | |
74 | else | |
75 | #endif | |
76 | sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, | |
77 | transfer, sig); | |
78 | } | |
79 | \f | |
80 | /* Read/write functions for system call interface. */ | |
81 | ||
82 | static int | |
83 | syscall_read_mem (host_callback *cb, struct cb_syscall *sc, | |
84 | unsigned long taddr, char *buf, int bytes) | |
85 | { | |
86 | SIM_DESC sd = (SIM_DESC) sc->p1; | |
87 | SIM_CPU *cpu = (SIM_CPU *) sc->p2; | |
88 | ||
89 | return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); | |
90 | } | |
91 | ||
92 | static int | |
93 | syscall_write_mem (host_callback *cb, struct cb_syscall *sc, | |
94 | unsigned long taddr, const char *buf, int bytes) | |
95 | { | |
96 | SIM_DESC sd = (SIM_DESC) sc->p1; | |
97 | SIM_CPU *cpu = (SIM_CPU *) sc->p2; | |
98 | ||
99 | return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); | |
100 | } | |
101 | ||
102 | /* Subroutine of fr30_int to save the PS and PC and setup for INT and INTE. */ | |
103 | ||
104 | static void | |
105 | setup_int (SIM_CPU *current_cpu, PCADDR pc) | |
106 | { | |
7a292a7a SS |
107 | USI ssp = fr30bf_h_dr_get (current_cpu, H_DR_SSP); |
108 | USI ps = fr30bf_h_ps_get (current_cpu); | |
c906108c SS |
109 | |
110 | ssp -= 4; | |
111 | SETMEMSI (current_cpu, pc, ssp, ps); | |
112 | ssp -= 4; | |
113 | SETMEMSI (current_cpu, pc, ssp, pc + 2); | |
7a292a7a SS |
114 | fr30bf_h_dr_set (current_cpu, H_DR_SSP, ssp); |
115 | fr30bf_h_sbit_set (current_cpu, 0); | |
c906108c SS |
116 | } |
117 | ||
118 | /* Trap support. | |
119 | The result is the pc address to continue at. | |
120 | Preprocessing like saving the various registers has already been done. */ | |
121 | ||
122 | USI | |
123 | fr30_int (SIM_CPU *current_cpu, PCADDR pc, int num) | |
124 | { | |
125 | SIM_DESC sd = CPU_STATE (current_cpu); | |
126 | host_callback *cb = STATE_CALLBACK (sd); | |
127 | ||
128 | #ifdef SIM_HAVE_BREAKPOINTS | |
129 | /* Check for breakpoints "owned" by the simulator first, regardless | |
130 | of --environment. */ | |
131 | if (num == TRAP_BREAKPOINT) | |
132 | { | |
133 | /* First try sim-break.c. If it's a breakpoint the simulator "owns" | |
134 | it doesn't return. Otherwise it returns and let's us try. */ | |
135 | sim_handle_breakpoint (sd, current_cpu, pc); | |
136 | /* Fall through. */ | |
137 | } | |
138 | #endif | |
139 | ||
140 | if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) | |
141 | { | |
142 | /* The new pc is the trap vector entry. | |
143 | We assume there's a branch there to some handler. */ | |
144 | USI new_pc; | |
145 | setup_int (current_cpu, pc); | |
7a292a7a | 146 | fr30bf_h_ibit_set (current_cpu, 0); |
c906108c | 147 | new_pc = GETMEMSI (current_cpu, pc, |
7a292a7a | 148 | fr30bf_h_dr_get (current_cpu, H_DR_TBR) |
c906108c SS |
149 | + 1024 - ((num + 1) * 4)); |
150 | return new_pc; | |
151 | } | |
152 | ||
153 | switch (num) | |
154 | { | |
155 | case TRAP_SYSCALL : | |
156 | { | |
157 | /* TODO: find out what the ABI for this is */ | |
158 | CB_SYSCALL s; | |
159 | ||
160 | CB_SYSCALL_INIT (&s); | |
7a292a7a SS |
161 | s.func = fr30bf_h_gr_get (current_cpu, 0); |
162 | s.arg1 = fr30bf_h_gr_get (current_cpu, 4); | |
163 | s.arg2 = fr30bf_h_gr_get (current_cpu, 5); | |
164 | s.arg3 = fr30bf_h_gr_get (current_cpu, 6); | |
c906108c SS |
165 | |
166 | if (s.func == TARGET_SYS_exit) | |
167 | { | |
168 | sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1); | |
169 | } | |
170 | ||
171 | s.p1 = (PTR) sd; | |
172 | s.p2 = (PTR) current_cpu; | |
173 | s.read_mem = syscall_read_mem; | |
174 | s.write_mem = syscall_write_mem; | |
175 | cb_syscall (cb, &s); | |
7a292a7a SS |
176 | fr30bf_h_gr_set (current_cpu, 2, s.errcode); /* TODO: check this one */ |
177 | fr30bf_h_gr_set (current_cpu, 4, s.result); | |
178 | fr30bf_h_gr_set (current_cpu, 1, s.result2); /* TODO: check this one */ | |
c906108c SS |
179 | break; |
180 | } | |
181 | ||
182 | case TRAP_BREAKPOINT: | |
183 | sim_engine_halt (sd, current_cpu, NULL, pc, | |
184 | sim_stopped, SIM_SIGTRAP); | |
185 | break; | |
186 | ||
187 | default : | |
188 | { | |
189 | USI new_pc; | |
190 | setup_int (current_cpu, pc); | |
7a292a7a | 191 | fr30bf_h_ibit_set (current_cpu, 0); |
c906108c | 192 | new_pc = GETMEMSI (current_cpu, pc, |
7a292a7a | 193 | fr30bf_h_dr_get (current_cpu, H_DR_TBR) |
c906108c SS |
194 | + 1024 - ((num + 1) * 4)); |
195 | return new_pc; | |
196 | } | |
197 | } | |
198 | ||
199 | /* Fake an "reti" insn. | |
200 | Since we didn't push anything to stack, all we need to do is | |
201 | update pc. */ | |
202 | return pc + 2; | |
203 | } | |
204 | ||
205 | USI | |
206 | fr30_inte (SIM_CPU *current_cpu, PCADDR pc, int num) | |
207 | { | |
208 | /* The new pc is the trap #9 vector entry. | |
209 | We assume there's a branch there to some handler. */ | |
210 | USI new_pc; | |
211 | setup_int (current_cpu, pc); | |
7a292a7a | 212 | fr30bf_h_ilm_set (current_cpu, 4); |
c906108c | 213 | new_pc = GETMEMSI (current_cpu, pc, |
7a292a7a | 214 | fr30bf_h_dr_get (current_cpu, H_DR_TBR) |
c906108c SS |
215 | + 1024 - ((9 + 1) * 4)); |
216 | return new_pc; | |
217 | } |