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c906108c SS |
1 | /* Simulator instruction decoder for i960base. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
5 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. | |
6 | ||
7 | This file is part of the GNU Simulators. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #define WANT_CPU i960base | |
26 | #define WANT_CPU_I960BASE | |
27 | ||
28 | #include "sim-main.h" | |
29 | #include "sim-assert.h" | |
30 | ||
31 | /* FIXME: Need to review choices for the following. */ | |
32 | ||
33 | #if WITH_SEM_SWITCH_FULL | |
34 | #define FULL(fn) | |
35 | #else | |
36 | #define FULL(fn) CONCAT3 (i960base,_sem_,fn) , | |
37 | #endif | |
38 | ||
39 | #if WITH_FAST | |
40 | #if WITH_SEM_SWITCH_FAST | |
41 | #define FAST(fn) | |
42 | #else | |
43 | #define FAST(fn) CONCAT3 (i960base,_semf_,fn) , /* f for fast */ | |
44 | #endif | |
45 | #else | |
46 | #define FAST(fn) | |
47 | #endif | |
48 | ||
7a292a7a SS |
49 | /* The INSN_ prefix is not here and is instead part of the `insn' argument |
50 | to avoid collisions with header files (e.g. `AND' in ansidecl.h). */ | |
51 | #define IDX(insn) CONCAT2 (I960BASE_,insn) | |
52 | #define TYPE(insn) CONCAT2 (I960_,insn) | |
53 | ||
c906108c SS |
54 | /* The instruction descriptor array. |
55 | This is computed at runtime. Space for it is not malloc'd to save a | |
56 | teensy bit of cpu in the decoder. Moving it to malloc space is trivial | |
57 | but won't be done until necessary (we don't currently support the runtime | |
58 | addition of instructions nor an SMP machine with different cpus). */ | |
59 | static IDESC i960base_insn_data[I960BASE_INSN_MAX]; | |
60 | ||
c906108c SS |
61 | /* Commas between elements are contained in the macros. |
62 | Some of these are conditionally compiled out. */ | |
63 | ||
64 | static const struct insn_sem i960base_insn_sem[] = | |
65 | { | |
66 | { VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid) }, | |
67 | { VIRTUAL_INSN_X_AFTER, IDX (INSN_X_AFTER), FULL (x_after) FAST (x_after) }, | |
68 | { VIRTUAL_INSN_X_BEFORE, IDX (INSN_X_BEFORE), FULL (x_before) FAST (x_before) }, | |
69 | { VIRTUAL_INSN_X_CTI_CHAIN, IDX (INSN_X_CTI_CHAIN), FULL (x_cti_chain) FAST (x_cti_chain) }, | |
70 | { VIRTUAL_INSN_X_CHAIN, IDX (INSN_X_CHAIN), FULL (x_chain) FAST (x_chain) }, | |
71 | { VIRTUAL_INSN_X_BEGIN, IDX (INSN_X_BEGIN), FULL (x_begin) FAST (x_begin) }, | |
72 | { TYPE (INSN_MULO), IDX (INSN_MULO), FULL (mulo) FAST (mulo) }, | |
73 | { TYPE (INSN_MULO1), IDX (INSN_MULO1), FULL (mulo1) FAST (mulo1) }, | |
74 | { TYPE (INSN_MULO2), IDX (INSN_MULO2), FULL (mulo2) FAST (mulo2) }, | |
75 | { TYPE (INSN_MULO3), IDX (INSN_MULO3), FULL (mulo3) FAST (mulo3) }, | |
76 | { TYPE (INSN_REMO), IDX (INSN_REMO), FULL (remo) FAST (remo) }, | |
77 | { TYPE (INSN_REMO1), IDX (INSN_REMO1), FULL (remo1) FAST (remo1) }, | |
78 | { TYPE (INSN_REMO2), IDX (INSN_REMO2), FULL (remo2) FAST (remo2) }, | |
79 | { TYPE (INSN_REMO3), IDX (INSN_REMO3), FULL (remo3) FAST (remo3) }, | |
80 | { TYPE (INSN_DIVO), IDX (INSN_DIVO), FULL (divo) FAST (divo) }, | |
81 | { TYPE (INSN_DIVO1), IDX (INSN_DIVO1), FULL (divo1) FAST (divo1) }, | |
82 | { TYPE (INSN_DIVO2), IDX (INSN_DIVO2), FULL (divo2) FAST (divo2) }, | |
83 | { TYPE (INSN_DIVO3), IDX (INSN_DIVO3), FULL (divo3) FAST (divo3) }, | |
84 | { TYPE (INSN_REMI), IDX (INSN_REMI), FULL (remi) FAST (remi) }, | |
85 | { TYPE (INSN_REMI1), IDX (INSN_REMI1), FULL (remi1) FAST (remi1) }, | |
86 | { TYPE (INSN_REMI2), IDX (INSN_REMI2), FULL (remi2) FAST (remi2) }, | |
87 | { TYPE (INSN_REMI3), IDX (INSN_REMI3), FULL (remi3) FAST (remi3) }, | |
88 | { TYPE (INSN_DIVI), IDX (INSN_DIVI), FULL (divi) FAST (divi) }, | |
89 | { TYPE (INSN_DIVI1), IDX (INSN_DIVI1), FULL (divi1) FAST (divi1) }, | |
90 | { TYPE (INSN_DIVI2), IDX (INSN_DIVI2), FULL (divi2) FAST (divi2) }, | |
91 | { TYPE (INSN_DIVI3), IDX (INSN_DIVI3), FULL (divi3) FAST (divi3) }, | |
92 | { TYPE (INSN_ADDO), IDX (INSN_ADDO), FULL (addo) FAST (addo) }, | |
93 | { TYPE (INSN_ADDO1), IDX (INSN_ADDO1), FULL (addo1) FAST (addo1) }, | |
94 | { TYPE (INSN_ADDO2), IDX (INSN_ADDO2), FULL (addo2) FAST (addo2) }, | |
95 | { TYPE (INSN_ADDO3), IDX (INSN_ADDO3), FULL (addo3) FAST (addo3) }, | |
96 | { TYPE (INSN_SUBO), IDX (INSN_SUBO), FULL (subo) FAST (subo) }, | |
97 | { TYPE (INSN_SUBO1), IDX (INSN_SUBO1), FULL (subo1) FAST (subo1) }, | |
98 | { TYPE (INSN_SUBO2), IDX (INSN_SUBO2), FULL (subo2) FAST (subo2) }, | |
99 | { TYPE (INSN_SUBO3), IDX (INSN_SUBO3), FULL (subo3) FAST (subo3) }, | |
100 | { TYPE (INSN_NOTBIT), IDX (INSN_NOTBIT), FULL (notbit) FAST (notbit) }, | |
101 | { TYPE (INSN_NOTBIT1), IDX (INSN_NOTBIT1), FULL (notbit1) FAST (notbit1) }, | |
102 | { TYPE (INSN_NOTBIT2), IDX (INSN_NOTBIT2), FULL (notbit2) FAST (notbit2) }, | |
103 | { TYPE (INSN_NOTBIT3), IDX (INSN_NOTBIT3), FULL (notbit3) FAST (notbit3) }, | |
104 | { TYPE (INSN_AND), IDX (INSN_AND), FULL (and) FAST (and) }, | |
105 | { TYPE (INSN_AND1), IDX (INSN_AND1), FULL (and1) FAST (and1) }, | |
106 | { TYPE (INSN_AND2), IDX (INSN_AND2), FULL (and2) FAST (and2) }, | |
107 | { TYPE (INSN_AND3), IDX (INSN_AND3), FULL (and3) FAST (and3) }, | |
108 | { TYPE (INSN_ANDNOT), IDX (INSN_ANDNOT), FULL (andnot) FAST (andnot) }, | |
109 | { TYPE (INSN_ANDNOT1), IDX (INSN_ANDNOT1), FULL (andnot1) FAST (andnot1) }, | |
110 | { TYPE (INSN_ANDNOT2), IDX (INSN_ANDNOT2), FULL (andnot2) FAST (andnot2) }, | |
111 | { TYPE (INSN_ANDNOT3), IDX (INSN_ANDNOT3), FULL (andnot3) FAST (andnot3) }, | |
112 | { TYPE (INSN_SETBIT), IDX (INSN_SETBIT), FULL (setbit) FAST (setbit) }, | |
113 | { TYPE (INSN_SETBIT1), IDX (INSN_SETBIT1), FULL (setbit1) FAST (setbit1) }, | |
114 | { TYPE (INSN_SETBIT2), IDX (INSN_SETBIT2), FULL (setbit2) FAST (setbit2) }, | |
115 | { TYPE (INSN_SETBIT3), IDX (INSN_SETBIT3), FULL (setbit3) FAST (setbit3) }, | |
116 | { TYPE (INSN_NOTAND), IDX (INSN_NOTAND), FULL (notand) FAST (notand) }, | |
117 | { TYPE (INSN_NOTAND1), IDX (INSN_NOTAND1), FULL (notand1) FAST (notand1) }, | |
118 | { TYPE (INSN_NOTAND2), IDX (INSN_NOTAND2), FULL (notand2) FAST (notand2) }, | |
119 | { TYPE (INSN_NOTAND3), IDX (INSN_NOTAND3), FULL (notand3) FAST (notand3) }, | |
120 | { TYPE (INSN_XOR), IDX (INSN_XOR), FULL (xor) FAST (xor) }, | |
121 | { TYPE (INSN_XOR1), IDX (INSN_XOR1), FULL (xor1) FAST (xor1) }, | |
122 | { TYPE (INSN_XOR2), IDX (INSN_XOR2), FULL (xor2) FAST (xor2) }, | |
123 | { TYPE (INSN_XOR3), IDX (INSN_XOR3), FULL (xor3) FAST (xor3) }, | |
124 | { TYPE (INSN_OR), IDX (INSN_OR), FULL (or) FAST (or) }, | |
125 | { TYPE (INSN_OR1), IDX (INSN_OR1), FULL (or1) FAST (or1) }, | |
126 | { TYPE (INSN_OR2), IDX (INSN_OR2), FULL (or2) FAST (or2) }, | |
127 | { TYPE (INSN_OR3), IDX (INSN_OR3), FULL (or3) FAST (or3) }, | |
128 | { TYPE (INSN_NOR), IDX (INSN_NOR), FULL (nor) FAST (nor) }, | |
129 | { TYPE (INSN_NOR1), IDX (INSN_NOR1), FULL (nor1) FAST (nor1) }, | |
130 | { TYPE (INSN_NOR2), IDX (INSN_NOR2), FULL (nor2) FAST (nor2) }, | |
131 | { TYPE (INSN_NOR3), IDX (INSN_NOR3), FULL (nor3) FAST (nor3) }, | |
7a292a7a SS |
132 | { TYPE (INSN_XNOR), IDX (INSN_XNOR), FULL (xnor) FAST (xnor) }, |
133 | { TYPE (INSN_XNOR1), IDX (INSN_XNOR1), FULL (xnor1) FAST (xnor1) }, | |
134 | { TYPE (INSN_XNOR2), IDX (INSN_XNOR2), FULL (xnor2) FAST (xnor2) }, | |
135 | { TYPE (INSN_XNOR3), IDX (INSN_XNOR3), FULL (xnor3) FAST (xnor3) }, | |
c906108c SS |
136 | { TYPE (INSN_NOT), IDX (INSN_NOT), FULL (not) FAST (not) }, |
137 | { TYPE (INSN_NOT1), IDX (INSN_NOT1), FULL (not1) FAST (not1) }, | |
138 | { TYPE (INSN_NOT2), IDX (INSN_NOT2), FULL (not2) FAST (not2) }, | |
139 | { TYPE (INSN_NOT3), IDX (INSN_NOT3), FULL (not3) FAST (not3) }, | |
7a292a7a SS |
140 | { TYPE (INSN_ORNOT), IDX (INSN_ORNOT), FULL (ornot) FAST (ornot) }, |
141 | { TYPE (INSN_ORNOT1), IDX (INSN_ORNOT1), FULL (ornot1) FAST (ornot1) }, | |
142 | { TYPE (INSN_ORNOT2), IDX (INSN_ORNOT2), FULL (ornot2) FAST (ornot2) }, | |
143 | { TYPE (INSN_ORNOT3), IDX (INSN_ORNOT3), FULL (ornot3) FAST (ornot3) }, | |
c906108c SS |
144 | { TYPE (INSN_CLRBIT), IDX (INSN_CLRBIT), FULL (clrbit) FAST (clrbit) }, |
145 | { TYPE (INSN_CLRBIT1), IDX (INSN_CLRBIT1), FULL (clrbit1) FAST (clrbit1) }, | |
146 | { TYPE (INSN_CLRBIT2), IDX (INSN_CLRBIT2), FULL (clrbit2) FAST (clrbit2) }, | |
147 | { TYPE (INSN_CLRBIT3), IDX (INSN_CLRBIT3), FULL (clrbit3) FAST (clrbit3) }, | |
148 | { TYPE (INSN_SHLO), IDX (INSN_SHLO), FULL (shlo) FAST (shlo) }, | |
149 | { TYPE (INSN_SHLO1), IDX (INSN_SHLO1), FULL (shlo1) FAST (shlo1) }, | |
150 | { TYPE (INSN_SHLO2), IDX (INSN_SHLO2), FULL (shlo2) FAST (shlo2) }, | |
151 | { TYPE (INSN_SHLO3), IDX (INSN_SHLO3), FULL (shlo3) FAST (shlo3) }, | |
152 | { TYPE (INSN_SHRO), IDX (INSN_SHRO), FULL (shro) FAST (shro) }, | |
153 | { TYPE (INSN_SHRO1), IDX (INSN_SHRO1), FULL (shro1) FAST (shro1) }, | |
154 | { TYPE (INSN_SHRO2), IDX (INSN_SHRO2), FULL (shro2) FAST (shro2) }, | |
155 | { TYPE (INSN_SHRO3), IDX (INSN_SHRO3), FULL (shro3) FAST (shro3) }, | |
156 | { TYPE (INSN_SHLI), IDX (INSN_SHLI), FULL (shli) FAST (shli) }, | |
157 | { TYPE (INSN_SHLI1), IDX (INSN_SHLI1), FULL (shli1) FAST (shli1) }, | |
158 | { TYPE (INSN_SHLI2), IDX (INSN_SHLI2), FULL (shli2) FAST (shli2) }, | |
159 | { TYPE (INSN_SHLI3), IDX (INSN_SHLI3), FULL (shli3) FAST (shli3) }, | |
160 | { TYPE (INSN_SHRI), IDX (INSN_SHRI), FULL (shri) FAST (shri) }, | |
161 | { TYPE (INSN_SHRI1), IDX (INSN_SHRI1), FULL (shri1) FAST (shri1) }, | |
162 | { TYPE (INSN_SHRI2), IDX (INSN_SHRI2), FULL (shri2) FAST (shri2) }, | |
163 | { TYPE (INSN_SHRI3), IDX (INSN_SHRI3), FULL (shri3) FAST (shri3) }, | |
164 | { TYPE (INSN_EMUL), IDX (INSN_EMUL), FULL (emul) FAST (emul) }, | |
165 | { TYPE (INSN_EMUL1), IDX (INSN_EMUL1), FULL (emul1) FAST (emul1) }, | |
166 | { TYPE (INSN_EMUL2), IDX (INSN_EMUL2), FULL (emul2) FAST (emul2) }, | |
167 | { TYPE (INSN_EMUL3), IDX (INSN_EMUL3), FULL (emul3) FAST (emul3) }, | |
168 | { TYPE (INSN_MOV), IDX (INSN_MOV), FULL (mov) FAST (mov) }, | |
169 | { TYPE (INSN_MOV1), IDX (INSN_MOV1), FULL (mov1) FAST (mov1) }, | |
170 | { TYPE (INSN_MOVL), IDX (INSN_MOVL), FULL (movl) FAST (movl) }, | |
171 | { TYPE (INSN_MOVL1), IDX (INSN_MOVL1), FULL (movl1) FAST (movl1) }, | |
172 | { TYPE (INSN_MOVT), IDX (INSN_MOVT), FULL (movt) FAST (movt) }, | |
173 | { TYPE (INSN_MOVT1), IDX (INSN_MOVT1), FULL (movt1) FAST (movt1) }, | |
174 | { TYPE (INSN_MOVQ), IDX (INSN_MOVQ), FULL (movq) FAST (movq) }, | |
175 | { TYPE (INSN_MOVQ1), IDX (INSN_MOVQ1), FULL (movq1) FAST (movq1) }, | |
176 | { TYPE (INSN_MODPC), IDX (INSN_MODPC), FULL (modpc) FAST (modpc) }, | |
177 | { TYPE (INSN_MODAC), IDX (INSN_MODAC), FULL (modac) FAST (modac) }, | |
178 | { TYPE (INSN_LDA_OFFSET), IDX (INSN_LDA_OFFSET), FULL (lda_offset) FAST (lda_offset) }, | |
179 | { TYPE (INSN_LDA_INDIRECT_OFFSET), IDX (INSN_LDA_INDIRECT_OFFSET), FULL (lda_indirect_offset) FAST (lda_indirect_offset) }, | |
180 | { TYPE (INSN_LDA_INDIRECT), IDX (INSN_LDA_INDIRECT), FULL (lda_indirect) FAST (lda_indirect) }, | |
181 | { TYPE (INSN_LDA_INDIRECT_INDEX), IDX (INSN_LDA_INDIRECT_INDEX), FULL (lda_indirect_index) FAST (lda_indirect_index) }, | |
182 | { TYPE (INSN_LDA_DISP), IDX (INSN_LDA_DISP), FULL (lda_disp) FAST (lda_disp) }, | |
183 | { TYPE (INSN_LDA_INDIRECT_DISP), IDX (INSN_LDA_INDIRECT_DISP), FULL (lda_indirect_disp) FAST (lda_indirect_disp) }, | |
184 | { TYPE (INSN_LDA_INDEX_DISP), IDX (INSN_LDA_INDEX_DISP), FULL (lda_index_disp) FAST (lda_index_disp) }, | |
185 | { TYPE (INSN_LDA_INDIRECT_INDEX_DISP), IDX (INSN_LDA_INDIRECT_INDEX_DISP), FULL (lda_indirect_index_disp) FAST (lda_indirect_index_disp) }, | |
186 | { TYPE (INSN_LD_OFFSET), IDX (INSN_LD_OFFSET), FULL (ld_offset) FAST (ld_offset) }, | |
187 | { TYPE (INSN_LD_INDIRECT_OFFSET), IDX (INSN_LD_INDIRECT_OFFSET), FULL (ld_indirect_offset) FAST (ld_indirect_offset) }, | |
188 | { TYPE (INSN_LD_INDIRECT), IDX (INSN_LD_INDIRECT), FULL (ld_indirect) FAST (ld_indirect) }, | |
189 | { TYPE (INSN_LD_INDIRECT_INDEX), IDX (INSN_LD_INDIRECT_INDEX), FULL (ld_indirect_index) FAST (ld_indirect_index) }, | |
190 | { TYPE (INSN_LD_DISP), IDX (INSN_LD_DISP), FULL (ld_disp) FAST (ld_disp) }, | |
191 | { TYPE (INSN_LD_INDIRECT_DISP), IDX (INSN_LD_INDIRECT_DISP), FULL (ld_indirect_disp) FAST (ld_indirect_disp) }, | |
192 | { TYPE (INSN_LD_INDEX_DISP), IDX (INSN_LD_INDEX_DISP), FULL (ld_index_disp) FAST (ld_index_disp) }, | |
193 | { TYPE (INSN_LD_INDIRECT_INDEX_DISP), IDX (INSN_LD_INDIRECT_INDEX_DISP), FULL (ld_indirect_index_disp) FAST (ld_indirect_index_disp) }, | |
194 | { TYPE (INSN_LDOB_OFFSET), IDX (INSN_LDOB_OFFSET), FULL (ldob_offset) FAST (ldob_offset) }, | |
195 | { TYPE (INSN_LDOB_INDIRECT_OFFSET), IDX (INSN_LDOB_INDIRECT_OFFSET), FULL (ldob_indirect_offset) FAST (ldob_indirect_offset) }, | |
196 | { TYPE (INSN_LDOB_INDIRECT), IDX (INSN_LDOB_INDIRECT), FULL (ldob_indirect) FAST (ldob_indirect) }, | |
197 | { TYPE (INSN_LDOB_INDIRECT_INDEX), IDX (INSN_LDOB_INDIRECT_INDEX), FULL (ldob_indirect_index) FAST (ldob_indirect_index) }, | |
198 | { TYPE (INSN_LDOB_DISP), IDX (INSN_LDOB_DISP), FULL (ldob_disp) FAST (ldob_disp) }, | |
199 | { TYPE (INSN_LDOB_INDIRECT_DISP), IDX (INSN_LDOB_INDIRECT_DISP), FULL (ldob_indirect_disp) FAST (ldob_indirect_disp) }, | |
200 | { TYPE (INSN_LDOB_INDEX_DISP), IDX (INSN_LDOB_INDEX_DISP), FULL (ldob_index_disp) FAST (ldob_index_disp) }, | |
201 | { TYPE (INSN_LDOB_INDIRECT_INDEX_DISP), IDX (INSN_LDOB_INDIRECT_INDEX_DISP), FULL (ldob_indirect_index_disp) FAST (ldob_indirect_index_disp) }, | |
202 | { TYPE (INSN_LDOS_OFFSET), IDX (INSN_LDOS_OFFSET), FULL (ldos_offset) FAST (ldos_offset) }, | |
203 | { TYPE (INSN_LDOS_INDIRECT_OFFSET), IDX (INSN_LDOS_INDIRECT_OFFSET), FULL (ldos_indirect_offset) FAST (ldos_indirect_offset) }, | |
204 | { TYPE (INSN_LDOS_INDIRECT), IDX (INSN_LDOS_INDIRECT), FULL (ldos_indirect) FAST (ldos_indirect) }, | |
205 | { TYPE (INSN_LDOS_INDIRECT_INDEX), IDX (INSN_LDOS_INDIRECT_INDEX), FULL (ldos_indirect_index) FAST (ldos_indirect_index) }, | |
206 | { TYPE (INSN_LDOS_DISP), IDX (INSN_LDOS_DISP), FULL (ldos_disp) FAST (ldos_disp) }, | |
207 | { TYPE (INSN_LDOS_INDIRECT_DISP), IDX (INSN_LDOS_INDIRECT_DISP), FULL (ldos_indirect_disp) FAST (ldos_indirect_disp) }, | |
208 | { TYPE (INSN_LDOS_INDEX_DISP), IDX (INSN_LDOS_INDEX_DISP), FULL (ldos_index_disp) FAST (ldos_index_disp) }, | |
209 | { TYPE (INSN_LDOS_INDIRECT_INDEX_DISP), IDX (INSN_LDOS_INDIRECT_INDEX_DISP), FULL (ldos_indirect_index_disp) FAST (ldos_indirect_index_disp) }, | |
210 | { TYPE (INSN_LDIB_OFFSET), IDX (INSN_LDIB_OFFSET), FULL (ldib_offset) FAST (ldib_offset) }, | |
211 | { TYPE (INSN_LDIB_INDIRECT_OFFSET), IDX (INSN_LDIB_INDIRECT_OFFSET), FULL (ldib_indirect_offset) FAST (ldib_indirect_offset) }, | |
212 | { TYPE (INSN_LDIB_INDIRECT), IDX (INSN_LDIB_INDIRECT), FULL (ldib_indirect) FAST (ldib_indirect) }, | |
213 | { TYPE (INSN_LDIB_INDIRECT_INDEX), IDX (INSN_LDIB_INDIRECT_INDEX), FULL (ldib_indirect_index) FAST (ldib_indirect_index) }, | |
214 | { TYPE (INSN_LDIB_DISP), IDX (INSN_LDIB_DISP), FULL (ldib_disp) FAST (ldib_disp) }, | |
215 | { TYPE (INSN_LDIB_INDIRECT_DISP), IDX (INSN_LDIB_INDIRECT_DISP), FULL (ldib_indirect_disp) FAST (ldib_indirect_disp) }, | |
216 | { TYPE (INSN_LDIB_INDEX_DISP), IDX (INSN_LDIB_INDEX_DISP), FULL (ldib_index_disp) FAST (ldib_index_disp) }, | |
217 | { TYPE (INSN_LDIB_INDIRECT_INDEX_DISP), IDX (INSN_LDIB_INDIRECT_INDEX_DISP), FULL (ldib_indirect_index_disp) FAST (ldib_indirect_index_disp) }, | |
218 | { TYPE (INSN_LDIS_OFFSET), IDX (INSN_LDIS_OFFSET), FULL (ldis_offset) FAST (ldis_offset) }, | |
219 | { TYPE (INSN_LDIS_INDIRECT_OFFSET), IDX (INSN_LDIS_INDIRECT_OFFSET), FULL (ldis_indirect_offset) FAST (ldis_indirect_offset) }, | |
220 | { TYPE (INSN_LDIS_INDIRECT), IDX (INSN_LDIS_INDIRECT), FULL (ldis_indirect) FAST (ldis_indirect) }, | |
221 | { TYPE (INSN_LDIS_INDIRECT_INDEX), IDX (INSN_LDIS_INDIRECT_INDEX), FULL (ldis_indirect_index) FAST (ldis_indirect_index) }, | |
222 | { TYPE (INSN_LDIS_DISP), IDX (INSN_LDIS_DISP), FULL (ldis_disp) FAST (ldis_disp) }, | |
223 | { TYPE (INSN_LDIS_INDIRECT_DISP), IDX (INSN_LDIS_INDIRECT_DISP), FULL (ldis_indirect_disp) FAST (ldis_indirect_disp) }, | |
224 | { TYPE (INSN_LDIS_INDEX_DISP), IDX (INSN_LDIS_INDEX_DISP), FULL (ldis_index_disp) FAST (ldis_index_disp) }, | |
225 | { TYPE (INSN_LDIS_INDIRECT_INDEX_DISP), IDX (INSN_LDIS_INDIRECT_INDEX_DISP), FULL (ldis_indirect_index_disp) FAST (ldis_indirect_index_disp) }, | |
226 | { TYPE (INSN_LDL_OFFSET), IDX (INSN_LDL_OFFSET), FULL (ldl_offset) FAST (ldl_offset) }, | |
227 | { TYPE (INSN_LDL_INDIRECT_OFFSET), IDX (INSN_LDL_INDIRECT_OFFSET), FULL (ldl_indirect_offset) FAST (ldl_indirect_offset) }, | |
228 | { TYPE (INSN_LDL_INDIRECT), IDX (INSN_LDL_INDIRECT), FULL (ldl_indirect) FAST (ldl_indirect) }, | |
229 | { TYPE (INSN_LDL_INDIRECT_INDEX), IDX (INSN_LDL_INDIRECT_INDEX), FULL (ldl_indirect_index) FAST (ldl_indirect_index) }, | |
230 | { TYPE (INSN_LDL_DISP), IDX (INSN_LDL_DISP), FULL (ldl_disp) FAST (ldl_disp) }, | |
231 | { TYPE (INSN_LDL_INDIRECT_DISP), IDX (INSN_LDL_INDIRECT_DISP), FULL (ldl_indirect_disp) FAST (ldl_indirect_disp) }, | |
232 | { TYPE (INSN_LDL_INDEX_DISP), IDX (INSN_LDL_INDEX_DISP), FULL (ldl_index_disp) FAST (ldl_index_disp) }, | |
233 | { TYPE (INSN_LDL_INDIRECT_INDEX_DISP), IDX (INSN_LDL_INDIRECT_INDEX_DISP), FULL (ldl_indirect_index_disp) FAST (ldl_indirect_index_disp) }, | |
234 | { TYPE (INSN_LDT_OFFSET), IDX (INSN_LDT_OFFSET), FULL (ldt_offset) FAST (ldt_offset) }, | |
235 | { TYPE (INSN_LDT_INDIRECT_OFFSET), IDX (INSN_LDT_INDIRECT_OFFSET), FULL (ldt_indirect_offset) FAST (ldt_indirect_offset) }, | |
236 | { TYPE (INSN_LDT_INDIRECT), IDX (INSN_LDT_INDIRECT), FULL (ldt_indirect) FAST (ldt_indirect) }, | |
237 | { TYPE (INSN_LDT_INDIRECT_INDEX), IDX (INSN_LDT_INDIRECT_INDEX), FULL (ldt_indirect_index) FAST (ldt_indirect_index) }, | |
238 | { TYPE (INSN_LDT_DISP), IDX (INSN_LDT_DISP), FULL (ldt_disp) FAST (ldt_disp) }, | |
239 | { TYPE (INSN_LDT_INDIRECT_DISP), IDX (INSN_LDT_INDIRECT_DISP), FULL (ldt_indirect_disp) FAST (ldt_indirect_disp) }, | |
240 | { TYPE (INSN_LDT_INDEX_DISP), IDX (INSN_LDT_INDEX_DISP), FULL (ldt_index_disp) FAST (ldt_index_disp) }, | |
241 | { TYPE (INSN_LDT_INDIRECT_INDEX_DISP), IDX (INSN_LDT_INDIRECT_INDEX_DISP), FULL (ldt_indirect_index_disp) FAST (ldt_indirect_index_disp) }, | |
242 | { TYPE (INSN_LDQ_OFFSET), IDX (INSN_LDQ_OFFSET), FULL (ldq_offset) FAST (ldq_offset) }, | |
243 | { TYPE (INSN_LDQ_INDIRECT_OFFSET), IDX (INSN_LDQ_INDIRECT_OFFSET), FULL (ldq_indirect_offset) FAST (ldq_indirect_offset) }, | |
244 | { TYPE (INSN_LDQ_INDIRECT), IDX (INSN_LDQ_INDIRECT), FULL (ldq_indirect) FAST (ldq_indirect) }, | |
245 | { TYPE (INSN_LDQ_INDIRECT_INDEX), IDX (INSN_LDQ_INDIRECT_INDEX), FULL (ldq_indirect_index) FAST (ldq_indirect_index) }, | |
246 | { TYPE (INSN_LDQ_DISP), IDX (INSN_LDQ_DISP), FULL (ldq_disp) FAST (ldq_disp) }, | |
247 | { TYPE (INSN_LDQ_INDIRECT_DISP), IDX (INSN_LDQ_INDIRECT_DISP), FULL (ldq_indirect_disp) FAST (ldq_indirect_disp) }, | |
248 | { TYPE (INSN_LDQ_INDEX_DISP), IDX (INSN_LDQ_INDEX_DISP), FULL (ldq_index_disp) FAST (ldq_index_disp) }, | |
249 | { TYPE (INSN_LDQ_INDIRECT_INDEX_DISP), IDX (INSN_LDQ_INDIRECT_INDEX_DISP), FULL (ldq_indirect_index_disp) FAST (ldq_indirect_index_disp) }, | |
250 | { TYPE (INSN_ST_OFFSET), IDX (INSN_ST_OFFSET), FULL (st_offset) FAST (st_offset) }, | |
251 | { TYPE (INSN_ST_INDIRECT_OFFSET), IDX (INSN_ST_INDIRECT_OFFSET), FULL (st_indirect_offset) FAST (st_indirect_offset) }, | |
252 | { TYPE (INSN_ST_INDIRECT), IDX (INSN_ST_INDIRECT), FULL (st_indirect) FAST (st_indirect) }, | |
253 | { TYPE (INSN_ST_INDIRECT_INDEX), IDX (INSN_ST_INDIRECT_INDEX), FULL (st_indirect_index) FAST (st_indirect_index) }, | |
254 | { TYPE (INSN_ST_DISP), IDX (INSN_ST_DISP), FULL (st_disp) FAST (st_disp) }, | |
255 | { TYPE (INSN_ST_INDIRECT_DISP), IDX (INSN_ST_INDIRECT_DISP), FULL (st_indirect_disp) FAST (st_indirect_disp) }, | |
256 | { TYPE (INSN_ST_INDEX_DISP), IDX (INSN_ST_INDEX_DISP), FULL (st_index_disp) FAST (st_index_disp) }, | |
257 | { TYPE (INSN_ST_INDIRECT_INDEX_DISP), IDX (INSN_ST_INDIRECT_INDEX_DISP), FULL (st_indirect_index_disp) FAST (st_indirect_index_disp) }, | |
258 | { TYPE (INSN_STOB_OFFSET), IDX (INSN_STOB_OFFSET), FULL (stob_offset) FAST (stob_offset) }, | |
259 | { TYPE (INSN_STOB_INDIRECT_OFFSET), IDX (INSN_STOB_INDIRECT_OFFSET), FULL (stob_indirect_offset) FAST (stob_indirect_offset) }, | |
260 | { TYPE (INSN_STOB_INDIRECT), IDX (INSN_STOB_INDIRECT), FULL (stob_indirect) FAST (stob_indirect) }, | |
261 | { TYPE (INSN_STOB_INDIRECT_INDEX), IDX (INSN_STOB_INDIRECT_INDEX), FULL (stob_indirect_index) FAST (stob_indirect_index) }, | |
262 | { TYPE (INSN_STOB_DISP), IDX (INSN_STOB_DISP), FULL (stob_disp) FAST (stob_disp) }, | |
263 | { TYPE (INSN_STOB_INDIRECT_DISP), IDX (INSN_STOB_INDIRECT_DISP), FULL (stob_indirect_disp) FAST (stob_indirect_disp) }, | |
264 | { TYPE (INSN_STOB_INDEX_DISP), IDX (INSN_STOB_INDEX_DISP), FULL (stob_index_disp) FAST (stob_index_disp) }, | |
265 | { TYPE (INSN_STOB_INDIRECT_INDEX_DISP), IDX (INSN_STOB_INDIRECT_INDEX_DISP), FULL (stob_indirect_index_disp) FAST (stob_indirect_index_disp) }, | |
266 | { TYPE (INSN_STOS_OFFSET), IDX (INSN_STOS_OFFSET), FULL (stos_offset) FAST (stos_offset) }, | |
267 | { TYPE (INSN_STOS_INDIRECT_OFFSET), IDX (INSN_STOS_INDIRECT_OFFSET), FULL (stos_indirect_offset) FAST (stos_indirect_offset) }, | |
268 | { TYPE (INSN_STOS_INDIRECT), IDX (INSN_STOS_INDIRECT), FULL (stos_indirect) FAST (stos_indirect) }, | |
269 | { TYPE (INSN_STOS_INDIRECT_INDEX), IDX (INSN_STOS_INDIRECT_INDEX), FULL (stos_indirect_index) FAST (stos_indirect_index) }, | |
270 | { TYPE (INSN_STOS_DISP), IDX (INSN_STOS_DISP), FULL (stos_disp) FAST (stos_disp) }, | |
271 | { TYPE (INSN_STOS_INDIRECT_DISP), IDX (INSN_STOS_INDIRECT_DISP), FULL (stos_indirect_disp) FAST (stos_indirect_disp) }, | |
272 | { TYPE (INSN_STOS_INDEX_DISP), IDX (INSN_STOS_INDEX_DISP), FULL (stos_index_disp) FAST (stos_index_disp) }, | |
273 | { TYPE (INSN_STOS_INDIRECT_INDEX_DISP), IDX (INSN_STOS_INDIRECT_INDEX_DISP), FULL (stos_indirect_index_disp) FAST (stos_indirect_index_disp) }, | |
274 | { TYPE (INSN_STL_OFFSET), IDX (INSN_STL_OFFSET), FULL (stl_offset) FAST (stl_offset) }, | |
275 | { TYPE (INSN_STL_INDIRECT_OFFSET), IDX (INSN_STL_INDIRECT_OFFSET), FULL (stl_indirect_offset) FAST (stl_indirect_offset) }, | |
276 | { TYPE (INSN_STL_INDIRECT), IDX (INSN_STL_INDIRECT), FULL (stl_indirect) FAST (stl_indirect) }, | |
277 | { TYPE (INSN_STL_INDIRECT_INDEX), IDX (INSN_STL_INDIRECT_INDEX), FULL (stl_indirect_index) FAST (stl_indirect_index) }, | |
278 | { TYPE (INSN_STL_DISP), IDX (INSN_STL_DISP), FULL (stl_disp) FAST (stl_disp) }, | |
279 | { TYPE (INSN_STL_INDIRECT_DISP), IDX (INSN_STL_INDIRECT_DISP), FULL (stl_indirect_disp) FAST (stl_indirect_disp) }, | |
280 | { TYPE (INSN_STL_INDEX_DISP), IDX (INSN_STL_INDEX_DISP), FULL (stl_index_disp) FAST (stl_index_disp) }, | |
281 | { TYPE (INSN_STL_INDIRECT_INDEX_DISP), IDX (INSN_STL_INDIRECT_INDEX_DISP), FULL (stl_indirect_index_disp) FAST (stl_indirect_index_disp) }, | |
282 | { TYPE (INSN_STT_OFFSET), IDX (INSN_STT_OFFSET), FULL (stt_offset) FAST (stt_offset) }, | |
283 | { TYPE (INSN_STT_INDIRECT_OFFSET), IDX (INSN_STT_INDIRECT_OFFSET), FULL (stt_indirect_offset) FAST (stt_indirect_offset) }, | |
284 | { TYPE (INSN_STT_INDIRECT), IDX (INSN_STT_INDIRECT), FULL (stt_indirect) FAST (stt_indirect) }, | |
285 | { TYPE (INSN_STT_INDIRECT_INDEX), IDX (INSN_STT_INDIRECT_INDEX), FULL (stt_indirect_index) FAST (stt_indirect_index) }, | |
286 | { TYPE (INSN_STT_DISP), IDX (INSN_STT_DISP), FULL (stt_disp) FAST (stt_disp) }, | |
287 | { TYPE (INSN_STT_INDIRECT_DISP), IDX (INSN_STT_INDIRECT_DISP), FULL (stt_indirect_disp) FAST (stt_indirect_disp) }, | |
288 | { TYPE (INSN_STT_INDEX_DISP), IDX (INSN_STT_INDEX_DISP), FULL (stt_index_disp) FAST (stt_index_disp) }, | |
289 | { TYPE (INSN_STT_INDIRECT_INDEX_DISP), IDX (INSN_STT_INDIRECT_INDEX_DISP), FULL (stt_indirect_index_disp) FAST (stt_indirect_index_disp) }, | |
290 | { TYPE (INSN_STQ_OFFSET), IDX (INSN_STQ_OFFSET), FULL (stq_offset) FAST (stq_offset) }, | |
291 | { TYPE (INSN_STQ_INDIRECT_OFFSET), IDX (INSN_STQ_INDIRECT_OFFSET), FULL (stq_indirect_offset) FAST (stq_indirect_offset) }, | |
292 | { TYPE (INSN_STQ_INDIRECT), IDX (INSN_STQ_INDIRECT), FULL (stq_indirect) FAST (stq_indirect) }, | |
293 | { TYPE (INSN_STQ_INDIRECT_INDEX), IDX (INSN_STQ_INDIRECT_INDEX), FULL (stq_indirect_index) FAST (stq_indirect_index) }, | |
294 | { TYPE (INSN_STQ_DISP), IDX (INSN_STQ_DISP), FULL (stq_disp) FAST (stq_disp) }, | |
295 | { TYPE (INSN_STQ_INDIRECT_DISP), IDX (INSN_STQ_INDIRECT_DISP), FULL (stq_indirect_disp) FAST (stq_indirect_disp) }, | |
296 | { TYPE (INSN_STQ_INDEX_DISP), IDX (INSN_STQ_INDEX_DISP), FULL (stq_index_disp) FAST (stq_index_disp) }, | |
297 | { TYPE (INSN_STQ_INDIRECT_INDEX_DISP), IDX (INSN_STQ_INDIRECT_INDEX_DISP), FULL (stq_indirect_index_disp) FAST (stq_indirect_index_disp) }, | |
298 | { TYPE (INSN_CMPOBE_REG), IDX (INSN_CMPOBE_REG), FULL (cmpobe_reg) FAST (cmpobe_reg) }, | |
299 | { TYPE (INSN_CMPOBE_LIT), IDX (INSN_CMPOBE_LIT), FULL (cmpobe_lit) FAST (cmpobe_lit) }, | |
300 | { TYPE (INSN_CMPOBNE_REG), IDX (INSN_CMPOBNE_REG), FULL (cmpobne_reg) FAST (cmpobne_reg) }, | |
301 | { TYPE (INSN_CMPOBNE_LIT), IDX (INSN_CMPOBNE_LIT), FULL (cmpobne_lit) FAST (cmpobne_lit) }, | |
302 | { TYPE (INSN_CMPOBL_REG), IDX (INSN_CMPOBL_REG), FULL (cmpobl_reg) FAST (cmpobl_reg) }, | |
303 | { TYPE (INSN_CMPOBL_LIT), IDX (INSN_CMPOBL_LIT), FULL (cmpobl_lit) FAST (cmpobl_lit) }, | |
304 | { TYPE (INSN_CMPOBLE_REG), IDX (INSN_CMPOBLE_REG), FULL (cmpoble_reg) FAST (cmpoble_reg) }, | |
305 | { TYPE (INSN_CMPOBLE_LIT), IDX (INSN_CMPOBLE_LIT), FULL (cmpoble_lit) FAST (cmpoble_lit) }, | |
306 | { TYPE (INSN_CMPOBG_REG), IDX (INSN_CMPOBG_REG), FULL (cmpobg_reg) FAST (cmpobg_reg) }, | |
307 | { TYPE (INSN_CMPOBG_LIT), IDX (INSN_CMPOBG_LIT), FULL (cmpobg_lit) FAST (cmpobg_lit) }, | |
308 | { TYPE (INSN_CMPOBGE_REG), IDX (INSN_CMPOBGE_REG), FULL (cmpobge_reg) FAST (cmpobge_reg) }, | |
309 | { TYPE (INSN_CMPOBGE_LIT), IDX (INSN_CMPOBGE_LIT), FULL (cmpobge_lit) FAST (cmpobge_lit) }, | |
310 | { TYPE (INSN_CMPIBE_REG), IDX (INSN_CMPIBE_REG), FULL (cmpibe_reg) FAST (cmpibe_reg) }, | |
311 | { TYPE (INSN_CMPIBE_LIT), IDX (INSN_CMPIBE_LIT), FULL (cmpibe_lit) FAST (cmpibe_lit) }, | |
312 | { TYPE (INSN_CMPIBNE_REG), IDX (INSN_CMPIBNE_REG), FULL (cmpibne_reg) FAST (cmpibne_reg) }, | |
313 | { TYPE (INSN_CMPIBNE_LIT), IDX (INSN_CMPIBNE_LIT), FULL (cmpibne_lit) FAST (cmpibne_lit) }, | |
314 | { TYPE (INSN_CMPIBL_REG), IDX (INSN_CMPIBL_REG), FULL (cmpibl_reg) FAST (cmpibl_reg) }, | |
315 | { TYPE (INSN_CMPIBL_LIT), IDX (INSN_CMPIBL_LIT), FULL (cmpibl_lit) FAST (cmpibl_lit) }, | |
316 | { TYPE (INSN_CMPIBLE_REG), IDX (INSN_CMPIBLE_REG), FULL (cmpible_reg) FAST (cmpible_reg) }, | |
317 | { TYPE (INSN_CMPIBLE_LIT), IDX (INSN_CMPIBLE_LIT), FULL (cmpible_lit) FAST (cmpible_lit) }, | |
318 | { TYPE (INSN_CMPIBG_REG), IDX (INSN_CMPIBG_REG), FULL (cmpibg_reg) FAST (cmpibg_reg) }, | |
319 | { TYPE (INSN_CMPIBG_LIT), IDX (INSN_CMPIBG_LIT), FULL (cmpibg_lit) FAST (cmpibg_lit) }, | |
320 | { TYPE (INSN_CMPIBGE_REG), IDX (INSN_CMPIBGE_REG), FULL (cmpibge_reg) FAST (cmpibge_reg) }, | |
321 | { TYPE (INSN_CMPIBGE_LIT), IDX (INSN_CMPIBGE_LIT), FULL (cmpibge_lit) FAST (cmpibge_lit) }, | |
322 | { TYPE (INSN_BBC_REG), IDX (INSN_BBC_REG), FULL (bbc_reg) FAST (bbc_reg) }, | |
323 | { TYPE (INSN_BBC_LIT), IDX (INSN_BBC_LIT), FULL (bbc_lit) FAST (bbc_lit) }, | |
324 | { TYPE (INSN_BBS_REG), IDX (INSN_BBS_REG), FULL (bbs_reg) FAST (bbs_reg) }, | |
325 | { TYPE (INSN_BBS_LIT), IDX (INSN_BBS_LIT), FULL (bbs_lit) FAST (bbs_lit) }, | |
326 | { TYPE (INSN_CMPI), IDX (INSN_CMPI), FULL (cmpi) FAST (cmpi) }, | |
327 | { TYPE (INSN_CMPI1), IDX (INSN_CMPI1), FULL (cmpi1) FAST (cmpi1) }, | |
328 | { TYPE (INSN_CMPI2), IDX (INSN_CMPI2), FULL (cmpi2) FAST (cmpi2) }, | |
329 | { TYPE (INSN_CMPI3), IDX (INSN_CMPI3), FULL (cmpi3) FAST (cmpi3) }, | |
330 | { TYPE (INSN_CMPO), IDX (INSN_CMPO), FULL (cmpo) FAST (cmpo) }, | |
331 | { TYPE (INSN_CMPO1), IDX (INSN_CMPO1), FULL (cmpo1) FAST (cmpo1) }, | |
332 | { TYPE (INSN_CMPO2), IDX (INSN_CMPO2), FULL (cmpo2) FAST (cmpo2) }, | |
333 | { TYPE (INSN_CMPO3), IDX (INSN_CMPO3), FULL (cmpo3) FAST (cmpo3) }, | |
334 | { TYPE (INSN_TESTNO_REG), IDX (INSN_TESTNO_REG), FULL (testno_reg) FAST (testno_reg) }, | |
335 | { TYPE (INSN_TESTG_REG), IDX (INSN_TESTG_REG), FULL (testg_reg) FAST (testg_reg) }, | |
336 | { TYPE (INSN_TESTE_REG), IDX (INSN_TESTE_REG), FULL (teste_reg) FAST (teste_reg) }, | |
337 | { TYPE (INSN_TESTGE_REG), IDX (INSN_TESTGE_REG), FULL (testge_reg) FAST (testge_reg) }, | |
338 | { TYPE (INSN_TESTL_REG), IDX (INSN_TESTL_REG), FULL (testl_reg) FAST (testl_reg) }, | |
339 | { TYPE (INSN_TESTNE_REG), IDX (INSN_TESTNE_REG), FULL (testne_reg) FAST (testne_reg) }, | |
340 | { TYPE (INSN_TESTLE_REG), IDX (INSN_TESTLE_REG), FULL (testle_reg) FAST (testle_reg) }, | |
341 | { TYPE (INSN_TESTO_REG), IDX (INSN_TESTO_REG), FULL (testo_reg) FAST (testo_reg) }, | |
342 | { TYPE (INSN_BNO), IDX (INSN_BNO), FULL (bno) FAST (bno) }, | |
343 | { TYPE (INSN_BG), IDX (INSN_BG), FULL (bg) FAST (bg) }, | |
344 | { TYPE (INSN_BE), IDX (INSN_BE), FULL (be) FAST (be) }, | |
345 | { TYPE (INSN_BGE), IDX (INSN_BGE), FULL (bge) FAST (bge) }, | |
346 | { TYPE (INSN_BL), IDX (INSN_BL), FULL (bl) FAST (bl) }, | |
347 | { TYPE (INSN_BNE), IDX (INSN_BNE), FULL (bne) FAST (bne) }, | |
348 | { TYPE (INSN_BLE), IDX (INSN_BLE), FULL (ble) FAST (ble) }, | |
349 | { TYPE (INSN_BO), IDX (INSN_BO), FULL (bo) FAST (bo) }, | |
350 | { TYPE (INSN_B), IDX (INSN_B), FULL (b) FAST (b) }, | |
351 | { TYPE (INSN_BX_INDIRECT_OFFSET), IDX (INSN_BX_INDIRECT_OFFSET), FULL (bx_indirect_offset) FAST (bx_indirect_offset) }, | |
352 | { TYPE (INSN_BX_INDIRECT), IDX (INSN_BX_INDIRECT), FULL (bx_indirect) FAST (bx_indirect) }, | |
353 | { TYPE (INSN_BX_INDIRECT_INDEX), IDX (INSN_BX_INDIRECT_INDEX), FULL (bx_indirect_index) FAST (bx_indirect_index) }, | |
354 | { TYPE (INSN_BX_DISP), IDX (INSN_BX_DISP), FULL (bx_disp) FAST (bx_disp) }, | |
355 | { TYPE (INSN_BX_INDIRECT_DISP), IDX (INSN_BX_INDIRECT_DISP), FULL (bx_indirect_disp) FAST (bx_indirect_disp) }, | |
356 | { TYPE (INSN_CALLX_DISP), IDX (INSN_CALLX_DISP), FULL (callx_disp) FAST (callx_disp) }, | |
357 | { TYPE (INSN_CALLX_INDIRECT), IDX (INSN_CALLX_INDIRECT), FULL (callx_indirect) FAST (callx_indirect) }, | |
358 | { TYPE (INSN_CALLX_INDIRECT_OFFSET), IDX (INSN_CALLX_INDIRECT_OFFSET), FULL (callx_indirect_offset) FAST (callx_indirect_offset) }, | |
359 | { TYPE (INSN_RET), IDX (INSN_RET), FULL (ret) FAST (ret) }, | |
360 | { TYPE (INSN_CALLS), IDX (INSN_CALLS), FULL (calls) FAST (calls) }, | |
361 | { TYPE (INSN_FMARK), IDX (INSN_FMARK), FULL (fmark) FAST (fmark) }, | |
362 | { TYPE (INSN_FLUSHREG), IDX (INSN_FLUSHREG), FULL (flushreg) FAST (flushreg) }, | |
363 | }; | |
364 | ||
365 | static const struct insn_sem i960base_insn_sem_invalid = | |
366 | { | |
367 | VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid) | |
368 | }; | |
369 | ||
7a292a7a SS |
370 | #undef FMT |
371 | #undef FULL | |
372 | #undef FAST | |
c906108c SS |
373 | #undef IDX |
374 | #undef TYPE | |
375 | ||
376 | /* Initialize an IDESC from the compile-time computable parts. */ | |
377 | ||
378 | static INLINE void | |
379 | init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) | |
380 | { | |
381 | const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; | |
382 | ||
383 | id->num = t->index; | |
384 | if ((int) t->type <= 0) | |
385 | id->idata = & cgen_virtual_insn_table[- (int) t->type]; | |
386 | else | |
387 | id->idata = & insn_table[t->type]; | |
388 | id->attrs = CGEN_INSN_ATTRS (id->idata); | |
389 | /* Oh my god, a magic number. */ | |
390 | id->length = CGEN_INSN_BITSIZE (id->idata) / 8; | |
391 | #if ! WITH_SEM_SWITCH_FULL | |
392 | id->sem_full = t->sem_full; | |
393 | #endif | |
394 | #if WITH_FAST && ! WITH_SEM_SWITCH_FAST | |
395 | id->sem_fast = t->sem_fast; | |
396 | #endif | |
397 | #if WITH_PROFILE_MODEL_P | |
398 | id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; | |
399 | { | |
400 | SIM_DESC sd = CPU_STATE (cpu); | |
401 | SIM_ASSERT (t->index == id->timing->num); | |
402 | } | |
403 | #endif | |
404 | } | |
405 | ||
406 | /* Initialize the instruction descriptor table. */ | |
407 | ||
408 | void | |
409 | i960base_init_idesc_table (SIM_CPU *cpu) | |
410 | { | |
411 | IDESC *id,*tabend; | |
412 | const struct insn_sem *t,*tend; | |
413 | int tabsize = I960BASE_INSN_MAX; | |
414 | IDESC *table = i960base_insn_data; | |
415 | ||
416 | memset (table, 0, tabsize * sizeof (IDESC)); | |
417 | ||
418 | /* First set all entries to the `invalid insn'. */ | |
419 | t = & i960base_insn_sem_invalid; | |
420 | for (id = table, tabend = table + tabsize; id < tabend; ++id) | |
421 | init_idesc (cpu, id, t); | |
422 | ||
423 | /* Now fill in the values for the chosen cpu. */ | |
424 | for (t = i960base_insn_sem, tend = t + sizeof (i960base_insn_sem) / sizeof (*t); | |
425 | t != tend; ++t) | |
426 | { | |
427 | init_idesc (cpu, & table[t->index], t); | |
428 | } | |
429 | ||
430 | /* Link the IDESC table into the cpu. */ | |
431 | CPU_IDESC (cpu) = table; | |
432 | } | |
433 | ||
c906108c SS |
434 | /* Given an instruction, return a pointer to its IDESC entry. */ |
435 | ||
436 | const IDESC * | |
437 | i960base_decode (SIM_CPU *current_cpu, IADDR pc, | |
438 | CGEN_INSN_INT base_insn, | |
439 | ARGBUF *abuf) | |
440 | { | |
7a292a7a SS |
441 | /* Result of decoder. */ |
442 | I960BASE_INSN_TYPE itype; | |
c906108c SS |
443 | |
444 | { | |
7a292a7a SS |
445 | CGEN_INSN_INT insn = base_insn; |
446 | ||
447 | { | |
448 | unsigned int val = (((insn >> 24) & (255 << 0))); | |
449 | switch (val) | |
450 | { | |
451 | case 8 : itype = I960BASE_INSN_B; goto extract_fmt_b; | |
452 | case 10 : itype = I960BASE_INSN_RET; goto extract_fmt_ret; | |
453 | case 16 : itype = I960BASE_INSN_BNO; goto extract_fmt_bno; | |
454 | case 17 : itype = I960BASE_INSN_BG; goto extract_fmt_bno; | |
455 | case 18 : itype = I960BASE_INSN_BE; goto extract_fmt_bno; | |
456 | case 19 : itype = I960BASE_INSN_BGE; goto extract_fmt_bno; | |
457 | case 20 : itype = I960BASE_INSN_BL; goto extract_fmt_bno; | |
458 | case 21 : itype = I960BASE_INSN_BNE; goto extract_fmt_bno; | |
459 | case 22 : itype = I960BASE_INSN_BLE; goto extract_fmt_bno; | |
460 | case 23 : itype = I960BASE_INSN_BO; goto extract_fmt_bno; | |
461 | case 32 : itype = I960BASE_INSN_TESTNO_REG; goto extract_fmt_testno_reg; | |
462 | case 33 : itype = I960BASE_INSN_TESTG_REG; goto extract_fmt_testno_reg; | |
463 | case 34 : itype = I960BASE_INSN_TESTE_REG; goto extract_fmt_testno_reg; | |
464 | case 35 : itype = I960BASE_INSN_TESTGE_REG; goto extract_fmt_testno_reg; | |
465 | case 36 : itype = I960BASE_INSN_TESTL_REG; goto extract_fmt_testno_reg; | |
466 | case 37 : itype = I960BASE_INSN_TESTNE_REG; goto extract_fmt_testno_reg; | |
467 | case 38 : itype = I960BASE_INSN_TESTLE_REG; goto extract_fmt_testno_reg; | |
468 | case 39 : itype = I960BASE_INSN_TESTO_REG; goto extract_fmt_testno_reg; | |
469 | case 48 : | |
c906108c | 470 | { |
7a292a7a SS |
471 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); |
472 | switch (val) | |
c906108c | 473 | { |
7a292a7a SS |
474 | case 0 : itype = I960BASE_INSN_BBC_REG; goto extract_fmt_bbc_reg; |
475 | case 4 : itype = I960BASE_INSN_BBC_LIT; goto extract_fmt_bbc_lit; | |
476 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 477 | } |
7a292a7a SS |
478 | } |
479 | case 49 : | |
480 | { | |
481 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
482 | switch (val) | |
c906108c | 483 | { |
7a292a7a SS |
484 | case 0 : itype = I960BASE_INSN_CMPOBG_REG; goto extract_fmt_cmpobl_reg; |
485 | case 4 : itype = I960BASE_INSN_CMPOBG_LIT; goto extract_fmt_cmpobl_lit; | |
486 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 487 | } |
7a292a7a SS |
488 | } |
489 | case 50 : | |
490 | { | |
491 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
492 | switch (val) | |
c906108c | 493 | { |
7a292a7a SS |
494 | case 0 : itype = I960BASE_INSN_CMPOBE_REG; goto extract_fmt_cmpobe_reg; |
495 | case 4 : itype = I960BASE_INSN_CMPOBE_LIT; goto extract_fmt_cmpobe_lit; | |
496 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 497 | } |
7a292a7a SS |
498 | } |
499 | case 51 : | |
500 | { | |
501 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
502 | switch (val) | |
c906108c | 503 | { |
7a292a7a SS |
504 | case 0 : itype = I960BASE_INSN_CMPOBGE_REG; goto extract_fmt_cmpobl_reg; |
505 | case 4 : itype = I960BASE_INSN_CMPOBGE_LIT; goto extract_fmt_cmpobl_lit; | |
506 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 507 | } |
7a292a7a SS |
508 | } |
509 | case 52 : | |
510 | { | |
511 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
512 | switch (val) | |
c906108c | 513 | { |
7a292a7a SS |
514 | case 0 : itype = I960BASE_INSN_CMPOBL_REG; goto extract_fmt_cmpobl_reg; |
515 | case 4 : itype = I960BASE_INSN_CMPOBL_LIT; goto extract_fmt_cmpobl_lit; | |
516 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 517 | } |
7a292a7a SS |
518 | } |
519 | case 53 : | |
520 | { | |
521 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
522 | switch (val) | |
c906108c | 523 | { |
7a292a7a SS |
524 | case 0 : itype = I960BASE_INSN_CMPOBNE_REG; goto extract_fmt_cmpobe_reg; |
525 | case 4 : itype = I960BASE_INSN_CMPOBNE_LIT; goto extract_fmt_cmpobe_lit; | |
526 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 527 | } |
7a292a7a SS |
528 | } |
529 | case 54 : | |
530 | { | |
531 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
532 | switch (val) | |
c906108c | 533 | { |
7a292a7a SS |
534 | case 0 : itype = I960BASE_INSN_CMPOBLE_REG; goto extract_fmt_cmpobl_reg; |
535 | case 4 : itype = I960BASE_INSN_CMPOBLE_LIT; goto extract_fmt_cmpobl_lit; | |
536 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 537 | } |
7a292a7a SS |
538 | } |
539 | case 55 : | |
540 | { | |
541 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
542 | switch (val) | |
c906108c | 543 | { |
7a292a7a SS |
544 | case 0 : itype = I960BASE_INSN_BBS_REG; goto extract_fmt_bbc_reg; |
545 | case 4 : itype = I960BASE_INSN_BBS_LIT; goto extract_fmt_bbc_lit; | |
546 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 547 | } |
7a292a7a SS |
548 | } |
549 | case 57 : | |
550 | { | |
551 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
552 | switch (val) | |
c906108c | 553 | { |
7a292a7a SS |
554 | case 0 : itype = I960BASE_INSN_CMPIBG_REG; goto extract_fmt_cmpobe_reg; |
555 | case 4 : itype = I960BASE_INSN_CMPIBG_LIT; goto extract_fmt_cmpobe_lit; | |
556 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 557 | } |
7a292a7a SS |
558 | } |
559 | case 58 : | |
560 | { | |
561 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
562 | switch (val) | |
c906108c | 563 | { |
7a292a7a SS |
564 | case 0 : itype = I960BASE_INSN_CMPIBE_REG; goto extract_fmt_cmpobe_reg; |
565 | case 4 : itype = I960BASE_INSN_CMPIBE_LIT; goto extract_fmt_cmpobe_lit; | |
566 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 567 | } |
7a292a7a SS |
568 | } |
569 | case 59 : | |
570 | { | |
571 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
572 | switch (val) | |
c906108c | 573 | { |
7a292a7a SS |
574 | case 0 : itype = I960BASE_INSN_CMPIBGE_REG; goto extract_fmt_cmpobe_reg; |
575 | case 4 : itype = I960BASE_INSN_CMPIBGE_LIT; goto extract_fmt_cmpobe_lit; | |
576 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 577 | } |
7a292a7a SS |
578 | } |
579 | case 60 : | |
580 | { | |
581 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
582 | switch (val) | |
c906108c | 583 | { |
7a292a7a SS |
584 | case 0 : itype = I960BASE_INSN_CMPIBL_REG; goto extract_fmt_cmpobe_reg; |
585 | case 4 : itype = I960BASE_INSN_CMPIBL_LIT; goto extract_fmt_cmpobe_lit; | |
586 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 587 | } |
7a292a7a SS |
588 | } |
589 | case 61 : | |
590 | { | |
591 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
592 | switch (val) | |
c906108c | 593 | { |
7a292a7a SS |
594 | case 0 : itype = I960BASE_INSN_CMPIBNE_REG; goto extract_fmt_cmpobe_reg; |
595 | case 4 : itype = I960BASE_INSN_CMPIBNE_LIT; goto extract_fmt_cmpobe_lit; | |
596 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 597 | } |
7a292a7a SS |
598 | } |
599 | case 62 : | |
600 | { | |
601 | unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0))); | |
602 | switch (val) | |
c906108c | 603 | { |
7a292a7a SS |
604 | case 0 : itype = I960BASE_INSN_CMPIBLE_REG; goto extract_fmt_cmpobe_reg; |
605 | case 4 : itype = I960BASE_INSN_CMPIBLE_LIT; goto extract_fmt_cmpobe_lit; | |
606 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 607 | } |
7a292a7a SS |
608 | } |
609 | case 88 : | |
610 | { | |
611 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
612 | switch (val) | |
c906108c | 613 | { |
7a292a7a SS |
614 | case 0 : |
615 | { | |
616 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
617 | switch (val) | |
618 | { | |
619 | case 0 : itype = I960BASE_INSN_NOTBIT; goto extract_fmt_notbit; | |
620 | case 2 : itype = I960BASE_INSN_AND; goto extract_fmt_mulo; | |
621 | case 4 : itype = I960BASE_INSN_ANDNOT; goto extract_fmt_mulo; | |
622 | case 6 : itype = I960BASE_INSN_SETBIT; goto extract_fmt_notbit; | |
623 | case 8 : itype = I960BASE_INSN_NOTAND; goto extract_fmt_mulo; | |
624 | case 12 : itype = I960BASE_INSN_XOR; goto extract_fmt_mulo; | |
625 | case 14 : itype = I960BASE_INSN_OR; goto extract_fmt_mulo; | |
626 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
627 | } | |
628 | } | |
629 | case 1 : | |
630 | { | |
631 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
632 | switch (val) | |
633 | { | |
634 | case 0 : itype = I960BASE_INSN_NOR; goto extract_fmt_mulo; | |
635 | case 2 : itype = I960BASE_INSN_XNOR; goto extract_fmt_mulo; | |
636 | case 4 : itype = I960BASE_INSN_NOT; goto extract_fmt_not; | |
637 | case 6 : itype = I960BASE_INSN_ORNOT; goto extract_fmt_mulo; | |
638 | case 8 : itype = I960BASE_INSN_CLRBIT; goto extract_fmt_notbit; | |
639 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
640 | } | |
641 | } | |
642 | case 2 : | |
643 | { | |
644 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
645 | switch (val) | |
646 | { | |
647 | case 0 : itype = I960BASE_INSN_NOTBIT1; goto extract_fmt_notbit1; | |
648 | case 2 : itype = I960BASE_INSN_AND1; goto extract_fmt_mulo1; | |
649 | case 4 : itype = I960BASE_INSN_ANDNOT1; goto extract_fmt_mulo1; | |
650 | case 6 : itype = I960BASE_INSN_SETBIT1; goto extract_fmt_notbit1; | |
651 | case 8 : itype = I960BASE_INSN_NOTAND1; goto extract_fmt_mulo1; | |
652 | case 12 : itype = I960BASE_INSN_XOR1; goto extract_fmt_mulo1; | |
653 | case 14 : itype = I960BASE_INSN_OR1; goto extract_fmt_mulo1; | |
654 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
655 | } | |
656 | } | |
657 | case 3 : | |
658 | { | |
659 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
660 | switch (val) | |
661 | { | |
662 | case 0 : itype = I960BASE_INSN_NOR1; goto extract_fmt_mulo1; | |
663 | case 2 : itype = I960BASE_INSN_XNOR1; goto extract_fmt_mulo1; | |
664 | case 4 : itype = I960BASE_INSN_NOT1; goto extract_fmt_not1; | |
665 | case 6 : itype = I960BASE_INSN_ORNOT1; goto extract_fmt_mulo1; | |
666 | case 8 : itype = I960BASE_INSN_CLRBIT1; goto extract_fmt_notbit1; | |
667 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
668 | } | |
669 | } | |
670 | case 4 : | |
671 | { | |
672 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
673 | switch (val) | |
674 | { | |
675 | case 0 : itype = I960BASE_INSN_NOTBIT2; goto extract_fmt_notbit2; | |
676 | case 2 : itype = I960BASE_INSN_AND2; goto extract_fmt_mulo2; | |
677 | case 4 : itype = I960BASE_INSN_ANDNOT2; goto extract_fmt_mulo2; | |
678 | case 6 : itype = I960BASE_INSN_SETBIT2; goto extract_fmt_notbit2; | |
679 | case 8 : itype = I960BASE_INSN_NOTAND2; goto extract_fmt_mulo2; | |
680 | case 12 : itype = I960BASE_INSN_XOR2; goto extract_fmt_mulo2; | |
681 | case 14 : itype = I960BASE_INSN_OR2; goto extract_fmt_mulo2; | |
682 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
683 | } | |
684 | } | |
685 | case 5 : | |
686 | { | |
687 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
688 | switch (val) | |
689 | { | |
690 | case 0 : itype = I960BASE_INSN_NOR2; goto extract_fmt_mulo2; | |
691 | case 2 : itype = I960BASE_INSN_XNOR2; goto extract_fmt_mulo2; | |
692 | case 4 : itype = I960BASE_INSN_NOT2; goto extract_fmt_not2; | |
693 | case 6 : itype = I960BASE_INSN_ORNOT2; goto extract_fmt_mulo2; | |
694 | case 8 : itype = I960BASE_INSN_CLRBIT2; goto extract_fmt_notbit2; | |
695 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
696 | } | |
697 | } | |
698 | case 6 : | |
699 | { | |
700 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
701 | switch (val) | |
702 | { | |
703 | case 0 : itype = I960BASE_INSN_NOTBIT3; goto extract_fmt_notbit3; | |
704 | case 2 : itype = I960BASE_INSN_AND3; goto extract_fmt_mulo3; | |
705 | case 4 : itype = I960BASE_INSN_ANDNOT3; goto extract_fmt_mulo3; | |
706 | case 6 : itype = I960BASE_INSN_SETBIT3; goto extract_fmt_notbit3; | |
707 | case 8 : itype = I960BASE_INSN_NOTAND3; goto extract_fmt_mulo3; | |
708 | case 12 : itype = I960BASE_INSN_XOR3; goto extract_fmt_mulo3; | |
709 | case 14 : itype = I960BASE_INSN_OR3; goto extract_fmt_mulo3; | |
710 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
711 | } | |
712 | } | |
713 | case 7 : | |
714 | { | |
715 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
716 | switch (val) | |
c906108c | 717 | { |
7a292a7a SS |
718 | case 0 : itype = I960BASE_INSN_NOR3; goto extract_fmt_mulo3; |
719 | case 2 : itype = I960BASE_INSN_XNOR3; goto extract_fmt_mulo3; | |
720 | case 4 : itype = I960BASE_INSN_NOT3; goto extract_fmt_not3; | |
721 | case 6 : itype = I960BASE_INSN_ORNOT3; goto extract_fmt_mulo3; | |
722 | case 8 : itype = I960BASE_INSN_CLRBIT3; goto extract_fmt_notbit3; | |
723 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 724 | } |
7a292a7a SS |
725 | } |
726 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 727 | } |
7a292a7a SS |
728 | } |
729 | case 89 : | |
730 | { | |
731 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
732 | switch (val) | |
c906108c | 733 | { |
7a292a7a SS |
734 | case 0 : |
735 | { | |
736 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
737 | switch (val) | |
738 | { | |
739 | case 0 : itype = I960BASE_INSN_ADDO; goto extract_fmt_mulo; | |
740 | case 4 : itype = I960BASE_INSN_SUBO; goto extract_fmt_mulo; | |
741 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
742 | } | |
743 | } | |
744 | case 1 : | |
745 | { | |
746 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
747 | switch (val) | |
748 | { | |
749 | case 0 : itype = I960BASE_INSN_SHRO; goto extract_fmt_shlo; | |
750 | case 6 : itype = I960BASE_INSN_SHRI; goto extract_fmt_shlo; | |
751 | case 8 : itype = I960BASE_INSN_SHLO; goto extract_fmt_shlo; | |
752 | case 12 : itype = I960BASE_INSN_SHLI; goto extract_fmt_shlo; | |
753 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
754 | } | |
755 | } | |
756 | case 2 : | |
757 | { | |
758 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
759 | switch (val) | |
760 | { | |
761 | case 0 : itype = I960BASE_INSN_ADDO1; goto extract_fmt_mulo1; | |
762 | case 4 : itype = I960BASE_INSN_SUBO1; goto extract_fmt_mulo1; | |
763 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
764 | } | |
765 | } | |
766 | case 3 : | |
767 | { | |
768 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
769 | switch (val) | |
770 | { | |
771 | case 0 : itype = I960BASE_INSN_SHRO1; goto extract_fmt_shlo1; | |
772 | case 6 : itype = I960BASE_INSN_SHRI1; goto extract_fmt_shlo1; | |
773 | case 8 : itype = I960BASE_INSN_SHLO1; goto extract_fmt_shlo1; | |
774 | case 12 : itype = I960BASE_INSN_SHLI1; goto extract_fmt_shlo1; | |
775 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
776 | } | |
777 | } | |
778 | case 4 : | |
779 | { | |
780 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
781 | switch (val) | |
782 | { | |
783 | case 0 : itype = I960BASE_INSN_ADDO2; goto extract_fmt_mulo2; | |
784 | case 4 : itype = I960BASE_INSN_SUBO2; goto extract_fmt_mulo2; | |
785 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
786 | } | |
787 | } | |
788 | case 5 : | |
789 | { | |
790 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
791 | switch (val) | |
792 | { | |
793 | case 0 : itype = I960BASE_INSN_SHRO2; goto extract_fmt_shlo2; | |
794 | case 6 : itype = I960BASE_INSN_SHRI2; goto extract_fmt_shlo2; | |
795 | case 8 : itype = I960BASE_INSN_SHLO2; goto extract_fmt_shlo2; | |
796 | case 12 : itype = I960BASE_INSN_SHLI2; goto extract_fmt_shlo2; | |
797 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
798 | } | |
799 | } | |
800 | case 6 : | |
801 | { | |
802 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
803 | switch (val) | |
804 | { | |
805 | case 0 : itype = I960BASE_INSN_ADDO3; goto extract_fmt_mulo3; | |
806 | case 4 : itype = I960BASE_INSN_SUBO3; goto extract_fmt_mulo3; | |
807 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
808 | } | |
809 | } | |
810 | case 7 : | |
811 | { | |
812 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
813 | switch (val) | |
c906108c | 814 | { |
7a292a7a SS |
815 | case 0 : itype = I960BASE_INSN_SHRO3; goto extract_fmt_shlo3; |
816 | case 6 : itype = I960BASE_INSN_SHRI3; goto extract_fmt_shlo3; | |
817 | case 8 : itype = I960BASE_INSN_SHLO3; goto extract_fmt_shlo3; | |
818 | case 12 : itype = I960BASE_INSN_SHLI3; goto extract_fmt_shlo3; | |
819 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 820 | } |
7a292a7a SS |
821 | } |
822 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 823 | } |
7a292a7a SS |
824 | } |
825 | case 90 : | |
826 | { | |
827 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
828 | switch (val) | |
c906108c | 829 | { |
7a292a7a SS |
830 | case 8 : |
831 | { | |
832 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
833 | switch (val) | |
834 | { | |
835 | case 0 : itype = I960BASE_INSN_CMPO; goto extract_fmt_cmpo; | |
836 | case 2 : itype = I960BASE_INSN_CMPI; goto extract_fmt_cmpi; | |
837 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
838 | } | |
839 | } | |
840 | case 10 : | |
841 | { | |
842 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
843 | switch (val) | |
844 | { | |
845 | case 0 : itype = I960BASE_INSN_CMPO1; goto extract_fmt_cmpo1; | |
846 | case 2 : itype = I960BASE_INSN_CMPI1; goto extract_fmt_cmpi1; | |
847 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
848 | } | |
849 | } | |
850 | case 12 : | |
851 | { | |
852 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
853 | switch (val) | |
854 | { | |
855 | case 0 : itype = I960BASE_INSN_CMPO2; goto extract_fmt_cmpo2; | |
856 | case 2 : itype = I960BASE_INSN_CMPI2; goto extract_fmt_cmpi2; | |
857 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
858 | } | |
859 | } | |
860 | case 14 : | |
861 | { | |
862 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
863 | switch (val) | |
c906108c | 864 | { |
7a292a7a SS |
865 | case 0 : itype = I960BASE_INSN_CMPO3; goto extract_fmt_cmpo3; |
866 | case 2 : itype = I960BASE_INSN_CMPI3; goto extract_fmt_cmpi3; | |
867 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 868 | } |
7a292a7a SS |
869 | } |
870 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 871 | } |
7a292a7a SS |
872 | } |
873 | case 92 : | |
874 | { | |
875 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
876 | switch (val) | |
c906108c | 877 | { |
7a292a7a SS |
878 | case 5 : itype = I960BASE_INSN_MOV; goto extract_fmt_not2; |
879 | case 7 : itype = I960BASE_INSN_MOV1; goto extract_fmt_not3; | |
880 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 881 | } |
7a292a7a SS |
882 | } |
883 | case 93 : | |
884 | { | |
885 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
886 | switch (val) | |
c906108c | 887 | { |
7a292a7a SS |
888 | case 5 : itype = I960BASE_INSN_MOVL; goto extract_fmt_movl; |
889 | case 7 : itype = I960BASE_INSN_MOVL1; goto extract_fmt_movl1; | |
890 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 891 | } |
7a292a7a SS |
892 | } |
893 | case 94 : | |
894 | { | |
895 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
896 | switch (val) | |
c906108c | 897 | { |
7a292a7a SS |
898 | case 5 : itype = I960BASE_INSN_MOVT; goto extract_fmt_movt; |
899 | case 7 : itype = I960BASE_INSN_MOVT1; goto extract_fmt_movt1; | |
900 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 901 | } |
7a292a7a SS |
902 | } |
903 | case 95 : | |
904 | { | |
905 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
906 | switch (val) | |
c906108c | 907 | { |
7a292a7a SS |
908 | case 5 : itype = I960BASE_INSN_MOVQ; goto extract_fmt_movq; |
909 | case 7 : itype = I960BASE_INSN_MOVQ1; goto extract_fmt_movq1; | |
910 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 911 | } |
7a292a7a SS |
912 | } |
913 | case 100 : itype = I960BASE_INSN_MODAC; goto extract_fmt_modpc; | |
914 | case 101 : itype = I960BASE_INSN_MODPC; goto extract_fmt_modpc; | |
915 | case 102 : | |
916 | { | |
917 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
918 | switch (val) | |
c906108c | 919 | { |
7a292a7a SS |
920 | case 12 : itype = I960BASE_INSN_CALLS; goto extract_fmt_calls; |
921 | case 15 : | |
922 | { | |
923 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
924 | switch (val) | |
c906108c | 925 | { |
7a292a7a SS |
926 | case 8 : itype = I960BASE_INSN_FMARK; goto extract_fmt_fmark; |
927 | case 10 : itype = I960BASE_INSN_FLUSHREG; goto extract_fmt_flushreg; | |
928 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 929 | } |
7a292a7a SS |
930 | } |
931 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 932 | } |
7a292a7a SS |
933 | } |
934 | case 103 : | |
935 | { | |
936 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
937 | switch (val) | |
c906108c | 938 | { |
7a292a7a SS |
939 | case 0 : itype = I960BASE_INSN_EMUL; goto extract_fmt_emul; |
940 | case 2 : itype = I960BASE_INSN_EMUL1; goto extract_fmt_emul1; | |
941 | case 4 : itype = I960BASE_INSN_EMUL2; goto extract_fmt_emul2; | |
942 | case 6 : itype = I960BASE_INSN_EMUL3; goto extract_fmt_emul3; | |
943 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 944 | } |
7a292a7a SS |
945 | } |
946 | case 112 : | |
947 | { | |
948 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
949 | switch (val) | |
c906108c | 950 | { |
7a292a7a SS |
951 | case 0 : itype = I960BASE_INSN_MULO; goto extract_fmt_mulo; |
952 | case 1 : | |
953 | { | |
954 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
955 | switch (val) | |
956 | { | |
957 | case 0 : itype = I960BASE_INSN_REMO; goto extract_fmt_mulo; | |
958 | case 6 : itype = I960BASE_INSN_DIVO; goto extract_fmt_mulo; | |
959 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
960 | } | |
961 | } | |
962 | case 2 : itype = I960BASE_INSN_MULO1; goto extract_fmt_mulo1; | |
963 | case 3 : | |
964 | { | |
965 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
966 | switch (val) | |
967 | { | |
968 | case 0 : itype = I960BASE_INSN_REMO1; goto extract_fmt_mulo1; | |
969 | case 6 : itype = I960BASE_INSN_DIVO1; goto extract_fmt_mulo1; | |
970 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
971 | } | |
972 | } | |
973 | case 4 : itype = I960BASE_INSN_MULO2; goto extract_fmt_mulo2; | |
974 | case 5 : | |
975 | { | |
976 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
977 | switch (val) | |
c906108c | 978 | { |
7a292a7a SS |
979 | case 0 : itype = I960BASE_INSN_REMO2; goto extract_fmt_mulo2; |
980 | case 6 : itype = I960BASE_INSN_DIVO2; goto extract_fmt_mulo2; | |
981 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 982 | } |
7a292a7a SS |
983 | } |
984 | case 6 : itype = I960BASE_INSN_MULO3; goto extract_fmt_mulo3; | |
985 | case 7 : | |
986 | { | |
987 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
988 | switch (val) | |
989 | { | |
990 | case 0 : itype = I960BASE_INSN_REMO3; goto extract_fmt_mulo3; | |
991 | case 6 : itype = I960BASE_INSN_DIVO3; goto extract_fmt_mulo3; | |
992 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
993 | } | |
994 | } | |
995 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 996 | } |
7a292a7a SS |
997 | } |
998 | case 116 : | |
999 | { | |
1000 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1001 | switch (val) | |
c906108c | 1002 | { |
7a292a7a SS |
1003 | case 1 : |
1004 | { | |
1005 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
1006 | switch (val) | |
1007 | { | |
1008 | case 0 : itype = I960BASE_INSN_REMI; goto extract_fmt_mulo; | |
1009 | case 6 : itype = I960BASE_INSN_DIVI; goto extract_fmt_mulo; | |
1010 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
1011 | } | |
1012 | } | |
1013 | case 3 : | |
1014 | { | |
1015 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
1016 | switch (val) | |
1017 | { | |
1018 | case 0 : itype = I960BASE_INSN_REMI1; goto extract_fmt_mulo1; | |
1019 | case 6 : itype = I960BASE_INSN_DIVI1; goto extract_fmt_mulo1; | |
1020 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
1021 | } | |
1022 | } | |
1023 | case 5 : | |
1024 | { | |
1025 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
1026 | switch (val) | |
c906108c | 1027 | { |
7a292a7a SS |
1028 | case 0 : itype = I960BASE_INSN_REMI2; goto extract_fmt_mulo2; |
1029 | case 6 : itype = I960BASE_INSN_DIVI2; goto extract_fmt_mulo2; | |
1030 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1031 | } |
7a292a7a SS |
1032 | } |
1033 | case 7 : | |
1034 | { | |
1035 | unsigned int val = (((insn >> 6) & (15 << 0))); | |
1036 | switch (val) | |
1037 | { | |
1038 | case 0 : itype = I960BASE_INSN_REMI3; goto extract_fmt_mulo3; | |
1039 | case 6 : itype = I960BASE_INSN_DIVI3; goto extract_fmt_mulo3; | |
1040 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
1041 | } | |
1042 | } | |
1043 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1044 | } |
7a292a7a SS |
1045 | } |
1046 | case 128 : | |
1047 | { | |
1048 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1049 | switch (val) | |
c906108c | 1050 | { |
7a292a7a SS |
1051 | case 0 : /* fall through */ |
1052 | case 1 : /* fall through */ | |
1053 | case 2 : /* fall through */ | |
1054 | case 3 : itype = I960BASE_INSN_LDOB_OFFSET; goto extract_fmt_ldob_offset; | |
1055 | case 4 : itype = I960BASE_INSN_LDOB_INDIRECT; goto extract_fmt_ldob_indirect; | |
1056 | case 7 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX; goto extract_fmt_ldob_indirect_index; | |
1057 | case 8 : /* fall through */ | |
1058 | case 9 : /* fall through */ | |
1059 | case 10 : /* fall through */ | |
1060 | case 11 : itype = I960BASE_INSN_LDOB_INDIRECT_OFFSET; goto extract_fmt_ldob_indirect_offset; | |
1061 | case 12 : itype = I960BASE_INSN_LDOB_DISP; goto extract_fmt_ldob_disp; | |
1062 | case 13 : itype = I960BASE_INSN_LDOB_INDIRECT_DISP; goto extract_fmt_ldob_indirect_disp; | |
1063 | case 14 : itype = I960BASE_INSN_LDOB_INDEX_DISP; goto extract_fmt_ldob_index_disp; | |
1064 | case 15 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP; goto extract_fmt_ldob_indirect_index_disp; | |
1065 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1066 | } |
7a292a7a SS |
1067 | } |
1068 | case 130 : | |
1069 | { | |
1070 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1071 | switch (val) | |
c906108c | 1072 | { |
7a292a7a SS |
1073 | case 0 : /* fall through */ |
1074 | case 1 : /* fall through */ | |
1075 | case 2 : /* fall through */ | |
1076 | case 3 : itype = I960BASE_INSN_STOB_OFFSET; goto extract_fmt_stob_offset; | |
1077 | case 4 : itype = I960BASE_INSN_STOB_INDIRECT; goto extract_fmt_stob_indirect; | |
1078 | case 7 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX; goto extract_fmt_stob_indirect_index; | |
1079 | case 8 : /* fall through */ | |
1080 | case 9 : /* fall through */ | |
1081 | case 10 : /* fall through */ | |
1082 | case 11 : itype = I960BASE_INSN_STOB_INDIRECT_OFFSET; goto extract_fmt_stob_indirect_offset; | |
1083 | case 12 : itype = I960BASE_INSN_STOB_DISP; goto extract_fmt_stob_disp; | |
1084 | case 13 : itype = I960BASE_INSN_STOB_INDIRECT_DISP; goto extract_fmt_stob_indirect_disp; | |
1085 | case 14 : itype = I960BASE_INSN_STOB_INDEX_DISP; goto extract_fmt_stob_index_disp; | |
1086 | case 15 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX_DISP; goto extract_fmt_stob_indirect_index_disp; | |
1087 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1088 | } |
7a292a7a SS |
1089 | } |
1090 | case 132 : | |
1091 | { | |
1092 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1093 | switch (val) | |
c906108c | 1094 | { |
7a292a7a SS |
1095 | case 4 : itype = I960BASE_INSN_BX_INDIRECT; goto extract_fmt_bx_indirect; |
1096 | case 7 : itype = I960BASE_INSN_BX_INDIRECT_INDEX; goto extract_fmt_bx_indirect_index; | |
1097 | case 8 : /* fall through */ | |
1098 | case 9 : /* fall through */ | |
1099 | case 10 : /* fall through */ | |
1100 | case 11 : itype = I960BASE_INSN_BX_INDIRECT_OFFSET; goto extract_fmt_bx_indirect_offset; | |
1101 | case 12 : itype = I960BASE_INSN_BX_DISP; goto extract_fmt_bx_disp; | |
1102 | case 13 : itype = I960BASE_INSN_BX_INDIRECT_DISP; goto extract_fmt_bx_indirect_disp; | |
1103 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1104 | } |
7a292a7a SS |
1105 | } |
1106 | case 134 : | |
1107 | { | |
1108 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1109 | switch (val) | |
c906108c | 1110 | { |
7a292a7a SS |
1111 | case 4 : itype = I960BASE_INSN_CALLX_INDIRECT; goto extract_fmt_callx_indirect; |
1112 | case 8 : /* fall through */ | |
1113 | case 9 : /* fall through */ | |
1114 | case 10 : /* fall through */ | |
1115 | case 11 : itype = I960BASE_INSN_CALLX_INDIRECT_OFFSET; goto extract_fmt_callx_indirect_offset; | |
1116 | case 12 : itype = I960BASE_INSN_CALLX_DISP; goto extract_fmt_callx_disp; | |
1117 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1118 | } |
7a292a7a SS |
1119 | } |
1120 | case 136 : | |
1121 | { | |
1122 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1123 | switch (val) | |
c906108c | 1124 | { |
7a292a7a SS |
1125 | case 0 : /* fall through */ |
1126 | case 1 : /* fall through */ | |
1127 | case 2 : /* fall through */ | |
1128 | case 3 : itype = I960BASE_INSN_LDOS_OFFSET; goto extract_fmt_ldos_offset; | |
1129 | case 4 : itype = I960BASE_INSN_LDOS_INDIRECT; goto extract_fmt_ldos_indirect; | |
1130 | case 7 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX; goto extract_fmt_ldos_indirect_index; | |
1131 | case 8 : /* fall through */ | |
1132 | case 9 : /* fall through */ | |
1133 | case 10 : /* fall through */ | |
1134 | case 11 : itype = I960BASE_INSN_LDOS_INDIRECT_OFFSET; goto extract_fmt_ldos_indirect_offset; | |
1135 | case 12 : itype = I960BASE_INSN_LDOS_DISP; goto extract_fmt_ldos_disp; | |
1136 | case 13 : itype = I960BASE_INSN_LDOS_INDIRECT_DISP; goto extract_fmt_ldos_indirect_disp; | |
1137 | case 14 : itype = I960BASE_INSN_LDOS_INDEX_DISP; goto extract_fmt_ldos_index_disp; | |
1138 | case 15 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP; goto extract_fmt_ldos_indirect_index_disp; | |
1139 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1140 | } |
7a292a7a SS |
1141 | } |
1142 | case 138 : | |
1143 | { | |
1144 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1145 | switch (val) | |
c906108c | 1146 | { |
7a292a7a SS |
1147 | case 0 : /* fall through */ |
1148 | case 1 : /* fall through */ | |
1149 | case 2 : /* fall through */ | |
1150 | case 3 : itype = I960BASE_INSN_STOS_OFFSET; goto extract_fmt_stos_offset; | |
1151 | case 4 : itype = I960BASE_INSN_STOS_INDIRECT; goto extract_fmt_stos_indirect; | |
1152 | case 7 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX; goto extract_fmt_stos_indirect_index; | |
1153 | case 8 : /* fall through */ | |
1154 | case 9 : /* fall through */ | |
1155 | case 10 : /* fall through */ | |
1156 | case 11 : itype = I960BASE_INSN_STOS_INDIRECT_OFFSET; goto extract_fmt_stos_indirect_offset; | |
1157 | case 12 : itype = I960BASE_INSN_STOS_DISP; goto extract_fmt_stos_disp; | |
1158 | case 13 : itype = I960BASE_INSN_STOS_INDIRECT_DISP; goto extract_fmt_stos_indirect_disp; | |
1159 | case 14 : itype = I960BASE_INSN_STOS_INDEX_DISP; goto extract_fmt_stos_index_disp; | |
1160 | case 15 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX_DISP; goto extract_fmt_stos_indirect_index_disp; | |
1161 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1162 | } |
7a292a7a SS |
1163 | } |
1164 | case 140 : | |
1165 | { | |
1166 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1167 | switch (val) | |
c906108c | 1168 | { |
7a292a7a SS |
1169 | case 0 : /* fall through */ |
1170 | case 1 : /* fall through */ | |
1171 | case 2 : /* fall through */ | |
1172 | case 3 : itype = I960BASE_INSN_LDA_OFFSET; goto extract_fmt_lda_offset; | |
1173 | case 4 : itype = I960BASE_INSN_LDA_INDIRECT; goto extract_fmt_lda_indirect; | |
1174 | case 7 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX; goto extract_fmt_lda_indirect_index; | |
1175 | case 8 : /* fall through */ | |
1176 | case 9 : /* fall through */ | |
1177 | case 10 : /* fall through */ | |
1178 | case 11 : itype = I960BASE_INSN_LDA_INDIRECT_OFFSET; goto extract_fmt_lda_indirect_offset; | |
1179 | case 12 : itype = I960BASE_INSN_LDA_DISP; goto extract_fmt_lda_disp; | |
1180 | case 13 : itype = I960BASE_INSN_LDA_INDIRECT_DISP; goto extract_fmt_lda_indirect_disp; | |
1181 | case 14 : itype = I960BASE_INSN_LDA_INDEX_DISP; goto extract_fmt_lda_index_disp; | |
1182 | case 15 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX_DISP; goto extract_fmt_lda_indirect_index_disp; | |
1183 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1184 | } |
7a292a7a SS |
1185 | } |
1186 | case 144 : | |
1187 | { | |
1188 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1189 | switch (val) | |
c906108c | 1190 | { |
7a292a7a SS |
1191 | case 0 : /* fall through */ |
1192 | case 1 : /* fall through */ | |
1193 | case 2 : /* fall through */ | |
1194 | case 3 : itype = I960BASE_INSN_LD_OFFSET; goto extract_fmt_ld_offset; | |
1195 | case 4 : itype = I960BASE_INSN_LD_INDIRECT; goto extract_fmt_ld_indirect; | |
1196 | case 7 : itype = I960BASE_INSN_LD_INDIRECT_INDEX; goto extract_fmt_ld_indirect_index; | |
1197 | case 8 : /* fall through */ | |
1198 | case 9 : /* fall through */ | |
1199 | case 10 : /* fall through */ | |
1200 | case 11 : itype = I960BASE_INSN_LD_INDIRECT_OFFSET; goto extract_fmt_ld_indirect_offset; | |
1201 | case 12 : itype = I960BASE_INSN_LD_DISP; goto extract_fmt_ld_disp; | |
1202 | case 13 : itype = I960BASE_INSN_LD_INDIRECT_DISP; goto extract_fmt_ld_indirect_disp; | |
1203 | case 14 : itype = I960BASE_INSN_LD_INDEX_DISP; goto extract_fmt_ld_index_disp; | |
1204 | case 15 : itype = I960BASE_INSN_LD_INDIRECT_INDEX_DISP; goto extract_fmt_ld_indirect_index_disp; | |
1205 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1206 | } |
7a292a7a SS |
1207 | } |
1208 | case 146 : | |
1209 | { | |
1210 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1211 | switch (val) | |
c906108c | 1212 | { |
7a292a7a SS |
1213 | case 0 : /* fall through */ |
1214 | case 1 : /* fall through */ | |
1215 | case 2 : /* fall through */ | |
1216 | case 3 : itype = I960BASE_INSN_ST_OFFSET; goto extract_fmt_st_offset; | |
1217 | case 4 : itype = I960BASE_INSN_ST_INDIRECT; goto extract_fmt_st_indirect; | |
1218 | case 7 : itype = I960BASE_INSN_ST_INDIRECT_INDEX; goto extract_fmt_st_indirect_index; | |
1219 | case 8 : /* fall through */ | |
1220 | case 9 : /* fall through */ | |
1221 | case 10 : /* fall through */ | |
1222 | case 11 : itype = I960BASE_INSN_ST_INDIRECT_OFFSET; goto extract_fmt_st_indirect_offset; | |
1223 | case 12 : itype = I960BASE_INSN_ST_DISP; goto extract_fmt_st_disp; | |
1224 | case 13 : itype = I960BASE_INSN_ST_INDIRECT_DISP; goto extract_fmt_st_indirect_disp; | |
1225 | case 14 : itype = I960BASE_INSN_ST_INDEX_DISP; goto extract_fmt_st_index_disp; | |
1226 | case 15 : itype = I960BASE_INSN_ST_INDIRECT_INDEX_DISP; goto extract_fmt_st_indirect_index_disp; | |
1227 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1228 | } |
7a292a7a SS |
1229 | } |
1230 | case 152 : | |
1231 | { | |
1232 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1233 | switch (val) | |
c906108c | 1234 | { |
7a292a7a SS |
1235 | case 0 : /* fall through */ |
1236 | case 1 : /* fall through */ | |
1237 | case 2 : /* fall through */ | |
1238 | case 3 : itype = I960BASE_INSN_LDL_OFFSET; goto extract_fmt_ldl_offset; | |
1239 | case 4 : itype = I960BASE_INSN_LDL_INDIRECT; goto extract_fmt_ldl_indirect; | |
1240 | case 7 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX; goto extract_fmt_ldl_indirect_index; | |
1241 | case 8 : /* fall through */ | |
1242 | case 9 : /* fall through */ | |
1243 | case 10 : /* fall through */ | |
1244 | case 11 : itype = I960BASE_INSN_LDL_INDIRECT_OFFSET; goto extract_fmt_ldl_indirect_offset; | |
1245 | case 12 : itype = I960BASE_INSN_LDL_DISP; goto extract_fmt_ldl_disp; | |
1246 | case 13 : itype = I960BASE_INSN_LDL_INDIRECT_DISP; goto extract_fmt_ldl_indirect_disp; | |
1247 | case 14 : itype = I960BASE_INSN_LDL_INDEX_DISP; goto extract_fmt_ldl_index_disp; | |
1248 | case 15 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX_DISP; goto extract_fmt_ldl_indirect_index_disp; | |
1249 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1250 | } |
7a292a7a SS |
1251 | } |
1252 | case 154 : | |
1253 | { | |
1254 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1255 | switch (val) | |
c906108c | 1256 | { |
7a292a7a SS |
1257 | case 0 : /* fall through */ |
1258 | case 1 : /* fall through */ | |
1259 | case 2 : /* fall through */ | |
1260 | case 3 : itype = I960BASE_INSN_STL_OFFSET; goto extract_fmt_stl_offset; | |
1261 | case 4 : itype = I960BASE_INSN_STL_INDIRECT; goto extract_fmt_stl_indirect; | |
1262 | case 7 : itype = I960BASE_INSN_STL_INDIRECT_INDEX; goto extract_fmt_stl_indirect_index; | |
1263 | case 8 : /* fall through */ | |
1264 | case 9 : /* fall through */ | |
1265 | case 10 : /* fall through */ | |
1266 | case 11 : itype = I960BASE_INSN_STL_INDIRECT_OFFSET; goto extract_fmt_stl_indirect_offset; | |
1267 | case 12 : itype = I960BASE_INSN_STL_DISP; goto extract_fmt_stl_disp; | |
1268 | case 13 : itype = I960BASE_INSN_STL_INDIRECT_DISP; goto extract_fmt_stl_indirect_disp; | |
1269 | case 14 : itype = I960BASE_INSN_STL_INDEX_DISP; goto extract_fmt_stl_index_disp; | |
1270 | case 15 : itype = I960BASE_INSN_STL_INDIRECT_INDEX_DISP; goto extract_fmt_stl_indirect_index_disp; | |
1271 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1272 | } |
7a292a7a SS |
1273 | } |
1274 | case 160 : | |
1275 | { | |
1276 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1277 | switch (val) | |
c906108c | 1278 | { |
7a292a7a SS |
1279 | case 0 : /* fall through */ |
1280 | case 1 : /* fall through */ | |
1281 | case 2 : /* fall through */ | |
1282 | case 3 : itype = I960BASE_INSN_LDT_OFFSET; goto extract_fmt_ldt_offset; | |
1283 | case 4 : itype = I960BASE_INSN_LDT_INDIRECT; goto extract_fmt_ldt_indirect; | |
1284 | case 7 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX; goto extract_fmt_ldt_indirect_index; | |
1285 | case 8 : /* fall through */ | |
1286 | case 9 : /* fall through */ | |
1287 | case 10 : /* fall through */ | |
1288 | case 11 : itype = I960BASE_INSN_LDT_INDIRECT_OFFSET; goto extract_fmt_ldt_indirect_offset; | |
1289 | case 12 : itype = I960BASE_INSN_LDT_DISP; goto extract_fmt_ldt_disp; | |
1290 | case 13 : itype = I960BASE_INSN_LDT_INDIRECT_DISP; goto extract_fmt_ldt_indirect_disp; | |
1291 | case 14 : itype = I960BASE_INSN_LDT_INDEX_DISP; goto extract_fmt_ldt_index_disp; | |
1292 | case 15 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX_DISP; goto extract_fmt_ldt_indirect_index_disp; | |
1293 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1294 | } |
7a292a7a SS |
1295 | } |
1296 | case 162 : | |
1297 | { | |
1298 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1299 | switch (val) | |
c906108c | 1300 | { |
7a292a7a SS |
1301 | case 0 : /* fall through */ |
1302 | case 1 : /* fall through */ | |
1303 | case 2 : /* fall through */ | |
1304 | case 3 : itype = I960BASE_INSN_STT_OFFSET; goto extract_fmt_stt_offset; | |
1305 | case 4 : itype = I960BASE_INSN_STT_INDIRECT; goto extract_fmt_stt_indirect; | |
1306 | case 7 : itype = I960BASE_INSN_STT_INDIRECT_INDEX; goto extract_fmt_stt_indirect_index; | |
1307 | case 8 : /* fall through */ | |
1308 | case 9 : /* fall through */ | |
1309 | case 10 : /* fall through */ | |
1310 | case 11 : itype = I960BASE_INSN_STT_INDIRECT_OFFSET; goto extract_fmt_stt_indirect_offset; | |
1311 | case 12 : itype = I960BASE_INSN_STT_DISP; goto extract_fmt_stt_disp; | |
1312 | case 13 : itype = I960BASE_INSN_STT_INDIRECT_DISP; goto extract_fmt_stt_indirect_disp; | |
1313 | case 14 : itype = I960BASE_INSN_STT_INDEX_DISP; goto extract_fmt_stt_index_disp; | |
1314 | case 15 : itype = I960BASE_INSN_STT_INDIRECT_INDEX_DISP; goto extract_fmt_stt_indirect_index_disp; | |
1315 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1316 | } |
7a292a7a SS |
1317 | } |
1318 | case 176 : | |
1319 | { | |
1320 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1321 | switch (val) | |
c906108c | 1322 | { |
7a292a7a SS |
1323 | case 0 : /* fall through */ |
1324 | case 1 : /* fall through */ | |
1325 | case 2 : /* fall through */ | |
1326 | case 3 : itype = I960BASE_INSN_LDQ_OFFSET; goto extract_fmt_ldq_offset; | |
1327 | case 4 : itype = I960BASE_INSN_LDQ_INDIRECT; goto extract_fmt_ldq_indirect; | |
1328 | case 7 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX; goto extract_fmt_ldq_indirect_index; | |
1329 | case 8 : /* fall through */ | |
1330 | case 9 : /* fall through */ | |
1331 | case 10 : /* fall through */ | |
1332 | case 11 : itype = I960BASE_INSN_LDQ_INDIRECT_OFFSET; goto extract_fmt_ldq_indirect_offset; | |
1333 | case 12 : itype = I960BASE_INSN_LDQ_DISP; goto extract_fmt_ldq_disp; | |
1334 | case 13 : itype = I960BASE_INSN_LDQ_INDIRECT_DISP; goto extract_fmt_ldq_indirect_disp; | |
1335 | case 14 : itype = I960BASE_INSN_LDQ_INDEX_DISP; goto extract_fmt_ldq_index_disp; | |
1336 | case 15 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP; goto extract_fmt_ldq_indirect_index_disp; | |
1337 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1338 | } |
7a292a7a SS |
1339 | } |
1340 | case 178 : | |
1341 | { | |
1342 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1343 | switch (val) | |
c906108c | 1344 | { |
7a292a7a SS |
1345 | case 0 : /* fall through */ |
1346 | case 1 : /* fall through */ | |
1347 | case 2 : /* fall through */ | |
1348 | case 3 : itype = I960BASE_INSN_STQ_OFFSET; goto extract_fmt_stq_offset; | |
1349 | case 4 : itype = I960BASE_INSN_STQ_INDIRECT; goto extract_fmt_stq_indirect; | |
1350 | case 7 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX; goto extract_fmt_stq_indirect_index; | |
1351 | case 8 : /* fall through */ | |
1352 | case 9 : /* fall through */ | |
1353 | case 10 : /* fall through */ | |
1354 | case 11 : itype = I960BASE_INSN_STQ_INDIRECT_OFFSET; goto extract_fmt_stq_indirect_offset; | |
1355 | case 12 : itype = I960BASE_INSN_STQ_DISP; goto extract_fmt_stq_disp; | |
1356 | case 13 : itype = I960BASE_INSN_STQ_INDIRECT_DISP; goto extract_fmt_stq_indirect_disp; | |
1357 | case 14 : itype = I960BASE_INSN_STQ_INDEX_DISP; goto extract_fmt_stq_index_disp; | |
1358 | case 15 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX_DISP; goto extract_fmt_stq_indirect_index_disp; | |
1359 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1360 | } |
7a292a7a SS |
1361 | } |
1362 | case 192 : | |
1363 | { | |
1364 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1365 | switch (val) | |
c906108c | 1366 | { |
7a292a7a SS |
1367 | case 0 : /* fall through */ |
1368 | case 1 : /* fall through */ | |
1369 | case 2 : /* fall through */ | |
1370 | case 3 : itype = I960BASE_INSN_LDIB_OFFSET; goto extract_fmt_ldib_offset; | |
1371 | case 4 : itype = I960BASE_INSN_LDIB_INDIRECT; goto extract_fmt_ldib_indirect; | |
1372 | case 7 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX; goto extract_fmt_ldib_indirect_index; | |
1373 | case 8 : /* fall through */ | |
1374 | case 9 : /* fall through */ | |
1375 | case 10 : /* fall through */ | |
1376 | case 11 : itype = I960BASE_INSN_LDIB_INDIRECT_OFFSET; goto extract_fmt_ldib_indirect_offset; | |
1377 | case 12 : itype = I960BASE_INSN_LDIB_DISP; goto extract_fmt_ldib_disp; | |
1378 | case 13 : itype = I960BASE_INSN_LDIB_INDIRECT_DISP; goto extract_fmt_ldib_indirect_disp; | |
1379 | case 14 : itype = I960BASE_INSN_LDIB_INDEX_DISP; goto extract_fmt_ldib_index_disp; | |
1380 | case 15 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP; goto extract_fmt_ldib_indirect_index_disp; | |
1381 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1382 | } |
7a292a7a SS |
1383 | } |
1384 | case 200 : | |
1385 | { | |
1386 | unsigned int val = (((insn >> 10) & (15 << 0))); | |
1387 | switch (val) | |
c906108c | 1388 | { |
7a292a7a SS |
1389 | case 0 : /* fall through */ |
1390 | case 1 : /* fall through */ | |
1391 | case 2 : /* fall through */ | |
1392 | case 3 : itype = I960BASE_INSN_LDIS_OFFSET; goto extract_fmt_ldis_offset; | |
1393 | case 4 : itype = I960BASE_INSN_LDIS_INDIRECT; goto extract_fmt_ldis_indirect; | |
1394 | case 7 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX; goto extract_fmt_ldis_indirect_index; | |
1395 | case 8 : /* fall through */ | |
1396 | case 9 : /* fall through */ | |
1397 | case 10 : /* fall through */ | |
1398 | case 11 : itype = I960BASE_INSN_LDIS_INDIRECT_OFFSET; goto extract_fmt_ldis_indirect_offset; | |
1399 | case 12 : itype = I960BASE_INSN_LDIS_DISP; goto extract_fmt_ldis_disp; | |
1400 | case 13 : itype = I960BASE_INSN_LDIS_INDIRECT_DISP; goto extract_fmt_ldis_indirect_disp; | |
1401 | case 14 : itype = I960BASE_INSN_LDIS_INDEX_DISP; goto extract_fmt_ldis_index_disp; | |
1402 | case 15 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP; goto extract_fmt_ldis_indirect_index_disp; | |
1403 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; | |
c906108c | 1404 | } |
c906108c | 1405 | } |
7a292a7a SS |
1406 | default : itype = I960BASE_INSN_X_INVALID; goto extract_fmt_empty; |
1407 | } | |
c906108c | 1408 | } |
c906108c SS |
1409 | } |
1410 | ||
1411 | /* The instruction has been decoded, now extract the fields. */ | |
1412 | ||
7a292a7a | 1413 | extract_fmt_empty: |
c906108c | 1414 | { |
7a292a7a | 1415 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1416 | CGEN_INSN_INT insn = base_insn; |
1417 | #define FLD(f) abuf->fields.fmt_empty.f | |
1418 | EXTRACT_IFMT_EMPTY_VARS /* */ | |
1419 | ||
1420 | EXTRACT_IFMT_EMPTY_CODE | |
1421 | ||
1422 | /* Record the fields for the semantic handler. */ | |
1423 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_empty", (char *) 0)); | |
1424 | ||
1425 | #undef FLD | |
7a292a7a | 1426 | return idesc; |
c906108c SS |
1427 | } |
1428 | ||
7a292a7a | 1429 | extract_fmt_mulo: |
c906108c | 1430 | { |
7a292a7a | 1431 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1432 | CGEN_INSN_INT insn = base_insn; |
1433 | #define FLD(f) abuf->fields.fmt_mulo.f | |
1434 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1435 | ||
1436 | EXTRACT_IFMT_MULO_CODE | |
1437 | ||
1438 | /* Record the fields for the semantic handler. */ | |
1439 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1440 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1441 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1442 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1443 | ||
1444 | #if WITH_PROFILE_MODEL_P | |
1445 | /* Record the fields for profiling. */ | |
1446 | if (PROFILE_MODEL_P (current_cpu)) | |
1447 | { | |
1448 | FLD (in_src1) = f_src1; | |
1449 | FLD (in_src2) = f_src2; | |
1450 | FLD (out_dst) = f_srcdst; | |
1451 | } | |
1452 | #endif | |
1453 | #undef FLD | |
7a292a7a | 1454 | return idesc; |
c906108c SS |
1455 | } |
1456 | ||
7a292a7a | 1457 | extract_fmt_mulo1: |
c906108c | 1458 | { |
7a292a7a | 1459 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1460 | CGEN_INSN_INT insn = base_insn; |
1461 | #define FLD(f) abuf->fields.fmt_mulo1.f | |
1462 | EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1463 | ||
1464 | EXTRACT_IFMT_MULO1_CODE | |
1465 | ||
1466 | /* Record the fields for the semantic handler. */ | |
1467 | FLD (f_src1) = f_src1; | |
1468 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1469 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1470 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1471 | ||
1472 | #if WITH_PROFILE_MODEL_P | |
1473 | /* Record the fields for profiling. */ | |
1474 | if (PROFILE_MODEL_P (current_cpu)) | |
1475 | { | |
1476 | FLD (in_src2) = f_src2; | |
1477 | FLD (out_dst) = f_srcdst; | |
1478 | } | |
1479 | #endif | |
1480 | #undef FLD | |
7a292a7a | 1481 | return idesc; |
c906108c SS |
1482 | } |
1483 | ||
7a292a7a | 1484 | extract_fmt_mulo2: |
c906108c | 1485 | { |
7a292a7a | 1486 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1487 | CGEN_INSN_INT insn = base_insn; |
1488 | #define FLD(f) abuf->fields.fmt_mulo2.f | |
1489 | EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1490 | ||
1491 | EXTRACT_IFMT_MULO2_CODE | |
1492 | ||
1493 | /* Record the fields for the semantic handler. */ | |
1494 | FLD (f_src2) = f_src2; | |
1495 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1496 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1497 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1498 | ||
1499 | #if WITH_PROFILE_MODEL_P | |
1500 | /* Record the fields for profiling. */ | |
1501 | if (PROFILE_MODEL_P (current_cpu)) | |
1502 | { | |
1503 | FLD (in_src1) = f_src1; | |
1504 | FLD (out_dst) = f_srcdst; | |
1505 | } | |
1506 | #endif | |
1507 | #undef FLD | |
7a292a7a | 1508 | return idesc; |
c906108c SS |
1509 | } |
1510 | ||
7a292a7a | 1511 | extract_fmt_mulo3: |
c906108c | 1512 | { |
7a292a7a | 1513 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1514 | CGEN_INSN_INT insn = base_insn; |
1515 | #define FLD(f) abuf->fields.fmt_mulo3.f | |
1516 | EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1517 | ||
1518 | EXTRACT_IFMT_MULO3_CODE | |
1519 | ||
1520 | /* Record the fields for the semantic handler. */ | |
1521 | FLD (f_src1) = f_src1; | |
1522 | FLD (f_src2) = f_src2; | |
1523 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1524 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1525 | ||
1526 | #if WITH_PROFILE_MODEL_P | |
1527 | /* Record the fields for profiling. */ | |
1528 | if (PROFILE_MODEL_P (current_cpu)) | |
1529 | { | |
1530 | FLD (out_dst) = f_srcdst; | |
1531 | } | |
1532 | #endif | |
1533 | #undef FLD | |
7a292a7a | 1534 | return idesc; |
c906108c SS |
1535 | } |
1536 | ||
7a292a7a | 1537 | extract_fmt_notbit: |
c906108c | 1538 | { |
7a292a7a | 1539 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1540 | CGEN_INSN_INT insn = base_insn; |
1541 | #define FLD(f) abuf->fields.fmt_notbit.f | |
1542 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1543 | ||
1544 | EXTRACT_IFMT_MULO_CODE | |
1545 | ||
1546 | /* Record the fields for the semantic handler. */ | |
1547 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1548 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1549 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1550 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1551 | ||
1552 | #if WITH_PROFILE_MODEL_P | |
1553 | /* Record the fields for profiling. */ | |
1554 | if (PROFILE_MODEL_P (current_cpu)) | |
1555 | { | |
1556 | FLD (in_src1) = f_src1; | |
1557 | FLD (in_src2) = f_src2; | |
1558 | FLD (out_dst) = f_srcdst; | |
1559 | } | |
1560 | #endif | |
1561 | #undef FLD | |
7a292a7a | 1562 | return idesc; |
c906108c SS |
1563 | } |
1564 | ||
7a292a7a | 1565 | extract_fmt_notbit1: |
c906108c | 1566 | { |
7a292a7a | 1567 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1568 | CGEN_INSN_INT insn = base_insn; |
1569 | #define FLD(f) abuf->fields.fmt_notbit1.f | |
1570 | EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1571 | ||
1572 | EXTRACT_IFMT_MULO1_CODE | |
1573 | ||
1574 | /* Record the fields for the semantic handler. */ | |
1575 | FLD (f_src1) = f_src1; | |
1576 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1577 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1578 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1579 | ||
1580 | #if WITH_PROFILE_MODEL_P | |
1581 | /* Record the fields for profiling. */ | |
1582 | if (PROFILE_MODEL_P (current_cpu)) | |
1583 | { | |
1584 | FLD (in_src2) = f_src2; | |
1585 | FLD (out_dst) = f_srcdst; | |
1586 | } | |
1587 | #endif | |
1588 | #undef FLD | |
7a292a7a | 1589 | return idesc; |
c906108c SS |
1590 | } |
1591 | ||
7a292a7a | 1592 | extract_fmt_notbit2: |
c906108c | 1593 | { |
7a292a7a | 1594 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1595 | CGEN_INSN_INT insn = base_insn; |
1596 | #define FLD(f) abuf->fields.fmt_notbit2.f | |
1597 | EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1598 | ||
1599 | EXTRACT_IFMT_MULO2_CODE | |
1600 | ||
1601 | /* Record the fields for the semantic handler. */ | |
1602 | FLD (f_src2) = f_src2; | |
1603 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1604 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1605 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1606 | ||
1607 | #if WITH_PROFILE_MODEL_P | |
1608 | /* Record the fields for profiling. */ | |
1609 | if (PROFILE_MODEL_P (current_cpu)) | |
1610 | { | |
1611 | FLD (in_src1) = f_src1; | |
1612 | FLD (out_dst) = f_srcdst; | |
1613 | } | |
1614 | #endif | |
1615 | #undef FLD | |
7a292a7a | 1616 | return idesc; |
c906108c SS |
1617 | } |
1618 | ||
7a292a7a | 1619 | extract_fmt_notbit3: |
c906108c | 1620 | { |
7a292a7a | 1621 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1622 | CGEN_INSN_INT insn = base_insn; |
1623 | #define FLD(f) abuf->fields.fmt_notbit3.f | |
1624 | EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1625 | ||
1626 | EXTRACT_IFMT_MULO3_CODE | |
1627 | ||
1628 | /* Record the fields for the semantic handler. */ | |
1629 | FLD (f_src1) = f_src1; | |
1630 | FLD (f_src2) = f_src2; | |
1631 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1632 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_notbit3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1633 | ||
1634 | #if WITH_PROFILE_MODEL_P | |
1635 | /* Record the fields for profiling. */ | |
1636 | if (PROFILE_MODEL_P (current_cpu)) | |
1637 | { | |
1638 | FLD (out_dst) = f_srcdst; | |
1639 | } | |
1640 | #endif | |
1641 | #undef FLD | |
7a292a7a | 1642 | return idesc; |
c906108c SS |
1643 | } |
1644 | ||
7a292a7a | 1645 | extract_fmt_not: |
c906108c | 1646 | { |
7a292a7a | 1647 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1648 | CGEN_INSN_INT insn = base_insn; |
1649 | #define FLD(f) abuf->fields.fmt_not.f | |
1650 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1651 | ||
1652 | EXTRACT_IFMT_MULO_CODE | |
1653 | ||
1654 | /* Record the fields for the semantic handler. */ | |
1655 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1656 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1657 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1658 | ||
1659 | #if WITH_PROFILE_MODEL_P | |
1660 | /* Record the fields for profiling. */ | |
1661 | if (PROFILE_MODEL_P (current_cpu)) | |
1662 | { | |
1663 | FLD (in_src1) = f_src1; | |
1664 | FLD (out_dst) = f_srcdst; | |
1665 | } | |
1666 | #endif | |
1667 | #undef FLD | |
7a292a7a | 1668 | return idesc; |
c906108c SS |
1669 | } |
1670 | ||
7a292a7a | 1671 | extract_fmt_not1: |
c906108c | 1672 | { |
7a292a7a | 1673 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1674 | CGEN_INSN_INT insn = base_insn; |
1675 | #define FLD(f) abuf->fields.fmt_not1.f | |
1676 | EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1677 | ||
1678 | EXTRACT_IFMT_MULO1_CODE | |
1679 | ||
1680 | /* Record the fields for the semantic handler. */ | |
1681 | FLD (f_src1) = f_src1; | |
1682 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1683 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not1", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1684 | ||
1685 | #if WITH_PROFILE_MODEL_P | |
1686 | /* Record the fields for profiling. */ | |
1687 | if (PROFILE_MODEL_P (current_cpu)) | |
1688 | { | |
1689 | FLD (out_dst) = f_srcdst; | |
1690 | } | |
1691 | #endif | |
1692 | #undef FLD | |
7a292a7a | 1693 | return idesc; |
c906108c SS |
1694 | } |
1695 | ||
7a292a7a | 1696 | extract_fmt_not2: |
c906108c | 1697 | { |
7a292a7a | 1698 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1699 | CGEN_INSN_INT insn = base_insn; |
1700 | #define FLD(f) abuf->fields.fmt_not2.f | |
1701 | EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1702 | ||
1703 | EXTRACT_IFMT_MULO2_CODE | |
1704 | ||
1705 | /* Record the fields for the semantic handler. */ | |
1706 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1707 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1708 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not2", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1709 | ||
1710 | #if WITH_PROFILE_MODEL_P | |
1711 | /* Record the fields for profiling. */ | |
1712 | if (PROFILE_MODEL_P (current_cpu)) | |
1713 | { | |
1714 | FLD (in_src1) = f_src1; | |
1715 | FLD (out_dst) = f_srcdst; | |
1716 | } | |
1717 | #endif | |
1718 | #undef FLD | |
7a292a7a | 1719 | return idesc; |
c906108c SS |
1720 | } |
1721 | ||
7a292a7a | 1722 | extract_fmt_not3: |
c906108c | 1723 | { |
7a292a7a | 1724 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1725 | CGEN_INSN_INT insn = base_insn; |
1726 | #define FLD(f) abuf->fields.fmt_not3.f | |
1727 | EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1728 | ||
1729 | EXTRACT_IFMT_MULO3_CODE | |
1730 | ||
1731 | /* Record the fields for the semantic handler. */ | |
1732 | FLD (f_src1) = f_src1; | |
1733 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1734 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_not3", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1735 | ||
1736 | #if WITH_PROFILE_MODEL_P | |
1737 | /* Record the fields for profiling. */ | |
1738 | if (PROFILE_MODEL_P (current_cpu)) | |
1739 | { | |
1740 | FLD (out_dst) = f_srcdst; | |
1741 | } | |
1742 | #endif | |
1743 | #undef FLD | |
7a292a7a SS |
1744 | return idesc; |
1745 | } | |
1746 | ||
1747 | extract_fmt_shlo: | |
1748 | { | |
1749 | const IDESC *idesc = &i960base_insn_data[itype]; | |
1750 | CGEN_INSN_INT insn = base_insn; | |
1751 | #define FLD(f) abuf->fields.fmt_shlo.f | |
1752 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1753 | ||
1754 | EXTRACT_IFMT_MULO_CODE | |
1755 | ||
1756 | /* Record the fields for the semantic handler. */ | |
1757 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1758 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1759 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1760 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1761 | ||
1762 | #if WITH_PROFILE_MODEL_P | |
1763 | /* Record the fields for profiling. */ | |
1764 | if (PROFILE_MODEL_P (current_cpu)) | |
1765 | { | |
1766 | FLD (in_src1) = f_src1; | |
1767 | FLD (in_src2) = f_src2; | |
1768 | FLD (out_dst) = f_srcdst; | |
1769 | } | |
1770 | #endif | |
1771 | #undef FLD | |
1772 | return idesc; | |
1773 | } | |
1774 | ||
1775 | extract_fmt_shlo1: | |
1776 | { | |
1777 | const IDESC *idesc = &i960base_insn_data[itype]; | |
1778 | CGEN_INSN_INT insn = base_insn; | |
1779 | #define FLD(f) abuf->fields.fmt_shlo1.f | |
1780 | EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1781 | ||
1782 | EXTRACT_IFMT_MULO1_CODE | |
1783 | ||
1784 | /* Record the fields for the semantic handler. */ | |
1785 | FLD (f_src1) = f_src1; | |
1786 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1787 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1788 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1789 | ||
1790 | #if WITH_PROFILE_MODEL_P | |
1791 | /* Record the fields for profiling. */ | |
1792 | if (PROFILE_MODEL_P (current_cpu)) | |
1793 | { | |
1794 | FLD (in_src2) = f_src2; | |
1795 | FLD (out_dst) = f_srcdst; | |
1796 | } | |
1797 | #endif | |
1798 | #undef FLD | |
1799 | return idesc; | |
c906108c SS |
1800 | } |
1801 | ||
7a292a7a | 1802 | extract_fmt_shlo2: |
c906108c | 1803 | { |
7a292a7a SS |
1804 | const IDESC *idesc = &i960base_insn_data[itype]; |
1805 | CGEN_INSN_INT insn = base_insn; | |
1806 | #define FLD(f) abuf->fields.fmt_shlo2.f | |
1807 | EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1808 | ||
1809 | EXTRACT_IFMT_MULO2_CODE | |
1810 | ||
1811 | /* Record the fields for the semantic handler. */ | |
1812 | FLD (f_src2) = f_src2; | |
1813 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1814 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1815 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1816 | ||
1817 | #if WITH_PROFILE_MODEL_P | |
1818 | /* Record the fields for profiling. */ | |
1819 | if (PROFILE_MODEL_P (current_cpu)) | |
1820 | { | |
1821 | FLD (in_src1) = f_src1; | |
1822 | FLD (out_dst) = f_srcdst; | |
1823 | } | |
1824 | #endif | |
1825 | #undef FLD | |
1826 | return idesc; | |
1827 | } | |
1828 | ||
1829 | extract_fmt_shlo3: | |
1830 | { | |
1831 | const IDESC *idesc = &i960base_insn_data[itype]; | |
1832 | CGEN_INSN_INT insn = base_insn; | |
1833 | #define FLD(f) abuf->fields.fmt_shlo3.f | |
1834 | EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1835 | ||
1836 | EXTRACT_IFMT_MULO3_CODE | |
1837 | ||
1838 | /* Record the fields for the semantic handler. */ | |
1839 | FLD (f_src1) = f_src1; | |
1840 | FLD (f_src2) = f_src2; | |
1841 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1842 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_shlo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1843 | ||
1844 | #if WITH_PROFILE_MODEL_P | |
1845 | /* Record the fields for profiling. */ | |
1846 | if (PROFILE_MODEL_P (current_cpu)) | |
1847 | { | |
1848 | FLD (out_dst) = f_srcdst; | |
1849 | } | |
1850 | #endif | |
1851 | #undef FLD | |
1852 | return idesc; | |
1853 | } | |
1854 | ||
1855 | extract_fmt_emul: | |
1856 | { | |
1857 | const IDESC *idesc = &i960base_insn_data[itype]; | |
c906108c SS |
1858 | CGEN_INSN_INT insn = base_insn; |
1859 | #define FLD(f) abuf->fields.fmt_emul.f | |
1860 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1861 | ||
1862 | EXTRACT_IFMT_MULO_CODE | |
1863 | ||
1864 | /* Record the fields for the semantic handler. */ | |
1865 | FLD (f_srcdst) = f_srcdst; | |
1866 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1867 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1868 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1869 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul", "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1870 | ||
1871 | #if WITH_PROFILE_MODEL_P | |
1872 | /* Record the fields for profiling. */ | |
1873 | if (PROFILE_MODEL_P (current_cpu)) | |
1874 | { | |
1875 | FLD (in_src1) = f_src1; | |
1876 | FLD (in_src2) = f_src2; | |
1877 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 1878 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
1879 | } |
1880 | #endif | |
1881 | #undef FLD | |
7a292a7a | 1882 | return idesc; |
c906108c SS |
1883 | } |
1884 | ||
7a292a7a | 1885 | extract_fmt_emul1: |
c906108c | 1886 | { |
7a292a7a | 1887 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1888 | CGEN_INSN_INT insn = base_insn; |
1889 | #define FLD(f) abuf->fields.fmt_emul1.f | |
1890 | EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1891 | ||
1892 | EXTRACT_IFMT_MULO1_CODE | |
1893 | ||
1894 | /* Record the fields for the semantic handler. */ | |
1895 | FLD (f_srcdst) = f_srcdst; | |
1896 | FLD (f_src1) = f_src1; | |
1897 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
1898 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1899 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1900 | ||
1901 | #if WITH_PROFILE_MODEL_P | |
1902 | /* Record the fields for profiling. */ | |
1903 | if (PROFILE_MODEL_P (current_cpu)) | |
1904 | { | |
1905 | FLD (in_src2) = f_src2; | |
1906 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 1907 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
1908 | } |
1909 | #endif | |
1910 | #undef FLD | |
7a292a7a | 1911 | return idesc; |
c906108c SS |
1912 | } |
1913 | ||
7a292a7a | 1914 | extract_fmt_emul2: |
c906108c | 1915 | { |
7a292a7a | 1916 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1917 | CGEN_INSN_INT insn = base_insn; |
1918 | #define FLD(f) abuf->fields.fmt_emul2.f | |
1919 | EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1920 | ||
1921 | EXTRACT_IFMT_MULO2_CODE | |
1922 | ||
1923 | /* Record the fields for the semantic handler. */ | |
1924 | FLD (f_srcdst) = f_srcdst; | |
1925 | FLD (f_src2) = f_src2; | |
1926 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1927 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1928 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul2", "f_srcdst 0x%x", 'x', f_srcdst, "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1929 | ||
1930 | #if WITH_PROFILE_MODEL_P | |
1931 | /* Record the fields for profiling. */ | |
1932 | if (PROFILE_MODEL_P (current_cpu)) | |
1933 | { | |
1934 | FLD (in_src1) = f_src1; | |
1935 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 1936 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
1937 | } |
1938 | #endif | |
1939 | #undef FLD | |
7a292a7a | 1940 | return idesc; |
c906108c SS |
1941 | } |
1942 | ||
7a292a7a | 1943 | extract_fmt_emul3: |
c906108c | 1944 | { |
7a292a7a | 1945 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1946 | CGEN_INSN_INT insn = base_insn; |
1947 | #define FLD(f) abuf->fields.fmt_emul3.f | |
1948 | EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1949 | ||
1950 | EXTRACT_IFMT_MULO3_CODE | |
1951 | ||
1952 | /* Record the fields for the semantic handler. */ | |
1953 | FLD (f_srcdst) = f_srcdst; | |
1954 | FLD (f_src1) = f_src1; | |
1955 | FLD (f_src2) = f_src2; | |
1956 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1957 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_emul3", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1958 | ||
1959 | #if WITH_PROFILE_MODEL_P | |
1960 | /* Record the fields for profiling. */ | |
1961 | if (PROFILE_MODEL_P (current_cpu)) | |
1962 | { | |
1963 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 1964 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
1965 | } |
1966 | #endif | |
1967 | #undef FLD | |
7a292a7a | 1968 | return idesc; |
c906108c SS |
1969 | } |
1970 | ||
7a292a7a | 1971 | extract_fmt_movl: |
c906108c | 1972 | { |
7a292a7a | 1973 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
1974 | CGEN_INSN_INT insn = base_insn; |
1975 | #define FLD(f) abuf->fields.fmt_movl.f | |
1976 | EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
1977 | ||
1978 | EXTRACT_IFMT_MULO2_CODE | |
1979 | ||
1980 | /* Record the fields for the semantic handler. */ | |
1981 | FLD (f_src1) = f_src1; | |
1982 | FLD (f_srcdst) = f_srcdst; | |
1983 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
1984 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
1985 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movl", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
1986 | ||
1987 | #if WITH_PROFILE_MODEL_P | |
1988 | /* Record the fields for profiling. */ | |
1989 | if (PROFILE_MODEL_P (current_cpu)) | |
1990 | { | |
7a292a7a | 1991 | FLD (in_h_gr_add__VM_index_of_src1_1) = ((FLD (f_src1)) + (1)); |
c906108c SS |
1992 | FLD (in_src1) = f_src1; |
1993 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 1994 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
1995 | } |
1996 | #endif | |
1997 | #undef FLD | |
7a292a7a | 1998 | return idesc; |
c906108c SS |
1999 | } |
2000 | ||
7a292a7a | 2001 | extract_fmt_movl1: |
c906108c | 2002 | { |
7a292a7a | 2003 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2004 | CGEN_INSN_INT insn = base_insn; |
2005 | #define FLD(f) abuf->fields.fmt_movl1.f | |
2006 | EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
2007 | ||
2008 | EXTRACT_IFMT_MULO3_CODE | |
2009 | ||
2010 | /* Record the fields for the semantic handler. */ | |
2011 | FLD (f_srcdst) = f_srcdst; | |
2012 | FLD (f_src1) = f_src1; | |
2013 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2014 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movl1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2015 | ||
2016 | #if WITH_PROFILE_MODEL_P | |
2017 | /* Record the fields for profiling. */ | |
2018 | if (PROFILE_MODEL_P (current_cpu)) | |
2019 | { | |
2020 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 2021 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
2022 | } |
2023 | #endif | |
2024 | #undef FLD | |
7a292a7a | 2025 | return idesc; |
c906108c SS |
2026 | } |
2027 | ||
7a292a7a | 2028 | extract_fmt_movt: |
c906108c | 2029 | { |
7a292a7a | 2030 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2031 | CGEN_INSN_INT insn = base_insn; |
2032 | #define FLD(f) abuf->fields.fmt_movt.f | |
2033 | EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
2034 | ||
2035 | EXTRACT_IFMT_MULO2_CODE | |
2036 | ||
2037 | /* Record the fields for the semantic handler. */ | |
2038 | FLD (f_src1) = f_src1; | |
2039 | FLD (f_srcdst) = f_srcdst; | |
2040 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
2041 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2042 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movt", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2043 | ||
2044 | #if WITH_PROFILE_MODEL_P | |
2045 | /* Record the fields for profiling. */ | |
2046 | if (PROFILE_MODEL_P (current_cpu)) | |
2047 | { | |
7a292a7a SS |
2048 | FLD (in_h_gr_add__VM_index_of_src1_1) = ((FLD (f_src1)) + (1)); |
2049 | FLD (in_h_gr_add__VM_index_of_src1_2) = ((FLD (f_src1)) + (2)); | |
c906108c SS |
2050 | FLD (in_src1) = f_src1; |
2051 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
2052 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
2053 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
2054 | } |
2055 | #endif | |
2056 | #undef FLD | |
7a292a7a | 2057 | return idesc; |
c906108c SS |
2058 | } |
2059 | ||
7a292a7a | 2060 | extract_fmt_movt1: |
c906108c | 2061 | { |
7a292a7a | 2062 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2063 | CGEN_INSN_INT insn = base_insn; |
2064 | #define FLD(f) abuf->fields.fmt_movt1.f | |
2065 | EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
2066 | ||
2067 | EXTRACT_IFMT_MULO3_CODE | |
2068 | ||
2069 | /* Record the fields for the semantic handler. */ | |
2070 | FLD (f_srcdst) = f_srcdst; | |
2071 | FLD (f_src1) = f_src1; | |
2072 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2073 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movt1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2074 | ||
2075 | #if WITH_PROFILE_MODEL_P | |
2076 | /* Record the fields for profiling. */ | |
2077 | if (PROFILE_MODEL_P (current_cpu)) | |
2078 | { | |
2079 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
2080 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
2081 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
2082 | } |
2083 | #endif | |
2084 | #undef FLD | |
7a292a7a | 2085 | return idesc; |
c906108c SS |
2086 | } |
2087 | ||
7a292a7a | 2088 | extract_fmt_movq: |
c906108c | 2089 | { |
7a292a7a | 2090 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2091 | CGEN_INSN_INT insn = base_insn; |
2092 | #define FLD(f) abuf->fields.fmt_movq.f | |
2093 | EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
2094 | ||
2095 | EXTRACT_IFMT_MULO2_CODE | |
2096 | ||
2097 | /* Record the fields for the semantic handler. */ | |
2098 | FLD (f_src1) = f_src1; | |
2099 | FLD (f_srcdst) = f_srcdst; | |
2100 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
2101 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2102 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movq", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2103 | ||
2104 | #if WITH_PROFILE_MODEL_P | |
2105 | /* Record the fields for profiling. */ | |
2106 | if (PROFILE_MODEL_P (current_cpu)) | |
2107 | { | |
7a292a7a SS |
2108 | FLD (in_h_gr_add__VM_index_of_src1_1) = ((FLD (f_src1)) + (1)); |
2109 | FLD (in_h_gr_add__VM_index_of_src1_2) = ((FLD (f_src1)) + (2)); | |
2110 | FLD (in_h_gr_add__VM_index_of_src1_3) = ((FLD (f_src1)) + (3)); | |
c906108c SS |
2111 | FLD (in_src1) = f_src1; |
2112 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
2113 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
2114 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
2115 | FLD (out_h_gr_add__VM_index_of_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
2116 | } |
2117 | #endif | |
2118 | #undef FLD | |
7a292a7a | 2119 | return idesc; |
c906108c SS |
2120 | } |
2121 | ||
7a292a7a | 2122 | extract_fmt_movq1: |
c906108c | 2123 | { |
7a292a7a | 2124 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2125 | CGEN_INSN_INT insn = base_insn; |
2126 | #define FLD(f) abuf->fields.fmt_movq1.f | |
2127 | EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
2128 | ||
2129 | EXTRACT_IFMT_MULO3_CODE | |
2130 | ||
2131 | /* Record the fields for the semantic handler. */ | |
2132 | FLD (f_srcdst) = f_srcdst; | |
2133 | FLD (f_src1) = f_src1; | |
2134 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2135 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movq1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2136 | ||
2137 | #if WITH_PROFILE_MODEL_P | |
2138 | /* Record the fields for profiling. */ | |
2139 | if (PROFILE_MODEL_P (current_cpu)) | |
2140 | { | |
2141 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
2142 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
2143 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
2144 | FLD (out_h_gr_add__VM_index_of_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
2145 | } |
2146 | #endif | |
2147 | #undef FLD | |
7a292a7a | 2148 | return idesc; |
c906108c SS |
2149 | } |
2150 | ||
7a292a7a | 2151 | extract_fmt_modpc: |
c906108c | 2152 | { |
7a292a7a | 2153 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2154 | CGEN_INSN_INT insn = base_insn; |
2155 | #define FLD(f) abuf->fields.fmt_modpc.f | |
2156 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
2157 | ||
2158 | EXTRACT_IFMT_MULO_CODE | |
2159 | ||
2160 | /* Record the fields for the semantic handler. */ | |
2161 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
2162 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2163 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_modpc", "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2164 | ||
2165 | #if WITH_PROFILE_MODEL_P | |
2166 | /* Record the fields for profiling. */ | |
2167 | if (PROFILE_MODEL_P (current_cpu)) | |
2168 | { | |
2169 | FLD (in_src2) = f_src2; | |
2170 | FLD (out_dst) = f_srcdst; | |
2171 | } | |
2172 | #endif | |
2173 | #undef FLD | |
7a292a7a | 2174 | return idesc; |
c906108c SS |
2175 | } |
2176 | ||
7a292a7a | 2177 | extract_fmt_lda_offset: |
c906108c | 2178 | { |
7a292a7a | 2179 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2180 | CGEN_INSN_INT insn = base_insn; |
2181 | #define FLD(f) abuf->fields.fmt_lda_offset.f | |
2182 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
2183 | ||
2184 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
2185 | ||
2186 | /* Record the fields for the semantic handler. */ | |
2187 | FLD (f_offset) = f_offset; | |
2188 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2189 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2190 | ||
2191 | #if WITH_PROFILE_MODEL_P | |
2192 | /* Record the fields for profiling. */ | |
2193 | if (PROFILE_MODEL_P (current_cpu)) | |
2194 | { | |
2195 | FLD (out_dst) = f_srcdst; | |
2196 | } | |
2197 | #endif | |
2198 | #undef FLD | |
7a292a7a | 2199 | return idesc; |
c906108c SS |
2200 | } |
2201 | ||
7a292a7a | 2202 | extract_fmt_lda_indirect_offset: |
c906108c | 2203 | { |
7a292a7a | 2204 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2205 | CGEN_INSN_INT insn = base_insn; |
2206 | #define FLD(f) abuf->fields.fmt_lda_indirect_offset.f | |
2207 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
2208 | ||
2209 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
2210 | ||
2211 | /* Record the fields for the semantic handler. */ | |
2212 | FLD (f_offset) = f_offset; | |
2213 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2214 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2215 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2216 | ||
2217 | #if WITH_PROFILE_MODEL_P | |
2218 | /* Record the fields for profiling. */ | |
2219 | if (PROFILE_MODEL_P (current_cpu)) | |
2220 | { | |
2221 | FLD (in_abase) = f_abase; | |
2222 | FLD (out_dst) = f_srcdst; | |
2223 | } | |
2224 | #endif | |
2225 | #undef FLD | |
7a292a7a | 2226 | return idesc; |
c906108c SS |
2227 | } |
2228 | ||
7a292a7a | 2229 | extract_fmt_lda_indirect: |
c906108c | 2230 | { |
7a292a7a | 2231 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2232 | CGEN_INSN_INT insn = base_insn; |
2233 | #define FLD(f) abuf->fields.fmt_lda_indirect.f | |
2234 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2235 | ||
2236 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
2237 | ||
2238 | /* Record the fields for the semantic handler. */ | |
2239 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2240 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2241 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2242 | ||
2243 | #if WITH_PROFILE_MODEL_P | |
2244 | /* Record the fields for profiling. */ | |
2245 | if (PROFILE_MODEL_P (current_cpu)) | |
2246 | { | |
2247 | FLD (in_abase) = f_abase; | |
2248 | FLD (out_dst) = f_srcdst; | |
2249 | } | |
2250 | #endif | |
2251 | #undef FLD | |
7a292a7a | 2252 | return idesc; |
c906108c SS |
2253 | } |
2254 | ||
7a292a7a | 2255 | extract_fmt_lda_indirect_index: |
c906108c | 2256 | { |
7a292a7a | 2257 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2258 | CGEN_INSN_INT insn = base_insn; |
2259 | #define FLD(f) abuf->fields.fmt_lda_indirect_index.f | |
2260 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2261 | ||
2262 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
2263 | ||
2264 | /* Record the fields for the semantic handler. */ | |
2265 | FLD (f_scale) = f_scale; | |
2266 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2267 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2268 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2269 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2270 | ||
2271 | #if WITH_PROFILE_MODEL_P | |
2272 | /* Record the fields for profiling. */ | |
2273 | if (PROFILE_MODEL_P (current_cpu)) | |
2274 | { | |
2275 | FLD (in_abase) = f_abase; | |
2276 | FLD (in_index) = f_index; | |
2277 | FLD (out_dst) = f_srcdst; | |
2278 | } | |
2279 | #endif | |
2280 | #undef FLD | |
7a292a7a | 2281 | return idesc; |
c906108c SS |
2282 | } |
2283 | ||
7a292a7a | 2284 | extract_fmt_lda_disp: |
c906108c | 2285 | { |
7a292a7a | 2286 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2287 | CGEN_INSN_INT insn = base_insn; |
2288 | #define FLD(f) abuf->fields.fmt_lda_disp.f | |
2289 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2290 | ||
2291 | EXTRACT_IFMT_LDA_DISP_CODE | |
2292 | ||
2293 | /* Record the fields for the semantic handler. */ | |
2294 | FLD (f_optdisp) = f_optdisp; | |
2295 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2296 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2297 | ||
2298 | #if WITH_PROFILE_MODEL_P | |
2299 | /* Record the fields for profiling. */ | |
2300 | if (PROFILE_MODEL_P (current_cpu)) | |
2301 | { | |
2302 | FLD (out_dst) = f_srcdst; | |
2303 | } | |
2304 | #endif | |
2305 | #undef FLD | |
7a292a7a | 2306 | return idesc; |
c906108c SS |
2307 | } |
2308 | ||
7a292a7a | 2309 | extract_fmt_lda_indirect_disp: |
c906108c | 2310 | { |
7a292a7a | 2311 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2312 | CGEN_INSN_INT insn = base_insn; |
2313 | #define FLD(f) abuf->fields.fmt_lda_indirect_disp.f | |
2314 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2315 | ||
2316 | EXTRACT_IFMT_LDA_DISP_CODE | |
2317 | ||
2318 | /* Record the fields for the semantic handler. */ | |
2319 | FLD (f_optdisp) = f_optdisp; | |
2320 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2321 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2322 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2323 | ||
2324 | #if WITH_PROFILE_MODEL_P | |
2325 | /* Record the fields for profiling. */ | |
2326 | if (PROFILE_MODEL_P (current_cpu)) | |
2327 | { | |
2328 | FLD (in_abase) = f_abase; | |
2329 | FLD (out_dst) = f_srcdst; | |
2330 | } | |
2331 | #endif | |
2332 | #undef FLD | |
7a292a7a | 2333 | return idesc; |
c906108c SS |
2334 | } |
2335 | ||
7a292a7a | 2336 | extract_fmt_lda_index_disp: |
c906108c | 2337 | { |
7a292a7a | 2338 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2339 | CGEN_INSN_INT insn = base_insn; |
2340 | #define FLD(f) abuf->fields.fmt_lda_index_disp.f | |
2341 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2342 | ||
2343 | EXTRACT_IFMT_LDA_DISP_CODE | |
2344 | ||
2345 | /* Record the fields for the semantic handler. */ | |
2346 | FLD (f_optdisp) = f_optdisp; | |
2347 | FLD (f_scale) = f_scale; | |
2348 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2349 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2350 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2351 | ||
2352 | #if WITH_PROFILE_MODEL_P | |
2353 | /* Record the fields for profiling. */ | |
2354 | if (PROFILE_MODEL_P (current_cpu)) | |
2355 | { | |
2356 | FLD (in_index) = f_index; | |
2357 | FLD (out_dst) = f_srcdst; | |
2358 | } | |
2359 | #endif | |
2360 | #undef FLD | |
7a292a7a | 2361 | return idesc; |
c906108c SS |
2362 | } |
2363 | ||
7a292a7a | 2364 | extract_fmt_lda_indirect_index_disp: |
c906108c | 2365 | { |
7a292a7a | 2366 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2367 | CGEN_INSN_INT insn = base_insn; |
2368 | #define FLD(f) abuf->fields.fmt_lda_indirect_index_disp.f | |
2369 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2370 | ||
2371 | EXTRACT_IFMT_LDA_DISP_CODE | |
2372 | ||
2373 | /* Record the fields for the semantic handler. */ | |
2374 | FLD (f_optdisp) = f_optdisp; | |
2375 | FLD (f_scale) = f_scale; | |
2376 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2377 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2378 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2379 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lda_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2380 | ||
2381 | #if WITH_PROFILE_MODEL_P | |
2382 | /* Record the fields for profiling. */ | |
2383 | if (PROFILE_MODEL_P (current_cpu)) | |
2384 | { | |
2385 | FLD (in_abase) = f_abase; | |
2386 | FLD (in_index) = f_index; | |
2387 | FLD (out_dst) = f_srcdst; | |
2388 | } | |
2389 | #endif | |
2390 | #undef FLD | |
7a292a7a | 2391 | return idesc; |
c906108c SS |
2392 | } |
2393 | ||
7a292a7a | 2394 | extract_fmt_ld_offset: |
c906108c | 2395 | { |
7a292a7a | 2396 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2397 | CGEN_INSN_INT insn = base_insn; |
2398 | #define FLD(f) abuf->fields.fmt_ld_offset.f | |
2399 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
2400 | ||
2401 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
2402 | ||
2403 | /* Record the fields for the semantic handler. */ | |
2404 | FLD (f_offset) = f_offset; | |
2405 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2406 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2407 | ||
2408 | #if WITH_PROFILE_MODEL_P | |
2409 | /* Record the fields for profiling. */ | |
2410 | if (PROFILE_MODEL_P (current_cpu)) | |
2411 | { | |
2412 | FLD (out_dst) = f_srcdst; | |
2413 | } | |
2414 | #endif | |
2415 | #undef FLD | |
7a292a7a | 2416 | return idesc; |
c906108c SS |
2417 | } |
2418 | ||
7a292a7a | 2419 | extract_fmt_ld_indirect_offset: |
c906108c | 2420 | { |
7a292a7a | 2421 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2422 | CGEN_INSN_INT insn = base_insn; |
2423 | #define FLD(f) abuf->fields.fmt_ld_indirect_offset.f | |
2424 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
2425 | ||
2426 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
2427 | ||
2428 | /* Record the fields for the semantic handler. */ | |
2429 | FLD (f_offset) = f_offset; | |
2430 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2431 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2432 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2433 | ||
2434 | #if WITH_PROFILE_MODEL_P | |
2435 | /* Record the fields for profiling. */ | |
2436 | if (PROFILE_MODEL_P (current_cpu)) | |
2437 | { | |
2438 | FLD (in_abase) = f_abase; | |
2439 | FLD (out_dst) = f_srcdst; | |
2440 | } | |
2441 | #endif | |
2442 | #undef FLD | |
7a292a7a | 2443 | return idesc; |
c906108c SS |
2444 | } |
2445 | ||
7a292a7a | 2446 | extract_fmt_ld_indirect: |
c906108c | 2447 | { |
7a292a7a | 2448 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2449 | CGEN_INSN_INT insn = base_insn; |
2450 | #define FLD(f) abuf->fields.fmt_ld_indirect.f | |
2451 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2452 | ||
2453 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
2454 | ||
2455 | /* Record the fields for the semantic handler. */ | |
2456 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2457 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2458 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2459 | ||
2460 | #if WITH_PROFILE_MODEL_P | |
2461 | /* Record the fields for profiling. */ | |
2462 | if (PROFILE_MODEL_P (current_cpu)) | |
2463 | { | |
2464 | FLD (in_abase) = f_abase; | |
2465 | FLD (out_dst) = f_srcdst; | |
2466 | } | |
2467 | #endif | |
2468 | #undef FLD | |
7a292a7a | 2469 | return idesc; |
c906108c SS |
2470 | } |
2471 | ||
7a292a7a | 2472 | extract_fmt_ld_indirect_index: |
c906108c | 2473 | { |
7a292a7a | 2474 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2475 | CGEN_INSN_INT insn = base_insn; |
2476 | #define FLD(f) abuf->fields.fmt_ld_indirect_index.f | |
2477 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2478 | ||
2479 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
2480 | ||
2481 | /* Record the fields for the semantic handler. */ | |
2482 | FLD (f_scale) = f_scale; | |
2483 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2484 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2485 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2486 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2487 | ||
2488 | #if WITH_PROFILE_MODEL_P | |
2489 | /* Record the fields for profiling. */ | |
2490 | if (PROFILE_MODEL_P (current_cpu)) | |
2491 | { | |
2492 | FLD (in_abase) = f_abase; | |
2493 | FLD (in_index) = f_index; | |
2494 | FLD (out_dst) = f_srcdst; | |
2495 | } | |
2496 | #endif | |
2497 | #undef FLD | |
7a292a7a | 2498 | return idesc; |
c906108c SS |
2499 | } |
2500 | ||
7a292a7a | 2501 | extract_fmt_ld_disp: |
c906108c | 2502 | { |
7a292a7a | 2503 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2504 | CGEN_INSN_INT insn = base_insn; |
2505 | #define FLD(f) abuf->fields.fmt_ld_disp.f | |
2506 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2507 | ||
2508 | EXTRACT_IFMT_LDA_DISP_CODE | |
2509 | ||
2510 | /* Record the fields for the semantic handler. */ | |
2511 | FLD (f_optdisp) = f_optdisp; | |
2512 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2513 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2514 | ||
2515 | #if WITH_PROFILE_MODEL_P | |
2516 | /* Record the fields for profiling. */ | |
2517 | if (PROFILE_MODEL_P (current_cpu)) | |
2518 | { | |
2519 | FLD (out_dst) = f_srcdst; | |
2520 | } | |
2521 | #endif | |
2522 | #undef FLD | |
7a292a7a | 2523 | return idesc; |
c906108c SS |
2524 | } |
2525 | ||
7a292a7a | 2526 | extract_fmt_ld_indirect_disp: |
c906108c | 2527 | { |
7a292a7a | 2528 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2529 | CGEN_INSN_INT insn = base_insn; |
2530 | #define FLD(f) abuf->fields.fmt_ld_indirect_disp.f | |
2531 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2532 | ||
2533 | EXTRACT_IFMT_LDA_DISP_CODE | |
2534 | ||
2535 | /* Record the fields for the semantic handler. */ | |
2536 | FLD (f_optdisp) = f_optdisp; | |
2537 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2538 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2539 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2540 | ||
2541 | #if WITH_PROFILE_MODEL_P | |
2542 | /* Record the fields for profiling. */ | |
2543 | if (PROFILE_MODEL_P (current_cpu)) | |
2544 | { | |
2545 | FLD (in_abase) = f_abase; | |
2546 | FLD (out_dst) = f_srcdst; | |
2547 | } | |
2548 | #endif | |
2549 | #undef FLD | |
7a292a7a | 2550 | return idesc; |
c906108c SS |
2551 | } |
2552 | ||
7a292a7a | 2553 | extract_fmt_ld_index_disp: |
c906108c | 2554 | { |
7a292a7a | 2555 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2556 | CGEN_INSN_INT insn = base_insn; |
2557 | #define FLD(f) abuf->fields.fmt_ld_index_disp.f | |
2558 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2559 | ||
2560 | EXTRACT_IFMT_LDA_DISP_CODE | |
2561 | ||
2562 | /* Record the fields for the semantic handler. */ | |
2563 | FLD (f_optdisp) = f_optdisp; | |
2564 | FLD (f_scale) = f_scale; | |
2565 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2566 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2567 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2568 | ||
2569 | #if WITH_PROFILE_MODEL_P | |
2570 | /* Record the fields for profiling. */ | |
2571 | if (PROFILE_MODEL_P (current_cpu)) | |
2572 | { | |
2573 | FLD (in_index) = f_index; | |
2574 | FLD (out_dst) = f_srcdst; | |
2575 | } | |
2576 | #endif | |
2577 | #undef FLD | |
7a292a7a | 2578 | return idesc; |
c906108c SS |
2579 | } |
2580 | ||
7a292a7a | 2581 | extract_fmt_ld_indirect_index_disp: |
c906108c | 2582 | { |
7a292a7a | 2583 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2584 | CGEN_INSN_INT insn = base_insn; |
2585 | #define FLD(f) abuf->fields.fmt_ld_indirect_index_disp.f | |
2586 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2587 | ||
2588 | EXTRACT_IFMT_LDA_DISP_CODE | |
2589 | ||
2590 | /* Record the fields for the semantic handler. */ | |
2591 | FLD (f_optdisp) = f_optdisp; | |
2592 | FLD (f_scale) = f_scale; | |
2593 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2594 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2595 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2596 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2597 | ||
2598 | #if WITH_PROFILE_MODEL_P | |
2599 | /* Record the fields for profiling. */ | |
2600 | if (PROFILE_MODEL_P (current_cpu)) | |
2601 | { | |
2602 | FLD (in_abase) = f_abase; | |
2603 | FLD (in_index) = f_index; | |
2604 | FLD (out_dst) = f_srcdst; | |
2605 | } | |
2606 | #endif | |
2607 | #undef FLD | |
7a292a7a | 2608 | return idesc; |
c906108c SS |
2609 | } |
2610 | ||
7a292a7a | 2611 | extract_fmt_ldob_offset: |
c906108c | 2612 | { |
7a292a7a | 2613 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2614 | CGEN_INSN_INT insn = base_insn; |
2615 | #define FLD(f) abuf->fields.fmt_ldob_offset.f | |
2616 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
2617 | ||
2618 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
2619 | ||
2620 | /* Record the fields for the semantic handler. */ | |
2621 | FLD (f_offset) = f_offset; | |
2622 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2623 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2624 | ||
2625 | #if WITH_PROFILE_MODEL_P | |
2626 | /* Record the fields for profiling. */ | |
2627 | if (PROFILE_MODEL_P (current_cpu)) | |
2628 | { | |
2629 | FLD (out_dst) = f_srcdst; | |
2630 | } | |
2631 | #endif | |
2632 | #undef FLD | |
7a292a7a | 2633 | return idesc; |
c906108c SS |
2634 | } |
2635 | ||
7a292a7a | 2636 | extract_fmt_ldob_indirect_offset: |
c906108c | 2637 | { |
7a292a7a | 2638 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2639 | CGEN_INSN_INT insn = base_insn; |
2640 | #define FLD(f) abuf->fields.fmt_ldob_indirect_offset.f | |
2641 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
2642 | ||
2643 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
2644 | ||
2645 | /* Record the fields for the semantic handler. */ | |
2646 | FLD (f_offset) = f_offset; | |
2647 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2648 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2649 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2650 | ||
2651 | #if WITH_PROFILE_MODEL_P | |
2652 | /* Record the fields for profiling. */ | |
2653 | if (PROFILE_MODEL_P (current_cpu)) | |
2654 | { | |
2655 | FLD (in_abase) = f_abase; | |
2656 | FLD (out_dst) = f_srcdst; | |
2657 | } | |
2658 | #endif | |
2659 | #undef FLD | |
7a292a7a | 2660 | return idesc; |
c906108c SS |
2661 | } |
2662 | ||
7a292a7a | 2663 | extract_fmt_ldob_indirect: |
c906108c | 2664 | { |
7a292a7a | 2665 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2666 | CGEN_INSN_INT insn = base_insn; |
2667 | #define FLD(f) abuf->fields.fmt_ldob_indirect.f | |
2668 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2669 | ||
2670 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
2671 | ||
2672 | /* Record the fields for the semantic handler. */ | |
2673 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2674 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2675 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2676 | ||
2677 | #if WITH_PROFILE_MODEL_P | |
2678 | /* Record the fields for profiling. */ | |
2679 | if (PROFILE_MODEL_P (current_cpu)) | |
2680 | { | |
2681 | FLD (in_abase) = f_abase; | |
2682 | FLD (out_dst) = f_srcdst; | |
2683 | } | |
2684 | #endif | |
2685 | #undef FLD | |
7a292a7a | 2686 | return idesc; |
c906108c SS |
2687 | } |
2688 | ||
7a292a7a | 2689 | extract_fmt_ldob_indirect_index: |
c906108c | 2690 | { |
7a292a7a | 2691 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2692 | CGEN_INSN_INT insn = base_insn; |
2693 | #define FLD(f) abuf->fields.fmt_ldob_indirect_index.f | |
2694 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2695 | ||
2696 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
2697 | ||
2698 | /* Record the fields for the semantic handler. */ | |
2699 | FLD (f_scale) = f_scale; | |
2700 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2701 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2702 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2703 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2704 | ||
2705 | #if WITH_PROFILE_MODEL_P | |
2706 | /* Record the fields for profiling. */ | |
2707 | if (PROFILE_MODEL_P (current_cpu)) | |
2708 | { | |
2709 | FLD (in_abase) = f_abase; | |
2710 | FLD (in_index) = f_index; | |
2711 | FLD (out_dst) = f_srcdst; | |
2712 | } | |
2713 | #endif | |
2714 | #undef FLD | |
7a292a7a | 2715 | return idesc; |
c906108c SS |
2716 | } |
2717 | ||
7a292a7a | 2718 | extract_fmt_ldob_disp: |
c906108c | 2719 | { |
7a292a7a | 2720 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2721 | CGEN_INSN_INT insn = base_insn; |
2722 | #define FLD(f) abuf->fields.fmt_ldob_disp.f | |
2723 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2724 | ||
2725 | EXTRACT_IFMT_LDA_DISP_CODE | |
2726 | ||
2727 | /* Record the fields for the semantic handler. */ | |
2728 | FLD (f_optdisp) = f_optdisp; | |
2729 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2730 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2731 | ||
2732 | #if WITH_PROFILE_MODEL_P | |
2733 | /* Record the fields for profiling. */ | |
2734 | if (PROFILE_MODEL_P (current_cpu)) | |
2735 | { | |
2736 | FLD (out_dst) = f_srcdst; | |
2737 | } | |
2738 | #endif | |
2739 | #undef FLD | |
7a292a7a | 2740 | return idesc; |
c906108c SS |
2741 | } |
2742 | ||
7a292a7a | 2743 | extract_fmt_ldob_indirect_disp: |
c906108c | 2744 | { |
7a292a7a | 2745 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2746 | CGEN_INSN_INT insn = base_insn; |
2747 | #define FLD(f) abuf->fields.fmt_ldob_indirect_disp.f | |
2748 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2749 | ||
2750 | EXTRACT_IFMT_LDA_DISP_CODE | |
2751 | ||
2752 | /* Record the fields for the semantic handler. */ | |
2753 | FLD (f_optdisp) = f_optdisp; | |
2754 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2755 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2756 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2757 | ||
2758 | #if WITH_PROFILE_MODEL_P | |
2759 | /* Record the fields for profiling. */ | |
2760 | if (PROFILE_MODEL_P (current_cpu)) | |
2761 | { | |
2762 | FLD (in_abase) = f_abase; | |
2763 | FLD (out_dst) = f_srcdst; | |
2764 | } | |
2765 | #endif | |
2766 | #undef FLD | |
7a292a7a | 2767 | return idesc; |
c906108c SS |
2768 | } |
2769 | ||
7a292a7a | 2770 | extract_fmt_ldob_index_disp: |
c906108c | 2771 | { |
7a292a7a | 2772 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2773 | CGEN_INSN_INT insn = base_insn; |
2774 | #define FLD(f) abuf->fields.fmt_ldob_index_disp.f | |
2775 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2776 | ||
2777 | EXTRACT_IFMT_LDA_DISP_CODE | |
2778 | ||
2779 | /* Record the fields for the semantic handler. */ | |
2780 | FLD (f_optdisp) = f_optdisp; | |
2781 | FLD (f_scale) = f_scale; | |
2782 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2783 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2784 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2785 | ||
2786 | #if WITH_PROFILE_MODEL_P | |
2787 | /* Record the fields for profiling. */ | |
2788 | if (PROFILE_MODEL_P (current_cpu)) | |
2789 | { | |
2790 | FLD (in_index) = f_index; | |
2791 | FLD (out_dst) = f_srcdst; | |
2792 | } | |
2793 | #endif | |
2794 | #undef FLD | |
7a292a7a | 2795 | return idesc; |
c906108c SS |
2796 | } |
2797 | ||
7a292a7a | 2798 | extract_fmt_ldob_indirect_index_disp: |
c906108c | 2799 | { |
7a292a7a | 2800 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2801 | CGEN_INSN_INT insn = base_insn; |
2802 | #define FLD(f) abuf->fields.fmt_ldob_indirect_index_disp.f | |
2803 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2804 | ||
2805 | EXTRACT_IFMT_LDA_DISP_CODE | |
2806 | ||
2807 | /* Record the fields for the semantic handler. */ | |
2808 | FLD (f_optdisp) = f_optdisp; | |
2809 | FLD (f_scale) = f_scale; | |
2810 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2811 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2812 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2813 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldob_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2814 | ||
2815 | #if WITH_PROFILE_MODEL_P | |
2816 | /* Record the fields for profiling. */ | |
2817 | if (PROFILE_MODEL_P (current_cpu)) | |
2818 | { | |
2819 | FLD (in_abase) = f_abase; | |
2820 | FLD (in_index) = f_index; | |
2821 | FLD (out_dst) = f_srcdst; | |
2822 | } | |
2823 | #endif | |
2824 | #undef FLD | |
7a292a7a | 2825 | return idesc; |
c906108c SS |
2826 | } |
2827 | ||
7a292a7a | 2828 | extract_fmt_ldos_offset: |
c906108c | 2829 | { |
7a292a7a | 2830 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2831 | CGEN_INSN_INT insn = base_insn; |
2832 | #define FLD(f) abuf->fields.fmt_ldos_offset.f | |
2833 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
2834 | ||
2835 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
2836 | ||
2837 | /* Record the fields for the semantic handler. */ | |
2838 | FLD (f_offset) = f_offset; | |
2839 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2840 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2841 | ||
2842 | #if WITH_PROFILE_MODEL_P | |
2843 | /* Record the fields for profiling. */ | |
2844 | if (PROFILE_MODEL_P (current_cpu)) | |
2845 | { | |
2846 | FLD (out_dst) = f_srcdst; | |
2847 | } | |
2848 | #endif | |
2849 | #undef FLD | |
7a292a7a | 2850 | return idesc; |
c906108c SS |
2851 | } |
2852 | ||
7a292a7a | 2853 | extract_fmt_ldos_indirect_offset: |
c906108c | 2854 | { |
7a292a7a | 2855 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2856 | CGEN_INSN_INT insn = base_insn; |
2857 | #define FLD(f) abuf->fields.fmt_ldos_indirect_offset.f | |
2858 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
2859 | ||
2860 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
2861 | ||
2862 | /* Record the fields for the semantic handler. */ | |
2863 | FLD (f_offset) = f_offset; | |
2864 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2865 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2866 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2867 | ||
2868 | #if WITH_PROFILE_MODEL_P | |
2869 | /* Record the fields for profiling. */ | |
2870 | if (PROFILE_MODEL_P (current_cpu)) | |
2871 | { | |
2872 | FLD (in_abase) = f_abase; | |
2873 | FLD (out_dst) = f_srcdst; | |
2874 | } | |
2875 | #endif | |
2876 | #undef FLD | |
7a292a7a | 2877 | return idesc; |
c906108c SS |
2878 | } |
2879 | ||
7a292a7a | 2880 | extract_fmt_ldos_indirect: |
c906108c | 2881 | { |
7a292a7a | 2882 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2883 | CGEN_INSN_INT insn = base_insn; |
2884 | #define FLD(f) abuf->fields.fmt_ldos_indirect.f | |
2885 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2886 | ||
2887 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
2888 | ||
2889 | /* Record the fields for the semantic handler. */ | |
2890 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2891 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2892 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2893 | ||
2894 | #if WITH_PROFILE_MODEL_P | |
2895 | /* Record the fields for profiling. */ | |
2896 | if (PROFILE_MODEL_P (current_cpu)) | |
2897 | { | |
2898 | FLD (in_abase) = f_abase; | |
2899 | FLD (out_dst) = f_srcdst; | |
2900 | } | |
2901 | #endif | |
2902 | #undef FLD | |
7a292a7a | 2903 | return idesc; |
c906108c SS |
2904 | } |
2905 | ||
7a292a7a | 2906 | extract_fmt_ldos_indirect_index: |
c906108c | 2907 | { |
7a292a7a | 2908 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2909 | CGEN_INSN_INT insn = base_insn; |
2910 | #define FLD(f) abuf->fields.fmt_ldos_indirect_index.f | |
2911 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2912 | ||
2913 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
2914 | ||
2915 | /* Record the fields for the semantic handler. */ | |
2916 | FLD (f_scale) = f_scale; | |
2917 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2918 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
2919 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2920 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2921 | ||
2922 | #if WITH_PROFILE_MODEL_P | |
2923 | /* Record the fields for profiling. */ | |
2924 | if (PROFILE_MODEL_P (current_cpu)) | |
2925 | { | |
2926 | FLD (in_abase) = f_abase; | |
2927 | FLD (in_index) = f_index; | |
2928 | FLD (out_dst) = f_srcdst; | |
2929 | } | |
2930 | #endif | |
2931 | #undef FLD | |
7a292a7a | 2932 | return idesc; |
c906108c SS |
2933 | } |
2934 | ||
7a292a7a | 2935 | extract_fmt_ldos_disp: |
c906108c | 2936 | { |
7a292a7a | 2937 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2938 | CGEN_INSN_INT insn = base_insn; |
2939 | #define FLD(f) abuf->fields.fmt_ldos_disp.f | |
2940 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2941 | ||
2942 | EXTRACT_IFMT_LDA_DISP_CODE | |
2943 | ||
2944 | /* Record the fields for the semantic handler. */ | |
2945 | FLD (f_optdisp) = f_optdisp; | |
2946 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2947 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2948 | ||
2949 | #if WITH_PROFILE_MODEL_P | |
2950 | /* Record the fields for profiling. */ | |
2951 | if (PROFILE_MODEL_P (current_cpu)) | |
2952 | { | |
2953 | FLD (out_dst) = f_srcdst; | |
2954 | } | |
2955 | #endif | |
2956 | #undef FLD | |
7a292a7a | 2957 | return idesc; |
c906108c SS |
2958 | } |
2959 | ||
7a292a7a | 2960 | extract_fmt_ldos_indirect_disp: |
c906108c | 2961 | { |
7a292a7a | 2962 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2963 | CGEN_INSN_INT insn = base_insn; |
2964 | #define FLD(f) abuf->fields.fmt_ldos_indirect_disp.f | |
2965 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2966 | ||
2967 | EXTRACT_IFMT_LDA_DISP_CODE | |
2968 | ||
2969 | /* Record the fields for the semantic handler. */ | |
2970 | FLD (f_optdisp) = f_optdisp; | |
2971 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
2972 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
2973 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
2974 | ||
2975 | #if WITH_PROFILE_MODEL_P | |
2976 | /* Record the fields for profiling. */ | |
2977 | if (PROFILE_MODEL_P (current_cpu)) | |
2978 | { | |
2979 | FLD (in_abase) = f_abase; | |
2980 | FLD (out_dst) = f_srcdst; | |
2981 | } | |
2982 | #endif | |
2983 | #undef FLD | |
7a292a7a | 2984 | return idesc; |
c906108c SS |
2985 | } |
2986 | ||
7a292a7a | 2987 | extract_fmt_ldos_index_disp: |
c906108c | 2988 | { |
7a292a7a | 2989 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
2990 | CGEN_INSN_INT insn = base_insn; |
2991 | #define FLD(f) abuf->fields.fmt_ldos_index_disp.f | |
2992 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
2993 | ||
2994 | EXTRACT_IFMT_LDA_DISP_CODE | |
2995 | ||
2996 | /* Record the fields for the semantic handler. */ | |
2997 | FLD (f_optdisp) = f_optdisp; | |
2998 | FLD (f_scale) = f_scale; | |
2999 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3000 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3001 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3002 | ||
3003 | #if WITH_PROFILE_MODEL_P | |
3004 | /* Record the fields for profiling. */ | |
3005 | if (PROFILE_MODEL_P (current_cpu)) | |
3006 | { | |
3007 | FLD (in_index) = f_index; | |
3008 | FLD (out_dst) = f_srcdst; | |
3009 | } | |
3010 | #endif | |
3011 | #undef FLD | |
7a292a7a | 3012 | return idesc; |
c906108c SS |
3013 | } |
3014 | ||
7a292a7a | 3015 | extract_fmt_ldos_indirect_index_disp: |
c906108c | 3016 | { |
7a292a7a | 3017 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3018 | CGEN_INSN_INT insn = base_insn; |
3019 | #define FLD(f) abuf->fields.fmt_ldos_indirect_index_disp.f | |
3020 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3021 | ||
3022 | EXTRACT_IFMT_LDA_DISP_CODE | |
3023 | ||
3024 | /* Record the fields for the semantic handler. */ | |
3025 | FLD (f_optdisp) = f_optdisp; | |
3026 | FLD (f_scale) = f_scale; | |
3027 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3028 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3029 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3030 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldos_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3031 | ||
3032 | #if WITH_PROFILE_MODEL_P | |
3033 | /* Record the fields for profiling. */ | |
3034 | if (PROFILE_MODEL_P (current_cpu)) | |
3035 | { | |
3036 | FLD (in_abase) = f_abase; | |
3037 | FLD (in_index) = f_index; | |
3038 | FLD (out_dst) = f_srcdst; | |
3039 | } | |
3040 | #endif | |
3041 | #undef FLD | |
7a292a7a | 3042 | return idesc; |
c906108c SS |
3043 | } |
3044 | ||
7a292a7a | 3045 | extract_fmt_ldib_offset: |
c906108c | 3046 | { |
7a292a7a | 3047 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3048 | CGEN_INSN_INT insn = base_insn; |
3049 | #define FLD(f) abuf->fields.fmt_ldib_offset.f | |
3050 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
3051 | ||
3052 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
3053 | ||
3054 | /* Record the fields for the semantic handler. */ | |
3055 | FLD (f_offset) = f_offset; | |
3056 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3057 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3058 | ||
3059 | #if WITH_PROFILE_MODEL_P | |
3060 | /* Record the fields for profiling. */ | |
3061 | if (PROFILE_MODEL_P (current_cpu)) | |
3062 | { | |
3063 | FLD (out_dst) = f_srcdst; | |
3064 | } | |
3065 | #endif | |
3066 | #undef FLD | |
7a292a7a | 3067 | return idesc; |
c906108c SS |
3068 | } |
3069 | ||
7a292a7a | 3070 | extract_fmt_ldib_indirect_offset: |
c906108c | 3071 | { |
7a292a7a | 3072 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3073 | CGEN_INSN_INT insn = base_insn; |
3074 | #define FLD(f) abuf->fields.fmt_ldib_indirect_offset.f | |
3075 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
3076 | ||
3077 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
3078 | ||
3079 | /* Record the fields for the semantic handler. */ | |
3080 | FLD (f_offset) = f_offset; | |
3081 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3082 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3083 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3084 | ||
3085 | #if WITH_PROFILE_MODEL_P | |
3086 | /* Record the fields for profiling. */ | |
3087 | if (PROFILE_MODEL_P (current_cpu)) | |
3088 | { | |
3089 | FLD (in_abase) = f_abase; | |
3090 | FLD (out_dst) = f_srcdst; | |
3091 | } | |
3092 | #endif | |
3093 | #undef FLD | |
7a292a7a | 3094 | return idesc; |
c906108c SS |
3095 | } |
3096 | ||
7a292a7a | 3097 | extract_fmt_ldib_indirect: |
c906108c | 3098 | { |
7a292a7a | 3099 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3100 | CGEN_INSN_INT insn = base_insn; |
3101 | #define FLD(f) abuf->fields.fmt_ldib_indirect.f | |
3102 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3103 | ||
3104 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
3105 | ||
3106 | /* Record the fields for the semantic handler. */ | |
3107 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3108 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3109 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3110 | ||
3111 | #if WITH_PROFILE_MODEL_P | |
3112 | /* Record the fields for profiling. */ | |
3113 | if (PROFILE_MODEL_P (current_cpu)) | |
3114 | { | |
3115 | FLD (in_abase) = f_abase; | |
3116 | FLD (out_dst) = f_srcdst; | |
3117 | } | |
3118 | #endif | |
3119 | #undef FLD | |
7a292a7a | 3120 | return idesc; |
c906108c SS |
3121 | } |
3122 | ||
7a292a7a | 3123 | extract_fmt_ldib_indirect_index: |
c906108c | 3124 | { |
7a292a7a | 3125 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3126 | CGEN_INSN_INT insn = base_insn; |
3127 | #define FLD(f) abuf->fields.fmt_ldib_indirect_index.f | |
3128 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3129 | ||
3130 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
3131 | ||
3132 | /* Record the fields for the semantic handler. */ | |
3133 | FLD (f_scale) = f_scale; | |
3134 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3135 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3136 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3137 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3138 | ||
3139 | #if WITH_PROFILE_MODEL_P | |
3140 | /* Record the fields for profiling. */ | |
3141 | if (PROFILE_MODEL_P (current_cpu)) | |
3142 | { | |
3143 | FLD (in_abase) = f_abase; | |
3144 | FLD (in_index) = f_index; | |
3145 | FLD (out_dst) = f_srcdst; | |
3146 | } | |
3147 | #endif | |
3148 | #undef FLD | |
7a292a7a | 3149 | return idesc; |
c906108c SS |
3150 | } |
3151 | ||
7a292a7a | 3152 | extract_fmt_ldib_disp: |
c906108c | 3153 | { |
7a292a7a | 3154 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3155 | CGEN_INSN_INT insn = base_insn; |
3156 | #define FLD(f) abuf->fields.fmt_ldib_disp.f | |
3157 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3158 | ||
3159 | EXTRACT_IFMT_LDA_DISP_CODE | |
3160 | ||
3161 | /* Record the fields for the semantic handler. */ | |
3162 | FLD (f_optdisp) = f_optdisp; | |
3163 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3164 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3165 | ||
3166 | #if WITH_PROFILE_MODEL_P | |
3167 | /* Record the fields for profiling. */ | |
3168 | if (PROFILE_MODEL_P (current_cpu)) | |
3169 | { | |
3170 | FLD (out_dst) = f_srcdst; | |
3171 | } | |
3172 | #endif | |
3173 | #undef FLD | |
7a292a7a | 3174 | return idesc; |
c906108c SS |
3175 | } |
3176 | ||
7a292a7a | 3177 | extract_fmt_ldib_indirect_disp: |
c906108c | 3178 | { |
7a292a7a | 3179 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3180 | CGEN_INSN_INT insn = base_insn; |
3181 | #define FLD(f) abuf->fields.fmt_ldib_indirect_disp.f | |
3182 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3183 | ||
3184 | EXTRACT_IFMT_LDA_DISP_CODE | |
3185 | ||
3186 | /* Record the fields for the semantic handler. */ | |
3187 | FLD (f_optdisp) = f_optdisp; | |
3188 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3189 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3190 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3191 | ||
3192 | #if WITH_PROFILE_MODEL_P | |
3193 | /* Record the fields for profiling. */ | |
3194 | if (PROFILE_MODEL_P (current_cpu)) | |
3195 | { | |
3196 | FLD (in_abase) = f_abase; | |
3197 | FLD (out_dst) = f_srcdst; | |
3198 | } | |
3199 | #endif | |
3200 | #undef FLD | |
7a292a7a | 3201 | return idesc; |
c906108c SS |
3202 | } |
3203 | ||
7a292a7a | 3204 | extract_fmt_ldib_index_disp: |
c906108c | 3205 | { |
7a292a7a | 3206 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3207 | CGEN_INSN_INT insn = base_insn; |
3208 | #define FLD(f) abuf->fields.fmt_ldib_index_disp.f | |
3209 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3210 | ||
3211 | EXTRACT_IFMT_LDA_DISP_CODE | |
3212 | ||
3213 | /* Record the fields for the semantic handler. */ | |
3214 | FLD (f_optdisp) = f_optdisp; | |
3215 | FLD (f_scale) = f_scale; | |
3216 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3217 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3218 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3219 | ||
3220 | #if WITH_PROFILE_MODEL_P | |
3221 | /* Record the fields for profiling. */ | |
3222 | if (PROFILE_MODEL_P (current_cpu)) | |
3223 | { | |
3224 | FLD (in_index) = f_index; | |
3225 | FLD (out_dst) = f_srcdst; | |
3226 | } | |
3227 | #endif | |
3228 | #undef FLD | |
7a292a7a | 3229 | return idesc; |
c906108c SS |
3230 | } |
3231 | ||
7a292a7a | 3232 | extract_fmt_ldib_indirect_index_disp: |
c906108c | 3233 | { |
7a292a7a | 3234 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3235 | CGEN_INSN_INT insn = base_insn; |
3236 | #define FLD(f) abuf->fields.fmt_ldib_indirect_index_disp.f | |
3237 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3238 | ||
3239 | EXTRACT_IFMT_LDA_DISP_CODE | |
3240 | ||
3241 | /* Record the fields for the semantic handler. */ | |
3242 | FLD (f_optdisp) = f_optdisp; | |
3243 | FLD (f_scale) = f_scale; | |
3244 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3245 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3246 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3247 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldib_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3248 | ||
3249 | #if WITH_PROFILE_MODEL_P | |
3250 | /* Record the fields for profiling. */ | |
3251 | if (PROFILE_MODEL_P (current_cpu)) | |
3252 | { | |
3253 | FLD (in_abase) = f_abase; | |
3254 | FLD (in_index) = f_index; | |
3255 | FLD (out_dst) = f_srcdst; | |
3256 | } | |
3257 | #endif | |
3258 | #undef FLD | |
7a292a7a | 3259 | return idesc; |
c906108c SS |
3260 | } |
3261 | ||
7a292a7a | 3262 | extract_fmt_ldis_offset: |
c906108c | 3263 | { |
7a292a7a | 3264 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3265 | CGEN_INSN_INT insn = base_insn; |
3266 | #define FLD(f) abuf->fields.fmt_ldis_offset.f | |
3267 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
3268 | ||
3269 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
3270 | ||
3271 | /* Record the fields for the semantic handler. */ | |
3272 | FLD (f_offset) = f_offset; | |
3273 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3274 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3275 | ||
3276 | #if WITH_PROFILE_MODEL_P | |
3277 | /* Record the fields for profiling. */ | |
3278 | if (PROFILE_MODEL_P (current_cpu)) | |
3279 | { | |
3280 | FLD (out_dst) = f_srcdst; | |
3281 | } | |
3282 | #endif | |
3283 | #undef FLD | |
7a292a7a | 3284 | return idesc; |
c906108c SS |
3285 | } |
3286 | ||
7a292a7a | 3287 | extract_fmt_ldis_indirect_offset: |
c906108c | 3288 | { |
7a292a7a | 3289 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3290 | CGEN_INSN_INT insn = base_insn; |
3291 | #define FLD(f) abuf->fields.fmt_ldis_indirect_offset.f | |
3292 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
3293 | ||
3294 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
3295 | ||
3296 | /* Record the fields for the semantic handler. */ | |
3297 | FLD (f_offset) = f_offset; | |
3298 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3299 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3300 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3301 | ||
3302 | #if WITH_PROFILE_MODEL_P | |
3303 | /* Record the fields for profiling. */ | |
3304 | if (PROFILE_MODEL_P (current_cpu)) | |
3305 | { | |
3306 | FLD (in_abase) = f_abase; | |
3307 | FLD (out_dst) = f_srcdst; | |
3308 | } | |
3309 | #endif | |
3310 | #undef FLD | |
7a292a7a | 3311 | return idesc; |
c906108c SS |
3312 | } |
3313 | ||
7a292a7a | 3314 | extract_fmt_ldis_indirect: |
c906108c | 3315 | { |
7a292a7a | 3316 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3317 | CGEN_INSN_INT insn = base_insn; |
3318 | #define FLD(f) abuf->fields.fmt_ldis_indirect.f | |
3319 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3320 | ||
3321 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
3322 | ||
3323 | /* Record the fields for the semantic handler. */ | |
3324 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3325 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3326 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3327 | ||
3328 | #if WITH_PROFILE_MODEL_P | |
3329 | /* Record the fields for profiling. */ | |
3330 | if (PROFILE_MODEL_P (current_cpu)) | |
3331 | { | |
3332 | FLD (in_abase) = f_abase; | |
3333 | FLD (out_dst) = f_srcdst; | |
3334 | } | |
3335 | #endif | |
3336 | #undef FLD | |
7a292a7a | 3337 | return idesc; |
c906108c SS |
3338 | } |
3339 | ||
7a292a7a | 3340 | extract_fmt_ldis_indirect_index: |
c906108c | 3341 | { |
7a292a7a | 3342 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3343 | CGEN_INSN_INT insn = base_insn; |
3344 | #define FLD(f) abuf->fields.fmt_ldis_indirect_index.f | |
3345 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3346 | ||
3347 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
3348 | ||
3349 | /* Record the fields for the semantic handler. */ | |
3350 | FLD (f_scale) = f_scale; | |
3351 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3352 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3353 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3354 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3355 | ||
3356 | #if WITH_PROFILE_MODEL_P | |
3357 | /* Record the fields for profiling. */ | |
3358 | if (PROFILE_MODEL_P (current_cpu)) | |
3359 | { | |
3360 | FLD (in_abase) = f_abase; | |
3361 | FLD (in_index) = f_index; | |
3362 | FLD (out_dst) = f_srcdst; | |
3363 | } | |
3364 | #endif | |
3365 | #undef FLD | |
7a292a7a | 3366 | return idesc; |
c906108c SS |
3367 | } |
3368 | ||
7a292a7a | 3369 | extract_fmt_ldis_disp: |
c906108c | 3370 | { |
7a292a7a | 3371 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3372 | CGEN_INSN_INT insn = base_insn; |
3373 | #define FLD(f) abuf->fields.fmt_ldis_disp.f | |
3374 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3375 | ||
3376 | EXTRACT_IFMT_LDA_DISP_CODE | |
3377 | ||
3378 | /* Record the fields for the semantic handler. */ | |
3379 | FLD (f_optdisp) = f_optdisp; | |
3380 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3381 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3382 | ||
3383 | #if WITH_PROFILE_MODEL_P | |
3384 | /* Record the fields for profiling. */ | |
3385 | if (PROFILE_MODEL_P (current_cpu)) | |
3386 | { | |
3387 | FLD (out_dst) = f_srcdst; | |
3388 | } | |
3389 | #endif | |
3390 | #undef FLD | |
7a292a7a | 3391 | return idesc; |
c906108c SS |
3392 | } |
3393 | ||
7a292a7a | 3394 | extract_fmt_ldis_indirect_disp: |
c906108c | 3395 | { |
7a292a7a | 3396 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3397 | CGEN_INSN_INT insn = base_insn; |
3398 | #define FLD(f) abuf->fields.fmt_ldis_indirect_disp.f | |
3399 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3400 | ||
3401 | EXTRACT_IFMT_LDA_DISP_CODE | |
3402 | ||
3403 | /* Record the fields for the semantic handler. */ | |
3404 | FLD (f_optdisp) = f_optdisp; | |
3405 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3406 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3407 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3408 | ||
3409 | #if WITH_PROFILE_MODEL_P | |
3410 | /* Record the fields for profiling. */ | |
3411 | if (PROFILE_MODEL_P (current_cpu)) | |
3412 | { | |
3413 | FLD (in_abase) = f_abase; | |
3414 | FLD (out_dst) = f_srcdst; | |
3415 | } | |
3416 | #endif | |
3417 | #undef FLD | |
7a292a7a | 3418 | return idesc; |
c906108c SS |
3419 | } |
3420 | ||
7a292a7a | 3421 | extract_fmt_ldis_index_disp: |
c906108c | 3422 | { |
7a292a7a | 3423 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3424 | CGEN_INSN_INT insn = base_insn; |
3425 | #define FLD(f) abuf->fields.fmt_ldis_index_disp.f | |
3426 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3427 | ||
3428 | EXTRACT_IFMT_LDA_DISP_CODE | |
3429 | ||
3430 | /* Record the fields for the semantic handler. */ | |
3431 | FLD (f_optdisp) = f_optdisp; | |
3432 | FLD (f_scale) = f_scale; | |
3433 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3434 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3435 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3436 | ||
3437 | #if WITH_PROFILE_MODEL_P | |
3438 | /* Record the fields for profiling. */ | |
3439 | if (PROFILE_MODEL_P (current_cpu)) | |
3440 | { | |
3441 | FLD (in_index) = f_index; | |
3442 | FLD (out_dst) = f_srcdst; | |
3443 | } | |
3444 | #endif | |
3445 | #undef FLD | |
7a292a7a | 3446 | return idesc; |
c906108c SS |
3447 | } |
3448 | ||
7a292a7a | 3449 | extract_fmt_ldis_indirect_index_disp: |
c906108c | 3450 | { |
7a292a7a | 3451 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3452 | CGEN_INSN_INT insn = base_insn; |
3453 | #define FLD(f) abuf->fields.fmt_ldis_indirect_index_disp.f | |
3454 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3455 | ||
3456 | EXTRACT_IFMT_LDA_DISP_CODE | |
3457 | ||
3458 | /* Record the fields for the semantic handler. */ | |
3459 | FLD (f_optdisp) = f_optdisp; | |
3460 | FLD (f_scale) = f_scale; | |
3461 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3462 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3463 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3464 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldis_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3465 | ||
3466 | #if WITH_PROFILE_MODEL_P | |
3467 | /* Record the fields for profiling. */ | |
3468 | if (PROFILE_MODEL_P (current_cpu)) | |
3469 | { | |
3470 | FLD (in_abase) = f_abase; | |
3471 | FLD (in_index) = f_index; | |
3472 | FLD (out_dst) = f_srcdst; | |
3473 | } | |
3474 | #endif | |
3475 | #undef FLD | |
7a292a7a | 3476 | return idesc; |
c906108c SS |
3477 | } |
3478 | ||
7a292a7a | 3479 | extract_fmt_ldl_offset: |
c906108c | 3480 | { |
7a292a7a | 3481 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3482 | CGEN_INSN_INT insn = base_insn; |
3483 | #define FLD(f) abuf->fields.fmt_ldl_offset.f | |
3484 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
3485 | ||
3486 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
3487 | ||
3488 | /* Record the fields for the semantic handler. */ | |
3489 | FLD (f_srcdst) = f_srcdst; | |
3490 | FLD (f_offset) = f_offset; | |
3491 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3492 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3493 | ||
3494 | #if WITH_PROFILE_MODEL_P | |
3495 | /* Record the fields for profiling. */ | |
3496 | if (PROFILE_MODEL_P (current_cpu)) | |
3497 | { | |
3498 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 3499 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
3500 | } |
3501 | #endif | |
3502 | #undef FLD | |
7a292a7a | 3503 | return idesc; |
c906108c SS |
3504 | } |
3505 | ||
7a292a7a | 3506 | extract_fmt_ldl_indirect_offset: |
c906108c | 3507 | { |
7a292a7a | 3508 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3509 | CGEN_INSN_INT insn = base_insn; |
3510 | #define FLD(f) abuf->fields.fmt_ldl_indirect_offset.f | |
3511 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
3512 | ||
3513 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
3514 | ||
3515 | /* Record the fields for the semantic handler. */ | |
3516 | FLD (f_srcdst) = f_srcdst; | |
3517 | FLD (f_offset) = f_offset; | |
3518 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3519 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3520 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3521 | ||
3522 | #if WITH_PROFILE_MODEL_P | |
3523 | /* Record the fields for profiling. */ | |
3524 | if (PROFILE_MODEL_P (current_cpu)) | |
3525 | { | |
3526 | FLD (in_abase) = f_abase; | |
3527 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 3528 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
3529 | } |
3530 | #endif | |
3531 | #undef FLD | |
7a292a7a | 3532 | return idesc; |
c906108c SS |
3533 | } |
3534 | ||
7a292a7a | 3535 | extract_fmt_ldl_indirect: |
c906108c | 3536 | { |
7a292a7a | 3537 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3538 | CGEN_INSN_INT insn = base_insn; |
3539 | #define FLD(f) abuf->fields.fmt_ldl_indirect.f | |
3540 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3541 | ||
3542 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
3543 | ||
3544 | /* Record the fields for the semantic handler. */ | |
3545 | FLD (f_srcdst) = f_srcdst; | |
3546 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3547 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3548 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3549 | ||
3550 | #if WITH_PROFILE_MODEL_P | |
3551 | /* Record the fields for profiling. */ | |
3552 | if (PROFILE_MODEL_P (current_cpu)) | |
3553 | { | |
3554 | FLD (in_abase) = f_abase; | |
3555 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 3556 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
3557 | } |
3558 | #endif | |
3559 | #undef FLD | |
7a292a7a | 3560 | return idesc; |
c906108c SS |
3561 | } |
3562 | ||
7a292a7a | 3563 | extract_fmt_ldl_indirect_index: |
c906108c | 3564 | { |
7a292a7a | 3565 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3566 | CGEN_INSN_INT insn = base_insn; |
3567 | #define FLD(f) abuf->fields.fmt_ldl_indirect_index.f | |
3568 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3569 | ||
3570 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
3571 | ||
3572 | /* Record the fields for the semantic handler. */ | |
3573 | FLD (f_srcdst) = f_srcdst; | |
3574 | FLD (f_scale) = f_scale; | |
3575 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3576 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3577 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3578 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3579 | ||
3580 | #if WITH_PROFILE_MODEL_P | |
3581 | /* Record the fields for profiling. */ | |
3582 | if (PROFILE_MODEL_P (current_cpu)) | |
3583 | { | |
3584 | FLD (in_abase) = f_abase; | |
3585 | FLD (in_index) = f_index; | |
3586 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 3587 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
3588 | } |
3589 | #endif | |
3590 | #undef FLD | |
7a292a7a | 3591 | return idesc; |
c906108c SS |
3592 | } |
3593 | ||
7a292a7a | 3594 | extract_fmt_ldl_disp: |
c906108c | 3595 | { |
7a292a7a | 3596 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3597 | CGEN_INSN_INT insn = base_insn; |
3598 | #define FLD(f) abuf->fields.fmt_ldl_disp.f | |
3599 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3600 | ||
3601 | EXTRACT_IFMT_LDA_DISP_CODE | |
3602 | ||
3603 | /* Record the fields for the semantic handler. */ | |
3604 | FLD (f_srcdst) = f_srcdst; | |
3605 | FLD (f_optdisp) = f_optdisp; | |
3606 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3607 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3608 | ||
3609 | #if WITH_PROFILE_MODEL_P | |
3610 | /* Record the fields for profiling. */ | |
3611 | if (PROFILE_MODEL_P (current_cpu)) | |
3612 | { | |
3613 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 3614 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
3615 | } |
3616 | #endif | |
3617 | #undef FLD | |
7a292a7a | 3618 | return idesc; |
c906108c SS |
3619 | } |
3620 | ||
7a292a7a | 3621 | extract_fmt_ldl_indirect_disp: |
c906108c | 3622 | { |
7a292a7a | 3623 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3624 | CGEN_INSN_INT insn = base_insn; |
3625 | #define FLD(f) abuf->fields.fmt_ldl_indirect_disp.f | |
3626 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3627 | ||
3628 | EXTRACT_IFMT_LDA_DISP_CODE | |
3629 | ||
3630 | /* Record the fields for the semantic handler. */ | |
3631 | FLD (f_srcdst) = f_srcdst; | |
3632 | FLD (f_optdisp) = f_optdisp; | |
3633 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3634 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3635 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3636 | ||
3637 | #if WITH_PROFILE_MODEL_P | |
3638 | /* Record the fields for profiling. */ | |
3639 | if (PROFILE_MODEL_P (current_cpu)) | |
3640 | { | |
3641 | FLD (in_abase) = f_abase; | |
3642 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 3643 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
3644 | } |
3645 | #endif | |
3646 | #undef FLD | |
7a292a7a | 3647 | return idesc; |
c906108c SS |
3648 | } |
3649 | ||
7a292a7a | 3650 | extract_fmt_ldl_index_disp: |
c906108c | 3651 | { |
7a292a7a | 3652 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3653 | CGEN_INSN_INT insn = base_insn; |
3654 | #define FLD(f) abuf->fields.fmt_ldl_index_disp.f | |
3655 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3656 | ||
3657 | EXTRACT_IFMT_LDA_DISP_CODE | |
3658 | ||
3659 | /* Record the fields for the semantic handler. */ | |
3660 | FLD (f_srcdst) = f_srcdst; | |
3661 | FLD (f_optdisp) = f_optdisp; | |
3662 | FLD (f_scale) = f_scale; | |
3663 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3664 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3665 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3666 | ||
3667 | #if WITH_PROFILE_MODEL_P | |
3668 | /* Record the fields for profiling. */ | |
3669 | if (PROFILE_MODEL_P (current_cpu)) | |
3670 | { | |
3671 | FLD (in_index) = f_index; | |
3672 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 3673 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
3674 | } |
3675 | #endif | |
3676 | #undef FLD | |
7a292a7a | 3677 | return idesc; |
c906108c SS |
3678 | } |
3679 | ||
7a292a7a | 3680 | extract_fmt_ldl_indirect_index_disp: |
c906108c | 3681 | { |
7a292a7a | 3682 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3683 | CGEN_INSN_INT insn = base_insn; |
3684 | #define FLD(f) abuf->fields.fmt_ldl_indirect_index_disp.f | |
3685 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3686 | ||
3687 | EXTRACT_IFMT_LDA_DISP_CODE | |
3688 | ||
3689 | /* Record the fields for the semantic handler. */ | |
3690 | FLD (f_srcdst) = f_srcdst; | |
3691 | FLD (f_optdisp) = f_optdisp; | |
3692 | FLD (f_scale) = f_scale; | |
3693 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3694 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3695 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3696 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3697 | ||
3698 | #if WITH_PROFILE_MODEL_P | |
3699 | /* Record the fields for profiling. */ | |
3700 | if (PROFILE_MODEL_P (current_cpu)) | |
3701 | { | |
3702 | FLD (in_abase) = f_abase; | |
3703 | FLD (in_index) = f_index; | |
3704 | FLD (out_dst) = f_srcdst; | |
7a292a7a | 3705 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
3706 | } |
3707 | #endif | |
3708 | #undef FLD | |
7a292a7a | 3709 | return idesc; |
c906108c SS |
3710 | } |
3711 | ||
7a292a7a | 3712 | extract_fmt_ldt_offset: |
c906108c | 3713 | { |
7a292a7a | 3714 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3715 | CGEN_INSN_INT insn = base_insn; |
3716 | #define FLD(f) abuf->fields.fmt_ldt_offset.f | |
3717 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
3718 | ||
3719 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
3720 | ||
3721 | /* Record the fields for the semantic handler. */ | |
3722 | FLD (f_srcdst) = f_srcdst; | |
3723 | FLD (f_offset) = f_offset; | |
3724 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3725 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3726 | ||
3727 | #if WITH_PROFILE_MODEL_P | |
3728 | /* Record the fields for profiling. */ | |
3729 | if (PROFILE_MODEL_P (current_cpu)) | |
3730 | { | |
3731 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
3732 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
3733 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3734 | } |
3735 | #endif | |
3736 | #undef FLD | |
7a292a7a | 3737 | return idesc; |
c906108c SS |
3738 | } |
3739 | ||
7a292a7a | 3740 | extract_fmt_ldt_indirect_offset: |
c906108c | 3741 | { |
7a292a7a | 3742 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3743 | CGEN_INSN_INT insn = base_insn; |
3744 | #define FLD(f) abuf->fields.fmt_ldt_indirect_offset.f | |
3745 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
3746 | ||
3747 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
3748 | ||
3749 | /* Record the fields for the semantic handler. */ | |
3750 | FLD (f_srcdst) = f_srcdst; | |
3751 | FLD (f_offset) = f_offset; | |
3752 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3753 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3754 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3755 | ||
3756 | #if WITH_PROFILE_MODEL_P | |
3757 | /* Record the fields for profiling. */ | |
3758 | if (PROFILE_MODEL_P (current_cpu)) | |
3759 | { | |
3760 | FLD (in_abase) = f_abase; | |
3761 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
3762 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
3763 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3764 | } |
3765 | #endif | |
3766 | #undef FLD | |
7a292a7a | 3767 | return idesc; |
c906108c SS |
3768 | } |
3769 | ||
7a292a7a | 3770 | extract_fmt_ldt_indirect: |
c906108c | 3771 | { |
7a292a7a | 3772 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3773 | CGEN_INSN_INT insn = base_insn; |
3774 | #define FLD(f) abuf->fields.fmt_ldt_indirect.f | |
3775 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3776 | ||
3777 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
3778 | ||
3779 | /* Record the fields for the semantic handler. */ | |
3780 | FLD (f_srcdst) = f_srcdst; | |
3781 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3782 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3783 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3784 | ||
3785 | #if WITH_PROFILE_MODEL_P | |
3786 | /* Record the fields for profiling. */ | |
3787 | if (PROFILE_MODEL_P (current_cpu)) | |
3788 | { | |
3789 | FLD (in_abase) = f_abase; | |
3790 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
3791 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
3792 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3793 | } |
3794 | #endif | |
3795 | #undef FLD | |
7a292a7a | 3796 | return idesc; |
c906108c SS |
3797 | } |
3798 | ||
7a292a7a | 3799 | extract_fmt_ldt_indirect_index: |
c906108c | 3800 | { |
7a292a7a | 3801 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3802 | CGEN_INSN_INT insn = base_insn; |
3803 | #define FLD(f) abuf->fields.fmt_ldt_indirect_index.f | |
3804 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3805 | ||
3806 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
3807 | ||
3808 | /* Record the fields for the semantic handler. */ | |
3809 | FLD (f_srcdst) = f_srcdst; | |
3810 | FLD (f_scale) = f_scale; | |
3811 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3812 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3813 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3814 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3815 | ||
3816 | #if WITH_PROFILE_MODEL_P | |
3817 | /* Record the fields for profiling. */ | |
3818 | if (PROFILE_MODEL_P (current_cpu)) | |
3819 | { | |
3820 | FLD (in_abase) = f_abase; | |
3821 | FLD (in_index) = f_index; | |
3822 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
3823 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
3824 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3825 | } |
3826 | #endif | |
3827 | #undef FLD | |
7a292a7a | 3828 | return idesc; |
c906108c SS |
3829 | } |
3830 | ||
7a292a7a | 3831 | extract_fmt_ldt_disp: |
c906108c | 3832 | { |
7a292a7a | 3833 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3834 | CGEN_INSN_INT insn = base_insn; |
3835 | #define FLD(f) abuf->fields.fmt_ldt_disp.f | |
3836 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3837 | ||
3838 | EXTRACT_IFMT_LDA_DISP_CODE | |
3839 | ||
3840 | /* Record the fields for the semantic handler. */ | |
3841 | FLD (f_srcdst) = f_srcdst; | |
3842 | FLD (f_optdisp) = f_optdisp; | |
3843 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3844 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3845 | ||
3846 | #if WITH_PROFILE_MODEL_P | |
3847 | /* Record the fields for profiling. */ | |
3848 | if (PROFILE_MODEL_P (current_cpu)) | |
3849 | { | |
3850 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
3851 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
3852 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3853 | } |
3854 | #endif | |
3855 | #undef FLD | |
7a292a7a | 3856 | return idesc; |
c906108c SS |
3857 | } |
3858 | ||
7a292a7a | 3859 | extract_fmt_ldt_indirect_disp: |
c906108c | 3860 | { |
7a292a7a | 3861 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3862 | CGEN_INSN_INT insn = base_insn; |
3863 | #define FLD(f) abuf->fields.fmt_ldt_indirect_disp.f | |
3864 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3865 | ||
3866 | EXTRACT_IFMT_LDA_DISP_CODE | |
3867 | ||
3868 | /* Record the fields for the semantic handler. */ | |
3869 | FLD (f_srcdst) = f_srcdst; | |
3870 | FLD (f_optdisp) = f_optdisp; | |
3871 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3872 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3873 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3874 | ||
3875 | #if WITH_PROFILE_MODEL_P | |
3876 | /* Record the fields for profiling. */ | |
3877 | if (PROFILE_MODEL_P (current_cpu)) | |
3878 | { | |
3879 | FLD (in_abase) = f_abase; | |
3880 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
3881 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
3882 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3883 | } |
3884 | #endif | |
3885 | #undef FLD | |
7a292a7a | 3886 | return idesc; |
c906108c SS |
3887 | } |
3888 | ||
7a292a7a | 3889 | extract_fmt_ldt_index_disp: |
c906108c | 3890 | { |
7a292a7a | 3891 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3892 | CGEN_INSN_INT insn = base_insn; |
3893 | #define FLD(f) abuf->fields.fmt_ldt_index_disp.f | |
3894 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3895 | ||
3896 | EXTRACT_IFMT_LDA_DISP_CODE | |
3897 | ||
3898 | /* Record the fields for the semantic handler. */ | |
3899 | FLD (f_srcdst) = f_srcdst; | |
3900 | FLD (f_optdisp) = f_optdisp; | |
3901 | FLD (f_scale) = f_scale; | |
3902 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3903 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3904 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3905 | ||
3906 | #if WITH_PROFILE_MODEL_P | |
3907 | /* Record the fields for profiling. */ | |
3908 | if (PROFILE_MODEL_P (current_cpu)) | |
3909 | { | |
3910 | FLD (in_index) = f_index; | |
3911 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
3912 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
3913 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3914 | } |
3915 | #endif | |
3916 | #undef FLD | |
7a292a7a | 3917 | return idesc; |
c906108c SS |
3918 | } |
3919 | ||
7a292a7a | 3920 | extract_fmt_ldt_indirect_index_disp: |
c906108c | 3921 | { |
7a292a7a | 3922 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3923 | CGEN_INSN_INT insn = base_insn; |
3924 | #define FLD(f) abuf->fields.fmt_ldt_indirect_index_disp.f | |
3925 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
3926 | ||
3927 | EXTRACT_IFMT_LDA_DISP_CODE | |
3928 | ||
3929 | /* Record the fields for the semantic handler. */ | |
3930 | FLD (f_srcdst) = f_srcdst; | |
3931 | FLD (f_optdisp) = f_optdisp; | |
3932 | FLD (f_scale) = f_scale; | |
3933 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3934 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
3935 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3936 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3937 | ||
3938 | #if WITH_PROFILE_MODEL_P | |
3939 | /* Record the fields for profiling. */ | |
3940 | if (PROFILE_MODEL_P (current_cpu)) | |
3941 | { | |
3942 | FLD (in_abase) = f_abase; | |
3943 | FLD (in_index) = f_index; | |
3944 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
3945 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
3946 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
3947 | } |
3948 | #endif | |
3949 | #undef FLD | |
7a292a7a | 3950 | return idesc; |
c906108c SS |
3951 | } |
3952 | ||
7a292a7a | 3953 | extract_fmt_ldq_offset: |
c906108c | 3954 | { |
7a292a7a | 3955 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3956 | CGEN_INSN_INT insn = base_insn; |
3957 | #define FLD(f) abuf->fields.fmt_ldq_offset.f | |
3958 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
3959 | ||
3960 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
3961 | ||
3962 | /* Record the fields for the semantic handler. */ | |
3963 | FLD (f_srcdst) = f_srcdst; | |
3964 | FLD (f_offset) = f_offset; | |
3965 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3966 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3967 | ||
3968 | #if WITH_PROFILE_MODEL_P | |
3969 | /* Record the fields for profiling. */ | |
3970 | if (PROFILE_MODEL_P (current_cpu)) | |
3971 | { | |
3972 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
3973 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
3974 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
3975 | FLD (out_h_gr_add__VM_index_of_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
3976 | } |
3977 | #endif | |
3978 | #undef FLD | |
7a292a7a | 3979 | return idesc; |
c906108c SS |
3980 | } |
3981 | ||
7a292a7a | 3982 | extract_fmt_ldq_indirect_offset: |
c906108c | 3983 | { |
7a292a7a | 3984 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
3985 | CGEN_INSN_INT insn = base_insn; |
3986 | #define FLD(f) abuf->fields.fmt_ldq_indirect_offset.f | |
3987 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
3988 | ||
3989 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
3990 | ||
3991 | /* Record the fields for the semantic handler. */ | |
3992 | FLD (f_srcdst) = f_srcdst; | |
3993 | FLD (f_offset) = f_offset; | |
3994 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
3995 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
3996 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
3997 | ||
3998 | #if WITH_PROFILE_MODEL_P | |
3999 | /* Record the fields for profiling. */ | |
4000 | if (PROFILE_MODEL_P (current_cpu)) | |
4001 | { | |
4002 | FLD (in_abase) = f_abase; | |
4003 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
4004 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
4005 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
4006 | FLD (out_h_gr_add__VM_index_of_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4007 | } |
4008 | #endif | |
4009 | #undef FLD | |
7a292a7a | 4010 | return idesc; |
c906108c SS |
4011 | } |
4012 | ||
7a292a7a | 4013 | extract_fmt_ldq_indirect: |
c906108c | 4014 | { |
7a292a7a | 4015 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4016 | CGEN_INSN_INT insn = base_insn; |
4017 | #define FLD(f) abuf->fields.fmt_ldq_indirect.f | |
4018 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4019 | ||
4020 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
4021 | ||
4022 | /* Record the fields for the semantic handler. */ | |
4023 | FLD (f_srcdst) = f_srcdst; | |
4024 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4025 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
4026 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
4027 | ||
4028 | #if WITH_PROFILE_MODEL_P | |
4029 | /* Record the fields for profiling. */ | |
4030 | if (PROFILE_MODEL_P (current_cpu)) | |
4031 | { | |
4032 | FLD (in_abase) = f_abase; | |
4033 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
4034 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
4035 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
4036 | FLD (out_h_gr_add__VM_index_of_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4037 | } |
4038 | #endif | |
4039 | #undef FLD | |
7a292a7a | 4040 | return idesc; |
c906108c SS |
4041 | } |
4042 | ||
7a292a7a | 4043 | extract_fmt_ldq_indirect_index: |
c906108c | 4044 | { |
7a292a7a | 4045 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4046 | CGEN_INSN_INT insn = base_insn; |
4047 | #define FLD(f) abuf->fields.fmt_ldq_indirect_index.f | |
4048 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4049 | ||
4050 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
4051 | ||
4052 | /* Record the fields for the semantic handler. */ | |
4053 | FLD (f_srcdst) = f_srcdst; | |
4054 | FLD (f_scale) = f_scale; | |
4055 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4056 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4057 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
4058 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
4059 | ||
4060 | #if WITH_PROFILE_MODEL_P | |
4061 | /* Record the fields for profiling. */ | |
4062 | if (PROFILE_MODEL_P (current_cpu)) | |
4063 | { | |
4064 | FLD (in_abase) = f_abase; | |
4065 | FLD (in_index) = f_index; | |
4066 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
4067 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
4068 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
4069 | FLD (out_h_gr_add__VM_index_of_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4070 | } |
4071 | #endif | |
4072 | #undef FLD | |
7a292a7a | 4073 | return idesc; |
c906108c SS |
4074 | } |
4075 | ||
7a292a7a | 4076 | extract_fmt_ldq_disp: |
c906108c | 4077 | { |
7a292a7a | 4078 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4079 | CGEN_INSN_INT insn = base_insn; |
4080 | #define FLD(f) abuf->fields.fmt_ldq_disp.f | |
4081 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4082 | ||
4083 | EXTRACT_IFMT_LDA_DISP_CODE | |
4084 | ||
4085 | /* Record the fields for the semantic handler. */ | |
4086 | FLD (f_srcdst) = f_srcdst; | |
4087 | FLD (f_optdisp) = f_optdisp; | |
4088 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
4089 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
4090 | ||
4091 | #if WITH_PROFILE_MODEL_P | |
4092 | /* Record the fields for profiling. */ | |
4093 | if (PROFILE_MODEL_P (current_cpu)) | |
4094 | { | |
4095 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
4096 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
4097 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
4098 | FLD (out_h_gr_add__VM_index_of_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4099 | } |
4100 | #endif | |
4101 | #undef FLD | |
7a292a7a | 4102 | return idesc; |
c906108c SS |
4103 | } |
4104 | ||
7a292a7a | 4105 | extract_fmt_ldq_indirect_disp: |
c906108c | 4106 | { |
7a292a7a | 4107 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4108 | CGEN_INSN_INT insn = base_insn; |
4109 | #define FLD(f) abuf->fields.fmt_ldq_indirect_disp.f | |
4110 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4111 | ||
4112 | EXTRACT_IFMT_LDA_DISP_CODE | |
4113 | ||
4114 | /* Record the fields for the semantic handler. */ | |
4115 | FLD (f_srcdst) = f_srcdst; | |
4116 | FLD (f_optdisp) = f_optdisp; | |
4117 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4118 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
4119 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
4120 | ||
4121 | #if WITH_PROFILE_MODEL_P | |
4122 | /* Record the fields for profiling. */ | |
4123 | if (PROFILE_MODEL_P (current_cpu)) | |
4124 | { | |
4125 | FLD (in_abase) = f_abase; | |
4126 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
4127 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
4128 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
4129 | FLD (out_h_gr_add__VM_index_of_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4130 | } |
4131 | #endif | |
4132 | #undef FLD | |
7a292a7a | 4133 | return idesc; |
c906108c SS |
4134 | } |
4135 | ||
7a292a7a | 4136 | extract_fmt_ldq_index_disp: |
c906108c | 4137 | { |
7a292a7a | 4138 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4139 | CGEN_INSN_INT insn = base_insn; |
4140 | #define FLD(f) abuf->fields.fmt_ldq_index_disp.f | |
4141 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4142 | ||
4143 | EXTRACT_IFMT_LDA_DISP_CODE | |
4144 | ||
4145 | /* Record the fields for the semantic handler. */ | |
4146 | FLD (f_srcdst) = f_srcdst; | |
4147 | FLD (f_optdisp) = f_optdisp; | |
4148 | FLD (f_scale) = f_scale; | |
4149 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4150 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
4151 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
4152 | ||
4153 | #if WITH_PROFILE_MODEL_P | |
4154 | /* Record the fields for profiling. */ | |
4155 | if (PROFILE_MODEL_P (current_cpu)) | |
4156 | { | |
4157 | FLD (in_index) = f_index; | |
4158 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
4159 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
4160 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
4161 | FLD (out_h_gr_add__VM_index_of_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4162 | } |
4163 | #endif | |
4164 | #undef FLD | |
7a292a7a | 4165 | return idesc; |
c906108c SS |
4166 | } |
4167 | ||
7a292a7a | 4168 | extract_fmt_ldq_indirect_index_disp: |
c906108c | 4169 | { |
7a292a7a | 4170 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4171 | CGEN_INSN_INT insn = base_insn; |
4172 | #define FLD(f) abuf->fields.fmt_ldq_indirect_index_disp.f | |
4173 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4174 | ||
4175 | EXTRACT_IFMT_LDA_DISP_CODE | |
4176 | ||
4177 | /* Record the fields for the semantic handler. */ | |
4178 | FLD (f_srcdst) = f_srcdst; | |
4179 | FLD (f_optdisp) = f_optdisp; | |
4180 | FLD (f_scale) = f_scale; | |
4181 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4182 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4183 | FLD (i_dst) = & CPU (h_gr)[f_srcdst]; | |
4184 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0)); | |
4185 | ||
4186 | #if WITH_PROFILE_MODEL_P | |
4187 | /* Record the fields for profiling. */ | |
4188 | if (PROFILE_MODEL_P (current_cpu)) | |
4189 | { | |
4190 | FLD (in_abase) = f_abase; | |
4191 | FLD (in_index) = f_index; | |
4192 | FLD (out_dst) = f_srcdst; | |
7a292a7a SS |
4193 | FLD (out_h_gr_add__VM_index_of_dst_1) = ((FLD (f_srcdst)) + (1)); |
4194 | FLD (out_h_gr_add__VM_index_of_dst_2) = ((FLD (f_srcdst)) + (2)); | |
4195 | FLD (out_h_gr_add__VM_index_of_dst_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
4196 | } |
4197 | #endif | |
4198 | #undef FLD | |
7a292a7a | 4199 | return idesc; |
c906108c SS |
4200 | } |
4201 | ||
7a292a7a | 4202 | extract_fmt_st_offset: |
c906108c | 4203 | { |
7a292a7a | 4204 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4205 | CGEN_INSN_INT insn = base_insn; |
4206 | #define FLD(f) abuf->fields.fmt_st_offset.f | |
4207 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
4208 | ||
4209 | EXTRACT_IFMT_ST_OFFSET_CODE | |
4210 | ||
4211 | /* Record the fields for the semantic handler. */ | |
4212 | FLD (f_offset) = f_offset; | |
4213 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4214 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4215 | ||
4216 | #if WITH_PROFILE_MODEL_P | |
4217 | /* Record the fields for profiling. */ | |
4218 | if (PROFILE_MODEL_P (current_cpu)) | |
4219 | { | |
4220 | FLD (in_st_src) = f_srcdst; | |
4221 | } | |
4222 | #endif | |
4223 | #undef FLD | |
7a292a7a | 4224 | return idesc; |
c906108c SS |
4225 | } |
4226 | ||
7a292a7a | 4227 | extract_fmt_st_indirect_offset: |
c906108c | 4228 | { |
7a292a7a | 4229 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4230 | CGEN_INSN_INT insn = base_insn; |
4231 | #define FLD(f) abuf->fields.fmt_st_indirect_offset.f | |
4232 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
4233 | ||
4234 | EXTRACT_IFMT_ST_OFFSET_CODE | |
4235 | ||
4236 | /* Record the fields for the semantic handler. */ | |
4237 | FLD (f_offset) = f_offset; | |
4238 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4239 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4240 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4241 | ||
4242 | #if WITH_PROFILE_MODEL_P | |
4243 | /* Record the fields for profiling. */ | |
4244 | if (PROFILE_MODEL_P (current_cpu)) | |
4245 | { | |
4246 | FLD (in_abase) = f_abase; | |
4247 | FLD (in_st_src) = f_srcdst; | |
4248 | } | |
4249 | #endif | |
4250 | #undef FLD | |
7a292a7a | 4251 | return idesc; |
c906108c SS |
4252 | } |
4253 | ||
7a292a7a | 4254 | extract_fmt_st_indirect: |
c906108c | 4255 | { |
7a292a7a | 4256 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4257 | CGEN_INSN_INT insn = base_insn; |
4258 | #define FLD(f) abuf->fields.fmt_st_indirect.f | |
4259 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4260 | ||
4261 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
4262 | ||
4263 | /* Record the fields for the semantic handler. */ | |
4264 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4265 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4266 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4267 | ||
4268 | #if WITH_PROFILE_MODEL_P | |
4269 | /* Record the fields for profiling. */ | |
4270 | if (PROFILE_MODEL_P (current_cpu)) | |
4271 | { | |
4272 | FLD (in_abase) = f_abase; | |
4273 | FLD (in_st_src) = f_srcdst; | |
4274 | } | |
4275 | #endif | |
4276 | #undef FLD | |
7a292a7a | 4277 | return idesc; |
c906108c SS |
4278 | } |
4279 | ||
7a292a7a | 4280 | extract_fmt_st_indirect_index: |
c906108c | 4281 | { |
7a292a7a | 4282 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4283 | CGEN_INSN_INT insn = base_insn; |
4284 | #define FLD(f) abuf->fields.fmt_st_indirect_index.f | |
4285 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4286 | ||
4287 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
4288 | ||
4289 | /* Record the fields for the semantic handler. */ | |
4290 | FLD (f_scale) = f_scale; | |
4291 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4292 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4293 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4294 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4295 | ||
4296 | #if WITH_PROFILE_MODEL_P | |
4297 | /* Record the fields for profiling. */ | |
4298 | if (PROFILE_MODEL_P (current_cpu)) | |
4299 | { | |
4300 | FLD (in_abase) = f_abase; | |
4301 | FLD (in_index) = f_index; | |
4302 | FLD (in_st_src) = f_srcdst; | |
4303 | } | |
4304 | #endif | |
4305 | #undef FLD | |
7a292a7a | 4306 | return idesc; |
c906108c SS |
4307 | } |
4308 | ||
7a292a7a | 4309 | extract_fmt_st_disp: |
c906108c | 4310 | { |
7a292a7a | 4311 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4312 | CGEN_INSN_INT insn = base_insn; |
4313 | #define FLD(f) abuf->fields.fmt_st_disp.f | |
4314 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4315 | ||
4316 | EXTRACT_IFMT_ST_DISP_CODE | |
4317 | ||
4318 | /* Record the fields for the semantic handler. */ | |
4319 | FLD (f_optdisp) = f_optdisp; | |
4320 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4321 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4322 | ||
4323 | #if WITH_PROFILE_MODEL_P | |
4324 | /* Record the fields for profiling. */ | |
4325 | if (PROFILE_MODEL_P (current_cpu)) | |
4326 | { | |
4327 | FLD (in_st_src) = f_srcdst; | |
4328 | } | |
4329 | #endif | |
4330 | #undef FLD | |
7a292a7a | 4331 | return idesc; |
c906108c SS |
4332 | } |
4333 | ||
7a292a7a | 4334 | extract_fmt_st_indirect_disp: |
c906108c | 4335 | { |
7a292a7a | 4336 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4337 | CGEN_INSN_INT insn = base_insn; |
4338 | #define FLD(f) abuf->fields.fmt_st_indirect_disp.f | |
4339 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4340 | ||
4341 | EXTRACT_IFMT_ST_DISP_CODE | |
4342 | ||
4343 | /* Record the fields for the semantic handler. */ | |
4344 | FLD (f_optdisp) = f_optdisp; | |
4345 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4346 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4347 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4348 | ||
4349 | #if WITH_PROFILE_MODEL_P | |
4350 | /* Record the fields for profiling. */ | |
4351 | if (PROFILE_MODEL_P (current_cpu)) | |
4352 | { | |
4353 | FLD (in_abase) = f_abase; | |
4354 | FLD (in_st_src) = f_srcdst; | |
4355 | } | |
4356 | #endif | |
4357 | #undef FLD | |
7a292a7a | 4358 | return idesc; |
c906108c SS |
4359 | } |
4360 | ||
7a292a7a | 4361 | extract_fmt_st_index_disp: |
c906108c | 4362 | { |
7a292a7a | 4363 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4364 | CGEN_INSN_INT insn = base_insn; |
4365 | #define FLD(f) abuf->fields.fmt_st_index_disp.f | |
4366 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4367 | ||
4368 | EXTRACT_IFMT_ST_DISP_CODE | |
4369 | ||
4370 | /* Record the fields for the semantic handler. */ | |
4371 | FLD (f_optdisp) = f_optdisp; | |
4372 | FLD (f_scale) = f_scale; | |
4373 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4374 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4375 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4376 | ||
4377 | #if WITH_PROFILE_MODEL_P | |
4378 | /* Record the fields for profiling. */ | |
4379 | if (PROFILE_MODEL_P (current_cpu)) | |
4380 | { | |
4381 | FLD (in_index) = f_index; | |
4382 | FLD (in_st_src) = f_srcdst; | |
4383 | } | |
4384 | #endif | |
4385 | #undef FLD | |
7a292a7a | 4386 | return idesc; |
c906108c SS |
4387 | } |
4388 | ||
7a292a7a | 4389 | extract_fmt_st_indirect_index_disp: |
c906108c | 4390 | { |
7a292a7a | 4391 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4392 | CGEN_INSN_INT insn = base_insn; |
4393 | #define FLD(f) abuf->fields.fmt_st_indirect_index_disp.f | |
4394 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4395 | ||
4396 | EXTRACT_IFMT_ST_DISP_CODE | |
4397 | ||
4398 | /* Record the fields for the semantic handler. */ | |
4399 | FLD (f_optdisp) = f_optdisp; | |
4400 | FLD (f_scale) = f_scale; | |
4401 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4402 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4403 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4404 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4405 | ||
4406 | #if WITH_PROFILE_MODEL_P | |
4407 | /* Record the fields for profiling. */ | |
4408 | if (PROFILE_MODEL_P (current_cpu)) | |
4409 | { | |
4410 | FLD (in_abase) = f_abase; | |
4411 | FLD (in_index) = f_index; | |
4412 | FLD (in_st_src) = f_srcdst; | |
4413 | } | |
4414 | #endif | |
4415 | #undef FLD | |
7a292a7a | 4416 | return idesc; |
c906108c SS |
4417 | } |
4418 | ||
7a292a7a | 4419 | extract_fmt_stob_offset: |
c906108c | 4420 | { |
7a292a7a | 4421 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4422 | CGEN_INSN_INT insn = base_insn; |
4423 | #define FLD(f) abuf->fields.fmt_stob_offset.f | |
4424 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
4425 | ||
4426 | EXTRACT_IFMT_ST_OFFSET_CODE | |
4427 | ||
4428 | /* Record the fields for the semantic handler. */ | |
4429 | FLD (f_offset) = f_offset; | |
4430 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4431 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4432 | ||
4433 | #if WITH_PROFILE_MODEL_P | |
4434 | /* Record the fields for profiling. */ | |
4435 | if (PROFILE_MODEL_P (current_cpu)) | |
4436 | { | |
4437 | FLD (in_st_src) = f_srcdst; | |
4438 | } | |
4439 | #endif | |
4440 | #undef FLD | |
7a292a7a | 4441 | return idesc; |
c906108c SS |
4442 | } |
4443 | ||
7a292a7a | 4444 | extract_fmt_stob_indirect_offset: |
c906108c | 4445 | { |
7a292a7a | 4446 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4447 | CGEN_INSN_INT insn = base_insn; |
4448 | #define FLD(f) abuf->fields.fmt_stob_indirect_offset.f | |
4449 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
4450 | ||
4451 | EXTRACT_IFMT_ST_OFFSET_CODE | |
4452 | ||
4453 | /* Record the fields for the semantic handler. */ | |
4454 | FLD (f_offset) = f_offset; | |
4455 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4456 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4457 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4458 | ||
4459 | #if WITH_PROFILE_MODEL_P | |
4460 | /* Record the fields for profiling. */ | |
4461 | if (PROFILE_MODEL_P (current_cpu)) | |
4462 | { | |
4463 | FLD (in_abase) = f_abase; | |
4464 | FLD (in_st_src) = f_srcdst; | |
4465 | } | |
4466 | #endif | |
4467 | #undef FLD | |
7a292a7a | 4468 | return idesc; |
c906108c SS |
4469 | } |
4470 | ||
7a292a7a | 4471 | extract_fmt_stob_indirect: |
c906108c | 4472 | { |
7a292a7a | 4473 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4474 | CGEN_INSN_INT insn = base_insn; |
4475 | #define FLD(f) abuf->fields.fmt_stob_indirect.f | |
4476 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4477 | ||
4478 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
4479 | ||
4480 | /* Record the fields for the semantic handler. */ | |
4481 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4482 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4483 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4484 | ||
4485 | #if WITH_PROFILE_MODEL_P | |
4486 | /* Record the fields for profiling. */ | |
4487 | if (PROFILE_MODEL_P (current_cpu)) | |
4488 | { | |
4489 | FLD (in_abase) = f_abase; | |
4490 | FLD (in_st_src) = f_srcdst; | |
4491 | } | |
4492 | #endif | |
4493 | #undef FLD | |
7a292a7a | 4494 | return idesc; |
c906108c SS |
4495 | } |
4496 | ||
7a292a7a | 4497 | extract_fmt_stob_indirect_index: |
c906108c | 4498 | { |
7a292a7a | 4499 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4500 | CGEN_INSN_INT insn = base_insn; |
4501 | #define FLD(f) abuf->fields.fmt_stob_indirect_index.f | |
4502 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4503 | ||
4504 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
4505 | ||
4506 | /* Record the fields for the semantic handler. */ | |
4507 | FLD (f_scale) = f_scale; | |
4508 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4509 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4510 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4511 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4512 | ||
4513 | #if WITH_PROFILE_MODEL_P | |
4514 | /* Record the fields for profiling. */ | |
4515 | if (PROFILE_MODEL_P (current_cpu)) | |
4516 | { | |
4517 | FLD (in_abase) = f_abase; | |
4518 | FLD (in_index) = f_index; | |
4519 | FLD (in_st_src) = f_srcdst; | |
4520 | } | |
4521 | #endif | |
4522 | #undef FLD | |
7a292a7a | 4523 | return idesc; |
c906108c SS |
4524 | } |
4525 | ||
7a292a7a | 4526 | extract_fmt_stob_disp: |
c906108c | 4527 | { |
7a292a7a | 4528 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4529 | CGEN_INSN_INT insn = base_insn; |
4530 | #define FLD(f) abuf->fields.fmt_stob_disp.f | |
4531 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4532 | ||
4533 | EXTRACT_IFMT_ST_DISP_CODE | |
4534 | ||
4535 | /* Record the fields for the semantic handler. */ | |
4536 | FLD (f_optdisp) = f_optdisp; | |
4537 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4538 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4539 | ||
4540 | #if WITH_PROFILE_MODEL_P | |
4541 | /* Record the fields for profiling. */ | |
4542 | if (PROFILE_MODEL_P (current_cpu)) | |
4543 | { | |
4544 | FLD (in_st_src) = f_srcdst; | |
4545 | } | |
4546 | #endif | |
4547 | #undef FLD | |
7a292a7a | 4548 | return idesc; |
c906108c SS |
4549 | } |
4550 | ||
7a292a7a | 4551 | extract_fmt_stob_indirect_disp: |
c906108c | 4552 | { |
7a292a7a | 4553 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4554 | CGEN_INSN_INT insn = base_insn; |
4555 | #define FLD(f) abuf->fields.fmt_stob_indirect_disp.f | |
4556 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4557 | ||
4558 | EXTRACT_IFMT_ST_DISP_CODE | |
4559 | ||
4560 | /* Record the fields for the semantic handler. */ | |
4561 | FLD (f_optdisp) = f_optdisp; | |
4562 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4563 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4564 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4565 | ||
4566 | #if WITH_PROFILE_MODEL_P | |
4567 | /* Record the fields for profiling. */ | |
4568 | if (PROFILE_MODEL_P (current_cpu)) | |
4569 | { | |
4570 | FLD (in_abase) = f_abase; | |
4571 | FLD (in_st_src) = f_srcdst; | |
4572 | } | |
4573 | #endif | |
4574 | #undef FLD | |
7a292a7a | 4575 | return idesc; |
c906108c SS |
4576 | } |
4577 | ||
7a292a7a | 4578 | extract_fmt_stob_index_disp: |
c906108c | 4579 | { |
7a292a7a | 4580 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4581 | CGEN_INSN_INT insn = base_insn; |
4582 | #define FLD(f) abuf->fields.fmt_stob_index_disp.f | |
4583 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4584 | ||
4585 | EXTRACT_IFMT_ST_DISP_CODE | |
4586 | ||
4587 | /* Record the fields for the semantic handler. */ | |
4588 | FLD (f_optdisp) = f_optdisp; | |
4589 | FLD (f_scale) = f_scale; | |
4590 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4591 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4592 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4593 | ||
4594 | #if WITH_PROFILE_MODEL_P | |
4595 | /* Record the fields for profiling. */ | |
4596 | if (PROFILE_MODEL_P (current_cpu)) | |
4597 | { | |
4598 | FLD (in_index) = f_index; | |
4599 | FLD (in_st_src) = f_srcdst; | |
4600 | } | |
4601 | #endif | |
4602 | #undef FLD | |
7a292a7a | 4603 | return idesc; |
c906108c SS |
4604 | } |
4605 | ||
7a292a7a | 4606 | extract_fmt_stob_indirect_index_disp: |
c906108c | 4607 | { |
7a292a7a | 4608 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4609 | CGEN_INSN_INT insn = base_insn; |
4610 | #define FLD(f) abuf->fields.fmt_stob_indirect_index_disp.f | |
4611 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4612 | ||
4613 | EXTRACT_IFMT_ST_DISP_CODE | |
4614 | ||
4615 | /* Record the fields for the semantic handler. */ | |
4616 | FLD (f_optdisp) = f_optdisp; | |
4617 | FLD (f_scale) = f_scale; | |
4618 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4619 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4620 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4621 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stob_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4622 | ||
4623 | #if WITH_PROFILE_MODEL_P | |
4624 | /* Record the fields for profiling. */ | |
4625 | if (PROFILE_MODEL_P (current_cpu)) | |
4626 | { | |
4627 | FLD (in_abase) = f_abase; | |
4628 | FLD (in_index) = f_index; | |
4629 | FLD (in_st_src) = f_srcdst; | |
4630 | } | |
4631 | #endif | |
4632 | #undef FLD | |
7a292a7a | 4633 | return idesc; |
c906108c SS |
4634 | } |
4635 | ||
7a292a7a | 4636 | extract_fmt_stos_offset: |
c906108c | 4637 | { |
7a292a7a | 4638 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4639 | CGEN_INSN_INT insn = base_insn; |
4640 | #define FLD(f) abuf->fields.fmt_stos_offset.f | |
4641 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
4642 | ||
4643 | EXTRACT_IFMT_ST_OFFSET_CODE | |
4644 | ||
4645 | /* Record the fields for the semantic handler. */ | |
4646 | FLD (f_offset) = f_offset; | |
4647 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4648 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4649 | ||
4650 | #if WITH_PROFILE_MODEL_P | |
4651 | /* Record the fields for profiling. */ | |
4652 | if (PROFILE_MODEL_P (current_cpu)) | |
4653 | { | |
4654 | FLD (in_st_src) = f_srcdst; | |
4655 | } | |
4656 | #endif | |
4657 | #undef FLD | |
7a292a7a | 4658 | return idesc; |
c906108c SS |
4659 | } |
4660 | ||
7a292a7a | 4661 | extract_fmt_stos_indirect_offset: |
c906108c | 4662 | { |
7a292a7a | 4663 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4664 | CGEN_INSN_INT insn = base_insn; |
4665 | #define FLD(f) abuf->fields.fmt_stos_indirect_offset.f | |
4666 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
4667 | ||
4668 | EXTRACT_IFMT_ST_OFFSET_CODE | |
4669 | ||
4670 | /* Record the fields for the semantic handler. */ | |
4671 | FLD (f_offset) = f_offset; | |
4672 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4673 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4674 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4675 | ||
4676 | #if WITH_PROFILE_MODEL_P | |
4677 | /* Record the fields for profiling. */ | |
4678 | if (PROFILE_MODEL_P (current_cpu)) | |
4679 | { | |
4680 | FLD (in_abase) = f_abase; | |
4681 | FLD (in_st_src) = f_srcdst; | |
4682 | } | |
4683 | #endif | |
4684 | #undef FLD | |
7a292a7a | 4685 | return idesc; |
c906108c SS |
4686 | } |
4687 | ||
7a292a7a | 4688 | extract_fmt_stos_indirect: |
c906108c | 4689 | { |
7a292a7a | 4690 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4691 | CGEN_INSN_INT insn = base_insn; |
4692 | #define FLD(f) abuf->fields.fmt_stos_indirect.f | |
4693 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4694 | ||
4695 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
4696 | ||
4697 | /* Record the fields for the semantic handler. */ | |
4698 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4699 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4700 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4701 | ||
4702 | #if WITH_PROFILE_MODEL_P | |
4703 | /* Record the fields for profiling. */ | |
4704 | if (PROFILE_MODEL_P (current_cpu)) | |
4705 | { | |
4706 | FLD (in_abase) = f_abase; | |
4707 | FLD (in_st_src) = f_srcdst; | |
4708 | } | |
4709 | #endif | |
4710 | #undef FLD | |
7a292a7a | 4711 | return idesc; |
c906108c SS |
4712 | } |
4713 | ||
7a292a7a | 4714 | extract_fmt_stos_indirect_index: |
c906108c | 4715 | { |
7a292a7a | 4716 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4717 | CGEN_INSN_INT insn = base_insn; |
4718 | #define FLD(f) abuf->fields.fmt_stos_indirect_index.f | |
4719 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4720 | ||
4721 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
4722 | ||
4723 | /* Record the fields for the semantic handler. */ | |
4724 | FLD (f_scale) = f_scale; | |
4725 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4726 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4727 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4728 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4729 | ||
4730 | #if WITH_PROFILE_MODEL_P | |
4731 | /* Record the fields for profiling. */ | |
4732 | if (PROFILE_MODEL_P (current_cpu)) | |
4733 | { | |
4734 | FLD (in_abase) = f_abase; | |
4735 | FLD (in_index) = f_index; | |
4736 | FLD (in_st_src) = f_srcdst; | |
4737 | } | |
4738 | #endif | |
4739 | #undef FLD | |
7a292a7a | 4740 | return idesc; |
c906108c SS |
4741 | } |
4742 | ||
7a292a7a | 4743 | extract_fmt_stos_disp: |
c906108c | 4744 | { |
7a292a7a | 4745 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4746 | CGEN_INSN_INT insn = base_insn; |
4747 | #define FLD(f) abuf->fields.fmt_stos_disp.f | |
4748 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4749 | ||
4750 | EXTRACT_IFMT_ST_DISP_CODE | |
4751 | ||
4752 | /* Record the fields for the semantic handler. */ | |
4753 | FLD (f_optdisp) = f_optdisp; | |
4754 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4755 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4756 | ||
4757 | #if WITH_PROFILE_MODEL_P | |
4758 | /* Record the fields for profiling. */ | |
4759 | if (PROFILE_MODEL_P (current_cpu)) | |
4760 | { | |
4761 | FLD (in_st_src) = f_srcdst; | |
4762 | } | |
4763 | #endif | |
4764 | #undef FLD | |
7a292a7a | 4765 | return idesc; |
c906108c SS |
4766 | } |
4767 | ||
7a292a7a | 4768 | extract_fmt_stos_indirect_disp: |
c906108c | 4769 | { |
7a292a7a | 4770 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4771 | CGEN_INSN_INT insn = base_insn; |
4772 | #define FLD(f) abuf->fields.fmt_stos_indirect_disp.f | |
4773 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4774 | ||
4775 | EXTRACT_IFMT_ST_DISP_CODE | |
4776 | ||
4777 | /* Record the fields for the semantic handler. */ | |
4778 | FLD (f_optdisp) = f_optdisp; | |
4779 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4780 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4781 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4782 | ||
4783 | #if WITH_PROFILE_MODEL_P | |
4784 | /* Record the fields for profiling. */ | |
4785 | if (PROFILE_MODEL_P (current_cpu)) | |
4786 | { | |
4787 | FLD (in_abase) = f_abase; | |
4788 | FLD (in_st_src) = f_srcdst; | |
4789 | } | |
4790 | #endif | |
4791 | #undef FLD | |
7a292a7a | 4792 | return idesc; |
c906108c SS |
4793 | } |
4794 | ||
7a292a7a | 4795 | extract_fmt_stos_index_disp: |
c906108c | 4796 | { |
7a292a7a | 4797 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4798 | CGEN_INSN_INT insn = base_insn; |
4799 | #define FLD(f) abuf->fields.fmt_stos_index_disp.f | |
4800 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4801 | ||
4802 | EXTRACT_IFMT_ST_DISP_CODE | |
4803 | ||
4804 | /* Record the fields for the semantic handler. */ | |
4805 | FLD (f_optdisp) = f_optdisp; | |
4806 | FLD (f_scale) = f_scale; | |
4807 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4808 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4809 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4810 | ||
4811 | #if WITH_PROFILE_MODEL_P | |
4812 | /* Record the fields for profiling. */ | |
4813 | if (PROFILE_MODEL_P (current_cpu)) | |
4814 | { | |
4815 | FLD (in_index) = f_index; | |
4816 | FLD (in_st_src) = f_srcdst; | |
4817 | } | |
4818 | #endif | |
4819 | #undef FLD | |
7a292a7a | 4820 | return idesc; |
c906108c SS |
4821 | } |
4822 | ||
7a292a7a | 4823 | extract_fmt_stos_indirect_index_disp: |
c906108c | 4824 | { |
7a292a7a | 4825 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4826 | CGEN_INSN_INT insn = base_insn; |
4827 | #define FLD(f) abuf->fields.fmt_stos_indirect_index_disp.f | |
4828 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4829 | ||
4830 | EXTRACT_IFMT_ST_DISP_CODE | |
4831 | ||
4832 | /* Record the fields for the semantic handler. */ | |
4833 | FLD (f_optdisp) = f_optdisp; | |
4834 | FLD (f_scale) = f_scale; | |
4835 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4836 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4837 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4838 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stos_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4839 | ||
4840 | #if WITH_PROFILE_MODEL_P | |
4841 | /* Record the fields for profiling. */ | |
4842 | if (PROFILE_MODEL_P (current_cpu)) | |
4843 | { | |
4844 | FLD (in_abase) = f_abase; | |
4845 | FLD (in_index) = f_index; | |
4846 | FLD (in_st_src) = f_srcdst; | |
4847 | } | |
4848 | #endif | |
4849 | #undef FLD | |
7a292a7a | 4850 | return idesc; |
c906108c SS |
4851 | } |
4852 | ||
7a292a7a | 4853 | extract_fmt_stl_offset: |
c906108c | 4854 | { |
7a292a7a | 4855 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4856 | CGEN_INSN_INT insn = base_insn; |
4857 | #define FLD(f) abuf->fields.fmt_stl_offset.f | |
4858 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
4859 | ||
4860 | EXTRACT_IFMT_ST_OFFSET_CODE | |
4861 | ||
4862 | /* Record the fields for the semantic handler. */ | |
4863 | FLD (f_srcdst) = f_srcdst; | |
4864 | FLD (f_offset) = f_offset; | |
4865 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4866 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4867 | ||
4868 | #if WITH_PROFILE_MODEL_P | |
4869 | /* Record the fields for profiling. */ | |
4870 | if (PROFILE_MODEL_P (current_cpu)) | |
4871 | { | |
7a292a7a | 4872 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
4873 | FLD (in_st_src) = f_srcdst; |
4874 | } | |
4875 | #endif | |
4876 | #undef FLD | |
7a292a7a | 4877 | return idesc; |
c906108c SS |
4878 | } |
4879 | ||
7a292a7a | 4880 | extract_fmt_stl_indirect_offset: |
c906108c | 4881 | { |
7a292a7a | 4882 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4883 | CGEN_INSN_INT insn = base_insn; |
4884 | #define FLD(f) abuf->fields.fmt_stl_indirect_offset.f | |
4885 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
4886 | ||
4887 | EXTRACT_IFMT_ST_OFFSET_CODE | |
4888 | ||
4889 | /* Record the fields for the semantic handler. */ | |
4890 | FLD (f_srcdst) = f_srcdst; | |
4891 | FLD (f_offset) = f_offset; | |
4892 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4893 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4894 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4895 | ||
4896 | #if WITH_PROFILE_MODEL_P | |
4897 | /* Record the fields for profiling. */ | |
4898 | if (PROFILE_MODEL_P (current_cpu)) | |
4899 | { | |
4900 | FLD (in_abase) = f_abase; | |
7a292a7a | 4901 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
4902 | FLD (in_st_src) = f_srcdst; |
4903 | } | |
4904 | #endif | |
4905 | #undef FLD | |
7a292a7a | 4906 | return idesc; |
c906108c SS |
4907 | } |
4908 | ||
7a292a7a | 4909 | extract_fmt_stl_indirect: |
c906108c | 4910 | { |
7a292a7a | 4911 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4912 | CGEN_INSN_INT insn = base_insn; |
4913 | #define FLD(f) abuf->fields.fmt_stl_indirect.f | |
4914 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4915 | ||
4916 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
4917 | ||
4918 | /* Record the fields for the semantic handler. */ | |
4919 | FLD (f_srcdst) = f_srcdst; | |
4920 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4921 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4922 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4923 | ||
4924 | #if WITH_PROFILE_MODEL_P | |
4925 | /* Record the fields for profiling. */ | |
4926 | if (PROFILE_MODEL_P (current_cpu)) | |
4927 | { | |
4928 | FLD (in_abase) = f_abase; | |
7a292a7a | 4929 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
4930 | FLD (in_st_src) = f_srcdst; |
4931 | } | |
4932 | #endif | |
4933 | #undef FLD | |
7a292a7a | 4934 | return idesc; |
c906108c SS |
4935 | } |
4936 | ||
7a292a7a | 4937 | extract_fmt_stl_indirect_index: |
c906108c | 4938 | { |
7a292a7a | 4939 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4940 | CGEN_INSN_INT insn = base_insn; |
4941 | #define FLD(f) abuf->fields.fmt_stl_indirect_index.f | |
4942 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4943 | ||
4944 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
4945 | ||
4946 | /* Record the fields for the semantic handler. */ | |
4947 | FLD (f_srcdst) = f_srcdst; | |
4948 | FLD (f_scale) = f_scale; | |
4949 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
4950 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
4951 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4952 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4953 | ||
4954 | #if WITH_PROFILE_MODEL_P | |
4955 | /* Record the fields for profiling. */ | |
4956 | if (PROFILE_MODEL_P (current_cpu)) | |
4957 | { | |
4958 | FLD (in_abase) = f_abase; | |
7a292a7a | 4959 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
4960 | FLD (in_index) = f_index; |
4961 | FLD (in_st_src) = f_srcdst; | |
4962 | } | |
4963 | #endif | |
4964 | #undef FLD | |
7a292a7a | 4965 | return idesc; |
c906108c SS |
4966 | } |
4967 | ||
7a292a7a | 4968 | extract_fmt_stl_disp: |
c906108c | 4969 | { |
7a292a7a | 4970 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4971 | CGEN_INSN_INT insn = base_insn; |
4972 | #define FLD(f) abuf->fields.fmt_stl_disp.f | |
4973 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
4974 | ||
4975 | EXTRACT_IFMT_ST_DISP_CODE | |
4976 | ||
4977 | /* Record the fields for the semantic handler. */ | |
4978 | FLD (f_srcdst) = f_srcdst; | |
4979 | FLD (f_optdisp) = f_optdisp; | |
4980 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
4981 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
4982 | ||
4983 | #if WITH_PROFILE_MODEL_P | |
4984 | /* Record the fields for profiling. */ | |
4985 | if (PROFILE_MODEL_P (current_cpu)) | |
4986 | { | |
7a292a7a | 4987 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
4988 | FLD (in_st_src) = f_srcdst; |
4989 | } | |
4990 | #endif | |
4991 | #undef FLD | |
7a292a7a | 4992 | return idesc; |
c906108c SS |
4993 | } |
4994 | ||
7a292a7a | 4995 | extract_fmt_stl_indirect_disp: |
c906108c | 4996 | { |
7a292a7a | 4997 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
4998 | CGEN_INSN_INT insn = base_insn; |
4999 | #define FLD(f) abuf->fields.fmt_stl_indirect_disp.f | |
5000 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5001 | ||
5002 | EXTRACT_IFMT_ST_DISP_CODE | |
5003 | ||
5004 | /* Record the fields for the semantic handler. */ | |
5005 | FLD (f_srcdst) = f_srcdst; | |
5006 | FLD (f_optdisp) = f_optdisp; | |
5007 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5008 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5009 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5010 | ||
5011 | #if WITH_PROFILE_MODEL_P | |
5012 | /* Record the fields for profiling. */ | |
5013 | if (PROFILE_MODEL_P (current_cpu)) | |
5014 | { | |
5015 | FLD (in_abase) = f_abase; | |
7a292a7a | 5016 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
5017 | FLD (in_st_src) = f_srcdst; |
5018 | } | |
5019 | #endif | |
5020 | #undef FLD | |
7a292a7a | 5021 | return idesc; |
c906108c SS |
5022 | } |
5023 | ||
7a292a7a | 5024 | extract_fmt_stl_index_disp: |
c906108c | 5025 | { |
7a292a7a | 5026 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5027 | CGEN_INSN_INT insn = base_insn; |
5028 | #define FLD(f) abuf->fields.fmt_stl_index_disp.f | |
5029 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5030 | ||
5031 | EXTRACT_IFMT_ST_DISP_CODE | |
5032 | ||
5033 | /* Record the fields for the semantic handler. */ | |
5034 | FLD (f_srcdst) = f_srcdst; | |
5035 | FLD (f_optdisp) = f_optdisp; | |
5036 | FLD (f_scale) = f_scale; | |
5037 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
5038 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5039 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5040 | ||
5041 | #if WITH_PROFILE_MODEL_P | |
5042 | /* Record the fields for profiling. */ | |
5043 | if (PROFILE_MODEL_P (current_cpu)) | |
5044 | { | |
7a292a7a | 5045 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
5046 | FLD (in_index) = f_index; |
5047 | FLD (in_st_src) = f_srcdst; | |
5048 | } | |
5049 | #endif | |
5050 | #undef FLD | |
7a292a7a | 5051 | return idesc; |
c906108c SS |
5052 | } |
5053 | ||
7a292a7a | 5054 | extract_fmt_stl_indirect_index_disp: |
c906108c | 5055 | { |
7a292a7a | 5056 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5057 | CGEN_INSN_INT insn = base_insn; |
5058 | #define FLD(f) abuf->fields.fmt_stl_indirect_index_disp.f | |
5059 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5060 | ||
5061 | EXTRACT_IFMT_ST_DISP_CODE | |
5062 | ||
5063 | /* Record the fields for the semantic handler. */ | |
5064 | FLD (f_srcdst) = f_srcdst; | |
5065 | FLD (f_optdisp) = f_optdisp; | |
5066 | FLD (f_scale) = f_scale; | |
5067 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5068 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
5069 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5070 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5071 | ||
5072 | #if WITH_PROFILE_MODEL_P | |
5073 | /* Record the fields for profiling. */ | |
5074 | if (PROFILE_MODEL_P (current_cpu)) | |
5075 | { | |
5076 | FLD (in_abase) = f_abase; | |
7a292a7a | 5077 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
c906108c SS |
5078 | FLD (in_index) = f_index; |
5079 | FLD (in_st_src) = f_srcdst; | |
5080 | } | |
5081 | #endif | |
5082 | #undef FLD | |
7a292a7a | 5083 | return idesc; |
c906108c SS |
5084 | } |
5085 | ||
7a292a7a | 5086 | extract_fmt_stt_offset: |
c906108c | 5087 | { |
7a292a7a | 5088 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5089 | CGEN_INSN_INT insn = base_insn; |
5090 | #define FLD(f) abuf->fields.fmt_stt_offset.f | |
5091 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
5092 | ||
5093 | EXTRACT_IFMT_ST_OFFSET_CODE | |
5094 | ||
5095 | /* Record the fields for the semantic handler. */ | |
5096 | FLD (f_srcdst) = f_srcdst; | |
5097 | FLD (f_offset) = f_offset; | |
5098 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5099 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5100 | ||
5101 | #if WITH_PROFILE_MODEL_P | |
5102 | /* Record the fields for profiling. */ | |
5103 | if (PROFILE_MODEL_P (current_cpu)) | |
5104 | { | |
7a292a7a SS |
5105 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5106 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
5107 | FLD (in_st_src) = f_srcdst; |
5108 | } | |
5109 | #endif | |
5110 | #undef FLD | |
7a292a7a | 5111 | return idesc; |
c906108c SS |
5112 | } |
5113 | ||
7a292a7a | 5114 | extract_fmt_stt_indirect_offset: |
c906108c | 5115 | { |
7a292a7a | 5116 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5117 | CGEN_INSN_INT insn = base_insn; |
5118 | #define FLD(f) abuf->fields.fmt_stt_indirect_offset.f | |
5119 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
5120 | ||
5121 | EXTRACT_IFMT_ST_OFFSET_CODE | |
5122 | ||
5123 | /* Record the fields for the semantic handler. */ | |
5124 | FLD (f_srcdst) = f_srcdst; | |
5125 | FLD (f_offset) = f_offset; | |
5126 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5127 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5128 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5129 | ||
5130 | #if WITH_PROFILE_MODEL_P | |
5131 | /* Record the fields for profiling. */ | |
5132 | if (PROFILE_MODEL_P (current_cpu)) | |
5133 | { | |
5134 | FLD (in_abase) = f_abase; | |
7a292a7a SS |
5135 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5136 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
5137 | FLD (in_st_src) = f_srcdst; |
5138 | } | |
5139 | #endif | |
5140 | #undef FLD | |
7a292a7a | 5141 | return idesc; |
c906108c SS |
5142 | } |
5143 | ||
7a292a7a | 5144 | extract_fmt_stt_indirect: |
c906108c | 5145 | { |
7a292a7a | 5146 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5147 | CGEN_INSN_INT insn = base_insn; |
5148 | #define FLD(f) abuf->fields.fmt_stt_indirect.f | |
5149 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5150 | ||
5151 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
5152 | ||
5153 | /* Record the fields for the semantic handler. */ | |
5154 | FLD (f_srcdst) = f_srcdst; | |
5155 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5156 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5157 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5158 | ||
5159 | #if WITH_PROFILE_MODEL_P | |
5160 | /* Record the fields for profiling. */ | |
5161 | if (PROFILE_MODEL_P (current_cpu)) | |
5162 | { | |
5163 | FLD (in_abase) = f_abase; | |
7a292a7a SS |
5164 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5165 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
5166 | FLD (in_st_src) = f_srcdst; |
5167 | } | |
5168 | #endif | |
5169 | #undef FLD | |
7a292a7a | 5170 | return idesc; |
c906108c SS |
5171 | } |
5172 | ||
7a292a7a | 5173 | extract_fmt_stt_indirect_index: |
c906108c | 5174 | { |
7a292a7a | 5175 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5176 | CGEN_INSN_INT insn = base_insn; |
5177 | #define FLD(f) abuf->fields.fmt_stt_indirect_index.f | |
5178 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5179 | ||
5180 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
5181 | ||
5182 | /* Record the fields for the semantic handler. */ | |
5183 | FLD (f_srcdst) = f_srcdst; | |
5184 | FLD (f_scale) = f_scale; | |
5185 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5186 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
5187 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5188 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5189 | ||
5190 | #if WITH_PROFILE_MODEL_P | |
5191 | /* Record the fields for profiling. */ | |
5192 | if (PROFILE_MODEL_P (current_cpu)) | |
5193 | { | |
5194 | FLD (in_abase) = f_abase; | |
7a292a7a SS |
5195 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5196 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
5197 | FLD (in_index) = f_index; |
5198 | FLD (in_st_src) = f_srcdst; | |
5199 | } | |
5200 | #endif | |
5201 | #undef FLD | |
7a292a7a | 5202 | return idesc; |
c906108c SS |
5203 | } |
5204 | ||
7a292a7a | 5205 | extract_fmt_stt_disp: |
c906108c | 5206 | { |
7a292a7a | 5207 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5208 | CGEN_INSN_INT insn = base_insn; |
5209 | #define FLD(f) abuf->fields.fmt_stt_disp.f | |
5210 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5211 | ||
5212 | EXTRACT_IFMT_ST_DISP_CODE | |
5213 | ||
5214 | /* Record the fields for the semantic handler. */ | |
5215 | FLD (f_srcdst) = f_srcdst; | |
5216 | FLD (f_optdisp) = f_optdisp; | |
5217 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5218 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5219 | ||
5220 | #if WITH_PROFILE_MODEL_P | |
5221 | /* Record the fields for profiling. */ | |
5222 | if (PROFILE_MODEL_P (current_cpu)) | |
5223 | { | |
7a292a7a SS |
5224 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5225 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
5226 | FLD (in_st_src) = f_srcdst; |
5227 | } | |
5228 | #endif | |
5229 | #undef FLD | |
7a292a7a | 5230 | return idesc; |
c906108c SS |
5231 | } |
5232 | ||
7a292a7a | 5233 | extract_fmt_stt_indirect_disp: |
c906108c | 5234 | { |
7a292a7a | 5235 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5236 | CGEN_INSN_INT insn = base_insn; |
5237 | #define FLD(f) abuf->fields.fmt_stt_indirect_disp.f | |
5238 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5239 | ||
5240 | EXTRACT_IFMT_ST_DISP_CODE | |
5241 | ||
5242 | /* Record the fields for the semantic handler. */ | |
5243 | FLD (f_srcdst) = f_srcdst; | |
5244 | FLD (f_optdisp) = f_optdisp; | |
5245 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5246 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5247 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5248 | ||
5249 | #if WITH_PROFILE_MODEL_P | |
5250 | /* Record the fields for profiling. */ | |
5251 | if (PROFILE_MODEL_P (current_cpu)) | |
5252 | { | |
5253 | FLD (in_abase) = f_abase; | |
7a292a7a SS |
5254 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5255 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
5256 | FLD (in_st_src) = f_srcdst; |
5257 | } | |
5258 | #endif | |
5259 | #undef FLD | |
7a292a7a | 5260 | return idesc; |
c906108c SS |
5261 | } |
5262 | ||
7a292a7a | 5263 | extract_fmt_stt_index_disp: |
c906108c | 5264 | { |
7a292a7a | 5265 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5266 | CGEN_INSN_INT insn = base_insn; |
5267 | #define FLD(f) abuf->fields.fmt_stt_index_disp.f | |
5268 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5269 | ||
5270 | EXTRACT_IFMT_ST_DISP_CODE | |
5271 | ||
5272 | /* Record the fields for the semantic handler. */ | |
5273 | FLD (f_srcdst) = f_srcdst; | |
5274 | FLD (f_optdisp) = f_optdisp; | |
5275 | FLD (f_scale) = f_scale; | |
5276 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
5277 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5278 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5279 | ||
5280 | #if WITH_PROFILE_MODEL_P | |
5281 | /* Record the fields for profiling. */ | |
5282 | if (PROFILE_MODEL_P (current_cpu)) | |
5283 | { | |
7a292a7a SS |
5284 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5285 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
5286 | FLD (in_index) = f_index; |
5287 | FLD (in_st_src) = f_srcdst; | |
5288 | } | |
5289 | #endif | |
5290 | #undef FLD | |
7a292a7a | 5291 | return idesc; |
c906108c SS |
5292 | } |
5293 | ||
7a292a7a | 5294 | extract_fmt_stt_indirect_index_disp: |
c906108c | 5295 | { |
7a292a7a | 5296 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5297 | CGEN_INSN_INT insn = base_insn; |
5298 | #define FLD(f) abuf->fields.fmt_stt_indirect_index_disp.f | |
5299 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5300 | ||
5301 | EXTRACT_IFMT_ST_DISP_CODE | |
5302 | ||
5303 | /* Record the fields for the semantic handler. */ | |
5304 | FLD (f_srcdst) = f_srcdst; | |
5305 | FLD (f_optdisp) = f_optdisp; | |
5306 | FLD (f_scale) = f_scale; | |
5307 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5308 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
5309 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5310 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5311 | ||
5312 | #if WITH_PROFILE_MODEL_P | |
5313 | /* Record the fields for profiling. */ | |
5314 | if (PROFILE_MODEL_P (current_cpu)) | |
5315 | { | |
5316 | FLD (in_abase) = f_abase; | |
7a292a7a SS |
5317 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5318 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
c906108c SS |
5319 | FLD (in_index) = f_index; |
5320 | FLD (in_st_src) = f_srcdst; | |
5321 | } | |
5322 | #endif | |
5323 | #undef FLD | |
7a292a7a | 5324 | return idesc; |
c906108c SS |
5325 | } |
5326 | ||
7a292a7a | 5327 | extract_fmt_stq_offset: |
c906108c | 5328 | { |
7a292a7a | 5329 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5330 | CGEN_INSN_INT insn = base_insn; |
5331 | #define FLD(f) abuf->fields.fmt_stq_offset.f | |
5332 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
5333 | ||
5334 | EXTRACT_IFMT_ST_OFFSET_CODE | |
5335 | ||
5336 | /* Record the fields for the semantic handler. */ | |
5337 | FLD (f_srcdst) = f_srcdst; | |
5338 | FLD (f_offset) = f_offset; | |
5339 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5340 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5341 | ||
5342 | #if WITH_PROFILE_MODEL_P | |
5343 | /* Record the fields for profiling. */ | |
5344 | if (PROFILE_MODEL_P (current_cpu)) | |
5345 | { | |
7a292a7a SS |
5346 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5347 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
5348 | FLD (in_h_gr_add__VM_index_of_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
5349 | FLD (in_st_src) = f_srcdst; |
5350 | } | |
5351 | #endif | |
5352 | #undef FLD | |
7a292a7a | 5353 | return idesc; |
c906108c SS |
5354 | } |
5355 | ||
7a292a7a | 5356 | extract_fmt_stq_indirect_offset: |
c906108c | 5357 | { |
7a292a7a | 5358 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5359 | CGEN_INSN_INT insn = base_insn; |
5360 | #define FLD(f) abuf->fields.fmt_stq_indirect_offset.f | |
5361 | EXTRACT_IFMT_ST_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
5362 | ||
5363 | EXTRACT_IFMT_ST_OFFSET_CODE | |
5364 | ||
5365 | /* Record the fields for the semantic handler. */ | |
5366 | FLD (f_srcdst) = f_srcdst; | |
5367 | FLD (f_offset) = f_offset; | |
5368 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5369 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5370 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5371 | ||
5372 | #if WITH_PROFILE_MODEL_P | |
5373 | /* Record the fields for profiling. */ | |
5374 | if (PROFILE_MODEL_P (current_cpu)) | |
5375 | { | |
5376 | FLD (in_abase) = f_abase; | |
7a292a7a SS |
5377 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5378 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
5379 | FLD (in_h_gr_add__VM_index_of_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
5380 | FLD (in_st_src) = f_srcdst; |
5381 | } | |
5382 | #endif | |
5383 | #undef FLD | |
7a292a7a | 5384 | return idesc; |
c906108c SS |
5385 | } |
5386 | ||
7a292a7a | 5387 | extract_fmt_stq_indirect: |
c906108c | 5388 | { |
7a292a7a | 5389 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5390 | CGEN_INSN_INT insn = base_insn; |
5391 | #define FLD(f) abuf->fields.fmt_stq_indirect.f | |
5392 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5393 | ||
5394 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
5395 | ||
5396 | /* Record the fields for the semantic handler. */ | |
5397 | FLD (f_srcdst) = f_srcdst; | |
5398 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5399 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5400 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5401 | ||
5402 | #if WITH_PROFILE_MODEL_P | |
5403 | /* Record the fields for profiling. */ | |
5404 | if (PROFILE_MODEL_P (current_cpu)) | |
5405 | { | |
5406 | FLD (in_abase) = f_abase; | |
7a292a7a SS |
5407 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5408 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
5409 | FLD (in_h_gr_add__VM_index_of_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
5410 | FLD (in_st_src) = f_srcdst; |
5411 | } | |
5412 | #endif | |
5413 | #undef FLD | |
7a292a7a | 5414 | return idesc; |
c906108c SS |
5415 | } |
5416 | ||
7a292a7a | 5417 | extract_fmt_stq_indirect_index: |
c906108c | 5418 | { |
7a292a7a | 5419 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5420 | CGEN_INSN_INT insn = base_insn; |
5421 | #define FLD(f) abuf->fields.fmt_stq_indirect_index.f | |
5422 | EXTRACT_IFMT_ST_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5423 | ||
5424 | EXTRACT_IFMT_ST_INDIRECT_CODE | |
5425 | ||
5426 | /* Record the fields for the semantic handler. */ | |
5427 | FLD (f_srcdst) = f_srcdst; | |
5428 | FLD (f_scale) = f_scale; | |
5429 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5430 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
5431 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5432 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5433 | ||
5434 | #if WITH_PROFILE_MODEL_P | |
5435 | /* Record the fields for profiling. */ | |
5436 | if (PROFILE_MODEL_P (current_cpu)) | |
5437 | { | |
5438 | FLD (in_abase) = f_abase; | |
7a292a7a SS |
5439 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5440 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
5441 | FLD (in_h_gr_add__VM_index_of_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
5442 | FLD (in_index) = f_index; |
5443 | FLD (in_st_src) = f_srcdst; | |
5444 | } | |
5445 | #endif | |
5446 | #undef FLD | |
7a292a7a | 5447 | return idesc; |
c906108c SS |
5448 | } |
5449 | ||
7a292a7a | 5450 | extract_fmt_stq_disp: |
c906108c | 5451 | { |
7a292a7a | 5452 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5453 | CGEN_INSN_INT insn = base_insn; |
5454 | #define FLD(f) abuf->fields.fmt_stq_disp.f | |
5455 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5456 | ||
5457 | EXTRACT_IFMT_ST_DISP_CODE | |
5458 | ||
5459 | /* Record the fields for the semantic handler. */ | |
5460 | FLD (f_srcdst) = f_srcdst; | |
5461 | FLD (f_optdisp) = f_optdisp; | |
5462 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5463 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5464 | ||
5465 | #if WITH_PROFILE_MODEL_P | |
5466 | /* Record the fields for profiling. */ | |
5467 | if (PROFILE_MODEL_P (current_cpu)) | |
5468 | { | |
7a292a7a SS |
5469 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5470 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
5471 | FLD (in_h_gr_add__VM_index_of_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
5472 | FLD (in_st_src) = f_srcdst; |
5473 | } | |
5474 | #endif | |
5475 | #undef FLD | |
7a292a7a | 5476 | return idesc; |
c906108c SS |
5477 | } |
5478 | ||
7a292a7a | 5479 | extract_fmt_stq_indirect_disp: |
c906108c | 5480 | { |
7a292a7a | 5481 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5482 | CGEN_INSN_INT insn = base_insn; |
5483 | #define FLD(f) abuf->fields.fmt_stq_indirect_disp.f | |
5484 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5485 | ||
5486 | EXTRACT_IFMT_ST_DISP_CODE | |
5487 | ||
5488 | /* Record the fields for the semantic handler. */ | |
5489 | FLD (f_srcdst) = f_srcdst; | |
5490 | FLD (f_optdisp) = f_optdisp; | |
5491 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5492 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5493 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5494 | ||
5495 | #if WITH_PROFILE_MODEL_P | |
5496 | /* Record the fields for profiling. */ | |
5497 | if (PROFILE_MODEL_P (current_cpu)) | |
5498 | { | |
5499 | FLD (in_abase) = f_abase; | |
7a292a7a SS |
5500 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5501 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
5502 | FLD (in_h_gr_add__VM_index_of_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
5503 | FLD (in_st_src) = f_srcdst; |
5504 | } | |
5505 | #endif | |
5506 | #undef FLD | |
7a292a7a | 5507 | return idesc; |
c906108c SS |
5508 | } |
5509 | ||
7a292a7a | 5510 | extract_fmt_stq_index_disp: |
c906108c | 5511 | { |
7a292a7a | 5512 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5513 | CGEN_INSN_INT insn = base_insn; |
5514 | #define FLD(f) abuf->fields.fmt_stq_index_disp.f | |
5515 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5516 | ||
5517 | EXTRACT_IFMT_ST_DISP_CODE | |
5518 | ||
5519 | /* Record the fields for the semantic handler. */ | |
5520 | FLD (f_srcdst) = f_srcdst; | |
5521 | FLD (f_optdisp) = f_optdisp; | |
5522 | FLD (f_scale) = f_scale; | |
5523 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
5524 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5525 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5526 | ||
5527 | #if WITH_PROFILE_MODEL_P | |
5528 | /* Record the fields for profiling. */ | |
5529 | if (PROFILE_MODEL_P (current_cpu)) | |
5530 | { | |
7a292a7a SS |
5531 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5532 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
5533 | FLD (in_h_gr_add__VM_index_of_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
5534 | FLD (in_index) = f_index; |
5535 | FLD (in_st_src) = f_srcdst; | |
5536 | } | |
5537 | #endif | |
5538 | #undef FLD | |
7a292a7a | 5539 | return idesc; |
c906108c SS |
5540 | } |
5541 | ||
7a292a7a | 5542 | extract_fmt_stq_indirect_index_disp: |
c906108c | 5543 | { |
7a292a7a | 5544 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5545 | CGEN_INSN_INT insn = base_insn; |
5546 | #define FLD(f) abuf->fields.fmt_stq_indirect_index_disp.f | |
5547 | EXTRACT_IFMT_ST_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
5548 | ||
5549 | EXTRACT_IFMT_ST_DISP_CODE | |
5550 | ||
5551 | /* Record the fields for the semantic handler. */ | |
5552 | FLD (f_srcdst) = f_srcdst; | |
5553 | FLD (f_optdisp) = f_optdisp; | |
5554 | FLD (f_scale) = f_scale; | |
5555 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
5556 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
5557 | FLD (i_st_src) = & CPU (h_gr)[f_srcdst]; | |
5558 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0)); | |
5559 | ||
5560 | #if WITH_PROFILE_MODEL_P | |
5561 | /* Record the fields for profiling. */ | |
5562 | if (PROFILE_MODEL_P (current_cpu)) | |
5563 | { | |
5564 | FLD (in_abase) = f_abase; | |
7a292a7a SS |
5565 | FLD (in_h_gr_add__VM_index_of_st_src_1) = ((FLD (f_srcdst)) + (1)); |
5566 | FLD (in_h_gr_add__VM_index_of_st_src_2) = ((FLD (f_srcdst)) + (2)); | |
5567 | FLD (in_h_gr_add__VM_index_of_st_src_3) = ((FLD (f_srcdst)) + (3)); | |
c906108c SS |
5568 | FLD (in_index) = f_index; |
5569 | FLD (in_st_src) = f_srcdst; | |
5570 | } | |
5571 | #endif | |
5572 | #undef FLD | |
7a292a7a | 5573 | return idesc; |
c906108c SS |
5574 | } |
5575 | ||
7a292a7a | 5576 | extract_fmt_cmpobe_reg: |
c906108c | 5577 | { |
7a292a7a | 5578 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5579 | CGEN_INSN_INT insn = base_insn; |
5580 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_reg.f | |
5581 | EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ | |
5582 | ||
5583 | EXTRACT_IFMT_CMPOBE_REG_CODE | |
5584 | ||
5585 | /* Record the fields for the semantic handler. */ | |
5586 | FLD (i_br_disp) = f_br_disp; | |
5587 | FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; | |
5588 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
5589 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
5590 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobe_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); | |
5591 | ||
5592 | #if WITH_PROFILE_MODEL_P | |
5593 | /* Record the fields for profiling. */ | |
5594 | if (PROFILE_MODEL_P (current_cpu)) | |
5595 | { | |
5596 | FLD (in_br_src1) = f_br_src1; | |
5597 | FLD (in_br_src2) = f_br_src2; | |
5598 | } | |
5599 | #endif | |
5600 | #undef FLD | |
7a292a7a | 5601 | return idesc; |
c906108c SS |
5602 | } |
5603 | ||
7a292a7a | 5604 | extract_fmt_cmpobe_lit: |
c906108c | 5605 | { |
7a292a7a | 5606 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5607 | CGEN_INSN_INT insn = base_insn; |
5608 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobe_lit.f | |
5609 | EXTRACT_IFMT_CMPOBE_LIT_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ | |
5610 | ||
5611 | EXTRACT_IFMT_CMPOBE_LIT_CODE | |
5612 | ||
5613 | /* Record the fields for the semantic handler. */ | |
5614 | FLD (f_br_src1) = f_br_src1; | |
5615 | FLD (i_br_disp) = f_br_disp; | |
5616 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
5617 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
5618 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobe_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); | |
5619 | ||
5620 | #if WITH_PROFILE_MODEL_P | |
5621 | /* Record the fields for profiling. */ | |
5622 | if (PROFILE_MODEL_P (current_cpu)) | |
5623 | { | |
5624 | FLD (in_br_src2) = f_br_src2; | |
5625 | } | |
5626 | #endif | |
5627 | #undef FLD | |
7a292a7a | 5628 | return idesc; |
c906108c SS |
5629 | } |
5630 | ||
7a292a7a | 5631 | extract_fmt_cmpobl_reg: |
c906108c | 5632 | { |
7a292a7a | 5633 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5634 | CGEN_INSN_INT insn = base_insn; |
5635 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_reg.f | |
5636 | EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ | |
5637 | ||
5638 | EXTRACT_IFMT_CMPOBE_REG_CODE | |
5639 | ||
5640 | /* Record the fields for the semantic handler. */ | |
5641 | FLD (i_br_disp) = f_br_disp; | |
5642 | FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; | |
5643 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
5644 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
5645 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobl_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); | |
5646 | ||
5647 | #if WITH_PROFILE_MODEL_P | |
5648 | /* Record the fields for profiling. */ | |
5649 | if (PROFILE_MODEL_P (current_cpu)) | |
5650 | { | |
5651 | FLD (in_br_src1) = f_br_src1; | |
5652 | FLD (in_br_src2) = f_br_src2; | |
5653 | } | |
5654 | #endif | |
5655 | #undef FLD | |
7a292a7a | 5656 | return idesc; |
c906108c SS |
5657 | } |
5658 | ||
7a292a7a | 5659 | extract_fmt_cmpobl_lit: |
c906108c | 5660 | { |
7a292a7a | 5661 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5662 | CGEN_INSN_INT insn = base_insn; |
5663 | #define FLD(f) abuf->fields.cti.fields.fmt_cmpobl_lit.f | |
5664 | EXTRACT_IFMT_CMPOBE_LIT_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ | |
5665 | ||
5666 | EXTRACT_IFMT_CMPOBE_LIT_CODE | |
5667 | ||
5668 | /* Record the fields for the semantic handler. */ | |
5669 | FLD (f_br_src1) = f_br_src1; | |
5670 | FLD (i_br_disp) = f_br_disp; | |
5671 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
5672 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
5673 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpobl_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); | |
5674 | ||
5675 | #if WITH_PROFILE_MODEL_P | |
5676 | /* Record the fields for profiling. */ | |
5677 | if (PROFILE_MODEL_P (current_cpu)) | |
5678 | { | |
5679 | FLD (in_br_src2) = f_br_src2; | |
5680 | } | |
5681 | #endif | |
5682 | #undef FLD | |
7a292a7a | 5683 | return idesc; |
c906108c SS |
5684 | } |
5685 | ||
7a292a7a | 5686 | extract_fmt_bbc_reg: |
c906108c | 5687 | { |
7a292a7a | 5688 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5689 | CGEN_INSN_INT insn = base_insn; |
5690 | #define FLD(f) abuf->fields.cti.fields.fmt_bbc_reg.f | |
5691 | EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ | |
5692 | ||
5693 | EXTRACT_IFMT_CMPOBE_REG_CODE | |
5694 | ||
5695 | /* Record the fields for the semantic handler. */ | |
5696 | FLD (i_br_disp) = f_br_disp; | |
5697 | FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; | |
5698 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
5699 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
5700 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bbc_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); | |
5701 | ||
5702 | #if WITH_PROFILE_MODEL_P | |
5703 | /* Record the fields for profiling. */ | |
5704 | if (PROFILE_MODEL_P (current_cpu)) | |
5705 | { | |
5706 | FLD (in_br_src1) = f_br_src1; | |
5707 | FLD (in_br_src2) = f_br_src2; | |
5708 | } | |
5709 | #endif | |
5710 | #undef FLD | |
7a292a7a | 5711 | return idesc; |
c906108c SS |
5712 | } |
5713 | ||
7a292a7a | 5714 | extract_fmt_bbc_lit: |
c906108c | 5715 | { |
7a292a7a | 5716 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5717 | CGEN_INSN_INT insn = base_insn; |
5718 | #define FLD(f) abuf->fields.cti.fields.fmt_bbc_lit.f | |
5719 | EXTRACT_IFMT_CMPOBE_LIT_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ | |
5720 | ||
5721 | EXTRACT_IFMT_CMPOBE_LIT_CODE | |
5722 | ||
5723 | /* Record the fields for the semantic handler. */ | |
5724 | FLD (f_br_src1) = f_br_src1; | |
5725 | FLD (i_br_disp) = f_br_disp; | |
5726 | FLD (i_br_src2) = & CPU (h_gr)[f_br_src2]; | |
5727 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
5728 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bbc_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0)); | |
5729 | ||
5730 | #if WITH_PROFILE_MODEL_P | |
5731 | /* Record the fields for profiling. */ | |
5732 | if (PROFILE_MODEL_P (current_cpu)) | |
5733 | { | |
5734 | FLD (in_br_src2) = f_br_src2; | |
5735 | } | |
5736 | #endif | |
5737 | #undef FLD | |
7a292a7a | 5738 | return idesc; |
c906108c SS |
5739 | } |
5740 | ||
7a292a7a | 5741 | extract_fmt_cmpi: |
c906108c | 5742 | { |
7a292a7a | 5743 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5744 | CGEN_INSN_INT insn = base_insn; |
5745 | #define FLD(f) abuf->fields.fmt_cmpi.f | |
5746 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
5747 | ||
5748 | EXTRACT_IFMT_MULO_CODE | |
5749 | ||
5750 | /* Record the fields for the semantic handler. */ | |
5751 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
5752 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
5753 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); | |
5754 | ||
5755 | #if WITH_PROFILE_MODEL_P | |
5756 | /* Record the fields for profiling. */ | |
5757 | if (PROFILE_MODEL_P (current_cpu)) | |
5758 | { | |
5759 | FLD (in_src1) = f_src1; | |
5760 | FLD (in_src2) = f_src2; | |
5761 | } | |
5762 | #endif | |
5763 | #undef FLD | |
7a292a7a | 5764 | return idesc; |
c906108c SS |
5765 | } |
5766 | ||
7a292a7a | 5767 | extract_fmt_cmpi1: |
c906108c | 5768 | { |
7a292a7a | 5769 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5770 | CGEN_INSN_INT insn = base_insn; |
5771 | #define FLD(f) abuf->fields.fmt_cmpi1.f | |
5772 | EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
5773 | ||
5774 | EXTRACT_IFMT_MULO1_CODE | |
5775 | ||
5776 | /* Record the fields for the semantic handler. */ | |
5777 | FLD (f_src1) = f_src1; | |
5778 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
5779 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); | |
5780 | ||
5781 | #if WITH_PROFILE_MODEL_P | |
5782 | /* Record the fields for profiling. */ | |
5783 | if (PROFILE_MODEL_P (current_cpu)) | |
5784 | { | |
5785 | FLD (in_src2) = f_src2; | |
5786 | } | |
5787 | #endif | |
5788 | #undef FLD | |
7a292a7a | 5789 | return idesc; |
c906108c SS |
5790 | } |
5791 | ||
7a292a7a | 5792 | extract_fmt_cmpi2: |
c906108c | 5793 | { |
7a292a7a | 5794 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5795 | CGEN_INSN_INT insn = base_insn; |
5796 | #define FLD(f) abuf->fields.fmt_cmpi2.f | |
5797 | EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
5798 | ||
5799 | EXTRACT_IFMT_MULO2_CODE | |
5800 | ||
5801 | /* Record the fields for the semantic handler. */ | |
5802 | FLD (f_src2) = f_src2; | |
5803 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
5804 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0)); | |
5805 | ||
5806 | #if WITH_PROFILE_MODEL_P | |
5807 | /* Record the fields for profiling. */ | |
5808 | if (PROFILE_MODEL_P (current_cpu)) | |
5809 | { | |
5810 | FLD (in_src1) = f_src1; | |
5811 | } | |
5812 | #endif | |
5813 | #undef FLD | |
7a292a7a | 5814 | return idesc; |
c906108c SS |
5815 | } |
5816 | ||
7a292a7a | 5817 | extract_fmt_cmpi3: |
c906108c | 5818 | { |
7a292a7a | 5819 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5820 | CGEN_INSN_INT insn = base_insn; |
5821 | #define FLD(f) abuf->fields.fmt_cmpi3.f | |
5822 | EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
5823 | ||
5824 | EXTRACT_IFMT_MULO3_CODE | |
5825 | ||
5826 | /* Record the fields for the semantic handler. */ | |
5827 | FLD (f_src1) = f_src1; | |
5828 | FLD (f_src2) = f_src2; | |
5829 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0)); | |
5830 | ||
5831 | #if WITH_PROFILE_MODEL_P | |
5832 | /* Record the fields for profiling. */ | |
5833 | if (PROFILE_MODEL_P (current_cpu)) | |
5834 | { | |
5835 | } | |
5836 | #endif | |
5837 | #undef FLD | |
7a292a7a | 5838 | return idesc; |
c906108c SS |
5839 | } |
5840 | ||
7a292a7a | 5841 | extract_fmt_cmpo: |
c906108c | 5842 | { |
7a292a7a | 5843 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5844 | CGEN_INSN_INT insn = base_insn; |
5845 | #define FLD(f) abuf->fields.fmt_cmpo.f | |
5846 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
5847 | ||
5848 | EXTRACT_IFMT_MULO_CODE | |
5849 | ||
5850 | /* Record the fields for the semantic handler. */ | |
5851 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
5852 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
5853 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); | |
5854 | ||
5855 | #if WITH_PROFILE_MODEL_P | |
5856 | /* Record the fields for profiling. */ | |
5857 | if (PROFILE_MODEL_P (current_cpu)) | |
5858 | { | |
5859 | FLD (in_src1) = f_src1; | |
5860 | FLD (in_src2) = f_src2; | |
5861 | } | |
5862 | #endif | |
5863 | #undef FLD | |
7a292a7a | 5864 | return idesc; |
c906108c SS |
5865 | } |
5866 | ||
7a292a7a | 5867 | extract_fmt_cmpo1: |
c906108c | 5868 | { |
7a292a7a | 5869 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5870 | CGEN_INSN_INT insn = base_insn; |
5871 | #define FLD(f) abuf->fields.fmt_cmpo1.f | |
5872 | EXTRACT_IFMT_MULO1_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
5873 | ||
5874 | EXTRACT_IFMT_MULO1_CODE | |
5875 | ||
5876 | /* Record the fields for the semantic handler. */ | |
5877 | FLD (f_src1) = f_src1; | |
5878 | FLD (i_src2) = & CPU (h_gr)[f_src2]; | |
5879 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0)); | |
5880 | ||
5881 | #if WITH_PROFILE_MODEL_P | |
5882 | /* Record the fields for profiling. */ | |
5883 | if (PROFILE_MODEL_P (current_cpu)) | |
5884 | { | |
5885 | FLD (in_src2) = f_src2; | |
5886 | } | |
5887 | #endif | |
5888 | #undef FLD | |
7a292a7a | 5889 | return idesc; |
c906108c SS |
5890 | } |
5891 | ||
7a292a7a | 5892 | extract_fmt_cmpo2: |
c906108c | 5893 | { |
7a292a7a | 5894 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5895 | CGEN_INSN_INT insn = base_insn; |
5896 | #define FLD(f) abuf->fields.fmt_cmpo2.f | |
5897 | EXTRACT_IFMT_MULO2_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
5898 | ||
5899 | EXTRACT_IFMT_MULO2_CODE | |
5900 | ||
5901 | /* Record the fields for the semantic handler. */ | |
5902 | FLD (f_src2) = f_src2; | |
5903 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
5904 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0)); | |
5905 | ||
5906 | #if WITH_PROFILE_MODEL_P | |
5907 | /* Record the fields for profiling. */ | |
5908 | if (PROFILE_MODEL_P (current_cpu)) | |
5909 | { | |
5910 | FLD (in_src1) = f_src1; | |
5911 | } | |
5912 | #endif | |
5913 | #undef FLD | |
7a292a7a | 5914 | return idesc; |
c906108c SS |
5915 | } |
5916 | ||
7a292a7a | 5917 | extract_fmt_cmpo3: |
c906108c | 5918 | { |
7a292a7a | 5919 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5920 | CGEN_INSN_INT insn = base_insn; |
5921 | #define FLD(f) abuf->fields.fmt_cmpo3.f | |
5922 | EXTRACT_IFMT_MULO3_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
5923 | ||
5924 | EXTRACT_IFMT_MULO3_CODE | |
5925 | ||
5926 | /* Record the fields for the semantic handler. */ | |
5927 | FLD (f_src1) = f_src1; | |
5928 | FLD (f_src2) = f_src2; | |
5929 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0)); | |
5930 | ||
5931 | #if WITH_PROFILE_MODEL_P | |
5932 | /* Record the fields for profiling. */ | |
5933 | if (PROFILE_MODEL_P (current_cpu)) | |
5934 | { | |
5935 | } | |
5936 | #endif | |
5937 | #undef FLD | |
7a292a7a | 5938 | return idesc; |
c906108c SS |
5939 | } |
5940 | ||
7a292a7a | 5941 | extract_fmt_testno_reg: |
c906108c | 5942 | { |
7a292a7a | 5943 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5944 | CGEN_INSN_INT insn = base_insn; |
5945 | #define FLD(f) abuf->fields.fmt_testno_reg.f | |
5946 | EXTRACT_IFMT_CMPOBE_REG_VARS /* f-opcode f-br-src1 f-br-src2 f-br-m1 f-br-disp f-br-zero */ | |
5947 | ||
5948 | EXTRACT_IFMT_CMPOBE_REG_CODE | |
5949 | ||
5950 | /* Record the fields for the semantic handler. */ | |
5951 | FLD (i_br_src1) = & CPU (h_gr)[f_br_src1]; | |
5952 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_testno_reg", "br_src1 0x%x", 'x', f_br_src1, (char *) 0)); | |
5953 | ||
5954 | #if WITH_PROFILE_MODEL_P | |
5955 | /* Record the fields for profiling. */ | |
5956 | if (PROFILE_MODEL_P (current_cpu)) | |
5957 | { | |
5958 | FLD (out_br_src1) = f_br_src1; | |
5959 | } | |
5960 | #endif | |
5961 | #undef FLD | |
7a292a7a | 5962 | return idesc; |
c906108c SS |
5963 | } |
5964 | ||
7a292a7a | 5965 | extract_fmt_bno: |
c906108c | 5966 | { |
7a292a7a | 5967 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5968 | CGEN_INSN_INT insn = base_insn; |
5969 | #define FLD(f) abuf->fields.cti.fields.fmt_bno.f | |
5970 | EXTRACT_IFMT_BNO_VARS /* f-opcode f-ctrl-disp f-ctrl-zero */ | |
5971 | ||
5972 | EXTRACT_IFMT_BNO_CODE | |
5973 | ||
5974 | /* Record the fields for the semantic handler. */ | |
5975 | FLD (i_ctrl_disp) = f_ctrl_disp; | |
5976 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
5977 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bno", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0)); | |
5978 | ||
5979 | #if WITH_PROFILE_MODEL_P | |
5980 | /* Record the fields for profiling. */ | |
5981 | if (PROFILE_MODEL_P (current_cpu)) | |
5982 | { | |
5983 | } | |
5984 | #endif | |
5985 | #undef FLD | |
7a292a7a | 5986 | return idesc; |
c906108c SS |
5987 | } |
5988 | ||
7a292a7a | 5989 | extract_fmt_b: |
c906108c | 5990 | { |
7a292a7a | 5991 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
5992 | CGEN_INSN_INT insn = base_insn; |
5993 | #define FLD(f) abuf->fields.cti.fields.fmt_b.f | |
5994 | EXTRACT_IFMT_BNO_VARS /* f-opcode f-ctrl-disp f-ctrl-zero */ | |
5995 | ||
5996 | EXTRACT_IFMT_BNO_CODE | |
5997 | ||
5998 | /* Record the fields for the semantic handler. */ | |
5999 | FLD (i_ctrl_disp) = f_ctrl_disp; | |
6000 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6001 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_b", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0)); | |
6002 | ||
6003 | #if WITH_PROFILE_MODEL_P | |
6004 | /* Record the fields for profiling. */ | |
6005 | if (PROFILE_MODEL_P (current_cpu)) | |
6006 | { | |
6007 | } | |
6008 | #endif | |
6009 | #undef FLD | |
7a292a7a | 6010 | return idesc; |
c906108c SS |
6011 | } |
6012 | ||
7a292a7a | 6013 | extract_fmt_bx_indirect_offset: |
c906108c | 6014 | { |
7a292a7a | 6015 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6016 | CGEN_INSN_INT insn = base_insn; |
6017 | #define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_offset.f | |
6018 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
6019 | ||
6020 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
6021 | ||
6022 | /* Record the fields for the semantic handler. */ | |
6023 | FLD (f_offset) = f_offset; | |
6024 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
6025 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6026 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0)); | |
6027 | ||
6028 | #if WITH_PROFILE_MODEL_P | |
6029 | /* Record the fields for profiling. */ | |
6030 | if (PROFILE_MODEL_P (current_cpu)) | |
6031 | { | |
6032 | FLD (in_abase) = f_abase; | |
6033 | } | |
6034 | #endif | |
6035 | #undef FLD | |
7a292a7a | 6036 | return idesc; |
c906108c SS |
6037 | } |
6038 | ||
7a292a7a | 6039 | extract_fmt_bx_indirect: |
c906108c | 6040 | { |
7a292a7a | 6041 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6042 | CGEN_INSN_INT insn = base_insn; |
6043 | #define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect.f | |
6044 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
6045 | ||
6046 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
6047 | ||
6048 | /* Record the fields for the semantic handler. */ | |
6049 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
6050 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6051 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0)); | |
6052 | ||
6053 | #if WITH_PROFILE_MODEL_P | |
6054 | /* Record the fields for profiling. */ | |
6055 | if (PROFILE_MODEL_P (current_cpu)) | |
6056 | { | |
6057 | FLD (in_abase) = f_abase; | |
6058 | } | |
6059 | #endif | |
6060 | #undef FLD | |
7a292a7a | 6061 | return idesc; |
c906108c SS |
6062 | } |
6063 | ||
7a292a7a | 6064 | extract_fmt_bx_indirect_index: |
c906108c | 6065 | { |
7a292a7a | 6066 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6067 | CGEN_INSN_INT insn = base_insn; |
6068 | #define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_index.f | |
6069 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
6070 | ||
6071 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
6072 | ||
6073 | /* Record the fields for the semantic handler. */ | |
6074 | FLD (f_scale) = f_scale; | |
6075 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
6076 | FLD (i_index) = & CPU (h_gr)[f_index]; | |
6077 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6078 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, (char *) 0)); | |
6079 | ||
6080 | #if WITH_PROFILE_MODEL_P | |
6081 | /* Record the fields for profiling. */ | |
6082 | if (PROFILE_MODEL_P (current_cpu)) | |
6083 | { | |
6084 | FLD (in_abase) = f_abase; | |
6085 | FLD (in_index) = f_index; | |
6086 | } | |
6087 | #endif | |
6088 | #undef FLD | |
7a292a7a | 6089 | return idesc; |
c906108c SS |
6090 | } |
6091 | ||
7a292a7a | 6092 | extract_fmt_bx_disp: |
c906108c | 6093 | { |
7a292a7a | 6094 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6095 | CGEN_INSN_INT insn = base_insn; |
6096 | #define FLD(f) abuf->fields.cti.fields.fmt_bx_disp.f | |
6097 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
6098 | ||
6099 | EXTRACT_IFMT_LDA_DISP_CODE | |
6100 | ||
6101 | /* Record the fields for the semantic handler. */ | |
6102 | FLD (f_optdisp) = f_optdisp; | |
6103 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6104 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0)); | |
6105 | ||
6106 | #if WITH_PROFILE_MODEL_P | |
6107 | /* Record the fields for profiling. */ | |
6108 | if (PROFILE_MODEL_P (current_cpu)) | |
6109 | { | |
6110 | } | |
6111 | #endif | |
6112 | #undef FLD | |
7a292a7a | 6113 | return idesc; |
c906108c SS |
6114 | } |
6115 | ||
7a292a7a | 6116 | extract_fmt_bx_indirect_disp: |
c906108c | 6117 | { |
7a292a7a | 6118 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6119 | CGEN_INSN_INT insn = base_insn; |
6120 | #define FLD(f) abuf->fields.cti.fields.fmt_bx_indirect_disp.f | |
6121 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
6122 | ||
6123 | EXTRACT_IFMT_LDA_DISP_CODE | |
6124 | ||
6125 | /* Record the fields for the semantic handler. */ | |
6126 | FLD (f_optdisp) = f_optdisp; | |
6127 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
6128 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6129 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bx_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, (char *) 0)); | |
6130 | ||
6131 | #if WITH_PROFILE_MODEL_P | |
6132 | /* Record the fields for profiling. */ | |
6133 | if (PROFILE_MODEL_P (current_cpu)) | |
6134 | { | |
6135 | FLD (in_abase) = f_abase; | |
6136 | } | |
6137 | #endif | |
6138 | #undef FLD | |
7a292a7a | 6139 | return idesc; |
c906108c SS |
6140 | } |
6141 | ||
7a292a7a | 6142 | extract_fmt_callx_disp: |
c906108c | 6143 | { |
7a292a7a | 6144 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6145 | CGEN_INSN_INT insn = base_insn; |
6146 | #define FLD(f) abuf->fields.cti.fields.fmt_callx_disp.f | |
6147 | EXTRACT_IFMT_LDA_DISP_VARS /* f-opcode f-optdisp f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
6148 | ||
6149 | EXTRACT_IFMT_LDA_DISP_CODE | |
6150 | ||
6151 | /* Record the fields for the semantic handler. */ | |
6152 | FLD (f_optdisp) = f_optdisp; | |
6153 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6154 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0)); | |
6155 | ||
6156 | #if WITH_PROFILE_MODEL_P | |
6157 | /* Record the fields for profiling. */ | |
6158 | if (PROFILE_MODEL_P (current_cpu)) | |
6159 | { | |
6160 | FLD (in_h_gr_0) = 0; | |
6161 | FLD (in_h_gr_1) = 1; | |
6162 | FLD (in_h_gr_10) = 10; | |
6163 | FLD (in_h_gr_11) = 11; | |
6164 | FLD (in_h_gr_12) = 12; | |
6165 | FLD (in_h_gr_13) = 13; | |
6166 | FLD (in_h_gr_14) = 14; | |
6167 | FLD (in_h_gr_15) = 15; | |
6168 | FLD (in_h_gr_2) = 2; | |
6169 | FLD (in_h_gr_3) = 3; | |
6170 | FLD (in_h_gr_31) = 31; | |
6171 | FLD (in_h_gr_4) = 4; | |
6172 | FLD (in_h_gr_5) = 5; | |
6173 | FLD (in_h_gr_6) = 6; | |
6174 | FLD (in_h_gr_7) = 7; | |
6175 | FLD (in_h_gr_8) = 8; | |
6176 | FLD (in_h_gr_9) = 9; | |
6177 | FLD (out_h_gr_0) = 0; | |
6178 | FLD (out_h_gr_1) = 1; | |
6179 | FLD (out_h_gr_10) = 10; | |
6180 | FLD (out_h_gr_11) = 11; | |
6181 | FLD (out_h_gr_12) = 12; | |
6182 | FLD (out_h_gr_13) = 13; | |
6183 | FLD (out_h_gr_14) = 14; | |
6184 | FLD (out_h_gr_15) = 15; | |
6185 | FLD (out_h_gr_2) = 2; | |
6186 | FLD (out_h_gr_3) = 3; | |
6187 | FLD (out_h_gr_31) = 31; | |
6188 | FLD (out_h_gr_4) = 4; | |
6189 | FLD (out_h_gr_5) = 5; | |
6190 | FLD (out_h_gr_6) = 6; | |
6191 | FLD (out_h_gr_7) = 7; | |
6192 | FLD (out_h_gr_8) = 8; | |
6193 | FLD (out_h_gr_9) = 9; | |
6194 | } | |
6195 | #endif | |
6196 | #undef FLD | |
7a292a7a | 6197 | return idesc; |
c906108c SS |
6198 | } |
6199 | ||
7a292a7a | 6200 | extract_fmt_callx_indirect: |
c906108c | 6201 | { |
7a292a7a | 6202 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6203 | CGEN_INSN_INT insn = base_insn; |
6204 | #define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect.f | |
6205 | EXTRACT_IFMT_LDA_INDIRECT_VARS /* f-opcode f-srcdst f-abase f-modeb f-scale f-zerob f-index */ | |
6206 | ||
6207 | EXTRACT_IFMT_LDA_INDIRECT_CODE | |
6208 | ||
6209 | /* Record the fields for the semantic handler. */ | |
6210 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
6211 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6212 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0)); | |
6213 | ||
6214 | #if WITH_PROFILE_MODEL_P | |
6215 | /* Record the fields for profiling. */ | |
6216 | if (PROFILE_MODEL_P (current_cpu)) | |
6217 | { | |
6218 | FLD (in_abase) = f_abase; | |
6219 | FLD (in_h_gr_0) = 0; | |
6220 | FLD (in_h_gr_1) = 1; | |
6221 | FLD (in_h_gr_10) = 10; | |
6222 | FLD (in_h_gr_11) = 11; | |
6223 | FLD (in_h_gr_12) = 12; | |
6224 | FLD (in_h_gr_13) = 13; | |
6225 | FLD (in_h_gr_14) = 14; | |
6226 | FLD (in_h_gr_15) = 15; | |
6227 | FLD (in_h_gr_2) = 2; | |
6228 | FLD (in_h_gr_3) = 3; | |
6229 | FLD (in_h_gr_31) = 31; | |
6230 | FLD (in_h_gr_4) = 4; | |
6231 | FLD (in_h_gr_5) = 5; | |
6232 | FLD (in_h_gr_6) = 6; | |
6233 | FLD (in_h_gr_7) = 7; | |
6234 | FLD (in_h_gr_8) = 8; | |
6235 | FLD (in_h_gr_9) = 9; | |
6236 | FLD (out_h_gr_0) = 0; | |
6237 | FLD (out_h_gr_1) = 1; | |
6238 | FLD (out_h_gr_10) = 10; | |
6239 | FLD (out_h_gr_11) = 11; | |
6240 | FLD (out_h_gr_12) = 12; | |
6241 | FLD (out_h_gr_13) = 13; | |
6242 | FLD (out_h_gr_14) = 14; | |
6243 | FLD (out_h_gr_15) = 15; | |
6244 | FLD (out_h_gr_2) = 2; | |
6245 | FLD (out_h_gr_3) = 3; | |
6246 | FLD (out_h_gr_31) = 31; | |
6247 | FLD (out_h_gr_4) = 4; | |
6248 | FLD (out_h_gr_5) = 5; | |
6249 | FLD (out_h_gr_6) = 6; | |
6250 | FLD (out_h_gr_7) = 7; | |
6251 | FLD (out_h_gr_8) = 8; | |
6252 | FLD (out_h_gr_9) = 9; | |
6253 | } | |
6254 | #endif | |
6255 | #undef FLD | |
7a292a7a | 6256 | return idesc; |
c906108c SS |
6257 | } |
6258 | ||
7a292a7a | 6259 | extract_fmt_callx_indirect_offset: |
c906108c | 6260 | { |
7a292a7a | 6261 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6262 | CGEN_INSN_INT insn = base_insn; |
6263 | #define FLD(f) abuf->fields.cti.fields.fmt_callx_indirect_offset.f | |
6264 | EXTRACT_IFMT_LDA_OFFSET_VARS /* f-opcode f-srcdst f-abase f-modea f-zeroa f-offset */ | |
6265 | ||
6266 | EXTRACT_IFMT_LDA_OFFSET_CODE | |
6267 | ||
6268 | /* Record the fields for the semantic handler. */ | |
6269 | FLD (f_offset) = f_offset; | |
6270 | FLD (i_abase) = & CPU (h_gr)[f_abase]; | |
6271 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6272 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0)); | |
6273 | ||
6274 | #if WITH_PROFILE_MODEL_P | |
6275 | /* Record the fields for profiling. */ | |
6276 | if (PROFILE_MODEL_P (current_cpu)) | |
6277 | { | |
6278 | FLD (in_abase) = f_abase; | |
6279 | FLD (in_h_gr_0) = 0; | |
6280 | FLD (in_h_gr_1) = 1; | |
6281 | FLD (in_h_gr_10) = 10; | |
6282 | FLD (in_h_gr_11) = 11; | |
6283 | FLD (in_h_gr_12) = 12; | |
6284 | FLD (in_h_gr_13) = 13; | |
6285 | FLD (in_h_gr_14) = 14; | |
6286 | FLD (in_h_gr_15) = 15; | |
6287 | FLD (in_h_gr_2) = 2; | |
6288 | FLD (in_h_gr_3) = 3; | |
6289 | FLD (in_h_gr_31) = 31; | |
6290 | FLD (in_h_gr_4) = 4; | |
6291 | FLD (in_h_gr_5) = 5; | |
6292 | FLD (in_h_gr_6) = 6; | |
6293 | FLD (in_h_gr_7) = 7; | |
6294 | FLD (in_h_gr_8) = 8; | |
6295 | FLD (in_h_gr_9) = 9; | |
6296 | FLD (out_h_gr_0) = 0; | |
6297 | FLD (out_h_gr_1) = 1; | |
6298 | FLD (out_h_gr_10) = 10; | |
6299 | FLD (out_h_gr_11) = 11; | |
6300 | FLD (out_h_gr_12) = 12; | |
6301 | FLD (out_h_gr_13) = 13; | |
6302 | FLD (out_h_gr_14) = 14; | |
6303 | FLD (out_h_gr_15) = 15; | |
6304 | FLD (out_h_gr_2) = 2; | |
6305 | FLD (out_h_gr_3) = 3; | |
6306 | FLD (out_h_gr_31) = 31; | |
6307 | FLD (out_h_gr_4) = 4; | |
6308 | FLD (out_h_gr_5) = 5; | |
6309 | FLD (out_h_gr_6) = 6; | |
6310 | FLD (out_h_gr_7) = 7; | |
6311 | FLD (out_h_gr_8) = 8; | |
6312 | FLD (out_h_gr_9) = 9; | |
6313 | } | |
6314 | #endif | |
6315 | #undef FLD | |
7a292a7a | 6316 | return idesc; |
c906108c SS |
6317 | } |
6318 | ||
7a292a7a | 6319 | extract_fmt_ret: |
c906108c | 6320 | { |
7a292a7a | 6321 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6322 | CGEN_INSN_INT insn = base_insn; |
6323 | #define FLD(f) abuf->fields.cti.fields.fmt_ret.f | |
6324 | EXTRACT_IFMT_BNO_VARS /* f-opcode f-ctrl-disp f-ctrl-zero */ | |
6325 | ||
6326 | EXTRACT_IFMT_BNO_CODE | |
6327 | ||
6328 | /* Record the fields for the semantic handler. */ | |
6329 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6330 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ret", (char *) 0)); | |
6331 | ||
6332 | #if WITH_PROFILE_MODEL_P | |
6333 | /* Record the fields for profiling. */ | |
6334 | if (PROFILE_MODEL_P (current_cpu)) | |
6335 | { | |
6336 | FLD (in_h_gr_0) = 0; | |
6337 | FLD (in_h_gr_2) = 2; | |
6338 | FLD (in_h_gr_31) = 31; | |
6339 | FLD (out_h_gr_0) = 0; | |
6340 | FLD (out_h_gr_1) = 1; | |
6341 | FLD (out_h_gr_10) = 10; | |
6342 | FLD (out_h_gr_11) = 11; | |
6343 | FLD (out_h_gr_12) = 12; | |
6344 | FLD (out_h_gr_13) = 13; | |
6345 | FLD (out_h_gr_14) = 14; | |
6346 | FLD (out_h_gr_15) = 15; | |
6347 | FLD (out_h_gr_2) = 2; | |
6348 | FLD (out_h_gr_3) = 3; | |
6349 | FLD (out_h_gr_31) = 31; | |
6350 | FLD (out_h_gr_4) = 4; | |
6351 | FLD (out_h_gr_5) = 5; | |
6352 | FLD (out_h_gr_6) = 6; | |
6353 | FLD (out_h_gr_7) = 7; | |
6354 | FLD (out_h_gr_8) = 8; | |
6355 | FLD (out_h_gr_9) = 9; | |
6356 | } | |
6357 | #endif | |
6358 | #undef FLD | |
7a292a7a | 6359 | return idesc; |
c906108c SS |
6360 | } |
6361 | ||
7a292a7a | 6362 | extract_fmt_calls: |
c906108c | 6363 | { |
7a292a7a | 6364 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6365 | CGEN_INSN_INT insn = base_insn; |
6366 | #define FLD(f) abuf->fields.cti.fields.fmt_calls.f | |
6367 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
6368 | ||
6369 | EXTRACT_IFMT_MULO_CODE | |
6370 | ||
6371 | /* Record the fields for the semantic handler. */ | |
6372 | FLD (i_src1) = & CPU (h_gr)[f_src1]; | |
6373 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6374 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_calls", "src1 0x%x", 'x', f_src1, (char *) 0)); | |
6375 | ||
6376 | #if WITH_PROFILE_MODEL_P | |
6377 | /* Record the fields for profiling. */ | |
6378 | if (PROFILE_MODEL_P (current_cpu)) | |
6379 | { | |
6380 | FLD (in_src1) = f_src1; | |
6381 | } | |
6382 | #endif | |
6383 | #undef FLD | |
7a292a7a | 6384 | return idesc; |
c906108c SS |
6385 | } |
6386 | ||
7a292a7a | 6387 | extract_fmt_fmark: |
c906108c | 6388 | { |
7a292a7a | 6389 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6390 | CGEN_INSN_INT insn = base_insn; |
6391 | #define FLD(f) abuf->fields.cti.fields.fmt_fmark.f | |
6392 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
6393 | ||
6394 | EXTRACT_IFMT_MULO_CODE | |
6395 | ||
6396 | /* Record the fields for the semantic handler. */ | |
6397 | SEM_BRANCH_INIT_EXTRACT (abuf); | |
6398 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_fmark", (char *) 0)); | |
6399 | ||
6400 | #if WITH_PROFILE_MODEL_P | |
6401 | /* Record the fields for profiling. */ | |
6402 | if (PROFILE_MODEL_P (current_cpu)) | |
6403 | { | |
6404 | } | |
6405 | #endif | |
6406 | #undef FLD | |
7a292a7a | 6407 | return idesc; |
c906108c SS |
6408 | } |
6409 | ||
7a292a7a | 6410 | extract_fmt_flushreg: |
c906108c | 6411 | { |
7a292a7a | 6412 | const IDESC *idesc = &i960base_insn_data[itype]; |
c906108c SS |
6413 | CGEN_INSN_INT insn = base_insn; |
6414 | #define FLD(f) abuf->fields.fmt_flushreg.f | |
6415 | EXTRACT_IFMT_MULO_VARS /* f-opcode f-srcdst f-src2 f-m3 f-m2 f-m1 f-opcode2 f-zero f-src1 */ | |
6416 | ||
6417 | EXTRACT_IFMT_MULO_CODE | |
6418 | ||
6419 | /* Record the fields for the semantic handler. */ | |
6420 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_flushreg", (char *) 0)); | |
6421 | ||
6422 | #undef FLD | |
7a292a7a | 6423 | return idesc; |
c906108c SS |
6424 | } |
6425 | ||
c906108c | 6426 | } |