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c906108c SS |
1 | /* Simulator instruction semantics for i960base. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
5 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. | |
6 | ||
7 | This file is part of the GNU Simulators. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #ifdef DEFINE_LABELS | |
26 | ||
27 | /* The labels have the case they have because the enum of insn types | |
28 | is all uppercase and in the non-stdc case the insn symbol is built | |
29 | into the enum name. */ | |
30 | ||
31 | static struct { | |
32 | int index; | |
33 | void *label; | |
34 | } labels[] = { | |
35 | { I960BASE_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, | |
36 | { I960BASE_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, | |
37 | { I960BASE_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, | |
38 | { I960BASE_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, | |
39 | { I960BASE_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, | |
40 | { I960BASE_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, | |
41 | { I960BASE_INSN_MULO, && case_sem_INSN_MULO }, | |
42 | { I960BASE_INSN_MULO1, && case_sem_INSN_MULO1 }, | |
43 | { I960BASE_INSN_MULO2, && case_sem_INSN_MULO2 }, | |
44 | { I960BASE_INSN_MULO3, && case_sem_INSN_MULO3 }, | |
45 | { I960BASE_INSN_REMO, && case_sem_INSN_REMO }, | |
46 | { I960BASE_INSN_REMO1, && case_sem_INSN_REMO1 }, | |
47 | { I960BASE_INSN_REMO2, && case_sem_INSN_REMO2 }, | |
48 | { I960BASE_INSN_REMO3, && case_sem_INSN_REMO3 }, | |
49 | { I960BASE_INSN_DIVO, && case_sem_INSN_DIVO }, | |
50 | { I960BASE_INSN_DIVO1, && case_sem_INSN_DIVO1 }, | |
51 | { I960BASE_INSN_DIVO2, && case_sem_INSN_DIVO2 }, | |
52 | { I960BASE_INSN_DIVO3, && case_sem_INSN_DIVO3 }, | |
53 | { I960BASE_INSN_REMI, && case_sem_INSN_REMI }, | |
54 | { I960BASE_INSN_REMI1, && case_sem_INSN_REMI1 }, | |
55 | { I960BASE_INSN_REMI2, && case_sem_INSN_REMI2 }, | |
56 | { I960BASE_INSN_REMI3, && case_sem_INSN_REMI3 }, | |
57 | { I960BASE_INSN_DIVI, && case_sem_INSN_DIVI }, | |
58 | { I960BASE_INSN_DIVI1, && case_sem_INSN_DIVI1 }, | |
59 | { I960BASE_INSN_DIVI2, && case_sem_INSN_DIVI2 }, | |
60 | { I960BASE_INSN_DIVI3, && case_sem_INSN_DIVI3 }, | |
61 | { I960BASE_INSN_ADDO, && case_sem_INSN_ADDO }, | |
62 | { I960BASE_INSN_ADDO1, && case_sem_INSN_ADDO1 }, | |
63 | { I960BASE_INSN_ADDO2, && case_sem_INSN_ADDO2 }, | |
64 | { I960BASE_INSN_ADDO3, && case_sem_INSN_ADDO3 }, | |
65 | { I960BASE_INSN_SUBO, && case_sem_INSN_SUBO }, | |
66 | { I960BASE_INSN_SUBO1, && case_sem_INSN_SUBO1 }, | |
67 | { I960BASE_INSN_SUBO2, && case_sem_INSN_SUBO2 }, | |
68 | { I960BASE_INSN_SUBO3, && case_sem_INSN_SUBO3 }, | |
69 | { I960BASE_INSN_NOTBIT, && case_sem_INSN_NOTBIT }, | |
70 | { I960BASE_INSN_NOTBIT1, && case_sem_INSN_NOTBIT1 }, | |
71 | { I960BASE_INSN_NOTBIT2, && case_sem_INSN_NOTBIT2 }, | |
72 | { I960BASE_INSN_NOTBIT3, && case_sem_INSN_NOTBIT3 }, | |
73 | { I960BASE_INSN_AND, && case_sem_INSN_AND }, | |
74 | { I960BASE_INSN_AND1, && case_sem_INSN_AND1 }, | |
75 | { I960BASE_INSN_AND2, && case_sem_INSN_AND2 }, | |
76 | { I960BASE_INSN_AND3, && case_sem_INSN_AND3 }, | |
77 | { I960BASE_INSN_ANDNOT, && case_sem_INSN_ANDNOT }, | |
78 | { I960BASE_INSN_ANDNOT1, && case_sem_INSN_ANDNOT1 }, | |
79 | { I960BASE_INSN_ANDNOT2, && case_sem_INSN_ANDNOT2 }, | |
80 | { I960BASE_INSN_ANDNOT3, && case_sem_INSN_ANDNOT3 }, | |
81 | { I960BASE_INSN_SETBIT, && case_sem_INSN_SETBIT }, | |
82 | { I960BASE_INSN_SETBIT1, && case_sem_INSN_SETBIT1 }, | |
83 | { I960BASE_INSN_SETBIT2, && case_sem_INSN_SETBIT2 }, | |
84 | { I960BASE_INSN_SETBIT3, && case_sem_INSN_SETBIT3 }, | |
85 | { I960BASE_INSN_NOTAND, && case_sem_INSN_NOTAND }, | |
86 | { I960BASE_INSN_NOTAND1, && case_sem_INSN_NOTAND1 }, | |
87 | { I960BASE_INSN_NOTAND2, && case_sem_INSN_NOTAND2 }, | |
88 | { I960BASE_INSN_NOTAND3, && case_sem_INSN_NOTAND3 }, | |
89 | { I960BASE_INSN_XOR, && case_sem_INSN_XOR }, | |
90 | { I960BASE_INSN_XOR1, && case_sem_INSN_XOR1 }, | |
91 | { I960BASE_INSN_XOR2, && case_sem_INSN_XOR2 }, | |
92 | { I960BASE_INSN_XOR3, && case_sem_INSN_XOR3 }, | |
93 | { I960BASE_INSN_OR, && case_sem_INSN_OR }, | |
94 | { I960BASE_INSN_OR1, && case_sem_INSN_OR1 }, | |
95 | { I960BASE_INSN_OR2, && case_sem_INSN_OR2 }, | |
96 | { I960BASE_INSN_OR3, && case_sem_INSN_OR3 }, | |
97 | { I960BASE_INSN_NOR, && case_sem_INSN_NOR }, | |
98 | { I960BASE_INSN_NOR1, && case_sem_INSN_NOR1 }, | |
99 | { I960BASE_INSN_NOR2, && case_sem_INSN_NOR2 }, | |
100 | { I960BASE_INSN_NOR3, && case_sem_INSN_NOR3 }, | |
7a292a7a SS |
101 | { I960BASE_INSN_XNOR, && case_sem_INSN_XNOR }, |
102 | { I960BASE_INSN_XNOR1, && case_sem_INSN_XNOR1 }, | |
103 | { I960BASE_INSN_XNOR2, && case_sem_INSN_XNOR2 }, | |
104 | { I960BASE_INSN_XNOR3, && case_sem_INSN_XNOR3 }, | |
c906108c SS |
105 | { I960BASE_INSN_NOT, && case_sem_INSN_NOT }, |
106 | { I960BASE_INSN_NOT1, && case_sem_INSN_NOT1 }, | |
107 | { I960BASE_INSN_NOT2, && case_sem_INSN_NOT2 }, | |
108 | { I960BASE_INSN_NOT3, && case_sem_INSN_NOT3 }, | |
7a292a7a SS |
109 | { I960BASE_INSN_ORNOT, && case_sem_INSN_ORNOT }, |
110 | { I960BASE_INSN_ORNOT1, && case_sem_INSN_ORNOT1 }, | |
111 | { I960BASE_INSN_ORNOT2, && case_sem_INSN_ORNOT2 }, | |
112 | { I960BASE_INSN_ORNOT3, && case_sem_INSN_ORNOT3 }, | |
c906108c SS |
113 | { I960BASE_INSN_CLRBIT, && case_sem_INSN_CLRBIT }, |
114 | { I960BASE_INSN_CLRBIT1, && case_sem_INSN_CLRBIT1 }, | |
115 | { I960BASE_INSN_CLRBIT2, && case_sem_INSN_CLRBIT2 }, | |
116 | { I960BASE_INSN_CLRBIT3, && case_sem_INSN_CLRBIT3 }, | |
117 | { I960BASE_INSN_SHLO, && case_sem_INSN_SHLO }, | |
118 | { I960BASE_INSN_SHLO1, && case_sem_INSN_SHLO1 }, | |
119 | { I960BASE_INSN_SHLO2, && case_sem_INSN_SHLO2 }, | |
120 | { I960BASE_INSN_SHLO3, && case_sem_INSN_SHLO3 }, | |
121 | { I960BASE_INSN_SHRO, && case_sem_INSN_SHRO }, | |
122 | { I960BASE_INSN_SHRO1, && case_sem_INSN_SHRO1 }, | |
123 | { I960BASE_INSN_SHRO2, && case_sem_INSN_SHRO2 }, | |
124 | { I960BASE_INSN_SHRO3, && case_sem_INSN_SHRO3 }, | |
125 | { I960BASE_INSN_SHLI, && case_sem_INSN_SHLI }, | |
126 | { I960BASE_INSN_SHLI1, && case_sem_INSN_SHLI1 }, | |
127 | { I960BASE_INSN_SHLI2, && case_sem_INSN_SHLI2 }, | |
128 | { I960BASE_INSN_SHLI3, && case_sem_INSN_SHLI3 }, | |
129 | { I960BASE_INSN_SHRI, && case_sem_INSN_SHRI }, | |
130 | { I960BASE_INSN_SHRI1, && case_sem_INSN_SHRI1 }, | |
131 | { I960BASE_INSN_SHRI2, && case_sem_INSN_SHRI2 }, | |
132 | { I960BASE_INSN_SHRI3, && case_sem_INSN_SHRI3 }, | |
133 | { I960BASE_INSN_EMUL, && case_sem_INSN_EMUL }, | |
134 | { I960BASE_INSN_EMUL1, && case_sem_INSN_EMUL1 }, | |
135 | { I960BASE_INSN_EMUL2, && case_sem_INSN_EMUL2 }, | |
136 | { I960BASE_INSN_EMUL3, && case_sem_INSN_EMUL3 }, | |
137 | { I960BASE_INSN_MOV, && case_sem_INSN_MOV }, | |
138 | { I960BASE_INSN_MOV1, && case_sem_INSN_MOV1 }, | |
139 | { I960BASE_INSN_MOVL, && case_sem_INSN_MOVL }, | |
140 | { I960BASE_INSN_MOVL1, && case_sem_INSN_MOVL1 }, | |
141 | { I960BASE_INSN_MOVT, && case_sem_INSN_MOVT }, | |
142 | { I960BASE_INSN_MOVT1, && case_sem_INSN_MOVT1 }, | |
143 | { I960BASE_INSN_MOVQ, && case_sem_INSN_MOVQ }, | |
144 | { I960BASE_INSN_MOVQ1, && case_sem_INSN_MOVQ1 }, | |
145 | { I960BASE_INSN_MODPC, && case_sem_INSN_MODPC }, | |
146 | { I960BASE_INSN_MODAC, && case_sem_INSN_MODAC }, | |
147 | { I960BASE_INSN_LDA_OFFSET, && case_sem_INSN_LDA_OFFSET }, | |
148 | { I960BASE_INSN_LDA_INDIRECT_OFFSET, && case_sem_INSN_LDA_INDIRECT_OFFSET }, | |
149 | { I960BASE_INSN_LDA_INDIRECT, && case_sem_INSN_LDA_INDIRECT }, | |
150 | { I960BASE_INSN_LDA_INDIRECT_INDEX, && case_sem_INSN_LDA_INDIRECT_INDEX }, | |
151 | { I960BASE_INSN_LDA_DISP, && case_sem_INSN_LDA_DISP }, | |
152 | { I960BASE_INSN_LDA_INDIRECT_DISP, && case_sem_INSN_LDA_INDIRECT_DISP }, | |
153 | { I960BASE_INSN_LDA_INDEX_DISP, && case_sem_INSN_LDA_INDEX_DISP }, | |
154 | { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, && case_sem_INSN_LDA_INDIRECT_INDEX_DISP }, | |
155 | { I960BASE_INSN_LD_OFFSET, && case_sem_INSN_LD_OFFSET }, | |
156 | { I960BASE_INSN_LD_INDIRECT_OFFSET, && case_sem_INSN_LD_INDIRECT_OFFSET }, | |
157 | { I960BASE_INSN_LD_INDIRECT, && case_sem_INSN_LD_INDIRECT }, | |
158 | { I960BASE_INSN_LD_INDIRECT_INDEX, && case_sem_INSN_LD_INDIRECT_INDEX }, | |
159 | { I960BASE_INSN_LD_DISP, && case_sem_INSN_LD_DISP }, | |
160 | { I960BASE_INSN_LD_INDIRECT_DISP, && case_sem_INSN_LD_INDIRECT_DISP }, | |
161 | { I960BASE_INSN_LD_INDEX_DISP, && case_sem_INSN_LD_INDEX_DISP }, | |
162 | { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, && case_sem_INSN_LD_INDIRECT_INDEX_DISP }, | |
163 | { I960BASE_INSN_LDOB_OFFSET, && case_sem_INSN_LDOB_OFFSET }, | |
164 | { I960BASE_INSN_LDOB_INDIRECT_OFFSET, && case_sem_INSN_LDOB_INDIRECT_OFFSET }, | |
165 | { I960BASE_INSN_LDOB_INDIRECT, && case_sem_INSN_LDOB_INDIRECT }, | |
166 | { I960BASE_INSN_LDOB_INDIRECT_INDEX, && case_sem_INSN_LDOB_INDIRECT_INDEX }, | |
167 | { I960BASE_INSN_LDOB_DISP, && case_sem_INSN_LDOB_DISP }, | |
168 | { I960BASE_INSN_LDOB_INDIRECT_DISP, && case_sem_INSN_LDOB_INDIRECT_DISP }, | |
169 | { I960BASE_INSN_LDOB_INDEX_DISP, && case_sem_INSN_LDOB_INDEX_DISP }, | |
170 | { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOB_INDIRECT_INDEX_DISP }, | |
171 | { I960BASE_INSN_LDOS_OFFSET, && case_sem_INSN_LDOS_OFFSET }, | |
172 | { I960BASE_INSN_LDOS_INDIRECT_OFFSET, && case_sem_INSN_LDOS_INDIRECT_OFFSET }, | |
173 | { I960BASE_INSN_LDOS_INDIRECT, && case_sem_INSN_LDOS_INDIRECT }, | |
174 | { I960BASE_INSN_LDOS_INDIRECT_INDEX, && case_sem_INSN_LDOS_INDIRECT_INDEX }, | |
175 | { I960BASE_INSN_LDOS_DISP, && case_sem_INSN_LDOS_DISP }, | |
176 | { I960BASE_INSN_LDOS_INDIRECT_DISP, && case_sem_INSN_LDOS_INDIRECT_DISP }, | |
177 | { I960BASE_INSN_LDOS_INDEX_DISP, && case_sem_INSN_LDOS_INDEX_DISP }, | |
178 | { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOS_INDIRECT_INDEX_DISP }, | |
179 | { I960BASE_INSN_LDIB_OFFSET, && case_sem_INSN_LDIB_OFFSET }, | |
180 | { I960BASE_INSN_LDIB_INDIRECT_OFFSET, && case_sem_INSN_LDIB_INDIRECT_OFFSET }, | |
181 | { I960BASE_INSN_LDIB_INDIRECT, && case_sem_INSN_LDIB_INDIRECT }, | |
182 | { I960BASE_INSN_LDIB_INDIRECT_INDEX, && case_sem_INSN_LDIB_INDIRECT_INDEX }, | |
183 | { I960BASE_INSN_LDIB_DISP, && case_sem_INSN_LDIB_DISP }, | |
184 | { I960BASE_INSN_LDIB_INDIRECT_DISP, && case_sem_INSN_LDIB_INDIRECT_DISP }, | |
185 | { I960BASE_INSN_LDIB_INDEX_DISP, && case_sem_INSN_LDIB_INDEX_DISP }, | |
186 | { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIB_INDIRECT_INDEX_DISP }, | |
187 | { I960BASE_INSN_LDIS_OFFSET, && case_sem_INSN_LDIS_OFFSET }, | |
188 | { I960BASE_INSN_LDIS_INDIRECT_OFFSET, && case_sem_INSN_LDIS_INDIRECT_OFFSET }, | |
189 | { I960BASE_INSN_LDIS_INDIRECT, && case_sem_INSN_LDIS_INDIRECT }, | |
190 | { I960BASE_INSN_LDIS_INDIRECT_INDEX, && case_sem_INSN_LDIS_INDIRECT_INDEX }, | |
191 | { I960BASE_INSN_LDIS_DISP, && case_sem_INSN_LDIS_DISP }, | |
192 | { I960BASE_INSN_LDIS_INDIRECT_DISP, && case_sem_INSN_LDIS_INDIRECT_DISP }, | |
193 | { I960BASE_INSN_LDIS_INDEX_DISP, && case_sem_INSN_LDIS_INDEX_DISP }, | |
194 | { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIS_INDIRECT_INDEX_DISP }, | |
195 | { I960BASE_INSN_LDL_OFFSET, && case_sem_INSN_LDL_OFFSET }, | |
196 | { I960BASE_INSN_LDL_INDIRECT_OFFSET, && case_sem_INSN_LDL_INDIRECT_OFFSET }, | |
197 | { I960BASE_INSN_LDL_INDIRECT, && case_sem_INSN_LDL_INDIRECT }, | |
198 | { I960BASE_INSN_LDL_INDIRECT_INDEX, && case_sem_INSN_LDL_INDIRECT_INDEX }, | |
199 | { I960BASE_INSN_LDL_DISP, && case_sem_INSN_LDL_DISP }, | |
200 | { I960BASE_INSN_LDL_INDIRECT_DISP, && case_sem_INSN_LDL_INDIRECT_DISP }, | |
201 | { I960BASE_INSN_LDL_INDEX_DISP, && case_sem_INSN_LDL_INDEX_DISP }, | |
202 | { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, && case_sem_INSN_LDL_INDIRECT_INDEX_DISP }, | |
203 | { I960BASE_INSN_LDT_OFFSET, && case_sem_INSN_LDT_OFFSET }, | |
204 | { I960BASE_INSN_LDT_INDIRECT_OFFSET, && case_sem_INSN_LDT_INDIRECT_OFFSET }, | |
205 | { I960BASE_INSN_LDT_INDIRECT, && case_sem_INSN_LDT_INDIRECT }, | |
206 | { I960BASE_INSN_LDT_INDIRECT_INDEX, && case_sem_INSN_LDT_INDIRECT_INDEX }, | |
207 | { I960BASE_INSN_LDT_DISP, && case_sem_INSN_LDT_DISP }, | |
208 | { I960BASE_INSN_LDT_INDIRECT_DISP, && case_sem_INSN_LDT_INDIRECT_DISP }, | |
209 | { I960BASE_INSN_LDT_INDEX_DISP, && case_sem_INSN_LDT_INDEX_DISP }, | |
210 | { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, && case_sem_INSN_LDT_INDIRECT_INDEX_DISP }, | |
211 | { I960BASE_INSN_LDQ_OFFSET, && case_sem_INSN_LDQ_OFFSET }, | |
212 | { I960BASE_INSN_LDQ_INDIRECT_OFFSET, && case_sem_INSN_LDQ_INDIRECT_OFFSET }, | |
213 | { I960BASE_INSN_LDQ_INDIRECT, && case_sem_INSN_LDQ_INDIRECT }, | |
214 | { I960BASE_INSN_LDQ_INDIRECT_INDEX, && case_sem_INSN_LDQ_INDIRECT_INDEX }, | |
215 | { I960BASE_INSN_LDQ_DISP, && case_sem_INSN_LDQ_DISP }, | |
216 | { I960BASE_INSN_LDQ_INDIRECT_DISP, && case_sem_INSN_LDQ_INDIRECT_DISP }, | |
217 | { I960BASE_INSN_LDQ_INDEX_DISP, && case_sem_INSN_LDQ_INDEX_DISP }, | |
218 | { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, && case_sem_INSN_LDQ_INDIRECT_INDEX_DISP }, | |
219 | { I960BASE_INSN_ST_OFFSET, && case_sem_INSN_ST_OFFSET }, | |
220 | { I960BASE_INSN_ST_INDIRECT_OFFSET, && case_sem_INSN_ST_INDIRECT_OFFSET }, | |
221 | { I960BASE_INSN_ST_INDIRECT, && case_sem_INSN_ST_INDIRECT }, | |
222 | { I960BASE_INSN_ST_INDIRECT_INDEX, && case_sem_INSN_ST_INDIRECT_INDEX }, | |
223 | { I960BASE_INSN_ST_DISP, && case_sem_INSN_ST_DISP }, | |
224 | { I960BASE_INSN_ST_INDIRECT_DISP, && case_sem_INSN_ST_INDIRECT_DISP }, | |
225 | { I960BASE_INSN_ST_INDEX_DISP, && case_sem_INSN_ST_INDEX_DISP }, | |
226 | { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, && case_sem_INSN_ST_INDIRECT_INDEX_DISP }, | |
227 | { I960BASE_INSN_STOB_OFFSET, && case_sem_INSN_STOB_OFFSET }, | |
228 | { I960BASE_INSN_STOB_INDIRECT_OFFSET, && case_sem_INSN_STOB_INDIRECT_OFFSET }, | |
229 | { I960BASE_INSN_STOB_INDIRECT, && case_sem_INSN_STOB_INDIRECT }, | |
230 | { I960BASE_INSN_STOB_INDIRECT_INDEX, && case_sem_INSN_STOB_INDIRECT_INDEX }, | |
231 | { I960BASE_INSN_STOB_DISP, && case_sem_INSN_STOB_DISP }, | |
232 | { I960BASE_INSN_STOB_INDIRECT_DISP, && case_sem_INSN_STOB_INDIRECT_DISP }, | |
233 | { I960BASE_INSN_STOB_INDEX_DISP, && case_sem_INSN_STOB_INDEX_DISP }, | |
234 | { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, && case_sem_INSN_STOB_INDIRECT_INDEX_DISP }, | |
235 | { I960BASE_INSN_STOS_OFFSET, && case_sem_INSN_STOS_OFFSET }, | |
236 | { I960BASE_INSN_STOS_INDIRECT_OFFSET, && case_sem_INSN_STOS_INDIRECT_OFFSET }, | |
237 | { I960BASE_INSN_STOS_INDIRECT, && case_sem_INSN_STOS_INDIRECT }, | |
238 | { I960BASE_INSN_STOS_INDIRECT_INDEX, && case_sem_INSN_STOS_INDIRECT_INDEX }, | |
239 | { I960BASE_INSN_STOS_DISP, && case_sem_INSN_STOS_DISP }, | |
240 | { I960BASE_INSN_STOS_INDIRECT_DISP, && case_sem_INSN_STOS_INDIRECT_DISP }, | |
241 | { I960BASE_INSN_STOS_INDEX_DISP, && case_sem_INSN_STOS_INDEX_DISP }, | |
242 | { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, && case_sem_INSN_STOS_INDIRECT_INDEX_DISP }, | |
243 | { I960BASE_INSN_STL_OFFSET, && case_sem_INSN_STL_OFFSET }, | |
244 | { I960BASE_INSN_STL_INDIRECT_OFFSET, && case_sem_INSN_STL_INDIRECT_OFFSET }, | |
245 | { I960BASE_INSN_STL_INDIRECT, && case_sem_INSN_STL_INDIRECT }, | |
246 | { I960BASE_INSN_STL_INDIRECT_INDEX, && case_sem_INSN_STL_INDIRECT_INDEX }, | |
247 | { I960BASE_INSN_STL_DISP, && case_sem_INSN_STL_DISP }, | |
248 | { I960BASE_INSN_STL_INDIRECT_DISP, && case_sem_INSN_STL_INDIRECT_DISP }, | |
249 | { I960BASE_INSN_STL_INDEX_DISP, && case_sem_INSN_STL_INDEX_DISP }, | |
250 | { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, && case_sem_INSN_STL_INDIRECT_INDEX_DISP }, | |
251 | { I960BASE_INSN_STT_OFFSET, && case_sem_INSN_STT_OFFSET }, | |
252 | { I960BASE_INSN_STT_INDIRECT_OFFSET, && case_sem_INSN_STT_INDIRECT_OFFSET }, | |
253 | { I960BASE_INSN_STT_INDIRECT, && case_sem_INSN_STT_INDIRECT }, | |
254 | { I960BASE_INSN_STT_INDIRECT_INDEX, && case_sem_INSN_STT_INDIRECT_INDEX }, | |
255 | { I960BASE_INSN_STT_DISP, && case_sem_INSN_STT_DISP }, | |
256 | { I960BASE_INSN_STT_INDIRECT_DISP, && case_sem_INSN_STT_INDIRECT_DISP }, | |
257 | { I960BASE_INSN_STT_INDEX_DISP, && case_sem_INSN_STT_INDEX_DISP }, | |
258 | { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, && case_sem_INSN_STT_INDIRECT_INDEX_DISP }, | |
259 | { I960BASE_INSN_STQ_OFFSET, && case_sem_INSN_STQ_OFFSET }, | |
260 | { I960BASE_INSN_STQ_INDIRECT_OFFSET, && case_sem_INSN_STQ_INDIRECT_OFFSET }, | |
261 | { I960BASE_INSN_STQ_INDIRECT, && case_sem_INSN_STQ_INDIRECT }, | |
262 | { I960BASE_INSN_STQ_INDIRECT_INDEX, && case_sem_INSN_STQ_INDIRECT_INDEX }, | |
263 | { I960BASE_INSN_STQ_DISP, && case_sem_INSN_STQ_DISP }, | |
264 | { I960BASE_INSN_STQ_INDIRECT_DISP, && case_sem_INSN_STQ_INDIRECT_DISP }, | |
265 | { I960BASE_INSN_STQ_INDEX_DISP, && case_sem_INSN_STQ_INDEX_DISP }, | |
266 | { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, && case_sem_INSN_STQ_INDIRECT_INDEX_DISP }, | |
267 | { I960BASE_INSN_CMPOBE_REG, && case_sem_INSN_CMPOBE_REG }, | |
268 | { I960BASE_INSN_CMPOBE_LIT, && case_sem_INSN_CMPOBE_LIT }, | |
269 | { I960BASE_INSN_CMPOBNE_REG, && case_sem_INSN_CMPOBNE_REG }, | |
270 | { I960BASE_INSN_CMPOBNE_LIT, && case_sem_INSN_CMPOBNE_LIT }, | |
271 | { I960BASE_INSN_CMPOBL_REG, && case_sem_INSN_CMPOBL_REG }, | |
272 | { I960BASE_INSN_CMPOBL_LIT, && case_sem_INSN_CMPOBL_LIT }, | |
273 | { I960BASE_INSN_CMPOBLE_REG, && case_sem_INSN_CMPOBLE_REG }, | |
274 | { I960BASE_INSN_CMPOBLE_LIT, && case_sem_INSN_CMPOBLE_LIT }, | |
275 | { I960BASE_INSN_CMPOBG_REG, && case_sem_INSN_CMPOBG_REG }, | |
276 | { I960BASE_INSN_CMPOBG_LIT, && case_sem_INSN_CMPOBG_LIT }, | |
277 | { I960BASE_INSN_CMPOBGE_REG, && case_sem_INSN_CMPOBGE_REG }, | |
278 | { I960BASE_INSN_CMPOBGE_LIT, && case_sem_INSN_CMPOBGE_LIT }, | |
279 | { I960BASE_INSN_CMPIBE_REG, && case_sem_INSN_CMPIBE_REG }, | |
280 | { I960BASE_INSN_CMPIBE_LIT, && case_sem_INSN_CMPIBE_LIT }, | |
281 | { I960BASE_INSN_CMPIBNE_REG, && case_sem_INSN_CMPIBNE_REG }, | |
282 | { I960BASE_INSN_CMPIBNE_LIT, && case_sem_INSN_CMPIBNE_LIT }, | |
283 | { I960BASE_INSN_CMPIBL_REG, && case_sem_INSN_CMPIBL_REG }, | |
284 | { I960BASE_INSN_CMPIBL_LIT, && case_sem_INSN_CMPIBL_LIT }, | |
285 | { I960BASE_INSN_CMPIBLE_REG, && case_sem_INSN_CMPIBLE_REG }, | |
286 | { I960BASE_INSN_CMPIBLE_LIT, && case_sem_INSN_CMPIBLE_LIT }, | |
287 | { I960BASE_INSN_CMPIBG_REG, && case_sem_INSN_CMPIBG_REG }, | |
288 | { I960BASE_INSN_CMPIBG_LIT, && case_sem_INSN_CMPIBG_LIT }, | |
289 | { I960BASE_INSN_CMPIBGE_REG, && case_sem_INSN_CMPIBGE_REG }, | |
290 | { I960BASE_INSN_CMPIBGE_LIT, && case_sem_INSN_CMPIBGE_LIT }, | |
291 | { I960BASE_INSN_BBC_REG, && case_sem_INSN_BBC_REG }, | |
292 | { I960BASE_INSN_BBC_LIT, && case_sem_INSN_BBC_LIT }, | |
293 | { I960BASE_INSN_BBS_REG, && case_sem_INSN_BBS_REG }, | |
294 | { I960BASE_INSN_BBS_LIT, && case_sem_INSN_BBS_LIT }, | |
295 | { I960BASE_INSN_CMPI, && case_sem_INSN_CMPI }, | |
296 | { I960BASE_INSN_CMPI1, && case_sem_INSN_CMPI1 }, | |
297 | { I960BASE_INSN_CMPI2, && case_sem_INSN_CMPI2 }, | |
298 | { I960BASE_INSN_CMPI3, && case_sem_INSN_CMPI3 }, | |
299 | { I960BASE_INSN_CMPO, && case_sem_INSN_CMPO }, | |
300 | { I960BASE_INSN_CMPO1, && case_sem_INSN_CMPO1 }, | |
301 | { I960BASE_INSN_CMPO2, && case_sem_INSN_CMPO2 }, | |
302 | { I960BASE_INSN_CMPO3, && case_sem_INSN_CMPO3 }, | |
303 | { I960BASE_INSN_TESTNO_REG, && case_sem_INSN_TESTNO_REG }, | |
304 | { I960BASE_INSN_TESTG_REG, && case_sem_INSN_TESTG_REG }, | |
305 | { I960BASE_INSN_TESTE_REG, && case_sem_INSN_TESTE_REG }, | |
306 | { I960BASE_INSN_TESTGE_REG, && case_sem_INSN_TESTGE_REG }, | |
307 | { I960BASE_INSN_TESTL_REG, && case_sem_INSN_TESTL_REG }, | |
308 | { I960BASE_INSN_TESTNE_REG, && case_sem_INSN_TESTNE_REG }, | |
309 | { I960BASE_INSN_TESTLE_REG, && case_sem_INSN_TESTLE_REG }, | |
310 | { I960BASE_INSN_TESTO_REG, && case_sem_INSN_TESTO_REG }, | |
311 | { I960BASE_INSN_BNO, && case_sem_INSN_BNO }, | |
312 | { I960BASE_INSN_BG, && case_sem_INSN_BG }, | |
313 | { I960BASE_INSN_BE, && case_sem_INSN_BE }, | |
314 | { I960BASE_INSN_BGE, && case_sem_INSN_BGE }, | |
315 | { I960BASE_INSN_BL, && case_sem_INSN_BL }, | |
316 | { I960BASE_INSN_BNE, && case_sem_INSN_BNE }, | |
317 | { I960BASE_INSN_BLE, && case_sem_INSN_BLE }, | |
318 | { I960BASE_INSN_BO, && case_sem_INSN_BO }, | |
319 | { I960BASE_INSN_B, && case_sem_INSN_B }, | |
320 | { I960BASE_INSN_BX_INDIRECT_OFFSET, && case_sem_INSN_BX_INDIRECT_OFFSET }, | |
321 | { I960BASE_INSN_BX_INDIRECT, && case_sem_INSN_BX_INDIRECT }, | |
322 | { I960BASE_INSN_BX_INDIRECT_INDEX, && case_sem_INSN_BX_INDIRECT_INDEX }, | |
323 | { I960BASE_INSN_BX_DISP, && case_sem_INSN_BX_DISP }, | |
324 | { I960BASE_INSN_BX_INDIRECT_DISP, && case_sem_INSN_BX_INDIRECT_DISP }, | |
325 | { I960BASE_INSN_CALLX_DISP, && case_sem_INSN_CALLX_DISP }, | |
326 | { I960BASE_INSN_CALLX_INDIRECT, && case_sem_INSN_CALLX_INDIRECT }, | |
327 | { I960BASE_INSN_CALLX_INDIRECT_OFFSET, && case_sem_INSN_CALLX_INDIRECT_OFFSET }, | |
328 | { I960BASE_INSN_RET, && case_sem_INSN_RET }, | |
329 | { I960BASE_INSN_CALLS, && case_sem_INSN_CALLS }, | |
330 | { I960BASE_INSN_FMARK, && case_sem_INSN_FMARK }, | |
331 | { I960BASE_INSN_FLUSHREG, && case_sem_INSN_FLUSHREG }, | |
332 | { 0, 0 } | |
333 | }; | |
334 | int i; | |
335 | ||
336 | for (i = 0; labels[i].label != 0; ++i) | |
96baa820 | 337 | { |
c906108c | 338 | #if FAST_P |
96baa820 | 339 | CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; |
c906108c | 340 | #else |
96baa820 | 341 | CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; |
c906108c | 342 | #endif |
96baa820 | 343 | } |
c906108c SS |
344 | |
345 | #undef DEFINE_LABELS | |
346 | #endif /* DEFINE_LABELS */ | |
347 | ||
348 | #ifdef DEFINE_SWITCH | |
349 | ||
350 | /* If hyper-fast [well not unnecessarily slow] execution is selected, turn | |
351 | off frills like tracing and profiling. */ | |
352 | /* FIXME: A better way would be to have TRACE_RESULT check for something | |
353 | that can cause it to be optimized out. Another way would be to emit | |
354 | special handlers into the instruction "stream". */ | |
355 | ||
356 | #if FAST_P | |
357 | #undef TRACE_RESULT | |
358 | #define TRACE_RESULT(cpu, abuf, name, type, val) | |
359 | #endif | |
360 | ||
361 | #undef GET_ATTR | |
362 | #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) | |
363 | ||
364 | { | |
365 | ||
366 | #if WITH_SCACHE_PBB | |
367 | ||
368 | /* Branch to next handler without going around main loop. */ | |
369 | #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case | |
370 | SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) | |
371 | ||
372 | #else /* ! WITH_SCACHE_PBB */ | |
373 | ||
374 | #define NEXT(vpc) BREAK (sem) | |
375 | #ifdef __GNUC__ | |
376 | #if FAST_P | |
377 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) | |
378 | #else | |
379 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) | |
380 | #endif | |
381 | #else | |
382 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) | |
383 | #endif | |
384 | ||
385 | #endif /* ! WITH_SCACHE_PBB */ | |
386 | ||
387 | { | |
388 | ||
389 | CASE (sem, INSN_X_INVALID) : /* --invalid-- */ | |
390 | { | |
391 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
392 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
393 | #define FLD(f) abuf->fields.fmt_empty.f | |
394 | int UNUSED written = 0; | |
395 | IADDR UNUSED pc = abuf->addr; | |
396 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
397 | ||
398 | { | |
2acceee2 JM |
399 | /* Update the recorded pc in the cpu state struct. |
400 | Only necessary for WITH_SCACHE case, but to avoid the | |
401 | conditional compilation .... */ | |
c906108c | 402 | SET_H_PC (pc); |
2acceee2 JM |
403 | /* Virtual insns have zero size. Overwrite vpc with address of next insn |
404 | using the default-insn-bitsize spec. When executing insns in parallel | |
405 | we may want to queue the fault and continue execution. */ | |
406 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
407 | vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); | |
c906108c SS |
408 | } |
409 | ||
410 | #undef FLD | |
411 | } | |
412 | NEXT (vpc); | |
413 | ||
414 | CASE (sem, INSN_X_AFTER) : /* --after-- */ | |
415 | { | |
416 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
417 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
418 | #define FLD(f) abuf->fields.fmt_empty.f | |
419 | int UNUSED written = 0; | |
420 | IADDR UNUSED pc = abuf->addr; | |
421 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
422 | ||
423 | { | |
424 | #if WITH_SCACHE_PBB_I960BASE | |
425 | i960base_pbb_after (current_cpu, sem_arg); | |
426 | #endif | |
427 | } | |
428 | ||
429 | #undef FLD | |
430 | } | |
431 | NEXT (vpc); | |
432 | ||
433 | CASE (sem, INSN_X_BEFORE) : /* --before-- */ | |
434 | { | |
435 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
436 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
437 | #define FLD(f) abuf->fields.fmt_empty.f | |
438 | int UNUSED written = 0; | |
439 | IADDR UNUSED pc = abuf->addr; | |
440 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
441 | ||
442 | { | |
443 | #if WITH_SCACHE_PBB_I960BASE | |
444 | i960base_pbb_before (current_cpu, sem_arg); | |
445 | #endif | |
446 | } | |
447 | ||
448 | #undef FLD | |
449 | } | |
450 | NEXT (vpc); | |
451 | ||
452 | CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ | |
453 | { | |
454 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
455 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
456 | #define FLD(f) abuf->fields.fmt_empty.f | |
457 | int UNUSED written = 0; | |
458 | IADDR UNUSED pc = abuf->addr; | |
459 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
460 | ||
461 | { | |
462 | #if WITH_SCACHE_PBB_I960BASE | |
463 | #ifdef DEFINE_SWITCH | |
464 | vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, | |
96baa820 | 465 | pbb_br_type, pbb_br_npc); |
c906108c SS |
466 | BREAK (sem); |
467 | #else | |
468 | /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ | |
469 | vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, | |
96baa820 | 470 | CPU_PBB_BR_TYPE (current_cpu), |
c906108c SS |
471 | CPU_PBB_BR_NPC (current_cpu)); |
472 | #endif | |
473 | #endif | |
474 | } | |
475 | ||
476 | #undef FLD | |
477 | } | |
478 | NEXT (vpc); | |
479 | ||
480 | CASE (sem, INSN_X_CHAIN) : /* --chain-- */ | |
481 | { | |
482 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
483 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
484 | #define FLD(f) abuf->fields.fmt_empty.f | |
485 | int UNUSED written = 0; | |
486 | IADDR UNUSED pc = abuf->addr; | |
487 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
488 | ||
489 | { | |
490 | #if WITH_SCACHE_PBB_I960BASE | |
491 | vpc = i960base_pbb_chain (current_cpu, sem_arg); | |
492 | #ifdef DEFINE_SWITCH | |
493 | BREAK (sem); | |
494 | #endif | |
495 | #endif | |
496 | } | |
497 | ||
498 | #undef FLD | |
499 | } | |
500 | NEXT (vpc); | |
501 | ||
502 | CASE (sem, INSN_X_BEGIN) : /* --begin-- */ | |
503 | { | |
504 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
505 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
506 | #define FLD(f) abuf->fields.fmt_empty.f | |
507 | int UNUSED written = 0; | |
508 | IADDR UNUSED pc = abuf->addr; | |
509 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
510 | ||
511 | { | |
512 | #if WITH_SCACHE_PBB_I960BASE | |
513 | #ifdef DEFINE_SWITCH | |
514 | /* In the switch case FAST_P is a constant, allowing several optimizations | |
515 | in any called inline functions. */ | |
516 | vpc = i960base_pbb_begin (current_cpu, FAST_P); | |
517 | #else | |
518 | vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); | |
519 | #endif | |
520 | #endif | |
521 | } | |
522 | ||
523 | #undef FLD | |
524 | } | |
525 | NEXT (vpc); | |
526 | ||
527 | CASE (sem, INSN_MULO) : /* mulo $src1, $src2, $dst */ | |
528 | { | |
529 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
530 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 531 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
532 | int UNUSED written = 0; |
533 | IADDR UNUSED pc = abuf->addr; | |
534 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
535 | ||
536 | { | |
537 | SI opval = MULSI (* FLD (i_src1), * FLD (i_src2)); | |
538 | * FLD (i_dst) = opval; | |
539 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
540 | } | |
541 | ||
542 | #undef FLD | |
543 | } | |
544 | NEXT (vpc); | |
545 | ||
546 | CASE (sem, INSN_MULO1) : /* mulo $lit1, $src2, $dst */ | |
547 | { | |
548 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
549 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 550 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
551 | int UNUSED written = 0; |
552 | IADDR UNUSED pc = abuf->addr; | |
553 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
554 | ||
555 | { | |
556 | SI opval = MULSI (FLD (f_src1), * FLD (i_src2)); | |
557 | * FLD (i_dst) = opval; | |
558 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
559 | } | |
560 | ||
561 | #undef FLD | |
562 | } | |
563 | NEXT (vpc); | |
564 | ||
565 | CASE (sem, INSN_MULO2) : /* mulo $src1, $lit2, $dst */ | |
566 | { | |
567 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
568 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 569 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
570 | int UNUSED written = 0; |
571 | IADDR UNUSED pc = abuf->addr; | |
572 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
573 | ||
574 | { | |
575 | SI opval = MULSI (* FLD (i_src1), FLD (f_src2)); | |
576 | * FLD (i_dst) = opval; | |
577 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
578 | } | |
579 | ||
580 | #undef FLD | |
581 | } | |
582 | NEXT (vpc); | |
583 | ||
584 | CASE (sem, INSN_MULO3) : /* mulo $lit1, $lit2, $dst */ | |
585 | { | |
586 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
587 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 588 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
589 | int UNUSED written = 0; |
590 | IADDR UNUSED pc = abuf->addr; | |
591 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
592 | ||
593 | { | |
594 | SI opval = MULSI (FLD (f_src1), FLD (f_src2)); | |
595 | * FLD (i_dst) = opval; | |
596 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
597 | } | |
598 | ||
599 | #undef FLD | |
600 | } | |
601 | NEXT (vpc); | |
602 | ||
603 | CASE (sem, INSN_REMO) : /* remo $src1, $src2, $dst */ | |
604 | { | |
605 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
606 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 607 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
608 | int UNUSED written = 0; |
609 | IADDR UNUSED pc = abuf->addr; | |
610 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
611 | ||
612 | { | |
613 | SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1)); | |
614 | * FLD (i_dst) = opval; | |
615 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
616 | } | |
617 | ||
618 | #undef FLD | |
619 | } | |
620 | NEXT (vpc); | |
621 | ||
622 | CASE (sem, INSN_REMO1) : /* remo $lit1, $src2, $dst */ | |
623 | { | |
624 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
625 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 626 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
627 | int UNUSED written = 0; |
628 | IADDR UNUSED pc = abuf->addr; | |
629 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
630 | ||
631 | { | |
632 | SI opval = UMODSI (* FLD (i_src2), FLD (f_src1)); | |
633 | * FLD (i_dst) = opval; | |
634 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
635 | } | |
636 | ||
637 | #undef FLD | |
638 | } | |
639 | NEXT (vpc); | |
640 | ||
641 | CASE (sem, INSN_REMO2) : /* remo $src1, $lit2, $dst */ | |
642 | { | |
643 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
644 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 645 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
646 | int UNUSED written = 0; |
647 | IADDR UNUSED pc = abuf->addr; | |
648 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
649 | ||
650 | { | |
651 | SI opval = UMODSI (FLD (f_src2), * FLD (i_src1)); | |
652 | * FLD (i_dst) = opval; | |
653 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
654 | } | |
655 | ||
656 | #undef FLD | |
657 | } | |
658 | NEXT (vpc); | |
659 | ||
660 | CASE (sem, INSN_REMO3) : /* remo $lit1, $lit2, $dst */ | |
661 | { | |
662 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
663 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 664 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
665 | int UNUSED written = 0; |
666 | IADDR UNUSED pc = abuf->addr; | |
667 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
668 | ||
669 | { | |
670 | SI opval = UMODSI (FLD (f_src2), FLD (f_src1)); | |
671 | * FLD (i_dst) = opval; | |
672 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
673 | } | |
674 | ||
675 | #undef FLD | |
676 | } | |
677 | NEXT (vpc); | |
678 | ||
679 | CASE (sem, INSN_DIVO) : /* divo $src1, $src2, $dst */ | |
680 | { | |
681 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
682 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 683 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
684 | int UNUSED written = 0; |
685 | IADDR UNUSED pc = abuf->addr; | |
686 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
687 | ||
688 | { | |
689 | SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1)); | |
690 | * FLD (i_dst) = opval; | |
691 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
692 | } | |
693 | ||
694 | #undef FLD | |
695 | } | |
696 | NEXT (vpc); | |
697 | ||
698 | CASE (sem, INSN_DIVO1) : /* divo $lit1, $src2, $dst */ | |
699 | { | |
700 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
701 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 702 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
703 | int UNUSED written = 0; |
704 | IADDR UNUSED pc = abuf->addr; | |
705 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
706 | ||
707 | { | |
708 | SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1)); | |
709 | * FLD (i_dst) = opval; | |
710 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
711 | } | |
712 | ||
713 | #undef FLD | |
714 | } | |
715 | NEXT (vpc); | |
716 | ||
717 | CASE (sem, INSN_DIVO2) : /* divo $src1, $lit2, $dst */ | |
718 | { | |
719 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
720 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 721 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
722 | int UNUSED written = 0; |
723 | IADDR UNUSED pc = abuf->addr; | |
724 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
725 | ||
726 | { | |
727 | SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1)); | |
728 | * FLD (i_dst) = opval; | |
729 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
730 | } | |
731 | ||
732 | #undef FLD | |
733 | } | |
734 | NEXT (vpc); | |
735 | ||
736 | CASE (sem, INSN_DIVO3) : /* divo $lit1, $lit2, $dst */ | |
737 | { | |
738 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
739 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 740 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
741 | int UNUSED written = 0; |
742 | IADDR UNUSED pc = abuf->addr; | |
743 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
744 | ||
745 | { | |
746 | SI opval = UDIVSI (FLD (f_src2), FLD (f_src1)); | |
747 | * FLD (i_dst) = opval; | |
748 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
749 | } | |
750 | ||
751 | #undef FLD | |
752 | } | |
753 | NEXT (vpc); | |
754 | ||
755 | CASE (sem, INSN_REMI) : /* remi $src1, $src2, $dst */ | |
756 | { | |
757 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
758 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 759 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
760 | int UNUSED written = 0; |
761 | IADDR UNUSED pc = abuf->addr; | |
762 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
763 | ||
764 | { | |
765 | SI opval = MODSI (* FLD (i_src2), * FLD (i_src1)); | |
766 | * FLD (i_dst) = opval; | |
767 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
768 | } | |
769 | ||
770 | #undef FLD | |
771 | } | |
772 | NEXT (vpc); | |
773 | ||
774 | CASE (sem, INSN_REMI1) : /* remi $lit1, $src2, $dst */ | |
775 | { | |
776 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
777 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 778 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
779 | int UNUSED written = 0; |
780 | IADDR UNUSED pc = abuf->addr; | |
781 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
782 | ||
783 | { | |
784 | SI opval = MODSI (* FLD (i_src2), FLD (f_src1)); | |
785 | * FLD (i_dst) = opval; | |
786 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
787 | } | |
788 | ||
789 | #undef FLD | |
790 | } | |
791 | NEXT (vpc); | |
792 | ||
793 | CASE (sem, INSN_REMI2) : /* remi $src1, $lit2, $dst */ | |
794 | { | |
795 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
796 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 797 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
798 | int UNUSED written = 0; |
799 | IADDR UNUSED pc = abuf->addr; | |
800 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
801 | ||
802 | { | |
803 | SI opval = MODSI (FLD (f_src2), * FLD (i_src1)); | |
804 | * FLD (i_dst) = opval; | |
805 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
806 | } | |
807 | ||
808 | #undef FLD | |
809 | } | |
810 | NEXT (vpc); | |
811 | ||
812 | CASE (sem, INSN_REMI3) : /* remi $lit1, $lit2, $dst */ | |
813 | { | |
814 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
815 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 816 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
817 | int UNUSED written = 0; |
818 | IADDR UNUSED pc = abuf->addr; | |
819 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
820 | ||
821 | { | |
822 | SI opval = MODSI (FLD (f_src2), FLD (f_src1)); | |
823 | * FLD (i_dst) = opval; | |
824 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
825 | } | |
826 | ||
827 | #undef FLD | |
828 | } | |
829 | NEXT (vpc); | |
830 | ||
831 | CASE (sem, INSN_DIVI) : /* divi $src1, $src2, $dst */ | |
832 | { | |
833 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
834 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 835 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
836 | int UNUSED written = 0; |
837 | IADDR UNUSED pc = abuf->addr; | |
838 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
839 | ||
840 | { | |
841 | SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1)); | |
842 | * FLD (i_dst) = opval; | |
843 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
844 | } | |
845 | ||
846 | #undef FLD | |
847 | } | |
848 | NEXT (vpc); | |
849 | ||
850 | CASE (sem, INSN_DIVI1) : /* divi $lit1, $src2, $dst */ | |
851 | { | |
852 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
853 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 854 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
855 | int UNUSED written = 0; |
856 | IADDR UNUSED pc = abuf->addr; | |
857 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
858 | ||
859 | { | |
860 | SI opval = DIVSI (* FLD (i_src2), FLD (f_src1)); | |
861 | * FLD (i_dst) = opval; | |
862 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
863 | } | |
864 | ||
865 | #undef FLD | |
866 | } | |
867 | NEXT (vpc); | |
868 | ||
869 | CASE (sem, INSN_DIVI2) : /* divi $src1, $lit2, $dst */ | |
870 | { | |
871 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
872 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 873 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
874 | int UNUSED written = 0; |
875 | IADDR UNUSED pc = abuf->addr; | |
876 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
877 | ||
878 | { | |
879 | SI opval = DIVSI (FLD (f_src2), * FLD (i_src1)); | |
880 | * FLD (i_dst) = opval; | |
881 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
882 | } | |
883 | ||
884 | #undef FLD | |
885 | } | |
886 | NEXT (vpc); | |
887 | ||
888 | CASE (sem, INSN_DIVI3) : /* divi $lit1, $lit2, $dst */ | |
889 | { | |
890 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
891 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 892 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
893 | int UNUSED written = 0; |
894 | IADDR UNUSED pc = abuf->addr; | |
895 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
896 | ||
897 | { | |
898 | SI opval = DIVSI (FLD (f_src2), FLD (f_src1)); | |
899 | * FLD (i_dst) = opval; | |
900 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
901 | } | |
902 | ||
903 | #undef FLD | |
904 | } | |
905 | NEXT (vpc); | |
906 | ||
907 | CASE (sem, INSN_ADDO) : /* addo $src1, $src2, $dst */ | |
908 | { | |
909 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
910 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 911 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
912 | int UNUSED written = 0; |
913 | IADDR UNUSED pc = abuf->addr; | |
914 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
915 | ||
916 | { | |
917 | SI opval = ADDSI (* FLD (i_src1), * FLD (i_src2)); | |
918 | * FLD (i_dst) = opval; | |
919 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
920 | } | |
921 | ||
922 | #undef FLD | |
923 | } | |
924 | NEXT (vpc); | |
925 | ||
926 | CASE (sem, INSN_ADDO1) : /* addo $lit1, $src2, $dst */ | |
927 | { | |
928 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
929 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 930 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
931 | int UNUSED written = 0; |
932 | IADDR UNUSED pc = abuf->addr; | |
933 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
934 | ||
935 | { | |
936 | SI opval = ADDSI (FLD (f_src1), * FLD (i_src2)); | |
937 | * FLD (i_dst) = opval; | |
938 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
939 | } | |
940 | ||
941 | #undef FLD | |
942 | } | |
943 | NEXT (vpc); | |
944 | ||
945 | CASE (sem, INSN_ADDO2) : /* addo $src1, $lit2, $dst */ | |
946 | { | |
947 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
948 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 949 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
950 | int UNUSED written = 0; |
951 | IADDR UNUSED pc = abuf->addr; | |
952 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
953 | ||
954 | { | |
955 | SI opval = ADDSI (* FLD (i_src1), FLD (f_src2)); | |
956 | * FLD (i_dst) = opval; | |
957 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
958 | } | |
959 | ||
960 | #undef FLD | |
961 | } | |
962 | NEXT (vpc); | |
963 | ||
964 | CASE (sem, INSN_ADDO3) : /* addo $lit1, $lit2, $dst */ | |
965 | { | |
966 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
967 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 968 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
969 | int UNUSED written = 0; |
970 | IADDR UNUSED pc = abuf->addr; | |
971 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
972 | ||
973 | { | |
974 | SI opval = ADDSI (FLD (f_src1), FLD (f_src2)); | |
975 | * FLD (i_dst) = opval; | |
976 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
977 | } | |
978 | ||
979 | #undef FLD | |
980 | } | |
981 | NEXT (vpc); | |
982 | ||
983 | CASE (sem, INSN_SUBO) : /* subo $src1, $src2, $dst */ | |
984 | { | |
985 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
986 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 987 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
988 | int UNUSED written = 0; |
989 | IADDR UNUSED pc = abuf->addr; | |
990 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
991 | ||
992 | { | |
993 | SI opval = SUBSI (* FLD (i_src2), * FLD (i_src1)); | |
994 | * FLD (i_dst) = opval; | |
995 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
996 | } | |
997 | ||
998 | #undef FLD | |
999 | } | |
1000 | NEXT (vpc); | |
1001 | ||
1002 | CASE (sem, INSN_SUBO1) : /* subo $lit1, $src2, $dst */ | |
1003 | { | |
1004 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1005 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1006 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1007 | int UNUSED written = 0; |
1008 | IADDR UNUSED pc = abuf->addr; | |
1009 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1010 | ||
1011 | { | |
1012 | SI opval = SUBSI (* FLD (i_src2), FLD (f_src1)); | |
1013 | * FLD (i_dst) = opval; | |
1014 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1015 | } | |
1016 | ||
1017 | #undef FLD | |
1018 | } | |
1019 | NEXT (vpc); | |
1020 | ||
1021 | CASE (sem, INSN_SUBO2) : /* subo $src1, $lit2, $dst */ | |
1022 | { | |
1023 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1024 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1025 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1026 | int UNUSED written = 0; |
1027 | IADDR UNUSED pc = abuf->addr; | |
1028 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1029 | ||
1030 | { | |
1031 | SI opval = SUBSI (FLD (f_src2), * FLD (i_src1)); | |
1032 | * FLD (i_dst) = opval; | |
1033 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1034 | } | |
1035 | ||
1036 | #undef FLD | |
1037 | } | |
1038 | NEXT (vpc); | |
1039 | ||
1040 | CASE (sem, INSN_SUBO3) : /* subo $lit1, $lit2, $dst */ | |
1041 | { | |
1042 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1043 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1044 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1045 | int UNUSED written = 0; |
1046 | IADDR UNUSED pc = abuf->addr; | |
1047 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1048 | ||
1049 | { | |
1050 | SI opval = SUBSI (FLD (f_src2), FLD (f_src1)); | |
1051 | * FLD (i_dst) = opval; | |
1052 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1053 | } | |
1054 | ||
1055 | #undef FLD | |
1056 | } | |
1057 | NEXT (vpc); | |
1058 | ||
1059 | CASE (sem, INSN_NOTBIT) : /* notbit $src1, $src2, $dst */ | |
1060 | { | |
1061 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1062 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1063 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1064 | int UNUSED written = 0; |
1065 | IADDR UNUSED pc = abuf->addr; | |
1066 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1067 | ||
1068 | { | |
1069 | SI opval = XORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2)); | |
1070 | * FLD (i_dst) = opval; | |
1071 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1072 | } | |
1073 | ||
1074 | #undef FLD | |
1075 | } | |
1076 | NEXT (vpc); | |
1077 | ||
1078 | CASE (sem, INSN_NOTBIT1) : /* notbit $lit1, $src2, $dst */ | |
1079 | { | |
1080 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1081 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1082 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1083 | int UNUSED written = 0; |
1084 | IADDR UNUSED pc = abuf->addr; | |
1085 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1086 | ||
1087 | { | |
1088 | SI opval = XORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2)); | |
1089 | * FLD (i_dst) = opval; | |
1090 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1091 | } | |
1092 | ||
1093 | #undef FLD | |
1094 | } | |
1095 | NEXT (vpc); | |
1096 | ||
1097 | CASE (sem, INSN_NOTBIT2) : /* notbit $src1, $lit2, $dst */ | |
1098 | { | |
1099 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1100 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1101 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1102 | int UNUSED written = 0; |
1103 | IADDR UNUSED pc = abuf->addr; | |
1104 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1105 | ||
1106 | { | |
1107 | SI opval = XORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2)); | |
1108 | * FLD (i_dst) = opval; | |
1109 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1110 | } | |
1111 | ||
1112 | #undef FLD | |
1113 | } | |
1114 | NEXT (vpc); | |
1115 | ||
1116 | CASE (sem, INSN_NOTBIT3) : /* notbit $lit1, $lit2, $dst */ | |
1117 | { | |
1118 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1119 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1120 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1121 | int UNUSED written = 0; |
1122 | IADDR UNUSED pc = abuf->addr; | |
1123 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1124 | ||
1125 | { | |
1126 | SI opval = XORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2)); | |
1127 | * FLD (i_dst) = opval; | |
1128 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1129 | } | |
1130 | ||
1131 | #undef FLD | |
1132 | } | |
1133 | NEXT (vpc); | |
1134 | ||
1135 | CASE (sem, INSN_AND) : /* and $src1, $src2, $dst */ | |
1136 | { | |
1137 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1138 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1139 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1140 | int UNUSED written = 0; |
1141 | IADDR UNUSED pc = abuf->addr; | |
1142 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1143 | ||
1144 | { | |
1145 | SI opval = ANDSI (* FLD (i_src1), * FLD (i_src2)); | |
1146 | * FLD (i_dst) = opval; | |
1147 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1148 | } | |
1149 | ||
1150 | #undef FLD | |
1151 | } | |
1152 | NEXT (vpc); | |
1153 | ||
1154 | CASE (sem, INSN_AND1) : /* and $lit1, $src2, $dst */ | |
1155 | { | |
1156 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1157 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1158 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1159 | int UNUSED written = 0; |
1160 | IADDR UNUSED pc = abuf->addr; | |
1161 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1162 | ||
1163 | { | |
1164 | SI opval = ANDSI (FLD (f_src1), * FLD (i_src2)); | |
1165 | * FLD (i_dst) = opval; | |
1166 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1167 | } | |
1168 | ||
1169 | #undef FLD | |
1170 | } | |
1171 | NEXT (vpc); | |
1172 | ||
1173 | CASE (sem, INSN_AND2) : /* and $src1, $lit2, $dst */ | |
1174 | { | |
1175 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1176 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1177 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1178 | int UNUSED written = 0; |
1179 | IADDR UNUSED pc = abuf->addr; | |
1180 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1181 | ||
1182 | { | |
1183 | SI opval = ANDSI (* FLD (i_src1), FLD (f_src2)); | |
1184 | * FLD (i_dst) = opval; | |
1185 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1186 | } | |
1187 | ||
1188 | #undef FLD | |
1189 | } | |
1190 | NEXT (vpc); | |
1191 | ||
1192 | CASE (sem, INSN_AND3) : /* and $lit1, $lit2, $dst */ | |
1193 | { | |
1194 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1195 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1196 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1197 | int UNUSED written = 0; |
1198 | IADDR UNUSED pc = abuf->addr; | |
1199 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1200 | ||
1201 | { | |
1202 | SI opval = ANDSI (FLD (f_src1), FLD (f_src2)); | |
1203 | * FLD (i_dst) = opval; | |
1204 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1205 | } | |
1206 | ||
1207 | #undef FLD | |
1208 | } | |
1209 | NEXT (vpc); | |
1210 | ||
1211 | CASE (sem, INSN_ANDNOT) : /* andnot $src1, $src2, $dst */ | |
1212 | { | |
1213 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1214 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1215 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1216 | int UNUSED written = 0; |
1217 | IADDR UNUSED pc = abuf->addr; | |
1218 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1219 | ||
1220 | { | |
1221 | SI opval = ANDSI (* FLD (i_src2), INVSI (* FLD (i_src1))); | |
1222 | * FLD (i_dst) = opval; | |
1223 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1224 | } | |
1225 | ||
1226 | #undef FLD | |
1227 | } | |
1228 | NEXT (vpc); | |
1229 | ||
1230 | CASE (sem, INSN_ANDNOT1) : /* andnot $lit1, $src2, $dst */ | |
1231 | { | |
1232 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1233 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1234 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1235 | int UNUSED written = 0; |
1236 | IADDR UNUSED pc = abuf->addr; | |
1237 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1238 | ||
1239 | { | |
1240 | SI opval = ANDSI (* FLD (i_src2), INVSI (FLD (f_src1))); | |
1241 | * FLD (i_dst) = opval; | |
1242 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1243 | } | |
1244 | ||
1245 | #undef FLD | |
1246 | } | |
1247 | NEXT (vpc); | |
1248 | ||
1249 | CASE (sem, INSN_ANDNOT2) : /* andnot $src1, $lit2, $dst */ | |
1250 | { | |
1251 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1252 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1253 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1254 | int UNUSED written = 0; |
1255 | IADDR UNUSED pc = abuf->addr; | |
1256 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1257 | ||
1258 | { | |
1259 | SI opval = ANDSI (FLD (f_src2), INVSI (* FLD (i_src1))); | |
1260 | * FLD (i_dst) = opval; | |
1261 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1262 | } | |
1263 | ||
1264 | #undef FLD | |
1265 | } | |
1266 | NEXT (vpc); | |
1267 | ||
1268 | CASE (sem, INSN_ANDNOT3) : /* andnot $lit1, $lit2, $dst */ | |
1269 | { | |
1270 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1271 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1272 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1273 | int UNUSED written = 0; |
1274 | IADDR UNUSED pc = abuf->addr; | |
1275 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1276 | ||
1277 | { | |
1278 | SI opval = ANDSI (FLD (f_src2), INVSI (FLD (f_src1))); | |
1279 | * FLD (i_dst) = opval; | |
1280 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1281 | } | |
1282 | ||
1283 | #undef FLD | |
1284 | } | |
1285 | NEXT (vpc); | |
1286 | ||
1287 | CASE (sem, INSN_SETBIT) : /* setbit $src1, $src2, $dst */ | |
1288 | { | |
1289 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1290 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1291 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1292 | int UNUSED written = 0; |
1293 | IADDR UNUSED pc = abuf->addr; | |
1294 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1295 | ||
1296 | { | |
1297 | SI opval = ORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2)); | |
1298 | * FLD (i_dst) = opval; | |
1299 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1300 | } | |
1301 | ||
1302 | #undef FLD | |
1303 | } | |
1304 | NEXT (vpc); | |
1305 | ||
1306 | CASE (sem, INSN_SETBIT1) : /* setbit $lit1, $src2, $dst */ | |
1307 | { | |
1308 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1309 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1310 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1311 | int UNUSED written = 0; |
1312 | IADDR UNUSED pc = abuf->addr; | |
1313 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1314 | ||
1315 | { | |
1316 | SI opval = ORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2)); | |
1317 | * FLD (i_dst) = opval; | |
1318 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1319 | } | |
1320 | ||
1321 | #undef FLD | |
1322 | } | |
1323 | NEXT (vpc); | |
1324 | ||
1325 | CASE (sem, INSN_SETBIT2) : /* setbit $src1, $lit2, $dst */ | |
1326 | { | |
1327 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1328 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1329 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1330 | int UNUSED written = 0; |
1331 | IADDR UNUSED pc = abuf->addr; | |
1332 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1333 | ||
1334 | { | |
1335 | SI opval = ORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2)); | |
1336 | * FLD (i_dst) = opval; | |
1337 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1338 | } | |
1339 | ||
1340 | #undef FLD | |
1341 | } | |
1342 | NEXT (vpc); | |
1343 | ||
1344 | CASE (sem, INSN_SETBIT3) : /* setbit $lit1, $lit2, $dst */ | |
1345 | { | |
1346 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1347 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1348 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1349 | int UNUSED written = 0; |
1350 | IADDR UNUSED pc = abuf->addr; | |
1351 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1352 | ||
1353 | { | |
1354 | SI opval = ORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2)); | |
1355 | * FLD (i_dst) = opval; | |
1356 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1357 | } | |
1358 | ||
1359 | #undef FLD | |
1360 | } | |
1361 | NEXT (vpc); | |
1362 | ||
1363 | CASE (sem, INSN_NOTAND) : /* notand $src1, $src2, $dst */ | |
1364 | { | |
1365 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1366 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1367 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1368 | int UNUSED written = 0; |
1369 | IADDR UNUSED pc = abuf->addr; | |
1370 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1371 | ||
1372 | { | |
1373 | SI opval = ANDSI (INVSI (* FLD (i_src2)), * FLD (i_src1)); | |
1374 | * FLD (i_dst) = opval; | |
1375 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1376 | } | |
1377 | ||
1378 | #undef FLD | |
1379 | } | |
1380 | NEXT (vpc); | |
1381 | ||
1382 | CASE (sem, INSN_NOTAND1) : /* notand $lit1, $src2, $dst */ | |
1383 | { | |
1384 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1385 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1386 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1387 | int UNUSED written = 0; |
1388 | IADDR UNUSED pc = abuf->addr; | |
1389 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1390 | ||
1391 | { | |
1392 | SI opval = ANDSI (INVSI (* FLD (i_src2)), FLD (f_src1)); | |
1393 | * FLD (i_dst) = opval; | |
1394 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1395 | } | |
1396 | ||
1397 | #undef FLD | |
1398 | } | |
1399 | NEXT (vpc); | |
1400 | ||
1401 | CASE (sem, INSN_NOTAND2) : /* notand $src1, $lit2, $dst */ | |
1402 | { | |
1403 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1404 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1405 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1406 | int UNUSED written = 0; |
1407 | IADDR UNUSED pc = abuf->addr; | |
1408 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1409 | ||
1410 | { | |
1411 | SI opval = ANDSI (INVSI (FLD (f_src2)), * FLD (i_src1)); | |
1412 | * FLD (i_dst) = opval; | |
1413 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1414 | } | |
1415 | ||
1416 | #undef FLD | |
1417 | } | |
1418 | NEXT (vpc); | |
1419 | ||
1420 | CASE (sem, INSN_NOTAND3) : /* notand $lit1, $lit2, $dst */ | |
1421 | { | |
1422 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1423 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1424 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1425 | int UNUSED written = 0; |
1426 | IADDR UNUSED pc = abuf->addr; | |
1427 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1428 | ||
1429 | { | |
1430 | SI opval = ANDSI (INVSI (FLD (f_src2)), FLD (f_src1)); | |
1431 | * FLD (i_dst) = opval; | |
1432 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1433 | } | |
1434 | ||
1435 | #undef FLD | |
1436 | } | |
1437 | NEXT (vpc); | |
1438 | ||
1439 | CASE (sem, INSN_XOR) : /* xor $src1, $src2, $dst */ | |
1440 | { | |
1441 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1442 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1443 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1444 | int UNUSED written = 0; |
1445 | IADDR UNUSED pc = abuf->addr; | |
1446 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1447 | ||
1448 | { | |
1449 | SI opval = XORSI (* FLD (i_src1), * FLD (i_src2)); | |
1450 | * FLD (i_dst) = opval; | |
1451 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1452 | } | |
1453 | ||
1454 | #undef FLD | |
1455 | } | |
1456 | NEXT (vpc); | |
1457 | ||
1458 | CASE (sem, INSN_XOR1) : /* xor $lit1, $src2, $dst */ | |
1459 | { | |
1460 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1461 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1462 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1463 | int UNUSED written = 0; |
1464 | IADDR UNUSED pc = abuf->addr; | |
1465 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1466 | ||
1467 | { | |
1468 | SI opval = XORSI (FLD (f_src1), * FLD (i_src2)); | |
1469 | * FLD (i_dst) = opval; | |
1470 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1471 | } | |
1472 | ||
1473 | #undef FLD | |
1474 | } | |
1475 | NEXT (vpc); | |
1476 | ||
1477 | CASE (sem, INSN_XOR2) : /* xor $src1, $lit2, $dst */ | |
1478 | { | |
1479 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1480 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1481 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1482 | int UNUSED written = 0; |
1483 | IADDR UNUSED pc = abuf->addr; | |
1484 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1485 | ||
1486 | { | |
1487 | SI opval = XORSI (* FLD (i_src1), FLD (f_src2)); | |
1488 | * FLD (i_dst) = opval; | |
1489 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1490 | } | |
1491 | ||
1492 | #undef FLD | |
1493 | } | |
1494 | NEXT (vpc); | |
1495 | ||
1496 | CASE (sem, INSN_XOR3) : /* xor $lit1, $lit2, $dst */ | |
1497 | { | |
1498 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1499 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1500 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1501 | int UNUSED written = 0; |
1502 | IADDR UNUSED pc = abuf->addr; | |
1503 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1504 | ||
1505 | { | |
1506 | SI opval = XORSI (FLD (f_src1), FLD (f_src2)); | |
1507 | * FLD (i_dst) = opval; | |
1508 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1509 | } | |
1510 | ||
1511 | #undef FLD | |
1512 | } | |
1513 | NEXT (vpc); | |
1514 | ||
1515 | CASE (sem, INSN_OR) : /* or $src1, $src2, $dst */ | |
1516 | { | |
1517 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1518 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1519 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1520 | int UNUSED written = 0; |
1521 | IADDR UNUSED pc = abuf->addr; | |
1522 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1523 | ||
1524 | { | |
1525 | SI opval = ORSI (* FLD (i_src1), * FLD (i_src2)); | |
1526 | * FLD (i_dst) = opval; | |
1527 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1528 | } | |
1529 | ||
1530 | #undef FLD | |
1531 | } | |
1532 | NEXT (vpc); | |
1533 | ||
1534 | CASE (sem, INSN_OR1) : /* or $lit1, $src2, $dst */ | |
1535 | { | |
1536 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1537 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1538 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1539 | int UNUSED written = 0; |
1540 | IADDR UNUSED pc = abuf->addr; | |
1541 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1542 | ||
1543 | { | |
1544 | SI opval = ORSI (FLD (f_src1), * FLD (i_src2)); | |
1545 | * FLD (i_dst) = opval; | |
1546 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1547 | } | |
1548 | ||
1549 | #undef FLD | |
1550 | } | |
1551 | NEXT (vpc); | |
1552 | ||
1553 | CASE (sem, INSN_OR2) : /* or $src1, $lit2, $dst */ | |
1554 | { | |
1555 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1556 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1557 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1558 | int UNUSED written = 0; |
1559 | IADDR UNUSED pc = abuf->addr; | |
1560 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1561 | ||
1562 | { | |
1563 | SI opval = ORSI (* FLD (i_src1), FLD (f_src2)); | |
1564 | * FLD (i_dst) = opval; | |
1565 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1566 | } | |
1567 | ||
1568 | #undef FLD | |
1569 | } | |
1570 | NEXT (vpc); | |
1571 | ||
1572 | CASE (sem, INSN_OR3) : /* or $lit1, $lit2, $dst */ | |
1573 | { | |
1574 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1575 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1576 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1577 | int UNUSED written = 0; |
1578 | IADDR UNUSED pc = abuf->addr; | |
1579 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1580 | ||
1581 | { | |
1582 | SI opval = ORSI (FLD (f_src1), FLD (f_src2)); | |
1583 | * FLD (i_dst) = opval; | |
1584 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1585 | } | |
1586 | ||
1587 | #undef FLD | |
1588 | } | |
1589 | NEXT (vpc); | |
1590 | ||
1591 | CASE (sem, INSN_NOR) : /* nor $src1, $src2, $dst */ | |
1592 | { | |
1593 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1594 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1595 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1596 | int UNUSED written = 0; |
1597 | IADDR UNUSED pc = abuf->addr; | |
1598 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1599 | ||
1600 | { | |
1601 | SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (* FLD (i_src1))); | |
1602 | * FLD (i_dst) = opval; | |
1603 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1604 | } | |
1605 | ||
1606 | #undef FLD | |
1607 | } | |
1608 | NEXT (vpc); | |
1609 | ||
1610 | CASE (sem, INSN_NOR1) : /* nor $lit1, $src2, $dst */ | |
1611 | { | |
1612 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1613 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1614 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1615 | int UNUSED written = 0; |
1616 | IADDR UNUSED pc = abuf->addr; | |
1617 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1618 | ||
1619 | { | |
1620 | SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (FLD (f_src1))); | |
1621 | * FLD (i_dst) = opval; | |
1622 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1623 | } | |
1624 | ||
1625 | #undef FLD | |
1626 | } | |
1627 | NEXT (vpc); | |
1628 | ||
1629 | CASE (sem, INSN_NOR2) : /* nor $src1, $lit2, $dst */ | |
1630 | { | |
1631 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1632 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1633 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1634 | int UNUSED written = 0; |
1635 | IADDR UNUSED pc = abuf->addr; | |
1636 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1637 | ||
1638 | { | |
1639 | SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (* FLD (i_src1))); | |
1640 | * FLD (i_dst) = opval; | |
1641 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1642 | } | |
1643 | ||
1644 | #undef FLD | |
1645 | } | |
1646 | NEXT (vpc); | |
1647 | ||
1648 | CASE (sem, INSN_NOR3) : /* nor $lit1, $lit2, $dst */ | |
1649 | { | |
1650 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1651 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1652 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1653 | int UNUSED written = 0; |
1654 | IADDR UNUSED pc = abuf->addr; | |
1655 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1656 | ||
1657 | { | |
1658 | SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (FLD (f_src1))); | |
1659 | * FLD (i_dst) = opval; | |
1660 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1661 | } | |
1662 | ||
7a292a7a SS |
1663 | #undef FLD |
1664 | } | |
1665 | NEXT (vpc); | |
1666 | ||
1667 | CASE (sem, INSN_XNOR) : /* xnor $src1, $src2, $dst */ | |
1668 | { | |
1669 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1670 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1671 | #define FLD(f) abuf->fields.sfmt_emul.f |
7a292a7a SS |
1672 | int UNUSED written = 0; |
1673 | IADDR UNUSED pc = abuf->addr; | |
1674 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1675 | ||
1676 | { | |
1677 | SI opval = INVSI (XORSI (* FLD (i_src1), * FLD (i_src2))); | |
1678 | * FLD (i_dst) = opval; | |
1679 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1680 | } | |
1681 | ||
1682 | #undef FLD | |
1683 | } | |
1684 | NEXT (vpc); | |
1685 | ||
1686 | CASE (sem, INSN_XNOR1) : /* xnor $lit1, $src2, $dst */ | |
1687 | { | |
1688 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1689 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1690 | #define FLD(f) abuf->fields.sfmt_emul1.f |
7a292a7a SS |
1691 | int UNUSED written = 0; |
1692 | IADDR UNUSED pc = abuf->addr; | |
1693 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1694 | ||
1695 | { | |
1696 | SI opval = INVSI (XORSI (FLD (f_src1), * FLD (i_src2))); | |
1697 | * FLD (i_dst) = opval; | |
1698 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1699 | } | |
1700 | ||
1701 | #undef FLD | |
1702 | } | |
1703 | NEXT (vpc); | |
1704 | ||
1705 | CASE (sem, INSN_XNOR2) : /* xnor $src1, $lit2, $dst */ | |
1706 | { | |
1707 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1708 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1709 | #define FLD(f) abuf->fields.sfmt_emul2.f |
7a292a7a SS |
1710 | int UNUSED written = 0; |
1711 | IADDR UNUSED pc = abuf->addr; | |
1712 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1713 | ||
1714 | { | |
1715 | SI opval = INVSI (XORSI (* FLD (i_src1), FLD (f_src2))); | |
1716 | * FLD (i_dst) = opval; | |
1717 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1718 | } | |
1719 | ||
1720 | #undef FLD | |
1721 | } | |
1722 | NEXT (vpc); | |
1723 | ||
1724 | CASE (sem, INSN_XNOR3) : /* xnor $lit1, $lit2, $dst */ | |
1725 | { | |
1726 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1727 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1728 | #define FLD(f) abuf->fields.sfmt_emul3.f |
7a292a7a SS |
1729 | int UNUSED written = 0; |
1730 | IADDR UNUSED pc = abuf->addr; | |
1731 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1732 | ||
1733 | { | |
1734 | SI opval = INVSI (XORSI (FLD (f_src1), FLD (f_src2))); | |
1735 | * FLD (i_dst) = opval; | |
1736 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1737 | } | |
1738 | ||
c906108c SS |
1739 | #undef FLD |
1740 | } | |
1741 | NEXT (vpc); | |
1742 | ||
1743 | CASE (sem, INSN_NOT) : /* not $src1, $src2, $dst */ | |
1744 | { | |
1745 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1746 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1747 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1748 | int UNUSED written = 0; |
1749 | IADDR UNUSED pc = abuf->addr; | |
1750 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1751 | ||
1752 | { | |
1753 | SI opval = INVSI (* FLD (i_src1)); | |
1754 | * FLD (i_dst) = opval; | |
1755 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1756 | } | |
1757 | ||
1758 | #undef FLD | |
1759 | } | |
1760 | NEXT (vpc); | |
1761 | ||
1762 | CASE (sem, INSN_NOT1) : /* not $lit1, $src2, $dst */ | |
1763 | { | |
1764 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1765 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1766 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1767 | int UNUSED written = 0; |
1768 | IADDR UNUSED pc = abuf->addr; | |
1769 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1770 | ||
1771 | { | |
1772 | SI opval = INVSI (FLD (f_src1)); | |
1773 | * FLD (i_dst) = opval; | |
1774 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1775 | } | |
1776 | ||
1777 | #undef FLD | |
1778 | } | |
1779 | NEXT (vpc); | |
1780 | ||
1781 | CASE (sem, INSN_NOT2) : /* not $src1, $lit2, $dst */ | |
1782 | { | |
1783 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1784 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1785 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1786 | int UNUSED written = 0; |
1787 | IADDR UNUSED pc = abuf->addr; | |
1788 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1789 | ||
1790 | { | |
1791 | SI opval = INVSI (* FLD (i_src1)); | |
1792 | * FLD (i_dst) = opval; | |
1793 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1794 | } | |
1795 | ||
1796 | #undef FLD | |
1797 | } | |
1798 | NEXT (vpc); | |
1799 | ||
1800 | CASE (sem, INSN_NOT3) : /* not $lit1, $lit2, $dst */ | |
1801 | { | |
1802 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1803 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1804 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1805 | int UNUSED written = 0; |
1806 | IADDR UNUSED pc = abuf->addr; | |
1807 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1808 | ||
1809 | { | |
1810 | SI opval = INVSI (FLD (f_src1)); | |
1811 | * FLD (i_dst) = opval; | |
1812 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1813 | } | |
1814 | ||
7a292a7a SS |
1815 | #undef FLD |
1816 | } | |
1817 | NEXT (vpc); | |
1818 | ||
1819 | CASE (sem, INSN_ORNOT) : /* ornot $src1, $src2, $dst */ | |
1820 | { | |
1821 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1822 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1823 | #define FLD(f) abuf->fields.sfmt_emul.f |
7a292a7a SS |
1824 | int UNUSED written = 0; |
1825 | IADDR UNUSED pc = abuf->addr; | |
1826 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1827 | ||
1828 | { | |
1829 | SI opval = ORSI (* FLD (i_src2), INVSI (* FLD (i_src1))); | |
1830 | * FLD (i_dst) = opval; | |
1831 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1832 | } | |
1833 | ||
1834 | #undef FLD | |
1835 | } | |
1836 | NEXT (vpc); | |
1837 | ||
1838 | CASE (sem, INSN_ORNOT1) : /* ornot $lit1, $src2, $dst */ | |
1839 | { | |
1840 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1841 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1842 | #define FLD(f) abuf->fields.sfmt_emul1.f |
7a292a7a SS |
1843 | int UNUSED written = 0; |
1844 | IADDR UNUSED pc = abuf->addr; | |
1845 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1846 | ||
1847 | { | |
1848 | SI opval = ORSI (* FLD (i_src2), INVSI (FLD (f_src1))); | |
1849 | * FLD (i_dst) = opval; | |
1850 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1851 | } | |
1852 | ||
1853 | #undef FLD | |
1854 | } | |
1855 | NEXT (vpc); | |
1856 | ||
1857 | CASE (sem, INSN_ORNOT2) : /* ornot $src1, $lit2, $dst */ | |
1858 | { | |
1859 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1860 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1861 | #define FLD(f) abuf->fields.sfmt_emul2.f |
7a292a7a SS |
1862 | int UNUSED written = 0; |
1863 | IADDR UNUSED pc = abuf->addr; | |
1864 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1865 | ||
1866 | { | |
1867 | SI opval = ORSI (FLD (f_src2), INVSI (* FLD (i_src1))); | |
1868 | * FLD (i_dst) = opval; | |
1869 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1870 | } | |
1871 | ||
1872 | #undef FLD | |
1873 | } | |
1874 | NEXT (vpc); | |
1875 | ||
1876 | CASE (sem, INSN_ORNOT3) : /* ornot $lit1, $lit2, $dst */ | |
1877 | { | |
1878 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1879 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1880 | #define FLD(f) abuf->fields.sfmt_emul3.f |
7a292a7a SS |
1881 | int UNUSED written = 0; |
1882 | IADDR UNUSED pc = abuf->addr; | |
1883 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1884 | ||
1885 | { | |
1886 | SI opval = ORSI (FLD (f_src2), INVSI (FLD (f_src1))); | |
1887 | * FLD (i_dst) = opval; | |
1888 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1889 | } | |
1890 | ||
c906108c SS |
1891 | #undef FLD |
1892 | } | |
1893 | NEXT (vpc); | |
1894 | ||
1895 | CASE (sem, INSN_CLRBIT) : /* clrbit $src1, $src2, $dst */ | |
1896 | { | |
1897 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1898 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1899 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1900 | int UNUSED written = 0; |
1901 | IADDR UNUSED pc = abuf->addr; | |
1902 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1903 | ||
1904 | { | |
1905 | SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), * FLD (i_src2)); | |
1906 | * FLD (i_dst) = opval; | |
1907 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1908 | } | |
1909 | ||
1910 | #undef FLD | |
1911 | } | |
1912 | NEXT (vpc); | |
1913 | ||
1914 | CASE (sem, INSN_CLRBIT1) : /* clrbit $lit1, $src2, $dst */ | |
1915 | { | |
1916 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1917 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1918 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1919 | int UNUSED written = 0; |
1920 | IADDR UNUSED pc = abuf->addr; | |
1921 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1922 | ||
1923 | { | |
1924 | SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), * FLD (i_src2)); | |
1925 | * FLD (i_dst) = opval; | |
1926 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1927 | } | |
1928 | ||
1929 | #undef FLD | |
1930 | } | |
1931 | NEXT (vpc); | |
1932 | ||
1933 | CASE (sem, INSN_CLRBIT2) : /* clrbit $src1, $lit2, $dst */ | |
1934 | { | |
1935 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1936 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1937 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1938 | int UNUSED written = 0; |
1939 | IADDR UNUSED pc = abuf->addr; | |
1940 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1941 | ||
1942 | { | |
1943 | SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), FLD (f_src2)); | |
1944 | * FLD (i_dst) = opval; | |
1945 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1946 | } | |
1947 | ||
1948 | #undef FLD | |
1949 | } | |
1950 | NEXT (vpc); | |
1951 | ||
1952 | CASE (sem, INSN_CLRBIT3) : /* clrbit $lit1, $lit2, $dst */ | |
1953 | { | |
1954 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1955 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1956 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1957 | int UNUSED written = 0; |
1958 | IADDR UNUSED pc = abuf->addr; | |
1959 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1960 | ||
1961 | { | |
1962 | SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), FLD (f_src2)); | |
1963 | * FLD (i_dst) = opval; | |
1964 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1965 | } | |
1966 | ||
1967 | #undef FLD | |
1968 | } | |
1969 | NEXT (vpc); | |
1970 | ||
1971 | CASE (sem, INSN_SHLO) : /* shlo $src1, $src2, $dst */ | |
1972 | { | |
1973 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1974 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1975 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1976 | int UNUSED written = 0; |
1977 | IADDR UNUSED pc = abuf->addr; | |
1978 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1979 | ||
1980 | { | |
7a292a7a | 1981 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
1982 | * FLD (i_dst) = opval; |
1983 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1984 | } | |
1985 | ||
1986 | #undef FLD | |
1987 | } | |
1988 | NEXT (vpc); | |
1989 | ||
1990 | CASE (sem, INSN_SHLO1) : /* shlo $lit1, $src2, $dst */ | |
1991 | { | |
1992 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1993 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1994 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1995 | int UNUSED written = 0; |
1996 | IADDR UNUSED pc = abuf->addr; | |
1997 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1998 | ||
1999 | { | |
7a292a7a | 2000 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
2001 | * FLD (i_dst) = opval; |
2002 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2003 | } | |
2004 | ||
2005 | #undef FLD | |
2006 | } | |
2007 | NEXT (vpc); | |
2008 | ||
2009 | CASE (sem, INSN_SHLO2) : /* shlo $src1, $lit2, $dst */ | |
2010 | { | |
2011 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2012 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2013 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2014 | int UNUSED written = 0; |
2015 | IADDR UNUSED pc = abuf->addr; | |
2016 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2017 | ||
2018 | { | |
7a292a7a | 2019 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2020 | * FLD (i_dst) = opval; |
2021 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2022 | } | |
2023 | ||
2024 | #undef FLD | |
2025 | } | |
2026 | NEXT (vpc); | |
2027 | ||
2028 | CASE (sem, INSN_SHLO3) : /* shlo $lit1, $lit2, $dst */ | |
2029 | { | |
2030 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2031 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2032 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2033 | int UNUSED written = 0; |
2034 | IADDR UNUSED pc = abuf->addr; | |
2035 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2036 | ||
2037 | { | |
7a292a7a | 2038 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2039 | * FLD (i_dst) = opval; |
2040 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2041 | } | |
2042 | ||
2043 | #undef FLD | |
2044 | } | |
2045 | NEXT (vpc); | |
2046 | ||
2047 | CASE (sem, INSN_SHRO) : /* shro $src1, $src2, $dst */ | |
2048 | { | |
2049 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2050 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2051 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
2052 | int UNUSED written = 0; |
2053 | IADDR UNUSED pc = abuf->addr; | |
2054 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2055 | ||
2056 | { | |
7a292a7a | 2057 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
2058 | * FLD (i_dst) = opval; |
2059 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2060 | } | |
2061 | ||
2062 | #undef FLD | |
2063 | } | |
2064 | NEXT (vpc); | |
2065 | ||
2066 | CASE (sem, INSN_SHRO1) : /* shro $lit1, $src2, $dst */ | |
2067 | { | |
2068 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2069 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2070 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2071 | int UNUSED written = 0; |
2072 | IADDR UNUSED pc = abuf->addr; | |
2073 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2074 | ||
2075 | { | |
7a292a7a | 2076 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
2077 | * FLD (i_dst) = opval; |
2078 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2079 | } | |
2080 | ||
2081 | #undef FLD | |
2082 | } | |
2083 | NEXT (vpc); | |
2084 | ||
2085 | CASE (sem, INSN_SHRO2) : /* shro $src1, $lit2, $dst */ | |
2086 | { | |
2087 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2088 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2089 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2090 | int UNUSED written = 0; |
2091 | IADDR UNUSED pc = abuf->addr; | |
2092 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2093 | ||
2094 | { | |
7a292a7a | 2095 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2096 | * FLD (i_dst) = opval; |
2097 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2098 | } | |
2099 | ||
2100 | #undef FLD | |
2101 | } | |
2102 | NEXT (vpc); | |
2103 | ||
2104 | CASE (sem, INSN_SHRO3) : /* shro $lit1, $lit2, $dst */ | |
2105 | { | |
2106 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2107 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2108 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2109 | int UNUSED written = 0; |
2110 | IADDR UNUSED pc = abuf->addr; | |
2111 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2112 | ||
2113 | { | |
7a292a7a | 2114 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2115 | * FLD (i_dst) = opval; |
2116 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2117 | } | |
2118 | ||
2119 | #undef FLD | |
2120 | } | |
2121 | NEXT (vpc); | |
2122 | ||
2123 | CASE (sem, INSN_SHLI) : /* shli $src1, $src2, $dst */ | |
2124 | { | |
2125 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2126 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2127 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
2128 | int UNUSED written = 0; |
2129 | IADDR UNUSED pc = abuf->addr; | |
2130 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2131 | ||
2132 | { | |
7a292a7a | 2133 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
2134 | * FLD (i_dst) = opval; |
2135 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2136 | } | |
2137 | ||
2138 | #undef FLD | |
2139 | } | |
2140 | NEXT (vpc); | |
2141 | ||
2142 | CASE (sem, INSN_SHLI1) : /* shli $lit1, $src2, $dst */ | |
2143 | { | |
2144 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2145 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2146 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2147 | int UNUSED written = 0; |
2148 | IADDR UNUSED pc = abuf->addr; | |
2149 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2150 | ||
2151 | { | |
7a292a7a | 2152 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
2153 | * FLD (i_dst) = opval; |
2154 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2155 | } | |
2156 | ||
2157 | #undef FLD | |
2158 | } | |
2159 | NEXT (vpc); | |
2160 | ||
2161 | CASE (sem, INSN_SHLI2) : /* shli $src1, $lit2, $dst */ | |
2162 | { | |
2163 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2164 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2165 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2166 | int UNUSED written = 0; |
2167 | IADDR UNUSED pc = abuf->addr; | |
2168 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2169 | ||
2170 | { | |
7a292a7a | 2171 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2172 | * FLD (i_dst) = opval; |
2173 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2174 | } | |
2175 | ||
2176 | #undef FLD | |
2177 | } | |
2178 | NEXT (vpc); | |
2179 | ||
2180 | CASE (sem, INSN_SHLI3) : /* shli $lit1, $lit2, $dst */ | |
2181 | { | |
2182 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2183 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2184 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2185 | int UNUSED written = 0; |
2186 | IADDR UNUSED pc = abuf->addr; | |
2187 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2188 | ||
2189 | { | |
7a292a7a | 2190 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2191 | * FLD (i_dst) = opval; |
2192 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2193 | } | |
2194 | ||
2195 | #undef FLD | |
2196 | } | |
2197 | NEXT (vpc); | |
2198 | ||
2199 | CASE (sem, INSN_SHRI) : /* shri $src1, $src2, $dst */ | |
2200 | { | |
2201 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2202 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2203 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
2204 | int UNUSED written = 0; |
2205 | IADDR UNUSED pc = abuf->addr; | |
2206 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2207 | ||
2208 | { | |
7a292a7a | 2209 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
2210 | * FLD (i_dst) = opval; |
2211 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2212 | } | |
2213 | ||
2214 | #undef FLD | |
2215 | } | |
2216 | NEXT (vpc); | |
2217 | ||
2218 | CASE (sem, INSN_SHRI1) : /* shri $lit1, $src2, $dst */ | |
2219 | { | |
2220 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2221 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2222 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2223 | int UNUSED written = 0; |
2224 | IADDR UNUSED pc = abuf->addr; | |
2225 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2226 | ||
2227 | { | |
7a292a7a | 2228 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
2229 | * FLD (i_dst) = opval; |
2230 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2231 | } | |
2232 | ||
2233 | #undef FLD | |
2234 | } | |
2235 | NEXT (vpc); | |
2236 | ||
2237 | CASE (sem, INSN_SHRI2) : /* shri $src1, $lit2, $dst */ | |
2238 | { | |
2239 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2240 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2241 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2242 | int UNUSED written = 0; |
2243 | IADDR UNUSED pc = abuf->addr; | |
2244 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2245 | ||
2246 | { | |
7a292a7a | 2247 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2248 | * FLD (i_dst) = opval; |
2249 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2250 | } | |
2251 | ||
2252 | #undef FLD | |
2253 | } | |
2254 | NEXT (vpc); | |
2255 | ||
2256 | CASE (sem, INSN_SHRI3) : /* shri $lit1, $lit2, $dst */ | |
2257 | { | |
2258 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2259 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2260 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2261 | int UNUSED written = 0; |
2262 | IADDR UNUSED pc = abuf->addr; | |
2263 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2264 | ||
2265 | { | |
7a292a7a | 2266 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2267 | * FLD (i_dst) = opval; |
2268 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2269 | } | |
2270 | ||
2271 | #undef FLD | |
2272 | } | |
2273 | NEXT (vpc); | |
2274 | ||
2275 | CASE (sem, INSN_EMUL) : /* emul $src1, $src2, $dst */ | |
2276 | { | |
2277 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2278 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2279 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
2280 | int UNUSED written = 0; |
2281 | IADDR UNUSED pc = abuf->addr; | |
2282 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2283 | ||
7a292a7a | 2284 | { |
c906108c | 2285 | DI tmp_temp; |
7a292a7a | 2286 | SI tmp_dregno; |
c906108c SS |
2287 | tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (* FLD (i_src2))); |
2288 | tmp_dregno = FLD (f_srcdst); | |
2289 | { | |
2290 | SI opval = TRUNCDISI (tmp_temp); | |
2291 | * FLD (i_dst) = opval; | |
2292 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2293 | } | |
2294 | { | |
2295 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2296 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 2297 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 2298 | } |
7a292a7a | 2299 | } |
c906108c SS |
2300 | |
2301 | #undef FLD | |
2302 | } | |
2303 | NEXT (vpc); | |
2304 | ||
2305 | CASE (sem, INSN_EMUL1) : /* emul $lit1, $src2, $dst */ | |
2306 | { | |
2307 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2308 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2309 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2310 | int UNUSED written = 0; |
2311 | IADDR UNUSED pc = abuf->addr; | |
2312 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2313 | ||
7a292a7a | 2314 | { |
c906108c | 2315 | DI tmp_temp; |
7a292a7a | 2316 | SI tmp_dregno; |
c906108c SS |
2317 | tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (* FLD (i_src2))); |
2318 | tmp_dregno = FLD (f_srcdst); | |
2319 | { | |
2320 | SI opval = TRUNCDISI (tmp_temp); | |
2321 | * FLD (i_dst) = opval; | |
2322 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2323 | } | |
2324 | { | |
2325 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2326 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 2327 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 2328 | } |
7a292a7a | 2329 | } |
c906108c SS |
2330 | |
2331 | #undef FLD | |
2332 | } | |
2333 | NEXT (vpc); | |
2334 | ||
2335 | CASE (sem, INSN_EMUL2) : /* emul $src1, $lit2, $dst */ | |
2336 | { | |
2337 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2338 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2339 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2340 | int UNUSED written = 0; |
2341 | IADDR UNUSED pc = abuf->addr; | |
2342 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2343 | ||
7a292a7a | 2344 | { |
c906108c | 2345 | DI tmp_temp; |
7a292a7a | 2346 | SI tmp_dregno; |
c906108c SS |
2347 | tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (FLD (f_src2))); |
2348 | tmp_dregno = FLD (f_srcdst); | |
2349 | { | |
2350 | SI opval = TRUNCDISI (tmp_temp); | |
2351 | * FLD (i_dst) = opval; | |
2352 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2353 | } | |
2354 | { | |
2355 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2356 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 2357 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 2358 | } |
7a292a7a | 2359 | } |
c906108c SS |
2360 | |
2361 | #undef FLD | |
2362 | } | |
2363 | NEXT (vpc); | |
2364 | ||
2365 | CASE (sem, INSN_EMUL3) : /* emul $lit1, $lit2, $dst */ | |
2366 | { | |
2367 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2368 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2369 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2370 | int UNUSED written = 0; |
2371 | IADDR UNUSED pc = abuf->addr; | |
2372 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2373 | ||
7a292a7a | 2374 | { |
c906108c | 2375 | DI tmp_temp; |
7a292a7a | 2376 | SI tmp_dregno; |
c906108c SS |
2377 | tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (FLD (f_src2))); |
2378 | tmp_dregno = FLD (f_srcdst); | |
2379 | { | |
2380 | SI opval = TRUNCDISI (tmp_temp); | |
2381 | * FLD (i_dst) = opval; | |
2382 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2383 | } | |
2384 | { | |
2385 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2386 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 2387 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 2388 | } |
7a292a7a | 2389 | } |
c906108c SS |
2390 | |
2391 | #undef FLD | |
2392 | } | |
2393 | NEXT (vpc); | |
2394 | ||
2395 | CASE (sem, INSN_MOV) : /* mov $src1, $dst */ | |
2396 | { | |
2397 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2398 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2399 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2400 | int UNUSED written = 0; |
2401 | IADDR UNUSED pc = abuf->addr; | |
2402 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2403 | ||
2404 | { | |
2405 | SI opval = * FLD (i_src1); | |
2406 | * FLD (i_dst) = opval; | |
2407 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2408 | } | |
2409 | ||
2410 | #undef FLD | |
2411 | } | |
2412 | NEXT (vpc); | |
2413 | ||
2414 | CASE (sem, INSN_MOV1) : /* mov $lit1, $dst */ | |
2415 | { | |
2416 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2417 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2418 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2419 | int UNUSED written = 0; |
2420 | IADDR UNUSED pc = abuf->addr; | |
2421 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2422 | ||
2423 | { | |
2424 | SI opval = FLD (f_src1); | |
2425 | * FLD (i_dst) = opval; | |
2426 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2427 | } | |
2428 | ||
2429 | #undef FLD | |
2430 | } | |
2431 | NEXT (vpc); | |
2432 | ||
2433 | CASE (sem, INSN_MOVL) : /* movl $src1, $dst */ | |
2434 | { | |
2435 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2436 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2437 | #define FLD(f) abuf->fields.sfmt_movq.f |
c906108c SS |
2438 | int UNUSED written = 0; |
2439 | IADDR UNUSED pc = abuf->addr; | |
2440 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2441 | ||
7a292a7a | 2442 | { |
c906108c | 2443 | SI tmp_dregno; |
7a292a7a | 2444 | SI tmp_sregno; |
c906108c SS |
2445 | tmp_dregno = FLD (f_srcdst); |
2446 | tmp_sregno = FLD (f_src1); | |
2447 | { | |
2448 | SI opval = * FLD (i_src1); | |
2449 | * FLD (i_dst) = opval; | |
2450 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2451 | } | |
2452 | { | |
2453 | SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); | |
2454 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 2455 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 2456 | } |
7a292a7a | 2457 | } |
c906108c SS |
2458 | |
2459 | #undef FLD | |
2460 | } | |
2461 | NEXT (vpc); | |
2462 | ||
2463 | CASE (sem, INSN_MOVL1) : /* movl $lit1, $dst */ | |
2464 | { | |
2465 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2466 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2467 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2468 | int UNUSED written = 0; |
2469 | IADDR UNUSED pc = abuf->addr; | |
2470 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2471 | ||
7a292a7a | 2472 | { |
c906108c SS |
2473 | SI tmp_dregno; |
2474 | tmp_dregno = FLD (f_srcdst); | |
2475 | { | |
2476 | SI opval = FLD (f_src1); | |
2477 | * FLD (i_dst) = opval; | |
2478 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2479 | } | |
2480 | { | |
2481 | SI opval = 0; | |
2482 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 2483 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 2484 | } |
7a292a7a | 2485 | } |
c906108c SS |
2486 | |
2487 | #undef FLD | |
2488 | } | |
2489 | NEXT (vpc); | |
2490 | ||
2491 | CASE (sem, INSN_MOVT) : /* movt $src1, $dst */ | |
2492 | { | |
2493 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2494 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2495 | #define FLD(f) abuf->fields.sfmt_movq.f |
c906108c SS |
2496 | int UNUSED written = 0; |
2497 | IADDR UNUSED pc = abuf->addr; | |
2498 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2499 | ||
7a292a7a | 2500 | { |
c906108c | 2501 | SI tmp_dregno; |
7a292a7a | 2502 | SI tmp_sregno; |
c906108c SS |
2503 | tmp_dregno = FLD (f_srcdst); |
2504 | tmp_sregno = FLD (f_src1); | |
2505 | { | |
2506 | SI opval = * FLD (i_src1); | |
2507 | * FLD (i_dst) = opval; | |
2508 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2509 | } | |
2510 | { | |
2511 | SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); | |
2512 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 2513 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
2514 | } |
2515 | { | |
2516 | SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]); | |
2517 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 2518 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c | 2519 | } |
7a292a7a | 2520 | } |
c906108c SS |
2521 | |
2522 | #undef FLD | |
2523 | } | |
2524 | NEXT (vpc); | |
2525 | ||
2526 | CASE (sem, INSN_MOVT1) : /* movt $lit1, $dst */ | |
2527 | { | |
2528 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2529 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2530 | #define FLD(f) abuf->fields.sfmt_movq.f |
c906108c SS |
2531 | int UNUSED written = 0; |
2532 | IADDR UNUSED pc = abuf->addr; | |
2533 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2534 | ||
7a292a7a | 2535 | { |
c906108c SS |
2536 | SI tmp_dregno; |
2537 | tmp_dregno = FLD (f_srcdst); | |
2538 | { | |
2539 | SI opval = FLD (f_src1); | |
2540 | * FLD (i_dst) = opval; | |
2541 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2542 | } | |
2543 | { | |
2544 | SI opval = 0; | |
2545 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 2546 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
2547 | } |
2548 | { | |
2549 | SI opval = 0; | |
2550 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 2551 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c | 2552 | } |
7a292a7a | 2553 | } |
c906108c SS |
2554 | |
2555 | #undef FLD | |
2556 | } | |
2557 | NEXT (vpc); | |
2558 | ||
2559 | CASE (sem, INSN_MOVQ) : /* movq $src1, $dst */ | |
2560 | { | |
2561 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2562 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2563 | #define FLD(f) abuf->fields.sfmt_movq.f |
c906108c SS |
2564 | int UNUSED written = 0; |
2565 | IADDR UNUSED pc = abuf->addr; | |
2566 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2567 | ||
7a292a7a | 2568 | { |
c906108c | 2569 | SI tmp_dregno; |
7a292a7a | 2570 | SI tmp_sregno; |
c906108c SS |
2571 | tmp_dregno = FLD (f_srcdst); |
2572 | tmp_sregno = FLD (f_src1); | |
2573 | { | |
2574 | SI opval = * FLD (i_src1); | |
2575 | * FLD (i_dst) = opval; | |
2576 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2577 | } | |
2578 | { | |
2579 | SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); | |
2580 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 2581 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
2582 | } |
2583 | { | |
2584 | SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]); | |
2585 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 2586 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c SS |
2587 | } |
2588 | { | |
2589 | SI opval = CPU (h_gr[((FLD (f_src1)) + (3))]); | |
2590 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
104c1213 | 2591 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); |
c906108c | 2592 | } |
7a292a7a | 2593 | } |
c906108c SS |
2594 | |
2595 | #undef FLD | |
2596 | } | |
2597 | NEXT (vpc); | |
2598 | ||
2599 | CASE (sem, INSN_MOVQ1) : /* movq $lit1, $dst */ | |
2600 | { | |
2601 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2602 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2603 | #define FLD(f) abuf->fields.sfmt_movq.f |
c906108c SS |
2604 | int UNUSED written = 0; |
2605 | IADDR UNUSED pc = abuf->addr; | |
2606 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2607 | ||
7a292a7a | 2608 | { |
c906108c SS |
2609 | SI tmp_dregno; |
2610 | tmp_dregno = FLD (f_srcdst); | |
2611 | { | |
2612 | SI opval = FLD (f_src1); | |
2613 | * FLD (i_dst) = opval; | |
2614 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2615 | } | |
2616 | { | |
2617 | SI opval = 0; | |
2618 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 2619 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
2620 | } |
2621 | { | |
2622 | SI opval = 0; | |
2623 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 2624 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c SS |
2625 | } |
2626 | { | |
2627 | SI opval = 0; | |
2628 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
104c1213 | 2629 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); |
c906108c | 2630 | } |
7a292a7a | 2631 | } |
c906108c SS |
2632 | |
2633 | #undef FLD | |
2634 | } | |
2635 | NEXT (vpc); | |
2636 | ||
2637 | CASE (sem, INSN_MODPC) : /* modpc $src1, $src2, $dst */ | |
2638 | { | |
2639 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2640 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2641 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2642 | int UNUSED written = 0; |
2643 | IADDR UNUSED pc = abuf->addr; | |
2644 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2645 | ||
2646 | { | |
2647 | SI opval = * FLD (i_src2); | |
2648 | * FLD (i_dst) = opval; | |
2649 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2650 | } | |
2651 | ||
2652 | #undef FLD | |
2653 | } | |
2654 | NEXT (vpc); | |
2655 | ||
2656 | CASE (sem, INSN_MODAC) : /* modac $src1, $src2, $dst */ | |
2657 | { | |
2658 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2659 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2660 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2661 | int UNUSED written = 0; |
2662 | IADDR UNUSED pc = abuf->addr; | |
2663 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2664 | ||
2665 | { | |
2666 | SI opval = * FLD (i_src2); | |
2667 | * FLD (i_dst) = opval; | |
2668 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2669 | } | |
2670 | ||
2671 | #undef FLD | |
2672 | } | |
2673 | NEXT (vpc); | |
2674 | ||
2675 | CASE (sem, INSN_LDA_OFFSET) : /* lda $offset, $dst */ | |
2676 | { | |
2677 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2678 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2679 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2680 | int UNUSED written = 0; |
2681 | IADDR UNUSED pc = abuf->addr; | |
2682 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2683 | ||
2684 | { | |
2685 | SI opval = FLD (f_offset); | |
2686 | * FLD (i_dst) = opval; | |
2687 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2688 | } | |
2689 | ||
2690 | #undef FLD | |
2691 | } | |
2692 | NEXT (vpc); | |
2693 | ||
2694 | CASE (sem, INSN_LDA_INDIRECT_OFFSET) : /* lda $offset($abase), $dst */ | |
2695 | { | |
2696 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2697 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2698 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2699 | int UNUSED written = 0; |
2700 | IADDR UNUSED pc = abuf->addr; | |
2701 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2702 | ||
2703 | { | |
2704 | SI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
2705 | * FLD (i_dst) = opval; | |
2706 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2707 | } | |
2708 | ||
2709 | #undef FLD | |
2710 | } | |
2711 | NEXT (vpc); | |
2712 | ||
2713 | CASE (sem, INSN_LDA_INDIRECT) : /* lda ($abase), $dst */ | |
2714 | { | |
2715 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2716 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2717 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2718 | int UNUSED written = 0; |
2719 | IADDR UNUSED pc = abuf->addr; | |
2720 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2721 | ||
2722 | { | |
2723 | SI opval = * FLD (i_abase); | |
2724 | * FLD (i_dst) = opval; | |
2725 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2726 | } | |
2727 | ||
2728 | #undef FLD | |
2729 | } | |
2730 | NEXT (vpc); | |
2731 | ||
2732 | CASE (sem, INSN_LDA_INDIRECT_INDEX) : /* lda ($abase)[$index*S$scale], $dst */ | |
2733 | { | |
2734 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2735 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2736 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2737 | int UNUSED written = 0; |
2738 | IADDR UNUSED pc = abuf->addr; | |
2739 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2740 | ||
2741 | { | |
2742 | SI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
2743 | * FLD (i_dst) = opval; | |
2744 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2745 | } | |
2746 | ||
2747 | #undef FLD | |
2748 | } | |
2749 | NEXT (vpc); | |
2750 | ||
2751 | CASE (sem, INSN_LDA_DISP) : /* lda $optdisp, $dst */ | |
2752 | { | |
2753 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2754 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2755 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2756 | int UNUSED written = 0; |
2757 | IADDR UNUSED pc = abuf->addr; | |
2758 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2759 | ||
2760 | { | |
2761 | SI opval = FLD (f_optdisp); | |
2762 | * FLD (i_dst) = opval; | |
2763 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2764 | } | |
2765 | ||
2766 | #undef FLD | |
2767 | } | |
2768 | NEXT (vpc); | |
2769 | ||
2770 | CASE (sem, INSN_LDA_INDIRECT_DISP) : /* lda $optdisp($abase), $dst */ | |
2771 | { | |
2772 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2773 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2774 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2775 | int UNUSED written = 0; |
2776 | IADDR UNUSED pc = abuf->addr; | |
2777 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2778 | ||
2779 | { | |
2780 | SI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
2781 | * FLD (i_dst) = opval; | |
2782 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2783 | } | |
2784 | ||
2785 | #undef FLD | |
2786 | } | |
2787 | NEXT (vpc); | |
2788 | ||
2789 | CASE (sem, INSN_LDA_INDEX_DISP) : /* lda $optdisp[$index*S$scale], $dst */ | |
2790 | { | |
2791 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2792 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2793 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2794 | int UNUSED written = 0; |
2795 | IADDR UNUSED pc = abuf->addr; | |
2796 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2797 | ||
2798 | { | |
2799 | SI opval = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
2800 | * FLD (i_dst) = opval; | |
2801 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2802 | } | |
2803 | ||
2804 | #undef FLD | |
2805 | } | |
2806 | NEXT (vpc); | |
2807 | ||
2808 | CASE (sem, INSN_LDA_INDIRECT_INDEX_DISP) : /* lda $optdisp($abase)[$index*S$scale], $dst */ | |
2809 | { | |
2810 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2811 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2812 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2813 | int UNUSED written = 0; |
2814 | IADDR UNUSED pc = abuf->addr; | |
2815 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2816 | ||
2817 | { | |
2818 | SI opval = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
2819 | * FLD (i_dst) = opval; | |
2820 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2821 | } | |
2822 | ||
2823 | #undef FLD | |
2824 | } | |
2825 | NEXT (vpc); | |
2826 | ||
2827 | CASE (sem, INSN_LD_OFFSET) : /* ld $offset, $dst */ | |
2828 | { | |
2829 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2830 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2831 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2832 | int UNUSED written = 0; |
2833 | IADDR UNUSED pc = abuf->addr; | |
2834 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2835 | ||
2836 | { | |
2837 | SI opval = GETMEMSI (current_cpu, pc, FLD (f_offset)); | |
2838 | * FLD (i_dst) = opval; | |
2839 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2840 | } | |
2841 | ||
2842 | #undef FLD | |
2843 | } | |
2844 | NEXT (vpc); | |
2845 | ||
2846 | CASE (sem, INSN_LD_INDIRECT_OFFSET) : /* ld $offset($abase), $dst */ | |
2847 | { | |
2848 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2849 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2850 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2851 | int UNUSED written = 0; |
2852 | IADDR UNUSED pc = abuf->addr; | |
2853 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2854 | ||
2855 | { | |
2856 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
2857 | * FLD (i_dst) = opval; | |
2858 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2859 | } | |
2860 | ||
2861 | #undef FLD | |
2862 | } | |
2863 | NEXT (vpc); | |
2864 | ||
2865 | CASE (sem, INSN_LD_INDIRECT) : /* ld ($abase), $dst */ | |
2866 | { | |
2867 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2868 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2869 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2870 | int UNUSED written = 0; |
2871 | IADDR UNUSED pc = abuf->addr; | |
2872 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2873 | ||
2874 | { | |
2875 | SI opval = GETMEMSI (current_cpu, pc, * FLD (i_abase)); | |
2876 | * FLD (i_dst) = opval; | |
2877 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2878 | } | |
2879 | ||
2880 | #undef FLD | |
2881 | } | |
2882 | NEXT (vpc); | |
2883 | ||
2884 | CASE (sem, INSN_LD_INDIRECT_INDEX) : /* ld ($abase)[$index*S$scale], $dst */ | |
2885 | { | |
2886 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2887 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2888 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2889 | int UNUSED written = 0; |
2890 | IADDR UNUSED pc = abuf->addr; | |
2891 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2892 | ||
2893 | { | |
2894 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
2895 | * FLD (i_dst) = opval; | |
2896 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2897 | } | |
2898 | ||
2899 | #undef FLD | |
2900 | } | |
2901 | NEXT (vpc); | |
2902 | ||
2903 | CASE (sem, INSN_LD_DISP) : /* ld $optdisp, $dst */ | |
2904 | { | |
2905 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2906 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2907 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2908 | int UNUSED written = 0; |
2909 | IADDR UNUSED pc = abuf->addr; | |
2910 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2911 | ||
2912 | { | |
2913 | SI opval = GETMEMSI (current_cpu, pc, FLD (f_optdisp)); | |
2914 | * FLD (i_dst) = opval; | |
2915 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2916 | } | |
2917 | ||
2918 | #undef FLD | |
2919 | } | |
2920 | NEXT (vpc); | |
2921 | ||
2922 | CASE (sem, INSN_LD_INDIRECT_DISP) : /* ld $optdisp($abase), $dst */ | |
2923 | { | |
2924 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2925 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2926 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2927 | int UNUSED written = 0; |
2928 | IADDR UNUSED pc = abuf->addr; | |
2929 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2930 | ||
2931 | { | |
2932 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
2933 | * FLD (i_dst) = opval; | |
2934 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2935 | } | |
2936 | ||
2937 | #undef FLD | |
2938 | } | |
2939 | NEXT (vpc); | |
2940 | ||
2941 | CASE (sem, INSN_LD_INDEX_DISP) : /* ld $optdisp[$index*S$scale], $dst */ | |
2942 | { | |
2943 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2944 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2945 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2946 | int UNUSED written = 0; |
2947 | IADDR UNUSED pc = abuf->addr; | |
2948 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2949 | ||
2950 | { | |
2951 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
2952 | * FLD (i_dst) = opval; | |
2953 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2954 | } | |
2955 | ||
2956 | #undef FLD | |
2957 | } | |
2958 | NEXT (vpc); | |
2959 | ||
2960 | CASE (sem, INSN_LD_INDIRECT_INDEX_DISP) : /* ld $optdisp($abase)[$index*S$scale], $dst */ | |
2961 | { | |
2962 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2963 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2964 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2965 | int UNUSED written = 0; |
2966 | IADDR UNUSED pc = abuf->addr; | |
2967 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2968 | ||
2969 | { | |
2970 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
2971 | * FLD (i_dst) = opval; | |
2972 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2973 | } | |
2974 | ||
2975 | #undef FLD | |
2976 | } | |
2977 | NEXT (vpc); | |
2978 | ||
2979 | CASE (sem, INSN_LDOB_OFFSET) : /* ldob $offset, $dst */ | |
2980 | { | |
2981 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2982 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2983 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2984 | int UNUSED written = 0; |
2985 | IADDR UNUSED pc = abuf->addr; | |
2986 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2987 | ||
2988 | { | |
2989 | SI opval = GETMEMUQI (current_cpu, pc, FLD (f_offset)); | |
2990 | * FLD (i_dst) = opval; | |
2991 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2992 | } | |
2993 | ||
2994 | #undef FLD | |
2995 | } | |
2996 | NEXT (vpc); | |
2997 | ||
2998 | CASE (sem, INSN_LDOB_INDIRECT_OFFSET) : /* ldob $offset($abase), $dst */ | |
2999 | { | |
3000 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3001 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3002 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3003 | int UNUSED written = 0; |
3004 | IADDR UNUSED pc = abuf->addr; | |
3005 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3006 | ||
3007 | { | |
3008 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3009 | * FLD (i_dst) = opval; | |
3010 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3011 | } | |
3012 | ||
3013 | #undef FLD | |
3014 | } | |
3015 | NEXT (vpc); | |
3016 | ||
3017 | CASE (sem, INSN_LDOB_INDIRECT) : /* ldob ($abase), $dst */ | |
3018 | { | |
3019 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3020 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3021 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3022 | int UNUSED written = 0; |
3023 | IADDR UNUSED pc = abuf->addr; | |
3024 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3025 | ||
3026 | { | |
3027 | SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_abase)); | |
3028 | * FLD (i_dst) = opval; | |
3029 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3030 | } | |
3031 | ||
3032 | #undef FLD | |
3033 | } | |
3034 | NEXT (vpc); | |
3035 | ||
3036 | CASE (sem, INSN_LDOB_INDIRECT_INDEX) : /* ldob ($abase)[$index*S$scale], $dst */ | |
3037 | { | |
3038 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3039 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3040 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3041 | int UNUSED written = 0; |
3042 | IADDR UNUSED pc = abuf->addr; | |
3043 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3044 | ||
3045 | { | |
3046 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3047 | * FLD (i_dst) = opval; | |
3048 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3049 | } | |
3050 | ||
3051 | #undef FLD | |
3052 | } | |
3053 | NEXT (vpc); | |
3054 | ||
3055 | CASE (sem, INSN_LDOB_DISP) : /* ldob $optdisp, $dst */ | |
3056 | { | |
3057 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3058 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3059 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3060 | int UNUSED written = 0; |
3061 | IADDR UNUSED pc = abuf->addr; | |
3062 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3063 | ||
3064 | { | |
3065 | SI opval = GETMEMUQI (current_cpu, pc, FLD (f_optdisp)); | |
3066 | * FLD (i_dst) = opval; | |
3067 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3068 | } | |
3069 | ||
3070 | #undef FLD | |
3071 | } | |
3072 | NEXT (vpc); | |
3073 | ||
3074 | CASE (sem, INSN_LDOB_INDIRECT_DISP) : /* ldob $optdisp($abase), $dst */ | |
3075 | { | |
3076 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3077 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3078 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3079 | int UNUSED written = 0; |
3080 | IADDR UNUSED pc = abuf->addr; | |
3081 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3082 | ||
3083 | { | |
3084 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3085 | * FLD (i_dst) = opval; | |
3086 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3087 | } | |
3088 | ||
3089 | #undef FLD | |
3090 | } | |
3091 | NEXT (vpc); | |
3092 | ||
3093 | CASE (sem, INSN_LDOB_INDEX_DISP) : /* ldob $optdisp[$index*S$scale], $dst */ | |
3094 | { | |
3095 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3096 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3097 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3098 | int UNUSED written = 0; |
3099 | IADDR UNUSED pc = abuf->addr; | |
3100 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3101 | ||
3102 | { | |
3103 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3104 | * FLD (i_dst) = opval; | |
3105 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3106 | } | |
3107 | ||
3108 | #undef FLD | |
3109 | } | |
3110 | NEXT (vpc); | |
3111 | ||
3112 | CASE (sem, INSN_LDOB_INDIRECT_INDEX_DISP) : /* ldob $optdisp($abase)[$index*S$scale], $dst */ | |
3113 | { | |
3114 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3115 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3116 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3117 | int UNUSED written = 0; |
3118 | IADDR UNUSED pc = abuf->addr; | |
3119 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3120 | ||
3121 | { | |
3122 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3123 | * FLD (i_dst) = opval; | |
3124 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3125 | } | |
3126 | ||
3127 | #undef FLD | |
3128 | } | |
3129 | NEXT (vpc); | |
3130 | ||
3131 | CASE (sem, INSN_LDOS_OFFSET) : /* ldos $offset, $dst */ | |
3132 | { | |
3133 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3134 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3135 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3136 | int UNUSED written = 0; |
3137 | IADDR UNUSED pc = abuf->addr; | |
3138 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3139 | ||
3140 | { | |
3141 | SI opval = GETMEMUHI (current_cpu, pc, FLD (f_offset)); | |
3142 | * FLD (i_dst) = opval; | |
3143 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3144 | } | |
3145 | ||
3146 | #undef FLD | |
3147 | } | |
3148 | NEXT (vpc); | |
3149 | ||
3150 | CASE (sem, INSN_LDOS_INDIRECT_OFFSET) : /* ldos $offset($abase), $dst */ | |
3151 | { | |
3152 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3153 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3154 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3155 | int UNUSED written = 0; |
3156 | IADDR UNUSED pc = abuf->addr; | |
3157 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3158 | ||
3159 | { | |
3160 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3161 | * FLD (i_dst) = opval; | |
3162 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3163 | } | |
3164 | ||
3165 | #undef FLD | |
3166 | } | |
3167 | NEXT (vpc); | |
3168 | ||
3169 | CASE (sem, INSN_LDOS_INDIRECT) : /* ldos ($abase), $dst */ | |
3170 | { | |
3171 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3172 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3173 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3174 | int UNUSED written = 0; |
3175 | IADDR UNUSED pc = abuf->addr; | |
3176 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3177 | ||
3178 | { | |
3179 | SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_abase)); | |
3180 | * FLD (i_dst) = opval; | |
3181 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3182 | } | |
3183 | ||
3184 | #undef FLD | |
3185 | } | |
3186 | NEXT (vpc); | |
3187 | ||
3188 | CASE (sem, INSN_LDOS_INDIRECT_INDEX) : /* ldos ($abase)[$index*S$scale], $dst */ | |
3189 | { | |
3190 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3191 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3192 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3193 | int UNUSED written = 0; |
3194 | IADDR UNUSED pc = abuf->addr; | |
3195 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3196 | ||
3197 | { | |
3198 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3199 | * FLD (i_dst) = opval; | |
3200 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3201 | } | |
3202 | ||
3203 | #undef FLD | |
3204 | } | |
3205 | NEXT (vpc); | |
3206 | ||
3207 | CASE (sem, INSN_LDOS_DISP) : /* ldos $optdisp, $dst */ | |
3208 | { | |
3209 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3210 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3211 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3212 | int UNUSED written = 0; |
3213 | IADDR UNUSED pc = abuf->addr; | |
3214 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3215 | ||
3216 | { | |
3217 | SI opval = GETMEMUHI (current_cpu, pc, FLD (f_optdisp)); | |
3218 | * FLD (i_dst) = opval; | |
3219 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3220 | } | |
3221 | ||
3222 | #undef FLD | |
3223 | } | |
3224 | NEXT (vpc); | |
3225 | ||
3226 | CASE (sem, INSN_LDOS_INDIRECT_DISP) : /* ldos $optdisp($abase), $dst */ | |
3227 | { | |
3228 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3229 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3230 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3231 | int UNUSED written = 0; |
3232 | IADDR UNUSED pc = abuf->addr; | |
3233 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3234 | ||
3235 | { | |
3236 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3237 | * FLD (i_dst) = opval; | |
3238 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3239 | } | |
3240 | ||
3241 | #undef FLD | |
3242 | } | |
3243 | NEXT (vpc); | |
3244 | ||
3245 | CASE (sem, INSN_LDOS_INDEX_DISP) : /* ldos $optdisp[$index*S$scale], $dst */ | |
3246 | { | |
3247 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3248 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3249 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3250 | int UNUSED written = 0; |
3251 | IADDR UNUSED pc = abuf->addr; | |
3252 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3253 | ||
3254 | { | |
3255 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3256 | * FLD (i_dst) = opval; | |
3257 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3258 | } | |
3259 | ||
3260 | #undef FLD | |
3261 | } | |
3262 | NEXT (vpc); | |
3263 | ||
3264 | CASE (sem, INSN_LDOS_INDIRECT_INDEX_DISP) : /* ldos $optdisp($abase)[$index*S$scale], $dst */ | |
3265 | { | |
3266 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3267 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3268 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3269 | int UNUSED written = 0; |
3270 | IADDR UNUSED pc = abuf->addr; | |
3271 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3272 | ||
3273 | { | |
3274 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3275 | * FLD (i_dst) = opval; | |
3276 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3277 | } | |
3278 | ||
3279 | #undef FLD | |
3280 | } | |
3281 | NEXT (vpc); | |
3282 | ||
3283 | CASE (sem, INSN_LDIB_OFFSET) : /* ldib $offset, $dst */ | |
3284 | { | |
3285 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3286 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3287 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3288 | int UNUSED written = 0; |
3289 | IADDR UNUSED pc = abuf->addr; | |
3290 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3291 | ||
3292 | { | |
3293 | SI opval = GETMEMQI (current_cpu, pc, FLD (f_offset)); | |
3294 | * FLD (i_dst) = opval; | |
3295 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3296 | } | |
3297 | ||
3298 | #undef FLD | |
3299 | } | |
3300 | NEXT (vpc); | |
3301 | ||
3302 | CASE (sem, INSN_LDIB_INDIRECT_OFFSET) : /* ldib $offset($abase), $dst */ | |
3303 | { | |
3304 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3305 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3306 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3307 | int UNUSED written = 0; |
3308 | IADDR UNUSED pc = abuf->addr; | |
3309 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3310 | ||
3311 | { | |
3312 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3313 | * FLD (i_dst) = opval; | |
3314 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3315 | } | |
3316 | ||
3317 | #undef FLD | |
3318 | } | |
3319 | NEXT (vpc); | |
3320 | ||
3321 | CASE (sem, INSN_LDIB_INDIRECT) : /* ldib ($abase), $dst */ | |
3322 | { | |
3323 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3324 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3325 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3326 | int UNUSED written = 0; |
3327 | IADDR UNUSED pc = abuf->addr; | |
3328 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3329 | ||
3330 | { | |
3331 | SI opval = GETMEMQI (current_cpu, pc, * FLD (i_abase)); | |
3332 | * FLD (i_dst) = opval; | |
3333 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3334 | } | |
3335 | ||
3336 | #undef FLD | |
3337 | } | |
3338 | NEXT (vpc); | |
3339 | ||
3340 | CASE (sem, INSN_LDIB_INDIRECT_INDEX) : /* ldib ($abase)[$index*S$scale], $dst */ | |
3341 | { | |
3342 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3343 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3344 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3345 | int UNUSED written = 0; |
3346 | IADDR UNUSED pc = abuf->addr; | |
3347 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3348 | ||
3349 | { | |
3350 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3351 | * FLD (i_dst) = opval; | |
3352 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3353 | } | |
3354 | ||
3355 | #undef FLD | |
3356 | } | |
3357 | NEXT (vpc); | |
3358 | ||
3359 | CASE (sem, INSN_LDIB_DISP) : /* ldib $optdisp, $dst */ | |
3360 | { | |
3361 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3362 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3363 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3364 | int UNUSED written = 0; |
3365 | IADDR UNUSED pc = abuf->addr; | |
3366 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3367 | ||
3368 | { | |
3369 | SI opval = GETMEMQI (current_cpu, pc, FLD (f_optdisp)); | |
3370 | * FLD (i_dst) = opval; | |
3371 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3372 | } | |
3373 | ||
3374 | #undef FLD | |
3375 | } | |
3376 | NEXT (vpc); | |
3377 | ||
3378 | CASE (sem, INSN_LDIB_INDIRECT_DISP) : /* ldib $optdisp($abase), $dst */ | |
3379 | { | |
3380 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3381 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3382 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3383 | int UNUSED written = 0; |
3384 | IADDR UNUSED pc = abuf->addr; | |
3385 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3386 | ||
3387 | { | |
3388 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3389 | * FLD (i_dst) = opval; | |
3390 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3391 | } | |
3392 | ||
3393 | #undef FLD | |
3394 | } | |
3395 | NEXT (vpc); | |
3396 | ||
3397 | CASE (sem, INSN_LDIB_INDEX_DISP) : /* ldib $optdisp[$index*S$scale], $dst */ | |
3398 | { | |
3399 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3400 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3401 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3402 | int UNUSED written = 0; |
3403 | IADDR UNUSED pc = abuf->addr; | |
3404 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3405 | ||
3406 | { | |
3407 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3408 | * FLD (i_dst) = opval; | |
3409 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3410 | } | |
3411 | ||
3412 | #undef FLD | |
3413 | } | |
3414 | NEXT (vpc); | |
3415 | ||
3416 | CASE (sem, INSN_LDIB_INDIRECT_INDEX_DISP) : /* ldib $optdisp($abase)[$index*S$scale], $dst */ | |
3417 | { | |
3418 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3419 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3420 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3421 | int UNUSED written = 0; |
3422 | IADDR UNUSED pc = abuf->addr; | |
3423 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3424 | ||
3425 | { | |
3426 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3427 | * FLD (i_dst) = opval; | |
3428 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3429 | } | |
3430 | ||
3431 | #undef FLD | |
3432 | } | |
3433 | NEXT (vpc); | |
3434 | ||
3435 | CASE (sem, INSN_LDIS_OFFSET) : /* ldis $offset, $dst */ | |
3436 | { | |
3437 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3438 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3439 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3440 | int UNUSED written = 0; |
3441 | IADDR UNUSED pc = abuf->addr; | |
3442 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3443 | ||
3444 | { | |
3445 | SI opval = GETMEMHI (current_cpu, pc, FLD (f_offset)); | |
3446 | * FLD (i_dst) = opval; | |
3447 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3448 | } | |
3449 | ||
3450 | #undef FLD | |
3451 | } | |
3452 | NEXT (vpc); | |
3453 | ||
3454 | CASE (sem, INSN_LDIS_INDIRECT_OFFSET) : /* ldis $offset($abase), $dst */ | |
3455 | { | |
3456 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3457 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3458 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3459 | int UNUSED written = 0; |
3460 | IADDR UNUSED pc = abuf->addr; | |
3461 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3462 | ||
3463 | { | |
3464 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3465 | * FLD (i_dst) = opval; | |
3466 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3467 | } | |
3468 | ||
3469 | #undef FLD | |
3470 | } | |
3471 | NEXT (vpc); | |
3472 | ||
3473 | CASE (sem, INSN_LDIS_INDIRECT) : /* ldis ($abase), $dst */ | |
3474 | { | |
3475 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3476 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3477 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3478 | int UNUSED written = 0; |
3479 | IADDR UNUSED pc = abuf->addr; | |
3480 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3481 | ||
3482 | { | |
3483 | SI opval = GETMEMHI (current_cpu, pc, * FLD (i_abase)); | |
3484 | * FLD (i_dst) = opval; | |
3485 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3486 | } | |
3487 | ||
3488 | #undef FLD | |
3489 | } | |
3490 | NEXT (vpc); | |
3491 | ||
3492 | CASE (sem, INSN_LDIS_INDIRECT_INDEX) : /* ldis ($abase)[$index*S$scale], $dst */ | |
3493 | { | |
3494 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3495 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3496 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3497 | int UNUSED written = 0; |
3498 | IADDR UNUSED pc = abuf->addr; | |
3499 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3500 | ||
3501 | { | |
3502 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3503 | * FLD (i_dst) = opval; | |
3504 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3505 | } | |
3506 | ||
3507 | #undef FLD | |
3508 | } | |
3509 | NEXT (vpc); | |
3510 | ||
3511 | CASE (sem, INSN_LDIS_DISP) : /* ldis $optdisp, $dst */ | |
3512 | { | |
3513 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3514 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3515 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3516 | int UNUSED written = 0; |
3517 | IADDR UNUSED pc = abuf->addr; | |
3518 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3519 | ||
3520 | { | |
3521 | SI opval = GETMEMHI (current_cpu, pc, FLD (f_optdisp)); | |
3522 | * FLD (i_dst) = opval; | |
3523 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3524 | } | |
3525 | ||
3526 | #undef FLD | |
3527 | } | |
3528 | NEXT (vpc); | |
3529 | ||
3530 | CASE (sem, INSN_LDIS_INDIRECT_DISP) : /* ldis $optdisp($abase), $dst */ | |
3531 | { | |
3532 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3533 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3534 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3535 | int UNUSED written = 0; |
3536 | IADDR UNUSED pc = abuf->addr; | |
3537 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3538 | ||
3539 | { | |
3540 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3541 | * FLD (i_dst) = opval; | |
3542 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3543 | } | |
3544 | ||
3545 | #undef FLD | |
3546 | } | |
3547 | NEXT (vpc); | |
3548 | ||
3549 | CASE (sem, INSN_LDIS_INDEX_DISP) : /* ldis $optdisp[$index*S$scale], $dst */ | |
3550 | { | |
3551 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3552 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3553 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3554 | int UNUSED written = 0; |
3555 | IADDR UNUSED pc = abuf->addr; | |
3556 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3557 | ||
3558 | { | |
3559 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3560 | * FLD (i_dst) = opval; | |
3561 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3562 | } | |
3563 | ||
3564 | #undef FLD | |
3565 | } | |
3566 | NEXT (vpc); | |
3567 | ||
3568 | CASE (sem, INSN_LDIS_INDIRECT_INDEX_DISP) : /* ldis $optdisp($abase)[$index*S$scale], $dst */ | |
3569 | { | |
3570 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3571 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3572 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3573 | int UNUSED written = 0; |
3574 | IADDR UNUSED pc = abuf->addr; | |
3575 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3576 | ||
3577 | { | |
3578 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3579 | * FLD (i_dst) = opval; | |
3580 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3581 | } | |
3582 | ||
3583 | #undef FLD | |
3584 | } | |
3585 | NEXT (vpc); | |
3586 | ||
3587 | CASE (sem, INSN_LDL_OFFSET) : /* ldl $offset, $dst */ | |
3588 | { | |
3589 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3590 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3591 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3592 | int UNUSED written = 0; |
3593 | IADDR UNUSED pc = abuf->addr; | |
3594 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3595 | ||
7a292a7a | 3596 | { |
c906108c | 3597 | SI tmp_temp; |
7a292a7a | 3598 | SI tmp_dregno; |
c906108c SS |
3599 | tmp_dregno = FLD (f_srcdst); |
3600 | tmp_temp = FLD (f_offset); | |
3601 | { | |
3602 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3603 | * FLD (i_dst) = opval; | |
3604 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3605 | } | |
3606 | { | |
3607 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3608 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3609 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 3610 | } |
7a292a7a | 3611 | } |
c906108c SS |
3612 | |
3613 | #undef FLD | |
3614 | } | |
3615 | NEXT (vpc); | |
3616 | ||
3617 | CASE (sem, INSN_LDL_INDIRECT_OFFSET) : /* ldl $offset($abase), $dst */ | |
3618 | { | |
3619 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3620 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3621 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3622 | int UNUSED written = 0; |
3623 | IADDR UNUSED pc = abuf->addr; | |
3624 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3625 | ||
7a292a7a | 3626 | { |
c906108c | 3627 | SI tmp_temp; |
7a292a7a | 3628 | SI tmp_dregno; |
c906108c SS |
3629 | tmp_dregno = FLD (f_srcdst); |
3630 | tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
3631 | { | |
3632 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3633 | * FLD (i_dst) = opval; | |
3634 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3635 | } | |
3636 | { | |
3637 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3638 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3639 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 3640 | } |
7a292a7a | 3641 | } |
c906108c SS |
3642 | |
3643 | #undef FLD | |
3644 | } | |
3645 | NEXT (vpc); | |
3646 | ||
3647 | CASE (sem, INSN_LDL_INDIRECT) : /* ldl ($abase), $dst */ | |
3648 | { | |
3649 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3650 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3651 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3652 | int UNUSED written = 0; |
3653 | IADDR UNUSED pc = abuf->addr; | |
3654 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3655 | ||
7a292a7a | 3656 | { |
c906108c | 3657 | SI tmp_temp; |
7a292a7a | 3658 | SI tmp_dregno; |
c906108c SS |
3659 | tmp_dregno = FLD (f_srcdst); |
3660 | tmp_temp = * FLD (i_abase); | |
3661 | { | |
3662 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3663 | * FLD (i_dst) = opval; | |
3664 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3665 | } | |
3666 | { | |
3667 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3668 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3669 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 3670 | } |
7a292a7a | 3671 | } |
c906108c SS |
3672 | |
3673 | #undef FLD | |
3674 | } | |
3675 | NEXT (vpc); | |
3676 | ||
3677 | CASE (sem, INSN_LDL_INDIRECT_INDEX) : /* ldl ($abase)[$index*S$scale], $dst */ | |
3678 | { | |
3679 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3680 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3681 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3682 | int UNUSED written = 0; |
3683 | IADDR UNUSED pc = abuf->addr; | |
3684 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3685 | ||
7a292a7a | 3686 | { |
c906108c | 3687 | SI tmp_temp; |
7a292a7a | 3688 | SI tmp_dregno; |
c906108c SS |
3689 | tmp_dregno = FLD (f_srcdst); |
3690 | tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
3691 | { | |
3692 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3693 | * FLD (i_dst) = opval; | |
3694 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3695 | } | |
3696 | { | |
3697 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3698 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3699 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 3700 | } |
7a292a7a | 3701 | } |
c906108c SS |
3702 | |
3703 | #undef FLD | |
3704 | } | |
3705 | NEXT (vpc); | |
3706 | ||
3707 | CASE (sem, INSN_LDL_DISP) : /* ldl $optdisp, $dst */ | |
3708 | { | |
3709 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3710 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3711 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3712 | int UNUSED written = 0; |
3713 | IADDR UNUSED pc = abuf->addr; | |
3714 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3715 | ||
7a292a7a | 3716 | { |
c906108c | 3717 | SI tmp_temp; |
7a292a7a | 3718 | SI tmp_dregno; |
c906108c SS |
3719 | tmp_dregno = FLD (f_srcdst); |
3720 | tmp_temp = FLD (f_optdisp); | |
3721 | { | |
3722 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3723 | * FLD (i_dst) = opval; | |
3724 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3725 | } | |
3726 | { | |
3727 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3728 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3729 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 3730 | } |
7a292a7a | 3731 | } |
c906108c SS |
3732 | |
3733 | #undef FLD | |
3734 | } | |
3735 | NEXT (vpc); | |
3736 | ||
3737 | CASE (sem, INSN_LDL_INDIRECT_DISP) : /* ldl $optdisp($abase), $dst */ | |
3738 | { | |
3739 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3740 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3741 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3742 | int UNUSED written = 0; |
3743 | IADDR UNUSED pc = abuf->addr; | |
3744 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3745 | ||
7a292a7a | 3746 | { |
c906108c | 3747 | SI tmp_temp; |
7a292a7a | 3748 | SI tmp_dregno; |
c906108c SS |
3749 | tmp_dregno = FLD (f_srcdst); |
3750 | tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
3751 | { | |
3752 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3753 | * FLD (i_dst) = opval; | |
3754 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3755 | } | |
3756 | { | |
3757 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3758 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3759 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 3760 | } |
7a292a7a | 3761 | } |
c906108c SS |
3762 | |
3763 | #undef FLD | |
3764 | } | |
3765 | NEXT (vpc); | |
3766 | ||
3767 | CASE (sem, INSN_LDL_INDEX_DISP) : /* ldl $optdisp[$index*S$scale], $dst */ | |
3768 | { | |
3769 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3770 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3771 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3772 | int UNUSED written = 0; |
3773 | IADDR UNUSED pc = abuf->addr; | |
3774 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3775 | ||
7a292a7a | 3776 | { |
c906108c | 3777 | SI tmp_temp; |
7a292a7a | 3778 | SI tmp_dregno; |
c906108c SS |
3779 | tmp_dregno = FLD (f_srcdst); |
3780 | tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
3781 | { | |
3782 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3783 | * FLD (i_dst) = opval; | |
3784 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3785 | } | |
3786 | { | |
3787 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3788 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3789 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 3790 | } |
7a292a7a | 3791 | } |
c906108c SS |
3792 | |
3793 | #undef FLD | |
3794 | } | |
3795 | NEXT (vpc); | |
3796 | ||
3797 | CASE (sem, INSN_LDL_INDIRECT_INDEX_DISP) : /* ldl $optdisp($abase)[$index*S$scale], $dst */ | |
3798 | { | |
3799 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3800 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3801 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3802 | int UNUSED written = 0; |
3803 | IADDR UNUSED pc = abuf->addr; | |
3804 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3805 | ||
7a292a7a | 3806 | { |
c906108c | 3807 | SI tmp_temp; |
7a292a7a | 3808 | SI tmp_dregno; |
c906108c SS |
3809 | tmp_dregno = FLD (f_srcdst); |
3810 | tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3811 | { | |
3812 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3813 | * FLD (i_dst) = opval; | |
3814 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3815 | } | |
3816 | { | |
3817 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3818 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3819 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c | 3820 | } |
7a292a7a | 3821 | } |
c906108c SS |
3822 | |
3823 | #undef FLD | |
3824 | } | |
3825 | NEXT (vpc); | |
3826 | ||
3827 | CASE (sem, INSN_LDT_OFFSET) : /* ldt $offset, $dst */ | |
3828 | { | |
3829 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3830 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3831 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3832 | int UNUSED written = 0; |
3833 | IADDR UNUSED pc = abuf->addr; | |
3834 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3835 | ||
7a292a7a | 3836 | { |
c906108c | 3837 | SI tmp_temp; |
7a292a7a | 3838 | SI tmp_dregno; |
c906108c SS |
3839 | tmp_dregno = FLD (f_srcdst); |
3840 | tmp_temp = FLD (f_offset); | |
3841 | { | |
3842 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3843 | * FLD (i_dst) = opval; | |
3844 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3845 | } | |
3846 | { | |
3847 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3848 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3849 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
3850 | } |
3851 | { | |
3852 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3853 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 3854 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c | 3855 | } |
7a292a7a | 3856 | } |
c906108c SS |
3857 | |
3858 | #undef FLD | |
3859 | } | |
3860 | NEXT (vpc); | |
3861 | ||
3862 | CASE (sem, INSN_LDT_INDIRECT_OFFSET) : /* ldt $offset($abase), $dst */ | |
3863 | { | |
3864 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3865 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3866 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3867 | int UNUSED written = 0; |
3868 | IADDR UNUSED pc = abuf->addr; | |
3869 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3870 | ||
7a292a7a | 3871 | { |
c906108c | 3872 | SI tmp_temp; |
7a292a7a | 3873 | SI tmp_dregno; |
c906108c SS |
3874 | tmp_dregno = FLD (f_srcdst); |
3875 | tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
3876 | { | |
3877 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3878 | * FLD (i_dst) = opval; | |
3879 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3880 | } | |
3881 | { | |
3882 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3883 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3884 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
3885 | } |
3886 | { | |
3887 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3888 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 3889 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c | 3890 | } |
7a292a7a | 3891 | } |
c906108c SS |
3892 | |
3893 | #undef FLD | |
3894 | } | |
3895 | NEXT (vpc); | |
3896 | ||
3897 | CASE (sem, INSN_LDT_INDIRECT) : /* ldt ($abase), $dst */ | |
3898 | { | |
3899 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3900 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3901 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3902 | int UNUSED written = 0; |
3903 | IADDR UNUSED pc = abuf->addr; | |
3904 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3905 | ||
7a292a7a | 3906 | { |
c906108c | 3907 | SI tmp_temp; |
7a292a7a | 3908 | SI tmp_dregno; |
c906108c SS |
3909 | tmp_dregno = FLD (f_srcdst); |
3910 | tmp_temp = * FLD (i_abase); | |
3911 | { | |
3912 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3913 | * FLD (i_dst) = opval; | |
3914 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3915 | } | |
3916 | { | |
3917 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3918 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3919 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
3920 | } |
3921 | { | |
3922 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3923 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 3924 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c | 3925 | } |
7a292a7a | 3926 | } |
c906108c SS |
3927 | |
3928 | #undef FLD | |
3929 | } | |
3930 | NEXT (vpc); | |
3931 | ||
3932 | CASE (sem, INSN_LDT_INDIRECT_INDEX) : /* ldt ($abase)[$index*S$scale], $dst */ | |
3933 | { | |
3934 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3935 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3936 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3937 | int UNUSED written = 0; |
3938 | IADDR UNUSED pc = abuf->addr; | |
3939 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3940 | ||
7a292a7a | 3941 | { |
c906108c | 3942 | SI tmp_temp; |
7a292a7a | 3943 | SI tmp_dregno; |
c906108c SS |
3944 | tmp_dregno = FLD (f_srcdst); |
3945 | tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
3946 | { | |
3947 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3948 | * FLD (i_dst) = opval; | |
3949 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3950 | } | |
3951 | { | |
3952 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3953 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3954 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
3955 | } |
3956 | { | |
3957 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3958 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 3959 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c | 3960 | } |
7a292a7a | 3961 | } |
c906108c SS |
3962 | |
3963 | #undef FLD | |
3964 | } | |
3965 | NEXT (vpc); | |
3966 | ||
3967 | CASE (sem, INSN_LDT_DISP) : /* ldt $optdisp, $dst */ | |
3968 | { | |
3969 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3970 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3971 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3972 | int UNUSED written = 0; |
3973 | IADDR UNUSED pc = abuf->addr; | |
3974 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3975 | ||
7a292a7a | 3976 | { |
c906108c | 3977 | SI tmp_temp; |
7a292a7a | 3978 | SI tmp_dregno; |
c906108c SS |
3979 | tmp_dregno = FLD (f_srcdst); |
3980 | tmp_temp = FLD (f_optdisp); | |
3981 | { | |
3982 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3983 | * FLD (i_dst) = opval; | |
3984 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3985 | } | |
3986 | { | |
3987 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3988 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 3989 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
3990 | } |
3991 | { | |
3992 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3993 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 3994 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c | 3995 | } |
7a292a7a | 3996 | } |
c906108c SS |
3997 | |
3998 | #undef FLD | |
3999 | } | |
4000 | NEXT (vpc); | |
4001 | ||
4002 | CASE (sem, INSN_LDT_INDIRECT_DISP) : /* ldt $optdisp($abase), $dst */ | |
4003 | { | |
4004 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4005 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4006 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4007 | int UNUSED written = 0; |
4008 | IADDR UNUSED pc = abuf->addr; | |
4009 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4010 | ||
7a292a7a | 4011 | { |
c906108c | 4012 | SI tmp_temp; |
7a292a7a | 4013 | SI tmp_dregno; |
c906108c SS |
4014 | tmp_dregno = FLD (f_srcdst); |
4015 | tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
4016 | { | |
4017 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4018 | * FLD (i_dst) = opval; | |
4019 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4020 | } | |
4021 | { | |
4022 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4023 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4024 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4025 | } |
4026 | { | |
4027 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4028 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4029 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c | 4030 | } |
7a292a7a | 4031 | } |
c906108c SS |
4032 | |
4033 | #undef FLD | |
4034 | } | |
4035 | NEXT (vpc); | |
4036 | ||
4037 | CASE (sem, INSN_LDT_INDEX_DISP) : /* ldt $optdisp[$index*S$scale], $dst */ | |
4038 | { | |
4039 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4040 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4041 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4042 | int UNUSED written = 0; |
4043 | IADDR UNUSED pc = abuf->addr; | |
4044 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4045 | ||
7a292a7a | 4046 | { |
c906108c | 4047 | SI tmp_temp; |
7a292a7a | 4048 | SI tmp_dregno; |
c906108c SS |
4049 | tmp_dregno = FLD (f_srcdst); |
4050 | tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
4051 | { | |
4052 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4053 | * FLD (i_dst) = opval; | |
4054 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4055 | } | |
4056 | { | |
4057 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4058 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4059 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4060 | } |
4061 | { | |
4062 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4063 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4064 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c | 4065 | } |
7a292a7a | 4066 | } |
c906108c SS |
4067 | |
4068 | #undef FLD | |
4069 | } | |
4070 | NEXT (vpc); | |
4071 | ||
4072 | CASE (sem, INSN_LDT_INDIRECT_INDEX_DISP) : /* ldt $optdisp($abase)[$index*S$scale], $dst */ | |
4073 | { | |
4074 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4075 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4076 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4077 | int UNUSED written = 0; |
4078 | IADDR UNUSED pc = abuf->addr; | |
4079 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4080 | ||
7a292a7a | 4081 | { |
c906108c | 4082 | SI tmp_temp; |
7a292a7a | 4083 | SI tmp_dregno; |
c906108c SS |
4084 | tmp_dregno = FLD (f_srcdst); |
4085 | tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
4086 | { | |
4087 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4088 | * FLD (i_dst) = opval; | |
4089 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4090 | } | |
4091 | { | |
4092 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4093 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4094 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4095 | } |
4096 | { | |
4097 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4098 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4099 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c | 4100 | } |
7a292a7a | 4101 | } |
c906108c SS |
4102 | |
4103 | #undef FLD | |
4104 | } | |
4105 | NEXT (vpc); | |
4106 | ||
4107 | CASE (sem, INSN_LDQ_OFFSET) : /* ldq $offset, $dst */ | |
4108 | { | |
4109 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4110 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4111 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
4112 | int UNUSED written = 0; |
4113 | IADDR UNUSED pc = abuf->addr; | |
4114 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4115 | ||
7a292a7a | 4116 | { |
c906108c | 4117 | SI tmp_temp; |
7a292a7a | 4118 | SI tmp_dregno; |
c906108c SS |
4119 | tmp_dregno = FLD (f_srcdst); |
4120 | tmp_temp = FLD (f_offset); | |
4121 | { | |
4122 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4123 | * FLD (i_dst) = opval; | |
4124 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4125 | } | |
4126 | { | |
4127 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4128 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4129 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4130 | } |
4131 | { | |
4132 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4133 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4134 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c SS |
4135 | } |
4136 | { | |
4137 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4138 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
104c1213 | 4139 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); |
c906108c | 4140 | } |
7a292a7a | 4141 | } |
c906108c SS |
4142 | |
4143 | #undef FLD | |
4144 | } | |
4145 | NEXT (vpc); | |
4146 | ||
4147 | CASE (sem, INSN_LDQ_INDIRECT_OFFSET) : /* ldq $offset($abase), $dst */ | |
4148 | { | |
4149 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4150 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4151 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
4152 | int UNUSED written = 0; |
4153 | IADDR UNUSED pc = abuf->addr; | |
4154 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4155 | ||
7a292a7a | 4156 | { |
c906108c | 4157 | SI tmp_temp; |
7a292a7a | 4158 | SI tmp_dregno; |
c906108c SS |
4159 | tmp_dregno = FLD (f_srcdst); |
4160 | tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
4161 | { | |
4162 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4163 | * FLD (i_dst) = opval; | |
4164 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4165 | } | |
4166 | { | |
4167 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4168 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4169 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4170 | } |
4171 | { | |
4172 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4173 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4174 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c SS |
4175 | } |
4176 | { | |
4177 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4178 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
104c1213 | 4179 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); |
c906108c | 4180 | } |
7a292a7a | 4181 | } |
c906108c SS |
4182 | |
4183 | #undef FLD | |
4184 | } | |
4185 | NEXT (vpc); | |
4186 | ||
4187 | CASE (sem, INSN_LDQ_INDIRECT) : /* ldq ($abase), $dst */ | |
4188 | { | |
4189 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4190 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4191 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
4192 | int UNUSED written = 0; |
4193 | IADDR UNUSED pc = abuf->addr; | |
4194 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4195 | ||
7a292a7a | 4196 | { |
c906108c | 4197 | SI tmp_temp; |
7a292a7a | 4198 | SI tmp_dregno; |
c906108c SS |
4199 | tmp_dregno = FLD (f_srcdst); |
4200 | tmp_temp = * FLD (i_abase); | |
4201 | { | |
4202 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4203 | * FLD (i_dst) = opval; | |
4204 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4205 | } | |
4206 | { | |
4207 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4208 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4209 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4210 | } |
4211 | { | |
4212 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4213 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4214 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c SS |
4215 | } |
4216 | { | |
4217 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4218 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
104c1213 | 4219 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); |
c906108c | 4220 | } |
7a292a7a | 4221 | } |
c906108c SS |
4222 | |
4223 | #undef FLD | |
4224 | } | |
4225 | NEXT (vpc); | |
4226 | ||
4227 | CASE (sem, INSN_LDQ_INDIRECT_INDEX) : /* ldq ($abase)[$index*S$scale], $dst */ | |
4228 | { | |
4229 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4230 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4231 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4232 | int UNUSED written = 0; |
4233 | IADDR UNUSED pc = abuf->addr; | |
4234 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4235 | ||
7a292a7a | 4236 | { |
c906108c | 4237 | SI tmp_temp; |
7a292a7a | 4238 | SI tmp_dregno; |
c906108c SS |
4239 | tmp_dregno = FLD (f_srcdst); |
4240 | tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
4241 | { | |
4242 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4243 | * FLD (i_dst) = opval; | |
4244 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4245 | } | |
4246 | { | |
4247 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4248 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4249 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4250 | } |
4251 | { | |
4252 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4253 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4254 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c SS |
4255 | } |
4256 | { | |
4257 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4258 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
104c1213 | 4259 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); |
c906108c | 4260 | } |
7a292a7a | 4261 | } |
c906108c SS |
4262 | |
4263 | #undef FLD | |
4264 | } | |
4265 | NEXT (vpc); | |
4266 | ||
4267 | CASE (sem, INSN_LDQ_DISP) : /* ldq $optdisp, $dst */ | |
4268 | { | |
4269 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4270 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4271 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4272 | int UNUSED written = 0; |
4273 | IADDR UNUSED pc = abuf->addr; | |
4274 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4275 | ||
7a292a7a | 4276 | { |
c906108c | 4277 | SI tmp_temp; |
7a292a7a | 4278 | SI tmp_dregno; |
c906108c SS |
4279 | tmp_dregno = FLD (f_srcdst); |
4280 | tmp_temp = FLD (f_optdisp); | |
4281 | { | |
4282 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4283 | * FLD (i_dst) = opval; | |
4284 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4285 | } | |
4286 | { | |
4287 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4288 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4289 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4290 | } |
4291 | { | |
4292 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4293 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4294 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c SS |
4295 | } |
4296 | { | |
4297 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4298 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
104c1213 | 4299 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); |
c906108c | 4300 | } |
7a292a7a | 4301 | } |
c906108c SS |
4302 | |
4303 | #undef FLD | |
4304 | } | |
4305 | NEXT (vpc); | |
4306 | ||
4307 | CASE (sem, INSN_LDQ_INDIRECT_DISP) : /* ldq $optdisp($abase), $dst */ | |
4308 | { | |
4309 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4310 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4311 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4312 | int UNUSED written = 0; |
4313 | IADDR UNUSED pc = abuf->addr; | |
4314 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4315 | ||
7a292a7a | 4316 | { |
c906108c | 4317 | SI tmp_temp; |
7a292a7a | 4318 | SI tmp_dregno; |
c906108c SS |
4319 | tmp_dregno = FLD (f_srcdst); |
4320 | tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
4321 | { | |
4322 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4323 | * FLD (i_dst) = opval; | |
4324 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4325 | } | |
4326 | { | |
4327 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4328 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4329 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4330 | } |
4331 | { | |
4332 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4333 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4334 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c SS |
4335 | } |
4336 | { | |
4337 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4338 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
104c1213 | 4339 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); |
c906108c | 4340 | } |
7a292a7a | 4341 | } |
c906108c SS |
4342 | |
4343 | #undef FLD | |
4344 | } | |
4345 | NEXT (vpc); | |
4346 | ||
4347 | CASE (sem, INSN_LDQ_INDEX_DISP) : /* ldq $optdisp[$index*S$scale], $dst */ | |
4348 | { | |
4349 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4350 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4351 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4352 | int UNUSED written = 0; |
4353 | IADDR UNUSED pc = abuf->addr; | |
4354 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4355 | ||
7a292a7a | 4356 | { |
c906108c | 4357 | SI tmp_temp; |
7a292a7a | 4358 | SI tmp_dregno; |
c906108c SS |
4359 | tmp_dregno = FLD (f_srcdst); |
4360 | tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
4361 | { | |
4362 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4363 | * FLD (i_dst) = opval; | |
4364 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4365 | } | |
4366 | { | |
4367 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4368 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4369 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4370 | } |
4371 | { | |
4372 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4373 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4374 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c SS |
4375 | } |
4376 | { | |
4377 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4378 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
104c1213 | 4379 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); |
c906108c | 4380 | } |
7a292a7a | 4381 | } |
c906108c SS |
4382 | |
4383 | #undef FLD | |
4384 | } | |
4385 | NEXT (vpc); | |
4386 | ||
4387 | CASE (sem, INSN_LDQ_INDIRECT_INDEX_DISP) : /* ldq $optdisp($abase)[$index*S$scale], $dst */ | |
4388 | { | |
4389 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4390 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4391 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4392 | int UNUSED written = 0; |
4393 | IADDR UNUSED pc = abuf->addr; | |
4394 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4395 | ||
7a292a7a | 4396 | { |
c906108c | 4397 | SI tmp_temp; |
7a292a7a | 4398 | SI tmp_dregno; |
c906108c SS |
4399 | tmp_dregno = FLD (f_srcdst); |
4400 | tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
4401 | { | |
4402 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4403 | * FLD (i_dst) = opval; | |
4404 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4405 | } | |
4406 | { | |
4407 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4408 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
104c1213 | 4409 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval); |
c906108c SS |
4410 | } |
4411 | { | |
4412 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4413 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
104c1213 | 4414 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval); |
c906108c SS |
4415 | } |
4416 | { | |
4417 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4418 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
104c1213 | 4419 | TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval); |
c906108c | 4420 | } |
7a292a7a | 4421 | } |
c906108c SS |
4422 | |
4423 | #undef FLD | |
4424 | } | |
4425 | NEXT (vpc); | |
4426 | ||
4427 | CASE (sem, INSN_ST_OFFSET) : /* st $st_src, $offset */ | |
4428 | { | |
4429 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4430 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4431 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4432 | int UNUSED written = 0; |
4433 | IADDR UNUSED pc = abuf->addr; | |
4434 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4435 | ||
4436 | { | |
4437 | SI opval = * FLD (i_st_src); | |
4438 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
4439 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4440 | } | |
4441 | ||
4442 | #undef FLD | |
4443 | } | |
4444 | NEXT (vpc); | |
4445 | ||
4446 | CASE (sem, INSN_ST_INDIRECT_OFFSET) : /* st $st_src, $offset($abase) */ | |
4447 | { | |
4448 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4449 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4450 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4451 | int UNUSED written = 0; |
4452 | IADDR UNUSED pc = abuf->addr; | |
4453 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4454 | ||
4455 | { | |
4456 | SI opval = * FLD (i_st_src); | |
4457 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4458 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4459 | } | |
4460 | ||
4461 | #undef FLD | |
4462 | } | |
4463 | NEXT (vpc); | |
4464 | ||
4465 | CASE (sem, INSN_ST_INDIRECT) : /* st $st_src, ($abase) */ | |
4466 | { | |
4467 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4468 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4469 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4470 | int UNUSED written = 0; |
4471 | IADDR UNUSED pc = abuf->addr; | |
4472 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4473 | ||
4474 | { | |
4475 | SI opval = * FLD (i_st_src); | |
4476 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
4477 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4478 | } | |
4479 | ||
4480 | #undef FLD | |
4481 | } | |
4482 | NEXT (vpc); | |
4483 | ||
4484 | CASE (sem, INSN_ST_INDIRECT_INDEX) : /* st $st_src, ($abase)[$index*S$scale] */ | |
4485 | { | |
4486 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4487 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4488 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4489 | int UNUSED written = 0; |
4490 | IADDR UNUSED pc = abuf->addr; | |
4491 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4492 | ||
4493 | { | |
4494 | SI opval = * FLD (i_st_src); | |
4495 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4496 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4497 | } | |
4498 | ||
4499 | #undef FLD | |
4500 | } | |
4501 | NEXT (vpc); | |
4502 | ||
4503 | CASE (sem, INSN_ST_DISP) : /* st $st_src, $optdisp */ | |
4504 | { | |
4505 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4506 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4507 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4508 | int UNUSED written = 0; |
4509 | IADDR UNUSED pc = abuf->addr; | |
4510 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4511 | ||
4512 | { | |
4513 | SI opval = * FLD (i_st_src); | |
4514 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
4515 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4516 | } | |
4517 | ||
4518 | #undef FLD | |
4519 | } | |
4520 | NEXT (vpc); | |
4521 | ||
4522 | CASE (sem, INSN_ST_INDIRECT_DISP) : /* st $st_src, $optdisp($abase) */ | |
4523 | { | |
4524 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4525 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4526 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4527 | int UNUSED written = 0; |
4528 | IADDR UNUSED pc = abuf->addr; | |
4529 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4530 | ||
4531 | { | |
4532 | SI opval = * FLD (i_st_src); | |
4533 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
4534 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4535 | } | |
4536 | ||
4537 | #undef FLD | |
4538 | } | |
4539 | NEXT (vpc); | |
4540 | ||
4541 | CASE (sem, INSN_ST_INDEX_DISP) : /* st $st_src, $optdisp[$index*S$scale */ | |
4542 | { | |
4543 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4544 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4545 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4546 | int UNUSED written = 0; |
4547 | IADDR UNUSED pc = abuf->addr; | |
4548 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4549 | ||
4550 | { | |
4551 | SI opval = * FLD (i_st_src); | |
4552 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4553 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4554 | } | |
4555 | ||
4556 | #undef FLD | |
4557 | } | |
4558 | NEXT (vpc); | |
4559 | ||
4560 | CASE (sem, INSN_ST_INDIRECT_INDEX_DISP) : /* st $st_src, $optdisp($abase)[$index*S$scale] */ | |
4561 | { | |
4562 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4563 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4564 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4565 | int UNUSED written = 0; |
4566 | IADDR UNUSED pc = abuf->addr; | |
4567 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4568 | ||
4569 | { | |
4570 | SI opval = * FLD (i_st_src); | |
4571 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
4572 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4573 | } | |
4574 | ||
4575 | #undef FLD | |
4576 | } | |
4577 | NEXT (vpc); | |
4578 | ||
4579 | CASE (sem, INSN_STOB_OFFSET) : /* stob $st_src, $offset */ | |
4580 | { | |
4581 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4582 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4583 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4584 | int UNUSED written = 0; |
4585 | IADDR UNUSED pc = abuf->addr; | |
4586 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4587 | ||
4588 | { | |
4589 | QI opval = * FLD (i_st_src); | |
4590 | SETMEMQI (current_cpu, pc, FLD (f_offset), opval); | |
4591 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4592 | } | |
4593 | ||
4594 | #undef FLD | |
4595 | } | |
4596 | NEXT (vpc); | |
4597 | ||
4598 | CASE (sem, INSN_STOB_INDIRECT_OFFSET) : /* stob $st_src, $offset($abase) */ | |
4599 | { | |
4600 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4601 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4602 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4603 | int UNUSED written = 0; |
4604 | IADDR UNUSED pc = abuf->addr; | |
4605 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4606 | ||
4607 | { | |
4608 | QI opval = * FLD (i_st_src); | |
4609 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4610 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4611 | } | |
4612 | ||
4613 | #undef FLD | |
4614 | } | |
4615 | NEXT (vpc); | |
4616 | ||
4617 | CASE (sem, INSN_STOB_INDIRECT) : /* stob $st_src, ($abase) */ | |
4618 | { | |
4619 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4620 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4621 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4622 | int UNUSED written = 0; |
4623 | IADDR UNUSED pc = abuf->addr; | |
4624 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4625 | ||
4626 | { | |
4627 | QI opval = * FLD (i_st_src); | |
4628 | SETMEMQI (current_cpu, pc, * FLD (i_abase), opval); | |
4629 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4630 | } | |
4631 | ||
4632 | #undef FLD | |
4633 | } | |
4634 | NEXT (vpc); | |
4635 | ||
4636 | CASE (sem, INSN_STOB_INDIRECT_INDEX) : /* stob $st_src, ($abase)[$index*S$scale] */ | |
4637 | { | |
4638 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4639 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4640 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4641 | int UNUSED written = 0; |
4642 | IADDR UNUSED pc = abuf->addr; | |
4643 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4644 | ||
4645 | { | |
4646 | QI opval = * FLD (i_st_src); | |
4647 | SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4648 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4649 | } | |
4650 | ||
4651 | #undef FLD | |
4652 | } | |
4653 | NEXT (vpc); | |
4654 | ||
4655 | CASE (sem, INSN_STOB_DISP) : /* stob $st_src, $optdisp */ | |
4656 | { | |
4657 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4658 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4659 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4660 | int UNUSED written = 0; |
4661 | IADDR UNUSED pc = abuf->addr; | |
4662 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4663 | ||
4664 | { | |
4665 | QI opval = * FLD (i_st_src); | |
4666 | SETMEMQI (current_cpu, pc, FLD (f_optdisp), opval); | |
4667 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4668 | } | |
4669 | ||
4670 | #undef FLD | |
4671 | } | |
4672 | NEXT (vpc); | |
4673 | ||
4674 | CASE (sem, INSN_STOB_INDIRECT_DISP) : /* stob $st_src, $optdisp($abase) */ | |
4675 | { | |
4676 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4677 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4678 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4679 | int UNUSED written = 0; |
4680 | IADDR UNUSED pc = abuf->addr; | |
4681 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4682 | ||
4683 | { | |
4684 | QI opval = * FLD (i_st_src); | |
4685 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
4686 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4687 | } | |
4688 | ||
4689 | #undef FLD | |
4690 | } | |
4691 | NEXT (vpc); | |
4692 | ||
4693 | CASE (sem, INSN_STOB_INDEX_DISP) : /* stob $st_src, $optdisp[$index*S$scale */ | |
4694 | { | |
4695 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4696 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4697 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4698 | int UNUSED written = 0; |
4699 | IADDR UNUSED pc = abuf->addr; | |
4700 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4701 | ||
4702 | { | |
4703 | QI opval = * FLD (i_st_src); | |
4704 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4705 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4706 | } | |
4707 | ||
4708 | #undef FLD | |
4709 | } | |
4710 | NEXT (vpc); | |
4711 | ||
4712 | CASE (sem, INSN_STOB_INDIRECT_INDEX_DISP) : /* stob $st_src, $optdisp($abase)[$index*S$scale] */ | |
4713 | { | |
4714 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4715 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4716 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4717 | int UNUSED written = 0; |
4718 | IADDR UNUSED pc = abuf->addr; | |
4719 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4720 | ||
4721 | { | |
4722 | QI opval = * FLD (i_st_src); | |
4723 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
4724 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4725 | } | |
4726 | ||
4727 | #undef FLD | |
4728 | } | |
4729 | NEXT (vpc); | |
4730 | ||
4731 | CASE (sem, INSN_STOS_OFFSET) : /* stos $st_src, $offset */ | |
4732 | { | |
4733 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4734 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4735 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4736 | int UNUSED written = 0; |
4737 | IADDR UNUSED pc = abuf->addr; | |
4738 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4739 | ||
4740 | { | |
4741 | HI opval = * FLD (i_st_src); | |
4742 | SETMEMHI (current_cpu, pc, FLD (f_offset), opval); | |
4743 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4744 | } | |
4745 | ||
4746 | #undef FLD | |
4747 | } | |
4748 | NEXT (vpc); | |
4749 | ||
4750 | CASE (sem, INSN_STOS_INDIRECT_OFFSET) : /* stos $st_src, $offset($abase) */ | |
4751 | { | |
4752 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4753 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4754 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4755 | int UNUSED written = 0; |
4756 | IADDR UNUSED pc = abuf->addr; | |
4757 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4758 | ||
4759 | { | |
4760 | HI opval = * FLD (i_st_src); | |
4761 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4762 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4763 | } | |
4764 | ||
4765 | #undef FLD | |
4766 | } | |
4767 | NEXT (vpc); | |
4768 | ||
4769 | CASE (sem, INSN_STOS_INDIRECT) : /* stos $st_src, ($abase) */ | |
4770 | { | |
4771 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4772 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4773 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4774 | int UNUSED written = 0; |
4775 | IADDR UNUSED pc = abuf->addr; | |
4776 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4777 | ||
4778 | { | |
4779 | HI opval = * FLD (i_st_src); | |
4780 | SETMEMHI (current_cpu, pc, * FLD (i_abase), opval); | |
4781 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4782 | } | |
4783 | ||
4784 | #undef FLD | |
4785 | } | |
4786 | NEXT (vpc); | |
4787 | ||
4788 | CASE (sem, INSN_STOS_INDIRECT_INDEX) : /* stos $st_src, ($abase)[$index*S$scale] */ | |
4789 | { | |
4790 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4791 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4792 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4793 | int UNUSED written = 0; |
4794 | IADDR UNUSED pc = abuf->addr; | |
4795 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4796 | ||
4797 | { | |
4798 | HI opval = * FLD (i_st_src); | |
4799 | SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4800 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4801 | } | |
4802 | ||
4803 | #undef FLD | |
4804 | } | |
4805 | NEXT (vpc); | |
4806 | ||
4807 | CASE (sem, INSN_STOS_DISP) : /* stos $st_src, $optdisp */ | |
4808 | { | |
4809 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4810 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4811 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4812 | int UNUSED written = 0; |
4813 | IADDR UNUSED pc = abuf->addr; | |
4814 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4815 | ||
4816 | { | |
4817 | HI opval = * FLD (i_st_src); | |
4818 | SETMEMHI (current_cpu, pc, FLD (f_optdisp), opval); | |
4819 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4820 | } | |
4821 | ||
4822 | #undef FLD | |
4823 | } | |
4824 | NEXT (vpc); | |
4825 | ||
4826 | CASE (sem, INSN_STOS_INDIRECT_DISP) : /* stos $st_src, $optdisp($abase) */ | |
4827 | { | |
4828 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4829 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4830 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4831 | int UNUSED written = 0; |
4832 | IADDR UNUSED pc = abuf->addr; | |
4833 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4834 | ||
4835 | { | |
4836 | HI opval = * FLD (i_st_src); | |
4837 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
4838 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4839 | } | |
4840 | ||
4841 | #undef FLD | |
4842 | } | |
4843 | NEXT (vpc); | |
4844 | ||
4845 | CASE (sem, INSN_STOS_INDEX_DISP) : /* stos $st_src, $optdisp[$index*S$scale */ | |
4846 | { | |
4847 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4848 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4849 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4850 | int UNUSED written = 0; |
4851 | IADDR UNUSED pc = abuf->addr; | |
4852 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4853 | ||
4854 | { | |
4855 | HI opval = * FLD (i_st_src); | |
4856 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4857 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4858 | } | |
4859 | ||
4860 | #undef FLD | |
4861 | } | |
4862 | NEXT (vpc); | |
4863 | ||
4864 | CASE (sem, INSN_STOS_INDIRECT_INDEX_DISP) : /* stos $st_src, $optdisp($abase)[$index*S$scale] */ | |
4865 | { | |
4866 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4867 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4868 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4869 | int UNUSED written = 0; |
4870 | IADDR UNUSED pc = abuf->addr; | |
4871 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4872 | ||
4873 | { | |
4874 | HI opval = * FLD (i_st_src); | |
4875 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
4876 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4877 | } | |
4878 | ||
4879 | #undef FLD | |
4880 | } | |
4881 | NEXT (vpc); | |
4882 | ||
4883 | CASE (sem, INSN_STL_OFFSET) : /* stl $st_src, $offset */ | |
4884 | { | |
4885 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4886 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4887 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4888 | int UNUSED written = 0; |
4889 | IADDR UNUSED pc = abuf->addr; | |
4890 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4891 | ||
7a292a7a | 4892 | { |
c906108c SS |
4893 | SI tmp_sregno; |
4894 | tmp_sregno = FLD (f_srcdst); | |
4895 | { | |
4896 | SI opval = * FLD (i_st_src); | |
4897 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
4898 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4899 | } | |
4900 | { | |
4901 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4902 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); | |
4903 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4904 | } | |
7a292a7a | 4905 | } |
c906108c SS |
4906 | |
4907 | #undef FLD | |
4908 | } | |
4909 | NEXT (vpc); | |
4910 | ||
4911 | CASE (sem, INSN_STL_INDIRECT_OFFSET) : /* stl $st_src, $offset($abase) */ | |
4912 | { | |
4913 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4914 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4915 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4916 | int UNUSED written = 0; |
4917 | IADDR UNUSED pc = abuf->addr; | |
4918 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4919 | ||
7a292a7a | 4920 | { |
c906108c SS |
4921 | SI tmp_sregno; |
4922 | tmp_sregno = FLD (f_srcdst); | |
4923 | { | |
4924 | SI opval = * FLD (i_st_src); | |
4925 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4926 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4927 | } | |
4928 | { | |
4929 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4930 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); | |
4931 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4932 | } | |
7a292a7a | 4933 | } |
c906108c SS |
4934 | |
4935 | #undef FLD | |
4936 | } | |
4937 | NEXT (vpc); | |
4938 | ||
4939 | CASE (sem, INSN_STL_INDIRECT) : /* stl $st_src, ($abase) */ | |
4940 | { | |
4941 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4942 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4943 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4944 | int UNUSED written = 0; |
4945 | IADDR UNUSED pc = abuf->addr; | |
4946 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4947 | ||
7a292a7a | 4948 | { |
c906108c SS |
4949 | SI tmp_sregno; |
4950 | tmp_sregno = FLD (f_srcdst); | |
4951 | { | |
4952 | SI opval = * FLD (i_st_src); | |
4953 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
4954 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4955 | } | |
4956 | { | |
4957 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4958 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); | |
4959 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4960 | } | |
7a292a7a | 4961 | } |
c906108c SS |
4962 | |
4963 | #undef FLD | |
4964 | } | |
4965 | NEXT (vpc); | |
4966 | ||
4967 | CASE (sem, INSN_STL_INDIRECT_INDEX) : /* stl $st_src, ($abase)[$index*S$scale] */ | |
4968 | { | |
4969 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4970 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4971 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4972 | int UNUSED written = 0; |
4973 | IADDR UNUSED pc = abuf->addr; | |
4974 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4975 | ||
7a292a7a | 4976 | { |
c906108c SS |
4977 | SI tmp_sregno; |
4978 | tmp_sregno = FLD (f_srcdst); | |
4979 | { | |
4980 | SI opval = * FLD (i_st_src); | |
4981 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4982 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4983 | } | |
4984 | { | |
4985 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4986 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
4987 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4988 | } | |
7a292a7a | 4989 | } |
c906108c SS |
4990 | |
4991 | #undef FLD | |
4992 | } | |
4993 | NEXT (vpc); | |
4994 | ||
4995 | CASE (sem, INSN_STL_DISP) : /* stl $st_src, $optdisp */ | |
4996 | { | |
4997 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4998 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4999 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5000 | int UNUSED written = 0; |
5001 | IADDR UNUSED pc = abuf->addr; | |
5002 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5003 | ||
7a292a7a | 5004 | { |
c906108c SS |
5005 | SI tmp_sregno; |
5006 | tmp_sregno = FLD (f_srcdst); | |
5007 | { | |
5008 | SI opval = * FLD (i_st_src); | |
5009 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
5010 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5011 | } | |
5012 | { | |
5013 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5014 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); | |
5015 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5016 | } | |
7a292a7a | 5017 | } |
c906108c SS |
5018 | |
5019 | #undef FLD | |
5020 | } | |
5021 | NEXT (vpc); | |
5022 | ||
5023 | CASE (sem, INSN_STL_INDIRECT_DISP) : /* stl $st_src, $optdisp($abase) */ | |
5024 | { | |
5025 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5026 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5027 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5028 | int UNUSED written = 0; |
5029 | IADDR UNUSED pc = abuf->addr; | |
5030 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5031 | ||
7a292a7a | 5032 | { |
c906108c SS |
5033 | SI tmp_sregno; |
5034 | tmp_sregno = FLD (f_srcdst); | |
5035 | { | |
5036 | SI opval = * FLD (i_st_src); | |
5037 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
5038 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5039 | } | |
5040 | { | |
5041 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5042 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); | |
5043 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5044 | } | |
7a292a7a | 5045 | } |
c906108c SS |
5046 | |
5047 | #undef FLD | |
5048 | } | |
5049 | NEXT (vpc); | |
5050 | ||
5051 | CASE (sem, INSN_STL_INDEX_DISP) : /* stl $st_src, $optdisp[$index*S$scale */ | |
5052 | { | |
5053 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5054 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5055 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5056 | int UNUSED written = 0; |
5057 | IADDR UNUSED pc = abuf->addr; | |
5058 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5059 | ||
7a292a7a | 5060 | { |
c906108c SS |
5061 | SI tmp_sregno; |
5062 | tmp_sregno = FLD (f_srcdst); | |
5063 | { | |
5064 | SI opval = * FLD (i_st_src); | |
5065 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5066 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5067 | } | |
5068 | { | |
5069 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5070 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5071 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5072 | } | |
7a292a7a | 5073 | } |
c906108c SS |
5074 | |
5075 | #undef FLD | |
5076 | } | |
5077 | NEXT (vpc); | |
5078 | ||
5079 | CASE (sem, INSN_STL_INDIRECT_INDEX_DISP) : /* stl $st_src, $optdisp($abase)[$index*S$scale] */ | |
5080 | { | |
5081 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5082 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5083 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5084 | int UNUSED written = 0; |
5085 | IADDR UNUSED pc = abuf->addr; | |
5086 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5087 | ||
7a292a7a | 5088 | { |
c906108c SS |
5089 | SI tmp_sregno; |
5090 | tmp_sregno = FLD (f_srcdst); | |
5091 | { | |
5092 | SI opval = * FLD (i_st_src); | |
5093 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
5094 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5095 | } | |
5096 | { | |
5097 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5098 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); | |
5099 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5100 | } | |
7a292a7a | 5101 | } |
c906108c SS |
5102 | |
5103 | #undef FLD | |
5104 | } | |
5105 | NEXT (vpc); | |
5106 | ||
5107 | CASE (sem, INSN_STT_OFFSET) : /* stt $st_src, $offset */ | |
5108 | { | |
5109 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5110 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5111 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5112 | int UNUSED written = 0; |
5113 | IADDR UNUSED pc = abuf->addr; | |
5114 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5115 | ||
7a292a7a | 5116 | { |
c906108c SS |
5117 | SI tmp_sregno; |
5118 | tmp_sregno = FLD (f_srcdst); | |
5119 | { | |
5120 | SI opval = * FLD (i_st_src); | |
5121 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
5122 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5123 | } | |
5124 | { | |
5125 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5126 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); | |
5127 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5128 | } | |
5129 | { | |
5130 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5131 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval); | |
5132 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5133 | } | |
7a292a7a | 5134 | } |
c906108c SS |
5135 | |
5136 | #undef FLD | |
5137 | } | |
5138 | NEXT (vpc); | |
5139 | ||
5140 | CASE (sem, INSN_STT_INDIRECT_OFFSET) : /* stt $st_src, $offset($abase) */ | |
5141 | { | |
5142 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5143 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5144 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5145 | int UNUSED written = 0; |
5146 | IADDR UNUSED pc = abuf->addr; | |
5147 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5148 | ||
7a292a7a | 5149 | { |
c906108c SS |
5150 | SI tmp_sregno; |
5151 | tmp_sregno = FLD (f_srcdst); | |
5152 | { | |
5153 | SI opval = * FLD (i_st_src); | |
5154 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
5155 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5156 | } | |
5157 | { | |
5158 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5159 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); | |
5160 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5161 | } | |
5162 | { | |
5163 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5164 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval); | |
5165 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5166 | } | |
7a292a7a | 5167 | } |
c906108c SS |
5168 | |
5169 | #undef FLD | |
5170 | } | |
5171 | NEXT (vpc); | |
5172 | ||
5173 | CASE (sem, INSN_STT_INDIRECT) : /* stt $st_src, ($abase) */ | |
5174 | { | |
5175 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5176 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5177 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5178 | int UNUSED written = 0; |
5179 | IADDR UNUSED pc = abuf->addr; | |
5180 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5181 | ||
7a292a7a | 5182 | { |
c906108c SS |
5183 | SI tmp_sregno; |
5184 | tmp_sregno = FLD (f_srcdst); | |
5185 | { | |
5186 | SI opval = * FLD (i_st_src); | |
5187 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
5188 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5189 | } | |
5190 | { | |
5191 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5192 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); | |
5193 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5194 | } | |
5195 | { | |
5196 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5197 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval); | |
5198 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5199 | } | |
7a292a7a | 5200 | } |
c906108c SS |
5201 | |
5202 | #undef FLD | |
5203 | } | |
5204 | NEXT (vpc); | |
5205 | ||
5206 | CASE (sem, INSN_STT_INDIRECT_INDEX) : /* stt $st_src, ($abase)[$index*S$scale] */ | |
5207 | { | |
5208 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5209 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5210 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5211 | int UNUSED written = 0; |
5212 | IADDR UNUSED pc = abuf->addr; | |
5213 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5214 | ||
7a292a7a | 5215 | { |
c906108c SS |
5216 | SI tmp_sregno; |
5217 | tmp_sregno = FLD (f_srcdst); | |
5218 | { | |
5219 | SI opval = * FLD (i_st_src); | |
5220 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5221 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5222 | } | |
5223 | { | |
5224 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5225 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5226 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5227 | } | |
5228 | { | |
5229 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5230 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5231 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5232 | } | |
7a292a7a | 5233 | } |
c906108c SS |
5234 | |
5235 | #undef FLD | |
5236 | } | |
5237 | NEXT (vpc); | |
5238 | ||
5239 | CASE (sem, INSN_STT_DISP) : /* stt $st_src, $optdisp */ | |
5240 | { | |
5241 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5242 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5243 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5244 | int UNUSED written = 0; |
5245 | IADDR UNUSED pc = abuf->addr; | |
5246 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5247 | ||
7a292a7a | 5248 | { |
c906108c SS |
5249 | SI tmp_sregno; |
5250 | tmp_sregno = FLD (f_srcdst); | |
5251 | { | |
5252 | SI opval = * FLD (i_st_src); | |
5253 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
5254 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5255 | } | |
5256 | { | |
5257 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5258 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); | |
5259 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5260 | } | |
5261 | { | |
5262 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5263 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval); | |
5264 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5265 | } | |
7a292a7a | 5266 | } |
c906108c SS |
5267 | |
5268 | #undef FLD | |
5269 | } | |
5270 | NEXT (vpc); | |
5271 | ||
5272 | CASE (sem, INSN_STT_INDIRECT_DISP) : /* stt $st_src, $optdisp($abase) */ | |
5273 | { | |
5274 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5275 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5276 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5277 | int UNUSED written = 0; |
5278 | IADDR UNUSED pc = abuf->addr; | |
5279 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5280 | ||
7a292a7a | 5281 | { |
c906108c SS |
5282 | SI tmp_sregno; |
5283 | tmp_sregno = FLD (f_srcdst); | |
5284 | { | |
5285 | SI opval = * FLD (i_st_src); | |
5286 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
5287 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5288 | } | |
5289 | { | |
5290 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5291 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); | |
5292 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5293 | } | |
5294 | { | |
5295 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5296 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval); | |
5297 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5298 | } | |
7a292a7a | 5299 | } |
c906108c SS |
5300 | |
5301 | #undef FLD | |
5302 | } | |
5303 | NEXT (vpc); | |
5304 | ||
5305 | CASE (sem, INSN_STT_INDEX_DISP) : /* stt $st_src, $optdisp[$index*S$scale */ | |
5306 | { | |
5307 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5308 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5309 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5310 | int UNUSED written = 0; |
5311 | IADDR UNUSED pc = abuf->addr; | |
5312 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5313 | ||
7a292a7a | 5314 | { |
c906108c SS |
5315 | SI tmp_sregno; |
5316 | tmp_sregno = FLD (f_srcdst); | |
5317 | { | |
5318 | SI opval = * FLD (i_st_src); | |
5319 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5320 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5321 | } | |
5322 | { | |
5323 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5324 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5325 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5326 | } | |
5327 | { | |
5328 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5329 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5330 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5331 | } | |
7a292a7a | 5332 | } |
c906108c SS |
5333 | |
5334 | #undef FLD | |
5335 | } | |
5336 | NEXT (vpc); | |
5337 | ||
5338 | CASE (sem, INSN_STT_INDIRECT_INDEX_DISP) : /* stt $st_src, $optdisp($abase)[$index*S$scale] */ | |
5339 | { | |
5340 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5341 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5342 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5343 | int UNUSED written = 0; |
5344 | IADDR UNUSED pc = abuf->addr; | |
5345 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5346 | ||
7a292a7a | 5347 | { |
c906108c SS |
5348 | SI tmp_sregno; |
5349 | tmp_sregno = FLD (f_srcdst); | |
5350 | { | |
5351 | SI opval = * FLD (i_st_src); | |
5352 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
5353 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5354 | } | |
5355 | { | |
5356 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5357 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); | |
5358 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5359 | } | |
5360 | { | |
5361 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5362 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval); | |
5363 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5364 | } | |
7a292a7a | 5365 | } |
c906108c SS |
5366 | |
5367 | #undef FLD | |
5368 | } | |
5369 | NEXT (vpc); | |
5370 | ||
5371 | CASE (sem, INSN_STQ_OFFSET) : /* stq $st_src, $offset */ | |
5372 | { | |
5373 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5374 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5375 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5376 | int UNUSED written = 0; |
5377 | IADDR UNUSED pc = abuf->addr; | |
5378 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5379 | ||
7a292a7a | 5380 | { |
c906108c SS |
5381 | SI tmp_sregno; |
5382 | tmp_sregno = FLD (f_srcdst); | |
5383 | { | |
5384 | SI opval = * FLD (i_st_src); | |
5385 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
5386 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5387 | } | |
5388 | { | |
5389 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5390 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); | |
5391 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5392 | } | |
5393 | { | |
5394 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5395 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval); | |
5396 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5397 | } | |
5398 | { | |
5399 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5400 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 12), opval); | |
5401 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5402 | } | |
7a292a7a | 5403 | } |
c906108c SS |
5404 | |
5405 | #undef FLD | |
5406 | } | |
5407 | NEXT (vpc); | |
5408 | ||
5409 | CASE (sem, INSN_STQ_INDIRECT_OFFSET) : /* stq $st_src, $offset($abase) */ | |
5410 | { | |
5411 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5412 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5413 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5414 | int UNUSED written = 0; |
5415 | IADDR UNUSED pc = abuf->addr; | |
5416 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5417 | ||
7a292a7a | 5418 | { |
c906108c SS |
5419 | SI tmp_sregno; |
5420 | tmp_sregno = FLD (f_srcdst); | |
5421 | { | |
5422 | SI opval = * FLD (i_st_src); | |
5423 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
5424 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5425 | } | |
5426 | { | |
5427 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5428 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); | |
5429 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5430 | } | |
5431 | { | |
5432 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5433 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval); | |
5434 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5435 | } | |
5436 | { | |
5437 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5438 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 12), opval); | |
5439 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5440 | } | |
7a292a7a | 5441 | } |
c906108c SS |
5442 | |
5443 | #undef FLD | |
5444 | } | |
5445 | NEXT (vpc); | |
5446 | ||
5447 | CASE (sem, INSN_STQ_INDIRECT) : /* stq $st_src, ($abase) */ | |
5448 | { | |
5449 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5450 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5451 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5452 | int UNUSED written = 0; |
5453 | IADDR UNUSED pc = abuf->addr; | |
5454 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5455 | ||
7a292a7a | 5456 | { |
c906108c SS |
5457 | SI tmp_sregno; |
5458 | tmp_sregno = FLD (f_srcdst); | |
5459 | { | |
5460 | SI opval = * FLD (i_st_src); | |
5461 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
5462 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5463 | } | |
5464 | { | |
5465 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5466 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); | |
5467 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5468 | } | |
5469 | { | |
5470 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5471 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval); | |
5472 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5473 | } | |
5474 | { | |
5475 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5476 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 12), opval); | |
5477 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5478 | } | |
7a292a7a | 5479 | } |
c906108c SS |
5480 | |
5481 | #undef FLD | |
5482 | } | |
5483 | NEXT (vpc); | |
5484 | ||
5485 | CASE (sem, INSN_STQ_INDIRECT_INDEX) : /* stq $st_src, ($abase)[$index*S$scale] */ | |
5486 | { | |
5487 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5488 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5489 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5490 | int UNUSED written = 0; |
5491 | IADDR UNUSED pc = abuf->addr; | |
5492 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5493 | ||
7a292a7a | 5494 | { |
c906108c SS |
5495 | SI tmp_sregno; |
5496 | tmp_sregno = FLD (f_srcdst); | |
5497 | { | |
5498 | SI opval = * FLD (i_st_src); | |
5499 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5500 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5501 | } | |
5502 | { | |
5503 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5504 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5505 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5506 | } | |
5507 | { | |
5508 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5509 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5510 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5511 | } | |
5512 | { | |
5513 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5514 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval); | |
5515 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5516 | } | |
7a292a7a | 5517 | } |
c906108c SS |
5518 | |
5519 | #undef FLD | |
5520 | } | |
5521 | NEXT (vpc); | |
5522 | ||
5523 | CASE (sem, INSN_STQ_DISP) : /* stq $st_src, $optdisp */ | |
5524 | { | |
5525 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5526 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5527 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5528 | int UNUSED written = 0; |
5529 | IADDR UNUSED pc = abuf->addr; | |
5530 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5531 | ||
7a292a7a | 5532 | { |
c906108c SS |
5533 | SI tmp_sregno; |
5534 | tmp_sregno = FLD (f_srcdst); | |
5535 | { | |
5536 | SI opval = * FLD (i_st_src); | |
5537 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
5538 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5539 | } | |
5540 | { | |
5541 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5542 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); | |
5543 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5544 | } | |
5545 | { | |
5546 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5547 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval); | |
5548 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5549 | } | |
5550 | { | |
5551 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5552 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 12), opval); | |
5553 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5554 | } | |
7a292a7a | 5555 | } |
c906108c SS |
5556 | |
5557 | #undef FLD | |
5558 | } | |
5559 | NEXT (vpc); | |
5560 | ||
5561 | CASE (sem, INSN_STQ_INDIRECT_DISP) : /* stq $st_src, $optdisp($abase) */ | |
5562 | { | |
5563 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5564 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5565 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5566 | int UNUSED written = 0; |
5567 | IADDR UNUSED pc = abuf->addr; | |
5568 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5569 | ||
7a292a7a | 5570 | { |
c906108c SS |
5571 | SI tmp_sregno; |
5572 | tmp_sregno = FLD (f_srcdst); | |
5573 | { | |
5574 | SI opval = * FLD (i_st_src); | |
5575 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
5576 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5577 | } | |
5578 | { | |
5579 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5580 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); | |
5581 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5582 | } | |
5583 | { | |
5584 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5585 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval); | |
5586 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5587 | } | |
5588 | { | |
5589 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5590 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 12), opval); | |
5591 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5592 | } | |
7a292a7a | 5593 | } |
c906108c SS |
5594 | |
5595 | #undef FLD | |
5596 | } | |
5597 | NEXT (vpc); | |
5598 | ||
5599 | CASE (sem, INSN_STQ_INDEX_DISP) : /* stq $st_src, $optdisp[$index*S$scale */ | |
5600 | { | |
5601 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5602 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5603 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5604 | int UNUSED written = 0; |
5605 | IADDR UNUSED pc = abuf->addr; | |
5606 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5607 | ||
7a292a7a | 5608 | { |
c906108c SS |
5609 | SI tmp_sregno; |
5610 | tmp_sregno = FLD (f_srcdst); | |
5611 | { | |
5612 | SI opval = * FLD (i_st_src); | |
5613 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5614 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5615 | } | |
5616 | { | |
5617 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5618 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5619 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5620 | } | |
5621 | { | |
5622 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5623 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5624 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5625 | } | |
5626 | { | |
5627 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5628 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval); | |
5629 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5630 | } | |
7a292a7a | 5631 | } |
c906108c SS |
5632 | |
5633 | #undef FLD | |
5634 | } | |
5635 | NEXT (vpc); | |
5636 | ||
5637 | CASE (sem, INSN_STQ_INDIRECT_INDEX_DISP) : /* stq $st_src, $optdisp($abase)[$index*S$scale] */ | |
5638 | { | |
5639 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5640 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5641 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5642 | int UNUSED written = 0; |
5643 | IADDR UNUSED pc = abuf->addr; | |
5644 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5645 | ||
7a292a7a | 5646 | { |
c906108c SS |
5647 | SI tmp_sregno; |
5648 | tmp_sregno = FLD (f_srcdst); | |
5649 | { | |
5650 | SI opval = * FLD (i_st_src); | |
5651 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
5652 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5653 | } | |
5654 | { | |
5655 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5656 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); | |
5657 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5658 | } | |
5659 | { | |
5660 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5661 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval); | |
5662 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5663 | } | |
5664 | { | |
5665 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5666 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 12), opval); | |
5667 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5668 | } | |
7a292a7a | 5669 | } |
c906108c SS |
5670 | |
5671 | #undef FLD | |
5672 | } | |
5673 | NEXT (vpc); | |
5674 | ||
5675 | CASE (sem, INSN_CMPOBE_REG) : /* cmpobe $br_src1, $br_src2, $br_disp */ | |
5676 | { | |
5677 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5678 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5679 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5680 | int UNUSED written = 0; |
5681 | IADDR UNUSED pc = abuf->addr; | |
5682 | SEM_BRANCH_INIT | |
5683 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5684 | ||
5685 | if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5686 | { | |
5687 | USI opval = FLD (i_br_disp); | |
96baa820 | 5688 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5689 | written |= (1 << 3); |
5690 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5691 | } | |
5692 | } | |
5693 | ||
5694 | abuf->written = written; | |
5695 | SEM_BRANCH_FINI (vpc); | |
5696 | #undef FLD | |
5697 | } | |
5698 | NEXT (vpc); | |
5699 | ||
5700 | CASE (sem, INSN_CMPOBE_LIT) : /* cmpobe $br_lit1, $br_src2, $br_disp */ | |
5701 | { | |
5702 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5703 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5704 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5705 | int UNUSED written = 0; |
5706 | IADDR UNUSED pc = abuf->addr; | |
5707 | SEM_BRANCH_INIT | |
5708 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5709 | ||
5710 | if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5711 | { | |
5712 | USI opval = FLD (i_br_disp); | |
96baa820 | 5713 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5714 | written |= (1 << 3); |
5715 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5716 | } | |
5717 | } | |
5718 | ||
5719 | abuf->written = written; | |
5720 | SEM_BRANCH_FINI (vpc); | |
5721 | #undef FLD | |
5722 | } | |
5723 | NEXT (vpc); | |
5724 | ||
5725 | CASE (sem, INSN_CMPOBNE_REG) : /* cmpobne $br_src1, $br_src2, $br_disp */ | |
5726 | { | |
5727 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5728 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5729 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5730 | int UNUSED written = 0; |
5731 | IADDR UNUSED pc = abuf->addr; | |
5732 | SEM_BRANCH_INIT | |
5733 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5734 | ||
5735 | if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5736 | { | |
5737 | USI opval = FLD (i_br_disp); | |
96baa820 | 5738 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5739 | written |= (1 << 3); |
5740 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5741 | } | |
5742 | } | |
5743 | ||
5744 | abuf->written = written; | |
5745 | SEM_BRANCH_FINI (vpc); | |
5746 | #undef FLD | |
5747 | } | |
5748 | NEXT (vpc); | |
5749 | ||
5750 | CASE (sem, INSN_CMPOBNE_LIT) : /* cmpobne $br_lit1, $br_src2, $br_disp */ | |
5751 | { | |
5752 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5753 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5754 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5755 | int UNUSED written = 0; |
5756 | IADDR UNUSED pc = abuf->addr; | |
5757 | SEM_BRANCH_INIT | |
5758 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5759 | ||
5760 | if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5761 | { | |
5762 | USI opval = FLD (i_br_disp); | |
96baa820 | 5763 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5764 | written |= (1 << 3); |
5765 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5766 | } | |
5767 | } | |
5768 | ||
5769 | abuf->written = written; | |
5770 | SEM_BRANCH_FINI (vpc); | |
5771 | #undef FLD | |
5772 | } | |
5773 | NEXT (vpc); | |
5774 | ||
5775 | CASE (sem, INSN_CMPOBL_REG) : /* cmpobl $br_src1, $br_src2, $br_disp */ | |
5776 | { | |
5777 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5778 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5779 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5780 | int UNUSED written = 0; |
5781 | IADDR UNUSED pc = abuf->addr; | |
5782 | SEM_BRANCH_INIT | |
5783 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5784 | ||
5785 | if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5786 | { | |
5787 | USI opval = FLD (i_br_disp); | |
96baa820 | 5788 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5789 | written |= (1 << 3); |
5790 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5791 | } | |
5792 | } | |
5793 | ||
5794 | abuf->written = written; | |
5795 | SEM_BRANCH_FINI (vpc); | |
5796 | #undef FLD | |
5797 | } | |
5798 | NEXT (vpc); | |
5799 | ||
5800 | CASE (sem, INSN_CMPOBL_LIT) : /* cmpobl $br_lit1, $br_src2, $br_disp */ | |
5801 | { | |
5802 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5803 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5804 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5805 | int UNUSED written = 0; |
5806 | IADDR UNUSED pc = abuf->addr; | |
5807 | SEM_BRANCH_INIT | |
5808 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5809 | ||
5810 | if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5811 | { | |
5812 | USI opval = FLD (i_br_disp); | |
96baa820 | 5813 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5814 | written |= (1 << 3); |
5815 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5816 | } | |
5817 | } | |
5818 | ||
5819 | abuf->written = written; | |
5820 | SEM_BRANCH_FINI (vpc); | |
5821 | #undef FLD | |
5822 | } | |
5823 | NEXT (vpc); | |
5824 | ||
5825 | CASE (sem, INSN_CMPOBLE_REG) : /* cmpoble $br_src1, $br_src2, $br_disp */ | |
5826 | { | |
5827 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5828 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5829 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5830 | int UNUSED written = 0; |
5831 | IADDR UNUSED pc = abuf->addr; | |
5832 | SEM_BRANCH_INIT | |
5833 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5834 | ||
5835 | if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5836 | { | |
5837 | USI opval = FLD (i_br_disp); | |
96baa820 | 5838 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5839 | written |= (1 << 3); |
5840 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5841 | } | |
5842 | } | |
5843 | ||
5844 | abuf->written = written; | |
5845 | SEM_BRANCH_FINI (vpc); | |
5846 | #undef FLD | |
5847 | } | |
5848 | NEXT (vpc); | |
5849 | ||
5850 | CASE (sem, INSN_CMPOBLE_LIT) : /* cmpoble $br_lit1, $br_src2, $br_disp */ | |
5851 | { | |
5852 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5853 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5854 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5855 | int UNUSED written = 0; |
5856 | IADDR UNUSED pc = abuf->addr; | |
5857 | SEM_BRANCH_INIT | |
5858 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5859 | ||
5860 | if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5861 | { | |
5862 | USI opval = FLD (i_br_disp); | |
96baa820 | 5863 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5864 | written |= (1 << 3); |
5865 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5866 | } | |
5867 | } | |
5868 | ||
5869 | abuf->written = written; | |
5870 | SEM_BRANCH_FINI (vpc); | |
5871 | #undef FLD | |
5872 | } | |
5873 | NEXT (vpc); | |
5874 | ||
5875 | CASE (sem, INSN_CMPOBG_REG) : /* cmpobg $br_src1, $br_src2, $br_disp */ | |
5876 | { | |
5877 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5878 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5879 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5880 | int UNUSED written = 0; |
5881 | IADDR UNUSED pc = abuf->addr; | |
5882 | SEM_BRANCH_INIT | |
5883 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5884 | ||
5885 | if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5886 | { | |
5887 | USI opval = FLD (i_br_disp); | |
96baa820 | 5888 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5889 | written |= (1 << 3); |
5890 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5891 | } | |
5892 | } | |
5893 | ||
5894 | abuf->written = written; | |
5895 | SEM_BRANCH_FINI (vpc); | |
5896 | #undef FLD | |
5897 | } | |
5898 | NEXT (vpc); | |
5899 | ||
5900 | CASE (sem, INSN_CMPOBG_LIT) : /* cmpobg $br_lit1, $br_src2, $br_disp */ | |
5901 | { | |
5902 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5903 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5904 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5905 | int UNUSED written = 0; |
5906 | IADDR UNUSED pc = abuf->addr; | |
5907 | SEM_BRANCH_INIT | |
5908 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5909 | ||
5910 | if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5911 | { | |
5912 | USI opval = FLD (i_br_disp); | |
96baa820 | 5913 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5914 | written |= (1 << 3); |
5915 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5916 | } | |
5917 | } | |
5918 | ||
5919 | abuf->written = written; | |
5920 | SEM_BRANCH_FINI (vpc); | |
5921 | #undef FLD | |
5922 | } | |
5923 | NEXT (vpc); | |
5924 | ||
5925 | CASE (sem, INSN_CMPOBGE_REG) : /* cmpobge $br_src1, $br_src2, $br_disp */ | |
5926 | { | |
5927 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5928 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5929 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5930 | int UNUSED written = 0; |
5931 | IADDR UNUSED pc = abuf->addr; | |
5932 | SEM_BRANCH_INIT | |
5933 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5934 | ||
5935 | if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5936 | { | |
5937 | USI opval = FLD (i_br_disp); | |
96baa820 | 5938 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5939 | written |= (1 << 3); |
5940 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5941 | } | |
5942 | } | |
5943 | ||
5944 | abuf->written = written; | |
5945 | SEM_BRANCH_FINI (vpc); | |
5946 | #undef FLD | |
5947 | } | |
5948 | NEXT (vpc); | |
5949 | ||
5950 | CASE (sem, INSN_CMPOBGE_LIT) : /* cmpobge $br_lit1, $br_src2, $br_disp */ | |
5951 | { | |
5952 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5953 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5954 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5955 | int UNUSED written = 0; |
5956 | IADDR UNUSED pc = abuf->addr; | |
5957 | SEM_BRANCH_INIT | |
5958 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5959 | ||
5960 | if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5961 | { | |
5962 | USI opval = FLD (i_br_disp); | |
96baa820 | 5963 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5964 | written |= (1 << 3); |
5965 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5966 | } | |
5967 | } | |
5968 | ||
5969 | abuf->written = written; | |
5970 | SEM_BRANCH_FINI (vpc); | |
5971 | #undef FLD | |
5972 | } | |
5973 | NEXT (vpc); | |
5974 | ||
5975 | CASE (sem, INSN_CMPIBE_REG) : /* cmpibe $br_src1, $br_src2, $br_disp */ | |
5976 | { | |
5977 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5978 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5979 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5980 | int UNUSED written = 0; |
5981 | IADDR UNUSED pc = abuf->addr; | |
5982 | SEM_BRANCH_INIT | |
5983 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5984 | ||
5985 | if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5986 | { | |
5987 | USI opval = FLD (i_br_disp); | |
96baa820 | 5988 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5989 | written |= (1 << 3); |
5990 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5991 | } | |
5992 | } | |
5993 | ||
5994 | abuf->written = written; | |
5995 | SEM_BRANCH_FINI (vpc); | |
5996 | #undef FLD | |
5997 | } | |
5998 | NEXT (vpc); | |
5999 | ||
6000 | CASE (sem, INSN_CMPIBE_LIT) : /* cmpibe $br_lit1, $br_src2, $br_disp */ | |
6001 | { | |
6002 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6003 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6004 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6005 | int UNUSED written = 0; |
6006 | IADDR UNUSED pc = abuf->addr; | |
6007 | SEM_BRANCH_INIT | |
6008 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6009 | ||
6010 | if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6011 | { | |
6012 | USI opval = FLD (i_br_disp); | |
96baa820 | 6013 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6014 | written |= (1 << 3); |
6015 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6016 | } | |
6017 | } | |
6018 | ||
6019 | abuf->written = written; | |
6020 | SEM_BRANCH_FINI (vpc); | |
6021 | #undef FLD | |
6022 | } | |
6023 | NEXT (vpc); | |
6024 | ||
6025 | CASE (sem, INSN_CMPIBNE_REG) : /* cmpibne $br_src1, $br_src2, $br_disp */ | |
6026 | { | |
6027 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6028 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6029 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6030 | int UNUSED written = 0; |
6031 | IADDR UNUSED pc = abuf->addr; | |
6032 | SEM_BRANCH_INIT | |
6033 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6034 | ||
6035 | if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6036 | { | |
6037 | USI opval = FLD (i_br_disp); | |
96baa820 | 6038 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6039 | written |= (1 << 3); |
6040 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6041 | } | |
6042 | } | |
6043 | ||
6044 | abuf->written = written; | |
6045 | SEM_BRANCH_FINI (vpc); | |
6046 | #undef FLD | |
6047 | } | |
6048 | NEXT (vpc); | |
6049 | ||
6050 | CASE (sem, INSN_CMPIBNE_LIT) : /* cmpibne $br_lit1, $br_src2, $br_disp */ | |
6051 | { | |
6052 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6053 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6054 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6055 | int UNUSED written = 0; |
6056 | IADDR UNUSED pc = abuf->addr; | |
6057 | SEM_BRANCH_INIT | |
6058 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6059 | ||
6060 | if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6061 | { | |
6062 | USI opval = FLD (i_br_disp); | |
96baa820 | 6063 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6064 | written |= (1 << 3); |
6065 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6066 | } | |
6067 | } | |
6068 | ||
6069 | abuf->written = written; | |
6070 | SEM_BRANCH_FINI (vpc); | |
6071 | #undef FLD | |
6072 | } | |
6073 | NEXT (vpc); | |
6074 | ||
6075 | CASE (sem, INSN_CMPIBL_REG) : /* cmpibl $br_src1, $br_src2, $br_disp */ | |
6076 | { | |
6077 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6078 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6079 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6080 | int UNUSED written = 0; |
6081 | IADDR UNUSED pc = abuf->addr; | |
6082 | SEM_BRANCH_INIT | |
6083 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6084 | ||
6085 | if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6086 | { | |
6087 | USI opval = FLD (i_br_disp); | |
96baa820 | 6088 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6089 | written |= (1 << 3); |
6090 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6091 | } | |
6092 | } | |
6093 | ||
6094 | abuf->written = written; | |
6095 | SEM_BRANCH_FINI (vpc); | |
6096 | #undef FLD | |
6097 | } | |
6098 | NEXT (vpc); | |
6099 | ||
6100 | CASE (sem, INSN_CMPIBL_LIT) : /* cmpibl $br_lit1, $br_src2, $br_disp */ | |
6101 | { | |
6102 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6103 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6104 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6105 | int UNUSED written = 0; |
6106 | IADDR UNUSED pc = abuf->addr; | |
6107 | SEM_BRANCH_INIT | |
6108 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6109 | ||
6110 | if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6111 | { | |
6112 | USI opval = FLD (i_br_disp); | |
96baa820 | 6113 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6114 | written |= (1 << 3); |
6115 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6116 | } | |
6117 | } | |
6118 | ||
6119 | abuf->written = written; | |
6120 | SEM_BRANCH_FINI (vpc); | |
6121 | #undef FLD | |
6122 | } | |
6123 | NEXT (vpc); | |
6124 | ||
6125 | CASE (sem, INSN_CMPIBLE_REG) : /* cmpible $br_src1, $br_src2, $br_disp */ | |
6126 | { | |
6127 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6128 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6129 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6130 | int UNUSED written = 0; |
6131 | IADDR UNUSED pc = abuf->addr; | |
6132 | SEM_BRANCH_INIT | |
6133 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6134 | ||
6135 | if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6136 | { | |
6137 | USI opval = FLD (i_br_disp); | |
96baa820 | 6138 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6139 | written |= (1 << 3); |
6140 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6141 | } | |
6142 | } | |
6143 | ||
6144 | abuf->written = written; | |
6145 | SEM_BRANCH_FINI (vpc); | |
6146 | #undef FLD | |
6147 | } | |
6148 | NEXT (vpc); | |
6149 | ||
6150 | CASE (sem, INSN_CMPIBLE_LIT) : /* cmpible $br_lit1, $br_src2, $br_disp */ | |
6151 | { | |
6152 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6153 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6154 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6155 | int UNUSED written = 0; |
6156 | IADDR UNUSED pc = abuf->addr; | |
6157 | SEM_BRANCH_INIT | |
6158 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6159 | ||
6160 | if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6161 | { | |
6162 | USI opval = FLD (i_br_disp); | |
96baa820 | 6163 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6164 | written |= (1 << 3); |
6165 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6166 | } | |
6167 | } | |
6168 | ||
6169 | abuf->written = written; | |
6170 | SEM_BRANCH_FINI (vpc); | |
6171 | #undef FLD | |
6172 | } | |
6173 | NEXT (vpc); | |
6174 | ||
6175 | CASE (sem, INSN_CMPIBG_REG) : /* cmpibg $br_src1, $br_src2, $br_disp */ | |
6176 | { | |
6177 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6178 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6179 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6180 | int UNUSED written = 0; |
6181 | IADDR UNUSED pc = abuf->addr; | |
6182 | SEM_BRANCH_INIT | |
6183 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6184 | ||
6185 | if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6186 | { | |
6187 | USI opval = FLD (i_br_disp); | |
96baa820 | 6188 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6189 | written |= (1 << 3); |
6190 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6191 | } | |
6192 | } | |
6193 | ||
6194 | abuf->written = written; | |
6195 | SEM_BRANCH_FINI (vpc); | |
6196 | #undef FLD | |
6197 | } | |
6198 | NEXT (vpc); | |
6199 | ||
6200 | CASE (sem, INSN_CMPIBG_LIT) : /* cmpibg $br_lit1, $br_src2, $br_disp */ | |
6201 | { | |
6202 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6203 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6204 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6205 | int UNUSED written = 0; |
6206 | IADDR UNUSED pc = abuf->addr; | |
6207 | SEM_BRANCH_INIT | |
6208 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6209 | ||
6210 | if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6211 | { | |
6212 | USI opval = FLD (i_br_disp); | |
96baa820 | 6213 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6214 | written |= (1 << 3); |
6215 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6216 | } | |
6217 | } | |
6218 | ||
6219 | abuf->written = written; | |
6220 | SEM_BRANCH_FINI (vpc); | |
6221 | #undef FLD | |
6222 | } | |
6223 | NEXT (vpc); | |
6224 | ||
6225 | CASE (sem, INSN_CMPIBGE_REG) : /* cmpibge $br_src1, $br_src2, $br_disp */ | |
6226 | { | |
6227 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6228 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6229 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6230 | int UNUSED written = 0; |
6231 | IADDR UNUSED pc = abuf->addr; | |
6232 | SEM_BRANCH_INIT | |
6233 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6234 | ||
6235 | if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6236 | { | |
6237 | USI opval = FLD (i_br_disp); | |
96baa820 | 6238 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6239 | written |= (1 << 3); |
6240 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6241 | } | |
6242 | } | |
6243 | ||
6244 | abuf->written = written; | |
6245 | SEM_BRANCH_FINI (vpc); | |
6246 | #undef FLD | |
6247 | } | |
6248 | NEXT (vpc); | |
6249 | ||
6250 | CASE (sem, INSN_CMPIBGE_LIT) : /* cmpibge $br_lit1, $br_src2, $br_disp */ | |
6251 | { | |
6252 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6253 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6254 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6255 | int UNUSED written = 0; |
6256 | IADDR UNUSED pc = abuf->addr; | |
6257 | SEM_BRANCH_INIT | |
6258 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6259 | ||
6260 | if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6261 | { | |
6262 | USI opval = FLD (i_br_disp); | |
96baa820 | 6263 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6264 | written |= (1 << 3); |
6265 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6266 | } | |
6267 | } | |
6268 | ||
6269 | abuf->written = written; | |
6270 | SEM_BRANCH_FINI (vpc); | |
6271 | #undef FLD | |
6272 | } | |
6273 | NEXT (vpc); | |
6274 | ||
6275 | CASE (sem, INSN_BBC_REG) : /* bbc $br_src1, $br_src2, $br_disp */ | |
6276 | { | |
6277 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6278 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6279 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6280 | int UNUSED written = 0; |
6281 | IADDR UNUSED pc = abuf->addr; | |
6282 | SEM_BRANCH_INIT | |
6283 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6284 | ||
6285 | if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { | |
6286 | { | |
6287 | USI opval = FLD (i_br_disp); | |
96baa820 | 6288 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6289 | written |= (1 << 3); |
6290 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6291 | } | |
6292 | } | |
6293 | ||
6294 | abuf->written = written; | |
6295 | SEM_BRANCH_FINI (vpc); | |
6296 | #undef FLD | |
6297 | } | |
6298 | NEXT (vpc); | |
6299 | ||
6300 | CASE (sem, INSN_BBC_LIT) : /* bbc $br_lit1, $br_src2, $br_disp */ | |
6301 | { | |
6302 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6303 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6304 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6305 | int UNUSED written = 0; |
6306 | IADDR UNUSED pc = abuf->addr; | |
6307 | SEM_BRANCH_INIT | |
6308 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6309 | ||
6310 | if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { | |
6311 | { | |
6312 | USI opval = FLD (i_br_disp); | |
96baa820 | 6313 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6314 | written |= (1 << 3); |
6315 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6316 | } | |
6317 | } | |
6318 | ||
6319 | abuf->written = written; | |
6320 | SEM_BRANCH_FINI (vpc); | |
6321 | #undef FLD | |
6322 | } | |
6323 | NEXT (vpc); | |
6324 | ||
6325 | CASE (sem, INSN_BBS_REG) : /* bbs $br_src1, $br_src2, $br_disp */ | |
6326 | { | |
6327 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6328 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6329 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6330 | int UNUSED written = 0; |
6331 | IADDR UNUSED pc = abuf->addr; | |
6332 | SEM_BRANCH_INIT | |
6333 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6334 | ||
6335 | if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { | |
6336 | { | |
6337 | USI opval = FLD (i_br_disp); | |
96baa820 | 6338 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6339 | written |= (1 << 3); |
6340 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6341 | } | |
6342 | } | |
6343 | ||
6344 | abuf->written = written; | |
6345 | SEM_BRANCH_FINI (vpc); | |
6346 | #undef FLD | |
6347 | } | |
6348 | NEXT (vpc); | |
6349 | ||
6350 | CASE (sem, INSN_BBS_LIT) : /* bbs $br_lit1, $br_src2, $br_disp */ | |
6351 | { | |
6352 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6353 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6354 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6355 | int UNUSED written = 0; |
6356 | IADDR UNUSED pc = abuf->addr; | |
6357 | SEM_BRANCH_INIT | |
6358 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6359 | ||
6360 | if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { | |
6361 | { | |
6362 | USI opval = FLD (i_br_disp); | |
96baa820 | 6363 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6364 | written |= (1 << 3); |
6365 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6366 | } | |
6367 | } | |
6368 | ||
6369 | abuf->written = written; | |
6370 | SEM_BRANCH_FINI (vpc); | |
6371 | #undef FLD | |
6372 | } | |
6373 | NEXT (vpc); | |
6374 | ||
6375 | CASE (sem, INSN_CMPI) : /* cmpi $src1, $src2 */ | |
6376 | { | |
6377 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6378 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6379 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
6380 | int UNUSED written = 0; |
6381 | IADDR UNUSED pc = abuf->addr; | |
6382 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6383 | ||
6384 | { | |
6385 | SI opval = (LTSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1); | |
6386 | CPU (h_cc) = opval; | |
7a292a7a | 6387 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6388 | } |
6389 | ||
6390 | #undef FLD | |
6391 | } | |
6392 | NEXT (vpc); | |
6393 | ||
6394 | CASE (sem, INSN_CMPI1) : /* cmpi $lit1, $src2 */ | |
6395 | { | |
6396 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6397 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6398 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
6399 | int UNUSED written = 0; |
6400 | IADDR UNUSED pc = abuf->addr; | |
6401 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6402 | ||
6403 | { | |
6404 | SI opval = (LTSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1); | |
6405 | CPU (h_cc) = opval; | |
7a292a7a | 6406 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6407 | } |
6408 | ||
6409 | #undef FLD | |
6410 | } | |
6411 | NEXT (vpc); | |
6412 | ||
6413 | CASE (sem, INSN_CMPI2) : /* cmpi $src1, $lit2 */ | |
6414 | { | |
6415 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6416 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6417 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
6418 | int UNUSED written = 0; |
6419 | IADDR UNUSED pc = abuf->addr; | |
6420 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6421 | ||
6422 | { | |
6423 | SI opval = (LTSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1); | |
6424 | CPU (h_cc) = opval; | |
7a292a7a | 6425 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6426 | } |
6427 | ||
6428 | #undef FLD | |
6429 | } | |
6430 | NEXT (vpc); | |
6431 | ||
6432 | CASE (sem, INSN_CMPI3) : /* cmpi $lit1, $lit2 */ | |
6433 | { | |
6434 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6435 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6436 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
6437 | int UNUSED written = 0; |
6438 | IADDR UNUSED pc = abuf->addr; | |
6439 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6440 | ||
6441 | { | |
6442 | SI opval = (LTSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1); | |
6443 | CPU (h_cc) = opval; | |
7a292a7a | 6444 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6445 | } |
6446 | ||
6447 | #undef FLD | |
6448 | } | |
6449 | NEXT (vpc); | |
6450 | ||
6451 | CASE (sem, INSN_CMPO) : /* cmpo $src1, $src2 */ | |
6452 | { | |
6453 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6454 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6455 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
6456 | int UNUSED written = 0; |
6457 | IADDR UNUSED pc = abuf->addr; | |
6458 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6459 | ||
6460 | { | |
6461 | SI opval = (LTUSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1); | |
6462 | CPU (h_cc) = opval; | |
7a292a7a | 6463 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6464 | } |
6465 | ||
6466 | #undef FLD | |
6467 | } | |
6468 | NEXT (vpc); | |
6469 | ||
6470 | CASE (sem, INSN_CMPO1) : /* cmpo $lit1, $src2 */ | |
6471 | { | |
6472 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6473 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6474 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
6475 | int UNUSED written = 0; |
6476 | IADDR UNUSED pc = abuf->addr; | |
6477 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6478 | ||
6479 | { | |
6480 | SI opval = (LTUSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1); | |
6481 | CPU (h_cc) = opval; | |
7a292a7a | 6482 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6483 | } |
6484 | ||
6485 | #undef FLD | |
6486 | } | |
6487 | NEXT (vpc); | |
6488 | ||
6489 | CASE (sem, INSN_CMPO2) : /* cmpo $src1, $lit2 */ | |
6490 | { | |
6491 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6492 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6493 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
6494 | int UNUSED written = 0; |
6495 | IADDR UNUSED pc = abuf->addr; | |
6496 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6497 | ||
6498 | { | |
6499 | SI opval = (LTUSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1); | |
6500 | CPU (h_cc) = opval; | |
7a292a7a | 6501 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6502 | } |
6503 | ||
6504 | #undef FLD | |
6505 | } | |
6506 | NEXT (vpc); | |
6507 | ||
6508 | CASE (sem, INSN_CMPO3) : /* cmpo $lit1, $lit2 */ | |
6509 | { | |
6510 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6511 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6512 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
6513 | int UNUSED written = 0; |
6514 | IADDR UNUSED pc = abuf->addr; | |
6515 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6516 | ||
6517 | { | |
6518 | SI opval = (LTUSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1); | |
6519 | CPU (h_cc) = opval; | |
7a292a7a | 6520 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6521 | } |
6522 | ||
6523 | #undef FLD | |
6524 | } | |
6525 | NEXT (vpc); | |
6526 | ||
6527 | CASE (sem, INSN_TESTNO_REG) : /* testno $br_src1 */ | |
6528 | { | |
6529 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6530 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6531 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6532 | int UNUSED written = 0; |
6533 | IADDR UNUSED pc = abuf->addr; | |
6534 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6535 | ||
6536 | { | |
6537 | SI opval = EQSI (CPU (h_cc), 0); | |
6538 | * FLD (i_br_src1) = opval; | |
6539 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6540 | } | |
6541 | ||
6542 | #undef FLD | |
6543 | } | |
6544 | NEXT (vpc); | |
6545 | ||
6546 | CASE (sem, INSN_TESTG_REG) : /* testg $br_src1 */ | |
6547 | { | |
6548 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6549 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6550 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6551 | int UNUSED written = 0; |
6552 | IADDR UNUSED pc = abuf->addr; | |
6553 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6554 | ||
6555 | { | |
6556 | SI opval = NESI (ANDSI (CPU (h_cc), 1), 0); | |
6557 | * FLD (i_br_src1) = opval; | |
6558 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6559 | } | |
6560 | ||
6561 | #undef FLD | |
6562 | } | |
6563 | NEXT (vpc); | |
6564 | ||
6565 | CASE (sem, INSN_TESTE_REG) : /* teste $br_src1 */ | |
6566 | { | |
6567 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6568 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6569 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6570 | int UNUSED written = 0; |
6571 | IADDR UNUSED pc = abuf->addr; | |
6572 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6573 | ||
6574 | { | |
6575 | SI opval = NESI (ANDSI (CPU (h_cc), 2), 0); | |
6576 | * FLD (i_br_src1) = opval; | |
6577 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6578 | } | |
6579 | ||
6580 | #undef FLD | |
6581 | } | |
6582 | NEXT (vpc); | |
6583 | ||
6584 | CASE (sem, INSN_TESTGE_REG) : /* testge $br_src1 */ | |
6585 | { | |
6586 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6587 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6588 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6589 | int UNUSED written = 0; |
6590 | IADDR UNUSED pc = abuf->addr; | |
6591 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6592 | ||
6593 | { | |
6594 | SI opval = NESI (ANDSI (CPU (h_cc), 3), 0); | |
6595 | * FLD (i_br_src1) = opval; | |
6596 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6597 | } | |
6598 | ||
6599 | #undef FLD | |
6600 | } | |
6601 | NEXT (vpc); | |
6602 | ||
6603 | CASE (sem, INSN_TESTL_REG) : /* testl $br_src1 */ | |
6604 | { | |
6605 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6606 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6607 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6608 | int UNUSED written = 0; |
6609 | IADDR UNUSED pc = abuf->addr; | |
6610 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6611 | ||
6612 | { | |
6613 | SI opval = NESI (ANDSI (CPU (h_cc), 4), 0); | |
6614 | * FLD (i_br_src1) = opval; | |
6615 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6616 | } | |
6617 | ||
6618 | #undef FLD | |
6619 | } | |
6620 | NEXT (vpc); | |
6621 | ||
6622 | CASE (sem, INSN_TESTNE_REG) : /* testne $br_src1 */ | |
6623 | { | |
6624 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6625 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6626 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6627 | int UNUSED written = 0; |
6628 | IADDR UNUSED pc = abuf->addr; | |
6629 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6630 | ||
6631 | { | |
6632 | SI opval = NESI (ANDSI (CPU (h_cc), 5), 0); | |
6633 | * FLD (i_br_src1) = opval; | |
6634 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6635 | } | |
6636 | ||
6637 | #undef FLD | |
6638 | } | |
6639 | NEXT (vpc); | |
6640 | ||
6641 | CASE (sem, INSN_TESTLE_REG) : /* testle $br_src1 */ | |
6642 | { | |
6643 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6644 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6645 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6646 | int UNUSED written = 0; |
6647 | IADDR UNUSED pc = abuf->addr; | |
6648 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6649 | ||
6650 | { | |
6651 | SI opval = NESI (ANDSI (CPU (h_cc), 6), 0); | |
6652 | * FLD (i_br_src1) = opval; | |
6653 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6654 | } | |
6655 | ||
6656 | #undef FLD | |
6657 | } | |
6658 | NEXT (vpc); | |
6659 | ||
6660 | CASE (sem, INSN_TESTO_REG) : /* testo $br_src1 */ | |
6661 | { | |
6662 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6663 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6664 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6665 | int UNUSED written = 0; |
6666 | IADDR UNUSED pc = abuf->addr; | |
6667 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6668 | ||
6669 | { | |
6670 | SI opval = NESI (ANDSI (CPU (h_cc), 7), 0); | |
6671 | * FLD (i_br_src1) = opval; | |
6672 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6673 | } | |
6674 | ||
6675 | #undef FLD | |
6676 | } | |
6677 | NEXT (vpc); | |
6678 | ||
6679 | CASE (sem, INSN_BNO) : /* bno $ctrl_disp */ | |
6680 | { | |
6681 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6682 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6683 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6684 | int UNUSED written = 0; |
6685 | IADDR UNUSED pc = abuf->addr; | |
6686 | SEM_BRANCH_INIT | |
6687 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6688 | ||
6689 | if (EQSI (CPU (h_cc), 0)) { | |
6690 | { | |
6691 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6692 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6693 | written |= (1 << 2); |
6694 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6695 | } | |
6696 | } | |
6697 | ||
6698 | abuf->written = written; | |
6699 | SEM_BRANCH_FINI (vpc); | |
6700 | #undef FLD | |
6701 | } | |
6702 | NEXT (vpc); | |
6703 | ||
6704 | CASE (sem, INSN_BG) : /* bg $ctrl_disp */ | |
6705 | { | |
6706 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6707 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6708 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6709 | int UNUSED written = 0; |
6710 | IADDR UNUSED pc = abuf->addr; | |
6711 | SEM_BRANCH_INIT | |
6712 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6713 | ||
6714 | if (NESI (ANDSI (CPU (h_cc), 1), 0)) { | |
6715 | { | |
6716 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6717 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6718 | written |= (1 << 2); |
6719 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6720 | } | |
6721 | } | |
6722 | ||
6723 | abuf->written = written; | |
6724 | SEM_BRANCH_FINI (vpc); | |
6725 | #undef FLD | |
6726 | } | |
6727 | NEXT (vpc); | |
6728 | ||
6729 | CASE (sem, INSN_BE) : /* be $ctrl_disp */ | |
6730 | { | |
6731 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6732 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6733 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6734 | int UNUSED written = 0; |
6735 | IADDR UNUSED pc = abuf->addr; | |
6736 | SEM_BRANCH_INIT | |
6737 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6738 | ||
6739 | if (NESI (ANDSI (CPU (h_cc), 2), 0)) { | |
6740 | { | |
6741 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6742 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6743 | written |= (1 << 2); |
6744 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6745 | } | |
6746 | } | |
6747 | ||
6748 | abuf->written = written; | |
6749 | SEM_BRANCH_FINI (vpc); | |
6750 | #undef FLD | |
6751 | } | |
6752 | NEXT (vpc); | |
6753 | ||
6754 | CASE (sem, INSN_BGE) : /* bge $ctrl_disp */ | |
6755 | { | |
6756 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6757 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6758 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6759 | int UNUSED written = 0; |
6760 | IADDR UNUSED pc = abuf->addr; | |
6761 | SEM_BRANCH_INIT | |
6762 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6763 | ||
6764 | if (NESI (ANDSI (CPU (h_cc), 3), 0)) { | |
6765 | { | |
6766 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6767 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6768 | written |= (1 << 2); |
6769 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6770 | } | |
6771 | } | |
6772 | ||
6773 | abuf->written = written; | |
6774 | SEM_BRANCH_FINI (vpc); | |
6775 | #undef FLD | |
6776 | } | |
6777 | NEXT (vpc); | |
6778 | ||
6779 | CASE (sem, INSN_BL) : /* bl $ctrl_disp */ | |
6780 | { | |
6781 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6782 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6783 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6784 | int UNUSED written = 0; |
6785 | IADDR UNUSED pc = abuf->addr; | |
6786 | SEM_BRANCH_INIT | |
6787 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6788 | ||
6789 | if (NESI (ANDSI (CPU (h_cc), 4), 0)) { | |
6790 | { | |
6791 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6792 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6793 | written |= (1 << 2); |
6794 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6795 | } | |
6796 | } | |
6797 | ||
6798 | abuf->written = written; | |
6799 | SEM_BRANCH_FINI (vpc); | |
6800 | #undef FLD | |
6801 | } | |
6802 | NEXT (vpc); | |
6803 | ||
6804 | CASE (sem, INSN_BNE) : /* bne $ctrl_disp */ | |
6805 | { | |
6806 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6807 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6808 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6809 | int UNUSED written = 0; |
6810 | IADDR UNUSED pc = abuf->addr; | |
6811 | SEM_BRANCH_INIT | |
6812 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6813 | ||
6814 | if (NESI (ANDSI (CPU (h_cc), 5), 0)) { | |
6815 | { | |
6816 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6817 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6818 | written |= (1 << 2); |
6819 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6820 | } | |
6821 | } | |
6822 | ||
6823 | abuf->written = written; | |
6824 | SEM_BRANCH_FINI (vpc); | |
6825 | #undef FLD | |
6826 | } | |
6827 | NEXT (vpc); | |
6828 | ||
6829 | CASE (sem, INSN_BLE) : /* ble $ctrl_disp */ | |
6830 | { | |
6831 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6832 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6833 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6834 | int UNUSED written = 0; |
6835 | IADDR UNUSED pc = abuf->addr; | |
6836 | SEM_BRANCH_INIT | |
6837 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6838 | ||
6839 | if (NESI (ANDSI (CPU (h_cc), 6), 0)) { | |
6840 | { | |
6841 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6842 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6843 | written |= (1 << 2); |
6844 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6845 | } | |
6846 | } | |
6847 | ||
6848 | abuf->written = written; | |
6849 | SEM_BRANCH_FINI (vpc); | |
6850 | #undef FLD | |
6851 | } | |
6852 | NEXT (vpc); | |
6853 | ||
6854 | CASE (sem, INSN_BO) : /* bo $ctrl_disp */ | |
6855 | { | |
6856 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6857 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6858 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6859 | int UNUSED written = 0; |
6860 | IADDR UNUSED pc = abuf->addr; | |
6861 | SEM_BRANCH_INIT | |
6862 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6863 | ||
6864 | if (NESI (ANDSI (CPU (h_cc), 7), 0)) { | |
6865 | { | |
6866 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6867 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6868 | written |= (1 << 2); |
6869 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6870 | } | |
6871 | } | |
6872 | ||
6873 | abuf->written = written; | |
6874 | SEM_BRANCH_FINI (vpc); | |
6875 | #undef FLD | |
6876 | } | |
6877 | NEXT (vpc); | |
6878 | ||
6879 | CASE (sem, INSN_B) : /* b $ctrl_disp */ | |
6880 | { | |
6881 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6882 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6883 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6884 | int UNUSED written = 0; |
6885 | IADDR UNUSED pc = abuf->addr; | |
6886 | SEM_BRANCH_INIT | |
6887 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6888 | ||
6889 | { | |
6890 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6891 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6892 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
6893 | } | |
6894 | ||
6895 | SEM_BRANCH_FINI (vpc); | |
6896 | #undef FLD | |
6897 | } | |
6898 | NEXT (vpc); | |
6899 | ||
6900 | CASE (sem, INSN_BX_INDIRECT_OFFSET) : /* bx $offset($abase) */ | |
6901 | { | |
6902 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6903 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6904 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
6905 | int UNUSED written = 0; |
6906 | IADDR UNUSED pc = abuf->addr; | |
6907 | SEM_BRANCH_INIT | |
6908 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6909 | ||
6910 | { | |
6911 | USI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
6912 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6913 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6914 | } | |
6915 | ||
6916 | SEM_BRANCH_FINI (vpc); | |
6917 | #undef FLD | |
6918 | } | |
6919 | NEXT (vpc); | |
6920 | ||
6921 | CASE (sem, INSN_BX_INDIRECT) : /* bx ($abase) */ | |
6922 | { | |
6923 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6924 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6925 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
6926 | int UNUSED written = 0; |
6927 | IADDR UNUSED pc = abuf->addr; | |
6928 | SEM_BRANCH_INIT | |
6929 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6930 | ||
6931 | { | |
6932 | USI opval = * FLD (i_abase); | |
6933 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6934 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6935 | } | |
6936 | ||
6937 | SEM_BRANCH_FINI (vpc); | |
6938 | #undef FLD | |
6939 | } | |
6940 | NEXT (vpc); | |
6941 | ||
6942 | CASE (sem, INSN_BX_INDIRECT_INDEX) : /* bx ($abase)[$index*S$scale] */ | |
6943 | { | |
6944 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6945 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6946 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
6947 | int UNUSED written = 0; |
6948 | IADDR UNUSED pc = abuf->addr; | |
6949 | SEM_BRANCH_INIT | |
6950 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6951 | ||
6952 | { | |
6953 | USI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
6954 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6955 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6956 | } | |
6957 | ||
6958 | SEM_BRANCH_FINI (vpc); | |
6959 | #undef FLD | |
6960 | } | |
6961 | NEXT (vpc); | |
6962 | ||
6963 | CASE (sem, INSN_BX_DISP) : /* bx $optdisp */ | |
6964 | { | |
6965 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6966 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6967 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
6968 | int UNUSED written = 0; |
6969 | IADDR UNUSED pc = abuf->addr; | |
6970 | SEM_BRANCH_INIT | |
6971 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
6972 | ||
6973 | { | |
6974 | USI opval = FLD (f_optdisp); | |
96baa820 | 6975 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6976 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
6977 | } | |
6978 | ||
6979 | SEM_BRANCH_FINI (vpc); | |
6980 | #undef FLD | |
6981 | } | |
6982 | NEXT (vpc); | |
6983 | ||
6984 | CASE (sem, INSN_BX_INDIRECT_DISP) : /* bx $optdisp($abase) */ | |
6985 | { | |
6986 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6987 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6988 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
6989 | int UNUSED written = 0; |
6990 | IADDR UNUSED pc = abuf->addr; | |
6991 | SEM_BRANCH_INIT | |
6992 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
6993 | ||
6994 | { | |
6995 | USI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
6996 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6997 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6998 | } | |
6999 | ||
7000 | SEM_BRANCH_FINI (vpc); | |
7001 | #undef FLD | |
7002 | } | |
7003 | NEXT (vpc); | |
7004 | ||
7005 | CASE (sem, INSN_CALLX_DISP) : /* callx $optdisp */ | |
7006 | { | |
7007 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7008 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7009 | #define FLD(f) abuf->fields.sfmt_callx_disp.f |
c906108c SS |
7010 | int UNUSED written = 0; |
7011 | IADDR UNUSED pc = abuf->addr; | |
7012 | SEM_BRANCH_INIT | |
7013 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
7014 | ||
7a292a7a | 7015 | { |
c906108c SS |
7016 | SI tmp_temp; |
7017 | tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); | |
7018 | { | |
7019 | SI opval = ADDSI (pc, 8); | |
7020 | CPU (h_gr[((UINT) 2)]) = opval; | |
7021 | TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); | |
7022 | } | |
7023 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); | |
7024 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); | |
7025 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); | |
7026 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); | |
7027 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); | |
7028 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); | |
7029 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); | |
7030 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); | |
7031 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); | |
7032 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); | |
7033 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); | |
7034 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); | |
7035 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); | |
7036 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); | |
7037 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); | |
7038 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); | |
7039 | { | |
7040 | USI opval = FLD (f_optdisp); | |
96baa820 | 7041 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
7042 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
7043 | } | |
7044 | CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; | |
7045 | CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; | |
7046 | CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; | |
7047 | CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; | |
7048 | CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; | |
7049 | CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; | |
7050 | CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; | |
7051 | CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; | |
7052 | CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; | |
7053 | CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; | |
7054 | CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; | |
7055 | CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; | |
7056 | CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; | |
7057 | CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; | |
7058 | CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; | |
7059 | CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; | |
7060 | { | |
7061 | SI opval = CPU (h_gr[((UINT) 31)]); | |
7062 | CPU (h_gr[((UINT) 0)]) = opval; | |
7063 | TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); | |
7064 | } | |
7065 | { | |
7066 | SI opval = tmp_temp; | |
7067 | CPU (h_gr[((UINT) 31)]) = opval; | |
7068 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7069 | } | |
7070 | { | |
7071 | SI opval = ADDSI (tmp_temp, 64); | |
7072 | CPU (h_gr[((UINT) 1)]) = opval; | |
7073 | TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); | |
7074 | } | |
7a292a7a | 7075 | } |
c906108c SS |
7076 | |
7077 | SEM_BRANCH_FINI (vpc); | |
7078 | #undef FLD | |
7079 | } | |
7080 | NEXT (vpc); | |
7081 | ||
7082 | CASE (sem, INSN_CALLX_INDIRECT) : /* callx ($abase) */ | |
7083 | { | |
7084 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7085 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7086 | #define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f |
c906108c SS |
7087 | int UNUSED written = 0; |
7088 | IADDR UNUSED pc = abuf->addr; | |
7089 | SEM_BRANCH_INIT | |
7090 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7091 | ||
7a292a7a | 7092 | { |
c906108c SS |
7093 | SI tmp_temp; |
7094 | tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); | |
7095 | { | |
7096 | SI opval = ADDSI (pc, 4); | |
7097 | CPU (h_gr[((UINT) 2)]) = opval; | |
7098 | TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); | |
7099 | } | |
7100 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); | |
7101 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); | |
7102 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); | |
7103 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); | |
7104 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); | |
7105 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); | |
7106 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); | |
7107 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); | |
7108 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); | |
7109 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); | |
7110 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); | |
7111 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); | |
7112 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); | |
7113 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); | |
7114 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); | |
7115 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); | |
7116 | { | |
7117 | USI opval = * FLD (i_abase); | |
7118 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7119 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7120 | } | |
7121 | CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; | |
7122 | CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; | |
7123 | CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; | |
7124 | CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; | |
7125 | CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; | |
7126 | CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; | |
7127 | CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; | |
7128 | CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; | |
7129 | CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; | |
7130 | CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; | |
7131 | CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; | |
7132 | CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; | |
7133 | CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; | |
7134 | CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; | |
7135 | CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; | |
7136 | CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; | |
7137 | { | |
7138 | SI opval = CPU (h_gr[((UINT) 31)]); | |
7139 | CPU (h_gr[((UINT) 0)]) = opval; | |
7140 | TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); | |
7141 | } | |
7142 | { | |
7143 | SI opval = tmp_temp; | |
7144 | CPU (h_gr[((UINT) 31)]) = opval; | |
7145 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7146 | } | |
7147 | { | |
7148 | SI opval = ADDSI (tmp_temp, 64); | |
7149 | CPU (h_gr[((UINT) 1)]) = opval; | |
7150 | TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); | |
7151 | } | |
7a292a7a | 7152 | } |
c906108c SS |
7153 | |
7154 | SEM_BRANCH_FINI (vpc); | |
7155 | #undef FLD | |
7156 | } | |
7157 | NEXT (vpc); | |
7158 | ||
7159 | CASE (sem, INSN_CALLX_INDIRECT_OFFSET) : /* callx $offset($abase) */ | |
7160 | { | |
7161 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7162 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7163 | #define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f |
c906108c SS |
7164 | int UNUSED written = 0; |
7165 | IADDR UNUSED pc = abuf->addr; | |
7166 | SEM_BRANCH_INIT | |
7167 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7168 | ||
7a292a7a | 7169 | { |
c906108c SS |
7170 | SI tmp_temp; |
7171 | tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); | |
7172 | { | |
7173 | SI opval = ADDSI (pc, 4); | |
7174 | CPU (h_gr[((UINT) 2)]) = opval; | |
7175 | TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); | |
7176 | } | |
7177 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); | |
7178 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); | |
7179 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); | |
7180 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); | |
7181 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); | |
7182 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); | |
7183 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); | |
7184 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); | |
7185 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); | |
7186 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); | |
7187 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); | |
7188 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); | |
7189 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); | |
7190 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); | |
7191 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); | |
7192 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); | |
7193 | { | |
7194 | USI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
7195 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7196 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7197 | } | |
7198 | CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; | |
7199 | CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; | |
7200 | CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; | |
7201 | CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; | |
7202 | CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; | |
7203 | CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; | |
7204 | CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; | |
7205 | CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; | |
7206 | CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; | |
7207 | CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; | |
7208 | CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; | |
7209 | CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; | |
7210 | CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; | |
7211 | CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; | |
7212 | CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; | |
7213 | CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; | |
7214 | { | |
7215 | SI opval = CPU (h_gr[((UINT) 31)]); | |
7216 | CPU (h_gr[((UINT) 0)]) = opval; | |
7217 | TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); | |
7218 | } | |
7219 | { | |
7220 | SI opval = tmp_temp; | |
7221 | CPU (h_gr[((UINT) 31)]) = opval; | |
7222 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7223 | } | |
7224 | { | |
7225 | SI opval = ADDSI (tmp_temp, 64); | |
7226 | CPU (h_gr[((UINT) 1)]) = opval; | |
7227 | TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); | |
7228 | } | |
7a292a7a | 7229 | } |
c906108c SS |
7230 | |
7231 | SEM_BRANCH_FINI (vpc); | |
7232 | #undef FLD | |
7233 | } | |
7234 | NEXT (vpc); | |
7235 | ||
7236 | CASE (sem, INSN_RET) : /* ret */ | |
7237 | { | |
7238 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7239 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7240 | #define FLD(f) abuf->fields.sfmt_callx_disp.f |
c906108c SS |
7241 | int UNUSED written = 0; |
7242 | IADDR UNUSED pc = abuf->addr; | |
7243 | SEM_BRANCH_INIT | |
7244 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7245 | ||
7a292a7a | 7246 | { |
c906108c SS |
7247 | { |
7248 | SI opval = CPU (h_gr[((UINT) 0)]); | |
7249 | CPU (h_gr[((UINT) 31)]) = opval; | |
7250 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7251 | } | |
7252 | CPU (h_gr[((UINT) 0)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0)); | |
7253 | CPU (h_gr[((UINT) 1)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4)); | |
7254 | CPU (h_gr[((UINT) 2)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8)); | |
7255 | CPU (h_gr[((UINT) 3)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12)); | |
7256 | CPU (h_gr[((UINT) 4)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16)); | |
7257 | CPU (h_gr[((UINT) 5)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20)); | |
7258 | CPU (h_gr[((UINT) 6)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24)); | |
7259 | CPU (h_gr[((UINT) 7)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28)); | |
7260 | CPU (h_gr[((UINT) 8)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32)); | |
7261 | CPU (h_gr[((UINT) 9)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36)); | |
7262 | CPU (h_gr[((UINT) 10)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40)); | |
7263 | CPU (h_gr[((UINT) 11)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44)); | |
7264 | CPU (h_gr[((UINT) 12)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48)); | |
7265 | CPU (h_gr[((UINT) 13)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52)); | |
7266 | CPU (h_gr[((UINT) 14)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56)); | |
7267 | CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60)); | |
7268 | { | |
7269 | USI opval = CPU (h_gr[((UINT) 2)]); | |
7270 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7271 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7272 | } | |
7a292a7a | 7273 | } |
c906108c SS |
7274 | |
7275 | SEM_BRANCH_FINI (vpc); | |
7276 | #undef FLD | |
7277 | } | |
7278 | NEXT (vpc); | |
7279 | ||
7280 | CASE (sem, INSN_CALLS) : /* calls $src1 */ | |
7281 | { | |
7282 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7283 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7284 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
7285 | int UNUSED written = 0; |
7286 | IADDR UNUSED pc = abuf->addr; | |
7287 | SEM_BRANCH_INIT | |
7288 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7289 | ||
7290 | { | |
7291 | SI opval = i960_trap (current_cpu, pc, * FLD (i_src1)); | |
7292 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7293 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7294 | } | |
7295 | ||
7296 | SEM_BRANCH_FINI (vpc); | |
7297 | #undef FLD | |
7298 | } | |
7299 | NEXT (vpc); | |
7300 | ||
7301 | CASE (sem, INSN_FMARK) : /* fmark */ | |
7302 | { | |
7303 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7304 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7305 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
7306 | int UNUSED written = 0; |
7307 | IADDR UNUSED pc = abuf->addr; | |
7308 | SEM_BRANCH_INIT | |
7309 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7310 | ||
7311 | { | |
7312 | SI opval = i960_breakpoint (current_cpu, pc); | |
7313 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7314 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7315 | } | |
7316 | ||
7317 | SEM_BRANCH_FINI (vpc); | |
7318 | #undef FLD | |
7319 | } | |
7320 | NEXT (vpc); | |
7321 | ||
7322 | CASE (sem, INSN_FLUSHREG) : /* flushreg */ | |
7323 | { | |
7324 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7325 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7326 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
7327 | int UNUSED written = 0; |
7328 | IADDR UNUSED pc = abuf->addr; | |
7329 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7330 | ||
2acceee2 | 7331 | ((void) 0); /*nop*/ |
c906108c SS |
7332 | |
7333 | #undef FLD | |
7334 | } | |
7335 | NEXT (vpc); | |
7336 | ||
7337 | ||
7338 | } | |
7339 | ENDSWITCH (sem) /* End of semantic switch. */ | |
7340 | ||
7341 | /* At this point `vpc' contains the next insn to execute. */ | |
7342 | } | |
7343 | ||
7344 | #undef DEFINE_SWITCH | |
7345 | #endif /* DEFINE_SWITCH */ |