Commit | Line | Data |
---|---|---|
edece237 | 1 | /* Main simulator entry points specific to the IQ2000. |
88b9d363 | 2 | Copyright (C) 2000-2022 Free Software Foundation, Inc. |
edece237 CV |
3 | Contributed by Cygnus Solutions. |
4 | ||
5 | This file is part of the GNU simulators. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
4744ac1b JB |
9 | the Free Software Foundation; either version 3 of the License, or |
10 | (at your option) any later version. | |
edece237 CV |
11 | |
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
4744ac1b JB |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
edece237 | 19 | |
6df01ab8 MF |
20 | /* This must come before any other includes. */ |
21 | #include "defs.h" | |
22 | ||
edece237 | 23 | #include "sim-main.h" |
68ed2854 | 24 | |
edece237 | 25 | #include <stdlib.h> |
68ed2854 | 26 | |
edece237 CV |
27 | #include "sim-options.h" |
28 | #include "libiberty.h" | |
29 | #include "bfd.h" | |
30 | ||
31 | static void free_state (SIM_DESC); | |
edece237 CV |
32 | \f |
33 | /* Cover function for sim_cgen_disassemble_insn. */ | |
34 | ||
35 | void | |
36 | iq2000bf_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn, | |
37 | const ARGBUF *abuf, IADDR pc, char *buf) | |
38 | { | |
39 | sim_cgen_disassemble_insn(cpu, insn, abuf, pc, buf); | |
40 | } | |
41 | ||
42 | /* Cover function of sim_state_free to free the cpu buffers as well. */ | |
43 | ||
44 | static void | |
45 | free_state (SIM_DESC sd) | |
46 | { | |
47 | if (STATE_MODULES (sd) != NULL) | |
48 | sim_module_uninstall (sd); | |
49 | sim_cpu_free_all (sd); | |
50 | sim_state_free (sd); | |
51 | } | |
52 | ||
1c636da0 MF |
53 | extern const SIM_MACH * const iq2000_sim_machs[]; |
54 | ||
edece237 CV |
55 | /* Create an instance of the simulator. */ |
56 | ||
57 | SIM_DESC | |
81e6e8ae TT |
58 | sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd, |
59 | char * const *argv) | |
edece237 CV |
60 | { |
61 | char c; | |
62 | int i; | |
63 | SIM_DESC sd = sim_state_alloc (kind, callback); | |
64 | ||
ba307cdd | 65 | /* Set default options before parsing user options. */ |
1c636da0 | 66 | STATE_MACHS (sd) = iq2000_sim_machs; |
d414eb3e | 67 | STATE_MODEL_NAME (sd) = "iq2000"; |
ba307cdd | 68 | current_alignment = STRICT_ALIGNMENT; |
f9a4d543 | 69 | current_target_byte_order = BFD_ENDIAN_BIG; |
ba307cdd | 70 | |
edece237 | 71 | /* The cpu data is kept in a separately allocated chunk of memory. */ |
d5a71b11 | 72 | if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK) |
edece237 CV |
73 | { |
74 | free_state (sd); | |
75 | return 0; | |
76 | } | |
77 | ||
edece237 CV |
78 | if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) |
79 | { | |
80 | free_state (sd); | |
81 | return 0; | |
82 | } | |
83 | ||
77cf2ef5 | 84 | /* The parser will print an error message for us, so we silently return. */ |
edece237 CV |
85 | if (sim_parse_args (sd, argv) != SIM_RC_OK) |
86 | { | |
87 | free_state (sd); | |
88 | return 0; | |
89 | } | |
90 | ||
91 | /* Allocate core managed memory. */ | |
92 | sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_INSN_VALUE, IQ2000_INSN_MEM_SIZE); | |
93 | sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_DATA_VALUE, IQ2000_DATA_MEM_SIZE); | |
94 | ||
95 | /* check for/establish the reference program image */ | |
96 | if (sim_analyze_program (sd, | |
97 | (STATE_PROG_ARGV (sd) != NULL | |
98 | ? *STATE_PROG_ARGV (sd) | |
99 | : NULL), | |
100 | abfd) != SIM_RC_OK) | |
101 | { | |
102 | free_state (sd); | |
103 | return 0; | |
104 | } | |
105 | ||
106 | /* Establish any remaining configuration options. */ | |
107 | if (sim_config (sd) != SIM_RC_OK) | |
108 | { | |
109 | free_state (sd); | |
110 | return 0; | |
111 | } | |
112 | ||
113 | if (sim_post_argv_init (sd) != SIM_RC_OK) | |
114 | { | |
115 | free_state (sd); | |
116 | return 0; | |
117 | } | |
118 | ||
119 | /* Open a copy of the cpu descriptor table. */ | |
120 | { | |
121 | CGEN_CPU_DESC cd = iq2000_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, | |
122 | CGEN_ENDIAN_BIG); | |
123 | ||
124 | for (i = 0; i < MAX_NR_PROCESSORS; ++i) | |
125 | { | |
126 | SIM_CPU *cpu = STATE_CPU (sd, i); | |
127 | CPU_CPU_DESC (cpu) = cd; | |
128 | CPU_DISASSEMBLER (cpu) = iq2000bf_disassemble_insn; | |
129 | } | |
130 | iq2000_cgen_init_dis (cd); | |
131 | } | |
132 | ||
edece237 CV |
133 | return sd; |
134 | } | |
edece237 CV |
135 | \f |
136 | SIM_RC | |
81e6e8ae TT |
137 | sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv, |
138 | char * const *envp) | |
edece237 CV |
139 | { |
140 | SIM_CPU *current_cpu = STATE_CPU (sd, 0); | |
141 | SIM_ADDR addr; | |
142 | ||
143 | if (abfd != NULL) | |
144 | addr = bfd_get_start_address (abfd); | |
145 | else | |
146 | addr = CPU2INSN(0); | |
147 | sim_pc_set (current_cpu, addr); | |
148 | ||
0e967299 MF |
149 | /* Standalone mode (i.e. `run`) will take care of the argv for us in |
150 | sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim' | |
151 | with `gdb`), we need to handle it because the user can change the | |
152 | argv on the fly via gdb's 'run'. */ | |
153 | if (STATE_PROG_ARGV (sd) != argv) | |
154 | { | |
155 | freeargv (STATE_PROG_ARGV (sd)); | |
156 | STATE_PROG_ARGV (sd) = dupargv (argv); | |
157 | } | |
edece237 CV |
158 | |
159 | return SIM_RC_OK; | |
160 | } |