* sim-main.h: Delete inclusion of config.h, include sim-basics.h
[deliverable/binutils-gdb.git] / sim / m32r / Makefile.in
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fafce69a 1# Makefile template for Configure for the m32r simulator
369fba30 2# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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3# Contributed by Cygnus Support.
4#
5# This file is part of GDB, the GNU debugger.
6#
7# This program is free software; you can redistribute it and/or modify
8# it under the terms of the GNU General Public License as published by
9# the Free Software Foundation; either version 2 of the License, or
10# (at your option) any later version.
11#
12# This program is distributed in the hope that it will be useful,
13# but WITHOUT ANY WARRANTY; without even the implied warranty of
14# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15# GNU General Public License for more details.
16#
17# You should have received a copy of the GNU General Public License along
18# with this program; if not, write to the Free Software Foundation, Inc.,
19# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20
21## COMMON_PRE_CONFIG_FRAG
22
0e701ac3 23M32R_OBJS = m32r.o cpu.o decode.o extract.o sem.o model.o mloop.o
369fba30 24# start-sanitize-m32rx
bb51b65d 25M32RX_OBJS = m32rx.o cpux.o decodex.o extractx.o modelx.o mloopx.o
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26# end-sanitize-m32rx
27
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28CONFIG_DEVICES = dv-sockser.o
29CONFIG_DEVICES =
30
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31SIM_OBJS = \
32 $(SIM_NEW_COMMON_OBJS) \
496cf06b 33 sim-cpu.o \
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34 sim-hload.o \
35 sim-hrw.o \
36 sim-model.o \
bb51b65d 37 sim-reg.o \
369fba30 38 cgen-utils.o cgen-trace.o cgen-scache.o \
bb51b65d 39 cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
369fba30 40 sim-if.o arch.o \
177dedfb 41 $(M32R_OBJS) \
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42 $(start-sanitize-m32rx) \
43 $(M32RX_OBJS) \
44 $(end-sanitize-m32rx) \
496cf06b 45 traps.o devices.o \
177dedfb 46 $(CONFIG_DEVICES)
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47
48# Extra headers included by sim-main.h.
49SIM_EXTRA_DEPS = \
50 $(srcdir)/../common/cgen-types.h \
51 $(srcdir)/../common/cgen-sim.h \
52 $(srcdir)/../common/cgen-trace.h \
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53 arch.h cpuall.h m32r-sim.h cpu-opc.h \
54 $(srcdir)/../../include/opcode/cgen.h
fafce69a 55
369fba30 56SIM_EXTRA_CFLAGS =
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57
58SIM_RUN_OBJS = nrun.o
59SIM_EXTRA_CLEAN = m32r-clean
60
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61# This selects the m32r newlib/libgloss syscall definitions.
62NL_TARGET = -DNL_TARGET_m32r
63
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64## COMMON_POST_CONFIG_FRAG
65
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66arch = m32r
67
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68MAIN_INCLUDE_DEPS = \
69 sim-main.h \
70 $(srcdir)/../common/sim-config.h \
71 $(srcdir)/../common/sim-base.h \
72 $(srcdir)/../common/sim-basics.h \
73 $(srcdir)/../common/sim-module.h \
74 $(srcdir)/../common/sim-trace.h \
75 $(srcdir)/../common/sim-profile.h \
76 tconfig.h
bb51b65d 77INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS)
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78OPS_INCLUDE_DEPS = \
79 $(srcdir)/../common/cgen-mem.h \
80 $(srcdir)/../common/cgen-ops.h
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81
82sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h
fafce69a 83
599bae21 84arch.o: arch.c $(INCLUDE_DEPS)
369fba30 85
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86devices.o: devices.c $(INCLUDE_DEPS)
87
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88# M32R objs
89
177dedfb 90m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
b8a9943d 91
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92# FIXME: Use of `mono' is wip.
93mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile
94 rm -f mloop.c
b8a9943d 95 $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
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96 -mono -fast -pbb -switch sem-switch.c \
97 m32rbf $(srcdir)/mloop.in \
98 | sed -e 's/@cpu@/m32rbf/' -e 's/@CPU@/M32RBF/' >mloop.c
99mloop.o: mloop.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) stamp-cpu
369fba30 100
0e701ac3 101cpu.o: cpu.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
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102decode.o: decode.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
103extract.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
177dedfb 104sem.o: sem.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
177dedfb 105model.o: model.c $(INCLUDE_DEPS) cpu.h decode.h
369fba30 106
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107# start-sanitize-m32rx
108# M32RX objs
109
177dedfb 110m32rx.o: m32rx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
b8a9943d 111
fafce69a 112# FIXME: Use of `mono' is wip.
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113mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
114 rm -f mloopx.c
b8a9943d 115 $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
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116 -mono -no-fast -pbb -parallel -switch semx-switch.c \
117 m32rxf $(srcdir)/mloopx.in \
118 | sed -e 's/@cpu@/m32rxf/' -e 's/@CPU@/M32RXF/' >mloopx.c
119mloopx.o: mloopx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) stamp-xcpu
fafce69a 120
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121cpux.o: cpux.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
122decodex.o: decodex.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
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123extractx.o: extractx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
124#semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
177dedfb 125modelx.o: modelx.c $(INCLUDE_DEPS) cpux.h decodex.h
369fba30 126# end-sanitize-m32rx
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127
128m32r-clean:
bb51b65d 129 rm -f mloop.c stamp-arch stamp-cpu
369fba30 130# start-sanitize-m32rx
bb51b65d 131 rm -f mloopx.c stamp-xcpu
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132# end-sanitize-m32rx
133 rm -f tmp-*
134
135# start-sanitize-cygnus
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136# cgen support, enable with --enable-cgen-maint
137CGEN_MAINT = ; @true
138# The following line is commented in or out depending upon --enable-cgen-maint.
13ccace0 139@CGEN_MAINT@CGEN_MAINT =
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140
141stamp-arch: $(CGEN_MAIN_SCM) $(srccgen)/m32r.cpu
13ccace0 142 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS)
369fba30 143 touch stamp-arch
177dedfb 144arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
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145 @true
146
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147stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
148 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
149 cpu=m32rbf mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
369fba30 150 touch stamp-cpu
bb51b65d 151cpu.h extract.c sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
369fba30 152 @true
177dedfb 153# end-sanitize-cygnus
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154
155# start-sanitize-m32rx
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156stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
157 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
158 cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEMSW)"
369fba30 159 touch stamp-xcpu
bb51b65d 160cpux.h extractx.c semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
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161 @true
162# end-sanitize-m32rx
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