[deliverable/binutils-gdb.git] / sim / mips / configure.ac

dnl Process this file with autoconf to produce a configure script.
AC_PREREQ(2.64)dnl
AC_INIT(Makefile.in)
sinclude(../common/aclocal.m4)

SIM_AC_COMMON

dnl Options available in this module
SIM_AC_OPTION_INLINE()
SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
SIM_AC_OPTION_HOSTENDIAN
SIM_AC_OPTION_WARNINGS
SIM_AC_OPTION_RESERVED_BITS(1)

# DEPRECATED
#
# Instead of defining a `subtarget' macro, code should be checking
# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
# in question.
#
case "${target}" in
  mips64vr*-*-*)	SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
  mips*tx39*)           SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
  mips*-sde-elf*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mipsisa32*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mipsisa64*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  *)                    SIM_SUBTARGET="";;
esac
AC_SUBST(SIM_SUBTARGET)


#
# Select the byte order of the target
#
mips_endian=
default_endian=
case "${target}" in
  mips64el*-*-*)	mips_endian=LITTLE_ENDIAN ;;
  mips64vr*el-*-*)      default_endian=LITTLE_ENDIAN ;;
  mips64*-*-*)          default_endian=BIG_ENDIAN ;;
  mips16*-*-*)          default_endian=BIG_ENDIAN ;;
  mipsisa32*-*-*)       default_endian=BIG_ENDIAN ;;
  mipsisa64*-*-*)       default_endian=BIG_ENDIAN ;;
  mips*-*-*)            default_endian=BIG_ENDIAN ;;
  *)                    default_endian=BIG_ENDIAN ;;
esac
SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)


#
# Select the bitsize of the target
#
mips_addr_bitsize=
case "${target}" in
  mips*-sde-elf*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips64*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
  mips16*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
  mipsisa32*-*-*)       mips_bitsize=32 ; mips_msb=31 ;;
  mipsisa64*-*-*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips*-*-*)            mips_bitsize=32 ; mips_msb=31 ;;
  *)                    mips_bitsize=64 ; mips_msb=63 ;;
esac
SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)


#
# Select the floating hardware support of the target
#
mips_fpu=HARDWARE_FLOATING_POINT
mips_fpu_bitsize=
case "${target}" in
  mips*tx39*)		mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
  mips*-sde-elf*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips64*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
  mips16*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
  mipsisa32*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mipsisa64*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips*-*-*)            mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
  *)                    mips_fpu=HARD_FLOATING_POINT ;;
esac
SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)


#
# Select the level of SMP support
#
case "${target}" in
  *)                    mips_smp=0 ;;
esac
SIM_AC_OPTION_SMP($mips_smp)


#
# Select the IGEN architecture
#
sim_gen=IGEN
sim_igen_machine="-M mipsIV"
sim_m16_machine="-M mips16,mipsIII"
sim_igen_filter="32,64,f"
sim_m16_filter="16"
sim_mach_default="mips8000"

case "${target}" in
  mips*tx39*)		sim_gen=IGEN
			sim_igen_filter="32,f"
			sim_igen_machine="-M r3900"
			;;
  mips64vr43*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mipsIV"
			sim_mach_default="mips8000"
			;;
  mips64vr5*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M vr5000"
			sim_mach_default="mips5000"
			;;
  mips64vr41*)		sim_gen=M16
			sim_igen_machine="-M vr4100"
			sim_m16_machine="-M vr4100"
			sim_igen_filter="32,64,f"
			sim_m16_filter="16"
			sim_mach_default="mips4100"
                        ;;
  mips64vr-*-* | mips64vrel-*-*)
			sim_gen=MULTI
			sim_multi_configs="\
			  vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
			  vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
			  vr5000:mipsIV:32,64,f:mips4300,mips5000\
			  vr5400:mipsIV,vr5400:32,64,f:mips5400\
			  vr5500:mipsIV,vr5500:32,64,f:mips5500"
			sim_multi_default=mips5000
			;;
  mips*-sde-elf*)	sim_gen=M16
			sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips"
			sim_m16_machine="-M mips16,mips16e,mips64r2"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64r2"
			;;
  mips64*-*-*)		sim_igen_filter="32,64,f"
			sim_gen=IGEN
			;;
  mips16*-*-*)		sim_gen=M16
			sim_igen_filter="32,64,f"
			sim_m16_filter="16"
			;;
  mipsisa32r2*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips32r2,mips16,mips16e,mdmx,dsp,dsp2,smartmips"
			sim_m16_machine="-M mips16,mips16e,mips32r2"
			sim_igen_filter="32,f"
			sim_mach_default="mipsisa32r2"
			;;
  mipsisa32*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
			sim_m16_machine="-M mips16,mips16e,mips32"
			sim_igen_filter="32,f"
			sim_mach_default="mipsisa32"
			;;
  mipsisa64r2*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
			sim_m16_machine="-M mips16,mips16e,mips64r2"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64r2"
			;;
  mipsisa64sb1*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mips64,mips3d,sb1"
			sim_igen_filter="32,64,f"
			sim_mach_default="mips_sb1"
			;;
  mipsisa64*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
			sim_m16_machine="-M mips16,mips16e,mips64"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64"
			;;
  mips*lsi*)		sim_gen=M16
			sim_igen_machine="-M mipsIII,mips16"
			sim_m16_machine="-M mips16,mipsIII"
			sim_igen_filter="32,f"
			sim_m16_filter="16"
			sim_mach_default="mips4000"
			;;
  mips*-*-*)		sim_gen=IGEN
			sim_igen_filter="32,f"
			;;
esac

# The MULTI generator can combine several simulation engines into one.
# executable.  A configuration which uses the MULTI should set two
# variables: ${sim_multi_configs} and ${sim_multi_default}.
#
# ${sim_multi_configs} is the list of engines to build.  Each
# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
# where:
#
# - NAME is a C-compatible prefix for the engine,
# - MACHINE is a -M argument,
# - FILTER is a -F argument, and
# - BFDMACHS is a comma-separated list of bfd machines that the
#     simulator can run.
#
# Each entry will have a separate simulation engine whose prefix is
# m32<NAME>.  If the machine list includes "mips16", there will also
# be a mips16 engine, prefix m16<NAME>.  The mips16 engine will be
# generated using the same machine list as the 32-bit version,
# but the filter will be "16" instead of FILTER.
#
# The simulator compares the bfd mach against BFDMACHS to decide
# which engine to use.  Entries in BFDMACHS should be bfd_mach
# values with "bfd_mach_" removed.  ${sim_multi_default} says
# which entry should be the default.
if test ${sim_gen} = MULTI; then

  # Simple sanity check.
  if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
    AC_MSG_ERROR(Error in configure.in: MULTI simulator not set up correctly)
  fi

  # Start in a known state.
  rm -f multi-include.h multi-run.c
  sim_multi_flags=
  sim_multi_src=
  sim_multi_obj=multi-run.o
  sim_multi_igen_configs=
  sim_seen_default=no

  cat << __EOF__ > multi-run.c
/* Main entry point for MULTI simulators.
   Copyright (C) 2003, 2007, 2010 Free Software Foundation, Inc.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.

   --

   This file was generated by sim/mips/configure.  */

#include "sim-main.h"
#include "multi-include.h"

#define SD sd
#define CPU cpu

void
sim_engine_run (SIM_DESC sd,
		int next_cpu_nr,
		int nr_cpus,
		int signal) /* ignore */
{
  int mach;

  if (STATE_ARCHITECTURE (sd) == NULL)
    mach = bfd_mach_${sim_multi_default};
  else
    mach = STATE_ARCHITECTURE (SD)->mach;

  switch (mach)
    {
__EOF__

  for fc in ${sim_multi_configs}; do

    # Split up the entry.  ${c} contains the first three elements.
    # Note: outer sqaure brackets are m4 quotes.
    c=`echo ${fc} | sed ['s/:[^:]*$//']`
    bfdmachs=`echo ${fc} | sed 's/.*://'`
    name=`echo ${c} | sed 's/:.*//'`
    machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
    filter=`echo ${c} | sed 's/.*://'`

    # Build the following lists:
    #
    #   sim_multi_flags: all -M and -F flags used by the simulator
    #   sim_multi_src: all makefile-generated source files
    #   sim_multi_obj: the objects for ${sim_multi_src}
    #   sim_multi_igen_configs: igen configuration strings.
    #
    # Each entry in ${sim_multi_igen_configs} is a prefix (m32
    # or m16) followed by the NAME, MACHINE and FILTER part of
    # the ${sim_multi_configs} entry.
    sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"

    # Check whether mips16 handling is needed.
    case ${c} in
      *:*mips16*:*)
	# Run igen twice, once for normal mode and once for mips16.
	ws="m32 m16"

	# The top-level function for the mips16 simulator is
	# in a file m16${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} m16${name}_run.c"
	sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16"
	;;
      *)
	ws=m32
	;;
    esac

    # Now add the list of igen-generated files to ${sim_multi_src}
    # and ${sim_multi_obj}.
    for w in ${ws}; do
      for base in engine icache idecode model semantics support; do
	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
	sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
      done
      sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
    done

    # Add an include for the engine.h file.  This file declares the
    # top-level foo_engine_run() function.
    echo "#include \"${w}${name}_engine.h\"" >> multi-include.h

    # Add case statements for this engine to sim_engine_run().
    for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
      echo "    case bfd_mach_${mach}:" >> multi-run.c
      if test ${mach} = ${sim_multi_default}; then
	echo "    default:" >> multi-run.c
	sim_seen_default=yes
      fi
    done
    echo "      ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
      >> multi-run.c
    echo "      break;" >> multi-run.c
  done

  # Check whether we added a 'default:' label.
  if test ${sim_seen_default} = no; then
    AC_MSG_ERROR(Error in configure.in: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
  fi

  cat << __EOF__ >> multi-run.c
    }
}

int
mips_mach_multi (SIM_DESC sd)
{
  if (STATE_ARCHITECTURE (sd) == NULL)
    return bfd_mach_${sim_multi_default};

  switch (STATE_ARCHITECTURE (SD)->mach)
    {
__EOF__

  # Add case statements for this engine to mips_mach_multi().
  for fc in ${sim_multi_configs}; do

    # Split up the entry.  ${c} contains the first three elements.
    # Note: outer sqaure brackets are m4 quotes.
    c=`echo ${fc} | sed ['s/:[^:]*$//']`
    bfdmachs=`echo ${fc} | sed 's/.*://'`

    for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
      echo "    case bfd_mach_${mach}:" >> multi-run.c
    done
  done

  cat << __EOF__ >> multi-run.c
      return (STATE_ARCHITECTURE (SD)->mach);
    default:
      return bfd_mach_${sim_multi_default};
    }
}
__EOF__

  SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
else
  # For clean-extra
  sim_multi_src=doesnt-exist.c

  if test x"${sim_mach_default}" = x""; then
    AC_MSG_ERROR(Error in configure.in: \${sim_mach_default} not defined)
  fi
  SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
fi
sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
sim_m16_flags=" -F ${sim_m16_filter}  ${sim_m16_machine}  ${sim_igen_smp}"
AC_SUBST(sim_igen_flags)
AC_SUBST(sim_m16_flags)
AC_SUBST(sim_gen)
AC_SUBST(sim_multi_flags)
AC_SUBST(sim_multi_igen_configs)
AC_SUBST(sim_multi_src)
AC_SUBST(sim_multi_obj)


#
# Add simulated hardware devices
#
hw_enabled=no
case "${target}" in
  mips*tx39*)
	hw_enabled=yes
	hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio" 
	mips_extra_objs="dv-sockser.o"
	SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
	;;
  *)
	mips_extra_objs="" 
	;;
esac
SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
AC_SUBST(mips_extra_objs)


# Choose simulator engine
case "${target}" in
  *)    mips_igen_engine="engine.o"
	;;
esac
AC_SUBST(mips_igen_engine)


AC_PATH_X
mips_extra_libs=""
AC_SUBST(mips_extra_libs)

AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
AC_CHECK_LIB(m, fabs)
AC_CHECK_FUNCS(aint anint sqrt)

SIM_AC_OUTPUT
Commit	Line	Data
c906108c	1	dnl Process this file with autoconf to produce a configure script.
6ffe910a	2	AC_PREREQ(2.64)dnl
c906108c	3	AC_INIT(Makefile.in)
f0569246	4	sinclude(../common/aclocal.m4)
c906108c	5
6ffe910a	6	SIM_AC_COMMON
35695fd6	7
c906108c SS	8	dnl Options available in this module
	9	SIM_AC_OPTION_INLINE()
	10	SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
	11	SIM_AC_OPTION_HOSTENDIAN
	12	SIM_AC_OPTION_WARNINGS
e6c674b8	13	SIM_AC_OPTION_RESERVED_BITS(1)
c906108c SS	14
	15	# DEPRECATED
	16	#
	17	# Instead of defining a `subtarget' macro, code should be checking
	18	# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
	19	# in question.
	20	#
	21	case "${target}" in
4c54fc26	22	mips64vr--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
c906108c	23	mipstx39) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
109ad085	24	mips-sde-elf) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28 CD	25	mipsisa32--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28 CD	26	mipsisa64--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
c906108c SS	27	*) SIM_SUBTARGET="";;
	28	esac
	29	AC_SUBST(SIM_SUBTARGET)
	30
	31
	32
	33	#
	34	# Select the byte order of the target
	35	#
	36	mips_endian=
	37	default_endian=
	38	case "${target}" in
	39	mips64el--*) mips_endian=LITTLE_ENDIAN ;;
7a292a7a	40	mips64vrel--*) default_endian=LITTLE_ENDIAN ;;
c906108c SS	41	mips64--*) default_endian=BIG_ENDIAN ;;
c906108c SS	42	mips16--*) default_endian=BIG_ENDIAN ;;
1e799e28 CD	43	mipsisa32--*) default_endian=BIG_ENDIAN ;;
1e799e28 CD	44	mipsisa64--*) default_endian=BIG_ENDIAN ;;
c906108c SS	45	mips--*) default_endian=BIG_ENDIAN ;;
	46	*) default_endian=BIG_ENDIAN ;;
	47	esac
	48	SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
	49
	50
	51
	52	#
	53	# Select the bitsize of the target
	54	#
	55	mips_addr_bitsize=
	56	case "${target}" in
4b5d35ee	57	mips-sde-elf) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	58	mips64--*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	59	mips16--*) mips_bitsize=64 ; mips_msb=63 ;;
1e799e28 CD	60	mipsisa32--*) mips_bitsize=32 ; mips_msb=31 ;;
1e799e28 CD	61	mipsisa64--*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	62	mips--*) mips_bitsize=32 ; mips_msb=31 ;;
	63	*) mips_bitsize=64 ; mips_msb=63 ;;
	64	esac
	65	SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
	66
	67
	68
	69	#
	70	# Select the floating hardware support of the target
	71	#
	72	mips_fpu=HARDWARE_FLOATING_POINT
	73	mips_fpu_bitsize=
	74	case "${target}" in
4b5d35ee TS	75	mipstx39) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
4b5d35ee TS	76	mips-sde-elf) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c SS	77	mips64--*) mips_fpu=HARD_FLOATING_POINT ;;
c906108c SS	78	mips16--*) mips_fpu=HARD_FLOATING_POINT ;;
1e799e28 CD	79	mipsisa32--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
1e799e28 CD	80	mipsisa64--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c SS	81	mips--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
	82	*) mips_fpu=HARD_FLOATING_POINT ;;
	83	esac
	84	SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
	85
	86
	87
	88	#
	89	# Select the level of SMP support
	90	#
	91	case "${target}" in
	92	*) mips_smp=0 ;;
	93	esac
	94	SIM_AC_OPTION_SMP($mips_smp)
	95
	96
	97
	98	#
	99	# Select the IGEN architecture
	100	#
	101	sim_gen=IGEN
	102	sim_igen_machine="-M mipsIV"
139181c8	103	sim_m16_machine="-M mips16,mipsIII"
c906108c SS	104	sim_igen_filter="32,64,f"
c906108c SS	105	sim_m16_filter="16"
4c54fc26 CD	106	sim_mach_default="mips8000"
4c54fc26 CD	107
c906108c SS	108	case "${target}" in
	109	mipstx39) sim_gen=IGEN
	110	sim_igen_filter="32,f"
	111	sim_igen_machine="-M r3900"
	112	;;
	113	mips64vr43--*) sim_gen=IGEN
	114	sim_igen_machine="-M mipsIV"
4c54fc26	115	sim_mach_default="mips8000"
c906108c SS	116	;;
	117	mips64vr5--*) sim_gen=IGEN
	118	sim_igen_machine="-M vr5000"
4c54fc26	119	sim_mach_default="mips5000"
c906108c SS	120	;;
	121	mips64vr41*) sim_gen=M16
	122	sim_igen_machine="-M vr4100"
	123	sim_m16_machine="-M vr4100"
	124	sim_igen_filter="32,64,f"
	125	sim_m16_filter="16"
4c54fc26	126	sim_mach_default="mips4100"
c906108c	127	;;
4c54fc26 CD	128	mips64vr-- \| mips64vrel--)
	129	sim_gen=MULTI
	130	sim_multi_configs="\
	131	vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
	132	vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
	133	vr5000:mipsIV:32,64,f:mips4300,mips5000\
	134	vr5400:mipsIV,vr5400:32,64,f:mips5400\
	135	vr5500:mipsIV,vr5500:32,64,f:mips5500"
	136	sim_multi_default=mips5000
	137	;;
3669427c	138	mips-sde-elf) sim_gen=M16
8b082fb1	139	sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips"
3669427c TS	140	sim_m16_machine="-M mips16,mips16e,mips64r2"
	141	sim_igen_filter="32,64,f"
	142	sim_mach_default="mipsisa64r2"
	143	;;
c906108c SS	144	mips64--*) sim_igen_filter="32,64,f"
	145	sim_gen=IGEN
	146	;;
	147	mips16--*) sim_gen=M16
	148	sim_igen_filter="32,64,f"
	149	sim_m16_filter="16"
	150	;;
d5fb0879 RS	151	mipsisa32r2--*) sim_gen=M16
	152	sim_igen_machine="-M mips32r2,mips16,mips16e,mdmx,dsp,dsp2,smartmips"
	153	sim_m16_machine="-M mips16,mips16e,mips32r2"
	154	sim_igen_filter="32,f"
	155	sim_mach_default="mipsisa32r2"
e70cb6cd	156	;;
d5fb0879 RS	157	mipsisa32--*) sim_gen=M16
	158	sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
	159	sim_m16_machine="-M mips16,mips16e,mips32"
	160	sim_igen_filter="32,f"
	161	sim_mach_default="mipsisa32"
1e799e28	162	;;
d5fb0879 RS	163	mipsisa64r2--*) sim_gen=M16
	164	sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
	165	sim_m16_machine="-M mips16,mips16e,mips64r2"
	166	sim_igen_filter="32,64,f"
	167	sim_mach_default="mipsisa64r2"
e70cb6cd	168	;;
7cbea089	169	mipsisa64sb1--*) sim_gen=IGEN
109ad085	170	sim_igen_machine="-M mips64,mips3d,sb1"
7cbea089	171	sim_igen_filter="32,64,f"
4c54fc26	172	sim_mach_default="mips_sb1"
7cbea089	173	;;
d5fb0879 RS	174	mipsisa64--*) sim_gen=M16
	175	sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
	176	sim_m16_machine="-M mips16,mips16e,mips64"
	177	sim_igen_filter="32,64,f"
	178	sim_mach_default="mipsisa64"
1e799e28	179	;;
109ad085	180	mipslsi) sim_gen=M16
c906108c SS	181	sim_igen_machine="-M mipsIII,mips16"
	182	sim_m16_machine="-M mips16,mipsIII"
	183	sim_igen_filter="32,f"
	184	sim_m16_filter="16"
4c54fc26	185	sim_mach_default="mips4000"
109ad085	186	;;
c906108c SS	187	mips--*) sim_gen=IGEN
	188	sim_igen_filter="32,f"
	189	;;
	190	esac
4c54fc26 CD	191
	192	# The MULTI generator can combine several simulation engines into one.
	193	# executable. A configuration which uses the MULTI should set two
	194	# variables: ${sim_multi_configs} and ${sim_multi_default}.
	195	#
	196	# ${sim_multi_configs} is the list of engines to build. Each
	197	# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
	198	# where:
	199	#
	200	# - NAME is a C-compatible prefix for the engine,
	201	# - MACHINE is a -M argument,
	202	# - FILTER is a -F argument, and
	203	# - BFDMACHS is a comma-separated list of bfd machines that the
	204	# simulator can run.
	205	#
	206	# Each entry will have a separate simulation engine whose prefix is
	207	# m32<NAME>. If the machine list includes "mips16", there will also
	208	# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
	209	# generated using the same machine list as the 32-bit version,
	210	# but the filter will be "16" instead of FILTER.
	211	#
	212	# The simulator compares the bfd mach against BFDMACHS to decide
	213	# which engine to use. Entries in BFDMACHS should be bfd_mach
	214	# values with "bfd_mach_" removed. ${sim_multi_default} says
	215	# which entry should be the default.
	216	if test ${sim_gen} = MULTI; then
	217
	218	# Simple sanity check.
	219	if test -z "${sim_multi_configs}" \|\| test -z "${sim_multi_default}"; then
	220	AC_MSG_ERROR(Error in configure.in: MULTI simulator not set up correctly)
	221	fi
	222
	223	# Start in a known state.
	224	rm -f multi-include.h multi-run.c
	225	sim_multi_flags=
	226	sim_multi_src=
	227	sim_multi_obj=multi-run.o
	228	sim_multi_igen_configs=
	229	sim_seen_default=no
	230
	231	cat << __EOF__ > multi-run.c
	232	/* Main entry point for MULTI simulators.
dc3cf14f	233	Copyright (C) 2003, 2007, 2010 Free Software Foundation, Inc.
4c54fc26 CD	234
	235	This program is free software; you can redistribute it and/or modify
	236	it under the terms of the GNU General Public License as published by
35ee6e1e	237	the Free Software Foundation; either version 3 of the License, or
4c54fc26 CD	238	(at your option) any later version.
	239
	240	This program is distributed in the hope that it will be useful,
	241	but WITHOUT ANY WARRANTY; without even the implied warranty of
	242	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	243	GNU General Public License for more details.
	244
	245	You should have received a copy of the GNU General Public License
35ee6e1e	246	along with this program. If not, see <http://www.gnu.org/licenses/>.
4c54fc26 CD	247
	248	--
	249
	250	This file was generated by sim/mips/configure. */
	251
	252	#include "sim-main.h"
	253	#include "multi-include.h"
	254
	255	#define SD sd
	256	#define CPU cpu
	257
	258	void
	259	sim_engine_run (SIM_DESC sd,
	260	int next_cpu_nr,
	261	int nr_cpus,
	262	int signal) /* ignore */
	263	{
	264	int mach;
	265
	266	if (STATE_ARCHITECTURE (sd) == NULL)
	267	mach = bfd_mach_${sim_multi_default};
	268	else
	269	mach = STATE_ARCHITECTURE (SD)->mach;
	270
	271	switch (mach)
	272	{
	273	__EOF__
	274
	275	for fc in ${sim_multi_configs}; do
	276
	277	# Split up the entry. ${c} contains the first three elements.
	278	# Note: outer sqaure brackets are m4 quotes.
	279	c=`echo ${fc} \| sed ['s/:[^:]*$//']`
	280	bfdmachs=`echo ${fc} \| sed 's/.*://'`
	281	name=`echo ${c} \| sed 's/:.*//'`
	282	machine=`echo ${c} \| sed 's/.:\(.\):.*/\1/'`
	283	filter=`echo ${c} \| sed 's/.*://'`
	284
	285	# Build the following lists:
	286	#
	287	# sim_multi_flags: all -M and -F flags used by the simulator
	288	# sim_multi_src: all makefile-generated source files
	289	# sim_multi_obj: the objects for ${sim_multi_src}
	290	# sim_multi_igen_configs: igen configuration strings.
	291	#
	292	# Each entry in ${sim_multi_igen_configs} is a prefix (m32
	293	# or m16) followed by the NAME, MACHINE and FILTER part of
	294	# the ${sim_multi_configs} entry.
	295	sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
	296
	297	# Check whether mips16 handling is needed.
	298	case ${c} in
	299	:mips16:)
	300	# Run igen twice, once for normal mode and once for mips16.
	301	ws="m32 m16"
	302
	303	# The top-level function for the mips16 simulator is
	304	# in a file m16${name}_run.c, generated by the
	305	# tmp-run-multi Makefile rule.
	306	sim_multi_src="${sim_multi_src} m16${name}_run.c"
	307	sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
	308	sim_multi_flags="${sim_multi_flags} -F 16"
	309	;;
	310	*)
311	ws=m32
312	;;
313	esac
314
315	# Now add the list of igen-generated files to ${sim_multi_src}
316	# and ${sim_multi_obj}.
317	for w in ${ws}; do
318	for base in engine icache idecode model semantics support; do
319	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
320	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
321	sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
322	done
323	sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
324	done
325
326	# Add an include for the engine.h file. This file declares the
327	# top-level foo_engine_run() function.
328	echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
329
330	# Add case statements for this engine to sim_engine_run().
331	for mach in `echo ${bfdmachs} \| sed 's/,/ /g'`; do
332	echo " case bfd_mach_${mach}:" >> multi-run.c
333	if test ${mach} = ${sim_multi_default}; then
334	echo " default:" >> multi-run.c
335	sim_seen_default=yes
336	fi
337	done
338	echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
339	>> multi-run.c
340	echo " break;" >> multi-run.c
341	done
342
343	# Check whether we added a 'default:' label.
344	if test ${sim_seen_default} = no; then
345	AC_MSG_ERROR(Error in configure.in: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
346	fi
347
348	cat << __EOF__ >> multi-run.c
349	}
350	}
351
352	int
353	mips_mach_multi (SIM_DESC sd)
354	{
355	if (STATE_ARCHITECTURE (sd) == NULL)
356	return bfd_mach_${sim_multi_default};
357
358	switch (STATE_ARCHITECTURE (SD)->mach)
359	{
360	__EOF__
361
362	# Add case statements for this engine to mips_mach_multi().
363	for fc in ${sim_multi_configs}; do
364
365	# Split up the entry. ${c} contains the first three elements.
366	# Note: outer sqaure brackets are m4 quotes.
367	c=`echo ${fc} \| sed ['s/:[^:]*$//']`
368	bfdmachs=`echo ${fc} \| sed 's/.*://'`
369
370	for mach in `echo ${bfdmachs} \| sed 's/,/ /g'`; do
371	echo " case bfd_mach_${mach}:" >> multi-run.c
372	done
373	done
374
375	cat << __EOF__ >> multi-run.c
376	return (STATE_ARCHITECTURE (SD)->mach);
377	default:
378	return bfd_mach_${sim_multi_default};
379	}
380	}
381	__EOF__
382
383	SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
384	else
385	# For clean-extra
386	sim_multi_src=doesnt-exist.c
387
388	if test x"${sim_mach_default}" = x""; then
389	AC_MSG_ERROR(Error in configure.in: \${sim_mach_default} not defined)
390	fi
391	SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
392	fi
c906108c SS	393	sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
	394	sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
	395	AC_SUBST(sim_igen_flags)
	396	AC_SUBST(sim_m16_flags)
	397	AC_SUBST(sim_gen)
4c54fc26 CD	398	AC_SUBST(sim_multi_flags)
	399	AC_SUBST(sim_multi_igen_configs)
	400	AC_SUBST(sim_multi_src)
	401	AC_SUBST(sim_multi_obj)
c906108c SS	402
	403
	404	#
	405	# Add simulated hardware devices
	406	#
	407	hw_enabled=no
	408	case "${target}" in
	409	mipstx39)
	410	hw_enabled=yes
	411	hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
	412	mips_extra_objs="dv-sockser.o"
	413	SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
	414	;;
	415	*)
	416	mips_extra_objs=""
	417	;;
	418	esac
	419	SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
	420	AC_SUBST(mips_extra_objs)
	421
	422
	423	# Choose simulator engine
	424	case "${target}" in
	425	*) mips_igen_engine="engine.o"
	426	;;
	427	esac
	428	AC_SUBST(mips_igen_engine)
	429
	430
	431	AC_PATH_X
	432	mips_extra_libs=""
	433	AC_SUBST(mips_extra_libs)
	434
	435	AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
	436	AC_CHECK_LIB(m, fabs)
	437	AC_CHECK_FUNCS(aint anint sqrt)
	438
	439	SIM_AC_OUTPUT