* simops.c: Fix more bugs in "add imm,an" and
[deliverable/binutils-gdb.git] / sim / mn10300 / ChangeLog
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1Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
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3 * simops.c: Fix more bugs in "add imm,an" and
4 "add imm,dn".
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6Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
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8 * simops.c: Fix bugs in "movm" and "add imm,an".
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10 * simops.c: Don't lose the upper 24 bits of the return
11 pointer in "call" and "calls" instructions. Rough cut
12 at emulated system calls.
13
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14 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
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16 * simops.c: Implement remaining 4 byte instructions.
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18 * simops.c: Implement remaining 3 byte instructions.
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20 * simops.c: Implement remaining 2 byte instructions. Call
21 abort for instructions we're not implementing now.
22
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23Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
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25 * simops.c: Implement lots of random instructions.
26
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27 * simops.c: Implement "movm" and "bCC" insns.
28
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29 * mn10300_sim.h (_state): Add another register (MDR).
30 (REG_MDR): Define.
31 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
32 a few additional random insns.
33
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34 * mn10300_sim.h (PSW_*): Define for CC status tracking.
35 (REG_D0, REG_A0, REG_SP): Define.
36 * simops.c: Implement "add", "addc" and a few other random
37 instructions.
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38
39 * gencode.c, interp.c: Snapshot current simulator code.
40
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41Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
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43 * Makefile.in, config.in, configure, configure.in: New files.
44 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
45
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