tweak comment in last entry
[deliverable/binutils-gdb.git] / sim / mn10300 / ChangeLog
CommitLineData
6d133cc9
AC
1start-sanitize-am30
2Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
3
4 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC
5 on the stack when delivering interrupts (not just the lower
6 half)...
7 * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were
8 specified in the wrong order.
9
10end-sanitize-am30
11start-sanitize-am30
1b756ba6
AC
12Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
13
14 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of
15 succeeding interrupts, clear pending_handler when the handler
16 isn't re-scheduled.
17
6d133cc9 18end-sanitize-am30
abf6ba25
SG
19Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
20
21 * Makefile.in (tmp-igen): Prefix all usage of move-if-change
22 script with $(SHELL) to make NT native builds happy.
23 * configure: Regenerate because of change to ../common/aclocal.m4.
24
51ccd82f
AC
25Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
26
27 * configure.in: Make --enable-sim-common the default.
28 * configure: Re-generate.
29
30 * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
31 address into Sate.regs[REG_PC] instead of common struct.
32
d1607ed3
JJ
33Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com>
34
35 * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value.
36
52ef605e
JJ
37Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com>
38
39 * simops.c (OP_F0FD): Initialise variable 'sp'.
40
6d133cc9 41start-sanitize-am30
c357e16a
AC
42Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
43
44 * dv-mn103int.c (decode_group): A group register every 4 bytes not
45 8.
46 (write_icr): Rewrite equation updating request field.
47 (read_iagr): Fix check that interrupt is still pending.
48
6d133cc9
AC
49end-sanitize-am30
50start-sanitize-am30
8077fed5
AC
51Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
52
53 * interp.c (sim_open): Tidy up device creation.
54
55 * dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero
56 value.
57 (mn103int_io_read_buffer): Convert absolute address to register
58 block offsets.
59 (read_icr, write_icr): Convert block offset into group offset.
60
6d133cc9 61end-sanitize-am30
6100784a
AC
62Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
63
64 * interp.c (sim_open): Create second 1mb memory region at
65 0x40000000.
66 (sim_open): Create a device tree.
67 (sim-hw.h): Include.
6d133cc9 68start-sanitize-am30
6100784a
AC
69 (do_interrupt): Delete, needs to use dv-mn103cpu.c
70
71 * dv-mn103int.c, dv-mn103cpu.c: New files.
6d133cc9 72end-sanitize-am30
6100784a 73
8388c9a5
AC
74Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
75
76 * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM):
77 Define.
78 (SP): Define.
79
d89fa2d8
AC
80Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
81
82 * configure: Regenerated to track ../common/aclocal.m4 changes.
83
e855e576
AC
84Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com>
85
86 * interp.c (sim-options.h): Include.
87 (sim_kind, myname): Declare when not using common framework.
88
89 * mn10300_sim.h (do_syscall, generic*): Provide prototypes for
90 functions found in op_utils.c
91
92 * mn10300.igen (add): Discard unused variables.
93
94 * configure, config.in: Re-generate with autoconf 2.12.1.
95
55045e7b
JJ
96Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com>
97
98 Add support for --enable-sim-common option.
99 * Makefile.in (WITHOUT_COMMON_OBJS): Files included if
100 ! --enable-sim-common
101 (WITH_COMMON_OBJS): Files included if --enable-sim-common.
102 (MN10300_OBJS,MN10300_INTERP_DEP): New variables.
103 (SIM_OBJS): Rewrite.
104 ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables.
105 (SIM_EXTRA_CFLAGS): New variable.
106 (clean-extra): Clean up igen files.
107 (../igen/igen,clean-igen,tmp-igen): New rules.
108 * configure.in: Add support for common framework via
109 --enable-sim-common.
110 * configure: Regenerate.
111 * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h.
112 (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON.
113 (init_system,sim_write,compare_simops): Likewise.
114 (sim_set_profile,sim_set_profile_size): Likewise.
115 (sim_stop,sim_resume,sim_trace,sim_info): Likewise.
116 (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise.
117 (enum interrupt_type): New enum.
118 (interrupt_names): New global.
119 (do_interrupt): New function.
120 (sim_open): Define differently if WITH_COMMON.
121 (sim_close,sim_create_inferior,sim_do_command): Likewise.
122 * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions
123 for WITH_COMMON.
124 * mn10300.igen: New file.
125 * mn10300.dc: New file.
126 * op_utils.c: New file.
127 * sim-main.h: New file.
128
129Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
130
131 * configure: Regenerated to track ../common/aclocal.m4 changes.
132
133Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com)
134
135 * simops.c (inc): Fix typo.
136
097e6924
JL
137Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com)
138
139 * simops.c (signed multiply instructions): Cast input operands to
140 signed32 before casting them to signed64 so that the sign bit
141 is propagated properly.
142
a9faef12
MA
143Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com>
144
145 * Makefile.in: Last change was bad. Define NL_TARGET
146 so that targ-vals.h will be used instead of syscall.h.
147 * simops.c: Use targ-vals.h instead of syscall.h.
148 (OP_F020): Disable unsupported system calls.
149
e04b0d76
MA
150Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com>
151
152 * Makefile.in: Get header files from libgloss/mn10300/sys.
153
7eab31b7
JL
154Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com)
155
156 * simops.c: Include sim-types.h.
157
158Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com)
159
160 * simops.c (multiply instructions): Cast input operands to a
161 signed64/unsigned64 type as appropriate.
162
fbb8b6b9
AC
163Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
164
165 * interp.c (sim_store_register, sim_fetch_register): Pass in
166 length parameter. Return -1.
167
168Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
169
170 * configure: Regenerated to track ../common/aclocal.m4 changes.
171
412c4e94
AC
172Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
173
174 * configure: Regenerated to track ../common/aclocal.m4 changes.
175
462cfbc4
DE
176Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
177
178 * configure: Regenerated to track ../common/aclocal.m4 changes.
179
180Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
181
182 * configure: Regenerated to track ../common/aclocal.m4 changes.
183 * config.in: Ditto.
184
185Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
186
187 * configure: Regenerated to track ../common/aclocal.m4 changes.
188
189Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com)
190
191 * simops.c (call:16 call:32): Stack adjustment is determined solely
192 by the imm8 field.
193
9e03a68f
AC
194Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
195
b5da31ac 196 * interp.c (sim_load): Pass lma_p and sim_write args to
9e03a68f
AC
197 sim_load_file.
198
f4ab2b2f
JL
199Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com)
200
201 * simops.c: Correctly handle register restores for "ret" and "retf"
202 instructions.
203
204Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
205
206 * configure: Regenerated to track ../common/aclocal.m4 changes.
207
208Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
209
210 * configure: Regenerated to track ../common/aclocal.m4 changes.
211
92f91d1f
AC
212Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
213
214 * configure: Regenerated to track ../common/aclocal.m4 changes.
215
794e9ac9
AC
216Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
217
218 * configure: Regenerated to track ../common/aclocal.m4 changes.
219
b45caf05
AC
220Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
221
222 * configure: Regenerated to track ../common/aclocal.m4 changes.
223
224Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
225
226 * configure: Regenerated to track ../common/aclocal.m4 changes.
227
6fea4763
DE
228Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
229
230 * configure: Regenerated to track ../common/aclocal.m4 changes.
231
88117054
AC
232Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
233
234 * configure: Regenerated to track ../common/aclocal.m4 changes.
235 * config.in: Ditto.
236
7230ff0f
AC
237Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
238
239 * interp.c (sim_kill): Delete.
fafce69a
AC
240 (sim_create_inferior): Add ABFD argument.
241 (sim_load): Move setting of PC from here.
242 (sim_create_inferior): To here.
7230ff0f 243
247fccde
AC
244Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
245
246 * configure: Regenerated to track ../common/aclocal.m4 changes.
247 * config.in: Ditto.
248
249Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
250
251 * interp.c (sim_open): Add ABFD argument.
252
253Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com)
254
255 * interp.c (sim_resume): Clear State.exited.
256 (sim_stop_reason): If State.exited is nonzero, then indicate that
257 the simulator exited instead of stopped.
258 * mn10300_sim.h (struct _state): Add exited field.
259 * simops.c (syscall): Set State.exited for SYS_exit.
260
c370b3cd
JL
261Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com)
262
263 * simops.c: Fix thinko in last change.
264
0a8fa63c
JL
265Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
266
dbdb5bd8
JL
267 * simops.c: "call" stores the callee saved registers into the
268 stack! Update the stack pointer properly when done with
269 register saves.
270
0a8fa63c
JL
271 * simops.c: Fix return address computation for "call" instructions.
272
273Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
274
275 * interp.c (sim_open): Fix typo.
276
09e142d5
JL
277Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
278
279 * interp.c (sim_resume): Add missing case in big switch
280 statement (for extb instruction).
281
003c91be
JL
282Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
283
284 * interp.c: Replace all references to load_mem and store_mem
285 with references to load_byte, load_half, load_3_byte, load_word
286 and store_byte, store_half, store_3_byte, store_word.
287 (INLINE): Delete definition.
288 (load_mem_big): Likewise.
289 (max_mem): Make it global.
290 (dispatch): Make this function inline.
291 (load_mem, store_mem): Delete functions.
292 * mn10300_sim.h (INLINE): Define.
293 (RLW): Delete unused definition.
294 (load_mem, store_mem): Delete declarations.
295 (load_mem_big): New definition.
296 (load_byte, load_half, load_3_byte, load_word): New functions.
297 (store_byte, store_half, store_3_byte, store_word): New functions.
298 * simops.c: Replace all references to load_mem and store_mem
299 with references to load_byte, load_half, load_3_byte, load_word
300 and store_byte, store_half, store_3_byte, store_word.
301
302Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
303
304 * interp.c (sim_open): Add callback to arguments.
305 (sim_set_callbacks): Delete SIM_DESC argument.
306
4df7aeb3
JL
307Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
308
309 * interp.c (dispatch): Make this an inline function.
310
311 * simops.c (syscall): Use callback->write regardless of
312 what file descriptor we're writing too.
313
b07a1e78
JL
314Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
315
316 * interp.c (load_mem_big): Remove function. It's now a macro
317 defined elsewhere.
318 (compare_simops): New function.
319 (sim_open): Sort the Simops table before inserting entries
320 into the hash table.
321 * mn10300_sim.h: Remove unused #defines.
322 (load_mem_big): Define.
323
234a9a49
JL
324Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
325
326 * interp.c (load_mem): If we get a load from an out of range
327 address, abort.
328 (store_mem): Likewise for stores.
329 (max_mem): New variable.
330
baa83bcc
JL
331Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
332
8def9220
JL
333 * mn10300_sim.h: Fix ordering of bits in the PSW.
334
baa83bcc
JL
335 * interp.c: Improve hashing routine to avoid long list
336 traversals for common instructions. Add HASH_STAT support.
337 Rewrite opcode dispatch code using a big switch instead of
338 cascaded if/else statements. Avoid useless calls to load_mem.
339
26e9f63c
JL
340Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
341
342 * mn10300_sim.h (struct _state): Add space for mdrq register.
343 (REG_MDRQ): Define.
344 * simops.c: Don't abort for trap. Add support for the extended
345 instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
346 and "bsch".
347
348Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
349
350 * configure: Regenerated to track ../common/aclocal.m4 changes.
351
8517f62b
AC
352Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
353
354 * interp.c (sim_stop): Add stub function.
355
6cc6987e
DE
356Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
357
358 * Makefile.in (SIM_OBJS): Add sim-load.o.
359 * interp.c (sim_kind, myname): New static locals.
360 (sim_open): Set sim_kind, myname. Ignore -E arg.
361 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
362 load file into simulator. Set start address from bfd.
363 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
364
87e43259
AC
365Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
366
367 * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
368 only include if implemented by host.
369 (OP_F020): Typecast arg passed to time function;
370
371Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
372
373 * simops.c (syscall): Handle new mn10300 calling conventions.
374
08db4a65
AC
375Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
376
377 * configure: Regenerated to track ../common/aclocal.m4 changes.
378 * config.in: Ditto.
379
ea553f56
ILT
380Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
381
382 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
383 corresponding change in opcodes directory.
384
fbda74b1
DE
385Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
386
8a7c3105
DE
387 * interp.c (sim_open): New arg `kind'.
388
fbda74b1
DE
389 * configure: Regenerated to track ../common/aclocal.m4 changes.
390
a35e91c3
AC
391Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
392
393 * configure: Regenerated to track ../common/aclocal.m4 changes.
394
395Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
396
397 * simops.c: Fix register extraction for a two "movbu" variants.
398 Somewhat simplify "sub" instructions.
399 Correctly sign extend operands for "mul". Put the correct
400 half of the result in MDR for "mul" and "mulu".
401 Implement remaining instructions.
402 Tweak opcode for "syscall".
403
404Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
405
406 * simops.c: Do syscall emulation in "syscall" instruction. Add
407 dummy "trap" instruction.
408
c695046a
AC
409Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
410
411 * configure: Regenerated to track ../common/aclocal.m4 changes.
412
a77aa7ec
AC
413Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
414
415 * configure: Re-generate.
416
601fb8ae
MM
417Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
418
419 * configure: Regenerate to track ../common/aclocal.m4 changes.
420
53b9417e
DE
421Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
422
423 * interp.c (sim_open): New SIM_DESC result. Argument is now
424 in argv form.
425 (other sim_*): New SIM_DESC argument.
426
09eef8af
JL
427Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
428
0ade484f
JL
429 * simops.c: Fix carry bit computation for "add" instructions.
430
09eef8af
JL
431 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
432 for bset imm8,(d8,an) and bclr imm8,(d8,an).
433
434Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
435
436 * simops.c: Fix register references when computing Z and N bits
437 for lsr imm8,dn.
438
439Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
440
441 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
442 COMMON_{PRE,POST}_CONFIG_FRAG instead.
443 * configure.in: sinclude ../common/aclocal.m4.
444 * configure: Regenerated.
445
018f9eb4
JL
446Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
447
448 * interp.c (init_system): Allocate 2^19 bytes of space for the
449 simulator.
450
295dbbe4
SG
451Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
452
453 * configure configure.in Makefile.in: Update to new configure
454 scheme which is more compatible with WinGDB builds.
455 * configure.in: Improve comment on how to run autoconf.
456 * configure: Re-run autoconf to get new ../common/aclocal.m4.
457 * Makefile.in: Use autoconf substitution to install common
458 makefile fragment.
459
f95251f0
JL
460Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
461
462 * simops.c: Undo last change to "rol" and "ror", original code
463 was correct!
464
b4b290a0
JL
465Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
466
467 * simops.c: Fix "rol" and "ror".
468
469Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
470
471 * simops.c: Fix typo in last change.
472
2da0bc1b
JL
473Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
474
475 * simops.c: Use REG macros in few places not using them yet.
476
bbd17062
JL
477Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
478
479 * mn10300_sim.h (struct _state): Fix number of registers!
480
b774c0e4
JL
481Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
482
483 * mn10300_sim.h (struct _state): Put all registers into a single
484 array to make gdb implementation easier.
485 (REG_*): Add definitions for all registers in the state array.
486 (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
487 * simops.c: Related changes.
488
d657034d
JL
489Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
490
491 * interp.c (sim_resume): Handle 0xff as a single byte insn.
492
493 * simops.c: Fix overflow computation for "add" and "inc"
494 instructions.
495
16d2e2b6
JL
496Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
497
093e9a32
JL
498 * simops.c: Handle "break" instruction.
499
16d2e2b6
JL
500 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
501
502Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
503
504 * gencode.c (write_opcodes): Also write out the format of the
505 opcode.
506 * mn10300_sim.h (simops): Add "format" field.
507 * interp.c (sim_resume): Deal with endianness issues here.
508
95d18eb7
JL
509Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
510
511 * simops.c (REG0_4): Define.
512 Use REG0_4 for indexed loads/stores.
513
2e8f4133
JL
514Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
515
516 * simops.c (REG0_16): Fix typo.
517
d2523010
JL
518Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
519
b2f7a7e5
JL
520 * simops.c: Call abort for any instruction that's not currently
521 simulated.
522
9f4a551e
JL
523 * simops.c: Define accessor macros to extract register
524 values from instructions. Use them consistently.
525
7c52bf32
JL
526 * interp.c: Delete unused global variable "OP".
527 (sim_resume): Remove unused variable "opcode".
528 * simops.c: Fix some uninitialized variable problems, add
529 parens to fix various -Wall warnings.
530
d2523010
JL
531 * gencode.c (write_header): Add "insn" and "extension" arguments
532 to the OP_* declarations.
533 (write_template): Similarly for function templates.
534 * interp.c (insn, extension): Remove global variables. Instead
535 pass them as arguments to the OP_* functions.
536 * mn10300_sim.h: Remove decls for "insn" and "extension".
537 * simops.c (OP_*): Accept "insn" and "extension" as arguments
538 instead of using globals.
539
4d8ced6c
JL
540Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
541
e5a7a537
JL
542 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
543
4d8ced6c
JL
544 * simops.c: Fix thinkos in last change to "inc dn".
545
61ecca95
JL
546Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
547
548 * simops.c: "add imm,sp" does not effect the condition codes.
549 "inc dn" does effect the condition codes.
550
e4e13022
JL
551Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
552
553 * simops.c: Treat both operands as signed values for
554 "div" instruction.
555
556 * simops.c: Fix simulation of division instructions.
557 Fix typos/thinkos in several "cmp" and "sub" instructions.
558
fcfaf40d
JL
559Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
560
e4e13022
JL
561 * simops.c: Fix carry bit handling in "sub" and "cmp"
562 instructions.
563
fcfaf40d
JL
564 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
565
6db7fc49
JL
566Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
567
b7b89deb
JL
568 * simops.c: Fix overflow computation for many instructions.
569
e5a7a537 570 * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
af388638 571
c8f0171f
JL
572 * simops.c: Fix "mov am, dn".
573
6db7fc49
JL
574 * simops.c: Fix more bugs in "add imm,an" and
575 "add imm,dn".
576
f5f13c1d
JL
577Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
578
6e7a01c1
JL
579 * simops.c: Fix bugs in "movm" and "add imm,an".
580
3bb3fe44
JL
581 * simops.c: Don't lose the upper 24 bits of the return
582 pointer in "call" and "calls" instructions. Rough cut
583 at emulated system calls.
584
de0dce7c
JL
585 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
586
ecb4b5a3
JL
587 * simops.c: Implement remaining 4 byte instructions.
588
589 * simops.c: Implement remaining 3 byte instructions.
2e35551c 590
f5f13c1d
JL
591 * simops.c: Implement remaining 2 byte instructions. Call
592 abort for instructions we're not implementing now.
593
73e65298
JL
594Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
595
707641f6
JL
596 * simops.c: Implement lots of random instructions.
597
1f3bea21
JL
598 * simops.c: Implement "movm" and "bCC" insns.
599
92284aaa
JL
600 * mn10300_sim.h (_state): Add another register (MDR).
601 (REG_MDR): Define.
602 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
603 a few additional random insns.
604
73e65298
JL
605 * mn10300_sim.h (PSW_*): Define for CC status tracking.
606 (REG_D0, REG_A0, REG_SP): Define.
607 * simops.c: Implement "add", "addc" and a few other random
608 instructions.
b5f831ac
JL
609
610 * gencode.c, interp.c: Snapshot current simulator code.
611
05ccbdfd
JL
612Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
613
614 * Makefile.in, config.in, configure, configure.in: New files.
615 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
616
This page took 0.143881 seconds and 4 git commands to generate.