Commit | Line | Data |
---|---|---|
e855e576 AC |
1 | Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com> |
2 | ||
3 | * interp.c (sim-options.h): Include. | |
4 | (sim_kind, myname): Declare when not using common framework. | |
5 | ||
6 | * mn10300_sim.h (do_syscall, generic*): Provide prototypes for | |
7 | functions found in op_utils.c | |
8 | ||
9 | * mn10300.igen (add): Discard unused variables. | |
10 | ||
11 | * configure, config.in: Re-generate with autoconf 2.12.1. | |
12 | ||
55045e7b JJ |
13 | Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com> |
14 | ||
15 | Add support for --enable-sim-common option. | |
16 | * Makefile.in (WITHOUT_COMMON_OBJS): Files included if | |
17 | ! --enable-sim-common | |
18 | (WITH_COMMON_OBJS): Files included if --enable-sim-common. | |
19 | (MN10300_OBJS,MN10300_INTERP_DEP): New variables. | |
20 | (SIM_OBJS): Rewrite. | |
21 | ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables. | |
22 | (SIM_EXTRA_CFLAGS): New variable. | |
23 | (clean-extra): Clean up igen files. | |
24 | (../igen/igen,clean-igen,tmp-igen): New rules. | |
25 | * configure.in: Add support for common framework via | |
26 | --enable-sim-common. | |
27 | * configure: Regenerate. | |
28 | * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h. | |
29 | (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON. | |
30 | (init_system,sim_write,compare_simops): Likewise. | |
31 | (sim_set_profile,sim_set_profile_size): Likewise. | |
32 | (sim_stop,sim_resume,sim_trace,sim_info): Likewise. | |
33 | (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise. | |
34 | (enum interrupt_type): New enum. | |
35 | (interrupt_names): New global. | |
36 | (do_interrupt): New function. | |
37 | (sim_open): Define differently if WITH_COMMON. | |
38 | (sim_close,sim_create_inferior,sim_do_command): Likewise. | |
39 | * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions | |
40 | for WITH_COMMON. | |
41 | * mn10300.igen: New file. | |
42 | * mn10300.dc: New file. | |
43 | * op_utils.c: New file. | |
44 | * sim-main.h: New file. | |
45 | ||
46 | Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
47 | ||
48 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
49 | ||
50 | Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com) | |
51 | ||
52 | * simops.c (inc): Fix typo. | |
53 | ||
097e6924 JL |
54 | Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com) |
55 | ||
56 | * simops.c (signed multiply instructions): Cast input operands to | |
57 | signed32 before casting them to signed64 so that the sign bit | |
58 | is propagated properly. | |
59 | ||
a9faef12 MA |
60 | Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com> |
61 | ||
62 | * Makefile.in: Last change was bad. Define NL_TARGET | |
63 | so that targ-vals.h will be used instead of syscall.h. | |
64 | * simops.c: Use targ-vals.h instead of syscall.h. | |
65 | (OP_F020): Disable unsupported system calls. | |
66 | ||
e04b0d76 MA |
67 | Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com> |
68 | ||
69 | * Makefile.in: Get header files from libgloss/mn10300/sys. | |
70 | ||
7eab31b7 JL |
71 | Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com) |
72 | ||
73 | * simops.c: Include sim-types.h. | |
74 | ||
75 | Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com) | |
76 | ||
77 | * simops.c (multiply instructions): Cast input operands to a | |
78 | signed64/unsigned64 type as appropriate. | |
79 | ||
fbb8b6b9 AC |
80 | Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com> |
81 | ||
82 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
83 | length parameter. Return -1. | |
84 | ||
85 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
86 | ||
87 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
88 | ||
412c4e94 AC |
89 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> |
90 | ||
91 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
92 | ||
462cfbc4 DE |
93 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> |
94 | ||
95 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
96 | ||
97 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
98 | ||
99 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
100 | * config.in: Ditto. | |
101 | ||
102 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
103 | ||
104 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
105 | ||
106 | Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com) | |
107 | ||
108 | * simops.c (call:16 call:32): Stack adjustment is determined solely | |
109 | by the imm8 field. | |
110 | ||
9e03a68f AC |
111 | Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
112 | ||
b5da31ac | 113 | * interp.c (sim_load): Pass lma_p and sim_write args to |
9e03a68f AC |
114 | sim_load_file. |
115 | ||
f4ab2b2f JL |
116 | Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com) |
117 | ||
118 | * simops.c: Correctly handle register restores for "ret" and "retf" | |
119 | instructions. | |
120 | ||
121 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
122 | ||
123 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
124 | ||
125 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
126 | ||
127 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
128 | ||
92f91d1f AC |
129 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> |
130 | ||
131 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
132 | ||
794e9ac9 AC |
133 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
134 | ||
135 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
136 | ||
b45caf05 AC |
137 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> |
138 | ||
139 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
140 | ||
141 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
142 | ||
143 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
144 | ||
6fea4763 DE |
145 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> |
146 | ||
147 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
148 | ||
88117054 AC |
149 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
150 | ||
151 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
152 | * config.in: Ditto. | |
153 | ||
7230ff0f AC |
154 | Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com> |
155 | ||
156 | * interp.c (sim_kill): Delete. | |
fafce69a AC |
157 | (sim_create_inferior): Add ABFD argument. |
158 | (sim_load): Move setting of PC from here. | |
159 | (sim_create_inferior): To here. | |
7230ff0f | 160 | |
247fccde AC |
161 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
162 | ||
163 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
164 | * config.in: Ditto. | |
165 | ||
166 | Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
167 | ||
168 | * interp.c (sim_open): Add ABFD argument. | |
169 | ||
170 | Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com) | |
171 | ||
172 | * interp.c (sim_resume): Clear State.exited. | |
173 | (sim_stop_reason): If State.exited is nonzero, then indicate that | |
174 | the simulator exited instead of stopped. | |
175 | * mn10300_sim.h (struct _state): Add exited field. | |
176 | * simops.c (syscall): Set State.exited for SYS_exit. | |
177 | ||
c370b3cd JL |
178 | Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com) |
179 | ||
180 | * simops.c: Fix thinko in last change. | |
181 | ||
0a8fa63c JL |
182 | Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com) |
183 | ||
dbdb5bd8 JL |
184 | * simops.c: "call" stores the callee saved registers into the |
185 | stack! Update the stack pointer properly when done with | |
186 | register saves. | |
187 | ||
0a8fa63c JL |
188 | * simops.c: Fix return address computation for "call" instructions. |
189 | ||
190 | Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com) | |
191 | ||
192 | * interp.c (sim_open): Fix typo. | |
193 | ||
09e142d5 JL |
194 | Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com) |
195 | ||
196 | * interp.c (sim_resume): Add missing case in big switch | |
197 | statement (for extb instruction). | |
198 | ||
003c91be JL |
199 | Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com) |
200 | ||
201 | * interp.c: Replace all references to load_mem and store_mem | |
202 | with references to load_byte, load_half, load_3_byte, load_word | |
203 | and store_byte, store_half, store_3_byte, store_word. | |
204 | (INLINE): Delete definition. | |
205 | (load_mem_big): Likewise. | |
206 | (max_mem): Make it global. | |
207 | (dispatch): Make this function inline. | |
208 | (load_mem, store_mem): Delete functions. | |
209 | * mn10300_sim.h (INLINE): Define. | |
210 | (RLW): Delete unused definition. | |
211 | (load_mem, store_mem): Delete declarations. | |
212 | (load_mem_big): New definition. | |
213 | (load_byte, load_half, load_3_byte, load_word): New functions. | |
214 | (store_byte, store_half, store_3_byte, store_word): New functions. | |
215 | * simops.c: Replace all references to load_mem and store_mem | |
216 | with references to load_byte, load_half, load_3_byte, load_word | |
217 | and store_byte, store_half, store_3_byte, store_word. | |
218 | ||
219 | Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
220 | ||
221 | * interp.c (sim_open): Add callback to arguments. | |
222 | (sim_set_callbacks): Delete SIM_DESC argument. | |
223 | ||
4df7aeb3 JL |
224 | Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com) |
225 | ||
226 | * interp.c (dispatch): Make this an inline function. | |
227 | ||
228 | * simops.c (syscall): Use callback->write regardless of | |
229 | what file descriptor we're writing too. | |
230 | ||
b07a1e78 JL |
231 | Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com) |
232 | ||
233 | * interp.c (load_mem_big): Remove function. It's now a macro | |
234 | defined elsewhere. | |
235 | (compare_simops): New function. | |
236 | (sim_open): Sort the Simops table before inserting entries | |
237 | into the hash table. | |
238 | * mn10300_sim.h: Remove unused #defines. | |
239 | (load_mem_big): Define. | |
240 | ||
234a9a49 JL |
241 | Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com) |
242 | ||
243 | * interp.c (load_mem): If we get a load from an out of range | |
244 | address, abort. | |
245 | (store_mem): Likewise for stores. | |
246 | (max_mem): New variable. | |
247 | ||
baa83bcc JL |
248 | Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com) |
249 | ||
8def9220 JL |
250 | * mn10300_sim.h: Fix ordering of bits in the PSW. |
251 | ||
baa83bcc JL |
252 | * interp.c: Improve hashing routine to avoid long list |
253 | traversals for common instructions. Add HASH_STAT support. | |
254 | Rewrite opcode dispatch code using a big switch instead of | |
255 | cascaded if/else statements. Avoid useless calls to load_mem. | |
256 | ||
26e9f63c JL |
257 | Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com) |
258 | ||
259 | * mn10300_sim.h (struct _state): Add space for mdrq register. | |
260 | (REG_MDRQ): Define. | |
261 | * simops.c: Don't abort for trap. Add support for the extended | |
262 | instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24", | |
263 | and "bsch". | |
264 | ||
265 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
266 | ||
267 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
268 | ||
8517f62b AC |
269 | Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com> |
270 | ||
271 | * interp.c (sim_stop): Add stub function. | |
272 | ||
6cc6987e DE |
273 | Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com> |
274 | ||
275 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
276 | * interp.c (sim_kind, myname): New static locals. | |
277 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
278 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
279 | load file into simulator. Set start address from bfd. | |
280 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
281 | ||
87e43259 AC |
282 | Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com> |
283 | ||
284 | * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime | |
285 | only include if implemented by host. | |
286 | (OP_F020): Typecast arg passed to time function; | |
287 | ||
288 | Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com) | |
289 | ||
290 | * simops.c (syscall): Handle new mn10300 calling conventions. | |
291 | ||
08db4a65 AC |
292 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
293 | ||
294 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
295 | * config.in: Ditto. | |
296 | ||
ea553f56 ILT |
297 | Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com> |
298 | ||
299 | * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match | |
300 | corresponding change in opcodes directory. | |
301 | ||
fbda74b1 DE |
302 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> |
303 | ||
8a7c3105 DE |
304 | * interp.c (sim_open): New arg `kind'. |
305 | ||
fbda74b1 DE |
306 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
307 | ||
a35e91c3 AC |
308 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
309 | ||
310 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
311 | ||
312 | Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com) | |
313 | ||
314 | * simops.c: Fix register extraction for a two "movbu" variants. | |
315 | Somewhat simplify "sub" instructions. | |
316 | Correctly sign extend operands for "mul". Put the correct | |
317 | half of the result in MDR for "mul" and "mulu". | |
318 | Implement remaining instructions. | |
319 | Tweak opcode for "syscall". | |
320 | ||
321 | Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com) | |
322 | ||
323 | * simops.c: Do syscall emulation in "syscall" instruction. Add | |
324 | dummy "trap" instruction. | |
325 | ||
c695046a AC |
326 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
327 | ||
328 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
329 | ||
a77aa7ec AC |
330 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
331 | ||
332 | * configure: Re-generate. | |
333 | ||
601fb8ae MM |
334 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> |
335 | ||
336 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
337 | ||
53b9417e DE |
338 | Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com> |
339 | ||
340 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
341 | in argv form. | |
342 | (other sim_*): New SIM_DESC argument. | |
343 | ||
09eef8af JL |
344 | Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com) |
345 | ||
0ade484f JL |
346 | * simops.c: Fix carry bit computation for "add" instructions. |
347 | ||
09eef8af JL |
348 | * simops.c: Fix typos in bset insns. Fix arguments to store_mem |
349 | for bset imm8,(d8,an) and bclr imm8,(d8,an). | |
350 | ||
351 | Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com) | |
352 | ||
353 | * simops.c: Fix register references when computing Z and N bits | |
354 | for lsr imm8,dn. | |
355 | ||
356 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
357 | ||
358 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
359 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
360 | * configure.in: sinclude ../common/aclocal.m4. | |
361 | * configure: Regenerated. | |
362 | ||
018f9eb4 JL |
363 | Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com) |
364 | ||
365 | * interp.c (init_system): Allocate 2^19 bytes of space for the | |
366 | simulator. | |
367 | ||
295dbbe4 SG |
368 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) |
369 | ||
370 | * configure configure.in Makefile.in: Update to new configure | |
371 | scheme which is more compatible with WinGDB builds. | |
372 | * configure.in: Improve comment on how to run autoconf. | |
373 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
374 | * Makefile.in: Use autoconf substitution to install common | |
375 | makefile fragment. | |
376 | ||
f95251f0 JL |
377 | Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com) |
378 | ||
379 | * simops.c: Undo last change to "rol" and "ror", original code | |
380 | was correct! | |
381 | ||
b4b290a0 JL |
382 | Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com) |
383 | ||
384 | * simops.c: Fix "rol" and "ror". | |
385 | ||
386 | Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com) | |
387 | ||
388 | * simops.c: Fix typo in last change. | |
389 | ||
2da0bc1b JL |
390 | Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com) |
391 | ||
392 | * simops.c: Use REG macros in few places not using them yet. | |
393 | ||
bbd17062 JL |
394 | Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com) |
395 | ||
396 | * mn10300_sim.h (struct _state): Fix number of registers! | |
397 | ||
b774c0e4 JL |
398 | Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com) |
399 | ||
400 | * mn10300_sim.h (struct _state): Put all registers into a single | |
401 | array to make gdb implementation easier. | |
402 | (REG_*): Add definitions for all registers in the state array. | |
403 | (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros. | |
404 | * simops.c: Related changes. | |
405 | ||
d657034d JL |
406 | Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com) |
407 | ||
408 | * interp.c (sim_resume): Handle 0xff as a single byte insn. | |
409 | ||
410 | * simops.c: Fix overflow computation for "add" and "inc" | |
411 | instructions. | |
412 | ||
16d2e2b6 JL |
413 | Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com) |
414 | ||
093e9a32 JL |
415 | * simops.c: Handle "break" instruction. |
416 | ||
16d2e2b6 JL |
417 | * simops.c: Fix restoring the PC for "ret" and "retf" instructions. |
418 | ||
419 | Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com) | |
420 | ||
421 | * gencode.c (write_opcodes): Also write out the format of the | |
422 | opcode. | |
423 | * mn10300_sim.h (simops): Add "format" field. | |
424 | * interp.c (sim_resume): Deal with endianness issues here. | |
425 | ||
95d18eb7 JL |
426 | Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com) |
427 | ||
428 | * simops.c (REG0_4): Define. | |
429 | Use REG0_4 for indexed loads/stores. | |
430 | ||
2e8f4133 JL |
431 | Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com) |
432 | ||
433 | * simops.c (REG0_16): Fix typo. | |
434 | ||
d2523010 JL |
435 | Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com) |
436 | ||
b2f7a7e5 JL |
437 | * simops.c: Call abort for any instruction that's not currently |
438 | simulated. | |
439 | ||
9f4a551e JL |
440 | * simops.c: Define accessor macros to extract register |
441 | values from instructions. Use them consistently. | |
442 | ||
7c52bf32 JL |
443 | * interp.c: Delete unused global variable "OP". |
444 | (sim_resume): Remove unused variable "opcode". | |
445 | * simops.c: Fix some uninitialized variable problems, add | |
446 | parens to fix various -Wall warnings. | |
447 | ||
d2523010 JL |
448 | * gencode.c (write_header): Add "insn" and "extension" arguments |
449 | to the OP_* declarations. | |
450 | (write_template): Similarly for function templates. | |
451 | * interp.c (insn, extension): Remove global variables. Instead | |
452 | pass them as arguments to the OP_* functions. | |
453 | * mn10300_sim.h: Remove decls for "insn" and "extension". | |
454 | * simops.c (OP_*): Accept "insn" and "extension" as arguments | |
455 | instead of using globals. | |
456 | ||
4d8ced6c JL |
457 | Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com) |
458 | ||
e5a7a537 JL |
459 | * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" |
460 | ||
4d8ced6c JL |
461 | * simops.c: Fix thinkos in last change to "inc dn". |
462 | ||
61ecca95 JL |
463 | Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com) |
464 | ||
465 | * simops.c: "add imm,sp" does not effect the condition codes. | |
466 | "inc dn" does effect the condition codes. | |
467 | ||
e4e13022 JL |
468 | Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com) |
469 | ||
470 | * simops.c: Treat both operands as signed values for | |
471 | "div" instruction. | |
472 | ||
473 | * simops.c: Fix simulation of division instructions. | |
474 | Fix typos/thinkos in several "cmp" and "sub" instructions. | |
475 | ||
fcfaf40d JL |
476 | Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com) |
477 | ||
e4e13022 JL |
478 | * simops.c: Fix carry bit handling in "sub" and "cmp" |
479 | instructions. | |
480 | ||
fcfaf40d JL |
481 | * simops.c: Fix "mov imm8,an" and "mov imm16,dn". |
482 | ||
6db7fc49 JL |
483 | Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com) |
484 | ||
b7b89deb JL |
485 | * simops.c: Fix overflow computation for many instructions. |
486 | ||
e5a7a537 | 487 | * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)". |
af388638 | 488 | |
c8f0171f JL |
489 | * simops.c: Fix "mov am, dn". |
490 | ||
6db7fc49 JL |
491 | * simops.c: Fix more bugs in "add imm,an" and |
492 | "add imm,dn". | |
493 | ||
f5f13c1d JL |
494 | Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com) |
495 | ||
6e7a01c1 JL |
496 | * simops.c: Fix bugs in "movm" and "add imm,an". |
497 | ||
3bb3fe44 JL |
498 | * simops.c: Don't lose the upper 24 bits of the return |
499 | pointer in "call" and "calls" instructions. Rough cut | |
500 | at emulated system calls. | |
501 | ||
de0dce7c JL |
502 | * simops.c: Implement the remaining 5, 6 and 7 byte instructions. |
503 | ||
ecb4b5a3 JL |
504 | * simops.c: Implement remaining 4 byte instructions. |
505 | ||
506 | * simops.c: Implement remaining 3 byte instructions. | |
2e35551c | 507 | |
f5f13c1d JL |
508 | * simops.c: Implement remaining 2 byte instructions. Call |
509 | abort for instructions we're not implementing now. | |
510 | ||
73e65298 JL |
511 | Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com) |
512 | ||
707641f6 JL |
513 | * simops.c: Implement lots of random instructions. |
514 | ||
1f3bea21 JL |
515 | * simops.c: Implement "movm" and "bCC" insns. |
516 | ||
92284aaa JL |
517 | * mn10300_sim.h (_state): Add another register (MDR). |
518 | (REG_MDR): Define. | |
519 | * simops.c: Implement "cmp", "calls", "rets", "jmp" and | |
520 | a few additional random insns. | |
521 | ||
73e65298 JL |
522 | * mn10300_sim.h (PSW_*): Define for CC status tracking. |
523 | (REG_D0, REG_A0, REG_SP): Define. | |
524 | * simops.c: Implement "add", "addc" and a few other random | |
525 | instructions. | |
b5f831ac JL |
526 | |
527 | * gencode.c, interp.c: Snapshot current simulator code. | |
528 | ||
05ccbdfd JL |
529 | Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com) |
530 | ||
531 | * Makefile.in, config.in, configure, configure.in: New files. | |
532 | * gencode.c, interp.c, mn10300_sim.h, simops.c: New files. | |
533 |