Regress yesterday's change to jmp instruction -- it has deceiving syntax.
[deliverable/binutils-gdb.git] / sim / mn10300 / ChangeLog
CommitLineData
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JJ
1Wed Aug 26 09:29:38 1998 Joyce Janczyn <janczyn@cygnus.com>
2
3 * mn10300.igen (div,divu): Fix divide instructions so divide by 0
4 behaves like the hardware.
5
59587664
JJ
6Tue Aug 25 16:46:59 1998 Joyce Janczyn <janczyn@cygnus.com>
7
8 * mn10300.igen (OP_F0F4): Need to load contents of register AN0
9 for jmp.
10
c1802bfd
JJ
11Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com>
12
13 * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.
14
3e202231 15start-sanitize-am33
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JJ
16Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com)
17
18 * am33.igen: Handle case where first DSP operation modifies a
19 register used in the second DSP operation correctly.
20
21Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com)
22
23 * am33.igen: Detect cases where two operands must not match for
24 DSP instructions too.
25
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26Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com)
27
28 * am33.igen: Detect cases where two operands must not match in
29 non-DSP instructions.
30
31end-sanitize-am33
a2f93b67
JJ
32Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>
33
34 * op_utils.c (do_syscall): Rewrite to use common/syscall.c.
35 (syscall_read_mem, syscall_write_mem): New functions for syscall
36 callbacks.
37 * mn10300_sim.h: Add prototypes for syscall_read_mem and
38 syscall_write_mem.
39 * mn10300.igen: Change C++ style comments to C style comments.
40 Check for divide by zero in div and divu ops.
41
0a785507 42start-sanitize-am33
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JL
43Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com)
44
45 * am33.igen (translate_xreg): New function. Use it as needed.
46
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47Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com)
48
4b6651c9
JL
49 * am33.igen: Add some missing instructions.
50
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JL
51 * am33.igen: Autoincrement loads/store fixes.
52
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JL
53Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com)
54
6ae1456e
JL
55 * am33.igen: Add mov_lCC DSP instructions.
56
0a785507
JL
57 * am33.igen: Add most am33 DSP instructions.
58
59end-sanitize-am33
1f0ba346
JL
60Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com)
61
4e86afb8
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62 * mn10300.igen: Fix Z bit for addc and subc instructions.
63 Minor fixes in multiply/divide patterns.
64
65start-sanitize-am33
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66 * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code
67 handling for many instructions. Fix sign extension for some
68 24bit immediates.
69
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70 * am33.igen: Fix Z bit for remaining addc/subc instructions.
71 Do not sign extend immediate for mov imm,XRn.
72 More random mul, mac & div fixes.
73 Remove some unused variables.
74 Sign extend 24bit displacement in memory addresses.
75
4e86afb8
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76 * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various
77 fixes to 2 register multiply, divide and mac instructions. Set
78 Z,N correctly for sat16. Sign extend 24 bit immediate for add,
79 and sub instructions.
80
1f0ba346 81 * am33.igen: Add remaining non-DSP instructions.
4e86afb8 82end-sanitize-am33
1f0ba346 83
4e86afb8 84start-sanitize-am33
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85Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com)
86
9c55817e
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87 * am33.igen (translate_rreg): New function. Use it as appropriate.
88
377e53bb
JL
89 * am33.igen: More am33 instructions. Fix "div".
90
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91Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com)
92
d2b02ab2
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93 * mn10300.igen: Add am33 support.
94
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95 * Makefile.in: Use multi-sim to support both a mn10300 and am33
96 simulator.
97
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98 * am33.igen: Add many more am33 instructions.
99
100end-sanitize-am33
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101Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com)
102
103 * mn10300_sim.h (FETCH24): Define.
0f7d7385 104
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105start-sanitize-am33
106 * mn10300_sim.h: Add defines for some registers found on the AM33.
0f7d7385 107 * am33.igen: New file with some am33 support.
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108end-sanitize-am33
109
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110Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com)
111
112 * mn10300_sim.h: Include bfd.h
113 (struct state): Add more room for processor specific registers.
114start-sanitize-am33
115 (REG_E0): Define.
116end-sanitize-am33
117
f0ce242f 118start-sanitize-am30
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JJ
119Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>
120
121 * dv-mn103tim.c: Include sim-assert.h
122 * dv-mn103ser.c (do_polling_event): Check for incoming data on
123 serial line and schedule next polling event.
124 (read_status_reg): schedule events to check for incoming data on
125 serial line and issue interrupt if necessary.
126
127Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com>
128
129 * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo).
130
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131Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com>
132
133 * interp.c (board): Rename am32 to stdeval1 as this is the name
134 consistently used to refer to the mn1030002 board.
135
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136Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com>
137 * interp.c (sim_open): Fix typo in address of EXTMD register
138 (0x34000280, not 0x3400280).
139
140end-sanitize-am30
141Wed Jun 17 18:00:18 1998 Jeffrey A Law (law@cygnus.com)
142
143 * simops.c (syscall): Handle change in opcode # for syscall.
144 * mn10300.igen (syscall): Likewise.
145
8c2de2aa 146start-sanitize-am30
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JJ
147Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com>
148 * dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or
149 reset) are not enabled on reset.
150
2a62f119 151Sun June 14 17:04:00 1998 Joyce Janczyn <janczyn@cygnus.com>
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152 * dv-mn103iop.c (write_*_reg): Check for attempt to write r/o
153 register bits.
154 * dv-mn103ser.c: Fill in methods for reading and writing to serial
155 device registers.
2a62f119
JJ
156 * interp.c (sim_open): Make the serial device a polling device.
157
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158Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com>
159 * dv-mn103iop.c: New file for handling am32 io ports.
160 * configure.in: Add mn103iop to hw_device list.
161 * configure: Re-generate.
162 * interp.c (sim_open): Create io port device.
163
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JJ
164Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com>
165 * dv-mn103int.c (external_group): Use enumerated types to access
166 correct group addresses.
167 * dv-mn103tim.c (do_counter_event): Underflow of cascaded timer
168 triggers an interrupt on the higher-numbered timer's port.
169
170end-sanitize-am30
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JJ
171Mon June 8 13:30:00 1998 Joyce Janczyn <janczyn@cygnus.com>
172 * interp.c: (mn10300_option_handler): New function parses arguments
173 using sim-options.
39e953a7 174start-sanitize-am30
d3f76d42
JJ
175 * (board): Add --board option for specifying am32.
176 * (sim_open): Create new timer and serial devices and control
177 configuration of other am32 devices via board option.
178 * dv-mn103tim.c, dv-mn103ser.c: New files for timers and serial devices.
179 * dv-mn103cpu.c: Fix typos in opening comments.
180 * dv-mn103int.c: Adjust interrupt controller settings for am32 instead of am30.
181 * configure.in: Add mn103tim and mn103ser to hw_device list.
182 * configure: Re-generate.
183end-sanitize-am30
184
185start-sanitize-am30
186Mon May 25 20:50:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
187
188 * dv-mn103int.c, dv-mn103cpu.c: Rename *_callback to *_method.
189
190 * dv-mn103cpu.c, dv-mn103int.c: Include hw-main.h and
191 sim-main.h. Declare a struct hw_descriptor instead of struct
192 hw_device_descriptor.
193
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194Mon May 25 17:33:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
195
196 * dv-mn103cpu.c (struct mn103cpu): Change type of pending_handler
197 to struct hw_event.
198
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199Fri May 22 12:17:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
200
201 * configure.in (SIM_AC_OPTION_HARDWARE): Add argument "yes".
202
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AC
203Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com>
204
205 * interp.c (sim_open): Create a polling PAL device.
206
207end-sanitize-am30
208Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
209
210 * dv-mn103int.c (mn103int_port_event):
211 (mn103int_port_event):
212 (mn103int_io_read_buffer):
213 (mn103int_io_write_buffer):
214
215 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args.
216 (mn103cpu_port_event): Ditto.
217 (mn103cpu_io_read_buffer): Ditto.
218 (mn103cpu_io_write_buffer): Ditto.
219
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220Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
221
222 * configure: Regenerated to track ../common/aclocal.m4 changes.
223
5da9ce07
TT
224Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
225
226 * configure: Regenerated to track ../common/aclocal.m4 changes.
227 * config.in: Ditto.
228
229Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com>
230
231 * acconfig.h: New file.
232 * configure.in: Reverted change of Apr 24; use sinclude again.
233
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TT
234Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
235
236 * configure: Regenerated to track ../common/aclocal.m4 changes.
237 * config.in: Ditto.
238
239Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com>
240
241 * configure.in: Don't call sinclude.
242
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AC
243Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
244
b1df34b9
TT
245 * mn10300_sim.h: Declare all functions in op_utils.c using
246 INLINE_SIM_MAIN.
247 * op_utils.c: Ditto.
248 * sim-main.c: New file. Include op_utils.c.
249
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AC
250 * mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to
251 differentiate between MOV/CMP immediate/register instructions.
252
253 * configure.in (SIM_AC_OPTION_INLINE): Add and enable.
254 * configure: Regenerate.
255
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AC
256Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
257
258 * configure: Regenerated to track ../common/aclocal.m4 changes.
259
260start-sanitize-am30
261Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
262
263 * interp.c (hw): Delete variable, moved to SIM_DESC.
264 (sim_open): Delete calls to hw_tree_create, hw_tree_finish.
265 Handled by sim-module.
266 (sim_open): Do not anotate tree with trace properties, handled by
267 sim-hw.c
268 (sim_open): Call sim_hw_parse instead of hw_tree_parse.
269
270 * configure: Regenerated to track ../common/aclocal.m4 changes.
271
272end-sanitize-am30
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AC
273start-sanitize-am30
274Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
275
276 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC
277 on the stack when delivering interrupts (not just the lower
278 half)...
279 * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were
280 specified in the wrong order.
281
282end-sanitize-am30
283start-sanitize-am30
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AC
284Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
285
286 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of
287 succeeding interrupts, clear pending_handler when the handler
288 isn't re-scheduled.
289
6d133cc9 290end-sanitize-am30
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SG
291Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
292
293 * Makefile.in (tmp-igen): Prefix all usage of move-if-change
294 script with $(SHELL) to make NT native builds happy.
295 * configure: Regenerate because of change to ../common/aclocal.m4.
296
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AC
297Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
298
299 * configure.in: Make --enable-sim-common the default.
300 * configure: Re-generate.
301
302 * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
303 address into Sate.regs[REG_PC] instead of common struct.
304
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JJ
305Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com>
306
307 * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value.
308
52ef605e
JJ
309Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com>
310
311 * simops.c (OP_F0FD): Initialise variable 'sp'.
312
6d133cc9 313start-sanitize-am30
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AC
314Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
315
316 * dv-mn103int.c (decode_group): A group register every 4 bytes not
317 8.
318 (write_icr): Rewrite equation updating request field.
319 (read_iagr): Fix check that interrupt is still pending.
320
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321end-sanitize-am30
322start-sanitize-am30
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AC
323Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
324
325 * interp.c (sim_open): Tidy up device creation.
326
327 * dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero
328 value.
329 (mn103int_io_read_buffer): Convert absolute address to register
330 block offsets.
331 (read_icr, write_icr): Convert block offset into group offset.
332
6d133cc9 333end-sanitize-am30
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AC
334Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
335
336 * interp.c (sim_open): Create second 1mb memory region at
337 0x40000000.
338 (sim_open): Create a device tree.
339 (sim-hw.h): Include.
6d133cc9 340start-sanitize-am30
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AC
341 (do_interrupt): Delete, needs to use dv-mn103cpu.c
342
343 * dv-mn103int.c, dv-mn103cpu.c: New files.
6d133cc9 344end-sanitize-am30
6100784a 345
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AC
346Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
347
348 * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM):
349 Define.
350 (SP): Define.
351
d89fa2d8
AC
352Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
353
354 * configure: Regenerated to track ../common/aclocal.m4 changes.
355
e855e576
AC
356Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com>
357
358 * interp.c (sim-options.h): Include.
359 (sim_kind, myname): Declare when not using common framework.
360
361 * mn10300_sim.h (do_syscall, generic*): Provide prototypes for
362 functions found in op_utils.c
363
364 * mn10300.igen (add): Discard unused variables.
365
366 * configure, config.in: Re-generate with autoconf 2.12.1.
367
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JJ
368Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com>
369
370 Add support for --enable-sim-common option.
371 * Makefile.in (WITHOUT_COMMON_OBJS): Files included if
372 ! --enable-sim-common
373 (WITH_COMMON_OBJS): Files included if --enable-sim-common.
374 (MN10300_OBJS,MN10300_INTERP_DEP): New variables.
375 (SIM_OBJS): Rewrite.
376 ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables.
377 (SIM_EXTRA_CFLAGS): New variable.
378 (clean-extra): Clean up igen files.
379 (../igen/igen,clean-igen,tmp-igen): New rules.
380 * configure.in: Add support for common framework via
381 --enable-sim-common.
382 * configure: Regenerate.
383 * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h.
384 (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON.
385 (init_system,sim_write,compare_simops): Likewise.
386 (sim_set_profile,sim_set_profile_size): Likewise.
387 (sim_stop,sim_resume,sim_trace,sim_info): Likewise.
388 (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise.
389 (enum interrupt_type): New enum.
390 (interrupt_names): New global.
391 (do_interrupt): New function.
392 (sim_open): Define differently if WITH_COMMON.
393 (sim_close,sim_create_inferior,sim_do_command): Likewise.
394 * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions
395 for WITH_COMMON.
396 * mn10300.igen: New file.
397 * mn10300.dc: New file.
398 * op_utils.c: New file.
399 * sim-main.h: New file.
400
401Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
402
403 * configure: Regenerated to track ../common/aclocal.m4 changes.
404
405Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com)
406
407 * simops.c (inc): Fix typo.
408
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409Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com)
410
411 * simops.c (signed multiply instructions): Cast input operands to
412 signed32 before casting them to signed64 so that the sign bit
413 is propagated properly.
414
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415Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com>
416
417 * Makefile.in: Last change was bad. Define NL_TARGET
418 so that targ-vals.h will be used instead of syscall.h.
419 * simops.c: Use targ-vals.h instead of syscall.h.
420 (OP_F020): Disable unsupported system calls.
421
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422Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com>
423
424 * Makefile.in: Get header files from libgloss/mn10300/sys.
425
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426Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com)
427
428 * simops.c: Include sim-types.h.
429
430Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com)
431
432 * simops.c (multiply instructions): Cast input operands to a
433 signed64/unsigned64 type as appropriate.
434
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AC
435Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
436
437 * interp.c (sim_store_register, sim_fetch_register): Pass in
438 length parameter. Return -1.
439
440Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
441
442 * configure: Regenerated to track ../common/aclocal.m4 changes.
443
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AC
444Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
445
446 * configure: Regenerated to track ../common/aclocal.m4 changes.
447
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DE
448Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
449
450 * configure: Regenerated to track ../common/aclocal.m4 changes.
451
452Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
453
454 * configure: Regenerated to track ../common/aclocal.m4 changes.
455 * config.in: Ditto.
456
457Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
458
459 * configure: Regenerated to track ../common/aclocal.m4 changes.
460
461Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com)
462
463 * simops.c (call:16 call:32): Stack adjustment is determined solely
464 by the imm8 field.
465
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466Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
467
b5da31ac 468 * interp.c (sim_load): Pass lma_p and sim_write args to
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AC
469 sim_load_file.
470
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471Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com)
472
473 * simops.c: Correctly handle register restores for "ret" and "retf"
474 instructions.
475
476Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
477
478 * configure: Regenerated to track ../common/aclocal.m4 changes.
479
480Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
481
482 * configure: Regenerated to track ../common/aclocal.m4 changes.
483
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484Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
485
486 * configure: Regenerated to track ../common/aclocal.m4 changes.
487
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AC
488Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
489
490 * configure: Regenerated to track ../common/aclocal.m4 changes.
491
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AC
492Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
493
494 * configure: Regenerated to track ../common/aclocal.m4 changes.
495
496Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
497
498 * configure: Regenerated to track ../common/aclocal.m4 changes.
499
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DE
500Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
501
502 * configure: Regenerated to track ../common/aclocal.m4 changes.
503
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AC
504Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
505
506 * configure: Regenerated to track ../common/aclocal.m4 changes.
507 * config.in: Ditto.
508
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509Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
510
511 * interp.c (sim_kill): Delete.
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AC
512 (sim_create_inferior): Add ABFD argument.
513 (sim_load): Move setting of PC from here.
514 (sim_create_inferior): To here.
7230ff0f 515
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516Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
517
518 * configure: Regenerated to track ../common/aclocal.m4 changes.
519 * config.in: Ditto.
520
521Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
522
523 * interp.c (sim_open): Add ABFD argument.
524
525Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com)
526
527 * interp.c (sim_resume): Clear State.exited.
528 (sim_stop_reason): If State.exited is nonzero, then indicate that
529 the simulator exited instead of stopped.
530 * mn10300_sim.h (struct _state): Add exited field.
531 * simops.c (syscall): Set State.exited for SYS_exit.
532
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533Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com)
534
535 * simops.c: Fix thinko in last change.
536
0a8fa63c
JL
537Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
538
dbdb5bd8
JL
539 * simops.c: "call" stores the callee saved registers into the
540 stack! Update the stack pointer properly when done with
541 register saves.
542
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543 * simops.c: Fix return address computation for "call" instructions.
544
545Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
546
547 * interp.c (sim_open): Fix typo.
548
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JL
549Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
550
551 * interp.c (sim_resume): Add missing case in big switch
552 statement (for extb instruction).
553
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JL
554Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
555
556 * interp.c: Replace all references to load_mem and store_mem
557 with references to load_byte, load_half, load_3_byte, load_word
558 and store_byte, store_half, store_3_byte, store_word.
559 (INLINE): Delete definition.
560 (load_mem_big): Likewise.
561 (max_mem): Make it global.
562 (dispatch): Make this function inline.
563 (load_mem, store_mem): Delete functions.
564 * mn10300_sim.h (INLINE): Define.
565 (RLW): Delete unused definition.
566 (load_mem, store_mem): Delete declarations.
567 (load_mem_big): New definition.
568 (load_byte, load_half, load_3_byte, load_word): New functions.
569 (store_byte, store_half, store_3_byte, store_word): New functions.
570 * simops.c: Replace all references to load_mem and store_mem
571 with references to load_byte, load_half, load_3_byte, load_word
572 and store_byte, store_half, store_3_byte, store_word.
573
574Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
575
576 * interp.c (sim_open): Add callback to arguments.
577 (sim_set_callbacks): Delete SIM_DESC argument.
578
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579Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
580
581 * interp.c (dispatch): Make this an inline function.
582
583 * simops.c (syscall): Use callback->write regardless of
584 what file descriptor we're writing too.
585
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586Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
587
588 * interp.c (load_mem_big): Remove function. It's now a macro
589 defined elsewhere.
590 (compare_simops): New function.
591 (sim_open): Sort the Simops table before inserting entries
592 into the hash table.
593 * mn10300_sim.h: Remove unused #defines.
594 (load_mem_big): Define.
595
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596Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
597
598 * interp.c (load_mem): If we get a load from an out of range
599 address, abort.
600 (store_mem): Likewise for stores.
601 (max_mem): New variable.
602
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603Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
604
8def9220
JL
605 * mn10300_sim.h: Fix ordering of bits in the PSW.
606
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607 * interp.c: Improve hashing routine to avoid long list
608 traversals for common instructions. Add HASH_STAT support.
609 Rewrite opcode dispatch code using a big switch instead of
610 cascaded if/else statements. Avoid useless calls to load_mem.
611
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612Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
613
614 * mn10300_sim.h (struct _state): Add space for mdrq register.
615 (REG_MDRQ): Define.
616 * simops.c: Don't abort for trap. Add support for the extended
617 instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
618 and "bsch".
619
620Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
621
622 * configure: Regenerated to track ../common/aclocal.m4 changes.
623
8517f62b
AC
624Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
625
626 * interp.c (sim_stop): Add stub function.
627
6cc6987e
DE
628Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
629
630 * Makefile.in (SIM_OBJS): Add sim-load.o.
631 * interp.c (sim_kind, myname): New static locals.
632 (sim_open): Set sim_kind, myname. Ignore -E arg.
633 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
634 load file into simulator. Set start address from bfd.
635 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
636
87e43259
AC
637Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
638
639 * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
640 only include if implemented by host.
641 (OP_F020): Typecast arg passed to time function;
642
643Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
644
645 * simops.c (syscall): Handle new mn10300 calling conventions.
646
08db4a65
AC
647Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
648
649 * configure: Regenerated to track ../common/aclocal.m4 changes.
650 * config.in: Ditto.
651
ea553f56
ILT
652Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
653
654 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
655 corresponding change in opcodes directory.
656
fbda74b1
DE
657Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
658
8a7c3105
DE
659 * interp.c (sim_open): New arg `kind'.
660
fbda74b1
DE
661 * configure: Regenerated to track ../common/aclocal.m4 changes.
662
a35e91c3
AC
663Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
664
665 * configure: Regenerated to track ../common/aclocal.m4 changes.
666
667Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
668
669 * simops.c: Fix register extraction for a two "movbu" variants.
670 Somewhat simplify "sub" instructions.
671 Correctly sign extend operands for "mul". Put the correct
672 half of the result in MDR for "mul" and "mulu".
673 Implement remaining instructions.
674 Tweak opcode for "syscall".
675
676Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
677
678 * simops.c: Do syscall emulation in "syscall" instruction. Add
679 dummy "trap" instruction.
680
c695046a
AC
681Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
682
683 * configure: Regenerated to track ../common/aclocal.m4 changes.
684
a77aa7ec
AC
685Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
686
687 * configure: Re-generate.
688
601fb8ae
MM
689Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
690
691 * configure: Regenerate to track ../common/aclocal.m4 changes.
692
53b9417e
DE
693Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
694
695 * interp.c (sim_open): New SIM_DESC result. Argument is now
696 in argv form.
697 (other sim_*): New SIM_DESC argument.
698
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JL
699Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
700
0ade484f
JL
701 * simops.c: Fix carry bit computation for "add" instructions.
702
09eef8af
JL
703 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
704 for bset imm8,(d8,an) and bclr imm8,(d8,an).
705
706Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
707
708 * simops.c: Fix register references when computing Z and N bits
709 for lsr imm8,dn.
710
711Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
712
713 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
714 COMMON_{PRE,POST}_CONFIG_FRAG instead.
715 * configure.in: sinclude ../common/aclocal.m4.
716 * configure: Regenerated.
717
018f9eb4
JL
718Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
719
720 * interp.c (init_system): Allocate 2^19 bytes of space for the
721 simulator.
722
295dbbe4
SG
723Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
724
725 * configure configure.in Makefile.in: Update to new configure
726 scheme which is more compatible with WinGDB builds.
727 * configure.in: Improve comment on how to run autoconf.
728 * configure: Re-run autoconf to get new ../common/aclocal.m4.
729 * Makefile.in: Use autoconf substitution to install common
730 makefile fragment.
731
f95251f0
JL
732Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
733
734 * simops.c: Undo last change to "rol" and "ror", original code
735 was correct!
736
b4b290a0
JL
737Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
738
739 * simops.c: Fix "rol" and "ror".
740
741Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
742
743 * simops.c: Fix typo in last change.
744
2da0bc1b
JL
745Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
746
747 * simops.c: Use REG macros in few places not using them yet.
748
bbd17062
JL
749Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
750
751 * mn10300_sim.h (struct _state): Fix number of registers!
752
b774c0e4
JL
753Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
754
755 * mn10300_sim.h (struct _state): Put all registers into a single
756 array to make gdb implementation easier.
757 (REG_*): Add definitions for all registers in the state array.
758 (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
759 * simops.c: Related changes.
760
d657034d
JL
761Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
762
763 * interp.c (sim_resume): Handle 0xff as a single byte insn.
764
765 * simops.c: Fix overflow computation for "add" and "inc"
766 instructions.
767
16d2e2b6
JL
768Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
769
093e9a32
JL
770 * simops.c: Handle "break" instruction.
771
16d2e2b6
JL
772 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
773
774Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
775
776 * gencode.c (write_opcodes): Also write out the format of the
777 opcode.
778 * mn10300_sim.h (simops): Add "format" field.
779 * interp.c (sim_resume): Deal with endianness issues here.
780
95d18eb7
JL
781Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
782
783 * simops.c (REG0_4): Define.
784 Use REG0_4 for indexed loads/stores.
785
2e8f4133
JL
786Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
787
788 * simops.c (REG0_16): Fix typo.
789
d2523010
JL
790Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
791
b2f7a7e5
JL
792 * simops.c: Call abort for any instruction that's not currently
793 simulated.
794
9f4a551e
JL
795 * simops.c: Define accessor macros to extract register
796 values from instructions. Use them consistently.
797
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JL
798 * interp.c: Delete unused global variable "OP".
799 (sim_resume): Remove unused variable "opcode".
800 * simops.c: Fix some uninitialized variable problems, add
801 parens to fix various -Wall warnings.
802
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JL
803 * gencode.c (write_header): Add "insn" and "extension" arguments
804 to the OP_* declarations.
805 (write_template): Similarly for function templates.
806 * interp.c (insn, extension): Remove global variables. Instead
807 pass them as arguments to the OP_* functions.
808 * mn10300_sim.h: Remove decls for "insn" and "extension".
809 * simops.c (OP_*): Accept "insn" and "extension" as arguments
810 instead of using globals.
811
4d8ced6c
JL
812Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
813
e5a7a537
JL
814 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
815
4d8ced6c
JL
816 * simops.c: Fix thinkos in last change to "inc dn".
817
61ecca95
JL
818Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
819
820 * simops.c: "add imm,sp" does not effect the condition codes.
821 "inc dn" does effect the condition codes.
822
e4e13022
JL
823Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
824
825 * simops.c: Treat both operands as signed values for
826 "div" instruction.
827
828 * simops.c: Fix simulation of division instructions.
829 Fix typos/thinkos in several "cmp" and "sub" instructions.
830
fcfaf40d
JL
831Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
832
e4e13022
JL
833 * simops.c: Fix carry bit handling in "sub" and "cmp"
834 instructions.
835
fcfaf40d
JL
836 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
837
6db7fc49
JL
838Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
839
b7b89deb
JL
840 * simops.c: Fix overflow computation for many instructions.
841
e5a7a537 842 * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
af388638 843
c8f0171f
JL
844 * simops.c: Fix "mov am, dn".
845
6db7fc49
JL
846 * simops.c: Fix more bugs in "add imm,an" and
847 "add imm,dn".
848
f5f13c1d
JL
849Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
850
6e7a01c1
JL
851 * simops.c: Fix bugs in "movm" and "add imm,an".
852
3bb3fe44
JL
853 * simops.c: Don't lose the upper 24 bits of the return
854 pointer in "call" and "calls" instructions. Rough cut
855 at emulated system calls.
856
de0dce7c
JL
857 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
858
ecb4b5a3
JL
859 * simops.c: Implement remaining 4 byte instructions.
860
861 * simops.c: Implement remaining 3 byte instructions.
2e35551c 862
f5f13c1d
JL
863 * simops.c: Implement remaining 2 byte instructions. Call
864 abort for instructions we're not implementing now.
865
73e65298
JL
866Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
867
707641f6
JL
868 * simops.c: Implement lots of random instructions.
869
1f3bea21
JL
870 * simops.c: Implement "movm" and "bCC" insns.
871
92284aaa
JL
872 * mn10300_sim.h (_state): Add another register (MDR).
873 (REG_MDR): Define.
874 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
875 a few additional random insns.
876
73e65298
JL
877 * mn10300_sim.h (PSW_*): Define for CC status tracking.
878 (REG_D0, REG_A0, REG_SP): Define.
879 * simops.c: Implement "add", "addc" and a few other random
880 instructions.
b5f831ac
JL
881
882 * gencode.c, interp.c: Snapshot current simulator code.
883
05ccbdfd
JL
884Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
885
886 * Makefile.in, config.in, configure, configure.in: New files.
887 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
888
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