projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 5f3ef9d0 JB |
1 | 2012-06-15 Joel Brobecker <brobecker@adacore.com> |
| 2 | ||
| 3 | * config.in, configure: Regenerate. | |
| 4 | ||
| 2232061b MF |
5 | 2012-03-24 Mike Frysinger <vapier@gentoo.org> |
| 6 | ||
| 7 | * aclocal.m4, config.in, configure: Regenerate. | |
| 8 | ||
| db2e4d67 MF |
9 | 2011-12-03 Mike Frysinger <vapier@gentoo.org> |
| 10 | ||
| 11 | * aclocal.m4: New file. | |
| 12 | * configure: Regenerate. | |
| 13 | ||
| 9c082ca8 MF |
14 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
| 15 | ||
| 16 | * configure.ac: Change include to common/acinclude.m4. | |
| 17 | ||
| 6ffe910a MF |
18 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
| 19 | ||
| 20 | * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER | |
| 21 | call. Replace common.m4 include with SIM_AC_COMMON. | |
| 22 | * configure: Regenerate. | |
| 23 | ||
| 5558e7e6 MF |
24 | 2010-04-14 Mike Frysinger <vapier@gentoo.org> |
| 25 | ||
| 26 | * interp.c (sim_write): Add const to buffer arg. | |
| 27 | ||
| bc56c8fa JK |
28 | 2010-02-27 Jan Kratochvil <jan.kratochvil@redhat.com> |
| 29 | ||
| 30 | * interp.c (sim_create_inferior): Fix crashes on zero PROG_BFD or ARGV. | |
| 31 | ||
| 32d49b7b AG |
32 | 2010-02-03 Anthony Green <green@moxielogic.com> |
| 33 | ||
| 34 | * interp.c (sim_resume): nop is 0x0f, and 0x00 is an illegal | |
| 35 | instruction. | |
| 36 | ||
| 11db68fd AG |
37 | 2010-01-13 Anthony Green <green@moxielogic.com> |
| 38 | ||
| 39 | * interp.c (sim_open): Add period to end of sentence in comment. | |
| 40 | ||
| b8dcd182 AG |
41 | 2010-01-13 Anthony Green <green@moxielogic.com> |
| 42 | ||
| 43 | * interp.c (sim_open): Initialize the SIM_DESC object properly | |
| 44 | with sim_config() and sim_post_argv_init(). | |
| 45 | ||
| 3725885a RW |
46 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 47 | ||
| 48 | * configure: Regenerate. | |
| 49 | ||
| 5c27d164 AG |
50 | 2009-09-10 Anthony Green <green@moxielogic.com> |
| 51 | ||
| 52 | * Makefile.in (install-dtb): New target. | |
| 53 | (moxie-gdb.dtb): New target. | |
| 54 | (SIM_CFLAGS): Define DTB macro on command line. | |
| 55 | (SIM_OBJS): Use common infrastructire. | |
| 56 | (dtbdir): Define install location for dtb file. | |
| 57 | ||
| 58 | * sim-main.h: New file. | |
| 59 | * moxie-gdb.dts: New file. | |
| 60 | * configure.ac: Check for dtc. Install dtb file. Remove some old | |
| 61 | cruft. | |
| 62 | * configure: Regenerate. | |
| 63 | * interp.c: Many changes to use common memory infrastructure. | |
| 64 | (load_dtb): New function. | |
| 65 | (sim_create_inferior): Call it. | |
| 66 | ||
| d6416cdc RW |
67 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 68 | ||
| 81ecdfbb RW |
69 | * config.in: Regenerate. |
| 70 | * configure: Likewise. | |
| 71 | ||
| d6416cdc RW |
72 | * configure: Regenerate. |
| 73 | ||
| 7a321525 AG |
74 | 2009-07-31 Anthony Green <green@moxielogic.com> |
| 75 | ||
| 76 | * interp.c: Increase simulated memory to 16MB. | |
| 77 | (sim_resume): Tweak swi system calls to support new ABI (up to 5 | |
| 78 | args in regs). Also simluate proper exception processing for | |
| 79 | Linux system calls. | |
| 80 | ||
| 81 | 2009-07-30 Anthony Green <green@moxielogic.com> | |
| 82 | ||
| 83 | * interp.c (sim_resume): Add system call software interrupt support. | |
| 84 | ||
| 86566200 AG |
85 | 2009-06-11 Anthony Green <green@moxielogic.com> |
| 86 | ||
| 87 | * interp.c (INST2OFFSET): Define. | |
| 88 | (sim_resume): Support new PC relative branch instructions. | |
| 89 | ||
| 77176dfc AG |
90 | 2009-05-09 Anthony Green <green@moxielogic.com> |
| 91 | ||
| 92 | * interp.c (sim_resume): Add missing breaks in switch. | |
| 93 | ||
| fdd6fa61 AG |
94 | 2008-10-03 Anthony Green <green@moxielogic.com> |
| 95 | ||
| 96 | * interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s. | |
| 97 | ||
| 98 | 2008-09-10 Anthony Green <green@moxielogic.com> | |
| 99 | ||
| 100 | * interp.c (NUM_SPRO_SREGS): New. | |
| 101 | (struct moxie_regset): Add sregs. | |
| 102 | (set_initial_gprs): Initialize sregs. | |
| 103 | (sim_resume): Add gsr and ssr support. | |
| 104 | ||
| 105 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
| 106 | ||
| 107 | * interp.c (sim_resume): Add inc and dec instructions. | |
| 108 | ||
| 109 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
| 110 | ||
| 111 | * interp.c (struct moxie_regset): Use an unsigned long long to keep | |
| 112 | track of instruction trace counts. | |
| 113 | * interp.c (sim_resume): Ditto. | |
| 114 | (sim_info): Ditto. | |
| 115 | ||
| 116 | 2008-08-22 Anthony Green <green@moxielogic.com> | |
| 117 | ||
| 118 | * interp.c (sim_resume): Remove debugging code. | |
| 119 | ||
| 120 | 2008-08-20 Anthony Green <green@moxielogic.com> | |
| 121 | ||
| 122 | * interp.c (TRACE): Add new tracing infrastructure. | |
| 123 | (sim_resume): Use it. | |
| 124 | (reg_names): Add new registers. | |
| 125 | (NUM_MOXIE_REGS): New registers. | |
| 126 | (PC_REGNO): New registers. | |
| 127 | (sim_resume): New instruction encodings. | |
| 128 | ||
| 129 | 2008-08-16 Anthony Green <green@moxielogic.com> | |
| 130 | ||
| 131 | * interp.c (sim_resume): Add SYS_read, and fix SYS_open and SYS_write. | |
| 132 | (convert_target_flags): New function. | |
| 133 | ||
| 134 | 2008-08-08 Anthony Green <green@moxielogic.com> | |
| 135 | ||
| 136 | * interp.c (sim_resume): Add SYS_open and SYS_write system call support. | |
| 137 | ||
| 138 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
| 139 | ||
| 140 | * Makefile.in (SIM_EXTRA_LIBS): Add -lz. | |
| 141 | ||
| 142 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
| 143 | ||
| 144 | * interp.c (sim_create_inferior): Set argc & argv in the target. | |
| 145 | ||
| 146 | 2008-04-12 Anthony Green <green@moxielogic.com> | |
| 147 | ||
| 148 | * interp.c (sim_resume): Add brk. | |
| 149 | ||
| 150 | 2008-04-10 Anthony Green <green@moxielogic.com> | |
| 151 | ||
| 152 | * interp.c (sim_resume): Add static chain pointer to call frame. | |
| 153 | ||
| 154 | 2008-03-24 Anthony Green <green@moxielogic.com> | |
| 155 | ||
| 156 | * interp.c (sim_resume): Add missing breaks. | |
| 157 | (sim_resume): Fix neg implementation. | |
| 158 | ||
| 159 | 2008-03-23 Anthony Green <green@moxielogic.com> | |
| 160 | ||
| 161 | * interp.c (sim_load): Don't require a .bss section. | |
| 162 | ||
| 163 | 2008-03-21 Anthony Green <green@moxielogic.com> | |
| 164 | ||
| 165 | * interp.c (sim_resume): Add swi, and, lshr, ashl, sub.l, neg, or, | |
| 166 | not, ashr, xor. | |
| 167 | ||
| 168 | 2008-03-20 Anthony Green <green@moxielogic.com> | |
| 169 | ||
| 170 | * interp.c (struct moxie_regset): Add condition code, cc. | |
| 171 | (CC_GT, CC_LT, CC_EQ, CC_GTU, CC_LTU): Define. | |
| 172 | (sim_resume): Add jmpa, jsr, cmp, beq, bne, blt, bgt, bltu, bgtu, | |
| 173 | bge, ble, bgeu, and bleu. | |
| 174 | (rbat, rsat, wbat, wsat): New functions. | |
| 175 | (sim_resume): Add ld.b, lda.b, ldi.b, ld.s, lda.s, ldi.s, st.b, | |
| 176 | sta.b, st.s, sta.s, jmp. | |
| 177 | ||
| 178 | 2008-03-19 Anthony Green <green@moxielogic.com> | |
| 179 | ||
| 180 | * interp.c (sim_resume): Add ld.l, st.l, lda.l, sta.l. | |
| 181 | jsra should set $fp == $sp. | |
| 182 | Fix jsra and ret semantics. | |
| 183 | ||
| 184 | 2008-03-18 Anthony Green <green@moxielogic.com> | |
| 185 | ||
| 186 | * interp.c (sim_resume): Add push, pop and add.l. | |
| 187 | ||
| 188 | 2008-03-16 Anthony Green <green@moxielogic.com> | |
| 189 | ||
| 190 | * interp.c (EXTRACT_WORD): Define. | |
| 191 | (rlat): Use EXTRACT_WORD. | |
| 192 | (sim_resume): Add jsra and ret. | |
| 193 | ||
| 194 | 2008-02-22 Anthony Green <green@moxielogic.com> | |
| 195 | ||
| 196 | * interp.c (reg_names): Define. | |
| 197 | (sim_resume): Use reg_names. | |
| 198 | ||
| 199 | 2008-02-21 Anthony Green <green@moxielogic.com> | |
| 200 | ||
| 201 | * config.in, configure, configure.ac, interp.c, Makefile.in, | |
| 202 | sysdep.h: Created. |