projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 6ffe910a MF |
1 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
| 2 | ||
| 3 | * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER | |
| 4 | call. Replace common.m4 include with SIM_AC_COMMON. | |
| 5 | * configure: Regenerate. | |
| 6 | ||
| 5558e7e6 MF |
7 | 2010-04-14 Mike Frysinger <vapier@gentoo.org> |
| 8 | ||
| 9 | * interp.c (sim_write): Add const to buffer arg. | |
| 10 | ||
| bc56c8fa JK |
11 | 2010-02-27 Jan Kratochvil <jan.kratochvil@redhat.com> |
| 12 | ||
| 13 | * interp.c (sim_create_inferior): Fix crashes on zero PROG_BFD or ARGV. | |
| 14 | ||
| 32d49b7b AG |
15 | 2010-02-03 Anthony Green <green@moxielogic.com> |
| 16 | ||
| 17 | * interp.c (sim_resume): nop is 0x0f, and 0x00 is an illegal | |
| 18 | instruction. | |
| 19 | ||
| 11db68fd AG |
20 | 2010-01-13 Anthony Green <green@moxielogic.com> |
| 21 | ||
| 22 | * interp.c (sim_open): Add period to end of sentence in comment. | |
| 23 | ||
| b8dcd182 AG |
24 | 2010-01-13 Anthony Green <green@moxielogic.com> |
| 25 | ||
| 26 | * interp.c (sim_open): Initialize the SIM_DESC object properly | |
| 27 | with sim_config() and sim_post_argv_init(). | |
| 28 | ||
| 3725885a RW |
29 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 30 | ||
| 31 | * configure: Regenerate. | |
| 32 | ||
| 5c27d164 AG |
33 | 2009-09-10 Anthony Green <green@moxielogic.com> |
| 34 | ||
| 35 | * Makefile.in (install-dtb): New target. | |
| 36 | (moxie-gdb.dtb): New target. | |
| 37 | (SIM_CFLAGS): Define DTB macro on command line. | |
| 38 | (SIM_OBJS): Use common infrastructire. | |
| 39 | (dtbdir): Define install location for dtb file. | |
| 40 | ||
| 41 | * sim-main.h: New file. | |
| 42 | * moxie-gdb.dts: New file. | |
| 43 | * configure.ac: Check for dtc. Install dtb file. Remove some old | |
| 44 | cruft. | |
| 45 | * configure: Regenerate. | |
| 46 | * interp.c: Many changes to use common memory infrastructure. | |
| 47 | (load_dtb): New function. | |
| 48 | (sim_create_inferior): Call it. | |
| 49 | ||
| d6416cdc RW |
50 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 51 | ||
| 81ecdfbb RW |
52 | * config.in: Regenerate. |
| 53 | * configure: Likewise. | |
| 54 | ||
| d6416cdc RW |
55 | * configure: Regenerate. |
| 56 | ||
| 7a321525 AG |
57 | 2009-07-31 Anthony Green <green@moxielogic.com> |
| 58 | ||
| 59 | * interp.c: Increase simulated memory to 16MB. | |
| 60 | (sim_resume): Tweak swi system calls to support new ABI (up to 5 | |
| 61 | args in regs). Also simluate proper exception processing for | |
| 62 | Linux system calls. | |
| 63 | ||
| 64 | 2009-07-30 Anthony Green <green@moxielogic.com> | |
| 65 | ||
| 66 | * interp.c (sim_resume): Add system call software interrupt support. | |
| 67 | ||
| 86566200 AG |
68 | 2009-06-11 Anthony Green <green@moxielogic.com> |
| 69 | ||
| 70 | * interp.c (INST2OFFSET): Define. | |
| 71 | (sim_resume): Support new PC relative branch instructions. | |
| 72 | ||
| 77176dfc AG |
73 | 2009-05-09 Anthony Green <green@moxielogic.com> |
| 74 | ||
| 75 | * interp.c (sim_resume): Add missing breaks in switch. | |
| 76 | ||
| fdd6fa61 AG |
77 | 2008-10-03 Anthony Green <green@moxielogic.com> |
| 78 | ||
| 79 | * interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s. | |
| 80 | ||
| 81 | 2008-09-10 Anthony Green <green@moxielogic.com> | |
| 82 | ||
| 83 | * interp.c (NUM_SPRO_SREGS): New. | |
| 84 | (struct moxie_regset): Add sregs. | |
| 85 | (set_initial_gprs): Initialize sregs. | |
| 86 | (sim_resume): Add gsr and ssr support. | |
| 87 | ||
| 88 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
| 89 | ||
| 90 | * interp.c (sim_resume): Add inc and dec instructions. | |
| 91 | ||
| 92 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
| 93 | ||
| 94 | * interp.c (struct moxie_regset): Use an unsigned long long to keep | |
| 95 | track of instruction trace counts. | |
| 96 | * interp.c (sim_resume): Ditto. | |
| 97 | (sim_info): Ditto. | |
| 98 | ||
| 99 | 2008-08-22 Anthony Green <green@moxielogic.com> | |
| 100 | ||
| 101 | * interp.c (sim_resume): Remove debugging code. | |
| 102 | ||
| 103 | 2008-08-20 Anthony Green <green@moxielogic.com> | |
| 104 | ||
| 105 | * interp.c (TRACE): Add new tracing infrastructure. | |
| 106 | (sim_resume): Use it. | |
| 107 | (reg_names): Add new registers. | |
| 108 | (NUM_MOXIE_REGS): New registers. | |
| 109 | (PC_REGNO): New registers. | |
| 110 | (sim_resume): New instruction encodings. | |
| 111 | ||
| 112 | 2008-08-16 Anthony Green <green@moxielogic.com> | |
| 113 | ||
| 114 | * interp.c (sim_resume): Add SYS_read, and fix SYS_open and SYS_write. | |
| 115 | (convert_target_flags): New function. | |
| 116 | ||
| 117 | 2008-08-08 Anthony Green <green@moxielogic.com> | |
| 118 | ||
| 119 | * interp.c (sim_resume): Add SYS_open and SYS_write system call support. | |
| 120 | ||
| 121 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
| 122 | ||
| 123 | * Makefile.in (SIM_EXTRA_LIBS): Add -lz. | |
| 124 | ||
| 125 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
| 126 | ||
| 127 | * interp.c (sim_create_inferior): Set argc & argv in the target. | |
| 128 | ||
| 129 | 2008-04-12 Anthony Green <green@moxielogic.com> | |
| 130 | ||
| 131 | * interp.c (sim_resume): Add brk. | |
| 132 | ||
| 133 | 2008-04-10 Anthony Green <green@moxielogic.com> | |
| 134 | ||
| 135 | * interp.c (sim_resume): Add static chain pointer to call frame. | |
| 136 | ||
| 137 | 2008-03-24 Anthony Green <green@moxielogic.com> | |
| 138 | ||
| 139 | * interp.c (sim_resume): Add missing breaks. | |
| 140 | (sim_resume): Fix neg implementation. | |
| 141 | ||
| 142 | 2008-03-23 Anthony Green <green@moxielogic.com> | |
| 143 | ||
| 144 | * interp.c (sim_load): Don't require a .bss section. | |
| 145 | ||
| 146 | 2008-03-21 Anthony Green <green@moxielogic.com> | |
| 147 | ||
| 148 | * interp.c (sim_resume): Add swi, and, lshr, ashl, sub.l, neg, or, | |
| 149 | not, ashr, xor. | |
| 150 | ||
| 151 | 2008-03-20 Anthony Green <green@moxielogic.com> | |
| 152 | ||
| 153 | * interp.c (struct moxie_regset): Add condition code, cc. | |
| 154 | (CC_GT, CC_LT, CC_EQ, CC_GTU, CC_LTU): Define. | |
| 155 | (sim_resume): Add jmpa, jsr, cmp, beq, bne, blt, bgt, bltu, bgtu, | |
| 156 | bge, ble, bgeu, and bleu. | |
| 157 | (rbat, rsat, wbat, wsat): New functions. | |
| 158 | (sim_resume): Add ld.b, lda.b, ldi.b, ld.s, lda.s, ldi.s, st.b, | |
| 159 | sta.b, st.s, sta.s, jmp. | |
| 160 | ||
| 161 | 2008-03-19 Anthony Green <green@moxielogic.com> | |
| 162 | ||
| 163 | * interp.c (sim_resume): Add ld.l, st.l, lda.l, sta.l. | |
| 164 | jsra should set $fp == $sp. | |
| 165 | Fix jsra and ret semantics. | |
| 166 | ||
| 167 | 2008-03-18 Anthony Green <green@moxielogic.com> | |
| 168 | ||
| 169 | * interp.c (sim_resume): Add push, pop and add.l. | |
| 170 | ||
| 171 | 2008-03-16 Anthony Green <green@moxielogic.com> | |
| 172 | ||
| 173 | * interp.c (EXTRACT_WORD): Define. | |
| 174 | (rlat): Use EXTRACT_WORD. | |
| 175 | (sim_resume): Add jsra and ret. | |
| 176 | ||
| 177 | 2008-02-22 Anthony Green <green@moxielogic.com> | |
| 178 | ||
| 179 | * interp.c (reg_names): Define. | |
| 180 | (sim_resume): Use reg_names. | |
| 181 | ||
| 182 | 2008-02-21 Anthony Green <green@moxielogic.com> | |
| 183 | ||
| 184 | * config.in, configure, configure.ac, interp.c, Makefile.in, | |
| 185 | sysdep.h: Created. |