projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 88b9d363 | 1 | /* Copyright 2016-2022 Free Software Foundation, Inc. |
| ddd44b70 DD |
2 | Contributed by Dimitar Dimitrov <dimitar@dinux.eu> |
| 3 | ||
| 4 | This file is part of the PRU simulator. | |
| 5 | ||
| 6 | This library is free software; you can redistribute it and/or modify | |
| 7 | it under the terms of the GNU General Public License as published by | |
| 8 | the Free Software Foundation; either version 3 of the License, or | |
| 9 | (at your option) any later version. | |
| 10 | ||
| 11 | This program is distributed in the hope that it will be useful, | |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | GNU General Public License for more details. | |
| 15 | ||
| 16 | You should have received a copy of the GNU General Public License | |
| 17 | along with this program; if not, see <http://www.gnu.org/licenses/>. */ | |
| 18 | ||
| 19 | #ifndef PRU_H | |
| 20 | #define PRU_H | |
| 21 | ||
| ddd44b70 DD |
22 | #include "opcode/pru.h" |
| 23 | ||
| 24 | /* Needed for handling the dual PRU address space. */ | |
| 25 | #define IMEM_ADDR_MASK ((1u << 23) - 1) | |
| 26 | ||
| 27 | #define IMEM_ADDR_DEFAULT 0x20000000 | |
| 28 | ||
| 29 | /* Define memory sizes to allocate for simulated target. Sizes are | |
| 30 | artificially large to accommodate execution of compiler test suite. | |
| 31 | Please synchronize with the linker script for prusim target. */ | |
| 32 | #define DMEM_DEFAULT_SIZE (64 * 1024 * 1024) | |
| 33 | ||
| 34 | /* 16-bit word addressable space. */ | |
| 35 | #define IMEM_DEFAULT_SIZE (64 * 4 * 1024) | |
| 36 | ||
| 37 | /* For AM335x SoCs. */ | |
| 38 | #define XFRID_SCRATCH_BANK_0 10 | |
| 39 | #define XFRID_SCRATCH_BANK_1 11 | |
| 40 | #define XFRID_SCRATCH_BANK_2 12 | |
| 41 | #define XFRID_SCRATCH_BANK_PEER 14 | |
| 42 | #define XFRID_MAX 255 | |
| 43 | ||
| 44 | #define CPU (cpu->pru_cpu) | |
| 45 | ||
| 46 | #define PC (CPU.pc) | |
| 47 | #define PC_byteaddr ((PC << 2) | PC_ADDR_SPACE_MARKER) | |
| 48 | ||
| 49 | /* Various opcode fields. */ | |
| 50 | #define RS1 extract_regval (CPU.regs[GET_INSN_FIELD (RS1, inst)], \ | |
| 51 | GET_INSN_FIELD (RS1SEL, inst)) | |
| 52 | #define RS2 extract_regval (CPU.regs[GET_INSN_FIELD (RS2, inst)], \ | |
| 53 | GET_INSN_FIELD (RS2SEL, inst)) | |
| 54 | ||
| 55 | #define RS2_w0 extract_regval (CPU.regs[GET_INSN_FIELD (RS2, inst)], \ | |
| 56 | RSEL_15_0) | |
| 57 | ||
| 58 | #define XBBO_BASEREG (CPU.regs[GET_INSN_FIELD (RS1, inst)]) | |
| 59 | ||
| e57cf1f2 DD |
60 | #define RS1SEL GET_INSN_FIELD (RS1SEL, inst) |
| 61 | #define RS1_WIDTH regsel_width (RS1SEL) | |
| ddd44b70 DD |
62 | #define RDSEL GET_INSN_FIELD (RDSEL, inst) |
| 63 | #define RD_WIDTH regsel_width (RDSEL) | |
| 64 | #define RD_REGN GET_INSN_FIELD (RD, inst) | |
| 65 | #define IO GET_INSN_FIELD (IO, inst) | |
| 66 | #define IMM8 GET_INSN_FIELD (IMM8, inst) | |
| 67 | #define IMM16 GET_INSN_FIELD (IMM16, inst) | |
| 68 | #define WAKEONSTATUS GET_INSN_FIELD (WAKEONSTATUS, inst) | |
| 69 | #define CB GET_INSN_FIELD (CB, inst) | |
| 70 | #define RDB GET_INSN_FIELD (RDB, inst) | |
| 71 | #define XFR_WBA GET_INSN_FIELD (XFR_WBA, inst) | |
| 72 | #define LOOP_JMPOFFS GET_INSN_FIELD (LOOP_JMPOFFS, inst) | |
| 73 | #define BROFF ((uint32_t) GET_BROFF_SIGNED (inst)) | |
| 74 | ||
| 75 | #define _BURSTLEN_CALCULATE(BITFIELD) \ | |
| 76 | ((BITFIELD) >= LSSBBO_BYTECOUNT_R0_BITS7_0 ? \ | |
| 77 | (CPU.regs[0] >> ((BITFIELD) - LSSBBO_BYTECOUNT_R0_BITS7_0) * 8) & 0xff \ | |
| 78 | : (BITFIELD) + 1) | |
| 79 | ||
| 80 | #define BURSTLEN _BURSTLEN_CALCULATE (GET_BURSTLEN (inst)) | |
| 81 | #define XFR_LENGTH _BURSTLEN_CALCULATE (GET_INSN_FIELD (XFR_LENGTH, inst)) | |
| 82 | ||
| 83 | #define DO_XIN(wba,regn,rdb,l) \ | |
| 84 | pru_sim_xin (sd, cpu, (wba), (regn), (rdb), (l)) | |
| 85 | #define DO_XOUT(wba,regn,rdb,l) \ | |
| 86 | pru_sim_xout (sd, cpu, (wba), (regn), (rdb), (l)) | |
| 87 | #define DO_XCHG(wba,regn,rdb,l) \ | |
| 88 | pru_sim_xchg (sd, cpu, (wba), (regn), (rdb), (l)) | |
| 89 | ||
| 90 | #define RAISE_SIGILL(sd) sim_engine_halt ((sd), NULL, NULL, PC_byteaddr, \ | |
| 91 | sim_stopped, SIM_SIGILL) | |
| 92 | #define RAISE_SIGINT(sd) sim_engine_halt ((sd), NULL, NULL, PC_byteaddr, \ | |
| 93 | sim_stopped, SIM_SIGINT) | |
| 94 | ||
| 95 | #define MAC_R25_MAC_MODE_MASK (1u << 0) | |
| 96 | #define MAC_R25_ACC_CARRY_MASK (1u << 1) | |
| 97 | ||
| 98 | #define CARRY CPU.carry | |
| 99 | #define CTABLE CPU.ctable | |
| 100 | ||
| 101 | #define PC_ADDR_SPACE_MARKER CPU.pc_addr_space_marker | |
| 102 | ||
| 103 | #define LOOPTOP CPU.loop.looptop | |
| 104 | #define LOOPEND CPU.loop.loopend | |
| 105 | #define LOOP_IN_PROGRESS CPU.loop.loop_in_progress | |
| 106 | #define LOOPCNT CPU.loop.loop_counter | |
| 107 | ||
| 108 | /* 32 GP registers plus PC. */ | |
| 109 | #define NUM_REGS 33 | |
| 110 | ||
| 111 | #endif /* PRU_H */ |