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Update copyright year range in all GDB files.
[deliverable/binutils-gdb.git] / sim / sh64 / sh-desc.c
CommitLineData
cbb38b47
BE		 1/* CPU data for sh.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
b811d2c2 5Copyright 1996-2020 Free Software Foundation, Inc.
cbb38b47
BE		 6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
fda1c30b
DE		 9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
cbb38b47 13
fda1c30b
DE		 14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
cbb38b47 18
fda1c30b 19 You should have received a copy of the GNU General Public License along
51b318de 20 with this program; if not, see <http://www.gnu.org/licenses/>.
cbb38b47
BE		 21
22*/
23
24#include "sysdep.h"
cbb38b47
BE		 25#include <stdio.h>
26#include <stdarg.h>
27#include "ansidecl.h"
28#include "bfd.h"
29#include "symcat.h"
30#include "sh-desc.h"
31#include "sh-opc.h"
32#include "opintl.h"
33#include "libiberty.h"
c7e628df 34#include "xregex.h"
cbb38b47
BE		 35
36/* Attributes. */
37
38static const CGEN_ATTR_ENTRY bool_attr[] =
39{
40 { "#f", 0 },
41 { "#t", 1 },
42 { 0, 0 }
43};
44
c7e628df 45static const CGEN_ATTR_ENTRY MACH_attr[] ATTRIBUTE_UNUSED =
cbb38b47
BE		 46{
47 { "base", MACH_BASE },
48 { "sh2", MACH_SH2 },
c7e628df
DB		 49 { "sh2e", MACH_SH2E },
50 { "sh2a_fpu", MACH_SH2A_FPU },
51 { "sh2a_nofpu", MACH_SH2A_NOFPU },
cbb38b47
BE		 52 { "sh3", MACH_SH3 },
53 { "sh3e", MACH_SH3E },
c7e628df 54 { "sh4_nofpu", MACH_SH4_NOFPU },
cbb38b47 55 { "sh4", MACH_SH4 },
c7e628df
DB		 56 { "sh4a_nofpu", MACH_SH4A_NOFPU },
57 { "sh4a", MACH_SH4A },
58 { "sh4al", MACH_SH4AL },
cbb38b47
BE		 59 { "sh5", MACH_SH5 },
60 { "max", MACH_MAX },
61 { 0, 0 }
62};
63
c7e628df 64static const CGEN_ATTR_ENTRY ISA_attr[] ATTRIBUTE_UNUSED =
cbb38b47
BE		 65{
66 { "compact", ISA_COMPACT },
67 { "media", ISA_MEDIA },
68 { "max", ISA_MAX },
69 { 0, 0 }
70};
71
c7e628df
DB		 72static const CGEN_ATTR_ENTRY SH4_GROUP_attr[] ATTRIBUTE_UNUSED =
73{
74 { "NONE", SH4_GROUP_NONE },
75 { "MT", SH4_GROUP_MT },
76 { "EX", SH4_GROUP_EX },
77 { "BR", SH4_GROUP_BR },
78 { "LS", SH4_GROUP_LS },
79 { "FE", SH4_GROUP_FE },
80 { "CO", SH4_GROUP_CO },
81 { "MAX", SH4_GROUP_MAX },
82 { 0, 0 }
83};
84
85static const CGEN_ATTR_ENTRY SH4A_GROUP_attr[] ATTRIBUTE_UNUSED =
86{
87 { "NONE", SH4A_GROUP_NONE },
88 { "MT", SH4A_GROUP_MT },
89 { "EX", SH4A_GROUP_EX },
90 { "BR", SH4A_GROUP_BR },
91 { "LS", SH4A_GROUP_LS },
92 { "FE", SH4A_GROUP_FE },
93 { "CO", SH4A_GROUP_CO },
94 { "MAX", SH4A_GROUP_MAX },
95 { 0, 0 }
96};
97
cbb38b47
BE		 98const CGEN_ATTR_TABLE sh_cgen_ifield_attr_table[] =
99{
100 { "MACH", & MACH_attr[0], & MACH_attr[0] },
101 { "ISA", & ISA_attr[0], & ISA_attr[0] },
102 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
103 { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
104 { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
105 { "RESERVED", &bool_attr[0], &bool_attr[0] },
106 { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
107 { "SIGNED", &bool_attr[0], &bool_attr[0] },
108 { 0, 0, 0 }
109};
110
111const CGEN_ATTR_TABLE sh_cgen_hardware_attr_table[] =
112{
113 { "MACH", & MACH_attr[0], & MACH_attr[0] },
c7e628df 114 { "ISA", & ISA_attr[0], & ISA_attr[0] },
cbb38b47
BE		 115 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
116 { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
117 { "PC", &bool_attr[0], &bool_attr[0] },
118 { "PROFILE", &bool_attr[0], &bool_attr[0] },
119 { 0, 0, 0 }
120};
121
122const CGEN_ATTR_TABLE sh_cgen_operand_attr_table[] =
123{
124 { "MACH", & MACH_attr[0], & MACH_attr[0] },
125 { "ISA", & ISA_attr[0], & ISA_attr[0] },
126 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
127 { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
128 { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
129 { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
130 { "SIGNED", &bool_attr[0], &bool_attr[0] },
131 { "NEGATIVE", &bool_attr[0], &bool_attr[0] },
132 { "RELAX", &bool_attr[0], &bool_attr[0] },
133 { "SEM-ONLY", &bool_attr[0], &bool_attr[0] },
134 { 0, 0, 0 }
135};
136
137const CGEN_ATTR_TABLE sh_cgen_insn_attr_table[] =
138{
139 { "MACH", & MACH_attr[0], & MACH_attr[0] },
140 { "ISA", & ISA_attr[0], & ISA_attr[0] },
c7e628df
DB		 141 { "SH4-GROUP", & SH4_GROUP_attr[0], & SH4_GROUP_attr[0] },
142 { "SH4A-GROUP", & SH4A_GROUP_attr[0], & SH4A_GROUP_attr[0] },
cbb38b47
BE		 143 { "ALIAS", &bool_attr[0], &bool_attr[0] },
144 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
145 { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
146 { "COND-CTI", &bool_attr[0], &bool_attr[0] },
147 { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
148 { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
149 { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
c7e628df 150 { "RELAXED", &bool_attr[0], &bool_attr[0] },
cbb38b47
BE		 151 { "NO-DIS", &bool_attr[0], &bool_attr[0] },
152 { "PBB", &bool_attr[0], &bool_attr[0] },
153 { "ILLSLOT", &bool_attr[0], &bool_attr[0] },
154 { "FP-INSN", &bool_attr[0], &bool_attr[0] },
c7e628df 155 { "32-BIT-INSN", &bool_attr[0], &bool_attr[0] },
cbb38b47
BE		 156 { 0, 0, 0 }
157};
158
159/* Instruction set variants. */
160
161static const CGEN_ISA sh_cgen_isa_table[] = {
162 { "media", 32, 32, 32, 32 },
c7e628df 163 { "compact", 32, 32, 16, 32 },
cbb38b47
BE		 164 { 0, 0, 0, 0, 0 }
165};
166
167/* Machine variants. */
168
169static const CGEN_MACH sh_cgen_mach_table[] = {
c7e628df
DB		 170 { "sh2", "sh2", MACH_SH2, 0 },
171 { "sh2e", "sh2e", MACH_SH2E, 0 },
172 { "sh2a-fpu", "sh2a-fpu", MACH_SH2A_FPU, 0 },
173 { "sh2a-nofpu", "sh2a-nofpu", MACH_SH2A_NOFPU, 0 },
174 { "sh3", "sh3", MACH_SH3, 0 },
175 { "sh3e", "sh3e", MACH_SH3E, 0 },
176 { "sh4-nofpu", "sh4-nofpu", MACH_SH4_NOFPU, 0 },
177 { "sh4", "sh4", MACH_SH4, 0 },
178 { "sh4a-nofpu", "sh4a-nofpu", MACH_SH4A_NOFPU, 0 },
179 { "sh4a", "sh4a", MACH_SH4A, 0 },
180 { "sh4al", "sh4al", MACH_SH4AL, 0 },
181 { "sh5", "sh5", MACH_SH5, 0 },
182 { 0, 0, 0, 0 }
cbb38b47
BE		 183};
184
185static CGEN_KEYWORD_ENTRY sh_cgen_opval_frc_names_entries[] =
186{
c7e628df
DB		 187 { "fr0", 0, {0, {{{0, 0}}}}, 0, 0 },
188 { "fr1", 1, {0, {{{0, 0}}}}, 0, 0 },
189 { "fr2", 2, {0, {{{0, 0}}}}, 0, 0 },
190 { "fr3", 3, {0, {{{0, 0}}}}, 0, 0 },
191 { "fr4", 4, {0, {{{0, 0}}}}, 0, 0 },
192 { "fr5", 5, {0, {{{0, 0}}}}, 0, 0 },
193 { "fr6", 6, {0, {{{0, 0}}}}, 0, 0 },
194 { "fr7", 7, {0, {{{0, 0}}}}, 0, 0 },
195 { "fr8", 8, {0, {{{0, 0}}}}, 0, 0 },
196 { "fr9", 9, {0, {{{0, 0}}}}, 0, 0 },
197 { "fr10", 10, {0, {{{0, 0}}}}, 0, 0 },
198 { "fr11", 11, {0, {{{0, 0}}}}, 0, 0 },
199 { "fr12", 12, {0, {{{0, 0}}}}, 0, 0 },
200 { "fr13", 13, {0, {{{0, 0}}}}, 0, 0 },
201 { "fr14", 14, {0, {{{0, 0}}}}, 0, 0 },
202 { "fr15", 15, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 203};
204
205CGEN_KEYWORD sh_cgen_opval_frc_names =
206{
207 & sh_cgen_opval_frc_names_entries[0],
208 16,
c7e628df 209 0, 0, 0, 0, ""
cbb38b47
BE		 210};
211
212static CGEN_KEYWORD_ENTRY sh_cgen_opval_drc_names_entries[] =
213{
c7e628df
DB		 214 { "dr0", 0, {0, {{{0, 0}}}}, 0, 0 },
215 { "dr2", 2, {0, {{{0, 0}}}}, 0, 0 },
216 { "dr4", 4, {0, {{{0, 0}}}}, 0, 0 },
217 { "dr6", 6, {0, {{{0, 0}}}}, 0, 0 },
218 { "dr8", 8, {0, {{{0, 0}}}}, 0, 0 },
219 { "dr10", 10, {0, {{{0, 0}}}}, 0, 0 },
220 { "dr12", 12, {0, {{{0, 0}}}}, 0, 0 },
221 { "dr14", 14, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 222};
223
224CGEN_KEYWORD sh_cgen_opval_drc_names =
225{
226 & sh_cgen_opval_drc_names_entries[0],
227 8,
c7e628df 228 0, 0, 0, 0, ""
cbb38b47
BE		 229};
230
231static CGEN_KEYWORD_ENTRY sh_cgen_opval_xf_names_entries[] =
232{
c7e628df
DB		 233 { "xf0", 0, {0, {{{0, 0}}}}, 0, 0 },
234 { "xf1", 1, {0, {{{0, 0}}}}, 0, 0 },
235 { "xf2", 2, {0, {{{0, 0}}}}, 0, 0 },
236 { "xf3", 3, {0, {{{0, 0}}}}, 0, 0 },
237 { "xf4", 4, {0, {{{0, 0}}}}, 0, 0 },
238 { "xf5", 5, {0, {{{0, 0}}}}, 0, 0 },
239 { "xf6", 6, {0, {{{0, 0}}}}, 0, 0 },
240 { "xf7", 7, {0, {{{0, 0}}}}, 0, 0 },
241 { "xf8", 8, {0, {{{0, 0}}}}, 0, 0 },
242 { "xf9", 9, {0, {{{0, 0}}}}, 0, 0 },
243 { "xf10", 10, {0, {{{0, 0}}}}, 0, 0 },
244 { "xf11", 11, {0, {{{0, 0}}}}, 0, 0 },
245 { "xf12", 12, {0, {{{0, 0}}}}, 0, 0 },
246 { "xf13", 13, {0, {{{0, 0}}}}, 0, 0 },
247 { "xf14", 14, {0, {{{0, 0}}}}, 0, 0 },
248 { "xf15", 15, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 249};
250
251CGEN_KEYWORD sh_cgen_opval_xf_names =
252{
253 & sh_cgen_opval_xf_names_entries[0],
254 16,
c7e628df 255 0, 0, 0, 0, ""
cbb38b47
BE		 256};
257
258static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_gr_entries[] =
259{
c7e628df
DB		 260 { "r0", 0, {0, {{{0, 0}}}}, 0, 0 },
261 { "r1", 1, {0, {{{0, 0}}}}, 0, 0 },
262 { "r2", 2, {0, {{{0, 0}}}}, 0, 0 },
263 { "r3", 3, {0, {{{0, 0}}}}, 0, 0 },
264 { "r4", 4, {0, {{{0, 0}}}}, 0, 0 },
265 { "r5", 5, {0, {{{0, 0}}}}, 0, 0 },
266 { "r6", 6, {0, {{{0, 0}}}}, 0, 0 },
267 { "r7", 7, {0, {{{0, 0}}}}, 0, 0 },
268 { "r8", 8, {0, {{{0, 0}}}}, 0, 0 },
269 { "r9", 9, {0, {{{0, 0}}}}, 0, 0 },
270 { "r10", 10, {0, {{{0, 0}}}}, 0, 0 },
271 { "r11", 11, {0, {{{0, 0}}}}, 0, 0 },
272 { "r12", 12, {0, {{{0, 0}}}}, 0, 0 },
273 { "r13", 13, {0, {{{0, 0}}}}, 0, 0 },
274 { "r14", 14, {0, {{{0, 0}}}}, 0, 0 },
275 { "r15", 15, {0, {{{0, 0}}}}, 0, 0 },
276 { "r16", 16, {0, {{{0, 0}}}}, 0, 0 },
277 { "r17", 17, {0, {{{0, 0}}}}, 0, 0 },
278 { "r18", 18, {0, {{{0, 0}}}}, 0, 0 },
279 { "r19", 19, {0, {{{0, 0}}}}, 0, 0 },
280 { "r20", 20, {0, {{{0, 0}}}}, 0, 0 },
281 { "r21", 21, {0, {{{0, 0}}}}, 0, 0 },
282 { "r22", 22, {0, {{{0, 0}}}}, 0, 0 },
283 { "r23", 23, {0, {{{0, 0}}}}, 0, 0 },
284 { "r24", 24, {0, {{{0, 0}}}}, 0, 0 },
285 { "r25", 25, {0, {{{0, 0}}}}, 0, 0 },
286 { "r26", 26, {0, {{{0, 0}}}}, 0, 0 },
287 { "r27", 27, {0, {{{0, 0}}}}, 0, 0 },
288 { "r28", 28, {0, {{{0, 0}}}}, 0, 0 },
289 { "r29", 29, {0, {{{0, 0}}}}, 0, 0 },
290 { "r30", 30, {0, {{{0, 0}}}}, 0, 0 },
291 { "r31", 31, {0, {{{0, 0}}}}, 0, 0 },
292 { "r32", 32, {0, {{{0, 0}}}}, 0, 0 },
293 { "r33", 33, {0, {{{0, 0}}}}, 0, 0 },
294 { "r34", 34, {0, {{{0, 0}}}}, 0, 0 },
295 { "r35", 35, {0, {{{0, 0}}}}, 0, 0 },
296 { "r36", 36, {0, {{{0, 0}}}}, 0, 0 },
297 { "r37", 37, {0, {{{0, 0}}}}, 0, 0 },
298 { "r38", 38, {0, {{{0, 0}}}}, 0, 0 },
299 { "r39", 39, {0, {{{0, 0}}}}, 0, 0 },
300 { "r40", 40, {0, {{{0, 0}}}}, 0, 0 },
301 { "r41", 41, {0, {{{0, 0}}}}, 0, 0 },
302 { "r42", 42, {0, {{{0, 0}}}}, 0, 0 },
303 { "r43", 43, {0, {{{0, 0}}}}, 0, 0 },
304 { "r44", 44, {0, {{{0, 0}}}}, 0, 0 },
305 { "r45", 45, {0, {{{0, 0}}}}, 0, 0 },
306 { "r46", 46, {0, {{{0, 0}}}}, 0, 0 },
307 { "r47", 47, {0, {{{0, 0}}}}, 0, 0 },
308 { "r48", 48, {0, {{{0, 0}}}}, 0, 0 },
309 { "r49", 49, {0, {{{0, 0}}}}, 0, 0 },
310 { "r50", 50, {0, {{{0, 0}}}}, 0, 0 },
311 { "r51", 51, {0, {{{0, 0}}}}, 0, 0 },
312 { "r52", 52, {0, {{{0, 0}}}}, 0, 0 },
313 { "r53", 53, {0, {{{0, 0}}}}, 0, 0 },
314 { "r54", 54, {0, {{{0, 0}}}}, 0, 0 },
315 { "r55", 55, {0, {{{0, 0}}}}, 0, 0 },
316 { "r56", 56, {0, {{{0, 0}}}}, 0, 0 },
317 { "r57", 57, {0, {{{0, 0}}}}, 0, 0 },
318 { "r58", 58, {0, {{{0, 0}}}}, 0, 0 },
319 { "r59", 59, {0, {{{0, 0}}}}, 0, 0 },
320 { "r60", 60, {0, {{{0, 0}}}}, 0, 0 },
321 { "r61", 61, {0, {{{0, 0}}}}, 0, 0 },
322 { "r62", 62, {0, {{{0, 0}}}}, 0, 0 },
323 { "r63", 63, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 324};
325
326CGEN_KEYWORD sh_cgen_opval_h_gr =
327{
328 & sh_cgen_opval_h_gr_entries[0],
329 64,
c7e628df 330 0, 0, 0, 0, ""
cbb38b47
BE		 331};
332
333static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_grc_entries[] =
334{
c7e628df
DB		 335 { "r0", 0, {0, {{{0, 0}}}}, 0, 0 },
336 { "r1", 1, {0, {{{0, 0}}}}, 0, 0 },
337 { "r2", 2, {0, {{{0, 0}}}}, 0, 0 },
338 { "r3", 3, {0, {{{0, 0}}}}, 0, 0 },
339 { "r4", 4, {0, {{{0, 0}}}}, 0, 0 },
340 { "r5", 5, {0, {{{0, 0}}}}, 0, 0 },
341 { "r6", 6, {0, {{{0, 0}}}}, 0, 0 },
342 { "r7", 7, {0, {{{0, 0}}}}, 0, 0 },
343 { "r8", 8, {0, {{{0, 0}}}}, 0, 0 },
344 { "r9", 9, {0, {{{0, 0}}}}, 0, 0 },
345 { "r10", 10, {0, {{{0, 0}}}}, 0, 0 },
346 { "r11", 11, {0, {{{0, 0}}}}, 0, 0 },
347 { "r12", 12, {0, {{{0, 0}}}}, 0, 0 },
348 { "r13", 13, {0, {{{0, 0}}}}, 0, 0 },
349 { "r14", 14, {0, {{{0, 0}}}}, 0, 0 },
350 { "r15", 15, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 351};
352
353CGEN_KEYWORD sh_cgen_opval_h_grc =
354{
355 & sh_cgen_opval_h_grc_entries[0],
356 16,
c7e628df 357 0, 0, 0, 0, ""
cbb38b47
BE		 358};
359
360static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_cr_entries[] =
361{
c7e628df
DB		 362 { "cr0", 0, {0, {{{0, 0}}}}, 0, 0 },
363 { "cr1", 1, {0, {{{0, 0}}}}, 0, 0 },
364 { "cr2", 2, {0, {{{0, 0}}}}, 0, 0 },
365 { "cr3", 3, {0, {{{0, 0}}}}, 0, 0 },
366 { "cr4", 4, {0, {{{0, 0}}}}, 0, 0 },
367 { "cr5", 5, {0, {{{0, 0}}}}, 0, 0 },
368 { "cr6", 6, {0, {{{0, 0}}}}, 0, 0 },
369 { "cr7", 7, {0, {{{0, 0}}}}, 0, 0 },
370 { "cr8", 8, {0, {{{0, 0}}}}, 0, 0 },
371 { "cr9", 9, {0, {{{0, 0}}}}, 0, 0 },
372 { "cr10", 10, {0, {{{0, 0}}}}, 0, 0 },
373 { "cr11", 11, {0, {{{0, 0}}}}, 0, 0 },
374 { "cr12", 12, {0, {{{0, 0}}}}, 0, 0 },
375 { "cr13", 13, {0, {{{0, 0}}}}, 0, 0 },
376 { "cr14", 14, {0, {{{0, 0}}}}, 0, 0 },
377 { "cr15", 15, {0, {{{0, 0}}}}, 0, 0 },
378 { "cr16", 16, {0, {{{0, 0}}}}, 0, 0 },
379 { "cr17", 17, {0, {{{0, 0}}}}, 0, 0 },
380 { "cr18", 18, {0, {{{0, 0}}}}, 0, 0 },
381 { "cr19", 19, {0, {{{0, 0}}}}, 0, 0 },
382 { "cr20", 20, {0, {{{0, 0}}}}, 0, 0 },
383 { "cr21", 21, {0, {{{0, 0}}}}, 0, 0 },
384 { "cr22", 22, {0, {{{0, 0}}}}, 0, 0 },
385 { "cr23", 23, {0, {{{0, 0}}}}, 0, 0 },
386 { "cr24", 24, {0, {{{0, 0}}}}, 0, 0 },
387 { "cr25", 25, {0, {{{0, 0}}}}, 0, 0 },
388 { "cr26", 26, {0, {{{0, 0}}}}, 0, 0 },
389 { "cr27", 27, {0, {{{0, 0}}}}, 0, 0 },
390 { "cr28", 28, {0, {{{0, 0}}}}, 0, 0 },
391 { "cr29", 29, {0, {{{0, 0}}}}, 0, 0 },
392 { "cr30", 30, {0, {{{0, 0}}}}, 0, 0 },
393 { "cr31", 31, {0, {{{0, 0}}}}, 0, 0 },
394 { "cr32", 32, {0, {{{0, 0}}}}, 0, 0 },
395 { "cr33", 33, {0, {{{0, 0}}}}, 0, 0 },
396 { "cr34", 34, {0, {{{0, 0}}}}, 0, 0 },
397 { "cr35", 35, {0, {{{0, 0}}}}, 0, 0 },
398 { "cr36", 36, {0, {{{0, 0}}}}, 0, 0 },
399 { "cr37", 37, {0, {{{0, 0}}}}, 0, 0 },
400 { "cr38", 38, {0, {{{0, 0}}}}, 0, 0 },
401 { "cr39", 39, {0, {{{0, 0}}}}, 0, 0 },
402 { "cr40", 40, {0, {{{0, 0}}}}, 0, 0 },
403 { "cr41", 41, {0, {{{0, 0}}}}, 0, 0 },
404 { "cr42", 42, {0, {{{0, 0}}}}, 0, 0 },
405 { "cr43", 43, {0, {{{0, 0}}}}, 0, 0 },
406 { "cr44", 44, {0, {{{0, 0}}}}, 0, 0 },
407 { "cr45", 45, {0, {{{0, 0}}}}, 0, 0 },
408 { "cr46", 46, {0, {{{0, 0}}}}, 0, 0 },
409 { "cr47", 47, {0, {{{0, 0}}}}, 0, 0 },
410 { "cr48", 48, {0, {{{0, 0}}}}, 0, 0 },
411 { "cr49", 49, {0, {{{0, 0}}}}, 0, 0 },
412 { "cr50", 50, {0, {{{0, 0}}}}, 0, 0 },
413 { "cr51", 51, {0, {{{0, 0}}}}, 0, 0 },
414 { "cr52", 52, {0, {{{0, 0}}}}, 0, 0 },
415 { "cr53", 53, {0, {{{0, 0}}}}, 0, 0 },
416 { "cr54", 54, {0, {{{0, 0}}}}, 0, 0 },
417 { "cr55", 55, {0, {{{0, 0}}}}, 0, 0 },
418 { "cr56", 56, {0, {{{0, 0}}}}, 0, 0 },
419 { "cr57", 57, {0, {{{0, 0}}}}, 0, 0 },
420 { "cr58", 58, {0, {{{0, 0}}}}, 0, 0 },
421 { "cr59", 59, {0, {{{0, 0}}}}, 0, 0 },
422 { "cr60", 60, {0, {{{0, 0}}}}, 0, 0 },
423 { "cr61", 61, {0, {{{0, 0}}}}, 0, 0 },
424 { "cr62", 62, {0, {{{0, 0}}}}, 0, 0 },
425 { "cr63", 63, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 426};
427
428CGEN_KEYWORD sh_cgen_opval_h_cr =
429{
430 & sh_cgen_opval_h_cr_entries[0],
431 64,
c7e628df 432 0, 0, 0, 0, ""
cbb38b47
BE		 433};
434
435static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fr_entries[] =
436{
c7e628df
DB		 437 { "fr0", 0, {0, {{{0, 0}}}}, 0, 0 },
438 { "fr1", 1, {0, {{{0, 0}}}}, 0, 0 },
439 { "fr2", 2, {0, {{{0, 0}}}}, 0, 0 },
440 { "fr3", 3, {0, {{{0, 0}}}}, 0, 0 },
441 { "fr4", 4, {0, {{{0, 0}}}}, 0, 0 },
442 { "fr5", 5, {0, {{{0, 0}}}}, 0, 0 },
443 { "fr6", 6, {0, {{{0, 0}}}}, 0, 0 },
444 { "fr7", 7, {0, {{{0, 0}}}}, 0, 0 },
445 { "fr8", 8, {0, {{{0, 0}}}}, 0, 0 },
446 { "fr9", 9, {0, {{{0, 0}}}}, 0, 0 },
447 { "fr10", 10, {0, {{{0, 0}}}}, 0, 0 },
448 { "fr11", 11, {0, {{{0, 0}}}}, 0, 0 },
449 { "fr12", 12, {0, {{{0, 0}}}}, 0, 0 },
450 { "fr13", 13, {0, {{{0, 0}}}}, 0, 0 },
451 { "fr14", 14, {0, {{{0, 0}}}}, 0, 0 },
452 { "fr15", 15, {0, {{{0, 0}}}}, 0, 0 },
453 { "fr16", 16, {0, {{{0, 0}}}}, 0, 0 },
454 { "fr17", 17, {0, {{{0, 0}}}}, 0, 0 },
455 { "fr18", 18, {0, {{{0, 0}}}}, 0, 0 },
456 { "fr19", 19, {0, {{{0, 0}}}}, 0, 0 },
457 { "fr20", 20, {0, {{{0, 0}}}}, 0, 0 },
458 { "fr21", 21, {0, {{{0, 0}}}}, 0, 0 },
459 { "fr22", 22, {0, {{{0, 0}}}}, 0, 0 },
460 { "fr23", 23, {0, {{{0, 0}}}}, 0, 0 },
461 { "fr24", 24, {0, {{{0, 0}}}}, 0, 0 },
462 { "fr25", 25, {0, {{{0, 0}}}}, 0, 0 },
463 { "fr26", 26, {0, {{{0, 0}}}}, 0, 0 },
464 { "fr27", 27, {0, {{{0, 0}}}}, 0, 0 },
465 { "fr28", 28, {0, {{{0, 0}}}}, 0, 0 },
466 { "fr29", 29, {0, {{{0, 0}}}}, 0, 0 },
467 { "fr30", 30, {0, {{{0, 0}}}}, 0, 0 },
468 { "fr31", 31, {0, {{{0, 0}}}}, 0, 0 },
469 { "fr32", 32, {0, {{{0, 0}}}}, 0, 0 },
470 { "fr33", 33, {0, {{{0, 0}}}}, 0, 0 },
471 { "fr34", 34, {0, {{{0, 0}}}}, 0, 0 },
472 { "fr35", 35, {0, {{{0, 0}}}}, 0, 0 },
473 { "fr36", 36, {0, {{{0, 0}}}}, 0, 0 },
474 { "fr37", 37, {0, {{{0, 0}}}}, 0, 0 },
475 { "fr38", 38, {0, {{{0, 0}}}}, 0, 0 },
476 { "fr39", 39, {0, {{{0, 0}}}}, 0, 0 },
477 { "fr40", 40, {0, {{{0, 0}}}}, 0, 0 },
478 { "fr41", 41, {0, {{{0, 0}}}}, 0, 0 },
479 { "fr42", 42, {0, {{{0, 0}}}}, 0, 0 },
480 { "fr43", 43, {0, {{{0, 0}}}}, 0, 0 },
481 { "fr44", 44, {0, {{{0, 0}}}}, 0, 0 },
482 { "fr45", 45, {0, {{{0, 0}}}}, 0, 0 },
483 { "fr46", 46, {0, {{{0, 0}}}}, 0, 0 },
484 { "fr47", 47, {0, {{{0, 0}}}}, 0, 0 },
485 { "fr48", 48, {0, {{{0, 0}}}}, 0, 0 },
486 { "fr49", 49, {0, {{{0, 0}}}}, 0, 0 },
487 { "fr50", 50, {0, {{{0, 0}}}}, 0, 0 },
488 { "fr51", 51, {0, {{{0, 0}}}}, 0, 0 },
489 { "fr52", 52, {0, {{{0, 0}}}}, 0, 0 },
490 { "fr53", 53, {0, {{{0, 0}}}}, 0, 0 },
491 { "fr54", 54, {0, {{{0, 0}}}}, 0, 0 },
492 { "fr55", 55, {0, {{{0, 0}}}}, 0, 0 },
493 { "fr56", 56, {0, {{{0, 0}}}}, 0, 0 },
494 { "fr57", 57, {0, {{{0, 0}}}}, 0, 0 },
495 { "fr58", 58, {0, {{{0, 0}}}}, 0, 0 },
496 { "fr59", 59, {0, {{{0, 0}}}}, 0, 0 },
497 { "fr60", 60, {0, {{{0, 0}}}}, 0, 0 },
498 { "fr61", 61, {0, {{{0, 0}}}}, 0, 0 },
499 { "fr62", 62, {0, {{{0, 0}}}}, 0, 0 },
500 { "fr63", 63, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 501};
502
503CGEN_KEYWORD sh_cgen_opval_h_fr =
504{
505 & sh_cgen_opval_h_fr_entries[0],
506 64,
c7e628df 507 0, 0, 0, 0, ""
cbb38b47
BE		 508};
509
510static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fp_entries[] =
511{
c7e628df
DB		 512 { "fp0", 0, {0, {{{0, 0}}}}, 0, 0 },
513 { "fp2", 2, {0, {{{0, 0}}}}, 0, 0 },
514 { "fp4", 4, {0, {{{0, 0}}}}, 0, 0 },
515 { "fp6", 6, {0, {{{0, 0}}}}, 0, 0 },
516 { "fp8", 8, {0, {{{0, 0}}}}, 0, 0 },
517 { "fp10", 10, {0, {{{0, 0}}}}, 0, 0 },
518 { "fp12", 12, {0, {{{0, 0}}}}, 0, 0 },
519 { "fp14", 14, {0, {{{0, 0}}}}, 0, 0 },
520 { "fp16", 16, {0, {{{0, 0}}}}, 0, 0 },
521 { "fp18", 18, {0, {{{0, 0}}}}, 0, 0 },
522 { "fp20", 20, {0, {{{0, 0}}}}, 0, 0 },
523 { "fp22", 22, {0, {{{0, 0}}}}, 0, 0 },
524 { "fp24", 24, {0, {{{0, 0}}}}, 0, 0 },
525 { "fp26", 26, {0, {{{0, 0}}}}, 0, 0 },
526 { "fp28", 28, {0, {{{0, 0}}}}, 0, 0 },
527 { "fp30", 30, {0, {{{0, 0}}}}, 0, 0 },
528 { "fp32", 32, {0, {{{0, 0}}}}, 0, 0 },
529 { "fp34", 34, {0, {{{0, 0}}}}, 0, 0 },
530 { "fp36", 36, {0, {{{0, 0}}}}, 0, 0 },
531 { "fp38", 38, {0, {{{0, 0}}}}, 0, 0 },
532 { "fp40", 40, {0, {{{0, 0}}}}, 0, 0 },
533 { "fp42", 42, {0, {{{0, 0}}}}, 0, 0 },
534 { "fp44", 44, {0, {{{0, 0}}}}, 0, 0 },
535 { "fp46", 46, {0, {{{0, 0}}}}, 0, 0 },
536 { "fp48", 48, {0, {{{0, 0}}}}, 0, 0 },
537 { "fp50", 50, {0, {{{0, 0}}}}, 0, 0 },
538 { "fp52", 52, {0, {{{0, 0}}}}, 0, 0 },
539 { "fp54", 54, {0, {{{0, 0}}}}, 0, 0 },
540 { "fp56", 56, {0, {{{0, 0}}}}, 0, 0 },
541 { "fp58", 58, {0, {{{0, 0}}}}, 0, 0 },
542 { "fp60", 60, {0, {{{0, 0}}}}, 0, 0 },
543 { "fp62", 62, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 544};
545
546CGEN_KEYWORD sh_cgen_opval_h_fp =
547{
548 & sh_cgen_opval_h_fp_entries[0],
549 32,
c7e628df 550 0, 0, 0, 0, ""
cbb38b47
BE		 551};
552
553static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fv_entries[] =
554{
c7e628df
DB		 555 { "fv0", 0, {0, {{{0, 0}}}}, 0, 0 },
556 { "fv4", 4, {0, {{{0, 0}}}}, 0, 0 },
557 { "fv8", 8, {0, {{{0, 0}}}}, 0, 0 },
558 { "fv12", 12, {0, {{{0, 0}}}}, 0, 0 },
559 { "fv16", 16, {0, {{{0, 0}}}}, 0, 0 },
560 { "fv20", 20, {0, {{{0, 0}}}}, 0, 0 },
561 { "fv24", 24, {0, {{{0, 0}}}}, 0, 0 },
562 { "fv28", 28, {0, {{{0, 0}}}}, 0, 0 },
563 { "fv32", 32, {0, {{{0, 0}}}}, 0, 0 },
564 { "fv36", 36, {0, {{{0, 0}}}}, 0, 0 },
565 { "fv40", 40, {0, {{{0, 0}}}}, 0, 0 },
566 { "fv44", 44, {0, {{{0, 0}}}}, 0, 0 },
567 { "fv48", 48, {0, {{{0, 0}}}}, 0, 0 },
568 { "fv52", 52, {0, {{{0, 0}}}}, 0, 0 },
569 { "fv56", 56, {0, {{{0, 0}}}}, 0, 0 },
570 { "fv60", 60, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 571};
572
573CGEN_KEYWORD sh_cgen_opval_h_fv =
574{
575 & sh_cgen_opval_h_fv_entries[0],
576 16,
c7e628df 577 0, 0, 0, 0, ""
cbb38b47
BE		 578};
579
580static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fmtx_entries[] =
581{
c7e628df
DB		 582 { "mtrx0", 0, {0, {{{0, 0}}}}, 0, 0 },
583 { "mtrx16", 16, {0, {{{0, 0}}}}, 0, 0 },
584 { "mtrx32", 32, {0, {{{0, 0}}}}, 0, 0 },
585 { "mtrx48", 48, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 586};
587
588CGEN_KEYWORD sh_cgen_opval_h_fmtx =
589{
590 & sh_cgen_opval_h_fmtx_entries[0],
591 4,
c7e628df 592 0, 0, 0, 0, ""
cbb38b47
BE		 593};
594
595static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_dr_entries[] =
596{
c7e628df
DB		 597 { "dr0", 0, {0, {{{0, 0}}}}, 0, 0 },
598 { "dr2", 2, {0, {{{0, 0}}}}, 0, 0 },
599 { "dr4", 4, {0, {{{0, 0}}}}, 0, 0 },
600 { "dr6", 6, {0, {{{0, 0}}}}, 0, 0 },
601 { "dr8", 8, {0, {{{0, 0}}}}, 0, 0 },
602 { "dr10", 10, {0, {{{0, 0}}}}, 0, 0 },
603 { "dr12", 12, {0, {{{0, 0}}}}, 0, 0 },
604 { "dr14", 14, {0, {{{0, 0}}}}, 0, 0 },
605 { "dr16", 16, {0, {{{0, 0}}}}, 0, 0 },
606 { "dr18", 18, {0, {{{0, 0}}}}, 0, 0 },
607 { "dr20", 20, {0, {{{0, 0}}}}, 0, 0 },
608 { "dr22", 22, {0, {{{0, 0}}}}, 0, 0 },
609 { "dr24", 24, {0, {{{0, 0}}}}, 0, 0 },
610 { "dr26", 26, {0, {{{0, 0}}}}, 0, 0 },
611 { "dr28", 28, {0, {{{0, 0}}}}, 0, 0 },
612 { "dr30", 30, {0, {{{0, 0}}}}, 0, 0 },
613 { "dr32", 32, {0, {{{0, 0}}}}, 0, 0 },
614 { "dr34", 34, {0, {{{0, 0}}}}, 0, 0 },
615 { "dr36", 36, {0, {{{0, 0}}}}, 0, 0 },
616 { "dr38", 38, {0, {{{0, 0}}}}, 0, 0 },
617 { "dr40", 40, {0, {{{0, 0}}}}, 0, 0 },
618 { "dr42", 42, {0, {{{0, 0}}}}, 0, 0 },
619 { "dr44", 44, {0, {{{0, 0}}}}, 0, 0 },
620 { "dr46", 46, {0, {{{0, 0}}}}, 0, 0 },
621 { "dr48", 48, {0, {{{0, 0}}}}, 0, 0 },
622 { "dr50", 50, {0, {{{0, 0}}}}, 0, 0 },
623 { "dr52", 52, {0, {{{0, 0}}}}, 0, 0 },
624 { "dr54", 54, {0, {{{0, 0}}}}, 0, 0 },
625 { "dr56", 56, {0, {{{0, 0}}}}, 0, 0 },
626 { "dr58", 58, {0, {{{0, 0}}}}, 0, 0 },
627 { "dr60", 60, {0, {{{0, 0}}}}, 0, 0 },
628 { "dr62", 62, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 629};
630
631CGEN_KEYWORD sh_cgen_opval_h_dr =
632{
633 & sh_cgen_opval_h_dr_entries[0],
c7e628df
DB		 634 32,
635 0, 0, 0, 0, ""
636};
637
638static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fsd_entries[] =
639{
640 { "fr0", 0, {0, {{{0, 0}}}}, 0, 0 },
641 { "fr1", 1, {0, {{{0, 0}}}}, 0, 0 },
642 { "fr2", 2, {0, {{{0, 0}}}}, 0, 0 },
643 { "fr3", 3, {0, {{{0, 0}}}}, 0, 0 },
644 { "fr4", 4, {0, {{{0, 0}}}}, 0, 0 },
645 { "fr5", 5, {0, {{{0, 0}}}}, 0, 0 },
646 { "fr6", 6, {0, {{{0, 0}}}}, 0, 0 },
647 { "fr7", 7, {0, {{{0, 0}}}}, 0, 0 },
648 { "fr8", 8, {0, {{{0, 0}}}}, 0, 0 },
649 { "fr9", 9, {0, {{{0, 0}}}}, 0, 0 },
650 { "fr10", 10, {0, {{{0, 0}}}}, 0, 0 },
651 { "fr11", 11, {0, {{{0, 0}}}}, 0, 0 },
652 { "fr12", 12, {0, {{{0, 0}}}}, 0, 0 },
653 { "fr13", 13, {0, {{{0, 0}}}}, 0, 0 },
654 { "fr14", 14, {0, {{{0, 0}}}}, 0, 0 },
655 { "fr15", 15, {0, {{{0, 0}}}}, 0, 0 }
656};
657
658CGEN_KEYWORD sh_cgen_opval_h_fsd =
659{
660 & sh_cgen_opval_h_fsd_entries[0],
661 16,
662 0, 0, 0, 0, ""
663};
664
665static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fmov_entries[] =
666{
667 { "fr0", 0, {0, {{{0, 0}}}}, 0, 0 },
668 { "fr1", 1, {0, {{{0, 0}}}}, 0, 0 },
669 { "fr2", 2, {0, {{{0, 0}}}}, 0, 0 },
670 { "fr3", 3, {0, {{{0, 0}}}}, 0, 0 },
671 { "fr4", 4, {0, {{{0, 0}}}}, 0, 0 },
672 { "fr5", 5, {0, {{{0, 0}}}}, 0, 0 },
673 { "fr6", 6, {0, {{{0, 0}}}}, 0, 0 },
674 { "fr7", 7, {0, {{{0, 0}}}}, 0, 0 },
675 { "fr8", 8, {0, {{{0, 0}}}}, 0, 0 },
676 { "fr9", 9, {0, {{{0, 0}}}}, 0, 0 },
677 { "fr10", 10, {0, {{{0, 0}}}}, 0, 0 },
678 { "fr11", 11, {0, {{{0, 0}}}}, 0, 0 },
679 { "fr12", 12, {0, {{{0, 0}}}}, 0, 0 },
680 { "fr13", 13, {0, {{{0, 0}}}}, 0, 0 },
681 { "fr14", 14, {0, {{{0, 0}}}}, 0, 0 },
682 { "fr15", 15, {0, {{{0, 0}}}}, 0, 0 }
683};
684
685CGEN_KEYWORD sh_cgen_opval_h_fmov =
686{
687 & sh_cgen_opval_h_fmov_entries[0],
688 16,
689 0, 0, 0, 0, ""
cbb38b47
BE		 690};
691
692static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_tr_entries[] =
693{
c7e628df
DB		 694 { "tr0", 0, {0, {{{0, 0}}}}, 0, 0 },
695 { "tr1", 1, {0, {{{0, 0}}}}, 0, 0 },
696 { "tr2", 2, {0, {{{0, 0}}}}, 0, 0 },
697 { "tr3", 3, {0, {{{0, 0}}}}, 0, 0 },
698 { "tr4", 4, {0, {{{0, 0}}}}, 0, 0 },
699 { "tr5", 5, {0, {{{0, 0}}}}, 0, 0 },
700 { "tr6", 6, {0, {{{0, 0}}}}, 0, 0 },
701 { "tr7", 7, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 702};
703
704CGEN_KEYWORD sh_cgen_opval_h_tr =
705{
706 & sh_cgen_opval_h_tr_entries[0],
707 8,
c7e628df 708 0, 0, 0, 0, ""
cbb38b47
BE		 709};
710
711static CGEN_KEYWORD_ENTRY sh_cgen_opval_h_fvc_entries[] =
712{
c7e628df
DB		 713 { "fv0", 0, {0, {{{0, 0}}}}, 0, 0 },
714 { "fv4", 4, {0, {{{0, 0}}}}, 0, 0 },
715 { "fv8", 8, {0, {{{0, 0}}}}, 0, 0 },
716 { "fv12", 12, {0, {{{0, 0}}}}, 0, 0 }
cbb38b47
BE		 717};
718
719CGEN_KEYWORD sh_cgen_opval_h_fvc =
720{
721 & sh_cgen_opval_h_fvc_entries[0],
722 4,
c7e628df 723 0, 0, 0, 0, ""
cbb38b47
BE		 724};
725
726
727/* The hardware table. */
728
cbb38b47 729#define A(a) (1 << CGEN_HW_##a)
cbb38b47
BE		 730
731const CGEN_HW_ENTRY sh_cgen_hw_table[] =
732{
c7e628df
DB		 733 { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
734 { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
735 { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
736 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
737 { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
738 { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
739 { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_gr, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
740 { "h-grc", HW_H_GRC, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_grc, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
741 { "h-cr", HW_H_CR, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_cr, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
742 { "h-sr", HW_H_SR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
743 { "h-fpscr", HW_H_FPSCR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
744 { "h-frbit", HW_H_FRBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
745 { "h-szbit", HW_H_SZBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
746 { "h-prbit", HW_H_PRBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
747 { "h-sbit", HW_H_SBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
748 { "h-mbit", HW_H_MBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
749 { "h-qbit", HW_H_QBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
750 { "h-fr", HW_H_FR, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fr, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
751 { "h-fp", HW_H_FP, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fp, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
752 { "h-fv", HW_H_FV, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fv, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
753 { "h-fmtx", HW_H_FMTX, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fmtx, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
754 { "h-dr", HW_H_DR, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_dr, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
755 { "h-fsd", HW_H_FSD, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fsd, { 0|A(PROFILE), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\xc0" } } } } },
756 { "h-fmov", HW_H_FMOV, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fmov, { 0|A(PROFILE), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\xc0" } } } } },
757 { "h-tr", HW_H_TR, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_tr, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
758 { "h-endian", HW_H_ENDIAN, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
759 { "h-ism", HW_H_ISM, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
760 { "h-frc", HW_H_FRC, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_frc_names, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
761 { "h-drc", HW_H_DRC, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_drc_names, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
762 { "h-xf", HW_H_XF, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_xf_names, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
763 { "h-xd", HW_H_XD, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_frc_names, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
764 { "h-fvc", HW_H_FVC, CGEN_ASM_KEYWORD, (PTR) & sh_cgen_opval_h_fvc, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
765 { "h-gbr", HW_H_GBR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
766 { "h-vbr", HW_H_VBR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
767 { "h-pr", HW_H_PR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
768 { "h-macl", HW_H_MACL, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
769 { "h-mach", HW_H_MACH, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
770 { "h-tbit", HW_H_TBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
771 { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
cbb38b47
BE		 772};
773
774#undef A
775
776
777/* The instruction field table. */
778
cbb38b47 779#define A(a) (1 << CGEN_IFLD_##a)
cbb38b47
BE		 780
781const CGEN_IFLD sh_cgen_ifld_table[] =
782{
fda1c30b
DE		 783 { SH_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
784 { SH_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
c7e628df
DB		 785 { SH_F_OP4, "f-op4", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
786 { SH_F_OP8, "f-op8", 0, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
787 { SH_F_OP16, "f-op16", 0, 32, 0, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
788 { SH_F_SUB4, "f-sub4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
789 { SH_F_SUB8, "f-sub8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
790 { SH_F_SUB10, "f-sub10", 0, 32, 6, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
791 { SH_F_RN, "f-rn", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
792 { SH_F_RM, "f-rm", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
793 { SH_F_7_1, "f-7-1", 0, 32, 7, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
794 { SH_F_11_1, "f-11-1", 0, 32, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
795 { SH_F_16_4, "f-16-4", 0, 32, 16, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
796 { SH_F_DISP8, "f-disp8", 0, 32, 8, 8, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
797 { SH_F_DISP12, "f-disp12", 0, 32, 4, 12, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
798 { SH_F_IMM8, "f-imm8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
799 { SH_F_IMM4, "f-imm4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
800 { SH_F_IMM4X2, "f-imm4x2", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
801 { SH_F_IMM4X4, "f-imm4x4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
802 { SH_F_IMM8X2, "f-imm8x2", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
803 { SH_F_IMM8X4, "f-imm8x4", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
804 { SH_F_IMM12X4, "f-imm12x4", 0, 32, 20, 12, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
805 { SH_F_IMM12X8, "f-imm12x8", 0, 32, 20, 12, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
806 { SH_F_DN, "f-dn", 0, 32, 4, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
807 { SH_F_DM, "f-dm", 0, 32, 8, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
808 { SH_F_VN, "f-vn", 0, 32, 4, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
809 { SH_F_VM, "f-vm", 0, 32, 6, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
810 { SH_F_XN, "f-xn", 0, 32, 4, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
811 { SH_F_XM, "f-xm", 0, 32, 8, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
812 { SH_F_IMM20_HI, "f-imm20-hi", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
813 { SH_F_IMM20_LO, "f-imm20-lo", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
814 { SH_F_IMM20, "f-imm20", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
815 { SH_F_OP, "f-op", 0, 32, 0, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
816 { SH_F_EXT, "f-ext", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
817 { SH_F_RSVD, "f-rsvd", 0, 32, 28, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
818 { SH_F_LEFT, "f-left", 0, 32, 6, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
819 { SH_F_RIGHT, "f-right", 0, 32, 16, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
820 { SH_F_DEST, "f-dest", 0, 32, 22, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
821 { SH_F_LEFT_RIGHT, "f-left-right", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
822 { SH_F_TRA, "f-tra", 0, 32, 25, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
823 { SH_F_TRB, "f-trb", 0, 32, 9, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
824 { SH_F_LIKELY, "f-likely", 0, 32, 22, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
825 { SH_F_6_3, "f-6-3", 0, 32, 6, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
826 { SH_F_23_2, "f-23-2", 0, 32, 23, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
827 { SH_F_IMM6, "f-imm6", 0, 32, 16, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
828 { SH_F_IMM10, "f-imm10", 0, 32, 12, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
829 { SH_F_IMM16, "f-imm16", 0, 32, 6, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
830 { SH_F_UIMM6, "f-uimm6", 0, 32, 16, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
831 { SH_F_UIMM16, "f-uimm16", 0, 32, 6, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
832 { SH_F_DISP6, "f-disp6", 0, 32, 16, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
833 { SH_F_DISP6X32, "f-disp6x32", 0, 32, 16, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
834 { SH_F_DISP10, "f-disp10", 0, 32, 12, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
835 { SH_F_DISP10X8, "f-disp10x8", 0, 32, 12, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
836 { SH_F_DISP10X4, "f-disp10x4", 0, 32, 12, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
837 { SH_F_DISP10X2, "f-disp10x2", 0, 32, 12, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
838 { SH_F_DISP16, "f-disp16", 0, 32, 6, 16, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
839 { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
cbb38b47
BE		 840};
841
842#undef A
843
844
c7e628df
DB		 845
846/* multi ifield declarations */
847
848const CGEN_MAYBE_MULTI_IFLD SH_F_IMM20_MULTI_IFIELD [];
849const CGEN_MAYBE_MULTI_IFLD SH_F_LEFT_RIGHT_MULTI_IFIELD [];
850
851
852/* multi ifield definitions */
853
854const CGEN_MAYBE_MULTI_IFLD SH_F_IMM20_MULTI_IFIELD [] =
855{
856 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM20_HI] } },
857 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM20_LO] } },
858 { 0, { (const PTR) 0 } }
859};
860const CGEN_MAYBE_MULTI_IFLD SH_F_LEFT_RIGHT_MULTI_IFIELD [] =
861{
862 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
863 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RIGHT] } },
864 { 0, { (const PTR) 0 } }
865};
866
cbb38b47
BE		 867/* The operand table. */
868
cbb38b47 869#define A(a) (1 << CGEN_OPERAND_##a)
cbb38b47 870#define OPERAND(op) SH_OPERAND_##op
cbb38b47
BE		 871
872const CGEN_OPERAND sh_cgen_operand_table[] =
873{
874/* pc: program counter */
875 { "pc", SH_OPERAND_PC, HW_H_PC, 0, 0,
c7e628df 876 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_NIL] } },
fda1c30b 877 { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
cbb38b47
BE		 878/* endian: Endian mode */
879 { "endian", SH_OPERAND_ENDIAN, HW_H_ENDIAN, 0, 0,
c7e628df
DB		 880 { 0, { (const PTR) 0 } },
881 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
cbb38b47
BE		 882/* ism: Instruction set mode */
883 { "ism", SH_OPERAND_ISM, HW_H_ISM, 0, 0,
c7e628df
DB		 884 { 0, { (const PTR) 0 } },
885 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
cbb38b47 886/* rm: Left general purpose register */
c7e628df
DB		 887 { "rm", SH_OPERAND_RM, HW_H_GRC, 8, 4,
888 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RM] } },
889 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 890/* rn: Right general purpose register */
c7e628df
DB		 891 { "rn", SH_OPERAND_RN, HW_H_GRC, 4, 4,
892 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RN] } },
893 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 894/* r0: Register 0 */
895 { "r0", SH_OPERAND_R0, HW_H_GRC, 0, 0,
c7e628df
DB		 896 { 0, { (const PTR) 0 } },
897 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 898/* frn: Single precision register */
c7e628df
DB		 899 { "frn", SH_OPERAND_FRN, HW_H_FRC, 4, 4,
900 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RN] } },
901 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 902/* frm: Single precision register */
c7e628df
DB		 903 { "frm", SH_OPERAND_FRM, HW_H_FRC, 8, 4,
904 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RM] } },
905 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
906/* fr0: Single precision register 0 */
907 { "fr0", SH_OPERAND_FR0, HW_H_FRC, 0, 0,
908 { 0, { (const PTR) 0 } },
909 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
910/* fmovn: Register for fmov */
911 { "fmovn", SH_OPERAND_FMOVN, HW_H_FMOV, 4, 4,
912 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RN] } },
913 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } } } } },
914/* fmovm: Register for fmov */
915 { "fmovm", SH_OPERAND_FMOVM, HW_H_FMOV, 8, 4,
916 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RM] } },
917 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 918/* fvn: Left floating point vector */
c7e628df
DB		 919 { "fvn", SH_OPERAND_FVN, HW_H_FVC, 4, 2,
920 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_VN] } },
921 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 922/* fvm: Right floating point vector */
c7e628df
DB		 923 { "fvm", SH_OPERAND_FVM, HW_H_FVC, 6, 2,
924 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_VM] } },
925 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 926/* drn: Left double precision register */
c7e628df
DB		 927 { "drn", SH_OPERAND_DRN, HW_H_DRC, 4, 3,
928 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DN] } },
929 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 930/* drm: Right double precision register */
c7e628df
DB		 931 { "drm", SH_OPERAND_DRM, HW_H_DRC, 8, 3,
932 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DM] } },
933 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 934/* imm4: Immediate value (4 bits) */
c7e628df
DB		 935 { "imm4", SH_OPERAND_IMM4, HW_H_SINT, 12, 4,
936 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM4] } },
937 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 938/* imm8: Immediate value (8 bits) */
c7e628df
DB		 939 { "imm8", SH_OPERAND_IMM8, HW_H_SINT, 8, 8,
940 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM8] } },
941 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 942/* uimm8: Immediate value (8 bits unsigned) */
c7e628df
DB		 943 { "uimm8", SH_OPERAND_UIMM8, HW_H_UINT, 8, 8,
944 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM8] } },
945 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
946/* imm20: Immediate value (20 bits) */
947 { "imm20", SH_OPERAND_IMM20, HW_H_SINT, 8, 20,
948 { 2, { (const PTR) &SH_F_IMM20_MULTI_IFIELD[0] } },
949 { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 950/* imm4x2: Immediate value (4 bits, 2x scale) */
c7e628df
DB		 951 { "imm4x2", SH_OPERAND_IMM4X2, HW_H_UINT, 12, 4,
952 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM4X2] } },
953 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 954/* imm4x4: Immediate value (4 bits, 4x scale) */
c7e628df
DB		 955 { "imm4x4", SH_OPERAND_IMM4X4, HW_H_UINT, 12, 4,
956 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM4X4] } },
957 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 958/* imm8x2: Immediate value (8 bits, 2x scale) */
c7e628df
DB		 959 { "imm8x2", SH_OPERAND_IMM8X2, HW_H_UINT, 8, 8,
960 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM8X2] } },
961 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 962/* imm8x4: Immediate value (8 bits, 4x scale) */
c7e628df
DB		 963 { "imm8x4", SH_OPERAND_IMM8X4, HW_H_UINT, 8, 8,
964 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM8X4] } },
965 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 966/* disp8: Displacement (8 bits) */
c7e628df
DB		 967 { "disp8", SH_OPERAND_DISP8, HW_H_IADDR, 8, 8,
968 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP8] } },
969 { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 970/* disp12: Displacement (12 bits) */
c7e628df
DB		 971 { "disp12", SH_OPERAND_DISP12, HW_H_IADDR, 4, 12,
972 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP12] } },
973 { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
974/* imm12x4: Displacement (12 bits) */
975 { "imm12x4", SH_OPERAND_IMM12X4, HW_H_SINT, 20, 12,
976 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM12X4] } },
977 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
978/* imm12x8: Displacement (12 bits) */
979 { "imm12x8", SH_OPERAND_IMM12X8, HW_H_SINT, 20, 12,
980 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM12X8] } },
981 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 982/* rm64: Register m (64 bits) */
c7e628df
DB		 983 { "rm64", SH_OPERAND_RM64, HW_H_GR, 8, 4,
984 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RM] } },
985 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 986/* rn64: Register n (64 bits) */
c7e628df
DB		 987 { "rn64", SH_OPERAND_RN64, HW_H_GR, 4, 4,
988 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RN] } },
989 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 990/* gbr: Global base register */
991 { "gbr", SH_OPERAND_GBR, HW_H_GBR, 0, 0,
c7e628df
DB		 992 { 0, { (const PTR) 0 } },
993 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
994/* vbr: Vector base register */
995 { "vbr", SH_OPERAND_VBR, HW_H_VBR, 0, 0,
996 { 0, { (const PTR) 0 } },
997 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 998/* pr: Procedure link register */
999 { "pr", SH_OPERAND_PR, HW_H_PR, 0, 0,
c7e628df
DB		 1000 { 0, { (const PTR) 0 } },
1001 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 1002/* fpscr: Floating point status/control register */
c7e628df
DB		 1003 { "fpscr", SH_OPERAND_FPSCR, HW_H_FPSCR, 0, 0,
1004 { 0, { (const PTR) 0 } },
1005 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1006/* tbit: Condition code flag */
1007 { "tbit", SH_OPERAND_TBIT, HW_H_TBIT, 0, 0,
c7e628df
DB		 1008 { 0, { (const PTR) 0 } },
1009 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1010/* sbit: Multiply-accumulate saturation flag */
1011 { "sbit", SH_OPERAND_SBIT, HW_H_SBIT, 0, 0,
c7e628df
DB		 1012 { 0, { (const PTR) 0 } },
1013 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1014/* mbit: Divide-step M flag */
1015 { "mbit", SH_OPERAND_MBIT, HW_H_MBIT, 0, 0,
c7e628df
DB		 1016 { 0, { (const PTR) 0 } },
1017 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1018/* qbit: Divide-step Q flag */
1019 { "qbit", SH_OPERAND_QBIT, HW_H_QBIT, 0, 0,
c7e628df
DB		 1020 { 0, { (const PTR) 0 } },
1021 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1022/* fpul: Floating point ??? */
1023 { "fpul", SH_OPERAND_FPUL, HW_H_FR, 0, 0,
c7e628df
DB		 1024 { 0, { (const PTR) 0 } },
1025 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1026/* frbit: Floating point register bank bit */
1027 { "frbit", SH_OPERAND_FRBIT, HW_H_FRBIT, 0, 0,
c7e628df
DB		 1028 { 0, { (const PTR) 0 } },
1029 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1030/* szbit: Floating point transfer size bit */
1031 { "szbit", SH_OPERAND_SZBIT, HW_H_SZBIT, 0, 0,
c7e628df
DB		 1032 { 0, { (const PTR) 0 } },
1033 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1034/* prbit: Floating point precision bit */
1035 { "prbit", SH_OPERAND_PRBIT, HW_H_PRBIT, 0, 0,
c7e628df
DB		 1036 { 0, { (const PTR) 0 } },
1037 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1038/* macl: Multiply-accumulate low register */
1039 { "macl", SH_OPERAND_MACL, HW_H_MACL, 0, 0,
c7e628df
DB		 1040 { 0, { (const PTR) 0 } },
1041 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47
BE		 1042/* mach: Multiply-accumulate high register */
1043 { "mach", SH_OPERAND_MACH, HW_H_MACH, 0, 0,
c7e628df
DB		 1044 { 0, { (const PTR) 0 } },
1045 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 1046/* fsdm: bar */
c7e628df
DB		 1047 { "fsdm", SH_OPERAND_FSDM, HW_H_FSD, 8, 4,
1048 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RM] } },
1049 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 1050/* fsdn: bar */
c7e628df
DB		 1051 { "fsdn", SH_OPERAND_FSDN, HW_H_FSD, 4, 4,
1052 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RN] } },
1053 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } } } } },
cbb38b47 1054/* rm: Left general purpose reg */
c7e628df
DB		 1055 { "rm", SH_OPERAND_RM, HW_H_GR, 6, 6,
1056 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1057 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1058/* rn: Right general purpose reg */
c7e628df
DB		 1059 { "rn", SH_OPERAND_RN, HW_H_GR, 16, 6,
1060 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RIGHT] } },
1061 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1062/* rd: Destination general purpose reg */
c7e628df
DB		 1063 { "rd", SH_OPERAND_RD, HW_H_GR, 22, 6,
1064 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1065 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1066/* frg: Left single precision register */
c7e628df
DB		 1067 { "frg", SH_OPERAND_FRG, HW_H_FR, 6, 6,
1068 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1069 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1070/* frh: Right single precision register */
c7e628df
DB		 1071 { "frh", SH_OPERAND_FRH, HW_H_FR, 16, 6,
1072 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RIGHT] } },
1073 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1074/* frf: Destination single precision reg */
c7e628df
DB		 1075 { "frf", SH_OPERAND_FRF, HW_H_FR, 22, 6,
1076 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1077 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1078/* frgh: Single precision register pair */
c7e628df
DB		 1079 { "frgh", SH_OPERAND_FRGH, HW_H_FR, 6, 12,
1080 { 2, { (const PTR) &SH_F_LEFT_RIGHT_MULTI_IFIELD[0] } },
1081 { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1082/* fpf: Pair of single precision registers */
c7e628df
DB		 1083 { "fpf", SH_OPERAND_FPF, HW_H_FP, 22, 6,
1084 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1085 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1086/* fvg: Left single precision vector */
c7e628df
DB		 1087 { "fvg", SH_OPERAND_FVG, HW_H_FV, 6, 6,
1088 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1089 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1090/* fvh: Right single precision vector */
c7e628df
DB		 1091 { "fvh", SH_OPERAND_FVH, HW_H_FV, 16, 6,
1092 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RIGHT] } },
1093 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1094/* fvf: Destination single precision vector */
c7e628df
DB		 1095 { "fvf", SH_OPERAND_FVF, HW_H_FV, 22, 6,
1096 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1097 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1098/* mtrxg: Left single precision matrix */
c7e628df
DB		 1099 { "mtrxg", SH_OPERAND_MTRXG, HW_H_FMTX, 6, 6,
1100 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1101 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1102/* drg: Left double precision register */
c7e628df
DB		 1103 { "drg", SH_OPERAND_DRG, HW_H_DR, 6, 6,
1104 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1105 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1106/* drh: Right double precision register */
c7e628df
DB		 1107 { "drh", SH_OPERAND_DRH, HW_H_DR, 16, 6,
1108 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_RIGHT] } },
1109 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1110/* drf: Destination double precision reg */
c7e628df
DB		 1111 { "drf", SH_OPERAND_DRF, HW_H_DR, 22, 6,
1112 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1113 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1114/* drgh: Double precision register pair */
c7e628df
DB		 1115 { "drgh", SH_OPERAND_DRGH, HW_H_DR, 6, 12,
1116 { 2, { (const PTR) &SH_F_LEFT_RIGHT_MULTI_IFIELD[0] } },
1117 { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47
BE		 1118/* fpscr: Floating point status register */
1119 { "fpscr", SH_OPERAND_FPSCR, HW_H_FPSCR, 0, 0,
c7e628df
DB		 1120 { 0, { (const PTR) 0 } },
1121 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1122/* crj: Control register j */
c7e628df
DB		 1123 { "crj", SH_OPERAND_CRJ, HW_H_CR, 22, 6,
1124 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DEST] } },
1125 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1126/* crk: Control register k */
c7e628df
DB		 1127 { "crk", SH_OPERAND_CRK, HW_H_CR, 6, 6,
1128 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LEFT] } },
1129 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1130/* tra: Target register a */
c7e628df
DB		 1131 { "tra", SH_OPERAND_TRA, HW_H_TR, 25, 3,
1132 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_TRA] } },
1133 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1134/* trb: Target register b */
c7e628df
DB		 1135 { "trb", SH_OPERAND_TRB, HW_H_TR, 9, 3,
1136 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_TRB] } },
1137 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1138/* disp6: Displacement (6 bits) */
c7e628df
DB		 1139 { "disp6", SH_OPERAND_DISP6, HW_H_SINT, 16, 6,
1140 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP6] } },
1141 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1142/* disp6x32: Displacement (6 bits, scale 32) */
c7e628df
DB		 1143 { "disp6x32", SH_OPERAND_DISP6X32, HW_H_SINT, 16, 6,
1144 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP6X32] } },
1145 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1146/* disp10: Displacement (10 bits) */
c7e628df
DB		 1147 { "disp10", SH_OPERAND_DISP10, HW_H_SINT, 12, 10,
1148 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP10] } },
1149 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1150/* disp10x2: Displacement (10 bits, scale 2) */
c7e628df
DB		 1151 { "disp10x2", SH_OPERAND_DISP10X2, HW_H_SINT, 12, 10,
1152 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP10X2] } },
1153 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1154/* disp10x4: Displacement (10 bits, scale 4) */
c7e628df
DB		 1155 { "disp10x4", SH_OPERAND_DISP10X4, HW_H_SINT, 12, 10,
1156 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP10X4] } },
1157 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1158/* disp10x8: Displacement (10 bits, scale 8) */
c7e628df
DB		 1159 { "disp10x8", SH_OPERAND_DISP10X8, HW_H_SINT, 12, 10,
1160 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP10X8] } },
1161 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1162/* disp16: Displacement (16 bits) */
c7e628df
DB		 1163 { "disp16", SH_OPERAND_DISP16, HW_H_SINT, 6, 16,
1164 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_DISP16] } },
1165 { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1166/* imm6: Immediate (6 bits) */
c7e628df
DB		 1167 { "imm6", SH_OPERAND_IMM6, HW_H_SINT, 16, 6,
1168 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM6] } },
1169 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1170/* imm10: Immediate (10 bits) */
c7e628df
DB		 1171 { "imm10", SH_OPERAND_IMM10, HW_H_SINT, 12, 10,
1172 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM10] } },
1173 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1174/* imm16: Immediate (16 bits) */
c7e628df
DB		 1175 { "imm16", SH_OPERAND_IMM16, HW_H_SINT, 6, 16,
1176 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_IMM16] } },
1177 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1178/* uimm6: Immediate (6 bits) */
c7e628df
DB		 1179 { "uimm6", SH_OPERAND_UIMM6, HW_H_UINT, 16, 6,
1180 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_UIMM6] } },
1181 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1182/* uimm16: Unsigned immediate (16 bits) */
c7e628df
DB		 1183 { "uimm16", SH_OPERAND_UIMM16, HW_H_UINT, 6, 16,
1184 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_UIMM16] } },
1185 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
cbb38b47 1186/* likely: Likely branch? */
c7e628df
DB		 1187 { "likely", SH_OPERAND_LIKELY, HW_H_UINT, 22, 1,
1188 { 0, { (const PTR) &sh_cgen_ifld_table[SH_F_LIKELY] } },
1189 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } } },
1190/* sentinel */
1191 { 0, 0, 0, 0, 0,
1192 { 0, { (const PTR) 0 } },
1193 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
cbb38b47
BE		 1194};
1195
1196#undef A
1197
1198
1199/* The instruction table. */
1200
1201#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
cbb38b47 1202#define A(a) (1 << CGEN_INSN_##a)
cbb38b47
BE		 1203
1204static const CGEN_IBASE sh_cgen_insn_table[MAX_INSNS] =
1205{
1206 /* Special null first entry.
1207 A `num' value of zero is thus invalid.
1208 Also, the special `invalid' insn resides here. */
c7e628df 1209 { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } } },
cbb38b47
BE		 1210/* add $rm, $rn */
1211 {
1212 SH_INSN_ADD_COMPACT, "add-compact", "add", 16,
c7e628df 1213 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1214 },
1215/* add #$imm8, $rn */
1216 {
1217 SH_INSN_ADDI_COMPACT, "addi-compact", "add", 16,
c7e628df 1218 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1219 },
1220/* addc $rm, $rn */
1221 {
1222 SH_INSN_ADDC_COMPACT, "addc-compact", "addc", 16,
c7e628df 1223 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1224 },
1225/* addv $rm, $rn */
1226 {
1227 SH_INSN_ADDV_COMPACT, "addv-compact", "addv", 16,
c7e628df 1228 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1229 },
1230/* and $rm64, $rn64 */
1231 {
1232 SH_INSN_AND_COMPACT, "and-compact", "and", 16,
c7e628df 1233 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1234 },
1235/* and #$uimm8, r0 */
1236 {
1237 SH_INSN_ANDI_COMPACT, "andi-compact", "and", 16,
c7e628df 1238 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1239 },
1240/* and.b #$imm8, @(r0, gbr) */
1241 {
1242 SH_INSN_ANDB_COMPACT, "andb-compact", "and.b", 16,
c7e628df 1243 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1244 },
1245/* bf $disp8 */
1246 {
1247 SH_INSN_BF_COMPACT, "bf-compact", "bf", 16,
c7e628df 1248 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1249 },
1250/* bf/s $disp8 */
1251 {
1252 SH_INSN_BFS_COMPACT, "bfs-compact", "bf/s", 16,
c7e628df 1253 { 0|A(COND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1254 },
1255/* bra $disp12 */
1256 {
1257 SH_INSN_BRA_COMPACT, "bra-compact", "bra", 16,
c7e628df 1258 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1259 },
1260/* braf $rn */
1261 {
1262 SH_INSN_BRAF_COMPACT, "braf-compact", "braf", 16,
c7e628df 1263 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1264 },
1265/* brk */
1266 {
1267 SH_INSN_BRK_COMPACT, "brk-compact", "brk", 16,
c7e628df 1268 { 0, { { { (1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1269 },
1270/* bsr $disp12 */
1271 {
1272 SH_INSN_BSR_COMPACT, "bsr-compact", "bsr", 16,
c7e628df 1273 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1274 },
1275/* bsrf $rn */
1276 {
1277 SH_INSN_BSRF_COMPACT, "bsrf-compact", "bsrf", 16,
c7e628df 1278 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1279 },
1280/* bt $disp8 */
1281 {
1282 SH_INSN_BT_COMPACT, "bt-compact", "bt", 16,
c7e628df 1283 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1284 },
1285/* bt/s $disp8 */
1286 {
1287 SH_INSN_BTS_COMPACT, "bts-compact", "bt/s", 16,
c7e628df 1288 { 0|A(COND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_BR, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1289 },
1290/* clrmac */
1291 {
1292 SH_INSN_CLRMAC_COMPACT, "clrmac-compact", "clrmac", 16,
c7e628df 1293 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1294 },
1295/* clrs */
1296 {
1297 SH_INSN_CLRS_COMPACT, "clrs-compact", "clrs", 16,
c7e628df 1298 { 0, { { { (1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1299 },
1300/* clrt */
1301 {
1302 SH_INSN_CLRT_COMPACT, "clrt-compact", "clrt", 16,
c7e628df 1303 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1304 },
1305/* cmp/eq $rm, $rn */
1306 {
1307 SH_INSN_CMPEQ_COMPACT, "cmpeq-compact", "cmp/eq", 16,
c7e628df 1308 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1309 },
1310/* cmp/eq #$imm8, r0 */
1311 {
1312 SH_INSN_CMPEQI_COMPACT, "cmpeqi-compact", "cmp/eq", 16,
c7e628df 1313 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1314 },
1315/* cmp/ge $rm, $rn */
1316 {
1317 SH_INSN_CMPGE_COMPACT, "cmpge-compact", "cmp/ge", 16,
c7e628df 1318 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1319 },
1320/* cmp/gt $rm, $rn */
1321 {
1322 SH_INSN_CMPGT_COMPACT, "cmpgt-compact", "cmp/gt", 16,
c7e628df 1323 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1324 },
1325/* cmp/hi $rm, $rn */
1326 {
1327 SH_INSN_CMPHI_COMPACT, "cmphi-compact", "cmp/hi", 16,
c7e628df 1328 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1329 },
1330/* cmp/hs $rm, $rn */
1331 {
1332 SH_INSN_CMPHS_COMPACT, "cmphs-compact", "cmp/hs", 16,
c7e628df 1333 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1334 },
1335/* cmp/pl $rn */
1336 {
1337 SH_INSN_CMPPL_COMPACT, "cmppl-compact", "cmp/pl", 16,
c7e628df 1338 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1339 },
1340/* cmp/pz $rn */
1341 {
1342 SH_INSN_CMPPZ_COMPACT, "cmppz-compact", "cmp/pz", 16,
c7e628df 1343 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1344 },
1345/* cmp/str $rm, $rn */
1346 {
1347 SH_INSN_CMPSTR_COMPACT, "cmpstr-compact", "cmp/str", 16,
c7e628df 1348 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1349 },
1350/* div0s $rm, $rn */
1351 {
1352 SH_INSN_DIV0S_COMPACT, "div0s-compact", "div0s", 16,
c7e628df 1353 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1354 },
1355/* div0u */
1356 {
1357 SH_INSN_DIV0U_COMPACT, "div0u-compact", "div0u", 16,
c7e628df 1358 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1359 },
1360/* div1 $rm, $rn */
1361 {
1362 SH_INSN_DIV1_COMPACT, "div1-compact", "div1", 16,
c7e628df
DB		 1363 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
1364 },
1365/* divu r0, $rn */
1366 {
1367 SH_INSN_DIVU_COMPACT, "divu-compact", "divu", 16,
1368 { 0, { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
1369 },
1370/* mulr r0, $rn */
1371 {
1372 SH_INSN_MULR_COMPACT, "mulr-compact", "mulr", 16,
1373 { 0, { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1374 },
1375/* dmuls.l $rm, $rn */
1376 {
1377 SH_INSN_DMULSL_COMPACT, "dmulsl-compact", "dmuls.l", 16,
c7e628df 1378 { 0, { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1379 },
1380/* dmulu.l $rm, $rn */
1381 {
1382 SH_INSN_DMULUL_COMPACT, "dmulul-compact", "dmulu.l", 16,
c7e628df 1383 { 0, { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1384 },
1385/* dt $rn */
1386 {
1387 SH_INSN_DT_COMPACT, "dt-compact", "dt", 16,
c7e628df 1388 { 0, { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1389 },
1390/* exts.b $rm, $rn */
1391 {
1392 SH_INSN_EXTSB_COMPACT, "extsb-compact", "exts.b", 16,
c7e628df 1393 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1394 },
1395/* exts.w $rm, $rn */
1396 {
1397 SH_INSN_EXTSW_COMPACT, "extsw-compact", "exts.w", 16,
c7e628df 1398 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1399 },
1400/* extu.b $rm, $rn */
1401 {
1402 SH_INSN_EXTUB_COMPACT, "extub-compact", "extu.b", 16,
c7e628df 1403 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1404 },
1405/* extu.w $rm, $rn */
1406 {
1407 SH_INSN_EXTUW_COMPACT, "extuw-compact", "extu.w", 16,
c7e628df 1408 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1409 },
1410/* fabs $fsdn */
1411 {
1412 SH_INSN_FABS_COMPACT, "fabs-compact", "fabs", 16,
c7e628df 1413 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1414 },
1415/* fadd $fsdm, $fsdn */
1416 {
1417 SH_INSN_FADD_COMPACT, "fadd-compact", "fadd", 16,
c7e628df 1418 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1419 },
1420/* fcmp/eq $fsdm, $fsdn */
1421 {
1422 SH_INSN_FCMPEQ_COMPACT, "fcmpeq-compact", "fcmp/eq", 16,
c7e628df 1423 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1424 },
1425/* fcmp/gt $fsdm, $fsdn */
1426 {
1427 SH_INSN_FCMPGT_COMPACT, "fcmpgt-compact", "fcmp/gt", 16,
c7e628df 1428 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1429 },
1430/* fcnvds $drn, fpul */
1431 {
1432 SH_INSN_FCNVDS_COMPACT, "fcnvds-compact", "fcnvds", 16,
c7e628df 1433 { 0|A(FP_INSN), { { { (1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1434 },
1435/* fcnvsd fpul, $drn */
1436 {
1437 SH_INSN_FCNVSD_COMPACT, "fcnvsd-compact", "fcnvsd", 16,
c7e628df 1438 { 0|A(FP_INSN), { { { (1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1439 },
1440/* fdiv $fsdm, $fsdn */
1441 {
1442 SH_INSN_FDIV_COMPACT, "fdiv-compact", "fdiv", 16,
c7e628df 1443 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1444 },
1445/* fipr $fvm, $fvn */
1446 {
1447 SH_INSN_FIPR_COMPACT, "fipr-compact", "fipr", 16,
c7e628df 1448 { 0|A(FP_INSN), { { { (1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47 1449 },
c7e628df 1450/* flds $frn, fpul */
cbb38b47
BE		 1451 {
1452 SH_INSN_FLDS_COMPACT, "flds-compact", "flds", 16,
c7e628df 1453 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1454 },
1455/* fldi0 $frn */
1456 {
1457 SH_INSN_FLDI0_COMPACT, "fldi0-compact", "fldi0", 16,
c7e628df 1458 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1459 },
1460/* fldi1 $frn */
1461 {
1462 SH_INSN_FLDI1_COMPACT, "fldi1-compact", "fldi1", 16,
c7e628df 1463 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1464 },
1465/* float fpul, $fsdn */
1466 {
1467 SH_INSN_FLOAT_COMPACT, "float-compact", "float", 16,
c7e628df 1468 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1469 },
1470/* fmac fr0, $frm, $frn */
1471 {
1472 SH_INSN_FMAC_COMPACT, "fmac-compact", "fmac", 16,
c7e628df 1473 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47 1474 },
c7e628df 1475/* fmov $fmovm, $fmovn */
cbb38b47
BE		 1476 {
1477 SH_INSN_FMOV1_COMPACT, "fmov1-compact", "fmov", 16,
c7e628df 1478 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1479 },
c7e628df 1480/* fmov @$rm, $fmovn */
cbb38b47
BE		 1481 {
1482 SH_INSN_FMOV2_COMPACT, "fmov2-compact", "fmov", 16,
c7e628df 1483 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1484 },
c7e628df 1485/* fmov @${rm}+, fmovn */
cbb38b47
BE		 1486 {
1487 SH_INSN_FMOV3_COMPACT, "fmov3-compact", "fmov", 16,
c7e628df 1488 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1489 },
c7e628df 1490/* fmov @(r0, $rm), $fmovn */
cbb38b47
BE		 1491 {
1492 SH_INSN_FMOV4_COMPACT, "fmov4-compact", "fmov", 16,
c7e628df 1493 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1494 },
c7e628df 1495/* fmov $fmovm, @$rn */
cbb38b47
BE		 1496 {
1497 SH_INSN_FMOV5_COMPACT, "fmov5-compact", "fmov", 16,
c7e628df 1498 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1499 },
c7e628df 1500/* fmov $fmovm, @-$rn */
cbb38b47
BE		 1501 {
1502 SH_INSN_FMOV6_COMPACT, "fmov6-compact", "fmov", 16,
c7e628df 1503 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1504 },
c7e628df 1505/* fmov $fmovm, @(r0, $rn) */
cbb38b47
BE		 1506 {
1507 SH_INSN_FMOV7_COMPACT, "fmov7-compact", "fmov", 16,
c7e628df
DB		 1508 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1509 },
1510/* fmov.d @($imm12x8, $rm), $drn */
1511 {
1512 SH_INSN_FMOV8_COMPACT, "fmov8-compact", "fmov.d", 32,
1513 { 0|A(32_BIT_INSN), { { { (1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
1514 },
1515/* mov.l $drm, @($imm12x8, $rn) */
1516 {
1517 SH_INSN_FMOV9_COMPACT, "fmov9-compact", "mov.l", 32,
1518 { 0|A(32_BIT_INSN), { { { (1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1519 },
1520/* fmul $fsdm, $fsdn */
1521 {
1522 SH_INSN_FMUL_COMPACT, "fmul-compact", "fmul", 16,
c7e628df 1523 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1524 },
1525/* fneg $fsdn */
1526 {
1527 SH_INSN_FNEG_COMPACT, "fneg-compact", "fneg", 16,
c7e628df 1528 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1529 },
1530/* frchg */
1531 {
1532 SH_INSN_FRCHG_COMPACT, "frchg-compact", "frchg", 16,
c7e628df 1533 { 0|A(FP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1534 },
1535/* fschg */
1536 {
1537 SH_INSN_FSCHG_COMPACT, "fschg-compact", "fschg", 16,
c7e628df 1538 { 0|A(FP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1539 },
1540/* fsqrt $fsdn */
1541 {
1542 SH_INSN_FSQRT_COMPACT, "fsqrt-compact", "fsqrt", 16,
c7e628df 1543 { 0|A(FP_INSN), { { { (1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1544 },
1545/* fsts fpul, $frn */
1546 {
1547 SH_INSN_FSTS_COMPACT, "fsts-compact", "fsts", 16,
c7e628df 1548 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1549 },
1550/* fsub $fsdm, $fsdn */
1551 {
1552 SH_INSN_FSUB_COMPACT, "fsub-compact", "fsub", 16,
c7e628df 1553 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1554 },
1555/* ftrc $fsdn, fpul */
1556 {
1557 SH_INSN_FTRC_COMPACT, "ftrc-compact", "ftrc", 16,
c7e628df 1558 { 0|A(FP_INSN), { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1559 },
1560/* ftrv xmtrx, $fvn */
1561 {
1562 SH_INSN_FTRV_COMPACT, "ftrv-compact", "ftrv", 16,
c7e628df 1563 { 0|A(FP_INSN), { { { (1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_FE, 0 } }, { { SH4A_GROUP_FE, 0 } } } }
cbb38b47
BE		 1564 },
1565/* jmp @$rn */
1566 {
1567 SH_INSN_JMP_COMPACT, "jmp-compact", "jmp", 16,
c7e628df 1568 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1569 },
1570/* jsr @$rn */
1571 {
1572 SH_INSN_JSR_COMPACT, "jsr-compact", "jsr", 16,
c7e628df 1573 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1574 },
1575/* ldc $rn, gbr */
1576 {
c7e628df
DB		 1577 SH_INSN_LDC_GBR_COMPACT, "ldc-gbr-compact", "ldc", 16,
1578 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1579 },
1580/* ldc $rn, vbr */
1581 {
1582 SH_INSN_LDC_VBR_COMPACT, "ldc-vbr-compact", "ldc", 16,
1583 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1584 },
1585/* ldc $rn, sr */
1586 {
1587 SH_INSN_LDC_SR_COMPACT, "ldc-sr-compact", "ldc", 16,
1588 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1589 },
1590/* ldc.l @${rn}+, gbr */
1591 {
c7e628df
DB		 1592 SH_INSN_LDCL_GBR_COMPACT, "ldcl-gbr-compact", "ldc.l", 16,
1593 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1594 },
1595/* ldc.l @${rn}+, vbr */
1596 {
1597 SH_INSN_LDCL_VBR_COMPACT, "ldcl-vbr-compact", "ldc.l", 16,
1598 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1599 },
1600/* lds $rn, fpscr */
1601 {
1602 SH_INSN_LDS_FPSCR_COMPACT, "lds-fpscr-compact", "lds", 16,
c7e628df 1603 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1604 },
1605/* lds.l @${rn}+, fpscr */
1606 {
1607 SH_INSN_LDSL_FPSCR_COMPACT, "ldsl-fpscr-compact", "lds.l", 16,
c7e628df 1608 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1609 },
1610/* lds $rn, fpul */
1611 {
1612 SH_INSN_LDS_FPUL_COMPACT, "lds-fpul-compact", "lds", 16,
c7e628df 1613 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1614 },
1615/* lds.l @${rn}+, fpul */
1616 {
1617 SH_INSN_LDSL_FPUL_COMPACT, "ldsl-fpul-compact", "lds.l", 16,
c7e628df 1618 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1619 },
1620/* lds $rn, mach */
1621 {
1622 SH_INSN_LDS_MACH_COMPACT, "lds-mach-compact", "lds", 16,
c7e628df 1623 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1624 },
1625/* lds.l @${rn}+, mach */
1626 {
1627 SH_INSN_LDSL_MACH_COMPACT, "ldsl-mach-compact", "lds.l", 16,
c7e628df 1628 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1629 },
1630/* lds $rn, macl */
1631 {
1632 SH_INSN_LDS_MACL_COMPACT, "lds-macl-compact", "lds", 16,
c7e628df 1633 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1634 },
1635/* lds.l @${rn}+, macl */
1636 {
1637 SH_INSN_LDSL_MACL_COMPACT, "ldsl-macl-compact", "lds.l", 16,
c7e628df 1638 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1639 },
1640/* lds $rn, pr */
1641 {
1642 SH_INSN_LDS_PR_COMPACT, "lds-pr-compact", "lds", 16,
c7e628df 1643 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1644 },
1645/* lds.l @${rn}+, pr */
1646 {
1647 SH_INSN_LDSL_PR_COMPACT, "ldsl-pr-compact", "lds.l", 16,
c7e628df 1648 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1649 },
1650/* mac.l @${rm}+, @${rn}+ */
1651 {
1652 SH_INSN_MACL_COMPACT, "macl-compact", "mac.l", 16,
c7e628df 1653 { 0, { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1654 },
1655/* mac.w @${rm}+, @${rn}+ */
1656 {
1657 SH_INSN_MACW_COMPACT, "macw-compact", "mac.w", 16,
c7e628df 1658 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1659 },
1660/* mov $rm64, $rn64 */
1661 {
1662 SH_INSN_MOV_COMPACT, "mov-compact", "mov", 16,
c7e628df 1663 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_MT, 0 } } } }
cbb38b47
BE		 1664 },
1665/* mov #$imm8, $rn */
1666 {
1667 SH_INSN_MOVI_COMPACT, "movi-compact", "mov", 16,
c7e628df
DB		 1668 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_MT, 0 } } } }
1669 },
1670/* movi20 #$imm20, $rn */
1671 {
1672 SH_INSN_MOVI20_COMPACT, "movi20-compact", "movi20", 32,
1673 { 0|A(32_BIT_INSN), { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1674 },
1675/* mov.b $rm, @$rn */
1676 {
1677 SH_INSN_MOVB1_COMPACT, "movb1-compact", "mov.b", 16,
c7e628df 1678 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1679 },
1680/* mov.b $rm, @-$rn */
1681 {
1682 SH_INSN_MOVB2_COMPACT, "movb2-compact", "mov.b", 16,
c7e628df 1683 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1684 },
1685/* mov.b $rm, @(r0,$rn) */
1686 {
1687 SH_INSN_MOVB3_COMPACT, "movb3-compact", "mov.b", 16,
c7e628df 1688 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1689 },
1690/* mov.b r0, @($imm8, gbr) */
1691 {
1692 SH_INSN_MOVB4_COMPACT, "movb4-compact", "mov.b", 16,
c7e628df 1693 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1694 },
1695/* mov.b r0, @($imm4, $rm) */
1696 {
1697 SH_INSN_MOVB5_COMPACT, "movb5-compact", "mov.b", 16,
c7e628df 1698 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1699 },
1700/* mov.b @$rm, $rn */
1701 {
1702 SH_INSN_MOVB6_COMPACT, "movb6-compact", "mov.b", 16,
c7e628df 1703 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1704 },
1705/* mov.b @${rm}+, $rn */
1706 {
1707 SH_INSN_MOVB7_COMPACT, "movb7-compact", "mov.b", 16,
c7e628df 1708 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1709 },
1710/* mov.b @(r0, $rm), $rn */
1711 {
1712 SH_INSN_MOVB8_COMPACT, "movb8-compact", "mov.b", 16,
c7e628df 1713 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1714 },
1715/* mov.b @($imm8, gbr), r0 */
1716 {
1717 SH_INSN_MOVB9_COMPACT, "movb9-compact", "mov.b", 16,
c7e628df 1718 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1719 },
1720/* mov.b @($imm4, $rm), r0 */
1721 {
1722 SH_INSN_MOVB10_COMPACT, "movb10-compact", "mov.b", 16,
c7e628df 1723 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1724 },
1725/* mov.l $rm, @$rn */
1726 {
1727 SH_INSN_MOVL1_COMPACT, "movl1-compact", "mov.l", 16,
c7e628df 1728 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1729 },
1730/* mov.l $rm, @-$rn */
1731 {
1732 SH_INSN_MOVL2_COMPACT, "movl2-compact", "mov.l", 16,
c7e628df 1733 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1734 },
1735/* mov.l $rm, @(r0, $rn) */
1736 {
1737 SH_INSN_MOVL3_COMPACT, "movl3-compact", "mov.l", 16,
c7e628df 1738 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1739 },
1740/* mov.l r0, @($imm8x4, gbr) */
1741 {
1742 SH_INSN_MOVL4_COMPACT, "movl4-compact", "mov.l", 16,
c7e628df 1743 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1744 },
1745/* mov.l $rm, @($imm4x4, $rn) */
1746 {
1747 SH_INSN_MOVL5_COMPACT, "movl5-compact", "mov.l", 16,
c7e628df 1748 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1749 },
1750/* mov.l @$rm, $rn */
1751 {
1752 SH_INSN_MOVL6_COMPACT, "movl6-compact", "mov.l", 16,
c7e628df 1753 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1754 },
1755/* mov.l @${rm}+, $rn */
1756 {
1757 SH_INSN_MOVL7_COMPACT, "movl7-compact", "mov.l", 16,
c7e628df 1758 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1759 },
1760/* mov.l @(r0, $rm), $rn */
1761 {
1762 SH_INSN_MOVL8_COMPACT, "movl8-compact", "mov.l", 16,
c7e628df 1763 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1764 },
1765/* mov.l @($imm8x4, gbr), r0 */
1766 {
1767 SH_INSN_MOVL9_COMPACT, "movl9-compact", "mov.l", 16,
c7e628df 1768 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1769 },
1770/* mov.l @($imm8x4, pc), $rn */
1771 {
1772 SH_INSN_MOVL10_COMPACT, "movl10-compact", "mov.l", 16,
c7e628df 1773 { 0|A(ILLSLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1774 },
1775/* mov.l @($imm4x4, $rm), $rn */
1776 {
1777 SH_INSN_MOVL11_COMPACT, "movl11-compact", "mov.l", 16,
c7e628df
DB		 1778 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1779 },
1780/* mov.l @($imm12x4, $rm), $rn */
1781 {
1782 SH_INSN_MOVL12_COMPACT, "movl12-compact", "mov.l", 32,
1783 { 0|A(32_BIT_INSN), { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
1784 },
1785/* mov.l $rm, @($imm12x4, $rn) */
1786 {
1787 SH_INSN_MOVL13_COMPACT, "movl13-compact", "mov.l", 32,
1788 { 0|A(32_BIT_INSN), { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH4)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 1789 },
1790/* mov.w $rm, @$rn */
1791 {
1792 SH_INSN_MOVW1_COMPACT, "movw1-compact", "mov.w", 16,
c7e628df 1793 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1794 },
1795/* mov.w $rm, @-$rn */
1796 {
1797 SH_INSN_MOVW2_COMPACT, "movw2-compact", "mov.w", 16,
c7e628df 1798 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1799 },
1800/* mov.w $rm, @(r0, $rn) */
1801 {
1802 SH_INSN_MOVW3_COMPACT, "movw3-compact", "mov.w", 16,
c7e628df 1803 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1804 },
1805/* mov.w r0, @($imm8x2, gbr) */
1806 {
1807 SH_INSN_MOVW4_COMPACT, "movw4-compact", "mov.w", 16,
c7e628df 1808 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47 1809 },
c7e628df 1810/* mov.w r0, @($imm4x2, $rm) */
cbb38b47
BE		 1811 {
1812 SH_INSN_MOVW5_COMPACT, "movw5-compact", "mov.w", 16,
c7e628df 1813 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1814 },
1815/* mov.w @$rm, $rn */
1816 {
1817 SH_INSN_MOVW6_COMPACT, "movw6-compact", "mov.w", 16,
c7e628df 1818 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1819 },
1820/* mov.w @${rm}+, $rn */
1821 {
1822 SH_INSN_MOVW7_COMPACT, "movw7-compact", "mov.w", 16,
c7e628df 1823 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1824 },
1825/* mov.w @(r0, $rm), $rn */
1826 {
1827 SH_INSN_MOVW8_COMPACT, "movw8-compact", "mov.w", 16,
c7e628df 1828 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1829 },
1830/* mov.w @($imm8x2, gbr), r0 */
1831 {
1832 SH_INSN_MOVW9_COMPACT, "movw9-compact", "mov.w", 16,
c7e628df 1833 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1834 },
1835/* mov.w @($imm8x2, pc), $rn */
1836 {
1837 SH_INSN_MOVW10_COMPACT, "movw10-compact", "mov.w", 16,
c7e628df 1838 { 0|A(ILLSLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1839 },
1840/* mov.w @($imm4x2, $rm), r0 */
1841 {
1842 SH_INSN_MOVW11_COMPACT, "movw11-compact", "mov.w", 16,
c7e628df 1843 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1844 },
1845/* mova @($imm8x4, pc), r0 */
1846 {
1847 SH_INSN_MOVA_COMPACT, "mova-compact", "mova", 16,
c7e628df 1848 { 0|A(ILLSLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1849 },
1850/* movca.l r0, @$rn */
1851 {
1852 SH_INSN_MOVCAL_COMPACT, "movcal-compact", "movca.l", 16,
c7e628df
DB		 1853 { 0, { { { (1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1854 },
1855/* movco.l r0, @$rn */
1856 {
1857 SH_INSN_MOVCOL_COMPACT, "movcol-compact", "movco.l", 16,
1858 { 0, { { { (1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1859 },
1860/* movt $rn */
1861 {
1862 SH_INSN_MOVT_COMPACT, "movt-compact", "movt", 16,
c7e628df
DB		 1863 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
1864 },
1865/* movua.l @$rn, r0 */
1866 {
1867 SH_INSN_MOVUAL_COMPACT, "movual-compact", "movua.l", 16,
1868 { 0, { { { (1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
1869 },
1870/* movua.l @$rn+, r0 */
1871 {
1872 SH_INSN_MOVUAL2_COMPACT, "movual2-compact", "movua.l", 16,
1873 { 0, { { { (1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1874 },
1875/* mul.l $rm, $rn */
1876 {
1877 SH_INSN_MULL_COMPACT, "mull-compact", "mul.l", 16,
c7e628df 1878 { 0, { { { (1<<MACH_SH2)|(1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH2A_NOFPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1879 },
1880/* muls.w $rm, $rn */
1881 {
1882 SH_INSN_MULSW_COMPACT, "mulsw-compact", "muls.w", 16,
c7e628df 1883 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1884 },
1885/* mulu.w $rm, $rn */
1886 {
1887 SH_INSN_MULUW_COMPACT, "muluw-compact", "mulu.w", 16,
c7e628df 1888 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1889 },
1890/* neg $rm, $rn */
1891 {
1892 SH_INSN_NEG_COMPACT, "neg-compact", "neg", 16,
c7e628df 1893 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1894 },
1895/* negc $rm, $rn */
1896 {
1897 SH_INSN_NEGC_COMPACT, "negc-compact", "negc", 16,
c7e628df 1898 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1899 },
1900/* nop */
1901 {
1902 SH_INSN_NOP_COMPACT, "nop-compact", "nop", 16,
c7e628df 1903 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_MT, 0 } } } }
cbb38b47
BE		 1904 },
1905/* not $rm64, $rn64 */
1906 {
1907 SH_INSN_NOT_COMPACT, "not-compact", "not", 16,
c7e628df 1908 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1909 },
1910/* ocbi @$rn */
1911 {
1912 SH_INSN_OCBI_COMPACT, "ocbi-compact", "ocbi", 16,
c7e628df 1913 { 0, { { { (1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1914 },
1915/* ocbp @$rn */
1916 {
1917 SH_INSN_OCBP_COMPACT, "ocbp-compact", "ocbp", 16,
c7e628df 1918 { 0, { { { (1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1919 },
1920/* ocbwb @$rn */
1921 {
1922 SH_INSN_OCBWB_COMPACT, "ocbwb-compact", "ocbwb", 16,
c7e628df 1923 { 0, { { { (1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1924 },
1925/* or $rm64, $rn64 */
1926 {
1927 SH_INSN_OR_COMPACT, "or-compact", "or", 16,
c7e628df 1928 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1929 },
1930/* or #$uimm8, r0 */
1931 {
1932 SH_INSN_ORI_COMPACT, "ori-compact", "or", 16,
c7e628df 1933 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1934 },
1935/* or.b #$imm8, @(r0, gbr) */
1936 {
1937 SH_INSN_ORB_COMPACT, "orb-compact", "or.b", 16,
c7e628df 1938 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 1939 },
1940/* pref @$rn */
1941 {
1942 SH_INSN_PREF_COMPACT, "pref-compact", "pref", 16,
c7e628df 1943 { 0, { { { (1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 1944 },
1945/* rotcl $rn */
1946 {
1947 SH_INSN_ROTCL_COMPACT, "rotcl-compact", "rotcl", 16,
c7e628df 1948 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1949 },
1950/* rotcr $rn */
1951 {
1952 SH_INSN_ROTCR_COMPACT, "rotcr-compact", "rotcr", 16,
c7e628df 1953 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1954 },
1955/* rotl $rn */
1956 {
1957 SH_INSN_ROTL_COMPACT, "rotl-compact", "rotl", 16,
c7e628df 1958 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1959 },
1960/* rotr $rn */
1961 {
1962 SH_INSN_ROTR_COMPACT, "rotr-compact", "rotr", 16,
c7e628df 1963 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1964 },
1965/* rts */
1966 {
1967 SH_INSN_RTS_COMPACT, "rts-compact", "rts", 16,
c7e628df 1968 { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_BR, 0 } } } }
cbb38b47
BE		 1969 },
1970/* sets */
1971 {
1972 SH_INSN_SETS_COMPACT, "sets-compact", "sets", 16,
c7e628df 1973 { 0, { { { (1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1974 },
1975/* sett */
1976 {
1977 SH_INSN_SETT_COMPACT, "sett-compact", "sett", 16,
c7e628df 1978 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1979 },
1980/* shad $rm, $rn */
1981 {
1982 SH_INSN_SHAD_COMPACT, "shad-compact", "shad", 16,
c7e628df 1983 { 0, { { { (1<<MACH_SH2A_NOFPU)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1984 },
1985/* shal $rn */
1986 {
1987 SH_INSN_SHAL_COMPACT, "shal-compact", "shal", 16,
c7e628df 1988 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1989 },
1990/* shar $rn */
1991 {
1992 SH_INSN_SHAR_COMPACT, "shar-compact", "shar", 16,
c7e628df 1993 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1994 },
1995/* shld $rm, $rn */
1996 {
1997 SH_INSN_SHLD_COMPACT, "shld-compact", "shld", 16,
c7e628df 1998 { 0, { { { (1<<MACH_SH3)|(1<<MACH_SH3E)|(1<<MACH_SH4_NOFPU)|(1<<MACH_SH4)|(1<<MACH_SH4A_NOFPU)|(1<<MACH_SH4A)|(1<<MACH_SH4AL)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 1999 },
2000/* shll $rn */
2001 {
2002 SH_INSN_SHLL_COMPACT, "shll-compact", "shll", 16,
c7e628df 2003 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2004 },
2005/* shll2 $rn */
2006 {
2007 SH_INSN_SHLL2_COMPACT, "shll2-compact", "shll2", 16,
c7e628df 2008 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2009 },
2010/* shll8 $rn */
2011 {
2012 SH_INSN_SHLL8_COMPACT, "shll8-compact", "shll8", 16,
c7e628df 2013 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2014 },
2015/* shll16 $rn */
2016 {
2017 SH_INSN_SHLL16_COMPACT, "shll16-compact", "shll16", 16,
c7e628df 2018 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2019 },
2020/* shlr $rn */
2021 {
2022 SH_INSN_SHLR_COMPACT, "shlr-compact", "shlr", 16,
c7e628df 2023 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2024 },
2025/* shlr2 $rn */
2026 {
2027 SH_INSN_SHLR2_COMPACT, "shlr2-compact", "shlr2", 16,
c7e628df 2028 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2029 },
2030/* shlr8 $rn */
2031 {
2032 SH_INSN_SHLR8_COMPACT, "shlr8-compact", "shlr8", 16,
c7e628df 2033 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2034 },
2035/* shlr16 $rn */
2036 {
2037 SH_INSN_SHLR16_COMPACT, "shlr16-compact", "shlr16", 16,
c7e628df 2038 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2039 },
2040/* stc gbr, $rn */
2041 {
2042 SH_INSN_STC_GBR_COMPACT, "stc-gbr-compact", "stc", 16,
c7e628df
DB		 2043 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
2044 },
2045/* stc vbr, $rn */
2046 {
2047 SH_INSN_STC_VBR_COMPACT, "stc-vbr-compact", "stc", 16,
2048 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2049 },
2050/* stc.l gbr, @-$rn */
2051 {
2052 SH_INSN_STCL_GBR_COMPACT, "stcl-gbr-compact", "stc.l", 16,
c7e628df
DB		 2053 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
2054 },
2055/* stc.l vbr, @-$rn */
2056 {
2057 SH_INSN_STCL_VBR_COMPACT, "stcl-vbr-compact", "stc.l", 16,
2058 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2059 },
2060/* sts fpscr, $rn */
2061 {
2062 SH_INSN_STS_FPSCR_COMPACT, "sts-fpscr-compact", "sts", 16,
c7e628df 2063 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2064 },
2065/* sts.l fpscr, @-$rn */
2066 {
2067 SH_INSN_STSL_FPSCR_COMPACT, "stsl-fpscr-compact", "sts.l", 16,
c7e628df 2068 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2069 },
2070/* sts fpul, $rn */
2071 {
2072 SH_INSN_STS_FPUL_COMPACT, "sts-fpul-compact", "sts", 16,
c7e628df 2073 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_LS, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2074 },
2075/* sts.l fpul, @-$rn */
2076 {
2077 SH_INSN_STSL_FPUL_COMPACT, "stsl-fpul-compact", "sts.l", 16,
c7e628df 2078 { 0, { { { (1<<MACH_SH2E)|(1<<MACH_SH2A_FPU)|(1<<MACH_SH3E)|(1<<MACH_SH4)|(1<<MACH_SH4A)|(1<<MACH_SH5), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2079 },
2080/* sts mach, $rn */
2081 {
2082 SH_INSN_STS_MACH_COMPACT, "sts-mach-compact", "sts", 16,
c7e628df 2083 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2084 },
2085/* sts.l mach, @-$rn */
2086 {
2087 SH_INSN_STSL_MACH_COMPACT, "stsl-mach-compact", "sts.l", 16,
c7e628df 2088 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2089 },
2090/* sts macl, $rn */
2091 {
2092 SH_INSN_STS_MACL_COMPACT, "sts-macl-compact", "sts", 16,
c7e628df 2093 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2094 },
2095/* sts.l macl, @-$rn */
2096 {
2097 SH_INSN_STSL_MACL_COMPACT, "stsl-macl-compact", "sts.l", 16,
c7e628df 2098 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2099 },
2100/* sts pr, $rn */
2101 {
2102 SH_INSN_STS_PR_COMPACT, "sts-pr-compact", "sts", 16,
c7e628df 2103 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2104 },
2105/* sts.l pr, @-$rn */
2106 {
2107 SH_INSN_STSL_PR_COMPACT, "stsl-pr-compact", "sts.l", 16,
c7e628df 2108 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_LS, 0 } } } }
cbb38b47
BE		 2109 },
2110/* sub $rm, $rn */
2111 {
2112 SH_INSN_SUB_COMPACT, "sub-compact", "sub", 16,
c7e628df 2113 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2114 },
2115/* subc $rm, $rn */
2116 {
2117 SH_INSN_SUBC_COMPACT, "subc-compact", "subc", 16,
c7e628df 2118 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2119 },
2120/* subv $rm, $rn */
2121 {
2122 SH_INSN_SUBV_COMPACT, "subv-compact", "subv", 16,
c7e628df 2123 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2124 },
2125/* swap.b $rm, $rn */
2126 {
2127 SH_INSN_SWAPB_COMPACT, "swapb-compact", "swap.b", 16,
c7e628df 2128 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2129 },
2130/* swap.w $rm, $rn */
2131 {
2132 SH_INSN_SWAPW_COMPACT, "swapw-compact", "swap.w", 16,
c7e628df 2133 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2134 },
2135/* tas.b @$rn */
2136 {
2137 SH_INSN_TASB_COMPACT, "tasb-compact", "tas.b", 16,
c7e628df 2138 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 2139 },
2140/* trapa #$uimm8 */
2141 {
2142 SH_INSN_TRAPA_COMPACT, "trapa-compact", "trapa", 16,
c7e628df 2143 { 0|A(ILLSLOT), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 2144 },
2145/* tst $rm, $rn */
2146 {
2147 SH_INSN_TST_COMPACT, "tst-compact", "tst", 16,
c7e628df 2148 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2149 },
2150/* tst #$uimm8, r0 */
2151 {
2152 SH_INSN_TSTI_COMPACT, "tsti-compact", "tst", 16,
c7e628df 2153 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_MT, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2154 },
2155/* tst.b #$imm8, @(r0, gbr) */
2156 {
2157 SH_INSN_TSTB_COMPACT, "tstb-compact", "tst.b", 16,
c7e628df 2158 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 2159 },
2160/* xor $rm64, $rn64 */
2161 {
2162 SH_INSN_XOR_COMPACT, "xor-compact", "xor", 16,
c7e628df 2163 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2164 },
2165/* xor #$uimm8, r0 */
2166 {
2167 SH_INSN_XORI_COMPACT, "xori-compact", "xor", 16,
c7e628df 2168 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2169 },
2170/* xor.b #$imm8, @(r0, gbr) */
2171 {
2172 SH_INSN_XORB_COMPACT, "xorb-compact", "xor.b", 16,
c7e628df 2173 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_CO, 0 } }, { { SH4A_GROUP_CO, 0 } } } }
cbb38b47
BE		 2174 },
2175/* xtrct $rm, $rn */
2176 {
2177 SH_INSN_XTRCT_COMPACT, "xtrct-compact", "xtrct", 16,
c7e628df 2178 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { SH4_GROUP_EX, 0 } }, { { SH4A_GROUP_EX, 0 } } } }
cbb38b47
BE		 2179 },
2180/* add $rm, $rn, $rd */
2181 {
2182 SH_INSN_ADD, "add", "add", 32,
c7e628df 2183 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2184 },
2185/* add.l $rm, $rn, $rd */
2186 {
2187 SH_INSN_ADDL, "addl", "add.l", 32,
c7e628df 2188 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2189 },
2190/* addi $rm, $disp10, $rd */
2191 {
2192 SH_INSN_ADDI, "addi", "addi", 32,
c7e628df 2193 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2194 },
2195/* addi.l $rm, $disp10, $rd */
2196 {
2197 SH_INSN_ADDIL, "addil", "addi.l", 32,
c7e628df 2198 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2199 },
2200/* addz.l $rm, $rn, $rd */
2201 {
2202 SH_INSN_ADDZL, "addzl", "addz.l", 32,
c7e628df 2203 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2204 },
2205/* alloco $rm, $disp6x32 */
2206 {
2207 SH_INSN_ALLOCO, "alloco", "alloco", 32,
c7e628df 2208 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2209 },
2210/* and $rm, $rn, $rd */
2211 {
2212 SH_INSN_AND, "and", "and", 32,
c7e628df 2213 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2214 },
2215/* andc $rm, $rn, $rd */
2216 {
2217 SH_INSN_ANDC, "andc", "andc", 32,
c7e628df 2218 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2219 },
2220/* andi $rm, $disp10, $rd */
2221 {
2222 SH_INSN_ANDI, "andi", "andi", 32,
c7e628df 2223 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2224 },
2225/* beq$likely $rm, $rn, $tra */
2226 {
2227 SH_INSN_BEQ, "beq", "beq", 32,
c7e628df 2228 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2229 },
2230/* beqi$likely $rm, $imm6, $tra */
2231 {
2232 SH_INSN_BEQI, "beqi", "beqi", 32,
c7e628df 2233 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2234 },
2235/* bge$likely $rm, $rn, $tra */
2236 {
2237 SH_INSN_BGE, "bge", "bge", 32,
c7e628df 2238 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2239 },
2240/* bgeu$likely $rm, $rn, $tra */
2241 {
2242 SH_INSN_BGEU, "bgeu", "bgeu", 32,
c7e628df 2243 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2244 },
2245/* bgt$likely $rm, $rn, $tra */
2246 {
2247 SH_INSN_BGT, "bgt", "bgt", 32,
c7e628df 2248 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2249 },
2250/* bgtu$likely $rm, $rn, $tra */
2251 {
2252 SH_INSN_BGTU, "bgtu", "bgtu", 32,
c7e628df 2253 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2254 },
2255/* blink $trb, $rd */
2256 {
2257 SH_INSN_BLINK, "blink", "blink", 32,
c7e628df 2258 { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2259 },
2260/* bne$likely $rm, $rn, $tra */
2261 {
2262 SH_INSN_BNE, "bne", "bne", 32,
c7e628df 2263 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2264 },
2265/* bnei$likely $rm, $imm6, $tra */
2266 {
2267 SH_INSN_BNEI, "bnei", "bnei", 32,
c7e628df 2268 { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2269 },
2270/* brk */
2271 {
2272 SH_INSN_BRK, "brk", "brk", 32,
c7e628df 2273 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2274 },
2275/* byterev $rm, $rd */
2276 {
2277 SH_INSN_BYTEREV, "byterev", "byterev", 32,
c7e628df 2278 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2279 },
2280/* cmpeq $rm, $rn, $rd */
2281 {
2282 SH_INSN_CMPEQ, "cmpeq", "cmpeq", 32,
c7e628df 2283 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2284 },
2285/* cmpgt $rm, $rn, $rd */
2286 {
2287 SH_INSN_CMPGT, "cmpgt", "cmpgt", 32,
c7e628df 2288 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2289 },
2290/* cmpgtu $rm,$rn, $rd */
2291 {
2292 SH_INSN_CMPGTU, "cmpgtu", "cmpgtu", 32,
c7e628df 2293 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2294 },
2295/* cmveq $rm, $rn, $rd */
2296 {
2297 SH_INSN_CMVEQ, "cmveq", "cmveq", 32,
c7e628df 2298 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2299 },
2300/* cmvne $rm, $rn, $rd */
2301 {
2302 SH_INSN_CMVNE, "cmvne", "cmvne", 32,
c7e628df 2303 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2304 },
2305/* fabs.d $drgh, $drf */
2306 {
2307 SH_INSN_FABSD, "fabsd", "fabs.d", 32,
c7e628df 2308 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2309 },
2310/* fabs.s $frgh, $frf */
2311 {
2312 SH_INSN_FABSS, "fabss", "fabs.s", 32,
c7e628df 2313 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2314 },
2315/* fadd.d $drg, $drh, $drf */
2316 {
2317 SH_INSN_FADDD, "faddd", "fadd.d", 32,
c7e628df 2318 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2319 },
2320/* fadd.s $frg, $frh, $frf */
2321 {
2322 SH_INSN_FADDS, "fadds", "fadd.s", 32,
c7e628df 2323 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2324 },
2325/* fcmpeq.d $drg, $drh, $rd */
2326 {
2327 SH_INSN_FCMPEQD, "fcmpeqd", "fcmpeq.d", 32,
c7e628df 2328 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2329 },
2330/* fcmpeq.s $frg, $frh, $rd */
2331 {
2332 SH_INSN_FCMPEQS, "fcmpeqs", "fcmpeq.s", 32,
c7e628df 2333 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2334 },
2335/* fcmpge.d $drg, $drh, $rd */
2336 {
2337 SH_INSN_FCMPGED, "fcmpged", "fcmpge.d", 32,
c7e628df 2338 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2339 },
2340/* fcmpge.s $frg, $frh, $rd */
2341 {
2342 SH_INSN_FCMPGES, "fcmpges", "fcmpge.s", 32,
c7e628df 2343 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2344 },
2345/* fcmpgt.d $drg, $drh, $rd */
2346 {
2347 SH_INSN_FCMPGTD, "fcmpgtd", "fcmpgt.d", 32,
c7e628df 2348 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2349 },
2350/* fcmpgt.s $frg, $frh, $rd */
2351 {
2352 SH_INSN_FCMPGTS, "fcmpgts", "fcmpgt.s", 32,
c7e628df 2353 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2354 },
2355/* fcmpun.d $drg, $drh, $rd */
2356 {
2357 SH_INSN_FCMPUND, "fcmpund", "fcmpun.d", 32,
c7e628df 2358 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2359 },
2360/* fcmpun.s $frg, $frh, $rd */
2361 {
2362 SH_INSN_FCMPUNS, "fcmpuns", "fcmpun.s", 32,
c7e628df 2363 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2364 },
2365/* fcnv.ds $drgh, $frf */
2366 {
2367 SH_INSN_FCNVDS, "fcnvds", "fcnv.ds", 32,
c7e628df 2368 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2369 },
2370/* fcnv.sd $frgh, $drf */
2371 {
2372 SH_INSN_FCNVSD, "fcnvsd", "fcnv.sd", 32,
c7e628df 2373 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2374 },
2375/* fdiv.d $drg, $drh, $drf */
2376 {
2377 SH_INSN_FDIVD, "fdivd", "fdiv.d", 32,
c7e628df 2378 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2379 },
2380/* fdiv.s $frg, $frh, $frf */
2381 {
2382 SH_INSN_FDIVS, "fdivs", "fdiv.s", 32,
c7e628df 2383 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2384 },
2385/* fgetscr $frf */
2386 {
2387 SH_INSN_FGETSCR, "fgetscr", "fgetscr", 32,
c7e628df 2388 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2389 },
2390/* fipr.s $fvg, $fvh, $frf */
2391 {
2392 SH_INSN_FIPRS, "fiprs", "fipr.s", 32,
c7e628df 2393 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2394 },
2395/* fld.d $rm, $disp10x8, $drf */
2396 {
2397 SH_INSN_FLDD, "fldd", "fld.d", 32,
c7e628df 2398 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2399 },
2400/* fld.p $rm, $disp10x8, $fpf */
2401 {
2402 SH_INSN_FLDP, "fldp", "fld.p", 32,
c7e628df 2403 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2404 },
2405/* fld.s $rm, $disp10x4, $frf */
2406 {
2407 SH_INSN_FLDS, "flds", "fld.s", 32,
c7e628df 2408 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2409 },
2410/* fldx.d $rm, $rn, $drf */
2411 {
2412 SH_INSN_FLDXD, "fldxd", "fldx.d", 32,
c7e628df 2413 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2414 },
2415/* fldx.p $rm, $rn, $fpf */
2416 {
2417 SH_INSN_FLDXP, "fldxp", "fldx.p", 32,
c7e628df 2418 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2419 },
2420/* fldx.s $rm, $rn, $frf */
2421 {
2422 SH_INSN_FLDXS, "fldxs", "fldx.s", 32,
c7e628df 2423 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2424 },
2425/* float.ld $frgh, $drf */
2426 {
2427 SH_INSN_FLOATLD, "floatld", "float.ld", 32,
c7e628df 2428 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2429 },
2430/* float.ls $frgh, $frf */
2431 {
2432 SH_INSN_FLOATLS, "floatls", "float.ls", 32,
c7e628df 2433 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2434 },
2435/* float.qd $drgh, $drf */
2436 {
2437 SH_INSN_FLOATQD, "floatqd", "float.qd", 32,
c7e628df 2438 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2439 },
2440/* float.qs $drgh, $frf */
2441 {
2442 SH_INSN_FLOATQS, "floatqs", "float.qs", 32,
c7e628df 2443 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2444 },
2445/* fmac.s $frg, $frh, $frf */
2446 {
2447 SH_INSN_FMACS, "fmacs", "fmac.s", 32,
c7e628df 2448 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2449 },
2450/* fmov.d $drgh, $drf */
2451 {
2452 SH_INSN_FMOVD, "fmovd", "fmov.d", 32,
c7e628df 2453 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2454 },
2455/* fmov.dq $drgh, $rd */
2456 {
2457 SH_INSN_FMOVDQ, "fmovdq", "fmov.dq", 32,
c7e628df 2458 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2459 },
2460/* fmov.ls $rm, $frf */
2461 {
2462 SH_INSN_FMOVLS, "fmovls", "fmov.ls", 32,
c7e628df 2463 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2464 },
2465/* fmov.qd $rm, $drf */
2466 {
2467 SH_INSN_FMOVQD, "fmovqd", "fmov.qd", 32,
c7e628df 2468 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2469 },
2470/* fmov.s $frgh, $frf */
2471 {
2472 SH_INSN_FMOVS, "fmovs", "fmov.s", 32,
c7e628df 2473 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2474 },
2475/* fmov.sl $frgh, $rd */
2476 {
2477 SH_INSN_FMOVSL, "fmovsl", "fmov.sl", 32,
c7e628df 2478 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2479 },
2480/* fmul.d $drg, $drh, $drf */
2481 {
2482 SH_INSN_FMULD, "fmuld", "fmul.d", 32,
c7e628df 2483 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2484 },
2485/* fmul.s $frg, $frh, $frf */
2486 {
2487 SH_INSN_FMULS, "fmuls", "fmul.s", 32,
c7e628df 2488 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2489 },
2490/* fneg.d $drgh, $drf */
2491 {
2492 SH_INSN_FNEGD, "fnegd", "fneg.d", 32,
c7e628df 2493 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2494 },
2495/* fneg.s $frgh, $frf */
2496 {
2497 SH_INSN_FNEGS, "fnegs", "fneg.s", 32,
c7e628df 2498 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2499 },
2500/* fputscr $frgh */
2501 {
2502 SH_INSN_FPUTSCR, "fputscr", "fputscr", 32,
c7e628df 2503 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2504 },
2505/* fsqrt.d $drgh, $drf */
2506 {
2507 SH_INSN_FSQRTD, "fsqrtd", "fsqrt.d", 32,
c7e628df 2508 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2509 },
2510/* fsqrt.s $frgh, $frf */
2511 {
2512 SH_INSN_FSQRTS, "fsqrts", "fsqrt.s", 32,
c7e628df 2513 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2514 },
2515/* fst.d $rm, $disp10x8, $drf */
2516 {
2517 SH_INSN_FSTD, "fstd", "fst.d", 32,
c7e628df 2518 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2519 },
2520/* fst.p $rm, $disp10x8, $fpf */
2521 {
2522 SH_INSN_FSTP, "fstp", "fst.p", 32,
c7e628df 2523 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2524 },
2525/* fst.s $rm, $disp10x4, $frf */
2526 {
2527 SH_INSN_FSTS, "fsts", "fst.s", 32,
c7e628df 2528 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2529 },
2530/* fstx.d $rm, $rn, $drf */
2531 {
2532 SH_INSN_FSTXD, "fstxd", "fstx.d", 32,
c7e628df 2533 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2534 },
2535/* fstx.p $rm, $rn, $fpf */
2536 {
2537 SH_INSN_FSTXP, "fstxp", "fstx.p", 32,
c7e628df 2538 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2539 },
2540/* fstx.s $rm, $rn, $frf */
2541 {
2542 SH_INSN_FSTXS, "fstxs", "fstx.s", 32,
c7e628df 2543 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2544 },
2545/* fsub.d $drg, $drh, $drf */
2546 {
2547 SH_INSN_FSUBD, "fsubd", "fsub.d", 32,
c7e628df 2548 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2549 },
2550/* fsub.s $frg, $frh, $frf */
2551 {
2552 SH_INSN_FSUBS, "fsubs", "fsub.s", 32,
c7e628df 2553 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2554 },
2555/* ftrc.dl $drgh, $frf */
2556 {
2557 SH_INSN_FTRCDL, "ftrcdl", "ftrc.dl", 32,
c7e628df 2558 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2559 },
2560/* ftrc.sl $frgh, $frf */
2561 {
2562 SH_INSN_FTRCSL, "ftrcsl", "ftrc.sl", 32,
c7e628df 2563 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2564 },
2565/* ftrc.dq $drgh, $drf */
2566 {
2567 SH_INSN_FTRCDQ, "ftrcdq", "ftrc.dq", 32,
c7e628df 2568 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2569 },
2570/* ftrc.sq $frgh, $drf */
2571 {
2572 SH_INSN_FTRCSQ, "ftrcsq", "ftrc.sq", 32,
c7e628df 2573 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2574 },
2575/* ftrv.s $mtrxg, $fvh, $fvf */
2576 {
2577 SH_INSN_FTRVS, "ftrvs", "ftrv.s", 32,
c7e628df 2578 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2579 },
2580/* getcfg $rm, $disp6, $rd */
2581 {
2582 SH_INSN_GETCFG, "getcfg", "getcfg", 32,
c7e628df 2583 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2584 },
2585/* getcon $crk, $rd */
2586 {
2587 SH_INSN_GETCON, "getcon", "getcon", 32,
c7e628df 2588 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2589 },
2590/* gettr $trb, $rd */
2591 {
2592 SH_INSN_GETTR, "gettr", "gettr", 32,
c7e628df 2593 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2594 },
2595/* icbi $rm, $disp6x32 */
2596 {
2597 SH_INSN_ICBI, "icbi", "icbi", 32,
c7e628df 2598 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2599 },
2600/* ld.b $rm, $disp10, $rd */
2601 {
2602 SH_INSN_LDB, "ldb", "ld.b", 32,
c7e628df 2603 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2604 },
2605/* ld.l $rm, $disp10x4, $rd */
2606 {
2607 SH_INSN_LDL, "ldl", "ld.l", 32,
c7e628df 2608 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2609 },
2610/* ld.q $rm, $disp10x8, $rd */
2611 {
2612 SH_INSN_LDQ, "ldq", "ld.q", 32,
c7e628df 2613 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2614 },
2615/* ld.ub $rm, $disp10, $rd */
2616 {
2617 SH_INSN_LDUB, "ldub", "ld.ub", 32,
c7e628df 2618 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2619 },
2620/* ld.uw $rm, $disp10x2, $rd */
2621 {
2622 SH_INSN_LDUW, "lduw", "ld.uw", 32,
c7e628df 2623 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2624 },
2625/* ld.w $rm, $disp10x2, $rd */
2626 {
2627 SH_INSN_LDW, "ldw", "ld.w", 32,
c7e628df 2628 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2629 },
2630/* ldhi.l $rm, $disp6, $rd */
2631 {
2632 SH_INSN_LDHIL, "ldhil", "ldhi.l", 32,
c7e628df 2633 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2634 },
2635/* ldhi.q $rm, $disp6, $rd */
2636 {
2637 SH_INSN_LDHIQ, "ldhiq", "ldhi.q", 32,
c7e628df 2638 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2639 },
2640/* ldlo.l $rm, $disp6, $rd */
2641 {
2642 SH_INSN_LDLOL, "ldlol", "ldlo.l", 32,
c7e628df 2643 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2644 },
2645/* ldlo.q $rm, $disp6, $rd */
2646 {
2647 SH_INSN_LDLOQ, "ldloq", "ldlo.q", 32,
c7e628df 2648 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2649 },
2650/* ldx.b $rm, $rn, $rd */
2651 {
2652 SH_INSN_LDXB, "ldxb", "ldx.b", 32,
c7e628df 2653 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2654 },
2655/* ldx.l $rm, $rn, $rd */
2656 {
2657 SH_INSN_LDXL, "ldxl", "ldx.l", 32,
c7e628df 2658 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2659 },
2660/* ldx.q $rm, $rn, $rd */
2661 {
2662 SH_INSN_LDXQ, "ldxq", "ldx.q", 32,
c7e628df 2663 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2664 },
2665/* ldx.ub $rm, $rn, $rd */
2666 {
2667 SH_INSN_LDXUB, "ldxub", "ldx.ub", 32,
c7e628df 2668 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2669 },
2670/* ldx.uw $rm, $rn, $rd */
2671 {
2672 SH_INSN_LDXUW, "ldxuw", "ldx.uw", 32,
c7e628df 2673 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2674 },
2675/* ldx.w $rm, $rn, $rd */
2676 {
2677 SH_INSN_LDXW, "ldxw", "ldx.w", 32,
c7e628df 2678 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2679 },
2680/* mabs.l $rm, $rd */
2681 {
2682 SH_INSN_MABSL, "mabsl", "mabs.l", 32,
c7e628df 2683 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2684 },
2685/* mabs.w $rm, $rd */
2686 {
2687 SH_INSN_MABSW, "mabsw", "mabs.w", 32,
c7e628df 2688 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2689 },
2690/* madd.l $rm, $rn, $rd */
2691 {
2692 SH_INSN_MADDL, "maddl", "madd.l", 32,
c7e628df 2693 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2694 },
2695/* madd.w $rm, $rn, $rd */
2696 {
2697 SH_INSN_MADDW, "maddw", "madd.w", 32,
c7e628df 2698 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2699 },
2700/* madds.l $rm, $rn, $rd */
2701 {
2702 SH_INSN_MADDSL, "maddsl", "madds.l", 32,
c7e628df 2703 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2704 },
2705/* madds.ub $rm, $rn, $rd */
2706 {
2707 SH_INSN_MADDSUB, "maddsub", "madds.ub", 32,
c7e628df 2708 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2709 },
2710/* madds.w $rm, $rn, $rd */
2711 {
2712 SH_INSN_MADDSW, "maddsw", "madds.w", 32,
c7e628df 2713 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2714 },
2715/* mcmpeq.b $rm, $rn, $rd */
2716 {
2717 SH_INSN_MCMPEQB, "mcmpeqb", "mcmpeq.b", 32,
c7e628df 2718 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2719 },
2720/* mcmpeq.l $rm, $rn, $rd */
2721 {
2722 SH_INSN_MCMPEQL, "mcmpeql", "mcmpeq.l", 32,
c7e628df 2723 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2724 },
2725/* mcmpeq.w $rm, $rn, $rd */
2726 {
2727 SH_INSN_MCMPEQW, "mcmpeqw", "mcmpeq.w", 32,
c7e628df 2728 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2729 },
2730/* mcmpgt.l $rm, $rn, $rd */
2731 {
2732 SH_INSN_MCMPGTL, "mcmpgtl", "mcmpgt.l", 32,
c7e628df 2733 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2734 },
2735/* mcmpgt.ub $rm, $rn, $rd */
2736 {
2737 SH_INSN_MCMPGTUB, "mcmpgtub", "mcmpgt.ub", 32,
c7e628df 2738 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2739 },
2740/* mcmpgt.w $rm, $rn, $rd */
2741 {
2742 SH_INSN_MCMPGTW, "mcmpgtw", "mcmpgt.w", 32,
c7e628df 2743 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2744 },
2745/* mcmv $rm, $rn, $rd */
2746 {
2747 SH_INSN_MCMV, "mcmv", "mcmv", 32,
c7e628df 2748 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2749 },
2750/* mcnvs.lw $rm, $rn, $rd */
2751 {
2752 SH_INSN_MCNVSLW, "mcnvslw", "mcnvs.lw", 32,
c7e628df 2753 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2754 },
2755/* mcnvs.wb $rm, $rn, $rd */
2756 {
2757 SH_INSN_MCNVSWB, "mcnvswb", "mcnvs.wb", 32,
c7e628df 2758 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2759 },
2760/* mcnvs.wub $rm, $rn, $rd */
2761 {
2762 SH_INSN_MCNVSWUB, "mcnvswub", "mcnvs.wub", 32,
c7e628df 2763 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2764 },
2765/* mextr1 $rm, $rn, $rd */
2766 {
2767 SH_INSN_MEXTR1, "mextr1", "mextr1", 32,
c7e628df 2768 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2769 },
2770/* mextr2 $rm, $rn, $rd */
2771 {
2772 SH_INSN_MEXTR2, "mextr2", "mextr2", 32,
c7e628df 2773 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2774 },
2775/* mextr3 $rm, $rn, $rd */
2776 {
2777 SH_INSN_MEXTR3, "mextr3", "mextr3", 32,
c7e628df 2778 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2779 },
2780/* mextr4 $rm, $rn, $rd */
2781 {
2782 SH_INSN_MEXTR4, "mextr4", "mextr4", 32,
c7e628df 2783 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2784 },
2785/* mextr5 $rm, $rn, $rd */
2786 {
2787 SH_INSN_MEXTR5, "mextr5", "mextr5", 32,
c7e628df 2788 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2789 },
2790/* mextr6 $rm, $rn, $rd */
2791 {
2792 SH_INSN_MEXTR6, "mextr6", "mextr6", 32,
c7e628df 2793 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2794 },
2795/* mextr7 $rm, $rn, $rd */
2796 {
2797 SH_INSN_MEXTR7, "mextr7", "mextr7", 32,
c7e628df 2798 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2799 },
2800/* mmacfx.wl $rm, $rn, $rd */
2801 {
2802 SH_INSN_MMACFXWL, "mmacfxwl", "mmacfx.wl", 32,
c7e628df 2803 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2804 },
2805/* mmacnfx.wl $rm, $rn, $rd */
2806 {
2807 SH_INSN_MMACNFX_WL, "mmacnfx.wl", "mmacnfx.wl", 32,
c7e628df 2808 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2809 },
2810/* mmul.l $rm, $rn, $rd */
2811 {
2812 SH_INSN_MMULL, "mmull", "mmul.l", 32,
c7e628df 2813 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2814 },
2815/* mmul.w $rm, $rn, $rd */
2816 {
2817 SH_INSN_MMULW, "mmulw", "mmul.w", 32,
c7e628df 2818 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2819 },
2820/* mmulfx.l $rm, $rn, $rd */
2821 {
2822 SH_INSN_MMULFXL, "mmulfxl", "mmulfx.l", 32,
c7e628df 2823 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2824 },
2825/* mmulfx.w $rm, $rn, $rd */
2826 {
2827 SH_INSN_MMULFXW, "mmulfxw", "mmulfx.w", 32,
c7e628df 2828 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2829 },
2830/* mmulfxrp.w $rm, $rn, $rd */
2831 {
2832 SH_INSN_MMULFXRPW, "mmulfxrpw", "mmulfxrp.w", 32,
c7e628df 2833 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2834 },
2835/* mmulhi.wl $rm, $rn, $rd */
2836 {
2837 SH_INSN_MMULHIWL, "mmulhiwl", "mmulhi.wl", 32,
c7e628df 2838 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2839 },
2840/* mmullo.wl $rm, $rn, $rd */
2841 {
2842 SH_INSN_MMULLOWL, "mmullowl", "mmullo.wl", 32,
c7e628df 2843 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2844 },
2845/* mmulsum.wq $rm, $rn, $rd */
2846 {
2847 SH_INSN_MMULSUMWQ, "mmulsumwq", "mmulsum.wq", 32,
c7e628df 2848 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2849 },
2850/* movi $imm16, $rd */
2851 {
2852 SH_INSN_MOVI, "movi", "movi", 32,
c7e628df 2853 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2854 },
2855/* mperm.w $rm, $rn, $rd */
2856 {
2857 SH_INSN_MPERMW, "mpermw", "mperm.w", 32,
c7e628df 2858 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2859 },
2860/* msad.ubq $rm, $rn, $rd */
2861 {
2862 SH_INSN_MSADUBQ, "msadubq", "msad.ubq", 32,
c7e628df 2863 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2864 },
2865/* mshalds.l $rm, $rn, $rd */
2866 {
2867 SH_INSN_MSHALDSL, "mshaldsl", "mshalds.l", 32,
c7e628df 2868 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2869 },
2870/* mshalds.w $rm, $rn, $rd */
2871 {
2872 SH_INSN_MSHALDSW, "mshaldsw", "mshalds.w", 32,
c7e628df 2873 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2874 },
2875/* mshard.l $rm, $rn, $rd */
2876 {
2877 SH_INSN_MSHARDL, "mshardl", "mshard.l", 32,
c7e628df 2878 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2879 },
2880/* mshard.w $rm, $rn, $rd */
2881 {
2882 SH_INSN_MSHARDW, "mshardw", "mshard.w", 32,
c7e628df 2883 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2884 },
2885/* mshards.q $rm, $rn, $rd */
2886 {
2887 SH_INSN_MSHARDSQ, "mshardsq", "mshards.q", 32,
c7e628df 2888 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2889 },
2890/* mshfhi.b $rm, $rn, $rd */
2891 {
2892 SH_INSN_MSHFHIB, "mshfhib", "mshfhi.b", 32,
c7e628df 2893 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2894 },
2895/* mshfhi.l $rm, $rn, $rd */
2896 {
2897 SH_INSN_MSHFHIL, "mshfhil", "mshfhi.l", 32,
c7e628df 2898 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2899 },
2900/* mshfhi.w $rm, $rn, $rd */
2901 {
2902 SH_INSN_MSHFHIW, "mshfhiw", "mshfhi.w", 32,
c7e628df 2903 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2904 },
2905/* mshflo.b $rm, $rn, $rd */
2906 {
2907 SH_INSN_MSHFLOB, "mshflob", "mshflo.b", 32,
c7e628df 2908 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2909 },
2910/* mshflo.l $rm, $rn, $rd */
2911 {
2912 SH_INSN_MSHFLOL, "mshflol", "mshflo.l", 32,
c7e628df 2913 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2914 },
2915/* mshflo.w $rm, $rn, $rd */
2916 {
2917 SH_INSN_MSHFLOW, "mshflow", "mshflo.w", 32,
c7e628df 2918 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2919 },
2920/* mshlld.l $rm, $rn, $rd */
2921 {
2922 SH_INSN_MSHLLDL, "mshlldl", "mshlld.l", 32,
c7e628df 2923 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2924 },
2925/* mshlld.w $rm, $rn, $rd */
2926 {
2927 SH_INSN_MSHLLDW, "mshlldw", "mshlld.w", 32,
c7e628df 2928 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2929 },
2930/* mshlrd.l $rm, $rn, $rd */
2931 {
2932 SH_INSN_MSHLRDL, "mshlrdl", "mshlrd.l", 32,
c7e628df 2933 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2934 },
2935/* mshlrd.w $rm, $rn, $rd */
2936 {
2937 SH_INSN_MSHLRDW, "mshlrdw", "mshlrd.w", 32,
c7e628df 2938 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2939 },
2940/* msub.l $rm, $rn, $rd */
2941 {
2942 SH_INSN_MSUBL, "msubl", "msub.l", 32,
c7e628df 2943 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2944 },
2945/* msub.w $rm, $rn, $rd */
2946 {
2947 SH_INSN_MSUBW, "msubw", "msub.w", 32,
c7e628df 2948 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2949 },
2950/* msubs.l $rm, $rn, $rd */
2951 {
2952 SH_INSN_MSUBSL, "msubsl", "msubs.l", 32,
c7e628df 2953 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2954 },
2955/* msubs.ub $rm, $rn, $rd */
2956 {
2957 SH_INSN_MSUBSUB, "msubsub", "msubs.ub", 32,
c7e628df 2958 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2959 },
2960/* msubs.w $rm, $rn, $rd */
2961 {
2962 SH_INSN_MSUBSW, "msubsw", "msubs.w", 32,
c7e628df 2963 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2964 },
2965/* muls.l $rm, $rn, $rd */
2966 {
2967 SH_INSN_MULSL, "mulsl", "muls.l", 32,
c7e628df 2968 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2969 },
2970/* mulu.l $rm, $rn, $rd */
2971 {
2972 SH_INSN_MULUL, "mulul", "mulu.l", 32,
c7e628df 2973 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2974 },
2975/* nop */
2976 {
2977 SH_INSN_NOP, "nop", "nop", 32,
c7e628df 2978 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2979 },
2980/* nsb $rm, $rd */
2981 {
2982 SH_INSN_NSB, "nsb", "nsb", 32,
c7e628df 2983 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2984 },
2985/* ocbi $rm, $disp6x32 */
2986 {
2987 SH_INSN_OCBI, "ocbi", "ocbi", 32,
c7e628df 2988 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2989 },
2990/* ocbp $rm, $disp6x32 */
2991 {
2992 SH_INSN_OCBP, "ocbp", "ocbp", 32,
c7e628df 2993 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2994 },
2995/* ocbwb $rm, $disp6x32 */
2996 {
2997 SH_INSN_OCBWB, "ocbwb", "ocbwb", 32,
c7e628df 2998 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 2999 },
3000/* or $rm, $rn, $rd */
3001 {
3002 SH_INSN_OR, "or", "or", 32,
c7e628df 3003 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3004 },
3005/* ori $rm, $imm10, $rd */
3006 {
3007 SH_INSN_ORI, "ori", "ori", 32,
c7e628df 3008 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3009 },
3010/* prefi $rm, $disp6x32 */
3011 {
3012 SH_INSN_PREFI, "prefi", "prefi", 32,
c7e628df 3013 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3014 },
3015/* pta$likely $disp16, $tra */
3016 {
3017 SH_INSN_PTA, "pta", "pta", 32,
c7e628df 3018 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3019 },
3020/* ptabs$likely $rn, $tra */
3021 {
3022 SH_INSN_PTABS, "ptabs", "ptabs", 32,
c7e628df 3023 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3024 },
3025/* ptb$likely $disp16, $tra */
3026 {
3027 SH_INSN_PTB, "ptb", "ptb", 32,
c7e628df 3028 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3029 },
3030/* ptrel$likely $rn, $tra */
3031 {
3032 SH_INSN_PTREL, "ptrel", "ptrel", 32,
c7e628df 3033 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3034 },
3035/* putcfg $rm, $disp6, $rd */
3036 {
3037 SH_INSN_PUTCFG, "putcfg", "putcfg", 32,
c7e628df 3038 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3039 },
3040/* putcon $rm, $crj */
3041 {
3042 SH_INSN_PUTCON, "putcon", "putcon", 32,
c7e628df 3043 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3044 },
3045/* rte */
3046 {
3047 SH_INSN_RTE, "rte", "rte", 32,
c7e628df 3048 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3049 },
3050/* shard $rm, $rn, $rd */
3051 {
3052 SH_INSN_SHARD, "shard", "shard", 32,
c7e628df 3053 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3054 },
3055/* shard.l $rm, $rn, $rd */
3056 {
3057 SH_INSN_SHARDL, "shardl", "shard.l", 32,
c7e628df 3058 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3059 },
3060/* shari $rm, $uimm6, $rd */
3061 {
3062 SH_INSN_SHARI, "shari", "shari", 32,
c7e628df 3063 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3064 },
3065/* shari.l $rm, $uimm6, $rd */
3066 {
3067 SH_INSN_SHARIL, "sharil", "shari.l", 32,
c7e628df 3068 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3069 },
3070/* shlld $rm, $rn, $rd */
3071 {
3072 SH_INSN_SHLLD, "shlld", "shlld", 32,
c7e628df 3073 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3074 },
3075/* shlld.l $rm, $rn, $rd */
3076 {
3077 SH_INSN_SHLLDL, "shlldl", "shlld.l", 32,
c7e628df 3078 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3079 },
3080/* shlli $rm, $uimm6, $rd */
3081 {
3082 SH_INSN_SHLLI, "shlli", "shlli", 32,
c7e628df 3083 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3084 },
3085/* shlli.l $rm, $uimm6, $rd */
3086 {
3087 SH_INSN_SHLLIL, "shllil", "shlli.l", 32,
c7e628df 3088 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3089 },
3090/* shlrd $rm, $rn, $rd */
3091 {
3092 SH_INSN_SHLRD, "shlrd", "shlrd", 32,
c7e628df 3093 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3094 },
3095/* shlrd.l $rm, $rn, $rd */
3096 {
3097 SH_INSN_SHLRDL, "shlrdl", "shlrd.l", 32,
c7e628df 3098 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3099 },
3100/* shlri $rm, $uimm6, $rd */
3101 {
3102 SH_INSN_SHLRI, "shlri", "shlri", 32,
c7e628df 3103 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3104 },
3105/* shlri.l $rm, $uimm6, $rd */
3106 {
3107 SH_INSN_SHLRIL, "shlril", "shlri.l", 32,
c7e628df 3108 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3109 },
3110/* shori $uimm16, $rd */
3111 {
3112 SH_INSN_SHORI, "shori", "shori", 32,
c7e628df 3113 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3114 },
3115/* sleep */
3116 {
3117 SH_INSN_SLEEP, "sleep", "sleep", 32,
c7e628df 3118 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3119 },
3120/* st.b $rm, $disp10, $rd */
3121 {
3122 SH_INSN_STB, "stb", "st.b", 32,
c7e628df 3123 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3124 },
3125/* st.l $rm, $disp10x4, $rd */
3126 {
3127 SH_INSN_STL, "stl", "st.l", 32,
c7e628df 3128 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3129 },
3130/* st.q $rm, $disp10x8, $rd */
3131 {
3132 SH_INSN_STQ, "stq", "st.q", 32,
c7e628df 3133 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3134 },
3135/* st.w $rm, $disp10x2, $rd */
3136 {
3137 SH_INSN_STW, "stw", "st.w", 32,
c7e628df 3138 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3139 },
3140/* sthi.l $rm, $disp6, $rd */
3141 {
3142 SH_INSN_STHIL, "sthil", "sthi.l", 32,
c7e628df 3143 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3144 },
3145/* sthi.q $rm, $disp6, $rd */
3146 {
3147 SH_INSN_STHIQ, "sthiq", "sthi.q", 32,
c7e628df 3148 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3149 },
3150/* stlo.l $rm, $disp6, $rd */
3151 {
3152 SH_INSN_STLOL, "stlol", "stlo.l", 32,
c7e628df 3153 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3154 },
3155/* stlo.q $rm, $disp6, $rd */
3156 {
3157 SH_INSN_STLOQ, "stloq", "stlo.q", 32,
c7e628df 3158 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3159 },
3160/* stx.b $rm, $rn, $rd */
3161 {
3162 SH_INSN_STXB, "stxb", "stx.b", 32,
c7e628df 3163 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3164 },
3165/* stx.l $rm, $rn, $rd */
3166 {
3167 SH_INSN_STXL, "stxl", "stx.l", 32,
c7e628df 3168 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3169 },
3170/* stx.q $rm, $rn, $rd */
3171 {
3172 SH_INSN_STXQ, "stxq", "stx.q", 32,
c7e628df 3173 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3174 },
3175/* stx.w $rm, $rn, $rd */
3176 {
3177 SH_INSN_STXW, "stxw", "stx.w", 32,
c7e628df 3178 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3179 },
3180/* sub $rm, $rn, $rd */
3181 {
3182 SH_INSN_SUB, "sub", "sub", 32,
c7e628df 3183 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3184 },
3185/* sub.l $rm, $rn, $rd */
3186 {
3187 SH_INSN_SUBL, "subl", "sub.l", 32,
c7e628df 3188 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3189 },
3190/* swap.q $rm, $rn, $rd */
3191 {
3192 SH_INSN_SWAPQ, "swapq", "swap.q", 32,
c7e628df 3193 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3194 },
3195/* synci */
3196 {
3197 SH_INSN_SYNCI, "synci", "synci", 32,
c7e628df 3198 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3199 },
3200/* synco */
3201 {
3202 SH_INSN_SYNCO, "synco", "synco", 32,
c7e628df 3203 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3204 },
3205/* trapa $rm */
3206 {
3207 SH_INSN_TRAPA, "trapa", "trapa", 32,
c7e628df 3208 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3209 },
3210/* xor $rm, $rn, $rd */
3211 {
3212 SH_INSN_XOR, "xor", "xor", 32,
c7e628df 3213 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3214 },
3215/* xori $rm, $imm6, $rd */
3216 {
3217 SH_INSN_XORI, "xori", "xori", 32,
c7e628df 3218 { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } }, { { SH4_GROUP_NONE, 0 } }, { { SH4A_GROUP_NONE, 0 } } } }
cbb38b47
BE		 3219 },
3220};
3221
3222#undef OP
3223#undef A
3224
3225/* Initialize anything needed to be done once, before any cpu_open call. */
3226
3227static void
c7e628df 3228init_tables (void)
cbb38b47
BE		 3229{
3230}
3231
c7e628df
DB		 3232static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
3233static void build_hw_table (CGEN_CPU_TABLE *);
3234static void build_ifield_table (CGEN_CPU_TABLE *);
3235static void build_operand_table (CGEN_CPU_TABLE *);
3236static void build_insn_table (CGEN_CPU_TABLE *);
3237static void sh_cgen_rebuild_tables (CGEN_CPU_TABLE *);
3238
cbb38b47
BE		 3239/* Subroutine of sh_cgen_cpu_open to look up a mach via its bfd name. */
3240
3241static const CGEN_MACH *
c7e628df 3242lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
cbb38b47
BE		 3243{
3244 while (table->name)
3245 {
3246 if (strcmp (name, table->bfd_name) == 0)
3247 return table;
3248 ++table;
3249 }
3250 abort ();
3251}
3252
3253/* Subroutine of sh_cgen_cpu_open to build the hardware table. */
3254
3255static void
c7e628df 3256build_hw_table (CGEN_CPU_TABLE *cd)
cbb38b47
BE		 3257{
3258 int i;
3259 int machs = cd->machs;
3260 const CGEN_HW_ENTRY *init = & sh_cgen_hw_table[0];
3261 /* MAX_HW is only an upper bound on the number of selected entries.
3262 However each entry is indexed by it's enum so there can be holes in
3263 the table. */
3264 const CGEN_HW_ENTRY **selected =
3265 (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));
3266
3267 cd->hw_table.init_entries = init;
3268 cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
3269 memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
3270 /* ??? For now we just use machs to determine which ones we want. */
3271 for (i = 0; init[i].name != NULL; ++i)
3272 if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
3273 & machs)
3274 selected[init[i].type] = &init[i];
3275 cd->hw_table.entries = selected;
3276 cd->hw_table.num_entries = MAX_HW;
3277}
3278
3279/* Subroutine of sh_cgen_cpu_open to build the hardware table. */
3280
3281static void
c7e628df 3282build_ifield_table (CGEN_CPU_TABLE *cd)
cbb38b47
BE		 3283{
3284 cd->ifld_table = & sh_cgen_ifld_table[0];
3285}
3286
3287/* Subroutine of sh_cgen_cpu_open to build the hardware table. */
3288
3289static void
c7e628df 3290build_operand_table (CGEN_CPU_TABLE *cd)
cbb38b47
BE		 3291{
3292 int i;
3293 int machs = cd->machs;
3294 const CGEN_OPERAND *init = & sh_cgen_operand_table[0];
3295 /* MAX_OPERANDS is only an upper bound on the number of selected entries.
3296 However each entry is indexed by it's enum so there can be holes in
3297 the table. */
c7e628df 3298 const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));
cbb38b47
BE		 3299
3300 cd->operand_table.init_entries = init;
3301 cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
3302 memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
3303 /* ??? For now we just use mach to determine which ones we want. */
3304 for (i = 0; init[i].name != NULL; ++i)
3305 if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
3306 & machs)
3307 selected[init[i].type] = &init[i];
3308 cd->operand_table.entries = selected;
3309 cd->operand_table.num_entries = MAX_OPERANDS;
3310}
3311
3312/* Subroutine of sh_cgen_cpu_open to build the hardware table.
3313 ??? This could leave out insns not supported by the specified mach/isa,
3314 but that would cause errors like "foo only supported by bar" to become
3315 "unknown insn", so for now we include all insns and require the app to
3316 do the checking later.
3317 ??? On the other hand, parsing of such insns may require their hardware or
3318 operand elements to be in the table [which they mightn't be]. */
3319
3320static void
c7e628df 3321build_insn_table (CGEN_CPU_TABLE *cd)
cbb38b47
BE		 3322{
3323 int i;
3324 const CGEN_IBASE *ib = & sh_cgen_insn_table[0];
c7e628df 3325 CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
cbb38b47
BE		 3326
3327 memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
3328 for (i = 0; i < MAX_INSNS; ++i)
3329 insns[i].base = &ib[i];
3330 cd->insn_table.init_entries = insns;
3331 cd->insn_table.entry_size = sizeof (CGEN_IBASE);
3332 cd->insn_table.num_init_entries = MAX_INSNS;
3333}
3334
3335/* Subroutine of sh_cgen_cpu_open to rebuild the tables. */
3336
3337static void
c7e628df 3338sh_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
cbb38b47 3339{
c7e628df
DB		 3340 int i;
3341 CGEN_BITSET *isas = cd->isas;
cbb38b47 3342 unsigned int machs = cd->machs;
cbb38b47
BE		 3343
3344 cd->int_insn_p = CGEN_INT_INSN_P;
3345
3346 /* Data derived from the isa spec. */
3347#define UNSET (CGEN_SIZE_UNKNOWN + 1)
3348 cd->default_insn_bitsize = UNSET;
3349 cd->base_insn_bitsize = UNSET;
c7e628df 3350 cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
cbb38b47
BE		 3351 cd->max_insn_bitsize = 0;
3352 for (i = 0; i < MAX_ISAS; ++i)
c7e628df 3353 if (cgen_bitset_contains (isas, i))
cbb38b47
BE		 3354 {
3355 const CGEN_ISA *isa = & sh_cgen_isa_table[i];
3356
c7e628df
DB		 3357 /* Default insn sizes of all selected isas must be
3358 equal or we set the result to 0, meaning "unknown". */
cbb38b47
BE		 3359 if (cd->default_insn_bitsize == UNSET)
3360 cd->default_insn_bitsize = isa->default_insn_bitsize;
3361 else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
c7e628df 3362 ; /* This is ok. */
cbb38b47
BE		 3363 else
3364 cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
3365
c7e628df
DB		 3366 /* Base insn sizes of all selected isas must be equal
3367 or we set the result to 0, meaning "unknown". */
cbb38b47
BE		 3368 if (cd->base_insn_bitsize == UNSET)
3369 cd->base_insn_bitsize = isa->base_insn_bitsize;
3370 else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
c7e628df 3371 ; /* This is ok. */
cbb38b47
BE		 3372 else
3373 cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
3374
3375 /* Set min,max insn sizes. */
3376 if (isa->min_insn_bitsize < cd->min_insn_bitsize)
3377 cd->min_insn_bitsize = isa->min_insn_bitsize;
3378 if (isa->max_insn_bitsize > cd->max_insn_bitsize)
3379 cd->max_insn_bitsize = isa->max_insn_bitsize;
cbb38b47
BE		 3380 }
3381
cbb38b47
BE		 3382 /* Data derived from the mach spec. */
3383 for (i = 0; i < MAX_MACHS; ++i)
3384 if (((1 << i) & machs) != 0)
3385 {
3386 const CGEN_MACH *mach = & sh_cgen_mach_table[i];
3387
c7e628df
DB		 3388 if (mach->insn_chunk_bitsize != 0)
3389 {
3390 if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
3391 {
3392 fprintf (stderr, "sh_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\n",
3393 cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
3394 abort ();
3395 }
3396
3397 cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
3398 }
cbb38b47 3399 }
cbb38b47
BE		 3400
3401 /* Determine which hw elements are used by MACH. */
3402 build_hw_table (cd);
3403
3404 /* Build the ifield table. */
3405 build_ifield_table (cd);
3406
3407 /* Determine which operands are used by MACH/ISA. */
3408 build_operand_table (cd);
3409
3410 /* Build the instruction table. */
3411 build_insn_table (cd);
3412}
3413
3414/* Initialize a cpu table and return a descriptor.
3415 It's much like opening a file, and must be the first function called.
3416 The arguments are a set of (type/value) pairs, terminated with
3417 CGEN_CPU_OPEN_END.
3418
3419 Currently supported values:
3420 CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
3421 CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
3422 CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
3423 CGEN_CPU_OPEN_ENDIAN: specify endian choice
3424 CGEN_CPU_OPEN_END: terminates arguments
3425
3426 ??? Simultaneous multiple isas might not make sense, but it's not (yet)
2310652a 3427 precluded. */
cbb38b47
BE		 3428
3429CGEN_CPU_DESC
3430sh_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
3431{
3432 CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
3433 static int init_p;
c7e628df 3434 CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
cbb38b47
BE		 3435 unsigned int machs = 0; /* 0 = "unspecified" */
3436 enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
3437 va_list ap;
3438
3439 if (! init_p)
3440 {
3441 init_tables ();
3442 init_p = 1;
3443 }
3444
3445 memset (cd, 0, sizeof (*cd));
3446
3447 va_start (ap, arg_type);
3448 while (arg_type != CGEN_CPU_OPEN_END)
3449 {
3450 switch (arg_type)
3451 {
3452 case CGEN_CPU_OPEN_ISAS :
c7e628df 3453 isas = va_arg (ap, CGEN_BITSET *);
cbb38b47
BE		 3454 break;
3455 case CGEN_CPU_OPEN_MACHS :
3456 machs = va_arg (ap, unsigned int);
3457 break;
3458 case CGEN_CPU_OPEN_BFDMACH :
3459 {
3460 const char *name = va_arg (ap, const char *);
3461 const CGEN_MACH *mach =
3462 lookup_mach_via_bfd_name (sh_cgen_mach_table, name);
3463
c7e628df 3464 machs |= 1 << mach->num;
cbb38b47
BE		 3465 break;
3466 }
3467 case CGEN_CPU_OPEN_ENDIAN :
3468 endian = va_arg (ap, enum cgen_endian);
3469 break;
3470 default :
3471 fprintf (stderr, "sh_cgen_cpu_open: unsupported argument `%d'\n",
3472 arg_type);
3473 abort (); /* ??? return NULL? */
3474 }
3475 arg_type = va_arg (ap, enum cgen_cpu_open_arg);
3476 }
3477 va_end (ap);
3478
c7e628df 3479 /* Mach unspecified means "all". */
cbb38b47
BE		 3480 if (machs == 0)
3481 machs = (1 << MAX_MACHS) - 1;
c7e628df 3482 /* Base mach is always selected. */
cbb38b47 3483 machs |= 1;
cbb38b47
BE		 3484 if (endian == CGEN_ENDIAN_UNKNOWN)
3485 {
3486 /* ??? If target has only one, could have a default. */
3487 fprintf (stderr, "sh_cgen_cpu_open: no endianness specified\n");
3488 abort ();
3489 }
3490
c7e628df 3491 cd->isas = cgen_bitset_copy (isas);
cbb38b47
BE		 3492 cd->machs = machs;
3493 cd->endian = endian;
3494 /* FIXME: for the sparc case we can determine insn-endianness statically.
3495 The worry here is where both data and insn endian can be independently
3496 chosen, in which case this function will need another argument.
3497 Actually, will want to allow for more arguments in the future anyway. */
3498 cd->insn_endian = endian;
3499
3500 /* Table (re)builder. */
3501 cd->rebuild_tables = sh_cgen_rebuild_tables;
3502 sh_cgen_rebuild_tables (cd);
3503
3504 /* Default to not allowing signed overflow. */
3505 cd->signed_overflow_ok_p = 0;
3506
3507 return (CGEN_CPU_DESC) cd;
3508}
3509
3510/* Cover fn to sh_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
3511 MACH_NAME is the bfd name of the mach. */
3512
3513CGEN_CPU_DESC
c7e628df 3514sh_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
cbb38b47
BE		 3515{
3516 return sh_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
3517 CGEN_CPU_OPEN_ENDIAN, endian,
3518 CGEN_CPU_OPEN_END);
3519}
3520
3521/* Close a cpu table.
3522 ??? This can live in a machine independent file, but there's currently
3523 no place to put this file (there's no libcgen). libopcodes is the wrong
3524 place as some simulator ports use this but they don't use libopcodes. */
3525
3526void
c7e628df 3527sh_cgen_cpu_close (CGEN_CPU_DESC cd)
cbb38b47 3528{
c7e628df
DB		 3529 unsigned int i;
3530 const CGEN_INSN *insns;
3531
3532 if (cd->macro_insn_table.init_entries)
3533 {
3534 insns = cd->macro_insn_table.init_entries;
3535 for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
3536 if (CGEN_INSN_RX ((insns)))
3537 regfree (CGEN_INSN_RX (insns));
3538 }
3539
3540 if (cd->insn_table.init_entries)
3541 {
3542 insns = cd->insn_table.init_entries;
3543 for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
3544 if (CGEN_INSN_RX (insns))
3545 regfree (CGEN_INSN_RX (insns));
3546 }
3547
3548 if (cd->macro_insn_table.init_entries)
3549 free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
3550
cbb38b47
BE		 3551 if (cd->insn_table.init_entries)
3552 free ((CGEN_INSN *) cd->insn_table.init_entries);
c7e628df 3553
cbb38b47
BE		 3554 if (cd->hw_table.entries)
3555 free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
c7e628df
DB		 3556
3557 if (cd->operand_table.entries)
3558 free ((CGEN_HW_ENTRY *) cd->operand_table.entries);
3559
cbb38b47
BE		 3560 free (cd);
3561}
3562
GDB Binutils - Deliverables
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