Commit | Line | Data |
---|---|---|
cbb38b47 BE |
1 | /* SH64 target configuration file. -*- C -*- */ |
2 | ||
3 | /* Define this if the simulator can vary the size of memory. | |
4 | See the xxx simulator for an example. | |
5 | This enables the `-m size' option. | |
6 | The memory size is stored in STATE_MEM_SIZE. */ | |
7 | /* Not used for SH64 since we use the memory module. TODO -- check this */ | |
8 | /* #define SIM_HAVE_MEM_SIZE */ | |
9 | ||
10 | /* See sim-hload.c. We properly handle LMA. -- TODO: check this */ | |
11 | #define SIM_HANDLES_LMA 1 | |
12 | ||
13 | /* For MSPR support. FIXME: revisit. */ | |
14 | #define WITH_DEVICES 0 | |
15 | ||
cbb38b47 BE |
16 | #if 0 |
17 | /* Enable watchpoints. */ | |
18 | #define WITH_WATCHPOINTS 1 | |
19 | #endif | |
20 | ||
21 | /* ??? Temporary hack until model support unified. */ | |
22 | #define SIM_HAVE_MODEL | |
23 | ||
24 | /* Define this to enable the intrinsic breakpoint mechanism. */ | |
25 | /* FIXME: may be able to remove SIM_HAVE_BREAKPOINTS since it essentially | |
26 | duplicates ifdef SIM_BREAKPOINT (right?) */ | |
27 | #if 1 | |
28 | #define SIM_HAVE_BREAKPOINTS | |
29 | #define SIM_BREAKPOINT { 0, 0, 0, 0xD } | |
30 | #define SIM_BREAKPOINT_SIZE 4 | |
31 | #endif | |
32 | ||
33 | /* This is a global setting. Different cpu families can't mix-n-match -scache | |
34 | and -pbb. However some cpu families may use -simple while others use | |
35 | one of -scache/-pbb. ???? */ | |
36 | #define WITH_SCACHE_PBB 1 | |
37 | ||
38 | /* Define this if the target cpu is bi-endian and the simulator supports it. */ | |
39 | #define SIM_HAVE_BIENDIAN |