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* top.c (command_loop): Fix output for shrinkage.
[deliverable/binutils-gdb.git] / sim / testsuite / ChangeLog
CommitLineData
eb639c50
DJ		 12007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
2
3 * sim/cris/c/freopen2.c: Added testcase.
4
1654a6f7
HPN		 52006-10-02 Hans-Peter Nilsson <hp@axis.com>
6 Edgar E. Iglesias <edgar@axis.com>
7
8 * sim/cris/c/clone5.c, sim/cris/c/mprotect1.c,
9 sim/cris/c/rtsigprocmask1.c, sim/cris/c/rtsigsuspend1.c,
10 sim/cris/c/sig7.c, sim/cris/c/sigreturn1.c,
11 sim/cris/c/sigreturn2.c, sim/cris/c/syscall1.c,
12 sim/cris/c/syscall2.c, sim/cris/c/sysctl2.c, sim/cris/c/fcntl1.c,
13 sim/cris/c/readlink2.c: Add code to print ENOSYS if syscall being
14 tested returns ENOSYS. Add early exit where needed. Change any
15 existing code to print "xyzzy", not "pass".
16 * sim/cris/asm/option3.ms, sim/cris/asm/option4.ms,
17 sim/cris/c/clone6.c, sim/cris/c/fcntl2.c,
18 sim/cris/c/mprotect2.c, sim/cris/c/readlink11.c,
19 sim/cris/c/rtsigprocmask2.c, sim/cris/c/rtsigsuspend2.c,
20 sim/cris/c/sig13.c, sim/cris/c/sigreturn3.c,
21 sim/cris/c/sigreturn4.c, sim/cris/c/syscall3.c,
22 sim/cris/c/syscall4.c, sim/cris/c/syscall5.c,
23 sim/cris/c/syscall6.c, sim/cris/c/syscall7.c,
24 sim/cris/c/syscall8.c, sim/cris/c/sysctl3.c: New tests.
25
539a5255
HPN		 262006-09-30 Hans-Peter Nilsson <hp@axis.com>
27
28 * sim/cris/c/pipe2.c: Adjust expected output.
29 (process): Don't write as much to the pipe as to trig the
30 inordinate-amount test in the sim pipe machinery. Correct test of
31 write return-value; check only that pipemax bytes were
32 successfully written. For error-case, emit strerror as well.
33 (main): Add a second read.
34
c466736a
HPN		 352006-04-08 Hans-Peter Nilsson <hp@axis.com>
36
37 * sim/cris/hw/rv-n-cris/irq6.ms: New test.
38
26d01138
HPN		 392006-04-03 Hans-Peter Nilsson <hp@axis.com>
40
41 * sim/cris/hw: New directory for subdirectories with tests.
42 * sim/cris/hw/rv-n-cris: New directory with tests.
43
4369b6eb
HPN		 442006-04-02 Hans-Peter Nilsson <hp@axis.com>
45
ef6affe1
HPN		 46 * sim/cris/asm/testutils.inc (test_h_mem): Use register prefix.
47 (testr_h_dr, test_h_dr, ldmem_h_gr, mvr_h_mem): Ditto. Correct
48 syntax.
49
4369b6eb
HPN		 50 * sim/cris/asm/x0-v10.ms, sim/cris/asm/x0-v32.ms: Widen regexp for
51 stack pointer values.
52
77dfaed3
HPN		 532006-02-23 Hans-Peter Nilsson <hp@axis.com>
54
55 * sim/cris/c/time2.c: New test.
56
9e49fc3d
HPN		 572006-01-10 Hans-Peter Nilsson <hp@axis.com>
58
59 * sim/cris/asm/x1-v10.ms, sim/cris/asm/x3-v10.ms,
60 sim/cris/asm/x7-v10.ms: Update expected cycle output.
61
632c75db
HPN		 622005-12-06 Hans-Peter Nilsson <hp@axis.com>
63
64 * sim/cris/asm/movmp8.ms, sim/cris/asm/pcplus.ms: New tests.
65 * sim/cris/asm/movmp.ms: Do not write to P0, P4 or P8.
66 * sim/cris/asm/raw13.ms: Write to MOF instead of WZ (P4).
67
5e1f6430
HPN		 682005-11-21 Hans-Peter Nilsson <hp@axis.com>
69
70 * sim/cris: New directory with C and assembly tests for the CRIS
71 simulator.
72
38f48d72
AC		 732005-01-11 Andrew Cagney <cagney@localhost.localdomain>
74
75 * configure: Regenerated to track ../common/aclocal.m4 changes.
76
4db6a73d
AC		 772005-01-07 Andrew Cagney <cagney@gnu.org>
78
b7026657
AC		 79 * configure.ac: Rename configure.in, require autoconf 2.59.
80 * configure: Re-generate.
81
d0945c9b
AC		 82 * configure.in: Pass literal subdirectories to AC_CONFIG_SUBDIRS.
83 * configure: Re-generate.
84
4db6a73d
AC		 85 * fr30-elf, d30v-elf: Delete directory.
86
5eba45c1
HPN		 872004-11-16 Hans-Peter Nilsson <hp@axis.com>
88
89 * lib/sim-defs.exp (run_sim_test): Make multiple "output"
90 specifications concatenate, not override.
310ca70c 91 Support "xfail" and "kfail".
5eba45c1 92
fcf640ec
NC		 932004-10-26 Nick Clifton <nickc@redhat.com>
94
95 * lib/sim-defs.exp (sim_run): Add support for the "rawsid"
96 protocol.
97
a3ef5243
DD		 982004-09-13 DJ Delorie <dj@redhat.com>
99
100 * lib/sim-defs.exp (run_sim_test): Add global_as_options,
101 global_ld_options, and global_sim_options to all test cases, if
102 defined.
103
bc81a370
BE		 1042004-05-12 Ben Elliston <bje@au.ibm.com>
105
106 * lib/sim-defs.exp: Remove stray semicolons.
107
676a64f4
RS		 1082004-03-01 Richard Sandiford <rsandifo@redhat.com>
109
110 * sim/frv/allinsn.exp (all_machs): Add fr405 and fr450.
111 * sim/fr400/allinsn.exp (all_machs): Likewise.
112 * sim/fr400/addss.cgs (mach): Change to "fr405 fr450".
113 * sim/fr400/scutss.cgs (mach): Likewise.
114 * sim/fr400/slass.cgs (mach): Likewise.
115 * sim/fr400/smass.cgs (mach): Likewise.
116 * sim/fr400/smsss.cgs (mach): Likewise.
117 * sim/fr400/smu.cgs (mach): Likewise.
118 * sim/fr400/subss.cgs (mach): Likewise.
119 * sim/interrupts/fp_exception.cgs: Replace fmadds with .word.
120 * sim/interrupts/fp_exception-fr550.cgs: Likewise.
121 * sim/frv/mqlclrhs.cgs: New test.
122 * sim/frv/mqlmths.cgs: New test.
123 * sim/frv/mqsllhi.cgs: New test.
124 * sim/frv/mqsrahi.cgs: New test.
125
8b73069f
RS		 1262004-03-01 Richard Sandiford <rsandifo@redhat.com>
127
128 * sim/frv/fr400/scutss.cgs: Fix tests to account for rounding.
129 Add some new ones.
130
8ae0baa2
RS		 1312004-03-01 Richard Sandiford <rsandifo@redhat.com>
132
133 * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
134 * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
135
df0a8012
CD		 1362004-01-26 Chris Demetriou <cgd@broadcom.com>
137
138 * sim/mips: New directory. Tests for the MIPS simulator.
139
2345c93c
BE		 1402004-01-23 Ben Elliston <bje@wasabisystems.com>
141
142 * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a
143 test passes.
144
5ca353c3
DB		 1452003-10-10 Dave Brolley <brolley@redhat.com>
146
147 * sim/frv/testutils.inc (or_gr_immed): New macro.
148 * sim/frv/fp_exception-fr550.cgs: Write insns using
149 unaligned registers into the program in order to
150 cause the required exceptions.
151 * sim/frv/fp_exception.cgs: Ditto.
152 * sim/frv/regalign.cgs: Ditto.
153
086419a8
DB		 1542003-10-06 Dave Brolley <brolley@redhat.com>
155
156 * sim/frv/fr550: New subdirectory.
157 * sim/frv/fr400/*.cgs: Add fr550 as appropriate.
158 * sim/frv/fr500/*.cgs: Add fr550 as appropriate.
159 * sim/frv/interrupts/*.cgs: Add fr550 as appropriate.
160 * sim/frv/interrupts/*-fr550.cgs: New test cases for fr550.
161
f6f87075
MS		 1622003-09-19 Michael Snyder <msnyder@redhat.com>
163
164 * sim/frv/nldqi.cgs: Remove. This insn was never implemented
165 by Fujitsu.
166
d45d015e
DB		 1672003-09-19 Dave Brolley <brolley@redhat.com>
168
169 * sim/frv/rstqf.cgs: Use nldq instead of nldqi.
170 * sim/frv/rstq.cgs: Use nldq instead of nldqi.
171
e961d8dc
MS		 1722003-09-11 Michael Snyder <msnyder@redhat.com>
173
174 * sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273],
175 which according to the comments seems to be the intent.
176
fbd93201
DB		 1772003-09-09 Dave Brolley <brolley@redhat.com>
178
179 * sim/frv/maddaccs.cgs: move to fr400 subdirectory.
180 * sim/frv/msubaccs.cgs: move to fr400 subdirectory.
181 * sim/frv/masaccs.cgs: move to fr400 subdirectory.
182
19121792
MS		 1832003-09-03 Michael Snyder <msnyder@redhat.com>
184
cc985513
BE		 185 * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be
186 consistent with other tests in the directory.
19121792 187
0eb3d260
MS		 1882003-09-03 Michael Snyder <msnyder@redhat.com>
189
190 * sim/frv/interrupts/Ipipe-fr400.cgs: New file.
191 * sim/frv/interrupts/Ipipe-fr500.cgs: New file.
192 * sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).
193
51796a3f
DB		 1942003-08-20 Michael Snyder <msnyder@redhat.com>
195 On behalf of Dave Brolley
196
197 * sim/frv: New testsuite.
198 * frv-elf: New testsuite.
199
b7c7b624
MS		 2002003-07-09 Michael Snyder <msnyder@redhat.com>
201
202 * sim/sh: New directory. Tests for Renesas sh family.
203
a27a0651
MS		 2042003-04-13 Michael Snyder <msnyder@redhat.com>
205
206 * sim/h8300: New directory. Tests for Renesas h8/300 family.
207
49634642
NC		 2082003-04-01 Nick Clifton <nickc@redhat.com>
209
210 * sim/arm: New directory: Tests for ARM simulator.
211 * sim/arm/allinsn.exp: New file: Test script.
212 * sim/arm/testutils.inc: New file: Test macros.
213 * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs,
214 sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs,
215 sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs,
216 sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs,
217 sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs,
218 sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms,
219 sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs,
220 sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs,
221 sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs,
222 sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs,
223 sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs,
224 sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs,
225 sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs,
226 sim/arm/swpb.cgs, sim/arm/teq.cgs, sim/arm/tst.cgs,
227 sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests.
228 * sim/arm/iwmmxt: New Directory: Tests for iWMMXt.
229 * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script.
230 * sim/arm/iwmmxt/testutils.inc: New file: Test macros.
231 * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs,
232 sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs,
233 sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs,
234 sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs,
235 sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs,
236 sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs,
237 sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs,
238 sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs,
239 sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs,
240 sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs,
241 sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs,
242 sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs,
243 sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs,
244 sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs,
245 sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs,
246 sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs,
247 sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs,
248 sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs,
249 sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests.
250 * sim/arm/thumb: New Directory: Thumb tests.
251 * sim/arm/thumb/allthumb.exp: New file: Test script.
252 * sim/arm/thumb/testutils.inc: New file: Test macros.
253 * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs,
254 sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs,
255 sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs,
256 sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs,
257 sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs,
258 sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs,
259 sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs,
260 sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs,
261 sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs,
262 sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs,
263 sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs,
264 sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs,
265 sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs,
266 sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs,
267 sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs,
268 sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs,
269 sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs,
270 sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs,
271 sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs,
272 sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs,
273 sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs,
274 sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs,
275 sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs,
276 sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs,
277 sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs,
278 sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs,
279 sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs,
280 sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs,
281 sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs,
282 sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs,
283 sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs,
284 sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs,
285 sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs,
286 sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs,
287 sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs,
288 sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs,
289 sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs,
290 sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs,
291 sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb
292 tests.
293 * sim/arm/xscale: New directory.
294 * sim/arm/xscale/xscale.exp: New file: Test script.
295 * sim/arm/xscale/testutils.inc: New file: Test macros.
296 * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs,
297 sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs,
298 sim/arm/xscale/mra.cgs: New files: XScale tests.
299
c8cca39f
AC		 3002002-06-16 Andrew Cagney <ac131313@redhat.com>
301
302 * configure: Regenerated to track ../common/aclocal.m4 changes.
303
f18ee7ef
BE		 3042001-07-31 Ben Elliston <bje@redhat.com>
305
306 * lib/sim-defs.exp (run_sim_test): Include a description such as
307 "assembling" or "linking" that identifies the phase a test fails
308 in, for easier analysis of failures.
309
0ab7df8a
DB		 3102000-11-01 Dave Brolley <brolley@cygnus.com>
311
312 * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
313 "xerror" options do not use a list of machines. Clear options from
314 previous test case. Use "$cpu_option" to identify the machine to the
315 assembler, if specified.
316
eb2d80b4
AC		 317Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
318
319 * configure: Regenerated to track ../common/aclocal.m4 changes.
320
c2c6d25f
JM		 3211999-09-15 Doug Evans <devans@casey.cygnus.com>
322
323 * sim/arm/b.cgs: New testcase.
324 * sim/arm/bic.cgs: New testcase.
325 * sim/arm/bl.cgs: New testcase.
326
d4f3574e
SS		 327Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
328
329 * configure: Regenerated to track ../common/aclocal.m4 changes.
330
104c1213
JM		 3311999-08-30 Doug Evans <devans@casey.cygnus.com>
332
104c1213
JM		 333 * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
334 requested_machs, now is list of machs to run tests for.
335 Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble
336 and target_link instead.
337
7a292a7a
SS		 3381999-04-21 Doug Evans <devans@casey.cygnus.com>
339
340 * sim/m32r/nop.cgs: Add missing nop insn.
341
342Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com>
343
344 * sim/fr30/stb.cgs: Correct for unaligned access.
345 * sim/fr30/sth.cgs: Correct for unaligned access.
346 * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
347 for unaligned access.
348 * sim/fr30/and.cgs: Test unaligned access.
349
c906108c
SS		 350Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com>
351
352 * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
353
3541999-01-05 Doug Evans <devans@casey.cygnus.com>
355
356 * lib/sim-defs.exp (run_sim_test): New arg all_machs.
357 * sim/fr30/allinsn.exp: Update.
358 * sim/fr30/misc.exp: Update.
359 * sim/m32r/allinsn.exp: Update.
360 * sim/m32r/misc.exp: Update.
361
362Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com>
363
364 * sim/fr30/ldres.cgs: New testcase.
365 * sim/fr30/copld.cgs: New testcase.
366 * sim/fr30/copst.cgs: New testcase.
367 * sim/fr30/copsv.cgs: New testcase.
368 * sim/fr30/nop.cgs: New testcase.
369 * sim/fr30/andccr.cgs: New testcase.
370 * sim/fr30/orccr.cgs: New testcase.
371 * sim/fr30/addsp.cgs: New testcase.
372 * sim/fr30/stilm.cgs: New testcase.
373 * sim/fr30/extsb.cgs: New testcase.
374 * sim/fr30/extub.cgs: New testcase.
375 * sim/fr30/extsh.cgs: New testcase.
376 * sim/fr30/extuh.cgs: New testcase.
377 * sim/fr30/enter.cgs: New testcase.
378 * sim/fr30/leave.cgs: New testcase.
379 * sim/fr30/xchb.cgs: New testcase.
380 * sim/fr30/dmovb.cgs: New testcase.
381 * sim/fr30/dmov.cgs: New testcase.
382 * sim/fr30/dmovh.cgs: New testcase.
383
384Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com>
385
386 * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
387 * sim/fr30/ret.cgs: Add tests fir ret:d.
388 * sim/fr30/inte.cgs: New testcase.
389 * sim/fr30/reti.cgs: New testcase.
390 * sim/fr30/bra.cgs: New testcase.
391 * sim/fr30/bno.cgs: New testcase.
392 * sim/fr30/beq.cgs: New testcase.
393 * sim/fr30/bne.cgs: New testcase.
394 * sim/fr30/bc.cgs: New testcase.
395 * sim/fr30/bnc.cgs: New testcase.
396 * sim/fr30/bn.cgs: New testcase.
397 * sim/fr30/bp.cgs: New testcase.
398 * sim/fr30/bv.cgs: New testcase.
399 * sim/fr30/bnv.cgs: New testcase.
400 * sim/fr30/blt.cgs: New testcase.
401 * sim/fr30/bge.cgs: New testcase.
402 * sim/fr30/ble.cgs: New testcase.
403 * sim/fr30/bgt.cgs: New testcase.
404 * sim/fr30/bls.cgs: New testcase.
405 * sim/fr30/bhi.cgs: New testcase.
406
407Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com>
408
409 * sim/fr30/div.cgs (int): Add signed division scenario.
410 * sim/fr30/int.cgs (int): Complete testcase.
411 * sim/fr30/testutils.inc (_start): Initialize tbr.
412 (test_s_user,test_s_system,set_i,test_i): New macros.
413
4141998-12-14 Doug Evans <devans@casey.cygnus.com>
415
416 * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
417 errors. Translate \n sequences in expected output to newline char.
418 (slurp_options): Make parentheses optional.
419 (sim_run): Look for board_info sim,options.
420 * sim/fr30/hello.ms: Add trailing \n to expected output.
421 * sim/m32r/hello.ms: Ditto.
422 * sim/m32r/hw-trap.ms: Ditto.
423
424 * sim/m32r/trap.cgs: Properly align trap2_handler.
425
426 * sim/m32r/uread16.ms: New testcase.
427 * sim/m32r/uread32.ms: New testcase.
428 * sim/m32r/uwrite16.ms: New testcase.
429 * sim/m32r/uwrite32.ms: New testcase.
430
4311998-12-14 Dave Brolley <brolley@cygnus.com>
432
433 * sim/fr30/call.cgs: Test ret here as well.
434 * sim/fr30/ld.cgs: Remove bogus comment.
435 * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
436 * sim/fr30/div.ms: New testcase.
437 * sim/fr30/st.cgs: New testcase.
438 * sim/fr30/sth.cgs: New testcase.
439 * sim/fr30/stb.cgs: New testcase.
440 * sim/fr30/mov.cgs: New testcase.
441 * sim/fr30/jmp.cgs: New testcase.
442 * sim/fr30/ret.cgs: New testcase.
443 * sim/fr30/int.cgs: New testcase.
444
445Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com>
446
447 * sim/fr30/div0s.cgs: New testcase.
448 * sim/fr30/div0u.cgs: New testcase.
449 * sim/fr30/div1.cgs: New testcase.
450 * sim/fr30/div2.cgs: New testcase.
451 * sim/fr30/div3.cgs: New testcase.
452 * sim/fr30/div4s.cgs: New testcase.
453 * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
454
455Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com>
456
457 * sim/fr30/testutils.inc (set_s_user): Correct Mask.
458 (set_s_system): Correct Mask.
459 * sim/fr30/ld.cgs (ld): Move previously failing test back
460 into place.
461 * sim/fr30/ldm0.cgs: New testcase.
462 * sim/fr30/ldm1.cgs: New testcase.
463 * sim/fr30/stm0.cgs: New testcase.
464 * sim/fr30/stm1.cgs: New testcase.
465
466Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com>
467
468 * sim/fr30/ld.cgs: Implement more loads.
469 * sim/fr30/call.cgs: New testcase.
470 * sim/fr30/testutils.inc (testr_h_dr): New macro.
471 (set_s_user,set_s_system): New macros.
472
473 * sim/fr30: New Directory.
474
475Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
476
477 * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
478 recent sim/common/sim-basics.h changes.
479 * common/Makefile.in: Update.
480
481Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com>
482
483 * lib/sim-defs.exp (sim_run): download target program to remote
484 host, if necessary. for unix-driven win32 testing.
485
486Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com>
487
488 * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
489 * sim/m32r/rte.cgs: Test bbpc,bbpsw.
490 * sim/m32r/trap.cgs: Test bbpc,bbpsw.
491
7a292a7a
SS		 492Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com>
493
494 * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
495 writeonly.
496
c906108c
SS		 497Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com>
498
499 * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
500
501Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com>
502
503 * sim/m32r/hw-trap.ms: New testcase.
504
7a292a7a
SS		 505Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
506
507 * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
508
509Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com>
510
511 * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
512 which is now a list of options controlling the behaviour of sim_run.
513
c906108c
SS		 514Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com>
515
516 * sim/m32r/addx.cgs: Add another test.
517 * sim/m32r/jmp.cgs: Add another test.
518
519Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com>
520
521 * sim/m32r/trap.cgs: Test trap 2.
522
523Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
524
525 * lib/sim-defs.exp (sim_run): Add possible environment variable
526 list to simulator run.
527
528Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
529
530 * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
531 so that make check can be invoked recursively.
532
533Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
534
535 * config/default.exp (CC,SIM): Delete.
536
537 * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
538 New arg prog_opts. All callers updated.
539
540Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com>
541
542 * Makefile.in: Made "check" the target of two
543 dependencies (test1, test2) so that test2 get a chance to
544 run even when test1 failed if "make -k check" is used.
545
546Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com>
547
548 * lib/sim-defs.exp (sim_version): Simplify.
549 (sim_run): Implement.
550 (run_sim_test): Use sim_run.
551 (sim_compile): New proc.
552
553Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com>
554
555 * config/default.exp: Added C compiler settings.
556
557Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com>
558
559 * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
560
561Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com>
562
563 * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
564 try all machs.
565
566 * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
567
568Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com>
569
570 * sim/m32r/mv[ft]achi.cgs: Fix expected result
571 (sign extension of top 8 bits).
572
573Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com>
574
575 * Makefile.in (RUNTEST): Fix path to runtest.
576
c906108c
SS		 577Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com>
578
579 * sim/m32r/unlock.cgs: Fixed test.
580 * sim/m32r/mvfc.cgs: Fixed test.
581 * sim/m32r/remu.cgs: Fixed test.
c906108c
SS		 582 * sim/m32r/bnc24.cgs: Test long BNC instruction.
583 * sim/m32r/bnc8.cgs: Test short BNC instruction.
584 * sim/m32r/ld-plus.cgs: Test LD instruction.
585 * sim/m32r/macwhi.cgs: Test MACWHI instruction.
586 * sim/m32r/macwlo.cgs: Test MACWLO instruction.
587 * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
588 * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
589 * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
590 * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
591 * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
592 * sim/m32r/addv.cgs: Test ADDV instruction.
593 * sim/m32r/addv3.cgs: Test ADDV3 instruction.
594 * sim/m32r/addx.cgs: Test ADDX instruction.
595 * sim/m32r/lock.cgs: Test LOCK instruction.
596 * sim/m32r/neg.cgs: Test NEG instruction.
597 * sim/m32r/not.cgs: Test NOT instruction.
598 * sim/m32r/unlock.cgs: Test UNLOCK instruction.
58fddbac 599
c906108c
SS		 600Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
601
602 * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
603 address into a general register.
604
605 * sim/m32r/or3.cgs: Test OR3 instruction.
606 * sim/m32r/rach.cgs: Test RACH instruction.
607 * sim/m32r/rem.cgs: Test REM instruction.
608 * sim/m32r/sub.cgs: Test SUB instruction.
609 * sim/m32r/mv.cgs: Test MV instruction.
610 * sim/m32r/mul.cgs: Test MUL instruction.
611 * sim/m32r/bl24.cgs: Test long BL instruction.
612 * sim/m32r/bl8.cgs: Test short BL instruction.
613 * sim/m32r/blez.cgs: Test BLEZ instruction.
614 * sim/m32r/bltz.cgs: Test BLTZ instruction.
615 * sim/m32r/bne.cgs: Test BNE instruction.
616 * sim/m32r/bnez.cgs: Test BNEZ instruction.
617 * sim/m32r/bra24.cgs: Test long BRA instruction.
618 * sim/m32r/bra8.cgs: Test short BRA instruction.
619 * sim/m32r/jl.cgs: Test JL instruction.
620 * sim/m32r/or.cgs: Test OR instruction.
621 * sim/m32r/jmp.cgs: Test JMP instruction.
622 * sim/m32r/and.cgs: Test AND instruction.
623 * sim/m32r/and3.cgs: Test AND3 instruction.
624 * sim/m32r/beq.cgs: Test BEQ instruction.
625 * sim/m32r/beqz.cgs: Test BEQZ instruction.
626 * sim/m32r/bgez.cgs: Test BGEZ instruction.
627 * sim/m32r/bgtz.cgs: Test BGTZ instruction.
628 * sim/m32r/cmp.cgs: Test CMP instruction.
629 * sim/m32r/cmpi.cgs: Test CMPI instruction.
630 * sim/m32r/cmpu.cgs: Test CMPU instruction.
631 * sim/m32r/cmpui.cgs: Test CMPUI instruction.
632 * sim/m32r/div.cgs: Test DIV instruction.
633 * sim/m32r/divu.cgs: Test DIVU instruction.
634 * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
635 * sim/m32r/sll.cgs: Test SLL instruction.
636 * sim/m32r/sll3.cgs: Test SLL3 instruction.
637 * sim/m32r/slli.cgs: Test SLLI instruction.
638 * sim/m32r/sra.cgs: Test SRA instruction.
639 * sim/m32r/sra3.cgs: Test SRA3 instruction.
640 * sim/m32r/srai.cgs: Test SRAI instruction.
641 * sim/m32r/srl.cgs: Test SRL instruction.
642 * sim/m32r/srl3.cgs: Test SRL3 instruction.
643 * sim/m32r/srli.cgs: Test SRLI instruction.
644 * sim/m32r/xor3.cgs: Test XOR3 instruction.
645 * sim/m32r/xor.cgs: Test XOR instruction.
58fddbac 646
c906108c
SS		 647Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
648
649 * config/default.exp: New file.
650 * lib/sim-defs.exp: New file.
651 * sim/m32r/*: m32r dejagnu simulator testsuite.
652
653 * Makefile.in (build_alias): Define.
654 (arch): Define.
655 (RUNTEST_FOR_TARGET): Delete.
656 (RUNTEST): Fix.
657 (check): Depend on site.exp. Run dejagnu.
658 (site.exp): New target.
659 * configure.in (arch): Define from target_cpu.
660 * configure: Regenerate.
661
662Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
663
664 * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
665 (gen_mask): Ditto.
666
667 * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
668 (calc): Add support for 8 bit version of macros.
669 (main): Add tests for 8 bit versions of macros.
670 (check_sext): Check SEXT of zero clears bits.
671
672 * common/bits-gen.c (main): Generate tests for 8 bit versions of
673 macros.
674
675Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
676
677 * common/Make-common.in: New file, provide generic rules for
678 running checks.
679
680Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
681
682 * configure.in (configdirs): Test for the target directory instead
683 of matching on a target.
684
GDB Binutils - Deliverables
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