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2007-11-08 Aleksandar Ristovski <aristovski@qnx.com>
[deliverable/binutils-gdb.git] / sim / testsuite / ChangeLog
CommitLineData
9538c15c
HPN		 12007-10-22 Edgar E. Iglesias <edgar@axis.com>
2 Hans-Peter Nilsson <hp@axis.com>
3
4 * sim/cris/asm/testutils.inc (test_move_cc): Add missing call to
5 test_cc.
6 * sim/cris/asm/asr.ms: Correct expected condition code flags.
7 * sim/cris/asm/boundr.ms: Ditto.
8 * sim/cris/asm/dstep.ms: Ditto.
9 * sim/cris/asm/lsr.ms: Ditto.
10 * sim/cris/asm/movecr.ms: Ditto.
11 * sim/cris/asm/mover.ms: Ditto.
12 * sim/cris/asm/neg.ms: Ditto. Use test_cc, not test_move_cc.
13 * sim/cris/asm/op3.ms: Check the condition code flags after the insn
14 under test.
15 * sim/cris/asm/movecrt10.ms: Update expected number of simulated
16 cycles.
17 * sim/cris/asm/movecrt32.ms: Ditto.
18 * sim/cris/asm/jsr.ms: Don't use local label 8.
19 * sim/cris/asm/nonvcv32.ms: New test.
20
eb639c50
DJ		 212007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
22
23 * sim/cris/c/freopen2.c: Added testcase.
24
1654a6f7
HPN		 252006-10-02 Hans-Peter Nilsson <hp@axis.com>
26 Edgar E. Iglesias <edgar@axis.com>
27
28 * sim/cris/c/clone5.c, sim/cris/c/mprotect1.c,
29 sim/cris/c/rtsigprocmask1.c, sim/cris/c/rtsigsuspend1.c,
30 sim/cris/c/sig7.c, sim/cris/c/sigreturn1.c,
31 sim/cris/c/sigreturn2.c, sim/cris/c/syscall1.c,
32 sim/cris/c/syscall2.c, sim/cris/c/sysctl2.c, sim/cris/c/fcntl1.c,
33 sim/cris/c/readlink2.c: Add code to print ENOSYS if syscall being
34 tested returns ENOSYS. Add early exit where needed. Change any
35 existing code to print "xyzzy", not "pass".
36 * sim/cris/asm/option3.ms, sim/cris/asm/option4.ms,
37 sim/cris/c/clone6.c, sim/cris/c/fcntl2.c,
38 sim/cris/c/mprotect2.c, sim/cris/c/readlink11.c,
39 sim/cris/c/rtsigprocmask2.c, sim/cris/c/rtsigsuspend2.c,
40 sim/cris/c/sig13.c, sim/cris/c/sigreturn3.c,
41 sim/cris/c/sigreturn4.c, sim/cris/c/syscall3.c,
42 sim/cris/c/syscall4.c, sim/cris/c/syscall5.c,
43 sim/cris/c/syscall6.c, sim/cris/c/syscall7.c,
44 sim/cris/c/syscall8.c, sim/cris/c/sysctl3.c: New tests.
45
539a5255
HPN		 462006-09-30 Hans-Peter Nilsson <hp@axis.com>
47
48 * sim/cris/c/pipe2.c: Adjust expected output.
49 (process): Don't write as much to the pipe as to trig the
50 inordinate-amount test in the sim pipe machinery. Correct test of
51 write return-value; check only that pipemax bytes were
52 successfully written. For error-case, emit strerror as well.
53 (main): Add a second read.
54
c466736a
HPN		 552006-04-08 Hans-Peter Nilsson <hp@axis.com>
56
57 * sim/cris/hw/rv-n-cris/irq6.ms: New test.
58
26d01138
HPN		 592006-04-03 Hans-Peter Nilsson <hp@axis.com>
60
61 * sim/cris/hw: New directory for subdirectories with tests.
62 * sim/cris/hw/rv-n-cris: New directory with tests.
63
4369b6eb
HPN		 642006-04-02 Hans-Peter Nilsson <hp@axis.com>
65
ef6affe1
HPN		 66 * sim/cris/asm/testutils.inc (test_h_mem): Use register prefix.
67 (testr_h_dr, test_h_dr, ldmem_h_gr, mvr_h_mem): Ditto. Correct
68 syntax.
69
4369b6eb
HPN		 70 * sim/cris/asm/x0-v10.ms, sim/cris/asm/x0-v32.ms: Widen regexp for
71 stack pointer values.
72
77dfaed3
HPN		 732006-02-23 Hans-Peter Nilsson <hp@axis.com>
74
75 * sim/cris/c/time2.c: New test.
76
9e49fc3d
HPN		 772006-01-10 Hans-Peter Nilsson <hp@axis.com>
78
79 * sim/cris/asm/x1-v10.ms, sim/cris/asm/x3-v10.ms,
80 sim/cris/asm/x7-v10.ms: Update expected cycle output.
81
632c75db
HPN		 822005-12-06 Hans-Peter Nilsson <hp@axis.com>
83
84 * sim/cris/asm/movmp8.ms, sim/cris/asm/pcplus.ms: New tests.
85 * sim/cris/asm/movmp.ms: Do not write to P0, P4 or P8.
86 * sim/cris/asm/raw13.ms: Write to MOF instead of WZ (P4).
87
5e1f6430
HPN		 882005-11-21 Hans-Peter Nilsson <hp@axis.com>
89
90 * sim/cris: New directory with C and assembly tests for the CRIS
91 simulator.
92
38f48d72
AC		 932005-01-11 Andrew Cagney <cagney@localhost.localdomain>
94
95 * configure: Regenerated to track ../common/aclocal.m4 changes.
96
4db6a73d
AC		 972005-01-07 Andrew Cagney <cagney@gnu.org>
98
b7026657
AC		 99 * configure.ac: Rename configure.in, require autoconf 2.59.
100 * configure: Re-generate.
101
d0945c9b
AC		 102 * configure.in: Pass literal subdirectories to AC_CONFIG_SUBDIRS.
103 * configure: Re-generate.
104
4db6a73d
AC		 105 * fr30-elf, d30v-elf: Delete directory.
106
5eba45c1
HPN		 1072004-11-16 Hans-Peter Nilsson <hp@axis.com>
108
109 * lib/sim-defs.exp (run_sim_test): Make multiple "output"
110 specifications concatenate, not override.
310ca70c 111 Support "xfail" and "kfail".
5eba45c1 112
fcf640ec
NC		 1132004-10-26 Nick Clifton <nickc@redhat.com>
114
115 * lib/sim-defs.exp (sim_run): Add support for the "rawsid"
116 protocol.
117
a3ef5243
DD		 1182004-09-13 DJ Delorie <dj@redhat.com>
119
120 * lib/sim-defs.exp (run_sim_test): Add global_as_options,
121 global_ld_options, and global_sim_options to all test cases, if
122 defined.
123
bc81a370
BE		 1242004-05-12 Ben Elliston <bje@au.ibm.com>
125
126 * lib/sim-defs.exp: Remove stray semicolons.
127
676a64f4
RS		 1282004-03-01 Richard Sandiford <rsandifo@redhat.com>
129
130 * sim/frv/allinsn.exp (all_machs): Add fr405 and fr450.
131 * sim/fr400/allinsn.exp (all_machs): Likewise.
132 * sim/fr400/addss.cgs (mach): Change to "fr405 fr450".
133 * sim/fr400/scutss.cgs (mach): Likewise.
134 * sim/fr400/slass.cgs (mach): Likewise.
135 * sim/fr400/smass.cgs (mach): Likewise.
136 * sim/fr400/smsss.cgs (mach): Likewise.
137 * sim/fr400/smu.cgs (mach): Likewise.
138 * sim/fr400/subss.cgs (mach): Likewise.
139 * sim/interrupts/fp_exception.cgs: Replace fmadds with .word.
140 * sim/interrupts/fp_exception-fr550.cgs: Likewise.
141 * sim/frv/mqlclrhs.cgs: New test.
142 * sim/frv/mqlmths.cgs: New test.
143 * sim/frv/mqsllhi.cgs: New test.
144 * sim/frv/mqsrahi.cgs: New test.
145
8b73069f
RS		 1462004-03-01 Richard Sandiford <rsandifo@redhat.com>
147
148 * sim/frv/fr400/scutss.cgs: Fix tests to account for rounding.
149 Add some new ones.
150
8ae0baa2
RS		 1512004-03-01 Richard Sandiford <rsandifo@redhat.com>
152
153 * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
154 * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
155
df0a8012
CD		 1562004-01-26 Chris Demetriou <cgd@broadcom.com>
157
158 * sim/mips: New directory. Tests for the MIPS simulator.
159
2345c93c
BE		 1602004-01-23 Ben Elliston <bje@wasabisystems.com>
161
162 * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a
163 test passes.
164
5ca353c3
DB		 1652003-10-10 Dave Brolley <brolley@redhat.com>
166
167 * sim/frv/testutils.inc (or_gr_immed): New macro.
168 * sim/frv/fp_exception-fr550.cgs: Write insns using
169 unaligned registers into the program in order to
170 cause the required exceptions.
171 * sim/frv/fp_exception.cgs: Ditto.
172 * sim/frv/regalign.cgs: Ditto.
173
086419a8
DB		 1742003-10-06 Dave Brolley <brolley@redhat.com>
175
176 * sim/frv/fr550: New subdirectory.
177 * sim/frv/fr400/*.cgs: Add fr550 as appropriate.
178 * sim/frv/fr500/*.cgs: Add fr550 as appropriate.
179 * sim/frv/interrupts/*.cgs: Add fr550 as appropriate.
180 * sim/frv/interrupts/*-fr550.cgs: New test cases for fr550.
181
f6f87075
MS		 1822003-09-19 Michael Snyder <msnyder@redhat.com>
183
184 * sim/frv/nldqi.cgs: Remove. This insn was never implemented
185 by Fujitsu.
186
d45d015e
DB		 1872003-09-19 Dave Brolley <brolley@redhat.com>
188
189 * sim/frv/rstqf.cgs: Use nldq instead of nldqi.
190 * sim/frv/rstq.cgs: Use nldq instead of nldqi.
191
e961d8dc
MS		 1922003-09-11 Michael Snyder <msnyder@redhat.com>
193
194 * sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273],
195 which according to the comments seems to be the intent.
196
fbd93201
DB		 1972003-09-09 Dave Brolley <brolley@redhat.com>
198
199 * sim/frv/maddaccs.cgs: move to fr400 subdirectory.
200 * sim/frv/msubaccs.cgs: move to fr400 subdirectory.
201 * sim/frv/masaccs.cgs: move to fr400 subdirectory.
202
19121792
MS		 2032003-09-03 Michael Snyder <msnyder@redhat.com>
204
cc985513
BE		 205 * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be
206 consistent with other tests in the directory.
19121792 207
0eb3d260
MS		 2082003-09-03 Michael Snyder <msnyder@redhat.com>
209
210 * sim/frv/interrupts/Ipipe-fr400.cgs: New file.
211 * sim/frv/interrupts/Ipipe-fr500.cgs: New file.
212 * sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).
213
51796a3f
DB		 2142003-08-20 Michael Snyder <msnyder@redhat.com>
215 On behalf of Dave Brolley
216
217 * sim/frv: New testsuite.
218 * frv-elf: New testsuite.
219
b7c7b624
MS		 2202003-07-09 Michael Snyder <msnyder@redhat.com>
221
222 * sim/sh: New directory. Tests for Renesas sh family.
223
a27a0651
MS		 2242003-04-13 Michael Snyder <msnyder@redhat.com>
225
226 * sim/h8300: New directory. Tests for Renesas h8/300 family.
227
49634642
NC		 2282003-04-01 Nick Clifton <nickc@redhat.com>
229
230 * sim/arm: New directory: Tests for ARM simulator.
231 * sim/arm/allinsn.exp: New file: Test script.
232 * sim/arm/testutils.inc: New file: Test macros.
233 * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs,
234 sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs,
235 sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs,
236 sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs,
237 sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs,
238 sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms,
239 sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs,
240 sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs,
241 sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs,
242 sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs,
243 sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs,
244 sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs,
245 sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs,
246 sim/arm/swpb.cgs, sim/arm/teq.cgs, sim/arm/tst.cgs,
247 sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests.
248 * sim/arm/iwmmxt: New Directory: Tests for iWMMXt.
249 * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script.
250 * sim/arm/iwmmxt/testutils.inc: New file: Test macros.
251 * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs,
252 sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs,
253 sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs,
254 sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs,
255 sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs,
256 sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs,
257 sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs,
258 sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs,
259 sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs,
260 sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs,
261 sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs,
262 sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs,
263 sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs,
264 sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs,
265 sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs,
266 sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs,
267 sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs,
268 sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs,
269 sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests.
270 * sim/arm/thumb: New Directory: Thumb tests.
271 * sim/arm/thumb/allthumb.exp: New file: Test script.
272 * sim/arm/thumb/testutils.inc: New file: Test macros.
273 * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs,
274 sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs,
275 sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs,
276 sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs,
277 sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs,
278 sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs,
279 sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs,
280 sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs,
281 sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs,
282 sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs,
283 sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs,
284 sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs,
285 sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs,
286 sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs,
287 sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs,
288 sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs,
289 sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs,
290 sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs,
291 sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs,
292 sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs,
293 sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs,
294 sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs,
295 sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs,
296 sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs,
297 sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs,
298 sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs,
299 sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs,
300 sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs,
301 sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs,
302 sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs,
303 sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs,
304 sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs,
305 sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs,
306 sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs,
307 sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs,
308 sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs,
309 sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs,
310 sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs,
311 sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb
312 tests.
313 * sim/arm/xscale: New directory.
314 * sim/arm/xscale/xscale.exp: New file: Test script.
315 * sim/arm/xscale/testutils.inc: New file: Test macros.
316 * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs,
317 sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs,
318 sim/arm/xscale/mra.cgs: New files: XScale tests.
319
c8cca39f
AC		 3202002-06-16 Andrew Cagney <ac131313@redhat.com>
321
322 * configure: Regenerated to track ../common/aclocal.m4 changes.
323
f18ee7ef
BE		 3242001-07-31 Ben Elliston <bje@redhat.com>
325
326 * lib/sim-defs.exp (run_sim_test): Include a description such as
327 "assembling" or "linking" that identifies the phase a test fails
328 in, for easier analysis of failures.
329
0ab7df8a
DB		 3302000-11-01 Dave Brolley <brolley@cygnus.com>
331
332 * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
333 "xerror" options do not use a list of machines. Clear options from
334 previous test case. Use "$cpu_option" to identify the machine to the
335 assembler, if specified.
336
eb2d80b4
AC		 337Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
338
339 * configure: Regenerated to track ../common/aclocal.m4 changes.
340
c2c6d25f
JM		 3411999-09-15 Doug Evans <devans@casey.cygnus.com>
342
343 * sim/arm/b.cgs: New testcase.
344 * sim/arm/bic.cgs: New testcase.
345 * sim/arm/bl.cgs: New testcase.
346
d4f3574e
SS		 347Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
348
349 * configure: Regenerated to track ../common/aclocal.m4 changes.
350
104c1213
JM		 3511999-08-30 Doug Evans <devans@casey.cygnus.com>
352
104c1213
JM		 353 * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
354 requested_machs, now is list of machs to run tests for.
355 Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble
356 and target_link instead.
357
7a292a7a
SS		 3581999-04-21 Doug Evans <devans@casey.cygnus.com>
359
360 * sim/m32r/nop.cgs: Add missing nop insn.
361
362Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com>
363
364 * sim/fr30/stb.cgs: Correct for unaligned access.
365 * sim/fr30/sth.cgs: Correct for unaligned access.
366 * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
367 for unaligned access.
368 * sim/fr30/and.cgs: Test unaligned access.
369
c906108c
SS		 370Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com>
371
372 * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
373
3741999-01-05 Doug Evans <devans@casey.cygnus.com>
375
376 * lib/sim-defs.exp (run_sim_test): New arg all_machs.
377 * sim/fr30/allinsn.exp: Update.
378 * sim/fr30/misc.exp: Update.
379 * sim/m32r/allinsn.exp: Update.
380 * sim/m32r/misc.exp: Update.
381
382Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com>
383
384 * sim/fr30/ldres.cgs: New testcase.
385 * sim/fr30/copld.cgs: New testcase.
386 * sim/fr30/copst.cgs: New testcase.
387 * sim/fr30/copsv.cgs: New testcase.
388 * sim/fr30/nop.cgs: New testcase.
389 * sim/fr30/andccr.cgs: New testcase.
390 * sim/fr30/orccr.cgs: New testcase.
391 * sim/fr30/addsp.cgs: New testcase.
392 * sim/fr30/stilm.cgs: New testcase.
393 * sim/fr30/extsb.cgs: New testcase.
394 * sim/fr30/extub.cgs: New testcase.
395 * sim/fr30/extsh.cgs: New testcase.
396 * sim/fr30/extuh.cgs: New testcase.
397 * sim/fr30/enter.cgs: New testcase.
398 * sim/fr30/leave.cgs: New testcase.
399 * sim/fr30/xchb.cgs: New testcase.
400 * sim/fr30/dmovb.cgs: New testcase.
401 * sim/fr30/dmov.cgs: New testcase.
402 * sim/fr30/dmovh.cgs: New testcase.
403
404Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com>
405
406 * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
407 * sim/fr30/ret.cgs: Add tests fir ret:d.
408 * sim/fr30/inte.cgs: New testcase.
409 * sim/fr30/reti.cgs: New testcase.
410 * sim/fr30/bra.cgs: New testcase.
411 * sim/fr30/bno.cgs: New testcase.
412 * sim/fr30/beq.cgs: New testcase.
413 * sim/fr30/bne.cgs: New testcase.
414 * sim/fr30/bc.cgs: New testcase.
415 * sim/fr30/bnc.cgs: New testcase.
416 * sim/fr30/bn.cgs: New testcase.
417 * sim/fr30/bp.cgs: New testcase.
418 * sim/fr30/bv.cgs: New testcase.
419 * sim/fr30/bnv.cgs: New testcase.
420 * sim/fr30/blt.cgs: New testcase.
421 * sim/fr30/bge.cgs: New testcase.
422 * sim/fr30/ble.cgs: New testcase.
423 * sim/fr30/bgt.cgs: New testcase.
424 * sim/fr30/bls.cgs: New testcase.
425 * sim/fr30/bhi.cgs: New testcase.
426
427Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com>
428
429 * sim/fr30/div.cgs (int): Add signed division scenario.
430 * sim/fr30/int.cgs (int): Complete testcase.
431 * sim/fr30/testutils.inc (_start): Initialize tbr.
432 (test_s_user,test_s_system,set_i,test_i): New macros.
433
4341998-12-14 Doug Evans <devans@casey.cygnus.com>
435
436 * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
437 errors. Translate \n sequences in expected output to newline char.
438 (slurp_options): Make parentheses optional.
439 (sim_run): Look for board_info sim,options.
440 * sim/fr30/hello.ms: Add trailing \n to expected output.
441 * sim/m32r/hello.ms: Ditto.
442 * sim/m32r/hw-trap.ms: Ditto.
443
444 * sim/m32r/trap.cgs: Properly align trap2_handler.
445
446 * sim/m32r/uread16.ms: New testcase.
447 * sim/m32r/uread32.ms: New testcase.
448 * sim/m32r/uwrite16.ms: New testcase.
449 * sim/m32r/uwrite32.ms: New testcase.
450
4511998-12-14 Dave Brolley <brolley@cygnus.com>
452
453 * sim/fr30/call.cgs: Test ret here as well.
454 * sim/fr30/ld.cgs: Remove bogus comment.
455 * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
456 * sim/fr30/div.ms: New testcase.
457 * sim/fr30/st.cgs: New testcase.
458 * sim/fr30/sth.cgs: New testcase.
459 * sim/fr30/stb.cgs: New testcase.
460 * sim/fr30/mov.cgs: New testcase.
461 * sim/fr30/jmp.cgs: New testcase.
462 * sim/fr30/ret.cgs: New testcase.
463 * sim/fr30/int.cgs: New testcase.
464
465Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com>
466
467 * sim/fr30/div0s.cgs: New testcase.
468 * sim/fr30/div0u.cgs: New testcase.
469 * sim/fr30/div1.cgs: New testcase.
470 * sim/fr30/div2.cgs: New testcase.
471 * sim/fr30/div3.cgs: New testcase.
472 * sim/fr30/div4s.cgs: New testcase.
473 * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
474
475Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com>
476
477 * sim/fr30/testutils.inc (set_s_user): Correct Mask.
478 (set_s_system): Correct Mask.
479 * sim/fr30/ld.cgs (ld): Move previously failing test back
480 into place.
481 * sim/fr30/ldm0.cgs: New testcase.
482 * sim/fr30/ldm1.cgs: New testcase.
483 * sim/fr30/stm0.cgs: New testcase.
484 * sim/fr30/stm1.cgs: New testcase.
485
486Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com>
487
488 * sim/fr30/ld.cgs: Implement more loads.
489 * sim/fr30/call.cgs: New testcase.
490 * sim/fr30/testutils.inc (testr_h_dr): New macro.
491 (set_s_user,set_s_system): New macros.
492
493 * sim/fr30: New Directory.
494
495Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
496
497 * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
498 recent sim/common/sim-basics.h changes.
499 * common/Makefile.in: Update.
500
501Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com>
502
503 * lib/sim-defs.exp (sim_run): download target program to remote
504 host, if necessary. for unix-driven win32 testing.
505
506Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com>
507
508 * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
509 * sim/m32r/rte.cgs: Test bbpc,bbpsw.
510 * sim/m32r/trap.cgs: Test bbpc,bbpsw.
511
7a292a7a
SS		 512Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com>
513
514 * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
515 writeonly.
516
c906108c
SS		 517Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com>
518
519 * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
520
521Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com>
522
523 * sim/m32r/hw-trap.ms: New testcase.
524
7a292a7a
SS		 525Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
526
527 * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
528
529Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com>
530
531 * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
532 which is now a list of options controlling the behaviour of sim_run.
533
c906108c
SS		 534Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com>
535
536 * sim/m32r/addx.cgs: Add another test.
537 * sim/m32r/jmp.cgs: Add another test.
538
539Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com>
540
541 * sim/m32r/trap.cgs: Test trap 2.
542
543Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
544
545 * lib/sim-defs.exp (sim_run): Add possible environment variable
546 list to simulator run.
547
548Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
549
550 * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
551 so that make check can be invoked recursively.
552
553Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
554
555 * config/default.exp (CC,SIM): Delete.
556
557 * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
558 New arg prog_opts. All callers updated.
559
560Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com>
561
562 * Makefile.in: Made "check" the target of two
563 dependencies (test1, test2) so that test2 get a chance to
564 run even when test1 failed if "make -k check" is used.
565
566Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com>
567
568 * lib/sim-defs.exp (sim_version): Simplify.
569 (sim_run): Implement.
570 (run_sim_test): Use sim_run.
571 (sim_compile): New proc.
572
573Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com>
574
575 * config/default.exp: Added C compiler settings.
576
577Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com>
578
579 * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
580
581Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com>
582
583 * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
584 try all machs.
585
586 * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
587
588Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com>
589
590 * sim/m32r/mv[ft]achi.cgs: Fix expected result
591 (sign extension of top 8 bits).
592
593Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com>
594
595 * Makefile.in (RUNTEST): Fix path to runtest.
596
c906108c
SS		 597Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com>
598
599 * sim/m32r/unlock.cgs: Fixed test.
600 * sim/m32r/mvfc.cgs: Fixed test.
601 * sim/m32r/remu.cgs: Fixed test.
c906108c
SS		 602 * sim/m32r/bnc24.cgs: Test long BNC instruction.
603 * sim/m32r/bnc8.cgs: Test short BNC instruction.
604 * sim/m32r/ld-plus.cgs: Test LD instruction.
605 * sim/m32r/macwhi.cgs: Test MACWHI instruction.
606 * sim/m32r/macwlo.cgs: Test MACWLO instruction.
607 * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
608 * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
609 * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
610 * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
611 * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
612 * sim/m32r/addv.cgs: Test ADDV instruction.
613 * sim/m32r/addv3.cgs: Test ADDV3 instruction.
614 * sim/m32r/addx.cgs: Test ADDX instruction.
615 * sim/m32r/lock.cgs: Test LOCK instruction.
616 * sim/m32r/neg.cgs: Test NEG instruction.
617 * sim/m32r/not.cgs: Test NOT instruction.
618 * sim/m32r/unlock.cgs: Test UNLOCK instruction.
58fddbac 619
c906108c
SS		 620Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
621
622 * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
623 address into a general register.
624
625 * sim/m32r/or3.cgs: Test OR3 instruction.
626 * sim/m32r/rach.cgs: Test RACH instruction.
627 * sim/m32r/rem.cgs: Test REM instruction.
628 * sim/m32r/sub.cgs: Test SUB instruction.
629 * sim/m32r/mv.cgs: Test MV instruction.
630 * sim/m32r/mul.cgs: Test MUL instruction.
631 * sim/m32r/bl24.cgs: Test long BL instruction.
632 * sim/m32r/bl8.cgs: Test short BL instruction.
633 * sim/m32r/blez.cgs: Test BLEZ instruction.
634 * sim/m32r/bltz.cgs: Test BLTZ instruction.
635 * sim/m32r/bne.cgs: Test BNE instruction.
636 * sim/m32r/bnez.cgs: Test BNEZ instruction.
637 * sim/m32r/bra24.cgs: Test long BRA instruction.
638 * sim/m32r/bra8.cgs: Test short BRA instruction.
639 * sim/m32r/jl.cgs: Test JL instruction.
640 * sim/m32r/or.cgs: Test OR instruction.
641 * sim/m32r/jmp.cgs: Test JMP instruction.
642 * sim/m32r/and.cgs: Test AND instruction.
643 * sim/m32r/and3.cgs: Test AND3 instruction.
644 * sim/m32r/beq.cgs: Test BEQ instruction.
645 * sim/m32r/beqz.cgs: Test BEQZ instruction.
646 * sim/m32r/bgez.cgs: Test BGEZ instruction.
647 * sim/m32r/bgtz.cgs: Test BGTZ instruction.
648 * sim/m32r/cmp.cgs: Test CMP instruction.
649 * sim/m32r/cmpi.cgs: Test CMPI instruction.
650 * sim/m32r/cmpu.cgs: Test CMPU instruction.
651 * sim/m32r/cmpui.cgs: Test CMPUI instruction.
652 * sim/m32r/div.cgs: Test DIV instruction.
653 * sim/m32r/divu.cgs: Test DIVU instruction.
654 * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
655 * sim/m32r/sll.cgs: Test SLL instruction.
656 * sim/m32r/sll3.cgs: Test SLL3 instruction.
657 * sim/m32r/slli.cgs: Test SLLI instruction.
658 * sim/m32r/sra.cgs: Test SRA instruction.
659 * sim/m32r/sra3.cgs: Test SRA3 instruction.
660 * sim/m32r/srai.cgs: Test SRAI instruction.
661 * sim/m32r/srl.cgs: Test SRL instruction.
662 * sim/m32r/srl3.cgs: Test SRL3 instruction.
663 * sim/m32r/srli.cgs: Test SRLI instruction.
664 * sim/m32r/xor3.cgs: Test XOR3 instruction.
665 * sim/m32r/xor.cgs: Test XOR instruction.
58fddbac 666
c906108c
SS		 667Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
668
669 * config/default.exp: New file.
670 * lib/sim-defs.exp: New file.
671 * sim/m32r/*: m32r dejagnu simulator testsuite.
672
673 * Makefile.in (build_alias): Define.
674 (arch): Define.
675 (RUNTEST_FOR_TARGET): Delete.
676 (RUNTEST): Fix.
677 (check): Depend on site.exp. Run dejagnu.
678 (site.exp): New target.
679 * configure.in (arch): Define from target_cpu.
680 * configure: Regenerate.
681
682Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
683
684 * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
685 (gen_mask): Ditto.
686
687 * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
688 (calc): Add support for 8 bit version of macros.
689 (main): Add tests for 8 bit versions of macros.
690 (check_sext): Check SEXT of zero clears bits.
691
692 * common/bits-gen.c (main): Generate tests for 8 bit versions of
693 macros.
694
695Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
696
697 * common/Make-common.in: New file, provide generic rules for
698 running checks.
699
700Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
701
702 * configure.in (configdirs): Test for the target directory instead
703 of matching on a target.
704
GDB Binutils - Deliverables
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