projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 2345c93c BE |
1 | 2004-01-23 Ben Elliston <bje@wasabisystems.com> |
| 2 | ||
| 3 | * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a | |
| 4 | test passes. | |
| 5 | ||
| 5ca353c3 DB |
6 | 2003-10-10 Dave Brolley <brolley@redhat.com> |
| 7 | ||
| 8 | * sim/frv/testutils.inc (or_gr_immed): New macro. | |
| 9 | * sim/frv/fp_exception-fr550.cgs: Write insns using | |
| 10 | unaligned registers into the program in order to | |
| 11 | cause the required exceptions. | |
| 12 | * sim/frv/fp_exception.cgs: Ditto. | |
| 13 | * sim/frv/regalign.cgs: Ditto. | |
| 14 | ||
| 086419a8 DB |
15 | 2003-10-06 Dave Brolley <brolley@redhat.com> |
| 16 | ||
| 17 | * sim/frv/fr550: New subdirectory. | |
| 18 | * sim/frv/fr400/*.cgs: Add fr550 as appropriate. | |
| 19 | * sim/frv/fr500/*.cgs: Add fr550 as appropriate. | |
| 20 | * sim/frv/interrupts/*.cgs: Add fr550 as appropriate. | |
| 21 | * sim/frv/interrupts/*-fr550.cgs: New test cases for fr550. | |
| 22 | ||
| f6f87075 MS |
23 | 2003-09-19 Michael Snyder <msnyder@redhat.com> |
| 24 | ||
| 25 | * sim/frv/nldqi.cgs: Remove. This insn was never implemented | |
| 26 | by Fujitsu. | |
| 27 | ||
| d45d015e DB |
28 | 2003-09-19 Dave Brolley <brolley@redhat.com> |
| 29 | ||
| 30 | * sim/frv/rstqf.cgs: Use nldq instead of nldqi. | |
| 31 | * sim/frv/rstq.cgs: Use nldq instead of nldqi. | |
| 32 | ||
| e961d8dc MS |
33 | 2003-09-11 Michael Snyder <msnyder@redhat.com> |
| 34 | ||
| 35 | * sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273], | |
| 36 | which according to the comments seems to be the intent. | |
| 37 | ||
| fbd93201 DB |
38 | 2003-09-09 Dave Brolley <brolley@redhat.com> |
| 39 | ||
| 40 | * sim/frv/maddaccs.cgs: move to fr400 subdirectory. | |
| 41 | * sim/frv/msubaccs.cgs: move to fr400 subdirectory. | |
| 42 | * sim/frv/masaccs.cgs: move to fr400 subdirectory. | |
| 43 | ||
| 19121792 MS |
44 | 2003-09-03 Michael Snyder <msnyder@redhat.com> |
| 45 | ||
| cc985513 BE |
46 | * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be |
| 47 | consistent with other tests in the directory. | |
| 19121792 | 48 | |
| 0eb3d260 MS |
49 | 2003-09-03 Michael Snyder <msnyder@redhat.com> |
| 50 | ||
| 51 | * sim/frv/interrupts/Ipipe-fr400.cgs: New file. | |
| 52 | * sim/frv/interrupts/Ipipe-fr500.cgs: New file. | |
| 53 | * sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above). | |
| 54 | ||
| 51796a3f DB |
55 | 2003-08-20 Michael Snyder <msnyder@redhat.com> |
| 56 | On behalf of Dave Brolley | |
| 57 | ||
| 58 | * sim/frv: New testsuite. | |
| 59 | * frv-elf: New testsuite. | |
| 60 | ||
| b7c7b624 MS |
61 | 2003-07-09 Michael Snyder <msnyder@redhat.com> |
| 62 | ||
| 63 | * sim/sh: New directory. Tests for Renesas sh family. | |
| 64 | ||
| a27a0651 MS |
65 | 2003-04-13 Michael Snyder <msnyder@redhat.com> |
| 66 | ||
| 67 | * sim/h8300: New directory. Tests for Renesas h8/300 family. | |
| 68 | ||
| 49634642 NC |
69 | 2003-04-01 Nick Clifton <nickc@redhat.com> |
| 70 | ||
| 71 | * sim/arm: New directory: Tests for ARM simulator. | |
| 72 | * sim/arm/allinsn.exp: New file: Test script. | |
| 73 | * sim/arm/testutils.inc: New file: Test macros. | |
| 74 | * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs, | |
| 75 | sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs, | |
| 76 | sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs, | |
| 77 | sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs, | |
| 78 | sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs, | |
| 79 | sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms, | |
| 80 | sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs, | |
| 81 | sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs, | |
| 82 | sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs, | |
| 83 | sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs, | |
| 84 | sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs, | |
| 85 | sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs, | |
| 86 | sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs, | |
| 87 | sim/arm/swpb.cgs, sim/arm/teq.cgs, sim/arm/tst.cgs, | |
| 88 | sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests. | |
| 89 | * sim/arm/iwmmxt: New Directory: Tests for iWMMXt. | |
| 90 | * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script. | |
| 91 | * sim/arm/iwmmxt/testutils.inc: New file: Test macros. | |
| 92 | * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs, | |
| 93 | sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs, | |
| 94 | sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs, | |
| 95 | sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs, | |
| 96 | sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs, | |
| 97 | sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs, | |
| 98 | sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs, | |
| 99 | sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs, | |
| 100 | sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs, | |
| 101 | sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs, | |
| 102 | sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs, | |
| 103 | sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs, | |
| 104 | sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs, | |
| 105 | sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs, | |
| 106 | sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs, | |
| 107 | sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs, | |
| 108 | sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs, | |
| 109 | sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs, | |
| 110 | sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests. | |
| 111 | * sim/arm/thumb: New Directory: Thumb tests. | |
| 112 | * sim/arm/thumb/allthumb.exp: New file: Test script. | |
| 113 | * sim/arm/thumb/testutils.inc: New file: Test macros. | |
| 114 | * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs, | |
| 115 | sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs, | |
| 116 | sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs, | |
| 117 | sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs, | |
| 118 | sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs, | |
| 119 | sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs, | |
| 120 | sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs, | |
| 121 | sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs, | |
| 122 | sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs, | |
| 123 | sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs, | |
| 124 | sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs, | |
| 125 | sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs, | |
| 126 | sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs, | |
| 127 | sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs, | |
| 128 | sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs, | |
| 129 | sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs, | |
| 130 | sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs, | |
| 131 | sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs, | |
| 132 | sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs, | |
| 133 | sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs, | |
| 134 | sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs, | |
| 135 | sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs, | |
| 136 | sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs, | |
| 137 | sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs, | |
| 138 | sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs, | |
| 139 | sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs, | |
| 140 | sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs, | |
| 141 | sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs, | |
| 142 | sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs, | |
| 143 | sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs, | |
| 144 | sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs, | |
| 145 | sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs, | |
| 146 | sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs, | |
| 147 | sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs, | |
| 148 | sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs, | |
| 149 | sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs, | |
| 150 | sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs, | |
| 151 | sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs, | |
| 152 | sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb | |
| 153 | tests. | |
| 154 | * sim/arm/xscale: New directory. | |
| 155 | * sim/arm/xscale/xscale.exp: New file: Test script. | |
| 156 | * sim/arm/xscale/testutils.inc: New file: Test macros. | |
| 157 | * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs, | |
| 158 | sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs, | |
| 159 | sim/arm/xscale/mra.cgs: New files: XScale tests. | |
| 160 | ||
| c8cca39f AC |
161 | 2002-06-16 Andrew Cagney <ac131313@redhat.com> |
| 162 | ||
| 163 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 164 | ||
| f18ee7ef BE |
165 | 2001-07-31 Ben Elliston <bje@redhat.com> |
| 166 | ||
| 167 | * lib/sim-defs.exp (run_sim_test): Include a description such as | |
| 168 | "assembling" or "linking" that identifies the phase a test fails | |
| 169 | in, for easier analysis of failures. | |
| 170 | ||
| 0ab7df8a DB |
171 | 2000-11-01 Dave Brolley <brolley@cygnus.com> |
| 172 | ||
| 173 | * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and | |
| 174 | "xerror" options do not use a list of machines. Clear options from | |
| 175 | previous test case. Use "$cpu_option" to identify the machine to the | |
| 176 | assembler, if specified. | |
| 177 | ||
| eb2d80b4 AC |
178 | Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> |
| 179 | ||
| 180 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 181 | ||
| c2c6d25f JM |
182 | 1999-09-15 Doug Evans <devans@casey.cygnus.com> |
| 183 | ||
| 184 | * sim/arm/b.cgs: New testcase. | |
| 185 | * sim/arm/bic.cgs: New testcase. | |
| 186 | * sim/arm/bl.cgs: New testcase. | |
| 187 | ||
| d4f3574e SS |
188 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
| 189 | ||
| 190 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 191 | ||
| 104c1213 JM |
192 | 1999-08-30 Doug Evans <devans@casey.cygnus.com> |
| 193 | ||
| 104c1213 JM |
194 | * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to |
| 195 | requested_machs, now is list of machs to run tests for. | |
| 196 | Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble | |
| 197 | and target_link instead. | |
| 198 | ||
| 7a292a7a SS |
199 | 1999-04-21 Doug Evans <devans@casey.cygnus.com> |
| 200 | ||
| 201 | * sim/m32r/nop.cgs: Add missing nop insn. | |
| 202 | ||
| 203 | Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com> | |
| 204 | ||
| 205 | * sim/fr30/stb.cgs: Correct for unaligned access. | |
| 206 | * sim/fr30/sth.cgs: Correct for unaligned access. | |
| 207 | * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct | |
| 208 | for unaligned access. | |
| 209 | * sim/fr30/and.cgs: Test unaligned access. | |
| 210 | ||
| c906108c SS |
211 | Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com> |
| 212 | ||
| 213 | * lib/sim-defs.exp (sim_run): Print simulator arguments log message. | |
| 214 | ||
| 215 | 1999-01-05 Doug Evans <devans@casey.cygnus.com> | |
| 216 | ||
| 217 | * lib/sim-defs.exp (run_sim_test): New arg all_machs. | |
| 218 | * sim/fr30/allinsn.exp: Update. | |
| 219 | * sim/fr30/misc.exp: Update. | |
| 220 | * sim/m32r/allinsn.exp: Update. | |
| 221 | * sim/m32r/misc.exp: Update. | |
| 222 | ||
| 223 | Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com> | |
| 224 | ||
| 225 | * sim/fr30/ldres.cgs: New testcase. | |
| 226 | * sim/fr30/copld.cgs: New testcase. | |
| 227 | * sim/fr30/copst.cgs: New testcase. | |
| 228 | * sim/fr30/copsv.cgs: New testcase. | |
| 229 | * sim/fr30/nop.cgs: New testcase. | |
| 230 | * sim/fr30/andccr.cgs: New testcase. | |
| 231 | * sim/fr30/orccr.cgs: New testcase. | |
| 232 | * sim/fr30/addsp.cgs: New testcase. | |
| 233 | * sim/fr30/stilm.cgs: New testcase. | |
| 234 | * sim/fr30/extsb.cgs: New testcase. | |
| 235 | * sim/fr30/extub.cgs: New testcase. | |
| 236 | * sim/fr30/extsh.cgs: New testcase. | |
| 237 | * sim/fr30/extuh.cgs: New testcase. | |
| 238 | * sim/fr30/enter.cgs: New testcase. | |
| 239 | * sim/fr30/leave.cgs: New testcase. | |
| 240 | * sim/fr30/xchb.cgs: New testcase. | |
| 241 | * sim/fr30/dmovb.cgs: New testcase. | |
| 242 | * sim/fr30/dmov.cgs: New testcase. | |
| 243 | * sim/fr30/dmovh.cgs: New testcase. | |
| 244 | ||
| 245 | Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com> | |
| 246 | ||
| 247 | * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros. | |
| 248 | * sim/fr30/ret.cgs: Add tests fir ret:d. | |
| 249 | * sim/fr30/inte.cgs: New testcase. | |
| 250 | * sim/fr30/reti.cgs: New testcase. | |
| 251 | * sim/fr30/bra.cgs: New testcase. | |
| 252 | * sim/fr30/bno.cgs: New testcase. | |
| 253 | * sim/fr30/beq.cgs: New testcase. | |
| 254 | * sim/fr30/bne.cgs: New testcase. | |
| 255 | * sim/fr30/bc.cgs: New testcase. | |
| 256 | * sim/fr30/bnc.cgs: New testcase. | |
| 257 | * sim/fr30/bn.cgs: New testcase. | |
| 258 | * sim/fr30/bp.cgs: New testcase. | |
| 259 | * sim/fr30/bv.cgs: New testcase. | |
| 260 | * sim/fr30/bnv.cgs: New testcase. | |
| 261 | * sim/fr30/blt.cgs: New testcase. | |
| 262 | * sim/fr30/bge.cgs: New testcase. | |
| 263 | * sim/fr30/ble.cgs: New testcase. | |
| 264 | * sim/fr30/bgt.cgs: New testcase. | |
| 265 | * sim/fr30/bls.cgs: New testcase. | |
| 266 | * sim/fr30/bhi.cgs: New testcase. | |
| 267 | ||
| 268 | Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com> | |
| 269 | ||
| 270 | * sim/fr30/div.cgs (int): Add signed division scenario. | |
| 271 | * sim/fr30/int.cgs (int): Complete testcase. | |
| 272 | * sim/fr30/testutils.inc (_start): Initialize tbr. | |
| 273 | (test_s_user,test_s_system,set_i,test_i): New macros. | |
| 274 | ||
| 275 | 1998-12-14 Doug Evans <devans@casey.cygnus.com> | |
| 276 | ||
| 277 | * lib/sim-defs.exp (run_sim_test): New option xerror, for expected | |
| 278 | errors. Translate \n sequences in expected output to newline char. | |
| 279 | (slurp_options): Make parentheses optional. | |
| 280 | (sim_run): Look for board_info sim,options. | |
| 281 | * sim/fr30/hello.ms: Add trailing \n to expected output. | |
| 282 | * sim/m32r/hello.ms: Ditto. | |
| 283 | * sim/m32r/hw-trap.ms: Ditto. | |
| 284 | ||
| 285 | * sim/m32r/trap.cgs: Properly align trap2_handler. | |
| 286 | ||
| 287 | * sim/m32r/uread16.ms: New testcase. | |
| 288 | * sim/m32r/uread32.ms: New testcase. | |
| 289 | * sim/m32r/uwrite16.ms: New testcase. | |
| 290 | * sim/m32r/uwrite32.ms: New testcase. | |
| 291 | ||
| 292 | 1998-12-14 Dave Brolley <brolley@cygnus.com> | |
| 293 | ||
| 294 | * sim/fr30/call.cgs: Test ret here as well. | |
| 295 | * sim/fr30/ld.cgs: Remove bogus comment. | |
| 296 | * sim/fr30/testutils.inc (save_rp,restore_rp): New macros. | |
| 297 | * sim/fr30/div.ms: New testcase. | |
| 298 | * sim/fr30/st.cgs: New testcase. | |
| 299 | * sim/fr30/sth.cgs: New testcase. | |
| 300 | * sim/fr30/stb.cgs: New testcase. | |
| 301 | * sim/fr30/mov.cgs: New testcase. | |
| 302 | * sim/fr30/jmp.cgs: New testcase. | |
| 303 | * sim/fr30/ret.cgs: New testcase. | |
| 304 | * sim/fr30/int.cgs: New testcase. | |
| 305 | ||
| 306 | Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com> | |
| 307 | ||
| 308 | * sim/fr30/div0s.cgs: New testcase. | |
| 309 | * sim/fr30/div0u.cgs: New testcase. | |
| 310 | * sim/fr30/div1.cgs: New testcase. | |
| 311 | * sim/fr30/div2.cgs: New testcase. | |
| 312 | * sim/fr30/div3.cgs: New testcase. | |
| 313 | * sim/fr30/div4s.cgs: New testcase. | |
| 314 | * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros. | |
| 315 | ||
| 316 | Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com> | |
| 317 | ||
| 318 | * sim/fr30/testutils.inc (set_s_user): Correct Mask. | |
| 319 | (set_s_system): Correct Mask. | |
| 320 | * sim/fr30/ld.cgs (ld): Move previously failing test back | |
| 321 | into place. | |
| 322 | * sim/fr30/ldm0.cgs: New testcase. | |
| 323 | * sim/fr30/ldm1.cgs: New testcase. | |
| 324 | * sim/fr30/stm0.cgs: New testcase. | |
| 325 | * sim/fr30/stm1.cgs: New testcase. | |
| 326 | ||
| 327 | Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com> | |
| 328 | ||
| 329 | * sim/fr30/ld.cgs: Implement more loads. | |
| 330 | * sim/fr30/call.cgs: New testcase. | |
| 331 | * sim/fr30/testutils.inc (testr_h_dr): New macro. | |
| 332 | (set_s_user,set_s_system): New macros. | |
| 333 | ||
| 334 | * sim/fr30: New Directory. | |
| 335 | ||
| 336 | Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 337 | ||
| 338 | * common/bits-gen.c (main): Add BYTE_ORDER so that it matches | |
| 339 | recent sim/common/sim-basics.h changes. | |
| 340 | * common/Makefile.in: Update. | |
| 341 | ||
| 342 | Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com> | |
| 343 | ||
| 344 | * lib/sim-defs.exp (sim_run): download target program to remote | |
| 345 | host, if necessary. for unix-driven win32 testing. | |
| 346 | ||
| 347 | Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 348 | ||
| 349 | * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr. | |
| 350 | * sim/m32r/rte.cgs: Test bbpc,bbpsw. | |
| 351 | * sim/m32r/trap.cgs: Test bbpc,bbpsw. | |
| 352 | ||
| 7a292a7a SS |
353 | Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com> |
| 354 | ||
| 355 | * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of | |
| 356 | writeonly. | |
| 357 | ||
| c906108c SS |
358 | Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com> |
| 359 | ||
| 360 | * Makefile.in (clean,mostlyclean): Change leading spaces to a tab. | |
| 361 | ||
| 362 | Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com> | |
| 363 | ||
| 364 | * sim/m32r/hw-trap.ms: New testcase. | |
| 365 | ||
| 7a292a7a SS |
366 | Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com> |
| 367 | ||
| 368 | * lib/sim-defs.exp: Print out timeout setting info when "-v" is used. | |
| 369 | ||
| 370 | Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 371 | ||
| 372 | * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options, | |
| 373 | which is now a list of options controlling the behaviour of sim_run. | |
| 374 | ||
| c906108c SS |
375 | Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com> |
| 376 | ||
| 377 | * sim/m32r/addx.cgs: Add another test. | |
| 378 | * sim/m32r/jmp.cgs: Add another test. | |
| 379 | ||
| 380 | Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 381 | ||
| 382 | * sim/m32r/trap.cgs: Test trap 2. | |
| 383 | ||
| 384 | Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com> | |
| 385 | ||
| 386 | * lib/sim-defs.exp (sim_run): Add possible environment variable | |
| 387 | list to simulator run. | |
| 388 | ||
| 389 | Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com> | |
| 390 | ||
| 391 | * Makefile.in: Take RUNTEST out of FLAG_TO_PASS | |
| 392 | so that make check can be invoked recursively. | |
| 393 | ||
| 394 | Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 395 | ||
| 396 | * config/default.exp (CC,SIM): Delete. | |
| 397 | ||
| 398 | * lib/sim-defs.exp (sim_run): Fix handling of output redirection. | |
| 399 | New arg prog_opts. All callers updated. | |
| 400 | ||
| 401 | Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com> | |
| 402 | ||
| 403 | * Makefile.in: Made "check" the target of two | |
| 404 | dependencies (test1, test2) so that test2 get a chance to | |
| 405 | run even when test1 failed if "make -k check" is used. | |
| 406 | ||
| 407 | Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 408 | ||
| 409 | * lib/sim-defs.exp (sim_version): Simplify. | |
| 410 | (sim_run): Implement. | |
| 411 | (run_sim_test): Use sim_run. | |
| 412 | (sim_compile): New proc. | |
| 413 | ||
| 414 | Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com> | |
| 415 | ||
| 416 | * config/default.exp: Added C compiler settings. | |
| 417 | ||
| 418 | Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 419 | ||
| 420 | * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS. | |
| 421 | ||
| 422 | Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 423 | ||
| 424 | * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails, | |
| 425 | try all machs. | |
| 426 | ||
| 427 | * sim/m32r/addx.cgs: Test (-1)+(-1)+1. | |
| 428 | ||
| 429 | Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 430 | ||
| 431 | * sim/m32r/mv[ft]achi.cgs: Fix expected result | |
| 432 | (sign extension of top 8 bits). | |
| 433 | ||
| 434 | Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 435 | ||
| 436 | * Makefile.in (RUNTEST): Fix path to runtest. | |
| 437 | ||
| c906108c SS |
438 | Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com> |
| 439 | ||
| 440 | * sim/m32r/unlock.cgs: Fixed test. | |
| 441 | * sim/m32r/mvfc.cgs: Fixed test. | |
| 442 | * sim/m32r/remu.cgs: Fixed test. | |
| c906108c SS |
443 | * sim/m32r/bnc24.cgs: Test long BNC instruction. |
| 444 | * sim/m32r/bnc8.cgs: Test short BNC instruction. | |
| 445 | * sim/m32r/ld-plus.cgs: Test LD instruction. | |
| 446 | * sim/m32r/macwhi.cgs: Test MACWHI instruction. | |
| 447 | * sim/m32r/macwlo.cgs: Test MACWLO instruction. | |
| 448 | * sim/m32r/mulwhi.cgs: Test MULWHI instruction. | |
| 449 | * sim/m32r/mulwlo.cgs: Test MULWLO instruction. | |
| 450 | * sim/m32r/mvfachi.cgs: Test MVFACHI instruction. | |
| 451 | * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction. | |
| 452 | * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction. | |
| 453 | * sim/m32r/addv.cgs: Test ADDV instruction. | |
| 454 | * sim/m32r/addv3.cgs: Test ADDV3 instruction. | |
| 455 | * sim/m32r/addx.cgs: Test ADDX instruction. | |
| 456 | * sim/m32r/lock.cgs: Test LOCK instruction. | |
| 457 | * sim/m32r/neg.cgs: Test NEG instruction. | |
| 458 | * sim/m32r/not.cgs: Test NOT instruction. | |
| 459 | * sim/m32r/unlock.cgs: Test UNLOCK instruction. | |
| 58fddbac | 460 | |
| c906108c SS |
461 | Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com> |
| 462 | ||
| 463 | * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an | |
| 464 | address into a general register. | |
| 465 | ||
| 466 | * sim/m32r/or3.cgs: Test OR3 instruction. | |
| 467 | * sim/m32r/rach.cgs: Test RACH instruction. | |
| 468 | * sim/m32r/rem.cgs: Test REM instruction. | |
| 469 | * sim/m32r/sub.cgs: Test SUB instruction. | |
| 470 | * sim/m32r/mv.cgs: Test MV instruction. | |
| 471 | * sim/m32r/mul.cgs: Test MUL instruction. | |
| 472 | * sim/m32r/bl24.cgs: Test long BL instruction. | |
| 473 | * sim/m32r/bl8.cgs: Test short BL instruction. | |
| 474 | * sim/m32r/blez.cgs: Test BLEZ instruction. | |
| 475 | * sim/m32r/bltz.cgs: Test BLTZ instruction. | |
| 476 | * sim/m32r/bne.cgs: Test BNE instruction. | |
| 477 | * sim/m32r/bnez.cgs: Test BNEZ instruction. | |
| 478 | * sim/m32r/bra24.cgs: Test long BRA instruction. | |
| 479 | * sim/m32r/bra8.cgs: Test short BRA instruction. | |
| 480 | * sim/m32r/jl.cgs: Test JL instruction. | |
| 481 | * sim/m32r/or.cgs: Test OR instruction. | |
| 482 | * sim/m32r/jmp.cgs: Test JMP instruction. | |
| 483 | * sim/m32r/and.cgs: Test AND instruction. | |
| 484 | * sim/m32r/and3.cgs: Test AND3 instruction. | |
| 485 | * sim/m32r/beq.cgs: Test BEQ instruction. | |
| 486 | * sim/m32r/beqz.cgs: Test BEQZ instruction. | |
| 487 | * sim/m32r/bgez.cgs: Test BGEZ instruction. | |
| 488 | * sim/m32r/bgtz.cgs: Test BGTZ instruction. | |
| 489 | * sim/m32r/cmp.cgs: Test CMP instruction. | |
| 490 | * sim/m32r/cmpi.cgs: Test CMPI instruction. | |
| 491 | * sim/m32r/cmpu.cgs: Test CMPU instruction. | |
| 492 | * sim/m32r/cmpui.cgs: Test CMPUI instruction. | |
| 493 | * sim/m32r/div.cgs: Test DIV instruction. | |
| 494 | * sim/m32r/divu.cgs: Test DIVU instruction. | |
| 495 | * sim/m32r/cmpeq.cgs: Test CMPEQ instruction. | |
| 496 | * sim/m32r/sll.cgs: Test SLL instruction. | |
| 497 | * sim/m32r/sll3.cgs: Test SLL3 instruction. | |
| 498 | * sim/m32r/slli.cgs: Test SLLI instruction. | |
| 499 | * sim/m32r/sra.cgs: Test SRA instruction. | |
| 500 | * sim/m32r/sra3.cgs: Test SRA3 instruction. | |
| 501 | * sim/m32r/srai.cgs: Test SRAI instruction. | |
| 502 | * sim/m32r/srl.cgs: Test SRL instruction. | |
| 503 | * sim/m32r/srl3.cgs: Test SRL3 instruction. | |
| 504 | * sim/m32r/srli.cgs: Test SRLI instruction. | |
| 505 | * sim/m32r/xor3.cgs: Test XOR3 instruction. | |
| 506 | * sim/m32r/xor.cgs: Test XOR instruction. | |
| 58fddbac | 507 | |
| c906108c SS |
508 | Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com> |
| 509 | ||
| 510 | * config/default.exp: New file. | |
| 511 | * lib/sim-defs.exp: New file. | |
| 512 | * sim/m32r/*: m32r dejagnu simulator testsuite. | |
| 513 | ||
| 514 | * Makefile.in (build_alias): Define. | |
| 515 | (arch): Define. | |
| 516 | (RUNTEST_FOR_TARGET): Delete. | |
| 517 | (RUNTEST): Fix. | |
| 518 | (check): Depend on site.exp. Run dejagnu. | |
| 519 | (site.exp): New target. | |
| 520 | * configure.in (arch): Define from target_cpu. | |
| 521 | * configure: Regenerate. | |
| 522 | ||
| 523 | Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 524 | ||
| 525 | * common/bits-gen.c (gen_bit): Pass in the full name of the macro. | |
| 526 | (gen_mask): Ditto. | |
| 527 | ||
| 528 | * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT. | |
| 529 | (calc): Add support for 8 bit version of macros. | |
| 530 | (main): Add tests for 8 bit versions of macros. | |
| 531 | (check_sext): Check SEXT of zero clears bits. | |
| 532 | ||
| 533 | * common/bits-gen.c (main): Generate tests for 8 bit versions of | |
| 534 | macros. | |
| 535 | ||
| 536 | Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 537 | ||
| 538 | * common/Make-common.in: New file, provide generic rules for | |
| 539 | running checks. | |
| 540 | ||
| 541 | Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 542 | ||
| 543 | * configure.in (configdirs): Test for the target directory instead | |
| 544 | of matching on a target. | |
| 545 |