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(sim_run): Add support for the "rawsid" protocol.
[deliverable/binutils-gdb.git] / sim / testsuite / ChangeLog
CommitLineData
fcf640ec
NC		 12004-10-26 Nick Clifton <nickc@redhat.com>
2
3 * lib/sim-defs.exp (sim_run): Add support for the "rawsid"
4 protocol.
5
a3ef5243
DD		 62004-09-13 DJ Delorie <dj@redhat.com>
7
8 * lib/sim-defs.exp (run_sim_test): Add global_as_options,
9 global_ld_options, and global_sim_options to all test cases, if
10 defined.
11
bc81a370
BE		 122004-05-12 Ben Elliston <bje@au.ibm.com>
13
14 * lib/sim-defs.exp: Remove stray semicolons.
15
676a64f4
RS		 162004-03-01 Richard Sandiford <rsandifo@redhat.com>
17
18 * sim/frv/allinsn.exp (all_machs): Add fr405 and fr450.
19 * sim/fr400/allinsn.exp (all_machs): Likewise.
20 * sim/fr400/addss.cgs (mach): Change to "fr405 fr450".
21 * sim/fr400/scutss.cgs (mach): Likewise.
22 * sim/fr400/slass.cgs (mach): Likewise.
23 * sim/fr400/smass.cgs (mach): Likewise.
24 * sim/fr400/smsss.cgs (mach): Likewise.
25 * sim/fr400/smu.cgs (mach): Likewise.
26 * sim/fr400/subss.cgs (mach): Likewise.
27 * sim/interrupts/fp_exception.cgs: Replace fmadds with .word.
28 * sim/interrupts/fp_exception-fr550.cgs: Likewise.
29 * sim/frv/mqlclrhs.cgs: New test.
30 * sim/frv/mqlmths.cgs: New test.
31 * sim/frv/mqsllhi.cgs: New test.
32 * sim/frv/mqsrahi.cgs: New test.
33
8b73069f
RS		 342004-03-01 Richard Sandiford <rsandifo@redhat.com>
35
36 * sim/frv/fr400/scutss.cgs: Fix tests to account for rounding.
37 Add some new ones.
38
8ae0baa2
RS		 392004-03-01 Richard Sandiford <rsandifo@redhat.com>
40
41 * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
42 * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
43
df0a8012
CD		 442004-01-26 Chris Demetriou <cgd@broadcom.com>
45
46 * sim/mips: New directory. Tests for the MIPS simulator.
47
2345c93c
BE		 482004-01-23 Ben Elliston <bje@wasabisystems.com>
49
50 * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a
51 test passes.
52
5ca353c3
DB		 532003-10-10 Dave Brolley <brolley@redhat.com>
54
55 * sim/frv/testutils.inc (or_gr_immed): New macro.
56 * sim/frv/fp_exception-fr550.cgs: Write insns using
57 unaligned registers into the program in order to
58 cause the required exceptions.
59 * sim/frv/fp_exception.cgs: Ditto.
60 * sim/frv/regalign.cgs: Ditto.
61
086419a8
DB		 622003-10-06 Dave Brolley <brolley@redhat.com>
63
64 * sim/frv/fr550: New subdirectory.
65 * sim/frv/fr400/*.cgs: Add fr550 as appropriate.
66 * sim/frv/fr500/*.cgs: Add fr550 as appropriate.
67 * sim/frv/interrupts/*.cgs: Add fr550 as appropriate.
68 * sim/frv/interrupts/*-fr550.cgs: New test cases for fr550.
69
f6f87075
MS		 702003-09-19 Michael Snyder <msnyder@redhat.com>
71
72 * sim/frv/nldqi.cgs: Remove. This insn was never implemented
73 by Fujitsu.
74
d45d015e
DB		 752003-09-19 Dave Brolley <brolley@redhat.com>
76
77 * sim/frv/rstqf.cgs: Use nldq instead of nldqi.
78 * sim/frv/rstq.cgs: Use nldq instead of nldqi.
79
e961d8dc
MS		 802003-09-11 Michael Snyder <msnyder@redhat.com>
81
82 * sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273],
83 which according to the comments seems to be the intent.
84
fbd93201
DB		 852003-09-09 Dave Brolley <brolley@redhat.com>
86
87 * sim/frv/maddaccs.cgs: move to fr400 subdirectory.
88 * sim/frv/msubaccs.cgs: move to fr400 subdirectory.
89 * sim/frv/masaccs.cgs: move to fr400 subdirectory.
90
19121792
MS		 912003-09-03 Michael Snyder <msnyder@redhat.com>
92
cc985513
BE		 93 * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be
94 consistent with other tests in the directory.
19121792 95
0eb3d260
MS		 962003-09-03 Michael Snyder <msnyder@redhat.com>
97
98 * sim/frv/interrupts/Ipipe-fr400.cgs: New file.
99 * sim/frv/interrupts/Ipipe-fr500.cgs: New file.
100 * sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).
101
51796a3f
DB		 1022003-08-20 Michael Snyder <msnyder@redhat.com>
103 On behalf of Dave Brolley
104
105 * sim/frv: New testsuite.
106 * frv-elf: New testsuite.
107
b7c7b624
MS		 1082003-07-09 Michael Snyder <msnyder@redhat.com>
109
110 * sim/sh: New directory. Tests for Renesas sh family.
111
a27a0651
MS		 1122003-04-13 Michael Snyder <msnyder@redhat.com>
113
114 * sim/h8300: New directory. Tests for Renesas h8/300 family.
115
49634642
NC		 1162003-04-01 Nick Clifton <nickc@redhat.com>
117
118 * sim/arm: New directory: Tests for ARM simulator.
119 * sim/arm/allinsn.exp: New file: Test script.
120 * sim/arm/testutils.inc: New file: Test macros.
121 * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs,
122 sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs,
123 sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs,
124 sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs,
125 sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs,
126 sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms,
127 sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs,
128 sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs,
129 sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs,
130 sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs,
131 sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs,
132 sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs,
133 sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs,
134 sim/arm/swpb.cgs, sim/arm/teq.cgs, sim/arm/tst.cgs,
135 sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests.
136 * sim/arm/iwmmxt: New Directory: Tests for iWMMXt.
137 * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script.
138 * sim/arm/iwmmxt/testutils.inc: New file: Test macros.
139 * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs,
140 sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs,
141 sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs,
142 sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs,
143 sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs,
144 sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs,
145 sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs,
146 sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs,
147 sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs,
148 sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs,
149 sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs,
150 sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs,
151 sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs,
152 sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs,
153 sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs,
154 sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs,
155 sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs,
156 sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs,
157 sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests.
158 * sim/arm/thumb: New Directory: Thumb tests.
159 * sim/arm/thumb/allthumb.exp: New file: Test script.
160 * sim/arm/thumb/testutils.inc: New file: Test macros.
161 * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs,
162 sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs,
163 sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs,
164 sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs,
165 sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs,
166 sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs,
167 sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs,
168 sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs,
169 sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs,
170 sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs,
171 sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs,
172 sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs,
173 sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs,
174 sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs,
175 sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs,
176 sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs,
177 sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs,
178 sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs,
179 sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs,
180 sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs,
181 sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs,
182 sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs,
183 sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs,
184 sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs,
185 sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs,
186 sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs,
187 sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs,
188 sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs,
189 sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs,
190 sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs,
191 sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs,
192 sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs,
193 sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs,
194 sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs,
195 sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs,
196 sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs,
197 sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs,
198 sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs,
199 sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb
200 tests.
201 * sim/arm/xscale: New directory.
202 * sim/arm/xscale/xscale.exp: New file: Test script.
203 * sim/arm/xscale/testutils.inc: New file: Test macros.
204 * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs,
205 sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs,
206 sim/arm/xscale/mra.cgs: New files: XScale tests.
207
c8cca39f
AC		 2082002-06-16 Andrew Cagney <ac131313@redhat.com>
209
210 * configure: Regenerated to track ../common/aclocal.m4 changes.
211
f18ee7ef
BE		 2122001-07-31 Ben Elliston <bje@redhat.com>
213
214 * lib/sim-defs.exp (run_sim_test): Include a description such as
215 "assembling" or "linking" that identifies the phase a test fails
216 in, for easier analysis of failures.
217
0ab7df8a
DB		 2182000-11-01 Dave Brolley <brolley@cygnus.com>
219
220 * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
221 "xerror" options do not use a list of machines. Clear options from
222 previous test case. Use "$cpu_option" to identify the machine to the
223 assembler, if specified.
224
eb2d80b4
AC		 225Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
226
227 * configure: Regenerated to track ../common/aclocal.m4 changes.
228
c2c6d25f
JM		 2291999-09-15 Doug Evans <devans@casey.cygnus.com>
230
231 * sim/arm/b.cgs: New testcase.
232 * sim/arm/bic.cgs: New testcase.
233 * sim/arm/bl.cgs: New testcase.
234
d4f3574e
SS		 235Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
236
237 * configure: Regenerated to track ../common/aclocal.m4 changes.
238
104c1213
JM		 2391999-08-30 Doug Evans <devans@casey.cygnus.com>
240
104c1213
JM		 241 * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
242 requested_machs, now is list of machs to run tests for.
243 Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble
244 and target_link instead.
245
7a292a7a
SS		 2461999-04-21 Doug Evans <devans@casey.cygnus.com>
247
248 * sim/m32r/nop.cgs: Add missing nop insn.
249
250Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com>
251
252 * sim/fr30/stb.cgs: Correct for unaligned access.
253 * sim/fr30/sth.cgs: Correct for unaligned access.
254 * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
255 for unaligned access.
256 * sim/fr30/and.cgs: Test unaligned access.
257
c906108c
SS		 258Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com>
259
260 * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
261
2621999-01-05 Doug Evans <devans@casey.cygnus.com>
263
264 * lib/sim-defs.exp (run_sim_test): New arg all_machs.
265 * sim/fr30/allinsn.exp: Update.
266 * sim/fr30/misc.exp: Update.
267 * sim/m32r/allinsn.exp: Update.
268 * sim/m32r/misc.exp: Update.
269
270Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com>
271
272 * sim/fr30/ldres.cgs: New testcase.
273 * sim/fr30/copld.cgs: New testcase.
274 * sim/fr30/copst.cgs: New testcase.
275 * sim/fr30/copsv.cgs: New testcase.
276 * sim/fr30/nop.cgs: New testcase.
277 * sim/fr30/andccr.cgs: New testcase.
278 * sim/fr30/orccr.cgs: New testcase.
279 * sim/fr30/addsp.cgs: New testcase.
280 * sim/fr30/stilm.cgs: New testcase.
281 * sim/fr30/extsb.cgs: New testcase.
282 * sim/fr30/extub.cgs: New testcase.
283 * sim/fr30/extsh.cgs: New testcase.
284 * sim/fr30/extuh.cgs: New testcase.
285 * sim/fr30/enter.cgs: New testcase.
286 * sim/fr30/leave.cgs: New testcase.
287 * sim/fr30/xchb.cgs: New testcase.
288 * sim/fr30/dmovb.cgs: New testcase.
289 * sim/fr30/dmov.cgs: New testcase.
290 * sim/fr30/dmovh.cgs: New testcase.
291
292Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com>
293
294 * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
295 * sim/fr30/ret.cgs: Add tests fir ret:d.
296 * sim/fr30/inte.cgs: New testcase.
297 * sim/fr30/reti.cgs: New testcase.
298 * sim/fr30/bra.cgs: New testcase.
299 * sim/fr30/bno.cgs: New testcase.
300 * sim/fr30/beq.cgs: New testcase.
301 * sim/fr30/bne.cgs: New testcase.
302 * sim/fr30/bc.cgs: New testcase.
303 * sim/fr30/bnc.cgs: New testcase.
304 * sim/fr30/bn.cgs: New testcase.
305 * sim/fr30/bp.cgs: New testcase.
306 * sim/fr30/bv.cgs: New testcase.
307 * sim/fr30/bnv.cgs: New testcase.
308 * sim/fr30/blt.cgs: New testcase.
309 * sim/fr30/bge.cgs: New testcase.
310 * sim/fr30/ble.cgs: New testcase.
311 * sim/fr30/bgt.cgs: New testcase.
312 * sim/fr30/bls.cgs: New testcase.
313 * sim/fr30/bhi.cgs: New testcase.
314
315Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com>
316
317 * sim/fr30/div.cgs (int): Add signed division scenario.
318 * sim/fr30/int.cgs (int): Complete testcase.
319 * sim/fr30/testutils.inc (_start): Initialize tbr.
320 (test_s_user,test_s_system,set_i,test_i): New macros.
321
3221998-12-14 Doug Evans <devans@casey.cygnus.com>
323
324 * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
325 errors. Translate \n sequences in expected output to newline char.
326 (slurp_options): Make parentheses optional.
327 (sim_run): Look for board_info sim,options.
328 * sim/fr30/hello.ms: Add trailing \n to expected output.
329 * sim/m32r/hello.ms: Ditto.
330 * sim/m32r/hw-trap.ms: Ditto.
331
332 * sim/m32r/trap.cgs: Properly align trap2_handler.
333
334 * sim/m32r/uread16.ms: New testcase.
335 * sim/m32r/uread32.ms: New testcase.
336 * sim/m32r/uwrite16.ms: New testcase.
337 * sim/m32r/uwrite32.ms: New testcase.
338
3391998-12-14 Dave Brolley <brolley@cygnus.com>
340
341 * sim/fr30/call.cgs: Test ret here as well.
342 * sim/fr30/ld.cgs: Remove bogus comment.
343 * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
344 * sim/fr30/div.ms: New testcase.
345 * sim/fr30/st.cgs: New testcase.
346 * sim/fr30/sth.cgs: New testcase.
347 * sim/fr30/stb.cgs: New testcase.
348 * sim/fr30/mov.cgs: New testcase.
349 * sim/fr30/jmp.cgs: New testcase.
350 * sim/fr30/ret.cgs: New testcase.
351 * sim/fr30/int.cgs: New testcase.
352
353Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com>
354
355 * sim/fr30/div0s.cgs: New testcase.
356 * sim/fr30/div0u.cgs: New testcase.
357 * sim/fr30/div1.cgs: New testcase.
358 * sim/fr30/div2.cgs: New testcase.
359 * sim/fr30/div3.cgs: New testcase.
360 * sim/fr30/div4s.cgs: New testcase.
361 * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
362
363Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com>
364
365 * sim/fr30/testutils.inc (set_s_user): Correct Mask.
366 (set_s_system): Correct Mask.
367 * sim/fr30/ld.cgs (ld): Move previously failing test back
368 into place.
369 * sim/fr30/ldm0.cgs: New testcase.
370 * sim/fr30/ldm1.cgs: New testcase.
371 * sim/fr30/stm0.cgs: New testcase.
372 * sim/fr30/stm1.cgs: New testcase.
373
374Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com>
375
376 * sim/fr30/ld.cgs: Implement more loads.
377 * sim/fr30/call.cgs: New testcase.
378 * sim/fr30/testutils.inc (testr_h_dr): New macro.
379 (set_s_user,set_s_system): New macros.
380
381 * sim/fr30: New Directory.
382
383Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
384
385 * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
386 recent sim/common/sim-basics.h changes.
387 * common/Makefile.in: Update.
388
389Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com>
390
391 * lib/sim-defs.exp (sim_run): download target program to remote
392 host, if necessary. for unix-driven win32 testing.
393
394Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com>
395
396 * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
397 * sim/m32r/rte.cgs: Test bbpc,bbpsw.
398 * sim/m32r/trap.cgs: Test bbpc,bbpsw.
399
7a292a7a
SS		 400Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com>
401
402 * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
403 writeonly.
404
c906108c
SS		 405Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com>
406
407 * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
408
409Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com>
410
411 * sim/m32r/hw-trap.ms: New testcase.
412
7a292a7a
SS		 413Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
414
415 * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
416
417Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com>
418
419 * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
420 which is now a list of options controlling the behaviour of sim_run.
421
c906108c
SS		 422Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com>
423
424 * sim/m32r/addx.cgs: Add another test.
425 * sim/m32r/jmp.cgs: Add another test.
426
427Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com>
428
429 * sim/m32r/trap.cgs: Test trap 2.
430
431Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
432
433 * lib/sim-defs.exp (sim_run): Add possible environment variable
434 list to simulator run.
435
436Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
437
438 * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
439 so that make check can be invoked recursively.
440
441Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
442
443 * config/default.exp (CC,SIM): Delete.
444
445 * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
446 New arg prog_opts. All callers updated.
447
448Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com>
449
450 * Makefile.in: Made "check" the target of two
451 dependencies (test1, test2) so that test2 get a chance to
452 run even when test1 failed if "make -k check" is used.
453
454Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com>
455
456 * lib/sim-defs.exp (sim_version): Simplify.
457 (sim_run): Implement.
458 (run_sim_test): Use sim_run.
459 (sim_compile): New proc.
460
461Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com>
462
463 * config/default.exp: Added C compiler settings.
464
465Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com>
466
467 * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
468
469Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com>
470
471 * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
472 try all machs.
473
474 * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
475
476Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com>
477
478 * sim/m32r/mv[ft]achi.cgs: Fix expected result
479 (sign extension of top 8 bits).
480
481Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com>
482
483 * Makefile.in (RUNTEST): Fix path to runtest.
484
c906108c
SS		 485Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com>
486
487 * sim/m32r/unlock.cgs: Fixed test.
488 * sim/m32r/mvfc.cgs: Fixed test.
489 * sim/m32r/remu.cgs: Fixed test.
c906108c
SS		 490 * sim/m32r/bnc24.cgs: Test long BNC instruction.
491 * sim/m32r/bnc8.cgs: Test short BNC instruction.
492 * sim/m32r/ld-plus.cgs: Test LD instruction.
493 * sim/m32r/macwhi.cgs: Test MACWHI instruction.
494 * sim/m32r/macwlo.cgs: Test MACWLO instruction.
495 * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
496 * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
497 * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
498 * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
499 * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
500 * sim/m32r/addv.cgs: Test ADDV instruction.
501 * sim/m32r/addv3.cgs: Test ADDV3 instruction.
502 * sim/m32r/addx.cgs: Test ADDX instruction.
503 * sim/m32r/lock.cgs: Test LOCK instruction.
504 * sim/m32r/neg.cgs: Test NEG instruction.
505 * sim/m32r/not.cgs: Test NOT instruction.
506 * sim/m32r/unlock.cgs: Test UNLOCK instruction.
58fddbac 507
c906108c
SS		 508Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
509
510 * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
511 address into a general register.
512
513 * sim/m32r/or3.cgs: Test OR3 instruction.
514 * sim/m32r/rach.cgs: Test RACH instruction.
515 * sim/m32r/rem.cgs: Test REM instruction.
516 * sim/m32r/sub.cgs: Test SUB instruction.
517 * sim/m32r/mv.cgs: Test MV instruction.
518 * sim/m32r/mul.cgs: Test MUL instruction.
519 * sim/m32r/bl24.cgs: Test long BL instruction.
520 * sim/m32r/bl8.cgs: Test short BL instruction.
521 * sim/m32r/blez.cgs: Test BLEZ instruction.
522 * sim/m32r/bltz.cgs: Test BLTZ instruction.
523 * sim/m32r/bne.cgs: Test BNE instruction.
524 * sim/m32r/bnez.cgs: Test BNEZ instruction.
525 * sim/m32r/bra24.cgs: Test long BRA instruction.
526 * sim/m32r/bra8.cgs: Test short BRA instruction.
527 * sim/m32r/jl.cgs: Test JL instruction.
528 * sim/m32r/or.cgs: Test OR instruction.
529 * sim/m32r/jmp.cgs: Test JMP instruction.
530 * sim/m32r/and.cgs: Test AND instruction.
531 * sim/m32r/and3.cgs: Test AND3 instruction.
532 * sim/m32r/beq.cgs: Test BEQ instruction.
533 * sim/m32r/beqz.cgs: Test BEQZ instruction.
534 * sim/m32r/bgez.cgs: Test BGEZ instruction.
535 * sim/m32r/bgtz.cgs: Test BGTZ instruction.
536 * sim/m32r/cmp.cgs: Test CMP instruction.
537 * sim/m32r/cmpi.cgs: Test CMPI instruction.
538 * sim/m32r/cmpu.cgs: Test CMPU instruction.
539 * sim/m32r/cmpui.cgs: Test CMPUI instruction.
540 * sim/m32r/div.cgs: Test DIV instruction.
541 * sim/m32r/divu.cgs: Test DIVU instruction.
542 * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
543 * sim/m32r/sll.cgs: Test SLL instruction.
544 * sim/m32r/sll3.cgs: Test SLL3 instruction.
545 * sim/m32r/slli.cgs: Test SLLI instruction.
546 * sim/m32r/sra.cgs: Test SRA instruction.
547 * sim/m32r/sra3.cgs: Test SRA3 instruction.
548 * sim/m32r/srai.cgs: Test SRAI instruction.
549 * sim/m32r/srl.cgs: Test SRL instruction.
550 * sim/m32r/srl3.cgs: Test SRL3 instruction.
551 * sim/m32r/srli.cgs: Test SRLI instruction.
552 * sim/m32r/xor3.cgs: Test XOR3 instruction.
553 * sim/m32r/xor.cgs: Test XOR instruction.
58fddbac 554
c906108c
SS		 555Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
556
557 * config/default.exp: New file.
558 * lib/sim-defs.exp: New file.
559 * sim/m32r/*: m32r dejagnu simulator testsuite.
560
561 * Makefile.in (build_alias): Define.
562 (arch): Define.
563 (RUNTEST_FOR_TARGET): Delete.
564 (RUNTEST): Fix.
565 (check): Depend on site.exp. Run dejagnu.
566 (site.exp): New target.
567 * configure.in (arch): Define from target_cpu.
568 * configure: Regenerate.
569
570Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
571
572 * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
573 (gen_mask): Ditto.
574
575 * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
576 (calc): Add support for 8 bit version of macros.
577 (main): Add tests for 8 bit versions of macros.
578 (check_sext): Check SEXT of zero clears bits.
579
580 * common/bits-gen.c (main): Generate tests for 8 bit versions of
581 macros.
582
583Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
584
585 * common/Make-common.in: New file, provide generic rules for
586 running checks.
587
588Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
589
590 * configure.in (configdirs): Test for the target directory instead
591 of matching on a target.
592
GDB Binutils - Deliverables
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