[deliverable/binutils-gdb.git] / sim / testsuite / sim / aarch64 / tbnz.s

# mach: aarch64

# Check the test-bit-and-branch instructions: tbnz, and tbz.
# We check the edge condition bit positions: 0, 1<<31, 1<<32, 1<<63.

.include "testutils.inc"

	start
	mov x0, #1
	tbnz x0, #0, .L1
	fail
.L1:
	tbz x0, #0, .Lfailure
	mov x0, #0xFFFFFFFFFFFFFFFE
	tbnz x0, #0, .Lfailure
	tbz x0, #0, .L2
	fail
.L2:

	mov x0, #0x80000000
	tbnz x0, #31, .L3
	fail
.L3:
	tbz x0, #31, .Lfailure
	mov x0, #0xFFFFFFFF7FFFFFFF
	tbnz x0, #31, .Lfailure
	tbz x0, #31, .L4
	fail
.L4:

	mov x0, #0x100000000
	tbnz x0, #32, .L5
	fail
.L5:
	tbz x0, #32, .Lfailure
	mov x0, #0xFFFFFFFEFFFFFFFF
	tbnz x0, #32, .Lfailure
	tbz x0, #32, .L6
	fail
.L6:

	mov x0, #0x8000000000000000
	tbnz x0, #63, .L7
	fail
.L7:
	tbz x0, #63, .Lfailure
	mov x0, #0x7FFFFFFFFFFFFFFF
	tbnz x0, #63, .Lfailure
	tbz x0, #63, .L8
	fail
.L8:

	pass
.Lfailure:
	fail
Commit	Line	Data
963201cf JW	1	# mach: aarch64
	2
	3	# Check the test-bit-and-branch instructions: tbnz, and tbz.
	4	# We check the edge condition bit positions: 0, 1<<31, 1<<32, 1<<63.
	5
	6	.include "testutils.inc"
	7
	8	start
	9	mov x0, #1
	10	tbnz x0, #0, .L1
	11	fail
	12	.L1:
	13	tbz x0, #0, .Lfailure
	14	mov x0, #0xFFFFFFFFFFFFFFFE
	15	tbnz x0, #0, .Lfailure
	16	tbz x0, #0, .L2
	17	fail
	18	.L2:
	19
	20	mov x0, #0x80000000
	21	tbnz x0, #31, .L3
	22	fail
	23	.L3:
	24	tbz x0, #31, .Lfailure
	25	mov x0, #0xFFFFFFFF7FFFFFFF
	26	tbnz x0, #31, .Lfailure
	27	tbz x0, #31, .L4
	28	fail
	29	.L4:
	30
	31	mov x0, #0x100000000
	32	tbnz x0, #32, .L5
	33	fail
	34	.L5:
	35	tbz x0, #32, .Lfailure
	36	mov x0, #0xFFFFFFFEFFFFFFFF
	37	tbnz x0, #32, .Lfailure
	38	tbz x0, #32, .L6
	39	fail
	40	.L6:
	41
	42	mov x0, #0x8000000000000000
	43	tbnz x0, #63, .L7
	44	fail
	45	.L7:
	46	tbz x0, #63, .Lfailure
	47	mov x0, #0x7FFFFFFFFFFFFFFF
	48	tbnz x0, #63, .Lfailure
	49	tbz x0, #63, .L8
	50	fail
	51	.L8:
	52
	53	pass
	54	.Lfailure:
	55	fail