Commit | Line | Data |
---|---|---|
4a306116 DB |
1 | # frv testcase for rstq $GRk,@($GRi,$GRj) |
2 | # mach: frv | |
3 | # as(frv): -mcpu=frv | |
4 | ||
5 | .include "testutils.inc" | |
6 | ||
7 | start | |
8 | ||
9 | .global add | |
10 | add: | |
11 | ; No nesr's active | |
12 | set_gr_gr sp,gr6 | |
13 | set_mem_limmed 0x2222,0x2222,gr6 | |
14 | set_gr_gr gr6,gr27 | |
15 | inc_gr_immed -4,gr27 | |
16 | set_mem_limmed 0x3333,0x3333,gr27 | |
17 | set_gr_gr gr27,gr26 | |
18 | inc_gr_immed -4,gr26 | |
19 | set_mem_limmed 0x4444,0x4444,gr26 | |
20 | set_gr_gr gr26,gr25 | |
21 | inc_gr_immed -4,gr25 | |
22 | set_mem_limmed 0x5555,0x5555,gr25 | |
23 | set_gr_gr gr25,gr24 | |
24 | inc_gr_immed -4,gr24 | |
25 | set_mem_limmed 0x6666,0x6666,gr24 | |
26 | set_gr_gr gr24,gr23 | |
27 | inc_gr_immed -4,gr23 | |
28 | set_mem_limmed 0x7777,0x7777,gr23 | |
29 | set_gr_gr gr23,gr22 | |
30 | inc_gr_immed -4,gr22 | |
31 | set_mem_limmed 0x8888,0x8888,gr22 | |
32 | set_gr_gr gr22,gr21 | |
33 | inc_gr_immed -4,gr21 | |
34 | set_mem_limmed 0x9999,0x9999,gr21 | |
35 | set_gr_gr gr21,gr20 | |
36 | inc_gr_immed -4,gr20 | |
37 | set_mem_limmed 0xaaaa,0xaaaa,gr20 | |
38 | set_gr_gr gr20,gr19 | |
39 | inc_gr_immed -4,gr19 | |
40 | set_mem_limmed 0xbbbb,0xbbbb,gr19 | |
41 | set_gr_gr gr19,gr18 | |
42 | inc_gr_immed -4,gr18 | |
43 | set_mem_limmed 0xcccc,0xcccc,gr18 | |
44 | set_gr_gr gr18,gr17 | |
45 | inc_gr_immed -4,gr17 | |
46 | set_mem_limmed 0xdddd,0xdddd,gr17 | |
47 | set_gr_gr gr17,gr16 | |
48 | inc_gr_immed -4,gr16 | |
49 | set_mem_limmed 0xeeee,0xeeee,gr16 | |
50 | set_gr_gr gr16,gr15 | |
51 | inc_gr_immed -4,gr15 | |
52 | set_mem_limmed 0xf0f0,0xf0f0,gr15 | |
53 | set_gr_gr gr15,gr14 | |
54 | inc_gr_immed -4,gr14 | |
55 | set_mem_limmed 0xf1f1,0xf1f1,gr14 | |
56 | set_gr_gr gr14,gr13 | |
57 | inc_gr_immed -4,gr13 | |
58 | set_mem_limmed 0xf2f2,0xf2f2,gr13 | |
59 | set_gr_limmed 0x1111,0x1111,gr40 | |
60 | set_gr_limmed 0x1111,0x1111,gr41 | |
61 | set_gr_limmed 0x1111,0x1111,gr42 | |
62 | set_gr_limmed 0x1111,0x1111,gr43 | |
63 | inc_gr_immed -12,sp | |
64 | set_gr_immed 0,gr7 | |
65 | set_gr_limmed 0xeeee,0xeeee,gr8 | |
66 | set_gr_limmed 0xffff,0xffff,gr9 | |
67 | set_gr_limmed 0xcccc,0xcccc,gr10 | |
68 | set_gr_limmed 0xdddd,0xdddd,gr11 | |
69 | rstq gr8,@(sp,gr7) | |
70 | test_mem_limmed 0xdddd,0xdddd,gr6 | |
71 | test_mem_limmed 0xcccc,0xcccc,gr27 | |
72 | test_mem_limmed 0xffff,0xffff,gr26 | |
73 | test_mem_limmed 0xeeee,0xeeee,gr25 | |
74 | test_mem_limmed 0x6666,0x6666,gr24 | |
75 | test_mem_limmed 0x7777,0x7777,gr23 | |
76 | test_mem_limmed 0x8888,0x8888,gr22 | |
77 | test_mem_limmed 0x9999,0x9999,gr21 | |
78 | test_mem_limmed 0xaaaa,0xaaaa,gr20 | |
79 | test_mem_limmed 0xbbbb,0xbbbb,gr19 | |
80 | test_mem_limmed 0xcccc,0xcccc,gr18 | |
81 | test_mem_limmed 0xdddd,0xdddd,gr17 | |
82 | test_mem_limmed 0xeeee,0xeeee,gr16 | |
83 | test_mem_limmed 0xf0f0,0xf0f0,gr15 | |
84 | test_mem_limmed 0xf1f1,0xf1f1,gr14 | |
85 | test_mem_limmed 0xf2f2,0xf2f2,gr13 | |
86 | test_gr_limmed 0x1111,0x1111,gr40 | |
87 | test_gr_limmed 0x1111,0x1111,gr41 | |
88 | test_gr_limmed 0x1111,0x1111,gr42 | |
89 | test_gr_limmed 0x1111,0x1111,gr43 | |
90 | ||
91 | ; 1 nesr active with the incorrect address in neear for gr | |
92 | set_gr_gr sp,gr12 | |
d45d015e | 93 | nldq @(sp,gr0),gr40 |
4a306116 DB |
94 | test_spr_gr neear0,gr12 |
95 | set_mem_limmed 0x2222,0x2222,gr6 | |
96 | set_mem_limmed 0x3333,0x3333,gr27 | |
97 | set_mem_limmed 0x4444,0x4444,gr26 | |
98 | set_mem_limmed 0x5555,0x5555,gr25 | |
99 | set_mem_limmed 0x6666,0x6666,gr24 | |
100 | set_mem_limmed 0x7777,0x7777,gr23 | |
101 | set_mem_limmed 0x8888,0x8888,gr22 | |
102 | set_mem_limmed 0x9999,0x9999,gr21 | |
103 | set_mem_limmed 0xaaaa,0xaaaa,gr20 | |
104 | set_mem_limmed 0xbbbb,0xbbbb,gr19 | |
105 | set_mem_limmed 0xcccc,0xcccc,gr18 | |
106 | set_mem_limmed 0xdddd,0xdddd,gr17 | |
107 | set_mem_limmed 0xeeee,0xeeee,gr16 | |
108 | set_mem_limmed 0xf0f0,0xf0f0,gr15 | |
109 | set_mem_limmed 0xf1f1,0xf1f1,gr14 | |
110 | set_mem_limmed 0xf2f2,0xf2f2,gr13 | |
111 | set_gr_limmed 0xeeee,0xeeee,gr8 | |
112 | set_gr_limmed 0xffff,0xffff,gr9 | |
113 | set_gr_limmed 0xcccc,0xcccc,gr10 | |
114 | set_gr_limmed 0xdddd,0xdddd,gr11 | |
115 | set_gr_limmed 0x1111,0x1111,gr40 | |
116 | set_gr_limmed 0x1111,0x1111,gr41 | |
117 | set_gr_limmed 0x1111,0x1111,gr42 | |
118 | set_gr_limmed 0x1111,0x1111,gr43 | |
119 | set_gr_immed -16,gr7 | |
120 | rstq gr8,@(sp,gr7) | |
121 | test_mem_limmed 0x2222,0x2222,gr6 | |
122 | test_mem_limmed 0x3333,0x3333,gr27 | |
123 | test_mem_limmed 0x4444,0x4444,gr26 | |
124 | test_mem_limmed 0x5555,0x5555,gr25 | |
125 | test_mem_limmed 0xdddd,0xdddd,gr24 | |
126 | test_mem_limmed 0xcccc,0xcccc,gr23 | |
127 | test_mem_limmed 0xffff,0xffff,gr22 | |
128 | test_mem_limmed 0xeeee,0xeeee,gr21 | |
129 | test_mem_limmed 0xaaaa,0xaaaa,gr20 | |
130 | test_mem_limmed 0xbbbb,0xbbbb,gr19 | |
131 | test_mem_limmed 0xcccc,0xcccc,gr18 | |
132 | test_mem_limmed 0xdddd,0xdddd,gr17 | |
133 | test_mem_limmed 0xeeee,0xeeee,gr16 | |
134 | test_mem_limmed 0xf0f0,0xf0f0,gr15 | |
135 | test_mem_limmed 0xf1f1,0xf1f1,gr14 | |
136 | test_mem_limmed 0xf2f2,0xf2f2,gr13 | |
137 | test_gr_limmed 0x1111,0x1111,gr40 | |
138 | test_gr_limmed 0x1111,0x1111,gr41 | |
139 | test_gr_limmed 0x1111,0x1111,gr42 | |
140 | test_gr_limmed 0x1111,0x1111,gr43 | |
141 | ||
142 | ; 1 nesr active with the incorrect address in neear for fr | |
143 | inc_gr_immed -16,gr12 | |
144 | nlddfi @(sp,-16),fr40 | |
145 | test_spr_gr neear1,gr12 | |
146 | set_mem_limmed 0x2222,0x2222,gr6 | |
147 | set_mem_limmed 0x3333,0x3333,gr27 | |
148 | set_mem_limmed 0x4444,0x4444,gr26 | |
149 | set_mem_limmed 0x5555,0x5555,gr25 | |
150 | set_mem_limmed 0x6666,0x6666,gr24 | |
151 | set_mem_limmed 0x7777,0x7777,gr23 | |
152 | set_mem_limmed 0x8888,0x8888,gr22 | |
153 | set_mem_limmed 0x9999,0x9999,gr21 | |
154 | set_mem_limmed 0xaaaa,0xaaaa,gr20 | |
155 | set_mem_limmed 0xbbbb,0xbbbb,gr19 | |
156 | set_mem_limmed 0xcccc,0xcccc,gr18 | |
157 | set_mem_limmed 0xdddd,0xdddd,gr17 | |
158 | set_mem_limmed 0xeeee,0xeeee,gr16 | |
159 | set_mem_limmed 0xf0f0,0xf0f0,gr15 | |
160 | set_mem_limmed 0xf1f1,0xf1f1,gr14 | |
161 | set_mem_limmed 0xf2f2,0xf2f2,gr13 | |
162 | set_gr_limmed 0xeeee,0xeeee,gr8 | |
163 | set_gr_limmed 0xffff,0xffff,gr9 | |
164 | set_gr_limmed 0xcccc,0xcccc,gr10 | |
165 | set_gr_limmed 0xdddd,0xdddd,gr11 | |
166 | set_fr_iimmed 0x1111,0x1111,fr40 | |
167 | set_fr_iimmed 0x1111,0x1111,fr41 | |
168 | set_fr_iimmed 0x1111,0x1111,fr42 | |
169 | set_fr_iimmed 0x1111,0x1111,fr43 | |
170 | inc_gr_immed -16,sp | |
171 | set_gr_immed 16,gr7 | |
172 | rstq gr8,@(sp,gr7) | |
173 | test_mem_limmed 0xdddd,0xdddd,gr6 | |
174 | test_mem_limmed 0xcccc,0xcccc,gr27 | |
175 | test_mem_limmed 0xffff,0xffff,gr26 | |
176 | test_mem_limmed 0xeeee,0xeeee,gr25 | |
177 | test_mem_limmed 0x6666,0x6666,gr24 | |
178 | test_mem_limmed 0x7777,0x7777,gr23 | |
179 | test_mem_limmed 0x8888,0x8888,gr22 | |
180 | test_mem_limmed 0x9999,0x9999,gr21 | |
181 | test_mem_limmed 0xaaaa,0xaaaa,gr20 | |
182 | test_mem_limmed 0xbbbb,0xbbbb,gr19 | |
183 | test_mem_limmed 0xcccc,0xcccc,gr18 | |
184 | test_mem_limmed 0xdddd,0xdddd,gr17 | |
185 | test_mem_limmed 0xeeee,0xeeee,gr16 | |
186 | test_mem_limmed 0xf0f0,0xf0f0,gr15 | |
187 | test_mem_limmed 0xf1f1,0xf1f1,gr14 | |
188 | test_mem_limmed 0xf2f2,0xf2f2,gr13 | |
189 | test_fr_limmed 0x1111,0x1111,fr40 | |
190 | test_fr_limmed 0x1111,0x1111,fr41 | |
191 | test_fr_limmed 0x1111,0x1111,fr42 | |
192 | test_fr_limmed 0x1111,0x1111,fr43 | |
193 | ||
194 | ; 1 nesr active with the correct address in neear for gr | |
195 | inc_gr_immed -16,gr12 | |
196 | nlddi @(sp,-16),gr40 | |
197 | test_spr_gr neear2,gr12 | |
198 | set_mem_limmed 0x2222,0x2222,gr6 | |
199 | set_mem_limmed 0x3333,0x3333,gr27 | |
200 | set_mem_limmed 0x4444,0x4444,gr26 | |
201 | set_mem_limmed 0x5555,0x5555,gr25 | |
202 | set_mem_limmed 0x6666,0x6666,gr24 | |
203 | set_mem_limmed 0x7777,0x7777,gr23 | |
204 | set_mem_limmed 0x8888,0x8888,gr22 | |
205 | set_mem_limmed 0x9999,0x9999,gr21 | |
206 | set_mem_limmed 0xaaaa,0xaaaa,gr20 | |
207 | set_mem_limmed 0xbbbb,0xbbbb,gr19 | |
208 | set_mem_limmed 0xcccc,0xcccc,gr18 | |
209 | set_mem_limmed 0xdddd,0xdddd,gr17 | |
210 | set_mem_limmed 0xeeee,0xeeee,gr16 | |
211 | set_mem_limmed 0xf0f0,0xf0f0,gr15 | |
212 | set_mem_limmed 0xf1f1,0xf1f1,gr14 | |
213 | set_mem_limmed 0xf2f2,0xf2f2,gr13 | |
214 | set_gr_limmed 0xeeee,0xeeee,gr8 | |
215 | set_gr_limmed 0xffff,0xffff,gr9 | |
216 | set_gr_limmed 0xcccc,0xcccc,gr10 | |
217 | set_gr_limmed 0xdddd,0xdddd,gr11 | |
218 | set_gr_limmed 0x1111,0x1111,gr40 | |
219 | set_gr_limmed 0x1111,0x1111,gr41 | |
220 | set_gr_limmed 0x1111,0x1111,gr42 | |
221 | set_gr_limmed 0x1111,0x1111,gr43 | |
222 | inc_gr_immed -16,sp | |
223 | set_gr_immed 0,gr7 | |
224 | rstq gr8,@(sp,gr7) | |
225 | test_mem_limmed 0x2222,0x2222,gr6 | |
226 | test_mem_limmed 0x3333,0x3333,gr27 | |
227 | test_mem_limmed 0x4444,0x4444,gr26 | |
228 | test_mem_limmed 0x5555,0x5555,gr25 | |
229 | test_mem_limmed 0x6666,0x6666,gr24 | |
230 | test_mem_limmed 0x7777,0x7777,gr23 | |
231 | test_mem_limmed 0x8888,0x8888,gr22 | |
232 | test_mem_limmed 0x9999,0x9999,gr21 | |
233 | test_mem_limmed 0xdddd,0xdddd,gr20 | |
234 | test_mem_limmed 0xcccc,0xcccc,gr19 | |
235 | test_mem_limmed 0xffff,0xffff,gr18 | |
236 | test_mem_limmed 0xeeee,0xeeee,gr17 | |
237 | test_mem_limmed 0xeeee,0xeeee,gr16 | |
238 | test_mem_limmed 0xf0f0,0xf0f0,gr15 | |
239 | test_mem_limmed 0xf1f1,0xf1f1,gr14 | |
240 | test_mem_limmed 0xf2f2,0xf2f2,gr13 | |
241 | test_gr_limmed 0xeeee,0xeeee,gr40 | |
242 | test_gr_limmed 0xffff,0xffff,gr41 | |
243 | test_gr_limmed 0xcccc,0xcccc,gr42 | |
244 | test_gr_limmed 0xdddd,0xdddd,gr43 | |
245 | ||
246 | ; 1 nesr active with the correct address in neear for fr | |
247 | inc_gr_immed -16,gr12 | |
248 | nlddfi @(sp,-16),fr40 | |
249 | test_spr_gr neear3,gr12 | |
250 | set_mem_limmed 0x2222,0x2222,gr6 | |
251 | set_mem_limmed 0x3333,0x3333,gr27 | |
252 | set_mem_limmed 0x4444,0x4444,gr26 | |
253 | set_mem_limmed 0x5555,0x5555,gr25 | |
254 | set_mem_limmed 0x6666,0x6666,gr24 | |
255 | set_mem_limmed 0x7777,0x7777,gr23 | |
256 | set_mem_limmed 0x8888,0x8888,gr22 | |
257 | set_mem_limmed 0x9999,0x9999,gr21 | |
258 | set_mem_limmed 0xaaaa,0xaaaa,gr20 | |
259 | set_mem_limmed 0xbbbb,0xbbbb,gr19 | |
260 | set_mem_limmed 0xcccc,0xcccc,gr18 | |
261 | set_mem_limmed 0xdddd,0xdddd,gr17 | |
262 | set_mem_limmed 0xeeee,0xeeee,gr16 | |
263 | set_mem_limmed 0xf0f0,0xf0f0,gr15 | |
264 | set_mem_limmed 0xf1f1,0xf1f1,gr14 | |
265 | set_mem_limmed 0xf2f2,0xf2f2,gr13 | |
266 | set_gr_limmed 0xeeee,0xeeee,gr8 | |
267 | set_gr_limmed 0xffff,0xffff,gr9 | |
268 | set_gr_limmed 0xcccc,0xcccc,gr10 | |
269 | set_gr_limmed 0xdddd,0xdddd,gr11 | |
270 | set_fr_iimmed 0x1111,0x1111,fr40 | |
271 | set_fr_iimmed 0x1111,0x1111,fr41 | |
272 | set_fr_iimmed 0x1111,0x1111,fr42 | |
273 | set_fr_iimmed 0x1111,0x1111,fr43 | |
274 | set_gr_immed -16,gr7 | |
275 | rstq gr8,@(sp,gr7) | |
276 | test_mem_limmed 0x2222,0x2222,gr6 | |
277 | test_mem_limmed 0x3333,0x3333,gr27 | |
278 | test_mem_limmed 0x4444,0x4444,gr26 | |
279 | test_mem_limmed 0x5555,0x5555,gr25 | |
280 | test_mem_limmed 0x6666,0x6666,gr24 | |
281 | test_mem_limmed 0x7777,0x7777,gr23 | |
282 | test_mem_limmed 0x8888,0x8888,gr22 | |
283 | test_mem_limmed 0x9999,0x9999,gr21 | |
284 | test_mem_limmed 0xaaaa,0xaaaa,gr20 | |
285 | test_mem_limmed 0xbbbb,0xbbbb,gr19 | |
286 | test_mem_limmed 0xcccc,0xcccc,gr18 | |
287 | test_mem_limmed 0xdddd,0xdddd,gr17 | |
288 | test_mem_limmed 0xdddd,0xdddd,gr16 | |
289 | test_mem_limmed 0xcccc,0xcccc,gr15 | |
290 | test_mem_limmed 0xffff,0xffff,gr14 | |
291 | test_mem_limmed 0xeeee,0xeeee,gr13 | |
292 | test_fr_limmed 0xeeee,0xeeee,fr40 | |
293 | test_fr_limmed 0xffff,0xffff,fr41 | |
294 | test_fr_limmed 0xcccc,0xcccc,fr42 | |
295 | test_fr_limmed 0xdddd,0xdddd,fr43 | |
296 | ||
297 | pass |