[deliverable/binutils-gdb.git] / sim / testsuite / sim / or1k / or1k-asm-test-helpers.h

/* Testsuite helpers for OpenRISC.

   Copyright (C) 2017-2020 Free Software Foundation, Inc.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#ifndef OR1K_ASM_TEST_HELPERS_H
#define OR1K_ASM_TEST_HELPERS_H

#include "spr-defs.h"
#include "or1k-asm-test-env.h"

	/* During exception handling the instruction under test is
	   overwritten with a nop.  Here we check if that is the case and
	   report.  */

	.macro REPORT_EXCEPTION  instruction_addr
	PUSH r2
	PUSH r3
	LOAD_IMMEDIATE r3, \instruction_addr
	l.lws r2, 0(r3)
	LOAD_IMMEDIATE r3, 0x15000000 /* l.nop */
	l.sfeq r2, r3
	OR1K_DELAYED_NOP (l.bnf 1f)
	REPORT_IMMEDIATE_TO_CONSOLE 0x00000001
	OR1K_DELAYED_NOP (l.j 2f)
1:
	REPORT_IMMEDIATE_TO_CONSOLE 0x00000000
2:
	POP r3
	POP r2
	.endm

	/* Test that will set and clear sr flags, run instruction report
	   the result and whether or not there was an exception.

	   Arguments:
	     flags_to_set - sr flags to set
	     flags_to_clear - sr flags to clear
	     opcode - the instruction to execute
	     op1 - first argument to the instruction
	     op2 - second argument to the function

	   Reports:
	     report(0x00000001);\n op1
	     report(0x00000002);\n op1
	     report(0x00000003);\n result
	     report(0x00000000);\n 1 if carry
	     report(0x00000000);\n 1 if overflow
	     report(0x00000000);\n 1 if exception
	     \n */

	.macro TEST_INST_FF_I32_I32  flags_to_set, flags_to_clear, opcode, op1, op2
	LOAD_IMMEDIATE r5, \op1
	LOAD_IMMEDIATE r6, \op2
	REPORT_REG_TO_CONSOLE r5
	REPORT_REG_TO_CONSOLE r6
	/* Clear the last exception address.  */
	MOVE_TO_SPR SPR_EPCR_BASE, ZERO_R0
	SET_SPR_SR_FLAGS   \flags_to_set  , r2, r3
	CLEAR_SPR_SR_FLAGS \flags_to_clear, r2, r3
\@1$:	\opcode r4, r5, r6
	MOVE_FROM_SPR r2, SPR_SR /* Save the flags.  */
	REPORT_REG_TO_CONSOLE r4

	REPORT_BIT_TO_CONSOLE r2, SPR_SR_CY
	REPORT_BIT_TO_CONSOLE r2, SPR_SR_OV
	REPORT_EXCEPTION \@1$
	PRINT_NEWLINE_TO_CONSOLE
	.endm

	.macro TEST_INST_FF_I32_I16  flags_to_set, flags_to_clear, opcode, op1, op2
	LOAD_IMMEDIATE r5, \op1
	REPORT_REG_TO_CONSOLE r5
	REPORT_IMMEDIATE_TO_CONSOLE \op2
	SET_SPR_SR_FLAGS   \flags_to_set  , r2, r3
	CLEAR_SPR_SR_FLAGS \flags_to_clear, r2, r3
	/* Clear the last exception address.  */
	MOVE_TO_SPR SPR_EPCR_BASE, ZERO_R0
\@1$:	\opcode r4, r5, \op2
	MOVE_FROM_SPR r2, SPR_SR /* Save the flags.  */
	REPORT_REG_TO_CONSOLE r4
	REPORT_BIT_TO_CONSOLE r2, SPR_SR_CY
	REPORT_BIT_TO_CONSOLE r2, SPR_SR_OV
	REPORT_EXCEPTION \@1$
	PRINT_NEWLINE_TO_CONSOLE
	.endm

	.macro TEST_INST_I32_I32  opcode, op1, op2
	TEST_INST_FF_I32_I32 0, 0, \opcode, \op1, \op2
	.endm

	.macro TEST_INST_I32_I16  opcode, op1, op2
	TEST_INST_FF_I32_I16 0, 0, \opcode, \op1, \op2
	.endm

	.macro CHECK_CARRY_AND_OVERFLOW_NOT_SET  overwritten_reg1, overwritten_reg2
	MOVE_FROM_SPR \overwritten_reg1, SPR_SR

	LOAD_IMMEDIATE \overwritten_reg2, SPR_SR_CY + SPR_SR_OV
	l.and   \overwritten_reg1, \overwritten_reg1, \overwritten_reg2
	l.sfne \overwritten_reg1, ZERO_R0

	OR1K_DELAYED_NOP (l.bnf \@2$)

	EXIT_SIMULATION_WITH_IMMEDIATE_EXIT_CODE  SEC_GENERIC_ERROR
\@2$:
	.endm

#endif /* OR1K_ASM_TEST_HELPERS_H */
Commit	Line	Data
702d582e PG	1	/* Testsuite helpers for OpenRISC.
702d582e PG	2
b811d2c2	3	Copyright (C) 2017-2020 Free Software Foundation, Inc.
702d582e PG	4
	5	This program is free software; you can redistribute it and/or modify
	6	it under the terms of the GNU General Public License as published by
	7	the Free Software Foundation; either version 3 of the License, or
	8	(at your option) any later version.
	9
	10	This program is distributed in the hope that it will be useful,
	11	but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	GNU General Public License for more details.
	14
	15	You should have received a copy of the GNU General Public License
	16	along with this program. If not, see <http://www.gnu.org/licenses/>. */
	17
	18	#ifndef OR1K_ASM_TEST_HELPERS_H
	19	#define OR1K_ASM_TEST_HELPERS_H
	20
	21	#include "spr-defs.h"
	22	#include "or1k-asm-test-env.h"
	23
	24	/* During exception handling the instruction under test is
	25	overwritten with a nop. Here we check if that is the case and
	26	report. */
	27
	28	.macro REPORT_EXCEPTION instruction_addr
	29	PUSH r2
	30	PUSH r3
	31	LOAD_IMMEDIATE r3, \instruction_addr
	32	l.lws r2, 0(r3)
	33	LOAD_IMMEDIATE r3, 0x15000000 /* l.nop */
	34	l.sfeq r2, r3
	35	OR1K_DELAYED_NOP (l.bnf 1f)
	36	REPORT_IMMEDIATE_TO_CONSOLE 0x00000001
	37	OR1K_DELAYED_NOP (l.j 2f)
	38	1:
	39	REPORT_IMMEDIATE_TO_CONSOLE 0x00000000
	40	2:
	41	POP r3
	42	POP r2
	43	.endm
	44
	45	/* Test that will set and clear sr flags, run instruction report
	46	the result and whether or not there was an exception.
	47
	48	Arguments:
	49	flags_to_set - sr flags to set
	50	flags_to_clear - sr flags to clear
	51	opcode - the instruction to execute
	52	op1 - first argument to the instruction
	53	op2 - second argument to the function
	54
	55	Reports:
	56	report(0x00000001);\n op1
	57	report(0x00000002);\n op1
	58	report(0x00000003);\n result
	59	report(0x00000000);\n 1 if carry
	60	report(0x00000000);\n 1 if overflow
	61	report(0x00000000);\n 1 if exception
	62	\n */
	63
	64	.macro TEST_INST_FF_I32_I32 flags_to_set, flags_to_clear, opcode, op1, op2
	65	LOAD_IMMEDIATE r5, \op1
	66	LOAD_IMMEDIATE r6, \op2
	67	REPORT_REG_TO_CONSOLE r5
68	REPORT_REG_TO_CONSOLE r6
69	/* Clear the last exception address. */
70	MOVE_TO_SPR SPR_EPCR_BASE, ZERO_R0
71	SET_SPR_SR_FLAGS \flags_to_set , r2, r3
72	CLEAR_SPR_SR_FLAGS \flags_to_clear, r2, r3
73	\@1$: \opcode r4, r5, r6
74	MOVE_FROM_SPR r2, SPR_SR /* Save the flags. */
75	REPORT_REG_TO_CONSOLE r4
76
77	REPORT_BIT_TO_CONSOLE r2, SPR_SR_CY
78	REPORT_BIT_TO_CONSOLE r2, SPR_SR_OV
79	REPORT_EXCEPTION \@1$
80	PRINT_NEWLINE_TO_CONSOLE
81	.endm
82
83	.macro TEST_INST_FF_I32_I16 flags_to_set, flags_to_clear, opcode, op1, op2
84	LOAD_IMMEDIATE r5, \op1
85	REPORT_REG_TO_CONSOLE r5
86	REPORT_IMMEDIATE_TO_CONSOLE \op2
87	SET_SPR_SR_FLAGS \flags_to_set , r2, r3
88	CLEAR_SPR_SR_FLAGS \flags_to_clear, r2, r3
89	/* Clear the last exception address. */
90	MOVE_TO_SPR SPR_EPCR_BASE, ZERO_R0
91	\@1$: \opcode r4, r5, \op2
92	MOVE_FROM_SPR r2, SPR_SR /* Save the flags. */
93	REPORT_REG_TO_CONSOLE r4
94	REPORT_BIT_TO_CONSOLE r2, SPR_SR_CY
95	REPORT_BIT_TO_CONSOLE r2, SPR_SR_OV
96	REPORT_EXCEPTION \@1$
97	PRINT_NEWLINE_TO_CONSOLE
98	.endm
99
100	.macro TEST_INST_I32_I32 opcode, op1, op2
101	TEST_INST_FF_I32_I32 0, 0, \opcode, \op1, \op2
102	.endm
103
104	.macro TEST_INST_I32_I16 opcode, op1, op2
105	TEST_INST_FF_I32_I16 0, 0, \opcode, \op1, \op2
106	.endm
107
108	.macro CHECK_CARRY_AND_OVERFLOW_NOT_SET overwritten_reg1, overwritten_reg2
109	MOVE_FROM_SPR \overwritten_reg1, SPR_SR
110
111	LOAD_IMMEDIATE \overwritten_reg2, SPR_SR_CY + SPR_SR_OV
112	l.and \overwritten_reg1, \overwritten_reg1, \overwritten_reg2
113	l.sfne \overwritten_reg1, ZERO_R0
114
115	OR1K_DELAYED_NOP (l.bnf \@2$)
116
117	EXIT_SIMULATION_WITH_IMMEDIATE_EXIT_CODE SEC_GENERIC_ERROR
118	\@2$:
119	.endm
120
121	#endif /* OR1K_ASM_TEST_HELPERS_H */