And short immediate instructions use unsigned immediates, not signed.

[deliverable/binutils-gdb.git] / sim / tic80 / ChangeLog

Sat May 10 12:35:47 1997  Michael Meissner  <meissner@cygnus.com>

	* insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
	signed.

Fri May  9 15:47:36 1997  Mike Meissner  <meissner@cygnus.com>

	* insns (cmp_vals,do_cmp): Produce the correct bits as specified
	by the architecture.
	(xor): Fix xor immediate patterns to use the correct bits.

Fri May  9 09:55:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* alu.h (long_immediate): Adjust the CIA delay-pointer as well as
 	the NIA when a 64bit insn.

Thu May  8 11:57:47 1997  Michael Meissner  <meissner@cygnus.com>

	* insns (jsr,bsr): For non-allulled calls, set r31 so that the
	return address does not reexecute the instruction in the delay
	slot.
	(bbo,bbz): Complement bit number to reverse the one's complement
	that the assembler is required to do.

	* misc.c (tic80_trace_*): Change format slightly to accomidate
	real large decimal values.

Thu May  8 14:07:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* sim-calls.c (sim_do_command): Implement.
	(sim_store_register): Fix typo T2H v H2T.

Wed May  7 11:48:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
	* insn: Clean up fpu tracing.

	* sim-calls.c (sim_create_inferior): Start out with interrupts
 	enabled.

	* cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
 	sink

	* insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.

	* insns (do_*): Remove MY_INDEX/indx argument from support functions,
 	igen now handles this.
	
	* cpu.h (CR): New macro - access TIc80 control registers.
	
	* misc.c: New file.
	(tic80_cr2index): New function, map control register opcode index
 	into the internal CR enum.

	* interp.c
 	(tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
 	here
	* misc.c: to here.
	
	* Makefile.in (SIM_OBJS): Add misc.o.

Tue May  6 15:22:58 1997  Mike Meissner  <meissner@cygnus.com>

	* cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
	big endian hosts.
	(tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
	new functions.
	(TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
	trace various instruction types.

	* insns: Modify all instructions to support semantic tracing.

	* interp.c (toplevel): Include itable.h.
	(tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
	functions to provide semantic level tracing information.

Mon May  5 11:50:43 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* alu.h: Update usage of core object to reflect recent changes in
 	../common/sim-*core.
	* sim-calls.c (sim_open): Ditto.

Mon May  5 14:10:17 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* insn (cmnd): No-op cache flushes.
	
	* insns (do_trap): Allow writes to STDERR.

	* Makefile.in (SIM_OBJS): Link in sim-fpu.o.
	(SIM_EXTRA_LIBS): Link in the math library.

	* alu.h: Add support for floating point unit using sim-alu.
	
	* insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.

Fri May  2 14:57:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* sim-calls.c: Include sim-utils.h and sim-options.h.

	* sim-main.h (sim_state): Drop sim_events and sim_core members,
 	moved to simulator base type.

	* alu.h (IMEM, MEM, STORE): Update track changes in common
 	directory.

	* insns: Drop cia argument from functions, igen now handles this.

	* interp.c (engine_init): Include string.h/strings.h to define
 	memset et.al.

	* sim-main.h (sim_cia): Delcare, tracking common dir changes.

	* cpu.h (sim_cpu): Update instruction_address with sim_cia.

Wed Apr 30 11:26:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* sim-main.h (signal.h): Include so that SIG* available to all
 	callers of sig_halt.

	* insns (do_shift): New function, implement shift operations.
	(do_trap): Add handler for trap 73 - SIGTRAP.
	
Tue Apr 29 10:58:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* alu.h (MEM, STORE): Force addresses to be correctly aligned.

	* insns (do_jsr): Fix.
	(do_st, do_ld): Handle 64bit transfers.
	(do_trap): Match libgloss.
	(rdcr): Implement nop - Dest == r0 - variant.

	* sim-calls.c (sim_create_inferior): Initialize SP.

	* Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
	(support.o): Depends on ENGINE_H.

	* cpu.h: Four accumulators.

	* Makefile.in (tmp-igen): Include line number information in
 	generated files.

	* insns (dld, dst): Fill in.

Mon Apr 28 13:02:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* insns (vld): Fix instruction format wrong.

Thu Apr 24 16:43:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* dc: Add additional rules so that minor opcode files are
 	detected.
	* insns: Enable more instructions.
	
	* sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
 	Implement.

Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>

	* configure: Regenerated to track ../common/aclocal.m4 changes.
	* Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
	* sim-calls.c (sim_open): Call sim_module_uninstall if argument
	parsing fails.  Call sim_post_argv_init.
	(sim_close): Call sim_module_uninstall.

Wed Apr 23 20:05:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>

	* insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
  	* ic: Add fields for enabled instructions.