Commit | Line | Data |
---|---|---|
7b167b09 MM |
1 | Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com> |
2 | ||
3 | * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on | |
4 | big endian hosts. | |
5 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare | |
6 | new functions. | |
7 | (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to | |
8 | trace various instruction types. | |
9 | ||
10 | * insns: Modify all instructions to support semantic tracing. | |
11 | ||
12 | * interp.c (toplevel): Include itable.h. | |
13 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New | |
14 | functions to provide semantic level tracing information. | |
15 | ||
7a418800 AC |
16 | Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com> |
17 | ||
18 | * alu.h: Update usage of core object to reflect recent changes in | |
19 | ../common/sim-*core. | |
20 | * sim-calls.c (sim_open): Ditto. | |
21 | ||
3971886a AC |
22 | Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com> |
23 | ||
24 | * insn (cmnd): No-op cache flushes. | |
25 | ||
26 | * insns (do_trap): Allow writes to STDERR. | |
27 | ||
28 | * Makefile.in (SIM_OBJS): Link in sim-fpu.o. | |
29 | (SIM_EXTRA_LIBS): Link in the math library. | |
30 | ||
31 | * alu.h: Add support for floating point unit using sim-alu. | |
32 | ||
33 | * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement. | |
34 | ||
d9b75947 AC |
35 | Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com> |
36 | ||
37 | * sim-calls.c: Include sim-utils.h and sim-options.h. | |
38 | ||
39 | * sim-main.h (sim_state): Drop sim_events and sim_core members, | |
40 | moved to simulator base type. | |
41 | ||
42 | * alu.h (IMEM, MEM, STORE): Update track changes in common | |
43 | directory. | |
44 | ||
45 | * insns: Drop cia argument from functions, igen now handles this. | |
46 | ||
47 | * interp.c (engine_init): Include string.h/strings.h to define | |
48 | memset et.al. | |
49 | ||
50 | * sim-main.h (sim_cia): Delcare, tracking common dir changes. | |
51 | ||
52 | * cpu.h (sim_cpu): Update instruction_address with sim_cia. | |
53 | ||
c1c77d40 AC |
54 | Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com> |
55 | ||
56 | * sim-main.h (signal.h): Include so that SIG* available to all | |
57 | callers of sig_halt. | |
58 | ||
59 | * insns (do_shift): New function, implement shift operations. | |
60 | (do_trap): Add handler for trap 73 - SIGTRAP. | |
61 | ||
d5e2c74e AC |
62 | Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com> |
63 | ||
64 | * alu.h (MEM, STORE): Force addresses to be correctly aligned. | |
65 | ||
66 | * insns (do_jsr): Fix. | |
67 | (do_st, do_ld): Handle 64bit transfers. | |
68 | (do_trap): Match libgloss. | |
69 | (rdcr): Implement nop - Dest == r0 - variant. | |
70 | ||
71 | * sim-calls.c (sim_create_inferior): Initialize SP. | |
72 | ||
73 | * Makefile.in (ENGINE_H): Everything now depends on sim-options.h. | |
74 | (support.o): Depends on ENGINE_H. | |
75 | ||
76 | * cpu.h: Four accumulators. | |
77 | ||
78 | * Makefile.in (tmp-igen): Include line number information in | |
79 | generated files. | |
80 | ||
81 | * insns (dld, dst): Fill in. | |
82 | ||
83 | Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
84 | ||
85 | * insns (vld): Fix instruction format wrong. | |
86 | ||
abe293a0 AC |
87 | Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com> |
88 | ||
89 | * dc: Add additional rules so that minor opcode files are | |
90 | detected. | |
91 | * insns: Enable more instructions. | |
92 | ||
93 | * sim-calls.c (sim_fetch_register,sim_store_register, sim_write): | |
94 | Implement. | |
95 | ||
dd442a44 DE |
96 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> |
97 | ||
98 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
99 | * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o. | |
100 | * sim-calls.c (sim_open): Call sim_module_uninstall if argument | |
101 | parsing fails. Call sim_post_argv_init. | |
102 | (sim_close): Call sim_module_uninstall. | |
103 | ||
480e740c AC |
104 | Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com> |
105 | ||
106 | * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable. | |
107 | * ic: Add fields for enabled instructions. | |
108 |