Commit | Line | Data |
---|---|---|
f03b093c AC |
1 | Fri May 16 14:35:30 1997 Andrew Cagney <cagney@b1.cygnus.com> |
2 | ||
3 | * insns (illegal, fp_unavailable): Halt instead of abort the | |
4 | simulator. | |
5 | ||
6 | * insns: Replace calls to engine_error with sim_engine_abort. | |
7 | Ditto for engine_halt V sim_engine_halt. | |
8 | ||
9 | Tue May 13 15:24:12 1997 Andrew Cagney <cagney@b2.cygnus.com> | |
10 | ||
11 | * interp.c (engine_run_until_stop): Delete. Moved to common. | |
12 | (engine_step): Ditto. | |
13 | (engine_step): Ditto. | |
14 | (engine_halt): Ditto. | |
15 | (engine_restart): Ditto. | |
16 | (engine_halt): Ditto. | |
17 | (engine_error): Ditto. | |
18 | ||
19 | * sim-calls.c (sim_stop): Delete. Moved to common. | |
20 | (sim_stop_reason): Ditto. | |
21 | (sim_resume): Ditto. | |
22 | ||
23 | * Makefile.in (SIM_OBJS): Link in generic sim-engine, sim-run, | |
24 | sim-resume, sim-reason, sim-stop modules. | |
25 | ||
37a684b8 AC |
26 | Fri May 16 11:57:49 1997 Andrew Cagney <cagney@b1.cygnus.com> |
27 | ||
28 | * ic (compute): Drop check for REG == 0, now always forced to | |
29 | zero. | |
30 | ||
31 | * cpu.h (GPR_SET): New macro update the gpr. | |
32 | * insns (do_add): Use GPR_SET to update the GPR register. | |
33 | ||
34 | * sim-calls.c (sim_fetch_register): Pretend that r0 is zero. | |
35 | ||
36 | * Makefile.in (tmp-igen): Specify zero-r0 so that every | |
37 | instruction clears r0. | |
38 | ||
39 | * interp.c (engine_run_until_stop): Igen now generates code to | |
40 | clear r0. | |
41 | (engine_step): Ditto. | |
42 | ||
aa3a0447 AC |
43 | Thu May 15 11:45:37 1997 Andrew Cagney <cagney@b1.cygnus.com> |
44 | ||
07b4c0a6 AC |
45 | * insns (do_shift): When rot==0 and zero/sign merge treat it as |
46 | 32. | |
47 | (set_fp_reg): For interger conversion, use sim-fpu fpu2i | |
48 | functions. | |
49 | (do_fmpy): Perform iii and uuu using integer arithmetic. | |
50 | ||
51 | * Makefile.in (ENGINE_H): Assume everything depends on the fpu. | |
52 | ||
aa3a0447 AC |
53 | * insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned |
54 | conversion. | |
55 | (do_fcmp): Update to use new fp compare functions. Make reg nr arg | |
56 | instead of reg. Stops fp overflow. | |
57 | (get_fp_reg): Assume val is valid when reg == 0. | |
58 | (set_fp_reg): Fix double conversion. | |
59 | ||
60 | * misc.c (tic80_trace_fpu1): New function, trace simple fp op. | |
61 | ||
62 | * insns (do_frnd): Add tracing. | |
63 | ||
64 | * cpu.h (TRACE_FPU1): Ditto. | |
2310e3c2 AC |
65 | |
66 | * insns (do_trap): Printf formatting. | |
67 | ||
93555c3b MM |
68 | Wed May 14 18:05:50 1997 Mike Meissner <meissner@cygnus.com> |
69 | ||
70 | * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other | |
71 | insns. Use %g to print floating point instead of %f in case the | |
72 | numbers are real large. | |
73 | ||
1b6f4dde MM |
74 | Tue May 13 18:00:10 1997 Mike Meissner <meissner@cygnus.com> |
75 | ||
76 | * insns (do_trap): For system calls that are defined, but not | |
77 | provided return EINVAL. Temporarily add traps 74-79 to just print | |
78 | the register state. | |
79 | ||
80 | * interp.c (engine_{run_until_stop,step}): Before executing | |
81 | instructions, make sure r0 == 0. | |
82 | ||
84902350 AC |
83 | Tue May 13 16:39:37 1997 Andrew Cagney <cagney@b1.cygnus.com> |
84 | ||
85 | * alu.h (IMEM): Take full cia not just IP as argument. | |
86 | ||
87 | * interp.c (engine_run_until_stop): Delete handling of annuled | |
88 | instructions. | |
89 | (engine_step): Ditto. | |
90 | ||
91 | * insn (do_branch): New function. | |
92 | (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle | |
93 | annuled branches. | |
94 | ||
d01082ad MM |
95 | Mon May 12 17:15:52 1997 Mike Meissner <meissner@cygnus.com> |
96 | ||
97 | * insns (do_{ld,st}): Fix tracing for ld/st. | |
98 | ||
c445af5a AC |
99 | Mon May 12 11:12:24 1997 Andrew Cagney <cagney@b1.cygnus.com> |
100 | ||
9af5dcea AC |
101 | * sim-calls.c (sim_stop_reason): Restore keep_running after a |
102 | CNTRL-C, don't re-clear it. | |
103 | ||
104 | * interp.c (engine_error): stop rather than signal with SIGABRT | |
105 | when an error. | |
106 | ||
c445af5a AC |
107 | * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in |
108 | rDest + 1. Also done by Michael Meissner <meissner@cygnus.com> | |
109 | (do_st): Converse for store. | |
110 | ||
111 | * misc.c (tic80_trace_fpu2i): Correct printf format for int type. | |
112 | ||
113 | Sun May 11 11:02:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
114 | ||
115 | * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running | |
116 | was cleared. | |
117 | ||
118 | * interp.c (engine_step): New function. Single step the simulator | |
119 | taking care of cntrl-c during a step. | |
120 | ||
121 | * sim-calls.c (sim_resume): Differentiate between stepping and | |
122 | running so that a cntrl-c during a step is reported. | |
123 | ||
124 | Sun May 11 10:54:31 1997 Mark Alexander <marka@cygnus.com> | |
125 | ||
126 | * sim-calls.c (sim_fetch_register): Use correct reg base. | |
127 | (sim_store_register): Ditto. | |
128 | ||
450be234 MM |
129 | Sun May 11 10:25:14 1997 Michael Meissner <meissner@cygnus.com> |
130 | ||
131 | * cpu.h (tic80_trace_shift): Add declaration. | |
132 | (TRACE_SHIFT): New macro to trace shift instructions. | |
133 | ||
134 | * misc.c (tic80_trace_alu2): Align spacing. | |
135 | (tic80_trace_shift): New function to trace shifts. | |
136 | ||
137 | * insns (lmo): Add missing 0b prefix to bits. | |
138 | (do_shift): Use ~ (unsigned32)0, instead of -1. Use TRACE_SHIFT | |
139 | instead of TRACE_ALU2. | |
140 | (sl r): Use EndMask as is, instead of using Source+1 register. | |
141 | (subu): Operands are unsigned, not signed. | |
8ad60788 | 142 | (do_{ld,st}): Fix endian problems with ld.d/st.d. |
450be234 | 143 | |
20b2f9bc MM |
144 | Sat May 10 12:35:47 1997 Michael Meissner <meissner@cygnus.com> |
145 | ||
146 | * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not | |
147 | signed. | |
148 | ||
aaa7b252 MM |
149 | Fri May 9 15:47:36 1997 Mike Meissner <meissner@cygnus.com> |
150 | ||
151 | * insns (cmp_vals,do_cmp): Produce the correct bits as specified | |
152 | by the architecture. | |
89d1a478 | 153 | (xor): Fix xor immediate patterns to use the correct bits. |
aaa7b252 | 154 | |
9efd3f74 AC |
155 | Fri May 9 09:55:33 1997 Andrew Cagney <cagney@b1.cygnus.com> |
156 | ||
157 | * alu.h (long_immediate): Adjust the CIA delay-pointer as well as | |
158 | the NIA when a 64bit insn. | |
159 | ||
e42224cc MM |
160 | Thu May 8 11:57:47 1997 Michael Meissner <meissner@cygnus.com> |
161 | ||
53dcd669 MM |
162 | * insns (jsr,bsr): For non-allulled calls, set r31 so that the |
163 | return address does not reexecute the instruction in the delay | |
164 | slot. | |
c3cad878 MM |
165 | (bbo,bbz): Complement bit number to reverse the one's complement |
166 | that the assembler is required to do. | |
53dcd669 | 167 | |
8c3b5af1 MM |
168 | * misc.c (tic80_trace_*): Change format slightly to accomidate |
169 | real large decimal values. | |
e42224cc | 170 | |
43c53e07 AC |
171 | Thu May 8 14:07:16 1997 Andrew Cagney <cagney@b1.cygnus.com> |
172 | ||
173 | * sim-calls.c (sim_do_command): Implement. | |
174 | (sim_store_register): Fix typo T2H v H2T. | |
175 | ||
381f42ef AC |
176 | Wed May 7 11:48:55 1997 Andrew Cagney <cagney@b1.cygnus.com> |
177 | ||
178 | * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add. | |
179 | * insn: Clean up fpu tracing. | |
180 | ||
181 | * sim-calls.c (sim_create_inferior): Start out with interrupts | |
182 | enabled. | |
183 | ||
184 | * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument | |
185 | sink | |
186 | ||
187 | * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement. | |
188 | ||
189 | * insns (do_*): Remove MY_INDEX/indx argument from support functions, | |
190 | igen now handles this. | |
191 | ||
192 | * cpu.h (CR): New macro - access TIc80 control registers. | |
193 | ||
194 | * misc.c: New file. | |
195 | (tic80_cr2index): New function, map control register opcode index | |
196 | into the internal CR enum. | |
197 | ||
198 | * interp.c | |
199 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from | |
200 | here | |
201 | * misc.c: to here. | |
202 | ||
203 | * Makefile.in (SIM_OBJS): Add misc.o. | |
204 | ||
7b167b09 MM |
205 | Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com> |
206 | ||
207 | * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on | |
208 | big endian hosts. | |
209 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare | |
210 | new functions. | |
211 | (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to | |
212 | trace various instruction types. | |
213 | ||
214 | * insns: Modify all instructions to support semantic tracing. | |
215 | ||
216 | * interp.c (toplevel): Include itable.h. | |
217 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New | |
218 | functions to provide semantic level tracing information. | |
219 | ||
7a418800 AC |
220 | Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com> |
221 | ||
222 | * alu.h: Update usage of core object to reflect recent changes in | |
223 | ../common/sim-*core. | |
224 | * sim-calls.c (sim_open): Ditto. | |
225 | ||
3971886a AC |
226 | Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com> |
227 | ||
228 | * insn (cmnd): No-op cache flushes. | |
229 | ||
230 | * insns (do_trap): Allow writes to STDERR. | |
231 | ||
232 | * Makefile.in (SIM_OBJS): Link in sim-fpu.o. | |
233 | (SIM_EXTRA_LIBS): Link in the math library. | |
234 | ||
235 | * alu.h: Add support for floating point unit using sim-alu. | |
236 | ||
237 | * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement. | |
238 | ||
d9b75947 AC |
239 | Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com> |
240 | ||
241 | * sim-calls.c: Include sim-utils.h and sim-options.h. | |
242 | ||
243 | * sim-main.h (sim_state): Drop sim_events and sim_core members, | |
244 | moved to simulator base type. | |
245 | ||
246 | * alu.h (IMEM, MEM, STORE): Update track changes in common | |
247 | directory. | |
248 | ||
249 | * insns: Drop cia argument from functions, igen now handles this. | |
250 | ||
251 | * interp.c (engine_init): Include string.h/strings.h to define | |
252 | memset et.al. | |
253 | ||
254 | * sim-main.h (sim_cia): Delcare, tracking common dir changes. | |
255 | ||
256 | * cpu.h (sim_cpu): Update instruction_address with sim_cia. | |
257 | ||
c1c77d40 AC |
258 | Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com> |
259 | ||
260 | * sim-main.h (signal.h): Include so that SIG* available to all | |
261 | callers of sig_halt. | |
262 | ||
263 | * insns (do_shift): New function, implement shift operations. | |
264 | (do_trap): Add handler for trap 73 - SIGTRAP. | |
265 | ||
d5e2c74e AC |
266 | Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com> |
267 | ||
268 | * alu.h (MEM, STORE): Force addresses to be correctly aligned. | |
269 | ||
270 | * insns (do_jsr): Fix. | |
271 | (do_st, do_ld): Handle 64bit transfers. | |
272 | (do_trap): Match libgloss. | |
273 | (rdcr): Implement nop - Dest == r0 - variant. | |
274 | ||
275 | * sim-calls.c (sim_create_inferior): Initialize SP. | |
276 | ||
277 | * Makefile.in (ENGINE_H): Everything now depends on sim-options.h. | |
278 | (support.o): Depends on ENGINE_H. | |
279 | ||
280 | * cpu.h: Four accumulators. | |
281 | ||
282 | * Makefile.in (tmp-igen): Include line number information in | |
283 | generated files. | |
284 | ||
285 | * insns (dld, dst): Fill in. | |
286 | ||
287 | Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
288 | ||
289 | * insns (vld): Fix instruction format wrong. | |
290 | ||
abe293a0 AC |
291 | Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com> |
292 | ||
293 | * dc: Add additional rules so that minor opcode files are | |
294 | detected. | |
295 | * insns: Enable more instructions. | |
296 | ||
297 | * sim-calls.c (sim_fetch_register,sim_store_register, sim_write): | |
298 | Implement. | |
299 | ||
dd442a44 DE |
300 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> |
301 | ||
302 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
303 | * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o. | |
304 | * sim-calls.c (sim_open): Call sim_module_uninstall if argument | |
305 | parsing fails. Call sim_post_argv_init. | |
306 | (sim_close): Call sim_module_uninstall. | |
307 | ||
480e740c AC |
308 | Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com> |
309 | ||
310 | * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable. | |
311 | * ic: Add fields for enabled instructions. | |
312 |