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1da177e4 LT |
1 | /* |
2 | * Driver for Digigram VX soundcards | |
3 | * | |
4 | * Hardware core part | |
5 | * | |
6 | * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | #include <sound/driver.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/device.h> | |
29 | #include <linux/firmware.h> | |
30 | #include <sound/core.h> | |
31 | #include <sound/pcm.h> | |
32 | #include <sound/asoundef.h> | |
33 | #include <sound/info.h> | |
34 | #include <asm/io.h> | |
35 | #include <sound/vx_core.h> | |
36 | #include "vx_cmd.h" | |
37 | ||
38 | MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); | |
39 | MODULE_DESCRIPTION("Common routines for Digigram VX drivers"); | |
40 | MODULE_LICENSE("GPL"); | |
41 | ||
42 | ||
43 | /* | |
44 | * snd_vx_delay - delay for the specified time | |
45 | * @xmsec: the time to delay in msec | |
46 | */ | |
47 | void snd_vx_delay(vx_core_t *chip, int xmsec) | |
48 | { | |
49 | if (! in_interrupt() && xmsec >= 1000 / HZ) | |
50 | msleep(xmsec); | |
51 | else | |
52 | mdelay(xmsec); | |
53 | } | |
54 | ||
55 | /* | |
56 | * vx_check_reg_bit - wait for the specified bit is set/reset on a register | |
57 | * @reg: register to check | |
58 | * @mask: bit mask | |
59 | * @bit: resultant bit to be checked | |
60 | * @time: time-out of loop in msec | |
61 | * | |
62 | * returns zero if a bit matches, or a negative error code. | |
63 | */ | |
64 | int snd_vx_check_reg_bit(vx_core_t *chip, int reg, int mask, int bit, int time) | |
65 | { | |
66 | unsigned long end_time = jiffies + (time * HZ + 999) / 1000; | |
67 | #ifdef CONFIG_SND_DEBUG | |
68 | static char *reg_names[VX_REG_MAX] = { | |
69 | "ICR", "CVR", "ISR", "IVR", "RXH", "RXM", "RXL", | |
70 | "DMA", "CDSP", "RFREQ", "RUER/V2", "DATA", "MEMIRQ", | |
71 | "ACQ", "BIT0", "BIT1", "MIC0", "MIC1", "MIC2", | |
72 | "MIC3", "INTCSR", "CNTRL", "GPIOC", | |
73 | "LOFREQ", "HIFREQ", "CSUER", "RUER" | |
74 | }; | |
75 | #endif | |
76 | do { | |
77 | if ((snd_vx_inb(chip, reg) & mask) == bit) | |
78 | return 0; | |
79 | //snd_vx_delay(chip, 10); | |
80 | } while (time_after_eq(end_time, jiffies)); | |
81 | snd_printd(KERN_DEBUG "vx_check_reg_bit: timeout, reg=%s, mask=0x%x, val=0x%x\n", reg_names[reg], mask, snd_vx_inb(chip, reg)); | |
82 | return -EIO; | |
83 | } | |
84 | ||
85 | /* | |
86 | * vx_send_irq_dsp - set command irq bit | |
87 | * @num: the requested IRQ type, IRQ_XXX | |
88 | * | |
89 | * this triggers the specified IRQ request | |
90 | * returns 0 if successful, or a negative error code. | |
91 | * | |
92 | */ | |
93 | static int vx_send_irq_dsp(vx_core_t *chip, int num) | |
94 | { | |
95 | int nirq; | |
96 | ||
97 | /* wait for Hc = 0 */ | |
98 | if (snd_vx_check_reg_bit(chip, VX_CVR, CVR_HC, 0, 200) < 0) | |
99 | return -EIO; | |
100 | ||
101 | nirq = num; | |
102 | if (vx_has_new_dsp(chip)) | |
103 | nirq += VXP_IRQ_OFFSET; | |
104 | vx_outb(chip, CVR, (nirq >> 1) | CVR_HC); | |
105 | return 0; | |
106 | } | |
107 | ||
108 | ||
109 | /* | |
110 | * vx_reset_chk - reset CHK bit on ISR | |
111 | * | |
112 | * returns 0 if successful, or a negative error code. | |
113 | */ | |
114 | static int vx_reset_chk(vx_core_t *chip) | |
115 | { | |
116 | /* Reset irq CHK */ | |
117 | if (vx_send_irq_dsp(chip, IRQ_RESET_CHK) < 0) | |
118 | return -EIO; | |
119 | /* Wait until CHK = 0 */ | |
120 | if (vx_check_isr(chip, ISR_CHK, 0, 200) < 0) | |
121 | return -EIO; | |
122 | return 0; | |
123 | } | |
124 | ||
125 | /* | |
126 | * vx_transfer_end - terminate message transfer | |
127 | * @cmd: IRQ message to send (IRQ_MESS_XXX_END) | |
128 | * | |
129 | * returns 0 if successful, or a negative error code. | |
130 | * the error code can be VX-specific, retrieved via vx_get_error(). | |
131 | * NB: call with spinlock held! | |
132 | */ | |
133 | static int vx_transfer_end(vx_core_t *chip, int cmd) | |
134 | { | |
135 | int err; | |
136 | ||
137 | if ((err = vx_reset_chk(chip)) < 0) | |
138 | return err; | |
139 | ||
140 | /* irq MESS_READ/WRITE_END */ | |
141 | if ((err = vx_send_irq_dsp(chip, cmd)) < 0) | |
142 | return err; | |
143 | ||
144 | /* Wait CHK = 1 */ | |
145 | if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) | |
146 | return err; | |
147 | ||
148 | /* If error, Read RX */ | |
149 | if ((err = vx_inb(chip, ISR)) & ISR_ERR) { | |
150 | if ((err = vx_wait_for_rx_full(chip)) < 0) { | |
151 | snd_printd(KERN_DEBUG "transfer_end: error in rx_full\n"); | |
152 | return err; | |
153 | } | |
154 | err = vx_inb(chip, RXH) << 16; | |
155 | err |= vx_inb(chip, RXM) << 8; | |
156 | err |= vx_inb(chip, RXL); | |
157 | snd_printd(KERN_DEBUG "transfer_end: error = 0x%x\n", err); | |
158 | return -(VX_ERR_MASK | err); | |
159 | } | |
160 | return 0; | |
161 | } | |
162 | ||
163 | /* | |
164 | * vx_read_status - return the status rmh | |
165 | * @rmh: rmh record to store the status | |
166 | * | |
167 | * returns 0 if successful, or a negative error code. | |
168 | * the error code can be VX-specific, retrieved via vx_get_error(). | |
169 | * NB: call with spinlock held! | |
170 | */ | |
171 | static int vx_read_status(vx_core_t *chip, struct vx_rmh *rmh) | |
172 | { | |
173 | int i, err, val, size; | |
174 | ||
175 | /* no read necessary? */ | |
176 | if (rmh->DspStat == RMH_SSIZE_FIXED && rmh->LgStat == 0) | |
177 | return 0; | |
178 | ||
179 | /* Wait for RX full (with timeout protection) | |
180 | * The first word of status is in RX | |
181 | */ | |
182 | err = vx_wait_for_rx_full(chip); | |
183 | if (err < 0) | |
184 | return err; | |
185 | ||
186 | /* Read RX */ | |
187 | val = vx_inb(chip, RXH) << 16; | |
188 | val |= vx_inb(chip, RXM) << 8; | |
189 | val |= vx_inb(chip, RXL); | |
190 | ||
191 | /* If status given by DSP, let's decode its size */ | |
192 | switch (rmh->DspStat) { | |
193 | case RMH_SSIZE_ARG: | |
194 | size = val & 0xff; | |
195 | rmh->Stat[0] = val & 0xffff00; | |
196 | rmh->LgStat = size + 1; | |
197 | break; | |
198 | case RMH_SSIZE_MASK: | |
199 | /* Let's count the arg numbers from a mask */ | |
200 | rmh->Stat[0] = val; | |
201 | size = 0; | |
202 | while (val) { | |
203 | if (val & 0x01) | |
204 | size++; | |
205 | val >>= 1; | |
206 | } | |
207 | rmh->LgStat = size + 1; | |
208 | break; | |
209 | default: | |
210 | /* else retrieve the status length given by the driver */ | |
211 | size = rmh->LgStat; | |
212 | rmh->Stat[0] = val; /* Val is the status 1st word */ | |
213 | size--; /* hence adjust remaining length */ | |
214 | break; | |
215 | } | |
216 | ||
217 | if (size < 1) | |
218 | return 0; | |
219 | snd_assert(size <= SIZE_MAX_STATUS, return -EINVAL); | |
220 | ||
221 | for (i = 1; i <= size; i++) { | |
222 | /* trigger an irq MESS_WRITE_NEXT */ | |
223 | err = vx_send_irq_dsp(chip, IRQ_MESS_WRITE_NEXT); | |
224 | if (err < 0) | |
225 | return err; | |
226 | /* Wait for RX full (with timeout protection) */ | |
227 | err = vx_wait_for_rx_full(chip); | |
228 | if (err < 0) | |
229 | return err; | |
230 | rmh->Stat[i] = vx_inb(chip, RXH) << 16; | |
231 | rmh->Stat[i] |= vx_inb(chip, RXM) << 8; | |
232 | rmh->Stat[i] |= vx_inb(chip, RXL); | |
233 | } | |
234 | ||
235 | return vx_transfer_end(chip, IRQ_MESS_WRITE_END); | |
236 | } | |
237 | ||
238 | ||
239 | #define MASK_MORE_THAN_1_WORD_COMMAND 0x00008000 | |
240 | #define MASK_1_WORD_COMMAND 0x00ff7fff | |
241 | ||
242 | /* | |
243 | * vx_send_msg_nolock - send a DSP message and read back the status | |
244 | * @rmh: the rmh record to send and receive | |
245 | * | |
246 | * returns 0 if successful, or a negative error code. | |
247 | * the error code can be VX-specific, retrieved via vx_get_error(). | |
248 | * | |
249 | * this function doesn't call spinlock at all. | |
250 | */ | |
251 | int vx_send_msg_nolock(vx_core_t *chip, struct vx_rmh *rmh) | |
252 | { | |
253 | int i, err; | |
254 | ||
255 | if (chip->chip_status & VX_STAT_IS_STALE) | |
256 | return -EBUSY; | |
257 | ||
258 | if ((err = vx_reset_chk(chip)) < 0) { | |
259 | snd_printd(KERN_DEBUG "vx_send_msg: vx_reset_chk error\n"); | |
260 | return err; | |
261 | } | |
262 | ||
263 | #if 0 | |
264 | printk(KERN_DEBUG "rmh: cmd = 0x%06x, length = %d, stype = %d\n", | |
265 | rmh->Cmd[0], rmh->LgCmd, rmh->DspStat); | |
266 | if (rmh->LgCmd > 1) { | |
267 | printk(KERN_DEBUG " "); | |
268 | for (i = 1; i < rmh->LgCmd; i++) | |
269 | printk("0x%06x ", rmh->Cmd[i]); | |
270 | printk("\n"); | |
271 | } | |
272 | #endif | |
273 | /* Check bit M is set according to length of the command */ | |
274 | if (rmh->LgCmd > 1) | |
275 | rmh->Cmd[0] |= MASK_MORE_THAN_1_WORD_COMMAND; | |
276 | else | |
277 | rmh->Cmd[0] &= MASK_1_WORD_COMMAND; | |
278 | ||
279 | /* Wait for TX empty */ | |
280 | if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) { | |
281 | snd_printd(KERN_DEBUG "vx_send_msg: wait tx empty error\n"); | |
282 | return err; | |
283 | } | |
284 | ||
285 | /* Write Cmd[0] */ | |
286 | vx_outb(chip, TXH, (rmh->Cmd[0] >> 16) & 0xff); | |
287 | vx_outb(chip, TXM, (rmh->Cmd[0] >> 8) & 0xff); | |
288 | vx_outb(chip, TXL, rmh->Cmd[0] & 0xff); | |
289 | ||
290 | /* Trigger irq MESSAGE */ | |
291 | if ((err = vx_send_irq_dsp(chip, IRQ_MESSAGE)) < 0) { | |
292 | snd_printd(KERN_DEBUG "vx_send_msg: send IRQ_MESSAGE error\n"); | |
293 | return err; | |
294 | } | |
295 | ||
296 | /* Wait for CHK = 1 */ | |
297 | if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) | |
298 | return err; | |
299 | ||
300 | /* If error, get error value from RX */ | |
301 | if (vx_inb(chip, ISR) & ISR_ERR) { | |
302 | if ((err = vx_wait_for_rx_full(chip)) < 0) { | |
303 | snd_printd(KERN_DEBUG "vx_send_msg: rx_full read error\n"); | |
304 | return err; | |
305 | } | |
306 | err = vx_inb(chip, RXH) << 16; | |
307 | err |= vx_inb(chip, RXM) << 8; | |
308 | err |= vx_inb(chip, RXL); | |
309 | snd_printd(KERN_DEBUG "msg got error = 0x%x at cmd[0]\n", err); | |
310 | err = -(VX_ERR_MASK | err); | |
311 | return err; | |
312 | } | |
313 | ||
314 | /* Send the other words */ | |
315 | if (rmh->LgCmd > 1) { | |
316 | for (i = 1; i < rmh->LgCmd; i++) { | |
317 | /* Wait for TX ready */ | |
318 | if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) { | |
319 | snd_printd(KERN_DEBUG "vx_send_msg: tx_ready error\n"); | |
320 | return err; | |
321 | } | |
322 | ||
323 | /* Write Cmd[i] */ | |
324 | vx_outb(chip, TXH, (rmh->Cmd[i] >> 16) & 0xff); | |
325 | vx_outb(chip, TXM, (rmh->Cmd[i] >> 8) & 0xff); | |
326 | vx_outb(chip, TXL, rmh->Cmd[i] & 0xff); | |
327 | ||
328 | /* Trigger irq MESS_READ_NEXT */ | |
329 | if ((err = vx_send_irq_dsp(chip, IRQ_MESS_READ_NEXT)) < 0) { | |
330 | snd_printd(KERN_DEBUG "vx_send_msg: IRQ_READ_NEXT error\n"); | |
331 | return err; | |
332 | } | |
333 | } | |
334 | /* Wait for TX empty */ | |
335 | if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) { | |
336 | snd_printd(KERN_DEBUG "vx_send_msg: TX_READY error\n"); | |
337 | return err; | |
338 | } | |
339 | /* End of transfer */ | |
340 | err = vx_transfer_end(chip, IRQ_MESS_READ_END); | |
341 | if (err < 0) | |
342 | return err; | |
343 | } | |
344 | ||
345 | return vx_read_status(chip, rmh); | |
346 | } | |
347 | ||
348 | ||
349 | /* | |
350 | * vx_send_msg - send a DSP message with spinlock | |
351 | * @rmh: the rmh record to send and receive | |
352 | * | |
353 | * returns 0 if successful, or a negative error code. | |
354 | * see vx_send_msg_nolock(). | |
355 | */ | |
356 | int vx_send_msg(vx_core_t *chip, struct vx_rmh *rmh) | |
357 | { | |
358 | unsigned long flags; | |
359 | int err; | |
360 | ||
361 | spin_lock_irqsave(&chip->lock, flags); | |
362 | err = vx_send_msg_nolock(chip, rmh); | |
363 | spin_unlock_irqrestore(&chip->lock, flags); | |
364 | return err; | |
365 | } | |
366 | ||
367 | ||
368 | /* | |
369 | * vx_send_rih_nolock - send an RIH to xilinx | |
370 | * @cmd: the command to send | |
371 | * | |
372 | * returns 0 if successful, or a negative error code. | |
373 | * the error code can be VX-specific, retrieved via vx_get_error(). | |
374 | * | |
375 | * this function doesn't call spinlock at all. | |
376 | * | |
377 | * unlike RMH, no command is sent to DSP. | |
378 | */ | |
379 | int vx_send_rih_nolock(vx_core_t *chip, int cmd) | |
380 | { | |
381 | int err; | |
382 | ||
383 | if (chip->chip_status & VX_STAT_IS_STALE) | |
384 | return -EBUSY; | |
385 | ||
386 | #if 0 | |
387 | printk(KERN_DEBUG "send_rih: cmd = 0x%x\n", cmd); | |
388 | #endif | |
389 | if ((err = vx_reset_chk(chip)) < 0) | |
390 | return err; | |
391 | /* send the IRQ */ | |
392 | if ((err = vx_send_irq_dsp(chip, cmd)) < 0) | |
393 | return err; | |
394 | /* Wait CHK = 1 */ | |
395 | if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) | |
396 | return err; | |
397 | /* If error, read RX */ | |
398 | if (vx_inb(chip, ISR) & ISR_ERR) { | |
399 | if ((err = vx_wait_for_rx_full(chip)) < 0) | |
400 | return err; | |
401 | err = vx_inb(chip, RXH) << 16; | |
402 | err |= vx_inb(chip, RXM) << 8; | |
403 | err |= vx_inb(chip, RXL); | |
404 | return -(VX_ERR_MASK | err); | |
405 | } | |
406 | return 0; | |
407 | } | |
408 | ||
409 | ||
410 | /* | |
411 | * vx_send_rih - send an RIH with spinlock | |
412 | * @cmd: the command to send | |
413 | * | |
414 | * see vx_send_rih_nolock(). | |
415 | */ | |
416 | int vx_send_rih(vx_core_t *chip, int cmd) | |
417 | { | |
418 | unsigned long flags; | |
419 | int err; | |
420 | ||
421 | spin_lock_irqsave(&chip->lock, flags); | |
422 | err = vx_send_rih_nolock(chip, cmd); | |
423 | spin_unlock_irqrestore(&chip->lock, flags); | |
424 | return err; | |
425 | } | |
426 | ||
427 | #define END_OF_RESET_WAIT_TIME 500 /* us */ | |
428 | ||
429 | /** | |
430 | * snd_vx_boot_xilinx - boot up the xilinx interface | |
431 | * @boot: the boot record to load | |
432 | */ | |
433 | int snd_vx_load_boot_image(vx_core_t *chip, const struct firmware *boot) | |
434 | { | |
435 | unsigned int i; | |
436 | int no_fillup = vx_has_new_dsp(chip); | |
437 | ||
438 | /* check the length of boot image */ | |
439 | snd_assert(boot->size > 0, return -EINVAL); | |
440 | snd_assert(boot->size % 3 == 0, return -EINVAL); | |
441 | #if 0 | |
442 | { | |
443 | /* more strict check */ | |
444 | unsigned int c = ((u32)boot->data[0] << 16) | ((u32)boot->data[1] << 8) | boot->data[2]; | |
445 | snd_assert(boot->size == (c + 2) * 3, return -EINVAL); | |
446 | } | |
447 | #endif | |
448 | ||
449 | /* reset dsp */ | |
450 | vx_reset_dsp(chip); | |
451 | ||
452 | udelay(END_OF_RESET_WAIT_TIME); /* another wait? */ | |
453 | ||
454 | /* download boot strap */ | |
455 | for (i = 0; i < 0x600; i += 3) { | |
456 | if (i >= boot->size) { | |
457 | if (no_fillup) | |
458 | break; | |
459 | if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) { | |
460 | snd_printk(KERN_ERR "dsp boot failed at %d\n", i); | |
461 | return -EIO; | |
462 | } | |
463 | vx_outb(chip, TXH, 0); | |
464 | vx_outb(chip, TXM, 0); | |
465 | vx_outb(chip, TXL, 0); | |
466 | } else { | |
467 | unsigned char *image = boot->data + i; | |
468 | if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) { | |
469 | snd_printk(KERN_ERR "dsp boot failed at %d\n", i); | |
470 | return -EIO; | |
471 | } | |
472 | vx_outb(chip, TXH, image[0]); | |
473 | vx_outb(chip, TXM, image[1]); | |
474 | vx_outb(chip, TXL, image[2]); | |
475 | } | |
476 | } | |
477 | return 0; | |
478 | } | |
479 | ||
480 | /* | |
481 | * vx_test_irq_src - query the source of interrupts | |
482 | * | |
483 | * called from irq handler only | |
484 | */ | |
485 | static int vx_test_irq_src(vx_core_t *chip, unsigned int *ret) | |
486 | { | |
487 | int err; | |
488 | ||
489 | vx_init_rmh(&chip->irq_rmh, CMD_TEST_IT); | |
490 | spin_lock(&chip->lock); | |
491 | err = vx_send_msg_nolock(chip, &chip->irq_rmh); | |
492 | if (err < 0) | |
493 | *ret = 0; | |
494 | else | |
495 | *ret = chip->irq_rmh.Stat[0]; | |
496 | spin_unlock(&chip->lock); | |
497 | return err; | |
498 | } | |
499 | ||
500 | ||
501 | /* | |
502 | * vx_interrupt - soft irq handler | |
503 | */ | |
504 | static void vx_interrupt(unsigned long private_data) | |
505 | { | |
506 | vx_core_t *chip = (vx_core_t *) private_data; | |
507 | unsigned int events; | |
508 | ||
509 | if (chip->chip_status & VX_STAT_IS_STALE) | |
510 | return; | |
511 | ||
512 | if (vx_test_irq_src(chip, &events) < 0) | |
513 | return; | |
514 | ||
515 | #if 0 | |
516 | if (events & 0x000800) | |
517 | printk(KERN_ERR "DSP Stream underrun ! IRQ events = 0x%x\n", events); | |
518 | #endif | |
519 | // printk(KERN_DEBUG "IRQ events = 0x%x\n", events); | |
520 | ||
521 | /* We must prevent any application using this DSP | |
522 | * and block any further request until the application | |
523 | * either unregisters or reloads the DSP | |
524 | */ | |
525 | if (events & FATAL_DSP_ERROR) { | |
526 | snd_printk(KERN_ERR "vx_core: fatal DSP error!!\n"); | |
527 | return; | |
528 | } | |
529 | ||
530 | /* The start on time code conditions are filled (ie the time code | |
531 | * received by the board is equal to one of those given to it). | |
532 | */ | |
533 | if (events & TIME_CODE_EVENT_PENDING) | |
534 | ; /* so far, nothing to do yet */ | |
535 | ||
536 | /* The frequency has changed on the board (UER mode). */ | |
537 | if (events & FREQUENCY_CHANGE_EVENT_PENDING) | |
538 | vx_change_frequency(chip); | |
539 | ||
540 | /* update the pcm streams */ | |
541 | vx_pcm_update_intr(chip, events); | |
542 | } | |
543 | ||
544 | ||
545 | /** | |
546 | * snd_vx_irq_handler - interrupt handler | |
547 | */ | |
548 | irqreturn_t snd_vx_irq_handler(int irq, void *dev, struct pt_regs *regs) | |
549 | { | |
550 | vx_core_t *chip = dev; | |
551 | ||
552 | if (! (chip->chip_status & VX_STAT_CHIP_INIT) || | |
553 | (chip->chip_status & VX_STAT_IS_STALE)) | |
554 | return IRQ_NONE; | |
555 | if (! vx_test_and_ack(chip)) | |
556 | tasklet_hi_schedule(&chip->tq); | |
557 | return IRQ_HANDLED; | |
558 | } | |
559 | ||
560 | ||
561 | /* | |
562 | */ | |
563 | static void vx_reset_board(vx_core_t *chip, int cold_reset) | |
564 | { | |
565 | snd_assert(chip->ops->reset_board, return); | |
566 | ||
567 | /* current source, later sync'ed with target */ | |
568 | chip->audio_source = VX_AUDIO_SRC_LINE; | |
569 | if (cold_reset) { | |
570 | chip->audio_source_target = chip->audio_source; | |
571 | chip->clock_source = INTERNAL_QUARTZ; | |
572 | chip->clock_mode = VX_CLOCK_MODE_AUTO; | |
573 | chip->freq = 48000; | |
574 | chip->uer_detected = VX_UER_MODE_NOT_PRESENT; | |
575 | chip->uer_bits = SNDRV_PCM_DEFAULT_CON_SPDIF; | |
576 | } | |
577 | ||
578 | chip->ops->reset_board(chip, cold_reset); | |
579 | ||
580 | vx_reset_codec(chip, cold_reset); | |
581 | ||
582 | vx_set_internal_clock(chip, chip->freq); | |
583 | ||
584 | /* Reset the DSP */ | |
585 | vx_reset_dsp(chip); | |
586 | ||
587 | if (vx_is_pcmcia(chip)) { | |
588 | /* Acknowledge any pending IRQ and reset the MEMIRQ flag. */ | |
589 | vx_test_and_ack(chip); | |
590 | vx_validate_irq(chip, 1); | |
591 | } | |
592 | ||
593 | /* init CBits */ | |
594 | vx_set_iec958_status(chip, chip->uer_bits); | |
595 | } | |
596 | ||
597 | ||
598 | /* | |
599 | * proc interface | |
600 | */ | |
601 | ||
602 | static void vx_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer) | |
603 | { | |
604 | vx_core_t *chip = entry->private_data; | |
605 | static char *audio_src_vxp[] = { "Line", "Mic", "Digital" }; | |
606 | static char *audio_src_vx2[] = { "Analog", "Analog", "Digital" }; | |
607 | static char *clock_mode[] = { "Auto", "Internal", "External" }; | |
608 | static char *clock_src[] = { "Internal", "External" }; | |
609 | static char *uer_type[] = { "Consumer", "Professional", "Not Present" }; | |
610 | ||
611 | snd_iprintf(buffer, "%s\n", chip->card->longname); | |
612 | snd_iprintf(buffer, "Xilinx Firmware: %s\n", | |
613 | chip->chip_status & VX_STAT_XILINX_LOADED ? "Loaded" : "No"); | |
614 | snd_iprintf(buffer, "Device Initialized: %s\n", | |
615 | chip->chip_status & VX_STAT_DEVICE_INIT ? "Yes" : "No"); | |
616 | snd_iprintf(buffer, "DSP audio info:"); | |
617 | if (chip->audio_info & VX_AUDIO_INFO_REAL_TIME) | |
618 | snd_iprintf(buffer, " realtime"); | |
619 | if (chip->audio_info & VX_AUDIO_INFO_OFFLINE) | |
620 | snd_iprintf(buffer, " offline"); | |
621 | if (chip->audio_info & VX_AUDIO_INFO_MPEG1) | |
622 | snd_iprintf(buffer, " mpeg1"); | |
623 | if (chip->audio_info & VX_AUDIO_INFO_MPEG2) | |
624 | snd_iprintf(buffer, " mpeg2"); | |
625 | if (chip->audio_info & VX_AUDIO_INFO_LINEAR_8) | |
626 | snd_iprintf(buffer, " linear8"); | |
627 | if (chip->audio_info & VX_AUDIO_INFO_LINEAR_16) | |
628 | snd_iprintf(buffer, " linear16"); | |
629 | if (chip->audio_info & VX_AUDIO_INFO_LINEAR_24) | |
630 | snd_iprintf(buffer, " linear24"); | |
631 | snd_iprintf(buffer, "\n"); | |
632 | snd_iprintf(buffer, "Input Source: %s\n", vx_is_pcmcia(chip) ? | |
633 | audio_src_vxp[chip->audio_source] : | |
634 | audio_src_vx2[chip->audio_source]); | |
635 | snd_iprintf(buffer, "Clock Mode: %s\n", clock_mode[chip->clock_mode]); | |
636 | snd_iprintf(buffer, "Clock Source: %s\n", clock_src[chip->clock_source]); | |
637 | snd_iprintf(buffer, "Frequency: %d\n", chip->freq); | |
638 | snd_iprintf(buffer, "Detected Frequency: %d\n", chip->freq_detected); | |
639 | snd_iprintf(buffer, "Detected UER type: %s\n", uer_type[chip->uer_detected]); | |
640 | snd_iprintf(buffer, "Min/Max/Cur IBL: %d/%d/%d (granularity=%d)\n", | |
641 | chip->ibl.min_size, chip->ibl.max_size, chip->ibl.size, | |
642 | chip->ibl.granularity); | |
643 | } | |
644 | ||
645 | static void vx_proc_init(vx_core_t *chip) | |
646 | { | |
647 | snd_info_entry_t *entry; | |
648 | ||
649 | if (! snd_card_proc_new(chip->card, "vx-status", &entry)) | |
650 | snd_info_set_text_ops(entry, chip, 1024, vx_proc_read); | |
651 | } | |
652 | ||
653 | ||
654 | /** | |
655 | * snd_vx_dsp_boot - load the DSP boot | |
656 | */ | |
657 | int snd_vx_dsp_boot(vx_core_t *chip, const struct firmware *boot) | |
658 | { | |
659 | int err; | |
660 | int cold_reset = !(chip->chip_status & VX_STAT_DEVICE_INIT); | |
661 | ||
662 | vx_reset_board(chip, cold_reset); | |
663 | vx_validate_irq(chip, 0); | |
664 | ||
665 | if ((err = snd_vx_load_boot_image(chip, boot)) < 0) | |
666 | return err; | |
667 | snd_vx_delay(chip, 10); | |
668 | ||
669 | return 0; | |
670 | } | |
671 | ||
672 | /** | |
673 | * snd_vx_dsp_load - load the DSP image | |
674 | */ | |
675 | int snd_vx_dsp_load(vx_core_t *chip, const struct firmware *dsp) | |
676 | { | |
677 | unsigned int i; | |
678 | int err; | |
679 | unsigned int csum = 0; | |
680 | unsigned char *image, *cptr; | |
681 | ||
682 | snd_assert(dsp->size % 3 == 0, return -EINVAL); | |
683 | ||
684 | vx_toggle_dac_mute(chip, 1); | |
685 | ||
686 | /* Transfert data buffer from PC to DSP */ | |
687 | for (i = 0; i < dsp->size; i += 3) { | |
688 | image = dsp->data + i; | |
689 | /* Wait DSP ready for a new read */ | |
690 | if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) { | |
691 | printk("dsp loading error at position %d\n", i); | |
692 | return err; | |
693 | } | |
694 | cptr = image; | |
695 | csum ^= *cptr; | |
696 | csum = (csum >> 24) | (csum << 8); | |
697 | vx_outb(chip, TXH, *cptr++); | |
698 | csum ^= *cptr; | |
699 | csum = (csum >> 24) | (csum << 8); | |
700 | vx_outb(chip, TXM, *cptr++); | |
701 | csum ^= *cptr; | |
702 | csum = (csum >> 24) | (csum << 8); | |
703 | vx_outb(chip, TXL, *cptr++); | |
704 | } | |
705 | snd_printdd(KERN_DEBUG "checksum = 0x%08x\n", csum); | |
706 | ||
707 | snd_vx_delay(chip, 200); | |
708 | ||
709 | if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) | |
710 | return err; | |
711 | ||
712 | vx_toggle_dac_mute(chip, 0); | |
713 | ||
714 | vx_test_and_ack(chip); | |
715 | vx_validate_irq(chip, 1); | |
716 | ||
717 | return 0; | |
718 | } | |
719 | ||
720 | #ifdef CONFIG_PM | |
721 | /* | |
722 | * suspend | |
723 | */ | |
724 | static int snd_vx_suspend(snd_card_t *card, pm_message_t state) | |
725 | { | |
726 | vx_core_t *chip = card->pm_private_data; | |
727 | unsigned int i; | |
728 | ||
729 | snd_assert(chip, return -EINVAL); | |
730 | ||
731 | chip->chip_status |= VX_STAT_IN_SUSPEND; | |
732 | for (i = 0; i < chip->hw->num_codecs; i++) | |
733 | snd_pcm_suspend_all(chip->pcm[i]); | |
734 | ||
735 | return 0; | |
736 | } | |
737 | ||
738 | /* | |
739 | * resume | |
740 | */ | |
741 | static int snd_vx_resume(snd_card_t *card) | |
742 | { | |
743 | vx_core_t *chip = card->pm_private_data; | |
744 | int i, err; | |
745 | ||
746 | snd_assert(chip, return -EINVAL); | |
747 | ||
748 | chip->chip_status &= ~VX_STAT_CHIP_INIT; | |
749 | ||
750 | for (i = 0; i < 4; i++) { | |
751 | if (! chip->firmware[i]) | |
752 | continue; | |
753 | err = chip->ops->load_dsp(chip, i, chip->firmware[i]); | |
754 | if (err < 0) { | |
755 | snd_printk(KERN_ERR "vx: firmware resume error at DSP %d\n", i); | |
756 | return -EIO; | |
757 | } | |
758 | } | |
759 | ||
760 | chip->chip_status |= VX_STAT_CHIP_INIT; | |
761 | chip->chip_status &= ~VX_STAT_IN_SUSPEND; | |
762 | ||
763 | return 0; | |
764 | } | |
765 | ||
766 | #endif | |
767 | ||
768 | /** | |
769 | * snd_vx_create - constructor for vx_core_t | |
770 | * @hw: hardware specific record | |
771 | * | |
772 | * this function allocates the instance and prepare for the hardware | |
773 | * initialization. | |
774 | * | |
775 | * return the instance pointer if successful, NULL in error. | |
776 | */ | |
777 | vx_core_t *snd_vx_create(snd_card_t *card, struct snd_vx_hardware *hw, | |
778 | struct snd_vx_ops *ops, | |
779 | int extra_size) | |
780 | { | |
781 | vx_core_t *chip; | |
782 | ||
783 | snd_assert(card && hw && ops, return NULL); | |
784 | ||
785 | chip = kcalloc(1, sizeof(*chip) + extra_size, GFP_KERNEL); | |
786 | if (! chip) { | |
787 | snd_printk(KERN_ERR "vx_core: no memory\n"); | |
788 | return NULL; | |
789 | } | |
790 | spin_lock_init(&chip->lock); | |
791 | spin_lock_init(&chip->irq_lock); | |
792 | chip->irq = -1; | |
793 | chip->hw = hw; | |
794 | chip->type = hw->type; | |
795 | chip->ops = ops; | |
796 | tasklet_init(&chip->tq, vx_interrupt, (unsigned long)chip); | |
797 | init_MUTEX(&chip->mixer_mutex); | |
798 | ||
799 | chip->card = card; | |
800 | card->private_data = chip; | |
801 | strcpy(card->driver, hw->name); | |
802 | sprintf(card->shortname, "Digigram %s", hw->name); | |
803 | ||
804 | snd_card_set_pm_callback(card, snd_vx_suspend, snd_vx_resume, chip); | |
805 | ||
806 | vx_proc_init(chip); | |
807 | ||
808 | return chip; | |
809 | } | |
810 | ||
811 | /* | |
812 | * module entries | |
813 | */ | |
814 | static int __init alsa_vx_core_init(void) | |
815 | { | |
816 | return 0; | |
817 | } | |
818 | ||
819 | static void __exit alsa_vx_core_exit(void) | |
820 | { | |
821 | } | |
822 | ||
823 | module_init(alsa_vx_core_init) | |
824 | module_exit(alsa_vx_core_exit) | |
825 | ||
826 | /* | |
827 | * exports | |
828 | */ | |
829 | EXPORT_SYMBOL(snd_vx_check_reg_bit); | |
830 | EXPORT_SYMBOL(snd_vx_create); | |
831 | EXPORT_SYMBOL(snd_vx_setup_firmware); | |
832 | EXPORT_SYMBOL(snd_vx_free_firmware); | |
833 | EXPORT_SYMBOL(snd_vx_irq_handler); | |
834 | EXPORT_SYMBOL(snd_vx_delay); | |
835 | EXPORT_SYMBOL(snd_vx_dsp_boot); | |
836 | EXPORT_SYMBOL(snd_vx_dsp_load); | |
837 | EXPORT_SYMBOL(snd_vx_load_boot_image); |