ALSA: hda: add hdac_ext stream creation and cleanup routines
[deliverable/linux.git] / sound / hda / ext / hdac_ext_controller.c
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0b00a561
JK
1/*
2 * hdac-ext-controller.c - HD-audio extended controller functions.
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20#include <linux/delay.h>
21#include <linux/slab.h>
22#include <sound/hda_register.h>
23#include <sound/hdaudio_ext.h>
24
25/*
26 * maximum HDAC capablities we should parse to avoid endless looping:
27 * currently we have 4 extended caps, so this is future proof for now.
28 * extend when this limit is seen meeting in real HW
29 */
30#define HDAC_MAX_CAPS 10
31
32/**
33 * snd_hdac_ext_bus_parse_capabilities - parse capablity structure
34 * @ebus: the pointer to extended bus object
35 *
36 * Returns 0 if successful, or a negative error code.
37 */
38int snd_hdac_ext_bus_parse_capabilities(struct hdac_ext_bus *ebus)
39{
40 unsigned int cur_cap;
41 unsigned int offset;
42 struct hdac_bus *bus = &ebus->bus;
43 unsigned int counter = 0;
44
45 offset = snd_hdac_chip_readl(bus, LLCH);
46
47 if (offset < 0)
48 return -EIO;
49
50 /* Lets walk the linked capabilities list */
51 do {
52 cur_cap = _snd_hdac_chip_read(l, bus, offset);
53
54 if (cur_cap < 0)
55 return -EIO;
56
57 dev_dbg(bus->dev, "Capability version: 0x%x\n",
58 ((cur_cap & AZX_CAP_HDR_VER_MASK) >> AZX_CAP_HDR_VER_OFF));
59
60 dev_dbg(bus->dev, "HDA capability ID: 0x%x\n",
61 (cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF);
62
63 switch ((cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF) {
64 case AZX_ML_CAP_ID:
65 dev_dbg(bus->dev, "Found ML capability\n");
66 ebus->mlcap = bus->remap_addr + offset;
67 break;
68
69 case AZX_GTS_CAP_ID:
70 dev_dbg(bus->dev, "Found GTS capability offset=%x\n", offset);
71 ebus->gtscap = bus->remap_addr + offset;
72 break;
73
74 case AZX_PP_CAP_ID:
75 /* PP capability found, the Audio DSP is present */
76 dev_dbg(bus->dev, "Found PP capability offset=%x\n", offset);
77 ebus->ppcap = bus->remap_addr + offset;
78 break;
79
80 case AZX_SPB_CAP_ID:
81 /* SPIB capability found, handler function */
82 dev_dbg(bus->dev, "Found SPB capability\n");
83 ebus->spbcap = bus->remap_addr + offset;
84 break;
85
86 default:
87 dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap);
88 break;
89 }
90
91 counter++;
92
93 if (counter > HDAC_MAX_CAPS) {
94 dev_err(bus->dev, "We exceeded HDAC Ext capablities!!!\n");
95 break;
96 }
97
98 /* read the offset of next capabiity */
99 offset = cur_cap & AZX_CAP_HDR_NXT_PTR_MASK;
100
101 } while (offset);
102
103 return 0;
104}
105EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_parse_capabilities);
106
107/*
108 * processing pipe helpers - these helpers are useful for dealing with HDA
109 * new capability of processing pipelines
110 */
111
112/**
113 * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
114 * @ebus: HD-audio extended core bus
115 * @enable: flag to turn on/off the capability
116 */
117void snd_hdac_ext_bus_ppcap_enable(struct hdac_ext_bus *ebus, bool enable)
118{
119 struct hdac_bus *bus = &ebus->bus;
120
121 if (!ebus->ppcap) {
122 dev_err(bus->dev, "Address of PP capability is NULL");
123 return;
124 }
125
126 if (enable)
127 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_GPROCEN);
128 else
129 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_GPROCEN, 0);
130}
131EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable);
132
133/**
134 * snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable
135 * @ebus: HD-audio extended core bus
136 * @enable: flag to enable/disable interrupt
137 */
138void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_ext_bus *ebus, bool enable)
139{
140 struct hdac_bus *bus = &ebus->bus;
141
142 if (!ebus->ppcap) {
143 dev_err(bus->dev, "Address of PP capability is NULL\n");
144 return;
145 }
146
147 if (enable)
148 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_PIE);
149 else
150 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_PIE, 0);
151}
152EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable);
153
154/*
155 * Multilink helpers - these helpers are useful for dealing with HDA
156 * new multilink capability
157 */
158
159/**
160 * snd_hdac_ext_bus_get_ml_capabilities - get multilink capability
161 * @ebus: HD-audio extended core bus
162 *
163 * This will parse all links and read the mlink capabilities and add them
164 * in hlink_list of extended hdac bus
165 * Note: this will be freed on bus exit by driver
166 */
167int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus)
168{
169 int idx;
170 u32 link_count;
171 struct hdac_ext_link *hlink;
172 struct hdac_bus *bus = &ebus->bus;
173
174 link_count = readl(ebus->mlcap + AZX_REG_ML_MLCD) + 1;
175
176 dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count);
177
178 for (idx = 0; idx < link_count; idx++) {
179 hlink = kzalloc(sizeof(*hlink), GFP_KERNEL);
180 if (!hlink)
181 return -ENOMEM;
182 hlink->index = idx;
183 hlink->bus = bus;
184 hlink->ml_addr = ebus->mlcap + AZX_ML_BASE +
185 (AZX_ML_INTERVAL * idx);
186 hlink->lcaps = snd_hdac_chip_readl(bus, ML_LCAP);
187 hlink->lsdiid = snd_hdac_chip_readw(bus, ML_LSDIID);
188
189 list_add_tail(&hlink->list, &ebus->hlink_list);
190 }
191
192 return 0;
193}
194EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_ml_capabilities);
195
196/**
197 * snd_hdac_ext_bus_get_link_index - get link based on codec name
198 * @ebus: HD-audio extended core bus
199 * @codec_name: codec name
200 */
201struct hdac_ext_link *snd_hdac_ext_bus_get_link(struct hdac_ext_bus *ebus,
202 const char *codec_name)
203{
204 int i;
205 struct hdac_ext_link *hlink = NULL;
206 int bus_idx, addr;
207
208 if (sscanf(codec_name, "ehdaudio%dD%d", &bus_idx, &addr) != 2)
209 return NULL;
210 if (ebus->idx != bus_idx)
211 return NULL;
212
213 list_for_each_entry(hlink, &ebus->hlink_list, list) {
214 for (i = 0; i < HDA_MAX_CODECS; i++) {
215 if (hlink->lsdiid & (0x1 << addr))
216 return hlink;
217 }
218 }
219
220 return NULL;
221}
222EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_link);
223
224static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
225{
226 int timeout;
227 u32 val;
228 int mask = (1 << AZX_MLCTL_CPA);
229
230 udelay(3);
231 timeout = 50;
232
233 do {
234 val = snd_hdac_chip_readl(link->bus, ML_LCTL);
235 if (enable) {
236 if (((val & mask) >> AZX_MLCTL_CPA))
237 return 0;
238 } else {
239 if (!((val & mask) >> AZX_MLCTL_CPA))
240 return 0;
241 }
242 udelay(3);
243 } while (--timeout);
244
245 return -EIO;
246}
247
248/**
249 * snd_hdac_ext_bus_link_power_up -power up hda link
250 * @link: HD-audio extended link
251 */
252int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link)
253{
254 snd_hdac_chip_updatel(link->bus, ML_LCTL, 0, AZX_MLCTL_SPA);
255
256 return check_hdac_link_power_active(link, true);
257}
258EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
259
260/**
261 * snd_hdac_ext_bus_link_power_down -power down hda link
262 * @link: HD-audio extended link
263 */
264int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
265{
266 snd_hdac_chip_updatel(link->bus, ML_LCTL, AZX_MLCTL_SPA, 0);
267
268 return check_hdac_link_power_active(link, false);
269}
270EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down);
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