Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA | |
3 | * | |
4 | * Copyright (c) Clemens Ladisch <clemens@ladisch.de> | |
5 | * | |
6 | * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org> | |
7 | * | |
8 | * | |
9 | * This driver is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This driver is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <sound/driver.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/pci.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/moduleparam.h> | |
30 | #include <linux/bitops.h> | |
31 | #include <asm/io.h> | |
32 | #include <sound/core.h> | |
33 | #include <sound/pcm.h> | |
34 | #include <sound/pcm_params.h> | |
35 | #include <sound/control.h> | |
36 | #include <sound/initval.h> | |
37 | ||
38 | MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); | |
39 | MODULE_DESCRIPTION("Brooktree Bt87x audio driver"); | |
40 | MODULE_LICENSE("GPL"); | |
41 | MODULE_SUPPORTED_DEVICE("{{Brooktree,Bt878}," | |
42 | "{Brooktree,Bt879}}"); | |
43 | ||
44 | static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */ | |
45 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
46 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | |
6581f4e7 | 47 | static int digital_rate[SNDRV_CARDS]; /* digital input rate */ |
1da177e4 LT |
48 | static int load_all; /* allow to load the non-whitelisted cards */ |
49 | ||
50 | module_param_array(index, int, NULL, 0444); | |
51 | MODULE_PARM_DESC(index, "Index value for Bt87x soundcard"); | |
52 | module_param_array(id, charp, NULL, 0444); | |
53 | MODULE_PARM_DESC(id, "ID string for Bt87x soundcard"); | |
54 | module_param_array(enable, bool, NULL, 0444); | |
55 | MODULE_PARM_DESC(enable, "Enable Bt87x soundcard"); | |
56 | module_param_array(digital_rate, int, NULL, 0444); | |
57 | MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard"); | |
58 | module_param(load_all, bool, 0444); | |
59 | MODULE_PARM_DESC(load_all, "Allow to load the non-whitelisted cards"); | |
60 | ||
61 | ||
1da177e4 LT |
62 | /* register offsets */ |
63 | #define REG_INT_STAT 0x100 /* interrupt status */ | |
64 | #define REG_INT_MASK 0x104 /* interrupt mask */ | |
65 | #define REG_GPIO_DMA_CTL 0x10c /* audio control */ | |
66 | #define REG_PACKET_LEN 0x110 /* audio packet lengths */ | |
67 | #define REG_RISC_STRT_ADD 0x114 /* RISC program start address */ | |
68 | #define REG_RISC_COUNT 0x120 /* RISC program counter */ | |
69 | ||
70 | /* interrupt bits */ | |
71 | #define INT_OFLOW (1 << 3) /* audio A/D overflow */ | |
72 | #define INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */ | |
73 | #define INT_FBUS (1 << 12) /* FIFO overrun due to bus access latency */ | |
74 | #define INT_FTRGT (1 << 13) /* FIFO overrun due to target latency */ | |
75 | #define INT_FDSR (1 << 14) /* FIFO data stream resynchronization */ | |
76 | #define INT_PPERR (1 << 15) /* PCI parity error */ | |
77 | #define INT_RIPERR (1 << 16) /* RISC instruction parity error */ | |
78 | #define INT_PABORT (1 << 17) /* PCI master or target abort */ | |
79 | #define INT_OCERR (1 << 18) /* invalid opcode */ | |
80 | #define INT_SCERR (1 << 19) /* sync counter overflow */ | |
81 | #define INT_RISC_EN (1 << 27) /* DMA controller running */ | |
82 | #define INT_RISCS_SHIFT 28 /* RISC status bits */ | |
83 | ||
84 | /* audio control bits */ | |
85 | #define CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */ | |
86 | #define CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */ | |
87 | #define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */ | |
88 | #define CTL_PKTP_8 (1 << 2) /* 8 DWORDs */ | |
89 | #define CTL_PKTP_16 (2 << 2) /* 16 DWORDs */ | |
90 | #define CTL_ACAP_EN (1 << 4) /* enable audio capture */ | |
91 | #define CTL_DA_APP (1 << 5) /* GPIO input */ | |
92 | #define CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */ | |
93 | #define CTL_DA_IOM_DA (1 << 6) /* digital audio input */ | |
94 | #define CTL_DA_SDR_SHIFT 8 /* DDF first stage decimation rate */ | |
95 | #define CTL_DA_SDR_MASK (0xf<< 8) | |
96 | #define CTL_DA_LMT (1 << 12) /* limit audio data values */ | |
97 | #define CTL_DA_ES2 (1 << 13) /* enable DDF stage 2 */ | |
98 | #define CTL_DA_SBR (1 << 14) /* samples rounded to 8 bits */ | |
99 | #define CTL_DA_DPM (1 << 15) /* data packet mode */ | |
100 | #define CTL_DA_LRD_SHIFT 16 /* ALRCK delay */ | |
101 | #define CTL_DA_MLB (1 << 21) /* MSB/LSB format */ | |
102 | #define CTL_DA_LRI (1 << 22) /* left/right indication */ | |
103 | #define CTL_DA_SCE (1 << 23) /* sample clock edge */ | |
104 | #define CTL_A_SEL_STV (0 << 24) /* TV tuner audio input */ | |
105 | #define CTL_A_SEL_SFM (1 << 24) /* FM audio input */ | |
106 | #define CTL_A_SEL_SML (2 << 24) /* mic/line audio input */ | |
107 | #define CTL_A_SEL_SMXC (3 << 24) /* MUX bypass */ | |
108 | #define CTL_A_SEL_SHIFT 24 | |
109 | #define CTL_A_SEL_MASK (3 << 24) | |
110 | #define CTL_A_PWRDN (1 << 26) /* analog audio power-down */ | |
111 | #define CTL_A_G2X (1 << 27) /* audio gain boost */ | |
112 | #define CTL_A_GAIN_SHIFT 28 /* audio input gain */ | |
113 | #define CTL_A_GAIN_MASK (0xf<<28) | |
114 | ||
115 | /* RISC instruction opcodes */ | |
116 | #define RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */ | |
117 | #define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */ | |
118 | #define RISC_SKIP (0x2 << 28) /* skip FIFO data */ | |
119 | #define RISC_JUMP (0x7 << 28) /* jump to address */ | |
120 | #define RISC_SYNC (0x8 << 28) /* synchronize with FIFO */ | |
121 | ||
122 | /* RISC instruction bits */ | |
123 | #define RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */ | |
124 | #define RISC_RESYNC ( 1 << 15) /* disable FDSR errors */ | |
125 | #define RISC_SET_STATUS_SHIFT 16 /* set status bits */ | |
126 | #define RISC_RESET_STATUS_SHIFT 20 /* clear status bits */ | |
127 | #define RISC_IRQ ( 1 << 24) /* interrupt */ | |
128 | #define RISC_EOL ( 1 << 26) /* end of line */ | |
129 | #define RISC_SOL ( 1 << 27) /* start of line */ | |
130 | ||
131 | /* SYNC status bits values */ | |
132 | #define RISC_SYNC_FM1 0x6 | |
133 | #define RISC_SYNC_VRO 0xc | |
134 | ||
135 | #define ANALOG_CLOCK 1792000 | |
136 | #ifdef CONFIG_SND_BT87X_OVERCLOCK | |
137 | #define CLOCK_DIV_MIN 1 | |
138 | #else | |
139 | #define CLOCK_DIV_MIN 4 | |
140 | #endif | |
141 | #define CLOCK_DIV_MAX 15 | |
142 | ||
143 | #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \ | |
144 | INT_RIPERR | INT_PABORT | INT_OCERR) | |
145 | #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS) | |
146 | ||
147 | /* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */ | |
148 | #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8) | |
149 | ||
1da177e4 | 150 | struct snd_bt87x { |
9f362dce | 151 | struct snd_card *card; |
1da177e4 LT |
152 | struct pci_dev *pci; |
153 | ||
154 | void __iomem *mmio; | |
155 | int irq; | |
156 | ||
157 | int dig_rate; | |
158 | ||
159 | spinlock_t reg_lock; | |
160 | long opened; | |
9f362dce | 161 | struct snd_pcm_substream *substream; |
1da177e4 LT |
162 | |
163 | struct snd_dma_buffer dma_risc; | |
164 | unsigned int line_bytes; | |
165 | unsigned int lines; | |
166 | ||
167 | u32 reg_control; | |
168 | u32 interrupt_mask; | |
169 | ||
170 | int current_line; | |
171 | ||
172 | int pci_parity_errors; | |
173 | }; | |
174 | ||
175 | enum { DEVICE_DIGITAL, DEVICE_ANALOG }; | |
176 | ||
9f362dce | 177 | static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg) |
1da177e4 LT |
178 | { |
179 | return readl(chip->mmio + reg); | |
180 | } | |
181 | ||
9f362dce | 182 | static inline void snd_bt87x_writel(struct snd_bt87x *chip, u32 reg, u32 value) |
1da177e4 LT |
183 | { |
184 | writel(value, chip->mmio + reg); | |
185 | } | |
186 | ||
9f362dce | 187 | static int snd_bt87x_create_risc(struct snd_bt87x *chip, struct snd_pcm_substream *substream, |
1da177e4 LT |
188 | unsigned int periods, unsigned int period_bytes) |
189 | { | |
190 | struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream); | |
191 | unsigned int i, offset; | |
192 | u32 *risc; | |
193 | ||
194 | if (chip->dma_risc.area == NULL) { | |
195 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | |
196 | PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0) | |
197 | return -ENOMEM; | |
198 | } | |
199 | risc = (u32 *)chip->dma_risc.area; | |
200 | offset = 0; | |
201 | *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1); | |
202 | *risc++ = cpu_to_le32(0); | |
203 | for (i = 0; i < periods; ++i) { | |
204 | u32 rest; | |
205 | ||
206 | rest = period_bytes; | |
207 | do { | |
208 | u32 cmd, len; | |
209 | ||
210 | len = PAGE_SIZE - (offset % PAGE_SIZE); | |
211 | if (len > rest) | |
212 | len = rest; | |
213 | cmd = RISC_WRITE | len; | |
214 | if (rest == period_bytes) { | |
215 | u32 block = i * 16 / periods; | |
216 | cmd |= RISC_SOL; | |
217 | cmd |= block << RISC_SET_STATUS_SHIFT; | |
218 | cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT; | |
219 | } | |
220 | if (len == rest) | |
221 | cmd |= RISC_EOL | RISC_IRQ; | |
222 | *risc++ = cpu_to_le32(cmd); | |
223 | *risc++ = cpu_to_le32((u32)snd_pcm_sgbuf_get_addr(sgbuf, offset)); | |
224 | offset += len; | |
225 | rest -= len; | |
226 | } while (rest > 0); | |
227 | } | |
228 | *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO); | |
229 | *risc++ = cpu_to_le32(0); | |
230 | *risc++ = cpu_to_le32(RISC_JUMP); | |
231 | *risc++ = cpu_to_le32(chip->dma_risc.addr); | |
232 | chip->line_bytes = period_bytes; | |
233 | chip->lines = periods; | |
234 | return 0; | |
235 | } | |
236 | ||
9f362dce | 237 | static void snd_bt87x_free_risc(struct snd_bt87x *chip) |
1da177e4 LT |
238 | { |
239 | if (chip->dma_risc.area) { | |
240 | snd_dma_free_pages(&chip->dma_risc); | |
241 | chip->dma_risc.area = NULL; | |
242 | } | |
243 | } | |
244 | ||
9f362dce | 245 | static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status) |
1da177e4 LT |
246 | { |
247 | u16 pci_status; | |
248 | ||
249 | pci_read_config_word(chip->pci, PCI_STATUS, &pci_status); | |
250 | pci_status &= PCI_STATUS_PARITY | PCI_STATUS_SIG_TARGET_ABORT | | |
251 | PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_REC_MASTER_ABORT | | |
252 | PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY; | |
253 | pci_write_config_word(chip->pci, PCI_STATUS, pci_status); | |
254 | if (pci_status != PCI_STATUS_DETECTED_PARITY) | |
255 | snd_printk(KERN_ERR "Aieee - PCI error! status %#08x, PCI status %#04x\n", | |
256 | status & ERROR_INTERRUPTS, pci_status); | |
257 | else { | |
258 | snd_printk(KERN_ERR "Aieee - PCI parity error detected!\n"); | |
259 | /* error 'handling' similar to aic7xxx_pci.c: */ | |
260 | chip->pci_parity_errors++; | |
261 | if (chip->pci_parity_errors > 20) { | |
262 | snd_printk(KERN_ERR "Too many PCI parity errors observed.\n"); | |
263 | snd_printk(KERN_ERR "Some device on this bus is generating bad parity.\n"); | |
264 | snd_printk(KERN_ERR "This is an error *observed by*, not *generated by*, this card.\n"); | |
265 | snd_printk(KERN_ERR "PCI parity error checking has been disabled.\n"); | |
266 | chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR); | |
267 | snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask); | |
268 | } | |
269 | } | |
270 | } | |
271 | ||
7d12e780 | 272 | static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id) |
1da177e4 | 273 | { |
9f362dce | 274 | struct snd_bt87x *chip = dev_id; |
1da177e4 LT |
275 | unsigned int status, irq_status; |
276 | ||
277 | status = snd_bt87x_readl(chip, REG_INT_STAT); | |
278 | irq_status = status & chip->interrupt_mask; | |
279 | if (!irq_status) | |
280 | return IRQ_NONE; | |
281 | snd_bt87x_writel(chip, REG_INT_STAT, irq_status); | |
282 | ||
283 | if (irq_status & ERROR_INTERRUPTS) { | |
284 | if (irq_status & (INT_FBUS | INT_FTRGT)) | |
285 | snd_printk(KERN_WARNING "FIFO overrun, status %#08x\n", status); | |
286 | if (irq_status & INT_OCERR) | |
287 | snd_printk(KERN_ERR "internal RISC error, status %#08x\n", status); | |
288 | if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT)) | |
289 | snd_bt87x_pci_error(chip, irq_status); | |
290 | } | |
291 | if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) { | |
292 | int current_block, irq_block; | |
293 | ||
294 | /* assume that exactly one line has been recorded */ | |
295 | chip->current_line = (chip->current_line + 1) % chip->lines; | |
296 | /* but check if some interrupts have been skipped */ | |
297 | current_block = chip->current_line * 16 / chip->lines; | |
298 | irq_block = status >> INT_RISCS_SHIFT; | |
299 | if (current_block != irq_block) | |
300 | chip->current_line = (irq_block * chip->lines + 15) / 16; | |
301 | ||
302 | snd_pcm_period_elapsed(chip->substream); | |
303 | } | |
304 | return IRQ_HANDLED; | |
305 | } | |
306 | ||
9f362dce | 307 | static struct snd_pcm_hardware snd_bt87x_digital_hw = { |
1da177e4 LT |
308 | .info = SNDRV_PCM_INFO_MMAP | |
309 | SNDRV_PCM_INFO_INTERLEAVED | | |
310 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
311 | SNDRV_PCM_INFO_MMAP_VALID, | |
312 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
313 | .rates = 0, /* set at runtime */ | |
314 | .channels_min = 2, | |
315 | .channels_max = 2, | |
316 | .buffer_bytes_max = 255 * 4092, | |
317 | .period_bytes_min = 32, | |
318 | .period_bytes_max = 4092, | |
319 | .periods_min = 2, | |
320 | .periods_max = 255, | |
321 | }; | |
322 | ||
9f362dce | 323 | static struct snd_pcm_hardware snd_bt87x_analog_hw = { |
1da177e4 LT |
324 | .info = SNDRV_PCM_INFO_MMAP | |
325 | SNDRV_PCM_INFO_INTERLEAVED | | |
326 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
327 | SNDRV_PCM_INFO_MMAP_VALID, | |
328 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8, | |
329 | .rates = SNDRV_PCM_RATE_KNOT, | |
330 | .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX, | |
331 | .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN, | |
332 | .channels_min = 1, | |
333 | .channels_max = 1, | |
334 | .buffer_bytes_max = 255 * 4092, | |
335 | .period_bytes_min = 32, | |
336 | .period_bytes_max = 4092, | |
337 | .periods_min = 2, | |
338 | .periods_max = 255, | |
339 | }; | |
340 | ||
9f362dce | 341 | static int snd_bt87x_set_digital_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime) |
1da177e4 LT |
342 | { |
343 | static struct { | |
344 | int rate; | |
345 | unsigned int bit; | |
346 | } ratebits[] = { | |
347 | {8000, SNDRV_PCM_RATE_8000}, | |
348 | {11025, SNDRV_PCM_RATE_11025}, | |
349 | {16000, SNDRV_PCM_RATE_16000}, | |
350 | {22050, SNDRV_PCM_RATE_22050}, | |
351 | {32000, SNDRV_PCM_RATE_32000}, | |
352 | {44100, SNDRV_PCM_RATE_44100}, | |
353 | {48000, SNDRV_PCM_RATE_48000} | |
354 | }; | |
355 | int i; | |
356 | ||
357 | chip->reg_control |= CTL_DA_IOM_DA; | |
358 | runtime->hw = snd_bt87x_digital_hw; | |
359 | runtime->hw.rates = SNDRV_PCM_RATE_KNOT; | |
360 | for (i = 0; i < ARRAY_SIZE(ratebits); ++i) | |
361 | if (chip->dig_rate == ratebits[i].rate) { | |
362 | runtime->hw.rates = ratebits[i].bit; | |
363 | break; | |
364 | } | |
365 | runtime->hw.rate_min = chip->dig_rate; | |
366 | runtime->hw.rate_max = chip->dig_rate; | |
367 | return 0; | |
368 | } | |
369 | ||
9f362dce | 370 | static int snd_bt87x_set_analog_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime) |
1da177e4 | 371 | { |
9f362dce | 372 | static struct snd_ratnum analog_clock = { |
1da177e4 LT |
373 | .num = ANALOG_CLOCK, |
374 | .den_min = CLOCK_DIV_MIN, | |
375 | .den_max = CLOCK_DIV_MAX, | |
376 | .den_step = 1 | |
377 | }; | |
9f362dce | 378 | static struct snd_pcm_hw_constraint_ratnums constraint_rates = { |
1da177e4 LT |
379 | .nrats = 1, |
380 | .rats = &analog_clock | |
381 | }; | |
382 | ||
383 | chip->reg_control &= ~CTL_DA_IOM_DA; | |
384 | runtime->hw = snd_bt87x_analog_hw; | |
385 | return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
386 | &constraint_rates); | |
387 | } | |
388 | ||
9f362dce | 389 | static int snd_bt87x_pcm_open(struct snd_pcm_substream *substream) |
1da177e4 | 390 | { |
9f362dce TI |
391 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
392 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
393 | int err; |
394 | ||
395 | if (test_and_set_bit(0, &chip->opened)) | |
396 | return -EBUSY; | |
397 | ||
398 | if (substream->pcm->device == DEVICE_DIGITAL) | |
399 | err = snd_bt87x_set_digital_hw(chip, runtime); | |
400 | else | |
401 | err = snd_bt87x_set_analog_hw(chip, runtime); | |
402 | if (err < 0) | |
403 | goto _error; | |
404 | ||
405 | err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); | |
406 | if (err < 0) | |
407 | goto _error; | |
408 | ||
409 | chip->substream = substream; | |
410 | return 0; | |
411 | ||
412 | _error: | |
413 | clear_bit(0, &chip->opened); | |
414 | smp_mb__after_clear_bit(); | |
415 | return err; | |
416 | } | |
417 | ||
9f362dce | 418 | static int snd_bt87x_close(struct snd_pcm_substream *substream) |
1da177e4 | 419 | { |
9f362dce | 420 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
421 | |
422 | chip->substream = NULL; | |
423 | clear_bit(0, &chip->opened); | |
424 | smp_mb__after_clear_bit(); | |
425 | return 0; | |
426 | } | |
427 | ||
9f362dce TI |
428 | static int snd_bt87x_hw_params(struct snd_pcm_substream *substream, |
429 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 430 | { |
9f362dce | 431 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
432 | int err; |
433 | ||
434 | err = snd_pcm_lib_malloc_pages(substream, | |
435 | params_buffer_bytes(hw_params)); | |
436 | if (err < 0) | |
437 | return err; | |
438 | return snd_bt87x_create_risc(chip, substream, | |
439 | params_periods(hw_params), | |
440 | params_period_bytes(hw_params)); | |
441 | } | |
442 | ||
9f362dce | 443 | static int snd_bt87x_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 444 | { |
9f362dce | 445 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
446 | |
447 | snd_bt87x_free_risc(chip); | |
448 | snd_pcm_lib_free_pages(substream); | |
449 | return 0; | |
450 | } | |
451 | ||
9f362dce | 452 | static int snd_bt87x_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 453 | { |
9f362dce TI |
454 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
455 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
456 | int decimation; |
457 | ||
458 | spin_lock_irq(&chip->reg_lock); | |
459 | chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR); | |
460 | decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate; | |
461 | chip->reg_control |= decimation << CTL_DA_SDR_SHIFT; | |
462 | if (runtime->format == SNDRV_PCM_FORMAT_S8) | |
463 | chip->reg_control |= CTL_DA_SBR; | |
464 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
465 | spin_unlock_irq(&chip->reg_lock); | |
466 | return 0; | |
467 | } | |
468 | ||
9f362dce | 469 | static int snd_bt87x_start(struct snd_bt87x *chip) |
1da177e4 LT |
470 | { |
471 | spin_lock(&chip->reg_lock); | |
472 | chip->current_line = 0; | |
473 | chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN; | |
474 | snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr); | |
475 | snd_bt87x_writel(chip, REG_PACKET_LEN, | |
476 | chip->line_bytes | (chip->lines << 16)); | |
477 | snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask); | |
478 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
479 | spin_unlock(&chip->reg_lock); | |
480 | return 0; | |
481 | } | |
482 | ||
9f362dce | 483 | static int snd_bt87x_stop(struct snd_bt87x *chip) |
1da177e4 LT |
484 | { |
485 | spin_lock(&chip->reg_lock); | |
486 | chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN); | |
487 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
488 | snd_bt87x_writel(chip, REG_INT_MASK, 0); | |
489 | snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS); | |
490 | spin_unlock(&chip->reg_lock); | |
491 | return 0; | |
492 | } | |
493 | ||
9f362dce | 494 | static int snd_bt87x_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 495 | { |
9f362dce | 496 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
497 | |
498 | switch (cmd) { | |
499 | case SNDRV_PCM_TRIGGER_START: | |
500 | return snd_bt87x_start(chip); | |
501 | case SNDRV_PCM_TRIGGER_STOP: | |
502 | return snd_bt87x_stop(chip); | |
503 | default: | |
504 | return -EINVAL; | |
505 | } | |
506 | } | |
507 | ||
9f362dce | 508 | static snd_pcm_uframes_t snd_bt87x_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 509 | { |
9f362dce TI |
510 | struct snd_bt87x *chip = snd_pcm_substream_chip(substream); |
511 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
512 | |
513 | return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes); | |
514 | } | |
515 | ||
9f362dce | 516 | static struct snd_pcm_ops snd_bt87x_pcm_ops = { |
1da177e4 LT |
517 | .open = snd_bt87x_pcm_open, |
518 | .close = snd_bt87x_close, | |
519 | .ioctl = snd_pcm_lib_ioctl, | |
520 | .hw_params = snd_bt87x_hw_params, | |
521 | .hw_free = snd_bt87x_hw_free, | |
522 | .prepare = snd_bt87x_prepare, | |
523 | .trigger = snd_bt87x_trigger, | |
524 | .pointer = snd_bt87x_pointer, | |
525 | .page = snd_pcm_sgbuf_ops_page, | |
526 | }; | |
527 | ||
9f362dce TI |
528 | static int snd_bt87x_capture_volume_info(struct snd_kcontrol *kcontrol, |
529 | struct snd_ctl_elem_info *info) | |
1da177e4 LT |
530 | { |
531 | info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
532 | info->count = 1; | |
533 | info->value.integer.min = 0; | |
534 | info->value.integer.max = 15; | |
535 | return 0; | |
536 | } | |
537 | ||
9f362dce TI |
538 | static int snd_bt87x_capture_volume_get(struct snd_kcontrol *kcontrol, |
539 | struct snd_ctl_elem_value *value) | |
1da177e4 | 540 | { |
9f362dce | 541 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
542 | |
543 | value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT; | |
544 | return 0; | |
545 | } | |
546 | ||
9f362dce TI |
547 | static int snd_bt87x_capture_volume_put(struct snd_kcontrol *kcontrol, |
548 | struct snd_ctl_elem_value *value) | |
1da177e4 | 549 | { |
9f362dce | 550 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
551 | u32 old_control; |
552 | int changed; | |
553 | ||
554 | spin_lock_irq(&chip->reg_lock); | |
555 | old_control = chip->reg_control; | |
556 | chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK) | |
557 | | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT); | |
558 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
559 | changed = old_control != chip->reg_control; | |
560 | spin_unlock_irq(&chip->reg_lock); | |
561 | return changed; | |
562 | } | |
563 | ||
9f362dce | 564 | static struct snd_kcontrol_new snd_bt87x_capture_volume = { |
1da177e4 LT |
565 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
566 | .name = "Capture Volume", | |
567 | .info = snd_bt87x_capture_volume_info, | |
568 | .get = snd_bt87x_capture_volume_get, | |
569 | .put = snd_bt87x_capture_volume_put, | |
570 | }; | |
571 | ||
9f362dce TI |
572 | static int snd_bt87x_capture_boost_info(struct snd_kcontrol *kcontrol, |
573 | struct snd_ctl_elem_info *info) | |
1da177e4 LT |
574 | { |
575 | info->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
576 | info->count = 1; | |
577 | info->value.integer.min = 0; | |
578 | info->value.integer.max = 1; | |
579 | return 0; | |
580 | } | |
581 | ||
9f362dce TI |
582 | static int snd_bt87x_capture_boost_get(struct snd_kcontrol *kcontrol, |
583 | struct snd_ctl_elem_value *value) | |
1da177e4 | 584 | { |
9f362dce | 585 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
586 | |
587 | value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X); | |
588 | return 0; | |
589 | } | |
590 | ||
9f362dce TI |
591 | static int snd_bt87x_capture_boost_put(struct snd_kcontrol *kcontrol, |
592 | struct snd_ctl_elem_value *value) | |
1da177e4 | 593 | { |
9f362dce | 594 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
595 | u32 old_control; |
596 | int changed; | |
597 | ||
598 | spin_lock_irq(&chip->reg_lock); | |
599 | old_control = chip->reg_control; | |
600 | chip->reg_control = (chip->reg_control & ~CTL_A_G2X) | |
601 | | (value->value.integer.value[0] ? CTL_A_G2X : 0); | |
602 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
603 | changed = chip->reg_control != old_control; | |
604 | spin_unlock_irq(&chip->reg_lock); | |
605 | return changed; | |
606 | } | |
607 | ||
9f362dce | 608 | static struct snd_kcontrol_new snd_bt87x_capture_boost = { |
1da177e4 LT |
609 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
610 | .name = "Capture Boost", | |
611 | .info = snd_bt87x_capture_boost_info, | |
612 | .get = snd_bt87x_capture_boost_get, | |
613 | .put = snd_bt87x_capture_boost_put, | |
614 | }; | |
615 | ||
9f362dce TI |
616 | static int snd_bt87x_capture_source_info(struct snd_kcontrol *kcontrol, |
617 | struct snd_ctl_elem_info *info) | |
1da177e4 LT |
618 | { |
619 | static char *texts[3] = {"TV Tuner", "FM", "Mic/Line"}; | |
620 | ||
621 | info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
622 | info->count = 1; | |
623 | info->value.enumerated.items = 3; | |
624 | if (info->value.enumerated.item > 2) | |
625 | info->value.enumerated.item = 2; | |
626 | strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]); | |
627 | return 0; | |
628 | } | |
629 | ||
9f362dce TI |
630 | static int snd_bt87x_capture_source_get(struct snd_kcontrol *kcontrol, |
631 | struct snd_ctl_elem_value *value) | |
1da177e4 | 632 | { |
9f362dce | 633 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
634 | |
635 | value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT; | |
636 | return 0; | |
637 | } | |
638 | ||
9f362dce TI |
639 | static int snd_bt87x_capture_source_put(struct snd_kcontrol *kcontrol, |
640 | struct snd_ctl_elem_value *value) | |
1da177e4 | 641 | { |
9f362dce | 642 | struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
643 | u32 old_control; |
644 | int changed; | |
645 | ||
646 | spin_lock_irq(&chip->reg_lock); | |
647 | old_control = chip->reg_control; | |
648 | chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK) | |
649 | | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT); | |
650 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
651 | changed = chip->reg_control != old_control; | |
652 | spin_unlock_irq(&chip->reg_lock); | |
653 | return changed; | |
654 | } | |
655 | ||
9f362dce | 656 | static struct snd_kcontrol_new snd_bt87x_capture_source = { |
1da177e4 LT |
657 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
658 | .name = "Capture Source", | |
659 | .info = snd_bt87x_capture_source_info, | |
660 | .get = snd_bt87x_capture_source_get, | |
661 | .put = snd_bt87x_capture_source_put, | |
662 | }; | |
663 | ||
9f362dce | 664 | static int snd_bt87x_free(struct snd_bt87x *chip) |
1da177e4 LT |
665 | { |
666 | if (chip->mmio) { | |
667 | snd_bt87x_stop(chip); | |
668 | if (chip->irq >= 0) | |
669 | synchronize_irq(chip->irq); | |
670 | ||
671 | iounmap(chip->mmio); | |
672 | } | |
673 | if (chip->irq >= 0) | |
674 | free_irq(chip->irq, chip); | |
675 | pci_release_regions(chip->pci); | |
676 | pci_disable_device(chip->pci); | |
677 | kfree(chip); | |
678 | return 0; | |
679 | } | |
680 | ||
9f362dce | 681 | static int snd_bt87x_dev_free(struct snd_device *device) |
1da177e4 | 682 | { |
9f362dce | 683 | struct snd_bt87x *chip = device->device_data; |
1da177e4 LT |
684 | return snd_bt87x_free(chip); |
685 | } | |
686 | ||
9f362dce | 687 | static int __devinit snd_bt87x_pcm(struct snd_bt87x *chip, int device, char *name) |
1da177e4 LT |
688 | { |
689 | int err; | |
9f362dce | 690 | struct snd_pcm *pcm; |
1da177e4 LT |
691 | |
692 | err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm); | |
693 | if (err < 0) | |
694 | return err; | |
695 | pcm->private_data = chip; | |
696 | strcpy(pcm->name, name); | |
697 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops); | |
698 | return snd_pcm_lib_preallocate_pages_for_all(pcm, | |
699 | SNDRV_DMA_TYPE_DEV_SG, | |
700 | snd_dma_pci_data(chip->pci), | |
701 | 128 * 1024, | |
7ab39926 | 702 | ALIGN(255 * 4092, 1024)); |
1da177e4 LT |
703 | } |
704 | ||
9f362dce | 705 | static int __devinit snd_bt87x_create(struct snd_card *card, |
1da177e4 | 706 | struct pci_dev *pci, |
9f362dce | 707 | struct snd_bt87x **rchip) |
1da177e4 | 708 | { |
9f362dce | 709 | struct snd_bt87x *chip; |
1da177e4 | 710 | int err; |
9f362dce | 711 | static struct snd_device_ops ops = { |
1da177e4 LT |
712 | .dev_free = snd_bt87x_dev_free |
713 | }; | |
714 | ||
715 | *rchip = NULL; | |
716 | ||
717 | err = pci_enable_device(pci); | |
718 | if (err < 0) | |
719 | return err; | |
720 | ||
e560d8d8 | 721 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
722 | if (!chip) { |
723 | pci_disable_device(pci); | |
724 | return -ENOMEM; | |
725 | } | |
726 | chip->card = card; | |
727 | chip->pci = pci; | |
728 | chip->irq = -1; | |
729 | spin_lock_init(&chip->reg_lock); | |
730 | ||
731 | if ((err = pci_request_regions(pci, "Bt87x audio")) < 0) { | |
732 | kfree(chip); | |
733 | pci_disable_device(pci); | |
734 | return err; | |
735 | } | |
736 | chip->mmio = ioremap_nocache(pci_resource_start(pci, 0), | |
737 | pci_resource_len(pci, 0)); | |
738 | if (!chip->mmio) { | |
739 | snd_bt87x_free(chip); | |
740 | snd_printk(KERN_ERR "cannot remap io memory\n"); | |
741 | return -ENOMEM; | |
742 | } | |
743 | ||
744 | chip->reg_control = CTL_DA_ES2 | CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT); | |
745 | chip->interrupt_mask = MY_INTERRUPTS; | |
746 | snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control); | |
747 | snd_bt87x_writel(chip, REG_INT_MASK, 0); | |
748 | snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS); | |
749 | ||
437a5a46 | 750 | if (request_irq(pci->irq, snd_bt87x_interrupt, IRQF_SHARED, |
1da177e4 LT |
751 | "Bt87x audio", chip)) { |
752 | snd_bt87x_free(chip); | |
753 | snd_printk(KERN_ERR "cannot grab irq\n"); | |
754 | return -EBUSY; | |
755 | } | |
756 | chip->irq = pci->irq; | |
757 | pci_set_master(pci); | |
758 | synchronize_irq(chip->irq); | |
759 | ||
760 | err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); | |
761 | if (err < 0) { | |
762 | snd_bt87x_free(chip); | |
763 | return err; | |
764 | } | |
765 | snd_card_set_dev(card, &pci->dev); | |
766 | *rchip = chip; | |
767 | return 0; | |
768 | } | |
769 | ||
770 | #define BT_DEVICE(chip, subvend, subdev, rate) \ | |
771 | { .vendor = PCI_VENDOR_ID_BROOKTREE, \ | |
4153812f | 772 | .device = chip, \ |
1da177e4 LT |
773 | .subvendor = subvend, .subdevice = subdev, \ |
774 | .driver_data = rate } | |
775 | ||
776 | /* driver_data is the default digital_rate value for that device */ | |
f40b6890 | 777 | static struct pci_device_id snd_bt87x_ids[] = { |
4153812f GC |
778 | /* Hauppauge WinTV series */ |
779 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0x13eb, 32000), | |
780 | /* Hauppauge WinTV series */ | |
781 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, 0x0070, 0x13eb, 32000), | |
782 | /* Viewcast Osprey 200 */ | |
783 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff01, 44100), | |
76e63067 TI |
784 | /* ATI TV-Wonder */ |
785 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1002, 0x0001, 32000), | |
abf58f09 JK |
786 | /* Leadtek Winfast tv 2000xp delux */ |
787 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x107d, 0x6606, 32000), | |
29463dfe CL |
788 | /* Voodoo TV 200 */ |
789 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x121a, 0x3000, 32000), | |
790 | /* AVerMedia Studio No. 103, 203, ...? */ | |
791 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1461, 0x0003, 48000), | |
1da177e4 LT |
792 | { } |
793 | }; | |
794 | MODULE_DEVICE_TABLE(pci, snd_bt87x_ids); | |
795 | ||
796 | /* cards known not to have audio | |
797 | * (DVB cards use the audio function to transfer MPEG data) */ | |
798 | static struct { | |
799 | unsigned short subvendor, subdevice; | |
800 | } blacklist[] __devinitdata = { | |
801 | {0x0071, 0x0101}, /* Nebula Electronics DigiTV */ | |
0110f50b | 802 | {0x11bd, 0x001c}, /* Pinnacle PCTV Sat */ |
1da177e4 LT |
803 | {0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */ |
804 | {0x1461, 0x0761}, /* AVermedia AverTV DVB-T */ | |
805 | {0x1461, 0x0771}, /* AVermedia DVB-T 771 */ | |
806 | {0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */ | |
0110f50b | 807 | {0x18ac, 0xd500}, /* DVICO FusionHDTV 5 Lite */ |
1da177e4 | 808 | {0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */ |
19790db0 | 809 | {0x18ac, 0xdb11}, /* Ultraview DVB-T Lite */ |
1da177e4 | 810 | {0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */ |
0110f50b | 811 | {0x7063, 0x2000}, /* pcHDTV HD-2000 TV */ |
1da177e4 LT |
812 | }; |
813 | ||
b4634484 GK |
814 | static struct pci_driver driver; |
815 | ||
1da177e4 LT |
816 | /* return the rate of the card, or a negative value if it's blacklisted */ |
817 | static int __devinit snd_bt87x_detect_card(struct pci_dev *pci) | |
818 | { | |
819 | int i; | |
820 | const struct pci_device_id *supported; | |
821 | ||
159f597a | 822 | supported = pci_match_device(&driver, pci); |
54c63cfc | 823 | if (supported && supported->driver_data > 0) |
1da177e4 LT |
824 | return supported->driver_data; |
825 | ||
826 | for (i = 0; i < ARRAY_SIZE(blacklist); ++i) | |
827 | if (blacklist[i].subvendor == pci->subsystem_vendor && | |
828 | blacklist[i].subdevice == pci->subsystem_device) { | |
abf58f09 JK |
829 | snd_printdd(KERN_INFO "card %#04x-%#04x:%#04x has no audio\n", |
830 | pci->device, pci->subsystem_vendor, pci->subsystem_device); | |
1da177e4 LT |
831 | return -EBUSY; |
832 | } | |
833 | ||
abf58f09 JK |
834 | snd_printk(KERN_INFO "unknown card %#04x-%#04x:%#04x, using default rate 32000\n", |
835 | pci->device, pci->subsystem_vendor, pci->subsystem_device); | |
1da177e4 LT |
836 | snd_printk(KERN_DEBUG "please mail id, board name, and, " |
837 | "if it works, the correct digital_rate option to " | |
4505179c | 838 | "<alsa-devel@alsa-project.org>\n"); |
1da177e4 LT |
839 | return 32000; /* default rate */ |
840 | } | |
841 | ||
842 | static int __devinit snd_bt87x_probe(struct pci_dev *pci, | |
843 | const struct pci_device_id *pci_id) | |
844 | { | |
845 | static int dev; | |
9f362dce TI |
846 | struct snd_card *card; |
847 | struct snd_bt87x *chip; | |
1da177e4 LT |
848 | int err, rate; |
849 | ||
850 | rate = pci_id->driver_data; | |
851 | if (! rate) | |
852 | if ((rate = snd_bt87x_detect_card(pci)) <= 0) | |
853 | return -ENODEV; | |
854 | ||
855 | if (dev >= SNDRV_CARDS) | |
856 | return -ENODEV; | |
857 | if (!enable[dev]) { | |
858 | ++dev; | |
859 | return -ENOENT; | |
860 | } | |
861 | ||
862 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); | |
863 | if (!card) | |
864 | return -ENOMEM; | |
865 | ||
866 | err = snd_bt87x_create(card, pci, &chip); | |
867 | if (err < 0) | |
868 | goto _error; | |
869 | ||
870 | if (digital_rate[dev] > 0) | |
871 | chip->dig_rate = digital_rate[dev]; | |
872 | else | |
873 | chip->dig_rate = rate; | |
874 | ||
875 | err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital"); | |
876 | if (err < 0) | |
877 | goto _error; | |
878 | err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog"); | |
879 | if (err < 0) | |
880 | goto _error; | |
881 | ||
882 | err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_volume, chip)); | |
883 | if (err < 0) | |
884 | goto _error; | |
885 | err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_boost, chip)); | |
886 | if (err < 0) | |
887 | goto _error; | |
888 | err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_source, chip)); | |
889 | if (err < 0) | |
890 | goto _error; | |
891 | ||
892 | strcpy(card->driver, "Bt87x"); | |
893 | sprintf(card->shortname, "Brooktree Bt%x", pci->device); | |
aa0a2ddc GKH |
894 | sprintf(card->longname, "%s at %#llx, irq %i", |
895 | card->shortname, (unsigned long long)pci_resource_start(pci, 0), | |
896 | chip->irq); | |
1da177e4 LT |
897 | strcpy(card->mixername, "Bt87x"); |
898 | ||
899 | err = snd_card_register(card); | |
900 | if (err < 0) | |
901 | goto _error; | |
902 | ||
903 | pci_set_drvdata(pci, card); | |
904 | ++dev; | |
905 | return 0; | |
906 | ||
907 | _error: | |
908 | snd_card_free(card); | |
909 | return err; | |
910 | } | |
911 | ||
912 | static void __devexit snd_bt87x_remove(struct pci_dev *pci) | |
913 | { | |
914 | snd_card_free(pci_get_drvdata(pci)); | |
915 | pci_set_drvdata(pci, NULL); | |
916 | } | |
917 | ||
918 | /* default entries for all Bt87x cards - it's not exported */ | |
919 | /* driver_data is set to 0 to call detection */ | |
396c9b92 | 920 | static struct pci_device_id snd_bt87x_default_ids[] __devinitdata = { |
26205e02 GC |
921 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, PCI_ANY_ID, PCI_ANY_ID, 0), |
922 | BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, PCI_ANY_ID, PCI_ANY_ID, 0), | |
1da177e4 LT |
923 | { } |
924 | }; | |
925 | ||
926 | static struct pci_driver driver = { | |
927 | .name = "Bt87x", | |
928 | .id_table = snd_bt87x_ids, | |
929 | .probe = snd_bt87x_probe, | |
930 | .remove = __devexit_p(snd_bt87x_remove), | |
931 | }; | |
932 | ||
933 | static int __init alsa_card_bt87x_init(void) | |
934 | { | |
935 | if (load_all) | |
936 | driver.id_table = snd_bt87x_default_ids; | |
01d25d46 | 937 | return pci_register_driver(&driver); |
1da177e4 LT |
938 | } |
939 | ||
940 | static void __exit alsa_card_bt87x_exit(void) | |
941 | { | |
942 | pci_unregister_driver(&driver); | |
943 | } | |
944 | ||
945 | module_init(alsa_card_bt87x_init) | |
946 | module_exit(alsa_card_bt87x_exit) |