Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Copyright (c) by Jaroslav Kysela <perex@suse.cz> | |
3 | * Creative Labs, Inc. | |
4 | * Routines for control of EMU10K1 chips | |
5 | * | |
9f4bd5dd | 6 | * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> |
1da177e4 | 7 | * Added support for Audigy 2 Value. |
9f4bd5dd JCD |
8 | * Added EMU 1010 support. |
9 | * General bug fixes and enhancements. | |
1da177e4 LT |
10 | * |
11 | * | |
12 | * BUGS: | |
13 | * -- | |
14 | * | |
15 | * TODO: | |
16 | * -- | |
17 | * | |
18 | * This program is free software; you can redistribute it and/or modify | |
19 | * it under the terms of the GNU General Public License as published by | |
20 | * the Free Software Foundation; either version 2 of the License, or | |
21 | * (at your option) any later version. | |
22 | * | |
23 | * This program is distributed in the hope that it will be useful, | |
24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
26 | * GNU General Public License for more details. | |
27 | * | |
28 | * You should have received a copy of the GNU General Public License | |
29 | * along with this program; if not, write to the Free Software | |
30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <sound/driver.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/init.h> | |
37 | #include <linux/interrupt.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/slab.h> | |
40 | #include <linux/vmalloc.h> | |
62932df8 IM |
41 | #include <linux/mutex.h> |
42 | ||
1da177e4 LT |
43 | |
44 | #include <sound/core.h> | |
45 | #include <sound/emu10k1.h> | |
9f4bd5dd | 46 | #include <linux/firmware.h> |
1da177e4 | 47 | #include "p16v.h" |
e2b15f8f | 48 | #include "tina2.h" |
184c1e2c | 49 | #include "p17v.h" |
1da177e4 | 50 | |
19b99fba | 51 | |
7e0af29d CL |
52 | #define HANA_FILENAME "emu/hana.fw" |
53 | #define DOCK_FILENAME "emu/audio_dock.fw" | |
54 | ||
55 | MODULE_FIRMWARE(HANA_FILENAME); | |
56 | MODULE_FIRMWARE(DOCK_FILENAME); | |
57 | ||
58 | ||
1da177e4 LT |
59 | /************************************************************************* |
60 | * EMU10K1 init / done | |
61 | *************************************************************************/ | |
62 | ||
eb4698f3 | 63 | void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch) |
1da177e4 LT |
64 | { |
65 | snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); | |
66 | snd_emu10k1_ptr_write(emu, IP, ch, 0); | |
67 | snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff); | |
68 | snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff); | |
69 | snd_emu10k1_ptr_write(emu, PTRX, ch, 0); | |
70 | snd_emu10k1_ptr_write(emu, CPF, ch, 0); | |
71 | snd_emu10k1_ptr_write(emu, CCR, ch, 0); | |
72 | ||
73 | snd_emu10k1_ptr_write(emu, PSST, ch, 0); | |
74 | snd_emu10k1_ptr_write(emu, DSL, ch, 0x10); | |
75 | snd_emu10k1_ptr_write(emu, CCCA, ch, 0); | |
76 | snd_emu10k1_ptr_write(emu, Z1, ch, 0); | |
77 | snd_emu10k1_ptr_write(emu, Z2, ch, 0); | |
78 | snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000); | |
79 | ||
80 | snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0); | |
81 | snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0); | |
82 | snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff); | |
83 | snd_emu10k1_ptr_write(emu, PEFE, ch, 0); | |
84 | snd_emu10k1_ptr_write(emu, FMMOD, ch, 0); | |
85 | snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */ | |
86 | snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */ | |
87 | snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0); | |
88 | ||
89 | /*** these are last so OFF prevents writing ***/ | |
90 | snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0); | |
91 | snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0); | |
92 | snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0); | |
93 | snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0); | |
94 | snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0); | |
95 | ||
96 | /* Audigy extra stuffs */ | |
97 | if (emu->audigy) { | |
98 | snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */ | |
99 | snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */ | |
100 | snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */ | |
101 | snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */ | |
102 | snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100); | |
103 | snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f); | |
104 | snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0); | |
105 | } | |
106 | } | |
107 | ||
18f3c59f JCD |
108 | static unsigned int spi_dac_init[] = { |
109 | 0x00ff, | |
110 | 0x02ff, | |
111 | 0x0400, | |
112 | 0x0520, | |
113 | 0x0600, | |
114 | 0x08ff, | |
115 | 0x0aff, | |
116 | 0x0cff, | |
117 | 0x0eff, | |
118 | 0x10ff, | |
119 | 0x1200, | |
120 | 0x1400, | |
121 | 0x1480, | |
122 | 0x1800, | |
123 | 0x1aff, | |
124 | 0x1cff, | |
125 | 0x1e00, | |
126 | 0x0530, | |
127 | 0x0602, | |
128 | 0x0622, | |
129 | 0x1400, | |
130 | }; | |
184c1e2c JCD |
131 | |
132 | static unsigned int i2c_adc_init[][2] = { | |
133 | { 0x17, 0x00 }, /* Reset */ | |
134 | { 0x07, 0x00 }, /* Timeout */ | |
135 | { 0x0b, 0x22 }, /* Interface control */ | |
136 | { 0x0c, 0x22 }, /* Master mode control */ | |
137 | { 0x0d, 0x08 }, /* Powerdown control */ | |
138 | { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ | |
139 | { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ | |
140 | { 0x10, 0x7b }, /* ALC Control 1 */ | |
141 | { 0x11, 0x00 }, /* ALC Control 2 */ | |
142 | { 0x12, 0x32 }, /* ALC Control 3 */ | |
143 | { 0x13, 0x00 }, /* Noise gate control */ | |
144 | { 0x14, 0xa6 }, /* Limiter control */ | |
145 | { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */ | |
146 | }; | |
18f3c59f | 147 | |
09668b44 | 148 | static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume) |
1da177e4 | 149 | { |
1da177e4 | 150 | unsigned int silent_page; |
09668b44 | 151 | int ch; |
184c1e2c | 152 | u32 tmp; |
1da177e4 LT |
153 | |
154 | /* disable audio and lock cache */ | |
09668b44 TI |
155 | outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, |
156 | emu->port + HCFG); | |
1da177e4 LT |
157 | |
158 | /* reset recording buffers */ | |
159 | snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE); | |
160 | snd_emu10k1_ptr_write(emu, MICBA, 0, 0); | |
161 | snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE); | |
162 | snd_emu10k1_ptr_write(emu, FXBA, 0, 0); | |
163 | snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); | |
164 | snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); | |
165 | ||
166 | /* disable channel interrupt */ | |
167 | outl(0, emu->port + INTE); | |
168 | snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); | |
169 | snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); | |
170 | snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); | |
171 | snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); | |
172 | ||
173 | if (emu->audigy){ | |
174 | /* set SPDIF bypass mode */ | |
175 | snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); | |
176 | /* enable rear left + rear right AC97 slots */ | |
09668b44 TI |
177 | snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | |
178 | AC97SLOT_REAR_LEFT); | |
1da177e4 LT |
179 | } |
180 | ||
181 | /* init envelope engine */ | |
09668b44 | 182 | for (ch = 0; ch < NUM_G; ch++) |
1da177e4 | 183 | snd_emu10k1_voice_init(emu, ch); |
1da177e4 | 184 | |
09668b44 TI |
185 | snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]); |
186 | snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]); | |
187 | snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]); | |
1da177e4 | 188 | |
2b637da5 | 189 | if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ |
1da177e4 | 190 | /* Hacks for Alice3 to work independent of haP16V driver */ |
1da177e4 LT |
191 | //Setup SRCMulti_I2S SamplingRate |
192 | tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0); | |
193 | tmp &= 0xfffff1ff; | |
194 | tmp |= (0x2<<9); | |
195 | snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp); | |
196 | ||
197 | /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ | |
198 | snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); | |
199 | /* Setup SRCMulti Input Audio Enable */ | |
200 | /* Use 0xFFFFFFFF to enable P16V sounds. */ | |
201 | snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); | |
202 | ||
203 | /* Enabled Phased (8-channel) P16V playback */ | |
204 | outl(0x0201, emu->port + HCFG2); | |
205 | /* Set playback routing. */ | |
fd9a98ec | 206 | snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); |
1da177e4 | 207 | } |
e0474e53 | 208 | if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ |
1da177e4 | 209 | /* Hacks for Alice3 to work independent of haP16V driver */ |
09668b44 | 210 | snd_printk(KERN_INFO "Audigy2 value: Special config.\n"); |
1da177e4 LT |
211 | //Setup SRCMulti_I2S SamplingRate |
212 | tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0); | |
213 | tmp &= 0xfffff1ff; | |
214 | tmp |= (0x2<<9); | |
215 | snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp); | |
216 | ||
217 | /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ | |
218 | outl(0x600000, emu->port + 0x20); | |
219 | outl(0x14, emu->port + 0x24); | |
220 | ||
221 | /* Setup SRCMulti Input Audio Enable */ | |
222 | outl(0x7b0000, emu->port + 0x20); | |
223 | outl(0xFF000000, emu->port + 0x24); | |
224 | ||
225 | /* Setup SPDIF Out Audio Enable */ | |
226 | /* The Audigy 2 Value has a separate SPDIF out, | |
227 | * so no need for a mixer switch | |
228 | */ | |
229 | outl(0x7a0000, emu->port + 0x20); | |
230 | outl(0xFF000000, emu->port + 0x24); | |
231 | tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ | |
232 | outl(tmp, emu->port + A_IOCFG); | |
233 | } | |
27fe864e | 234 | if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ |
18f3c59f JCD |
235 | int size, n; |
236 | ||
237 | size = ARRAY_SIZE(spi_dac_init); | |
9f4bd5dd | 238 | for (n = 0; n < size; n++) |
18f3c59f JCD |
239 | snd_emu10k1_spi_write(emu, spi_dac_init[n]); |
240 | ||
27fe864e | 241 | snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); |
ccadc3e3 JCD |
242 | /* Enable GPIOs |
243 | * GPIO0: Unknown | |
244 | * GPIO1: Speakers-enabled. | |
245 | * GPIO2: Unknown | |
246 | * GPIO3: Unknown | |
247 | * GPIO4: IEC958 Output on. | |
248 | * GPIO5: Unknown | |
249 | * GPIO6: Unknown | |
250 | * GPIO7: Unknown | |
251 | */ | |
252 | outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ | |
253 | ||
27fe864e | 254 | } |
184c1e2c JCD |
255 | if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ |
256 | int size, n; | |
257 | ||
258 | snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); | |
259 | tmp = inl(emu->port + A_IOCFG); | |
260 | outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ | |
261 | tmp = inl(emu->port + A_IOCFG); | |
262 | size = ARRAY_SIZE(i2c_adc_init); | |
263 | for (n = 0; n < size; n++) | |
264 | snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); | |
265 | for (n=0; n < 4; n++) { | |
266 | emu->i2c_capture_volume[n][0]= 0xcf; | |
267 | emu->i2c_capture_volume[n][1]= 0xcf; | |
268 | } | |
269 | ||
270 | } | |
271 | ||
27fe864e | 272 | |
1da177e4 LT |
273 | snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); |
274 | snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ | |
275 | snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */ | |
276 | ||
277 | silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK; | |
278 | for (ch = 0; ch < NUM_G; ch++) { | |
279 | snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); | |
280 | snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); | |
281 | } | |
282 | ||
9f4bd5dd JCD |
283 | if (emu->card_capabilities->emu1010) { |
284 | outl(HCFG_AUTOMUTE_ASYNC | | |
285 | HCFG_EMU32_SLAVE | | |
286 | HCFG_AUDIOENABLE, emu->port + HCFG); | |
1da177e4 LT |
287 | /* |
288 | * Hokay, setup HCFG | |
289 | * Mute Disable Audio = 0 | |
290 | * Lock Tank Memory = 1 | |
291 | * Lock Sound Memory = 0 | |
292 | * Auto Mute = 1 | |
293 | */ | |
9f4bd5dd | 294 | } else if (emu->audigy) { |
1da177e4 LT |
295 | if (emu->revision == 4) /* audigy2 */ |
296 | outl(HCFG_AUDIOENABLE | | |
297 | HCFG_AC3ENABLE_CDSPDIF | | |
298 | HCFG_AC3ENABLE_GPSPDIF | | |
299 | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); | |
300 | else | |
301 | outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); | |
e0474e53 JCD |
302 | /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, |
303 | * e.g. card_capabilities->joystick */ | |
1da177e4 LT |
304 | } else if (emu->model == 0x20 || |
305 | emu->model == 0xc400 || | |
306 | (emu->model == 0x21 && emu->revision < 6)) | |
307 | outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); | |
308 | else | |
309 | // With on-chip joystick | |
310 | outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); | |
311 | ||
312 | if (enable_ir) { /* enable IR for SB Live */ | |
9f4bd5dd JCD |
313 | if (emu->card_capabilities->emu1010) { |
314 | ; /* Disable all access to A_IOCFG for the emu1010 */ | |
184c1e2c JCD |
315 | } else if (emu->card_capabilities->i2c_adc) { |
316 | ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ | |
19b99fba | 317 | } else if (emu->audigy) { |
1da177e4 LT |
318 | unsigned int reg = inl(emu->port + A_IOCFG); |
319 | outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); | |
320 | udelay(500); | |
321 | outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); | |
322 | udelay(100); | |
323 | outl(reg, emu->port + A_IOCFG); | |
324 | } else { | |
325 | unsigned int reg = inl(emu->port + HCFG); | |
326 | outl(reg | HCFG_GPOUT2, emu->port + HCFG); | |
327 | udelay(500); | |
328 | outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); | |
329 | udelay(100); | |
330 | outl(reg, emu->port + HCFG); | |
331 | } | |
332 | } | |
333 | ||
9f4bd5dd JCD |
334 | if (emu->card_capabilities->emu1010) { |
335 | ; /* Disable all access to A_IOCFG for the emu1010 */ | |
184c1e2c JCD |
336 | } else if (emu->card_capabilities->i2c_adc) { |
337 | ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ | |
19b99fba | 338 | } else if (emu->audigy) { /* enable analog output */ |
1da177e4 LT |
339 | unsigned int reg = inl(emu->port + A_IOCFG); |
340 | outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); | |
341 | } | |
342 | ||
09668b44 TI |
343 | return 0; |
344 | } | |
1da177e4 | 345 | |
09668b44 TI |
346 | static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) |
347 | { | |
1da177e4 LT |
348 | /* |
349 | * Enable the audio bit | |
350 | */ | |
351 | outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); | |
352 | ||
353 | /* Enable analog/digital outs on audigy */ | |
9f4bd5dd JCD |
354 | if (emu->card_capabilities->emu1010) { |
355 | ; /* Disable all access to A_IOCFG for the emu1010 */ | |
184c1e2c JCD |
356 | } else if (emu->card_capabilities->i2c_adc) { |
357 | ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ | |
19b99fba | 358 | } else if (emu->audigy) { |
1da177e4 LT |
359 | outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); |
360 | ||
e0474e53 | 361 | if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ |
1da177e4 LT |
362 | /* Unmute Analog now. Set GPO6 to 1 for Apollo. |
363 | * This has to be done after init ALice3 I2SOut beyond 48KHz. | |
364 | * So, sequence is important. */ | |
365 | outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); | |
e0474e53 | 366 | } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ |
1da177e4 LT |
367 | /* Unmute Analog now. */ |
368 | outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); | |
369 | } else { | |
370 | /* Disable routing from AC97 line out to Front speakers */ | |
371 | outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); | |
372 | } | |
373 | } | |
374 | ||
375 | #if 0 | |
376 | { | |
377 | unsigned int tmp; | |
378 | /* FIXME: the following routine disables LiveDrive-II !! */ | |
379 | // TOSLink detection | |
380 | emu->tos_link = 0; | |
381 | tmp = inl(emu->port + HCFG); | |
382 | if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { | |
383 | outl(tmp|0x800, emu->port + HCFG); | |
384 | udelay(50); | |
385 | if (tmp != (inl(emu->port + HCFG) & ~0x800)) { | |
386 | emu->tos_link = 1; | |
387 | outl(tmp, emu->port + HCFG); | |
388 | } | |
389 | } | |
390 | } | |
391 | #endif | |
392 | ||
393 | snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); | |
1da177e4 LT |
394 | } |
395 | ||
09668b44 | 396 | int snd_emu10k1_done(struct snd_emu10k1 * emu) |
1da177e4 LT |
397 | { |
398 | int ch; | |
399 | ||
400 | outl(0, emu->port + INTE); | |
401 | ||
402 | /* | |
403 | * Shutdown the chip | |
404 | */ | |
405 | for (ch = 0; ch < NUM_G; ch++) | |
406 | snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); | |
407 | for (ch = 0; ch < NUM_G; ch++) { | |
408 | snd_emu10k1_ptr_write(emu, VTFT, ch, 0); | |
409 | snd_emu10k1_ptr_write(emu, CVCF, ch, 0); | |
410 | snd_emu10k1_ptr_write(emu, PTRX, ch, 0); | |
411 | snd_emu10k1_ptr_write(emu, CPF, ch, 0); | |
412 | } | |
413 | ||
414 | /* reset recording buffers */ | |
415 | snd_emu10k1_ptr_write(emu, MICBS, 0, 0); | |
416 | snd_emu10k1_ptr_write(emu, MICBA, 0, 0); | |
417 | snd_emu10k1_ptr_write(emu, FXBS, 0, 0); | |
418 | snd_emu10k1_ptr_write(emu, FXBA, 0, 0); | |
419 | snd_emu10k1_ptr_write(emu, FXWC, 0, 0); | |
420 | snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); | |
421 | snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); | |
422 | snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K); | |
423 | snd_emu10k1_ptr_write(emu, TCB, 0, 0); | |
424 | if (emu->audigy) | |
425 | snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); | |
426 | else | |
427 | snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); | |
428 | ||
429 | /* disable channel interrupt */ | |
430 | snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); | |
431 | snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); | |
432 | snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); | |
433 | snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); | |
434 | ||
1da177e4 LT |
435 | /* disable audio and lock cache */ |
436 | outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); | |
437 | snd_emu10k1_ptr_write(emu, PTB, 0, 0); | |
438 | ||
1da177e4 LT |
439 | return 0; |
440 | } | |
441 | ||
442 | /************************************************************************* | |
443 | * ECARD functional implementation | |
444 | *************************************************************************/ | |
445 | ||
446 | /* In A1 Silicon, these bits are in the HC register */ | |
447 | #define HOOKN_BIT (1L << 12) | |
448 | #define HANDN_BIT (1L << 11) | |
449 | #define PULSEN_BIT (1L << 10) | |
450 | ||
451 | #define EC_GDI1 (1 << 13) | |
452 | #define EC_GDI0 (1 << 14) | |
453 | ||
454 | #define EC_NUM_CONTROL_BITS 20 | |
455 | ||
456 | #define EC_AC3_DATA_SELN 0x0001L | |
457 | #define EC_EE_DATA_SEL 0x0002L | |
458 | #define EC_EE_CNTRL_SELN 0x0004L | |
459 | #define EC_EECLK 0x0008L | |
460 | #define EC_EECS 0x0010L | |
461 | #define EC_EESDO 0x0020L | |
462 | #define EC_TRIM_CSN 0x0040L | |
463 | #define EC_TRIM_SCLK 0x0080L | |
464 | #define EC_TRIM_SDATA 0x0100L | |
465 | #define EC_TRIM_MUTEN 0x0200L | |
466 | #define EC_ADCCAL 0x0400L | |
467 | #define EC_ADCRSTN 0x0800L | |
468 | #define EC_DACCAL 0x1000L | |
469 | #define EC_DACMUTEN 0x2000L | |
470 | #define EC_LEDN 0x4000L | |
471 | ||
472 | #define EC_SPDIF0_SEL_SHIFT 15 | |
473 | #define EC_SPDIF1_SEL_SHIFT 17 | |
474 | #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) | |
475 | #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) | |
476 | #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) | |
477 | #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) | |
478 | #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should | |
479 | * be incremented any time the EEPROM's | |
480 | * format is changed. */ | |
481 | ||
482 | #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ | |
483 | ||
484 | /* Addresses for special values stored in to EEPROM */ | |
485 | #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ | |
486 | #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ | |
487 | #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ | |
488 | ||
489 | #define EC_LAST_PROMFILE_ADDR 0x2f | |
490 | ||
491 | #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The | |
492 | * can be up to 30 characters in length | |
493 | * and is stored as a NULL-terminated | |
494 | * ASCII string. Any unused bytes must be | |
495 | * filled with zeros */ | |
496 | #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ | |
497 | ||
498 | ||
499 | /* Most of this stuff is pretty self-evident. According to the hardware | |
500 | * dudes, we need to leave the ADCCAL bit low in order to avoid a DC | |
501 | * offset problem. Weird. | |
502 | */ | |
503 | #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ | |
504 | EC_TRIM_CSN) | |
505 | ||
506 | ||
507 | #define EC_DEFAULT_ADC_GAIN 0xC4C4 | |
508 | #define EC_DEFAULT_SPDIF0_SEL 0x0 | |
509 | #define EC_DEFAULT_SPDIF1_SEL 0x4 | |
510 | ||
511 | /************************************************************************** | |
512 | * @func Clock bits into the Ecard's control latch. The Ecard uses a | |
513 | * control latch will is loaded bit-serially by toggling the Modem control | |
514 | * lines from function 2 on the E8010. This function hides these details | |
515 | * and presents the illusion that we are actually writing to a distinct | |
516 | * register. | |
517 | */ | |
518 | ||
eb4698f3 | 519 | static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value) |
1da177e4 LT |
520 | { |
521 | unsigned short count; | |
522 | unsigned int data; | |
523 | unsigned long hc_port; | |
524 | unsigned int hc_value; | |
525 | ||
526 | hc_port = emu->port + HCFG; | |
527 | hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); | |
528 | outl(hc_value, hc_port); | |
529 | ||
530 | for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { | |
531 | ||
532 | /* Set up the value */ | |
533 | data = ((value & 0x1) ? PULSEN_BIT : 0); | |
534 | value >>= 1; | |
535 | ||
536 | outl(hc_value | data, hc_port); | |
537 | ||
538 | /* Clock the shift register */ | |
539 | outl(hc_value | data | HANDN_BIT, hc_port); | |
540 | outl(hc_value | data, hc_port); | |
541 | } | |
542 | ||
543 | /* Latch the bits */ | |
544 | outl(hc_value | HOOKN_BIT, hc_port); | |
545 | outl(hc_value, hc_port); | |
546 | } | |
547 | ||
548 | /************************************************************************** | |
549 | * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The | |
550 | * trim value consists of a 16bit value which is composed of two | |
551 | * 8 bit gain/trim values, one for the left channel and one for the | |
552 | * right channel. The following table maps from the Gain/Attenuation | |
553 | * value in decibels into the corresponding bit pattern for a single | |
554 | * channel. | |
555 | */ | |
556 | ||
eb4698f3 | 557 | static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu, |
1da177e4 LT |
558 | unsigned short gain) |
559 | { | |
560 | unsigned int bit; | |
561 | ||
562 | /* Enable writing to the TRIM registers */ | |
563 | snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); | |
564 | ||
565 | /* Do it again to insure that we meet hold time requirements */ | |
566 | snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); | |
567 | ||
568 | for (bit = (1 << 15); bit; bit >>= 1) { | |
569 | unsigned int value; | |
570 | ||
571 | value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); | |
572 | ||
573 | if (gain & bit) | |
574 | value |= EC_TRIM_SDATA; | |
575 | ||
576 | /* Clock the bit */ | |
577 | snd_emu10k1_ecard_write(emu, value); | |
578 | snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); | |
579 | snd_emu10k1_ecard_write(emu, value); | |
580 | } | |
581 | ||
582 | snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); | |
583 | } | |
584 | ||
f40b6890 | 585 | static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu) |
1da177e4 LT |
586 | { |
587 | unsigned int hc_value; | |
588 | ||
589 | /* Set up the initial settings */ | |
590 | emu->ecard_ctrl = EC_RAW_RUN_MODE | | |
591 | EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | | |
592 | EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); | |
593 | ||
594 | /* Step 0: Set the codec type in the hardware control register | |
595 | * and enable audio output */ | |
596 | hc_value = inl(emu->port + HCFG); | |
597 | outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); | |
598 | inl(emu->port + HCFG); | |
599 | ||
600 | /* Step 1: Turn off the led and deassert TRIM_CS */ | |
601 | snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); | |
602 | ||
603 | /* Step 2: Calibrate the ADC and DAC */ | |
604 | snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); | |
605 | ||
606 | /* Step 3: Wait for awhile; XXX We can't get away with this | |
607 | * under a real operating system; we'll need to block and wait that | |
608 | * way. */ | |
609 | snd_emu10k1_wait(emu, 48000); | |
610 | ||
611 | /* Step 4: Switch off the DAC and ADC calibration. Note | |
612 | * That ADC_CAL is actually an inverted signal, so we assert | |
613 | * it here to stop calibration. */ | |
614 | snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); | |
615 | ||
616 | /* Step 4: Switch into run mode */ | |
617 | snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); | |
618 | ||
619 | /* Step 5: Set the analog input gain */ | |
620 | snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); | |
621 | ||
622 | return 0; | |
623 | } | |
624 | ||
f40b6890 | 625 | static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu) |
d83c671f JCD |
626 | { |
627 | unsigned long special_port; | |
628 | unsigned int value; | |
629 | ||
630 | /* Special initialisation routine | |
631 | * before the rest of the IO-Ports become active. | |
632 | */ | |
633 | special_port = emu->port + 0x38; | |
634 | value = inl(special_port); | |
635 | outl(0x00d00000, special_port); | |
636 | value = inl(special_port); | |
637 | outl(0x00d00001, special_port); | |
638 | value = inl(special_port); | |
639 | outl(0x00d0005f, special_port); | |
640 | value = inl(special_port); | |
641 | outl(0x00d0007f, special_port); | |
642 | value = inl(special_port); | |
643 | outl(0x0090007f, special_port); | |
644 | value = inl(special_port); | |
645 | ||
e2b15f8f | 646 | snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ |
d83c671f JCD |
647 | return 0; |
648 | } | |
649 | ||
9f4bd5dd | 650 | static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename) |
19b99fba | 651 | { |
9f4bd5dd JCD |
652 | int err; |
653 | int n, i; | |
654 | int reg; | |
655 | int value; | |
656 | const struct firmware *fw_entry; | |
657 | ||
658 | if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) { | |
659 | snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err); | |
660 | return err; | |
661 | } | |
bbb53551 | 662 | snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size); |
9f4bd5dd JCD |
663 | if (fw_entry->size != 0x133a4) { |
664 | snd_printk(KERN_ERR "firmware: %s wrong size.\n",filename); | |
665 | return -EINVAL; | |
666 | } | |
19b99fba | 667 | |
9f4bd5dd JCD |
668 | /* The FPGA is a Xilinx Spartan IIE XC2S50E */ |
669 | /* GPIO7 -> FPGA PGMN | |
670 | * GPIO6 -> FPGA CCLK | |
671 | * GPIO5 -> FPGA DIN | |
672 | * FPGA CONFIG OFF -> FPGA PGMN | |
673 | */ | |
674 | outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */ | |
675 | udelay(1); | |
676 | outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */ | |
677 | udelay(100); /* Allow FPGA memory to clean */ | |
678 | for(n = 0; n < fw_entry->size; n++) { | |
679 | value=fw_entry->data[n]; | |
680 | for(i = 0; i < 8; i++) { | |
681 | reg = 0x80; | |
682 | if (value & 0x1) | |
683 | reg = reg | 0x20; | |
684 | value = value >> 1; | |
685 | outl(reg, emu->port + A_IOCFG); | |
686 | outl(reg | 0x40, emu->port + A_IOCFG); | |
687 | } | |
688 | } | |
689 | /* After programming, set GPIO bit 4 high again. */ | |
690 | outl(0x10, emu->port + A_IOCFG); | |
691 | ||
19b99fba | 692 | |
9f4bd5dd | 693 | release_firmware(fw_entry); |
19b99fba JCD |
694 | return 0; |
695 | } | |
696 | ||
9f4bd5dd | 697 | static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu) |
19b99fba JCD |
698 | { |
699 | unsigned int i; | |
9f4bd5dd JCD |
700 | int tmp,tmp2; |
701 | int reg; | |
702 | int err; | |
9f4bd5dd JCD |
703 | |
704 | snd_printk(KERN_INFO "emu1010: Special config.\n"); | |
705 | /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, | |
706 | * Lock Sound Memory Cache, Lock Tank Memory Cache, | |
707 | * Mute all codecs. | |
708 | */ | |
19b99fba | 709 | outl(0x0005a00c, emu->port + HCFG); |
9f4bd5dd JCD |
710 | /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, |
711 | * Lock Tank Memory Cache, | |
712 | * Mute all codecs. | |
713 | */ | |
714 | outl(0x0005a004, emu->port + HCFG); | |
715 | /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, | |
716 | * Mute all codecs. | |
717 | */ | |
19b99fba | 718 | outl(0x0005a000, emu->port + HCFG); |
9f4bd5dd JCD |
719 | /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, |
720 | * Mute all codecs. | |
721 | */ | |
19b99fba JCD |
722 | outl(0x0005a000, emu->port + HCFG); |
723 | ||
9f4bd5dd JCD |
724 | /* Disable 48Volt power to Audio Dock */ |
725 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 ); | |
726 | ||
727 | /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ | |
728 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® ); | |
729 | snd_printdd("reg1=0x%x\n",reg); | |
730 | if (reg == 0x55) { | |
731 | /* FPGA netlist already present so clear it */ | |
732 | /* Return to programming mode */ | |
733 | ||
734 | snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02 ); | |
19b99fba | 735 | } |
9f4bd5dd JCD |
736 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® ); |
737 | snd_printdd("reg2=0x%x\n",reg); | |
738 | if (reg == 0x55) { | |
739 | /* FPGA failed to return to programming mode */ | |
740 | return -ENODEV; | |
19b99fba | 741 | } |
9f4bd5dd | 742 | snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg); |
7e0af29d CL |
743 | if ((err = snd_emu1010_load_firmware(emu, HANA_FILENAME)) != 0) { |
744 | snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file %s failed\n", HANA_FILENAME); | |
9f4bd5dd | 745 | return err; |
19b99fba | 746 | } |
9f4bd5dd JCD |
747 | |
748 | /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ | |
749 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® ); | |
750 | if (reg != 0x55) { | |
751 | /* FPGA failed to be programmed */ | |
752 | snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg); | |
753 | return -ENODEV; | |
19b99fba | 754 | } |
19b99fba | 755 | |
9f4bd5dd JCD |
756 | snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n"); |
757 | snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp ); | |
758 | snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 ); | |
759 | snd_printk("Hana ver:%d.%d\n",tmp ,tmp2); | |
760 | /* Enable 48Volt power to Audio Dock */ | |
761 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON ); | |
762 | ||
763 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); | |
764 | snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg); | |
765 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); | |
766 | snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg); | |
767 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp ); | |
768 | /* ADAT input. */ | |
769 | snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x01 ); | |
9148cc50 | 770 | snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp ); |
9f4bd5dd | 771 | /* Set no attenuation on Audio Dock pads. */ |
9148cc50 JCD |
772 | snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 ); |
773 | emu->emu1010.adc_pads = 0x00; | |
9f4bd5dd JCD |
774 | snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp ); |
775 | /* Unmute Audio dock DACs, Headphone source DAC-4. */ | |
776 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 ); | |
777 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 ); | |
9148cc50 JCD |
778 | snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp ); |
779 | /* DAC PADs. */ | |
780 | snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f ); | |
781 | emu->emu1010.dac_pads = 0x0f; | |
9f4bd5dd JCD |
782 | snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp ); |
783 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 ); | |
784 | snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp ); | |
785 | /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ | |
786 | snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); | |
787 | /* MIDI routing */ | |
9148cc50 | 788 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); |
9f4bd5dd | 789 | /* Unknown. */ |
9148cc50 | 790 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); |
9f4bd5dd JCD |
791 | /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */ |
792 | /* IRQ Enable: All off */ | |
793 | snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 ); | |
794 | ||
795 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); | |
796 | snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg); | |
797 | /* Default WCLK set to 48kHz. */ | |
798 | snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 ); | |
799 | /* Word Clock source, Internal 48kHz x1 */ | |
800 | snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K ); | |
801 | //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X ); | |
802 | /* Audio Dock LEDs. */ | |
803 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 ); | |
19b99fba | 804 | |
9f4bd5dd JCD |
805 | #if 0 |
806 | /* For 96kHz */ | |
807 | snd_emu1010_fpga_link_dst_src_write(emu, | |
808 | EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1); | |
809 | snd_emu1010_fpga_link_dst_src_write(emu, | |
810 | EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1); | |
811 | snd_emu1010_fpga_link_dst_src_write(emu, | |
812 | EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2); | |
813 | snd_emu1010_fpga_link_dst_src_write(emu, | |
814 | EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2); | |
815 | #endif | |
816 | #if 0 | |
817 | /* For 192kHz */ | |
818 | snd_emu1010_fpga_link_dst_src_write(emu, | |
819 | EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1); | |
820 | snd_emu1010_fpga_link_dst_src_write(emu, | |
821 | EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1); | |
822 | snd_emu1010_fpga_link_dst_src_write(emu, | |
823 | EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2); | |
824 | snd_emu1010_fpga_link_dst_src_write(emu, | |
825 | EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2); | |
826 | snd_emu1010_fpga_link_dst_src_write(emu, | |
827 | EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3); | |
828 | snd_emu1010_fpga_link_dst_src_write(emu, | |
829 | EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3); | |
830 | snd_emu1010_fpga_link_dst_src_write(emu, | |
831 | EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4); | |
832 | snd_emu1010_fpga_link_dst_src_write(emu, | |
833 | EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4); | |
834 | #endif | |
835 | #if 1 | |
836 | /* For 48kHz */ | |
837 | snd_emu1010_fpga_link_dst_src_write(emu, | |
838 | EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1); | |
839 | snd_emu1010_fpga_link_dst_src_write(emu, | |
840 | EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1); | |
841 | snd_emu1010_fpga_link_dst_src_write(emu, | |
842 | EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2); | |
843 | snd_emu1010_fpga_link_dst_src_write(emu, | |
844 | EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2); | |
845 | snd_emu1010_fpga_link_dst_src_write(emu, | |
846 | EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1); | |
847 | snd_emu1010_fpga_link_dst_src_write(emu, | |
848 | EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1); | |
849 | snd_emu1010_fpga_link_dst_src_write(emu, | |
850 | EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1); | |
851 | snd_emu1010_fpga_link_dst_src_write(emu, | |
852 | EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1); | |
853 | #endif | |
854 | #if 0 | |
855 | /* Original */ | |
856 | snd_emu1010_fpga_link_dst_src_write(emu, | |
857 | EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT); | |
858 | snd_emu1010_fpga_link_dst_src_write(emu, | |
859 | EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1); | |
860 | snd_emu1010_fpga_link_dst_src_write(emu, | |
861 | EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2); | |
862 | snd_emu1010_fpga_link_dst_src_write(emu, | |
863 | EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3); | |
864 | snd_emu1010_fpga_link_dst_src_write(emu, | |
865 | EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4); | |
866 | snd_emu1010_fpga_link_dst_src_write(emu, | |
867 | EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5); | |
868 | snd_emu1010_fpga_link_dst_src_write(emu, | |
869 | EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6); | |
870 | snd_emu1010_fpga_link_dst_src_write(emu, | |
871 | EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7); | |
872 | snd_emu1010_fpga_link_dst_src_write(emu, | |
873 | EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1); | |
874 | snd_emu1010_fpga_link_dst_src_write(emu, | |
875 | EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1); | |
876 | snd_emu1010_fpga_link_dst_src_write(emu, | |
877 | EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2); | |
878 | snd_emu1010_fpga_link_dst_src_write(emu, | |
879 | EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2); | |
880 | #endif | |
881 | for (i = 0;i < 0x20; i++ ) { | |
882 | /* AudioDock Elink <- Silence */ | |
883 | snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE); | |
884 | } | |
885 | for (i = 0;i < 4; i++) { | |
886 | /* Hana SPDIF Out <- Silence */ | |
887 | snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE); | |
888 | } | |
889 | for (i = 0;i < 7; i++) { | |
890 | /* Hamoa DAC <- Silence */ | |
891 | snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE); | |
892 | } | |
893 | for (i = 0;i < 7; i++) { | |
894 | /* Hana ADAT Out <- Silence */ | |
895 | snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE); | |
896 | } | |
897 | snd_emu1010_fpga_link_dst_src_write(emu, | |
898 | EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1); | |
899 | snd_emu1010_fpga_link_dst_src_write(emu, | |
900 | EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1); | |
901 | snd_emu1010_fpga_link_dst_src_write(emu, | |
902 | EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1); | |
903 | snd_emu1010_fpga_link_dst_src_write(emu, | |
904 | EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1); | |
905 | snd_emu1010_fpga_link_dst_src_write(emu, | |
906 | EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1); | |
907 | snd_emu1010_fpga_link_dst_src_write(emu, | |
908 | EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1); | |
909 | snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all | |
910 | ||
911 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp ); | |
912 | ||
913 | /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave, | |
914 | * Lock Sound Memory Cache, Lock Tank Memory Cache, | |
915 | * Mute all codecs. | |
916 | */ | |
917 | outl(0x0000a000, emu->port + HCFG); | |
918 | /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave, | |
919 | * Lock Sound Memory Cache, Lock Tank Memory Cache, | |
920 | * Un-Mute all codecs. | |
921 | */ | |
19b99fba | 922 | outl(0x0000a001, emu->port + HCFG); |
9f4bd5dd | 923 | |
19b99fba JCD |
924 | /* Initial boot complete. Now patches */ |
925 | ||
9f4bd5dd | 926 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp ); |
9148cc50 JCD |
927 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */ |
928 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */ | |
929 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */ | |
930 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */ | |
9f4bd5dd JCD |
931 | snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp ); |
932 | snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif (or 0x11 for aes/ebu) */ | |
933 | ||
934 | /* Delay to allow Audio Dock to settle */ | |
935 | msleep(100); | |
936 | snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */ | |
937 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); /* OPTIONS: Which cards are attached to the EMU */ | |
938 | /* FIXME: The loading of this should be able to happen any time, | |
939 | * as the user can plug/unplug it at any time | |
940 | */ | |
941 | if (reg & (EMU_HANA_OPTION_DOCK_ONLINE | EMU_HANA_OPTION_DOCK_OFFLINE) ) { | |
942 | /* Audio Dock attached */ | |
943 | /* Return to Audio Dock programming mode */ | |
944 | snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n"); | |
945 | snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK ); | |
7e0af29d | 946 | if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) { |
9f4bd5dd JCD |
947 | return err; |
948 | } | |
9f4bd5dd JCD |
949 | snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0 ); |
950 | snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ® ); | |
951 | snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg); | |
952 | /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ | |
953 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® ); | |
954 | snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg); | |
955 | if (reg != 0x55) { | |
956 | /* FPGA failed to be programmed */ | |
957 | snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg); | |
958 | return 0; | |
959 | return -ENODEV; | |
960 | } | |
9148cc50 JCD |
961 | snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n"); |
962 | snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp ); | |
963 | snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 ); | |
964 | snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2); | |
9f4bd5dd JCD |
965 | } |
966 | #if 0 | |
967 | snd_emu1010_fpga_link_dst_src_write(emu, | |
968 | EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */ | |
969 | snd_emu1010_fpga_link_dst_src_write(emu, | |
970 | EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */ | |
971 | snd_emu1010_fpga_link_dst_src_write(emu, | |
972 | EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */ | |
973 | snd_emu1010_fpga_link_dst_src_write(emu, | |
974 | EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */ | |
975 | #endif | |
976 | /* Default outputs */ | |
977 | snd_emu1010_fpga_link_dst_src_write(emu, | |
978 | EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | |
979 | emu->emu1010.output_source[0] = 21; | |
980 | snd_emu1010_fpga_link_dst_src_write(emu, | |
981 | EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
982 | emu->emu1010.output_source[1] = 22; | |
983 | snd_emu1010_fpga_link_dst_src_write(emu, | |
984 | EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); | |
985 | emu->emu1010.output_source[2] = 23; | |
986 | snd_emu1010_fpga_link_dst_src_write(emu, | |
987 | EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); | |
988 | emu->emu1010.output_source[3] = 24; | |
989 | snd_emu1010_fpga_link_dst_src_write(emu, | |
990 | EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); | |
991 | emu->emu1010.output_source[4] = 25; | |
992 | snd_emu1010_fpga_link_dst_src_write(emu, | |
993 | EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); | |
994 | emu->emu1010.output_source[5] = 26; | |
995 | snd_emu1010_fpga_link_dst_src_write(emu, | |
996 | EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6); | |
997 | emu->emu1010.output_source[6] = 27; | |
998 | snd_emu1010_fpga_link_dst_src_write(emu, | |
999 | EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7); | |
1000 | emu->emu1010.output_source[7] = 28; | |
1001 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1002 | EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | |
1003 | emu->emu1010.output_source[8] = 21; | |
1004 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1005 | EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
1006 | emu->emu1010.output_source[9] = 22; | |
1007 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1008 | EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | |
1009 | emu->emu1010.output_source[10] = 21; | |
1010 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1011 | EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
1012 | emu->emu1010.output_source[11] = 22; | |
1013 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1014 | EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | |
1015 | emu->emu1010.output_source[12] = 21; | |
1016 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1017 | EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
1018 | emu->emu1010.output_source[13] = 22; | |
1019 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1020 | EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | |
1021 | emu->emu1010.output_source[14] = 21; | |
1022 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1023 | EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
1024 | emu->emu1010.output_source[15] = 22; | |
1025 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1026 | EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | |
1027 | emu->emu1010.output_source[16] = 21; | |
1028 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1029 | EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1); | |
1030 | emu->emu1010.output_source[17] = 22; | |
1031 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1032 | EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2); | |
1033 | emu->emu1010.output_source[18] = 23; | |
1034 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1035 | EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3); | |
1036 | emu->emu1010.output_source[19] = 24; | |
1037 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1038 | EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4); | |
1039 | emu->emu1010.output_source[20] = 25; | |
1040 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1041 | EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5); | |
1042 | emu->emu1010.output_source[21] = 26; | |
1043 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1044 | EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6); | |
1045 | emu->emu1010.output_source[22] = 27; | |
1046 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1047 | EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7); | |
1048 | emu->emu1010.output_source[23] = 28; | |
1049 | ||
1050 | /* TEMP: Select SPDIF in/out */ | |
1051 | snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */ | |
1052 | ||
1053 | /* TEMP: Select 48kHz SPDIF out */ | |
1054 | snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */ | |
1055 | snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */ | |
1056 | /* Word Clock source, Internal 48kHz x1 */ | |
1057 | snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K ); | |
1058 | //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X ); | |
b0dbdaea | 1059 | emu->emu1010.internal_clock = 1; /* 48000 */ |
9f4bd5dd JCD |
1060 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */ |
1061 | snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */ | |
1062 | //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */ | |
1063 | //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */ | |
1064 | //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */ | |
19b99fba JCD |
1065 | |
1066 | return 0; | |
1067 | } | |
1da177e4 LT |
1068 | /* |
1069 | * Create the EMU10K1 instance | |
1070 | */ | |
1071 | ||
09668b44 TI |
1072 | #ifdef CONFIG_PM |
1073 | static int alloc_pm_buffer(struct snd_emu10k1 *emu); | |
1074 | static void free_pm_buffer(struct snd_emu10k1 *emu); | |
1075 | #endif | |
1076 | ||
eb4698f3 | 1077 | static int snd_emu10k1_free(struct snd_emu10k1 *emu) |
1da177e4 LT |
1078 | { |
1079 | if (emu->port) { /* avoid access to already used hardware */ | |
1080 | snd_emu10k1_fx8010_tram_setup(emu, 0); | |
1081 | snd_emu10k1_done(emu); | |
09668b44 TI |
1082 | /* remove reserved page */ |
1083 | if (emu->reserved_page) { | |
1084 | snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page); | |
1085 | emu->reserved_page = NULL; | |
1086 | } | |
1087 | snd_emu10k1_free_efx(emu); | |
1da177e4 | 1088 | } |
9f4bd5dd JCD |
1089 | if (emu->card_capabilities->emu1010) { |
1090 | /* Disable 48Volt power to Audio Dock */ | |
1091 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 ); | |
1092 | } | |
1da177e4 LT |
1093 | if (emu->memhdr) |
1094 | snd_util_memhdr_free(emu->memhdr); | |
1095 | if (emu->silent_page.area) | |
1096 | snd_dma_free_pages(&emu->silent_page); | |
1097 | if (emu->ptb_pages.area) | |
1098 | snd_dma_free_pages(&emu->ptb_pages); | |
1099 | vfree(emu->page_ptr_table); | |
1100 | vfree(emu->page_addr_table); | |
09668b44 TI |
1101 | #ifdef CONFIG_PM |
1102 | free_pm_buffer(emu); | |
1103 | #endif | |
1da177e4 | 1104 | if (emu->irq >= 0) |
437a5a46 | 1105 | free_irq(emu->irq, emu); |
1da177e4 LT |
1106 | if (emu->port) |
1107 | pci_release_regions(emu->pci); | |
2b637da5 | 1108 | if (emu->card_capabilities->ca0151_chip) /* P16V */ |
1da177e4 | 1109 | snd_p16v_free(emu); |
09668b44 | 1110 | pci_disable_device(emu->pci); |
1da177e4 LT |
1111 | kfree(emu); |
1112 | return 0; | |
1113 | } | |
1114 | ||
eb4698f3 | 1115 | static int snd_emu10k1_dev_free(struct snd_device *device) |
1da177e4 | 1116 | { |
eb4698f3 | 1117 | struct snd_emu10k1 *emu = device->device_data; |
1da177e4 LT |
1118 | return snd_emu10k1_free(emu); |
1119 | } | |
1120 | ||
eb4698f3 | 1121 | static struct snd_emu_chip_details emu_chip_details[] = { |
1da177e4 | 1122 | /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/ |
88dc0e5d | 1123 | /* Tested by James@superbug.co.uk 3rd July 2005 */ |
54efc96d JCD |
1124 | /* DSP: CA0108-IAT |
1125 | * DAC: CS4382-KQ | |
1126 | * ADC: Philips 1361T | |
1127 | * AC97: STAC9750 | |
1128 | * CA0151: None | |
1129 | */ | |
1da177e4 LT |
1130 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, |
1131 | .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]", | |
aec72e0a | 1132 | .id = "Audigy2", |
1da177e4 LT |
1133 | .emu10k2_chip = 1, |
1134 | .ca0108_chip = 1, | |
2668907a PZ |
1135 | .spk71 = 1, |
1136 | .ac97_chip = 1} , | |
21fdddea JCD |
1137 | /* Audigy4 (Not PRO) SB0610 */ |
1138 | /* Tested by James@superbug.co.uk 4th April 2006 */ | |
1139 | /* A_IOCFG bits | |
1140 | * Output | |
1141 | * 0: ? | |
1142 | * 1: ? | |
1143 | * 2: ? | |
1144 | * 3: 0 - Digital Out, 1 - Line in | |
1145 | * 4: ? | |
1146 | * 5: ? | |
1147 | * 6: ? | |
1148 | * 7: ? | |
1149 | * Input | |
1150 | * 8: ? | |
1151 | * 9: ? | |
1152 | * A: Green jack sense (Front) | |
1153 | * B: ? | |
1154 | * C: Black jack sense (Rear/Side Right) | |
1155 | * D: Yellow jack sense (Center/LFE/Side Left) | |
1156 | * E: ? | |
1157 | * F: ? | |
1158 | * | |
1159 | * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) | |
1160 | * 0 - Digital Out | |
1161 | * 1 - Line in | |
1162 | */ | |
1163 | /* Mic input not tested. | |
1164 | * Analog CD input not tested | |
1165 | * Digital Out not tested. | |
1166 | * Line in working. | |
1167 | * Audio output 5.1 working. Side outputs not working. | |
1168 | */ | |
1169 | /* DSP: CA10300-IAT LF | |
1170 | * DAC: Cirrus Logic CS4382-KQZ | |
1171 | * ADC: Philips 1361T | |
1172 | * AC97: Sigmatel STAC9750 | |
1173 | * CA0151: None | |
1174 | */ | |
1175 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, | |
1176 | .driver = "Audigy2", .name = "Audigy 4 [SB0610]", | |
1177 | .id = "Audigy2", | |
1178 | .emu10k2_chip = 1, | |
1179 | .ca0108_chip = 1, | |
1180 | .spk71 = 1, | |
1181 | .adc_1361t = 1, /* 24 bit capture instead of 16bit */ | |
1182 | .ac97_chip = 1} , | |
d83c671f | 1183 | /* Audigy 2 ZS Notebook Cardbus card.*/ |
184c1e2c | 1184 | /* Tested by James@superbug.co.uk 6th November 2006 */ |
f951fd3c JCD |
1185 | /* Audio output 7.1/Headphones working. |
1186 | * Digital output working. (AC3 not checked, only PCM) | |
184c1e2c JCD |
1187 | * Audio Mic/Line inputs working. |
1188 | * Digital input not tested. | |
f951fd3c | 1189 | */ |
21fdddea | 1190 | /* DSP: Tina2 |
f951fd3c JCD |
1191 | * DAC: Wolfson WM8768/WM8568 |
1192 | * ADC: Wolfson WM8775 | |
1193 | * AC97: None | |
1194 | * CA0151: None | |
1195 | */ | |
184c1e2c JCD |
1196 | /* Tested by James@superbug.co.uk 4th April 2006 */ |
1197 | /* A_IOCFG bits | |
1198 | * Output | |
1199 | * 0: Not Used | |
1200 | * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. | |
1201 | * 2: Analog input 0 = line in, 1 = mic in | |
1202 | * 3: Not Used | |
1203 | * 4: Digital output 0 = off, 1 = on. | |
1204 | * 5: Not Used | |
1205 | * 6: Not Used | |
1206 | * 7: Not Used | |
1207 | * Input | |
1208 | * All bits 1 (0x3fxx) means nothing plugged in. | |
1209 | * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. | |
1210 | * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. | |
1211 | * C-D: 2 = Front/Rear/etc, 3 = nothing. | |
1212 | * E-F: Always 0 | |
1213 | * | |
1214 | */ | |
d83c671f JCD |
1215 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, |
1216 | .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]", | |
1217 | .id = "Audigy2", | |
1218 | .emu10k2_chip = 1, | |
1219 | .ca0108_chip = 1, | |
1220 | .ca_cardbus_chip = 1, | |
27fe864e | 1221 | .spi_dac = 1, |
184c1e2c | 1222 | .i2c_adc = 1, |
d83c671f | 1223 | .spk71 = 1} , |
82c8c741 JCD |
1224 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, |
1225 | .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]", | |
1226 | .id = "EMU1010", | |
1227 | .emu10k2_chip = 1, | |
1228 | .ca0108_chip = 1, | |
1229 | .ca_cardbus_chip = 1, | |
1230 | .spi_dac = 1, | |
1231 | .i2c_adc = 1, | |
1232 | .spk71 = 1} , | |
1da177e4 LT |
1233 | {.vendor = 0x1102, .device = 0x0008, |
1234 | .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]", | |
aec72e0a | 1235 | .id = "Audigy2", |
1da177e4 | 1236 | .emu10k2_chip = 1, |
2668907a PZ |
1237 | .ca0108_chip = 1, |
1238 | .ac97_chip = 1} , | |
7c1d549a JCD |
1239 | /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */ |
1240 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, | |
9f4bd5dd JCD |
1241 | .driver = "Audigy2", .name = "E-mu 1010 [4001]", |
1242 | .id = "EMU1010", | |
7c1d549a JCD |
1243 | .emu10k2_chip = 1, |
1244 | .ca0102_chip = 1, | |
9f4bd5dd JCD |
1245 | .spk71 = 1, |
1246 | .emu1010 = 1} , | |
88dc0e5d | 1247 | /* Tested by James@superbug.co.uk 3rd July 2005 */ |
1da177e4 LT |
1248 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, |
1249 | .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]", | |
aec72e0a | 1250 | .id = "Audigy2", |
1da177e4 LT |
1251 | .emu10k2_chip = 1, |
1252 | .ca0102_chip = 1, | |
1253 | .ca0151_chip = 1, | |
1254 | .spk71 = 1, | |
1255 | .spdif_bug = 1, | |
1256 | .ac97_chip = 1} , | |
f6f8bb64 | 1257 | /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ |
5b0e4985 JCD |
1258 | /* The 0x20061102 does have SB0350 written on it |
1259 | * Just like 0x20021102 | |
1260 | */ | |
f6f8bb64 | 1261 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, |
5b0e4985 | 1262 | .driver = "Audigy2", .name = "Audigy 2 [SB0350b]", |
f6f8bb64 LR |
1263 | .id = "Audigy2", |
1264 | .emu10k2_chip = 1, | |
1265 | .ca0102_chip = 1, | |
1266 | .ca0151_chip = 1, | |
1267 | .spk71 = 1, | |
1268 | .spdif_bug = 1, | |
1269 | .ac97_chip = 1} , | |
1da177e4 LT |
1270 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, |
1271 | .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]", | |
aec72e0a | 1272 | .id = "Audigy2", |
1da177e4 LT |
1273 | .emu10k2_chip = 1, |
1274 | .ca0102_chip = 1, | |
1275 | .ca0151_chip = 1, | |
1276 | .spk71 = 1, | |
1277 | .spdif_bug = 1, | |
1278 | .ac97_chip = 1} , | |
1279 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, | |
1280 | .driver = "Audigy2", .name = "Audigy 2 ZS [2001]", | |
aec72e0a | 1281 | .id = "Audigy2", |
1da177e4 LT |
1282 | .emu10k2_chip = 1, |
1283 | .ca0102_chip = 1, | |
1284 | .ca0151_chip = 1, | |
1285 | .spk71 = 1, | |
1286 | .spdif_bug = 1, | |
1287 | .ac97_chip = 1} , | |
54efc96d JCD |
1288 | /* Audigy 2 */ |
1289 | /* Tested by James@superbug.co.uk 3rd July 2005 */ | |
1290 | /* DSP: CA0102-IAT | |
1291 | * DAC: CS4382-KQ | |
1292 | * ADC: Philips 1361T | |
1293 | * AC97: STAC9721 | |
1294 | * CA0151: Yes | |
1295 | */ | |
1da177e4 LT |
1296 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, |
1297 | .driver = "Audigy2", .name = "Audigy 2 [SB0240]", | |
aec72e0a | 1298 | .id = "Audigy2", |
1da177e4 LT |
1299 | .emu10k2_chip = 1, |
1300 | .ca0102_chip = 1, | |
1301 | .ca0151_chip = 1, | |
1302 | .spk71 = 1, | |
1303 | .spdif_bug = 1, | |
11b3a755 | 1304 | .adc_1361t = 1, /* 24 bit capture instead of 16bit */ |
1da177e4 LT |
1305 | .ac97_chip = 1} , |
1306 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, | |
1307 | .driver = "Audigy2", .name = "Audigy 2 EX [1005]", | |
aec72e0a | 1308 | .id = "Audigy2", |
1da177e4 LT |
1309 | .emu10k2_chip = 1, |
1310 | .ca0102_chip = 1, | |
1311 | .ca0151_chip = 1, | |
2f020aa7 | 1312 | .spk71 = 1, |
1da177e4 | 1313 | .spdif_bug = 1} , |
264f9577 JCD |
1314 | /* Dell OEM/Creative Labs Audigy 2 ZS */ |
1315 | /* See ALSA bug#1365 */ | |
1316 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, | |
1317 | .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]", | |
1318 | .id = "Audigy2", | |
1319 | .emu10k2_chip = 1, | |
1320 | .ca0102_chip = 1, | |
1321 | .ca0151_chip = 1, | |
1322 | .spk71 = 1, | |
1323 | .spdif_bug = 1, | |
1324 | .ac97_chip = 1} , | |
1da177e4 LT |
1325 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, |
1326 | .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]", | |
aec72e0a | 1327 | .id = "Audigy2", |
1da177e4 LT |
1328 | .emu10k2_chip = 1, |
1329 | .ca0102_chip = 1, | |
1330 | .ca0151_chip = 1, | |
1331 | .spk71 = 1, | |
1332 | .spdif_bug = 1, | |
3271b7b2 | 1333 | .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ |
1da177e4 | 1334 | .ac97_chip = 1} , |
bdaed502 TI |
1335 | {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, |
1336 | .driver = "Audigy2", .name = "Audigy 2 [Unknown]", | |
1337 | .id = "Audigy2", | |
1338 | .emu10k2_chip = 1, | |
1339 | .ca0102_chip = 1, | |
1340 | .ca0151_chip = 1, | |
1341 | .spdif_bug = 1, | |
1342 | .ac97_chip = 1} , | |
ae3a72d8 JCD |
1343 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, |
1344 | .driver = "Audigy", .name = "Audigy 1 [SB0090]", | |
aec72e0a | 1345 | .id = "Audigy", |
56f5ceed JCD |
1346 | .emu10k2_chip = 1, |
1347 | .ca0102_chip = 1, | |
2668907a | 1348 | .ac97_chip = 1} , |
ae3a72d8 JCD |
1349 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, |
1350 | .driver = "Audigy", .name = "Audigy 1 ES [SB0160]", | |
2668907a PZ |
1351 | .id = "Audigy", |
1352 | .emu10k2_chip = 1, | |
1353 | .ca0102_chip = 1, | |
ae3a72d8 | 1354 | .spdif_bug = 1, |
2668907a | 1355 | .ac97_chip = 1} , |
a6c17ec8 AP |
1356 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, |
1357 | .driver = "Audigy", .name = "Audigy 1 [SB0090]", | |
1358 | .id = "Audigy", | |
1359 | .emu10k2_chip = 1, | |
1360 | .ca0102_chip = 1, | |
1361 | .ac97_chip = 1} , | |
1da177e4 | 1362 | {.vendor = 0x1102, .device = 0x0004, |
bdaed502 | 1363 | .driver = "Audigy", .name = "Audigy 1 [Unknown]", |
aec72e0a | 1364 | .id = "Audigy", |
1da177e4 LT |
1365 | .emu10k2_chip = 1, |
1366 | .ca0102_chip = 1, | |
2668907a | 1367 | .ac97_chip = 1} , |
a6f6192b JCD |
1368 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102, |
1369 | .driver = "EMU10K1", .name = "SBLive! [SB0105]", | |
f7de9cfd MM |
1370 | .id = "Live", |
1371 | .emu10k1_chip = 1, | |
1372 | .ac97_chip = 1, | |
1373 | .sblive51 = 1} , | |
a6f6192b JCD |
1374 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102, |
1375 | .driver = "EMU10K1", .name = "SBLive! Value [SB0103]", | |
aec72e0a | 1376 | .id = "Live", |
1da177e4 | 1377 | .emu10k1_chip = 1, |
2b637da5 LR |
1378 | .ac97_chip = 1, |
1379 | .sblive51 = 1} , | |
a6f6192b JCD |
1380 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, |
1381 | .driver = "EMU10K1", .name = "SBLive! Value [SB0101]", | |
2b6b22f3 JCD |
1382 | .id = "Live", |
1383 | .emu10k1_chip = 1, | |
1384 | .ac97_chip = 1, | |
1385 | .sblive51 = 1} , | |
0ba656d0 JCD |
1386 | /* Tested by ALSA bug#1680 26th December 2005 */ |
1387 | /* note: It really has SB0220 written on the card. */ | |
1388 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, | |
1389 | .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]", | |
1390 | .id = "Live", | |
1391 | .emu10k1_chip = 1, | |
1392 | .ac97_chip = 1, | |
1393 | .sblive51 = 1} , | |
c6c0b841 LR |
1394 | /* Tested by Thomas Zehetbauer 27th Aug 2005 */ |
1395 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, | |
1396 | .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]", | |
1397 | .id = "Live", | |
1398 | .emu10k1_chip = 1, | |
1399 | .ac97_chip = 1, | |
1400 | .sblive51 = 1} , | |
a8ee7295 GT |
1401 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, |
1402 | .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]", | |
1403 | .id = "Live", | |
1404 | .emu10k1_chip = 1, | |
1405 | .ac97_chip = 1, | |
1406 | .sblive51 = 1} , | |
a6f6192b JCD |
1407 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, |
1408 | .driver = "EMU10K1", .name = "SB Live 5.1", | |
2b6b22f3 JCD |
1409 | .id = "Live", |
1410 | .emu10k1_chip = 1, | |
1411 | .ac97_chip = 1, | |
1412 | .sblive51 = 1} , | |
afe0f1f6 | 1413 | /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ |
a6f6192b | 1414 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, |
f12aa40c | 1415 | .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]", |
2b6b22f3 JCD |
1416 | .id = "Live", |
1417 | .emu10k1_chip = 1, | |
f12aa40c TI |
1418 | .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum |
1419 | * share the same IDs! | |
1420 | */ | |
2b6b22f3 | 1421 | .sblive51 = 1} , |
a6f6192b JCD |
1422 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, |
1423 | .driver = "EMU10K1", .name = "SBLive! Value [CT4850]", | |
2b6b22f3 JCD |
1424 | .id = "Live", |
1425 | .emu10k1_chip = 1, | |
1426 | .ac97_chip = 1, | |
1427 | .sblive51 = 1} , | |
a6f6192b JCD |
1428 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, |
1429 | .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]", | |
1430 | .id = "Live", | |
1431 | .emu10k1_chip = 1, | |
1432 | .ac97_chip = 1} , | |
1433 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, | |
1434 | .driver = "EMU10K1", .name = "SBLive! Value [CT4871]", | |
2b6b22f3 JCD |
1435 | .id = "Live", |
1436 | .emu10k1_chip = 1, | |
1437 | .ac97_chip = 1, | |
1438 | .sblive51 = 1} , | |
1439 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, | |
1440 | .driver = "EMU10K1", .name = "SBLive! Value [CT4831]", | |
1441 | .id = "Live", | |
1442 | .emu10k1_chip = 1, | |
1443 | .ac97_chip = 1, | |
1444 | .sblive51 = 1} , | |
a6f6192b JCD |
1445 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, |
1446 | .driver = "EMU10K1", .name = "SBLive! Value [CT4870]", | |
aec72e0a | 1447 | .id = "Live", |
2b637da5 LR |
1448 | .emu10k1_chip = 1, |
1449 | .ac97_chip = 1, | |
1450 | .sblive51 = 1} , | |
88dc0e5d | 1451 | /* Tested by James@superbug.co.uk 3rd July 2005 */ |
a6f6192b JCD |
1452 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, |
1453 | .driver = "EMU10K1", .name = "SBLive! Value [CT4832]", | |
2b6b22f3 JCD |
1454 | .id = "Live", |
1455 | .emu10k1_chip = 1, | |
1456 | .ac97_chip = 1, | |
1457 | .sblive51 = 1} , | |
a6f6192b JCD |
1458 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, |
1459 | .driver = "EMU10K1", .name = "SBLive! Value [CT4830]", | |
2b6b22f3 JCD |
1460 | .id = "Live", |
1461 | .emu10k1_chip = 1, | |
1462 | .ac97_chip = 1, | |
1463 | .sblive51 = 1} , | |
a6f6192b JCD |
1464 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, |
1465 | .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", | |
2b6b22f3 JCD |
1466 | .id = "Live", |
1467 | .emu10k1_chip = 1, | |
1468 | .ac97_chip = 1, | |
1469 | .sblive51 = 1} , | |
a6f6192b JCD |
1470 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, |
1471 | .driver = "EMU10K1", .name = "SBLive! Value [CT4780]", | |
2b6b22f3 JCD |
1472 | .id = "Live", |
1473 | .emu10k1_chip = 1, | |
1474 | .ac97_chip = 1, | |
1475 | .sblive51 = 1} , | |
a6f6192b JCD |
1476 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, |
1477 | .driver = "EMU10K1", .name = "E-mu APS [4001]", | |
1478 | .id = "APS", | |
2b6b22f3 | 1479 | .emu10k1_chip = 1, |
a6f6192b JCD |
1480 | .ecard = 1} , |
1481 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, | |
1482 | .driver = "EMU10K1", .name = "SBLive! [CT4620]", | |
2b6b22f3 JCD |
1483 | .id = "Live", |
1484 | .emu10k1_chip = 1, | |
1485 | .ac97_chip = 1, | |
1486 | .sblive51 = 1} , | |
a6f6192b JCD |
1487 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, |
1488 | .driver = "EMU10K1", .name = "SBLive! Value [CT4670]", | |
2b6b22f3 JCD |
1489 | .id = "Live", |
1490 | .emu10k1_chip = 1, | |
1491 | .ac97_chip = 1, | |
1492 | .sblive51 = 1} , | |
1da177e4 LT |
1493 | {.vendor = 0x1102, .device = 0x0002, |
1494 | .driver = "EMU10K1", .name = "SB Live [Unknown]", | |
aec72e0a | 1495 | .id = "Live", |
1da177e4 | 1496 | .emu10k1_chip = 1, |
2b637da5 LR |
1497 | .ac97_chip = 1, |
1498 | .sblive51 = 1} , | |
1da177e4 LT |
1499 | { } /* terminator */ |
1500 | }; | |
1501 | ||
eb4698f3 | 1502 | int __devinit snd_emu10k1_create(struct snd_card *card, |
1da177e4 LT |
1503 | struct pci_dev * pci, |
1504 | unsigned short extin_mask, | |
1505 | unsigned short extout_mask, | |
1506 | long max_cache_bytes, | |
1507 | int enable_ir, | |
e66bc8b2 | 1508 | uint subsystem, |
eb4698f3 | 1509 | struct snd_emu10k1 ** remu) |
1da177e4 | 1510 | { |
eb4698f3 | 1511 | struct snd_emu10k1 *emu; |
09668b44 | 1512 | int idx, err; |
1da177e4 LT |
1513 | int is_audigy; |
1514 | unsigned char revision; | |
09668b44 | 1515 | unsigned int silent_page; |
eb4698f3 TI |
1516 | const struct snd_emu_chip_details *c; |
1517 | static struct snd_device_ops ops = { | |
1da177e4 LT |
1518 | .dev_free = snd_emu10k1_dev_free, |
1519 | }; | |
1520 | ||
1521 | *remu = NULL; | |
1522 | ||
1523 | /* enable PCI device */ | |
1524 | if ((err = pci_enable_device(pci)) < 0) | |
1525 | return err; | |
1526 | ||
e560d8d8 | 1527 | emu = kzalloc(sizeof(*emu), GFP_KERNEL); |
1da177e4 LT |
1528 | if (emu == NULL) { |
1529 | pci_disable_device(pci); | |
1530 | return -ENOMEM; | |
1531 | } | |
1532 | emu->card = card; | |
1533 | spin_lock_init(&emu->reg_lock); | |
1534 | spin_lock_init(&emu->emu_lock); | |
1535 | spin_lock_init(&emu->voice_lock); | |
1536 | spin_lock_init(&emu->synth_lock); | |
1537 | spin_lock_init(&emu->memblk_lock); | |
62932df8 | 1538 | mutex_init(&emu->fx8010.lock); |
1da177e4 LT |
1539 | INIT_LIST_HEAD(&emu->mapped_link_head); |
1540 | INIT_LIST_HEAD(&emu->mapped_order_link_head); | |
1541 | emu->pci = pci; | |
1542 | emu->irq = -1; | |
1543 | emu->synth = NULL; | |
1544 | emu->get_synth_voice = NULL; | |
1545 | /* read revision & serial */ | |
1546 | pci_read_config_byte(pci, PCI_REVISION_ID, &revision); | |
1547 | emu->revision = revision; | |
1548 | pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); | |
1549 | pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); | |
1da177e4 LT |
1550 | snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model); |
1551 | ||
1552 | for (c = emu_chip_details; c->vendor; c++) { | |
1553 | if (c->vendor == pci->vendor && c->device == pci->device) { | |
e66bc8b2 JCD |
1554 | if (subsystem) { |
1555 | if (c->subsystem && (c->subsystem == subsystem) ) { | |
1556 | break; | |
1557 | } else continue; | |
1558 | } else { | |
1559 | if (c->subsystem && (c->subsystem != emu->serial) ) | |
1560 | continue; | |
1561 | if (c->revision && c->revision != emu->revision) | |
1562 | continue; | |
1563 | } | |
bdaed502 | 1564 | break; |
1da177e4 LT |
1565 | } |
1566 | } | |
1567 | if (c->vendor == 0) { | |
1568 | snd_printk(KERN_ERR "emu10k1: Card not recognised\n"); | |
1569 | kfree(emu); | |
1570 | pci_disable_device(pci); | |
1571 | return -ENOENT; | |
1572 | } | |
1573 | emu->card_capabilities = c; | |
e66bc8b2 | 1574 | if (c->subsystem && !subsystem) |
1da177e4 | 1575 | snd_printdd("Sound card name=%s\n", c->name); |
e66bc8b2 JCD |
1576 | else if (subsystem) |
1577 | snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n", | |
1578 | c->name, pci->vendor, pci->device, emu->serial, c->subsystem); | |
1579 | else | |
1580 | snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n", | |
1581 | c->name, pci->vendor, pci->device, emu->serial); | |
1da177e4 | 1582 | |
85a655d6 TI |
1583 | if (!*card->id && c->id) { |
1584 | int i, n = 0; | |
aec72e0a | 1585 | strlcpy(card->id, c->id, sizeof(card->id)); |
85a655d6 TI |
1586 | for (;;) { |
1587 | for (i = 0; i < snd_ecards_limit; i++) { | |
1588 | if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id)) | |
1589 | break; | |
1590 | } | |
1591 | if (i >= snd_ecards_limit) | |
1592 | break; | |
1593 | n++; | |
1594 | if (n >= SNDRV_CARDS) | |
1595 | break; | |
1596 | snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n); | |
1597 | } | |
1598 | } | |
aec72e0a | 1599 | |
1da177e4 LT |
1600 | is_audigy = emu->audigy = c->emu10k2_chip; |
1601 | ||
1602 | /* set the DMA transfer mask */ | |
1603 | emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK; | |
1604 | if (pci_set_dma_mask(pci, emu->dma_mask) < 0 || | |
1605 | pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) { | |
1606 | snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask); | |
1607 | kfree(emu); | |
1608 | pci_disable_device(pci); | |
1609 | return -ENXIO; | |
1610 | } | |
1611 | if (is_audigy) | |
1612 | emu->gpr_base = A_FXGPREGBASE; | |
1613 | else | |
1614 | emu->gpr_base = FXGPREGBASE; | |
1615 | ||
1616 | if ((err = pci_request_regions(pci, "EMU10K1")) < 0) { | |
1617 | kfree(emu); | |
1618 | pci_disable_device(pci); | |
1619 | return err; | |
1620 | } | |
1621 | emu->port = pci_resource_start(pci, 0); | |
1622 | ||
437a5a46 TI |
1623 | if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED, |
1624 | "EMU10K1", emu)) { | |
09668b44 TI |
1625 | err = -EBUSY; |
1626 | goto error; | |
1da177e4 LT |
1627 | } |
1628 | emu->irq = pci->irq; | |
1629 | ||
1630 | emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; | |
1631 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), | |
1632 | 32 * 1024, &emu->ptb_pages) < 0) { | |
09668b44 TI |
1633 | err = -ENOMEM; |
1634 | goto error; | |
1da177e4 LT |
1635 | } |
1636 | ||
1637 | emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*)); | |
1638 | emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long)); | |
1639 | if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) { | |
09668b44 TI |
1640 | err = -ENOMEM; |
1641 | goto error; | |
1da177e4 LT |
1642 | } |
1643 | ||
1644 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), | |
1645 | EMUPAGESIZE, &emu->silent_page) < 0) { | |
09668b44 TI |
1646 | err = -ENOMEM; |
1647 | goto error; | |
1da177e4 LT |
1648 | } |
1649 | emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); | |
1650 | if (emu->memhdr == NULL) { | |
09668b44 TI |
1651 | err = -ENOMEM; |
1652 | goto error; | |
1da177e4 | 1653 | } |
eb4698f3 TI |
1654 | emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - |
1655 | sizeof(struct snd_util_memblk); | |
1da177e4 LT |
1656 | |
1657 | pci_set_master(pci); | |
1658 | ||
1da177e4 LT |
1659 | emu->fx8010.fxbus_mask = 0x303f; |
1660 | if (extin_mask == 0) | |
1661 | extin_mask = 0x3fcf; | |
1662 | if (extout_mask == 0) | |
1663 | extout_mask = 0x7fff; | |
1664 | emu->fx8010.extin_mask = extin_mask; | |
1665 | emu->fx8010.extout_mask = extout_mask; | |
09668b44 | 1666 | emu->enable_ir = enable_ir; |
1da177e4 | 1667 | |
2b637da5 | 1668 | if (emu->card_capabilities->ecard) { |
09668b44 TI |
1669 | if ((err = snd_emu10k1_ecard_init(emu)) < 0) |
1670 | goto error; | |
d83c671f | 1671 | } else if (emu->card_capabilities->ca_cardbus_chip) { |
09668b44 TI |
1672 | if ((err = snd_emu10k1_cardbus_init(emu)) < 0) |
1673 | goto error; | |
9f4bd5dd JCD |
1674 | } else if (emu->card_capabilities->emu1010) { |
1675 | if ((err = snd_emu10k1_emu1010_init(emu)) < 0) { | |
19b99fba JCD |
1676 | snd_emu10k1_free(emu); |
1677 | return err; | |
1678 | } | |
1da177e4 LT |
1679 | } else { |
1680 | /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version | |
1681 | does not support this, it shouldn't do any harm */ | |
1682 | snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); | |
1683 | } | |
1684 | ||
09668b44 TI |
1685 | /* initialize TRAM setup */ |
1686 | emu->fx8010.itram_size = (16 * 1024)/2; | |
1687 | emu->fx8010.etram_pages.area = NULL; | |
1688 | emu->fx8010.etram_pages.bytes = 0; | |
1da177e4 | 1689 | |
09668b44 TI |
1690 | /* |
1691 | * Init to 0x02109204 : | |
1692 | * Clock accuracy = 0 (1000ppm) | |
1693 | * Sample Rate = 2 (48kHz) | |
1694 | * Audio Channel = 1 (Left of 2) | |
1695 | * Source Number = 0 (Unspecified) | |
1696 | * Generation Status = 1 (Original for Cat Code 12) | |
1697 | * Cat Code = 12 (Digital Signal Mixer) | |
1698 | * Mode = 0 (Mode 0) | |
1699 | * Emphasis = 0 (None) | |
1700 | * CP = 1 (Copyright unasserted) | |
1701 | * AN = 0 (Audio data) | |
1702 | * P = 0 (Consumer) | |
1703 | */ | |
1704 | emu->spdif_bits[0] = emu->spdif_bits[1] = | |
1705 | emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | | |
1706 | SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | | |
1707 | SPCS_GENERATIONSTATUS | 0x00001200 | | |
1708 | 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; | |
1709 | ||
1710 | emu->reserved_page = (struct snd_emu10k1_memblk *) | |
1711 | snd_emu10k1_synth_alloc(emu, 4096); | |
1712 | if (emu->reserved_page) | |
1713 | emu->reserved_page->map_locked = 1; | |
1714 | ||
1715 | /* Clear silent pages and set up pointers */ | |
1716 | memset(emu->silent_page.area, 0, PAGE_SIZE); | |
1717 | silent_page = emu->silent_page.addr << 1; | |
1718 | for (idx = 0; idx < MAXPAGES; idx++) | |
1719 | ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx); | |
1720 | ||
1721 | /* set up voice indices */ | |
1722 | for (idx = 0; idx < NUM_G; idx++) { | |
1723 | emu->voices[idx].emu = emu; | |
1724 | emu->voices[idx].number = idx; | |
1da177e4 LT |
1725 | } |
1726 | ||
09668b44 TI |
1727 | if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0) |
1728 | goto error; | |
1729 | #ifdef CONFIG_PM | |
1730 | if ((err = alloc_pm_buffer(emu)) < 0) | |
1731 | goto error; | |
1732 | #endif | |
1733 | ||
1734 | /* Initialize the effect engine */ | |
1735 | if ((err = snd_emu10k1_init_efx(emu)) < 0) | |
1736 | goto error; | |
1737 | snd_emu10k1_audio_enable(emu); | |
1738 | ||
1739 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0) | |
1740 | goto error; | |
1741 | ||
adf1b3d2 | 1742 | #ifdef CONFIG_PROC_FS |
1da177e4 | 1743 | snd_emu10k1_proc_init(emu); |
adf1b3d2 | 1744 | #endif |
1da177e4 LT |
1745 | |
1746 | snd_card_set_dev(card, &pci->dev); | |
1747 | *remu = emu; | |
1748 | return 0; | |
09668b44 TI |
1749 | |
1750 | error: | |
1751 | snd_emu10k1_free(emu); | |
1752 | return err; | |
1da177e4 LT |
1753 | } |
1754 | ||
09668b44 TI |
1755 | #ifdef CONFIG_PM |
1756 | static unsigned char saved_regs[] = { | |
1757 | CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, | |
1758 | FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, | |
1759 | ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, | |
1760 | TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, | |
1761 | MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, | |
1762 | SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, | |
1763 | 0xff /* end */ | |
1764 | }; | |
1765 | static unsigned char saved_regs_audigy[] = { | |
1766 | A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE, | |
1767 | A_FXRT2, A_SENDAMOUNTS, A_FXRT1, | |
1768 | 0xff /* end */ | |
1769 | }; | |
1770 | ||
1771 | static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu) | |
1772 | { | |
1773 | int size; | |
1774 | ||
1775 | size = ARRAY_SIZE(saved_regs); | |
1776 | if (emu->audigy) | |
1777 | size += ARRAY_SIZE(saved_regs_audigy); | |
1778 | emu->saved_ptr = vmalloc(4 * NUM_G * size); | |
1779 | if (! emu->saved_ptr) | |
1780 | return -ENOMEM; | |
1781 | if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) | |
1782 | return -ENOMEM; | |
1783 | if (emu->card_capabilities->ca0151_chip && | |
1784 | snd_p16v_alloc_pm_buffer(emu) < 0) | |
1785 | return -ENOMEM; | |
1786 | return 0; | |
1787 | } | |
1788 | ||
1789 | static void free_pm_buffer(struct snd_emu10k1 *emu) | |
1790 | { | |
1791 | vfree(emu->saved_ptr); | |
1792 | snd_emu10k1_efx_free_pm_buffer(emu); | |
1793 | if (emu->card_capabilities->ca0151_chip) | |
1794 | snd_p16v_free_pm_buffer(emu); | |
1795 | } | |
1796 | ||
1797 | void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) | |
1798 | { | |
1799 | int i; | |
1800 | unsigned char *reg; | |
1801 | unsigned int *val; | |
1802 | ||
1803 | val = emu->saved_ptr; | |
1804 | for (reg = saved_regs; *reg != 0xff; reg++) | |
1805 | for (i = 0; i < NUM_G; i++, val++) | |
1806 | *val = snd_emu10k1_ptr_read(emu, *reg, i); | |
1807 | if (emu->audigy) { | |
1808 | for (reg = saved_regs_audigy; *reg != 0xff; reg++) | |
1809 | for (i = 0; i < NUM_G; i++, val++) | |
1810 | *val = snd_emu10k1_ptr_read(emu, *reg, i); | |
1811 | } | |
1812 | if (emu->audigy) | |
1813 | emu->saved_a_iocfg = inl(emu->port + A_IOCFG); | |
1814 | emu->saved_hcfg = inl(emu->port + HCFG); | |
1815 | } | |
1816 | ||
1817 | void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) | |
1818 | { | |
1819 | if (emu->card_capabilities->ecard) | |
1820 | snd_emu10k1_ecard_init(emu); | |
f40b6890 TI |
1821 | else if (emu->card_capabilities->ca_cardbus_chip) |
1822 | snd_emu10k1_cardbus_init(emu); | |
9f4bd5dd JCD |
1823 | else if (emu->card_capabilities->emu1010) |
1824 | snd_emu10k1_emu1010_init(emu); | |
09668b44 TI |
1825 | else |
1826 | snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); | |
1827 | snd_emu10k1_init(emu, emu->enable_ir, 1); | |
1828 | } | |
1829 | ||
1830 | void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) | |
1831 | { | |
1832 | int i; | |
1833 | unsigned char *reg; | |
1834 | unsigned int *val; | |
1835 | ||
1836 | snd_emu10k1_audio_enable(emu); | |
1837 | ||
1838 | /* resore for spdif */ | |
1839 | if (emu->audigy) | |
4130d59b AP |
1840 | outl(emu->saved_a_iocfg, emu->port + A_IOCFG); |
1841 | outl(emu->saved_hcfg, emu->port + HCFG); | |
09668b44 TI |
1842 | |
1843 | val = emu->saved_ptr; | |
1844 | for (reg = saved_regs; *reg != 0xff; reg++) | |
1845 | for (i = 0; i < NUM_G; i++, val++) | |
1846 | snd_emu10k1_ptr_write(emu, *reg, i, *val); | |
1847 | if (emu->audigy) { | |
1848 | for (reg = saved_regs_audigy; *reg != 0xff; reg++) | |
1849 | for (i = 0; i < NUM_G; i++, val++) | |
1850 | snd_emu10k1_ptr_write(emu, *reg, i, *val); | |
1851 | } | |
1852 | } | |
1853 | #endif |