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dma-mapping: replace all DMA_30BIT_MASK macro with DMA_BIT_MASK(30)
[deliverable/linux.git] / sound / pci / emu10k1 / emu10k1x.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
3 * Driver EMU10K1X chips
4 *
5 * Parts of this code were adapted from audigyls.c driver which is
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 *
8 * BUGS:
9 * --
10 *
11 * TODO:
12 *
13 * Chips (SB0200 model):
14 * - EMU10K1X-DBQ
15 * - STAC 9708T
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 *
31 */
1da177e4
LT		 32#include <linux/init.h>
33#include <linux/interrupt.h>
34#include <linux/pci.h>
9d2f928d 35#include <linux/dma-mapping.h>
1da177e4
LT		 36#include <linux/slab.h>
37#include <linux/moduleparam.h>
38#include <sound/core.h>
39#include <sound/initval.h>
40#include <sound/pcm.h>
41#include <sound/ac97_codec.h>
42#include <sound/info.h>
43#include <sound/rawmidi.h>
44
45MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>");
46MODULE_DESCRIPTION("EMU10K1X");
47MODULE_LICENSE("GPL");
48MODULE_SUPPORTED_DEVICE("{{Dell Creative Labs,SB Live!}");
49
50// module parameters (see "Module Parameters")
51static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
52static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
53static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
54
55module_param_array(index, int, NULL, 0444);
56MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
57module_param_array(id, charp, NULL, 0444);
58MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
59module_param_array(enable, bool, NULL, 0444);
60MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
61
62
63// some definitions were borrowed from emu10k1 driver as they seem to be the same
64/************************************************************************************************/
65/* PCI function 0 registers, address = <val> + PCIBASE0 */
66/************************************************************************************************/
67
68#define PTR 0x00 /* Indexed register set pointer register */
69 /* NOTE: The CHANNELNUM and ADDRESS words can */
70 /* be modified independently of each other. */
71
72#define DATA 0x04 /* Indexed register set data register */
73
74#define IPR 0x08 /* Global interrupt pending register */
75 /* Clear pending interrupts by writing a 1 to */
76 /* the relevant bits and zero to the other bits */
77#define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */
78#define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */
79#define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */
80#define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
81#define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */
82#define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
83
84#define INTE 0x0c /* Interrupt enable register */
85#define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */
86#define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */
87#define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */
88#define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
89#define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */
90#define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
91
92#define HCFG 0x14 /* Hardware config register */
93
94#define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */
95 /* NOTE: This should generally never be used. */
96#define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
97 /* Should be set to 1 when the EMU10K1 is */
98 /* completely initialized. */
99#define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */
100
101
102#define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
103
104#define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
105
106/********************************************************************************************************/
107/* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */
108/********************************************************************************************************/
109#define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
110 /* One list entry: 4 bytes for DMA address,
111 * 4 bytes for period_size << 16.
112 * One list entry is 8 bytes long.
113 * One list entry for each period in the buffer.
114 */
115#define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
116#define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
117#define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA addresss */
118#define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */
119#define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */
120#define PLAYBACK_UNKNOWN1 0x07
121#define PLAYBACK_UNKNOWN2 0x08
122
123/* Only one capture channel supported */
124#define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
125#define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
126#define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
127#define CAPTURE_UNKNOWN 0x13
128
129/* From 0x20 - 0x3f, last samples played on each channel */
130
131#define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */
132#define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */
133#define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */
134#define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */
135#define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */
136
137#define ROUTING 0x41 /* Setup sound routing ? */
138#define ROUTING_FRONT_LEFT 0x00000001
139#define ROUTING_FRONT_RIGHT 0x00000002
140#define ROUTING_REAR_LEFT 0x00000004
141#define ROUTING_REAR_RIGHT 0x00000008
142#define ROUTING_CENTER_LFE 0x00010000
143
144#define SPCS0 0x42 /* SPDIF output Channel Status 0 register */
145
146#define SPCS1 0x43 /* SPDIF output Channel Status 1 register */
147
148#define SPCS2 0x44 /* SPDIF output Channel Status 2 register */
149
150#define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */
151#define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
152#define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
153#define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */
154#define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */
155#define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
156#define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
157#define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
158#define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */
159#define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */
160#define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */
161#define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */
162#define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */
163#define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */
164#define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
165#define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
166#define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
167#define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */
168#define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */
169#define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
170#define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
171#define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
172#define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
173
174#define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
175
176/* This is the MPU port on the card */
177#define MUDATA 0x47
178#define MUCMD 0x48
179#define MUSTAT MUCMD
180
181/* From 0x50 - 0x5f, last samples captured */
182
183/**
184 * The hardware has 3 channels for playback and 1 for capture.
185 * - channel 0 is the front channel
186 * - channel 1 is the rear channel
187 * - channel 2 is the center/lfe chanel
188 * Volume is controlled by the AC97 for the front and rear channels by
189 * the PCM Playback Volume, Sigmatel Surround Playback Volume and
190 * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
191 * the front/rear channel mixing in the REAR OUT jack. When using the
192 * 4-Speaker Stereo, both front and rear channels will be mixed in the
193 * REAR OUT.
194 * The center/lfe channel has no volume control and cannot be muted during
195 * playback.
196 */
197
4b32f1aa
TI		 198struct emu10k1x_voice {
199 struct emu10k1x *emu;
1da177e4
LT		 200 int number;
201 int use;
202
4b32f1aa 203 struct emu10k1x_pcm *epcm;
1da177e4
LT		 204};
205
4b32f1aa
TI		 206struct emu10k1x_pcm {
207 struct emu10k1x *emu;
208 struct snd_pcm_substream *substream;
209 struct emu10k1x_voice *voice;
1da177e4
LT		 210 unsigned short running;
211};
212
4b32f1aa
TI		 213struct emu10k1x_midi {
214 struct emu10k1x *emu;
215 struct snd_rawmidi *rmidi;
216 struct snd_rawmidi_substream *substream_input;
217 struct snd_rawmidi_substream *substream_output;
1da177e4
LT		 218 unsigned int midi_mode;
219 spinlock_t input_lock;
220 spinlock_t output_lock;
221 spinlock_t open_lock;
222 int tx_enable, rx_enable;
223 int port;
224 int ipr_tx, ipr_rx;
4b32f1aa
TI		 225 void (*interrupt)(struct emu10k1x *emu, unsigned int status);
226};
1da177e4
LT		 227
228// definition of the chip-specific record
4b32f1aa
TI		 229struct emu10k1x {
230 struct snd_card *card;
1da177e4
LT		 231 struct pci_dev *pci;
232
233 unsigned long port;
234 struct resource *res_port;
235 int irq;
236
01f681da 237 unsigned char revision; /* chip revision */
1da177e4
LT		 238 unsigned int serial; /* serial number */
239 unsigned short model; /* subsystem id */
240
241 spinlock_t emu_lock;
242 spinlock_t voice_lock;
243
4b32f1aa
TI		 244 struct snd_ac97 *ac97;
245 struct snd_pcm *pcm;
1da177e4 246
4b32f1aa
TI		 247 struct emu10k1x_voice voices[3];
248 struct emu10k1x_voice capture_voice;
1da177e4
LT		 249 u32 spdif_bits[3]; // SPDIF out setup
250
251 struct snd_dma_buffer dma_buffer;
252
4b32f1aa 253 struct emu10k1x_midi midi;
1da177e4
LT		 254};
255
256/* hardware definition */
4b32f1aa 257static struct snd_pcm_hardware snd_emu10k1x_playback_hw = {
1da177e4
LT		 258 .info = (SNDRV_PCM_INFO_MMAP |
259 SNDRV_PCM_INFO_INTERLEAVED |
260 SNDRV_PCM_INFO_BLOCK_TRANSFER |
261 SNDRV_PCM_INFO_MMAP_VALID),
262 .formats = SNDRV_PCM_FMTBIT_S16_LE,
263 .rates = SNDRV_PCM_RATE_48000,
264 .rate_min = 48000,
265 .rate_max = 48000,
266 .channels_min = 2,
267 .channels_max = 2,
268 .buffer_bytes_max = (32*1024),
269 .period_bytes_min = 64,
270 .period_bytes_max = (16*1024),
271 .periods_min = 2,
272 .periods_max = 8,
273 .fifo_size = 0,
274};
275
4b32f1aa 276static struct snd_pcm_hardware snd_emu10k1x_capture_hw = {
1da177e4
LT		 277 .info = (SNDRV_PCM_INFO_MMAP |
278 SNDRV_PCM_INFO_INTERLEAVED |
279 SNDRV_PCM_INFO_BLOCK_TRANSFER |
280 SNDRV_PCM_INFO_MMAP_VALID),
281 .formats = SNDRV_PCM_FMTBIT_S16_LE,
282 .rates = SNDRV_PCM_RATE_48000,
283 .rate_min = 48000,
284 .rate_max = 48000,
285 .channels_min = 2,
286 .channels_max = 2,
287 .buffer_bytes_max = (32*1024),
288 .period_bytes_min = 64,
289 .period_bytes_max = (16*1024),
290 .periods_min = 2,
291 .periods_max = 2,
292 .fifo_size = 0,
293};
294
4b32f1aa 295static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu,
1da177e4
LT		 296 unsigned int reg,
297 unsigned int chn)
298{
299 unsigned long flags;
300 unsigned int regptr, val;
301
302 regptr = (reg << 16) | chn;
303
304 spin_lock_irqsave(&emu->emu_lock, flags);
305 outl(regptr, emu->port + PTR);
306 val = inl(emu->port + DATA);
307 spin_unlock_irqrestore(&emu->emu_lock, flags);
308 return val;
309}
310
4b32f1aa 311static void snd_emu10k1x_ptr_write(struct emu10k1x *emu,
1da177e4
LT		 312 unsigned int reg,
313 unsigned int chn,
314 unsigned int data)
315{
316 unsigned int regptr;
317 unsigned long flags;
318
319 regptr = (reg << 16) | chn;
320
321 spin_lock_irqsave(&emu->emu_lock, flags);
322 outl(regptr, emu->port + PTR);
323 outl(data, emu->port + DATA);
324 spin_unlock_irqrestore(&emu->emu_lock, flags);
325}
326
4b32f1aa 327static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb)
1da177e4
LT		 328{
329 unsigned long flags;
f2948fc2
HH		 330 unsigned int intr_enable;
331
1da177e4 332 spin_lock_irqsave(&emu->emu_lock, flags);
f2948fc2
HH		 333 intr_enable = inl(emu->port + INTE) | intrenb;
334 outl(intr_enable, emu->port + INTE);
1da177e4
LT		 335 spin_unlock_irqrestore(&emu->emu_lock, flags);
336}
337
4b32f1aa 338static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb)
1da177e4
LT		 339{
340 unsigned long flags;
f2948fc2
HH		 341 unsigned int intr_enable;
342
1da177e4 343 spin_lock_irqsave(&emu->emu_lock, flags);
f2948fc2
HH		 344 intr_enable = inl(emu->port + INTE) & ~intrenb;
345 outl(intr_enable, emu->port + INTE);
1da177e4
LT		 346 spin_unlock_irqrestore(&emu->emu_lock, flags);
347}
348
4b32f1aa 349static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value)
1da177e4
LT		 350{
351 unsigned long flags;
352
353 spin_lock_irqsave(&emu->emu_lock, flags);
354 outl(value, emu->port + GPIO);
355 spin_unlock_irqrestore(&emu->emu_lock, flags);
356}
357
4b32f1aa 358static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 359{
4d572776 360 kfree(runtime->private_data);
1da177e4
LT		 361}
362
4b32f1aa 363static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice)
1da177e4 364{
4b32f1aa 365 struct emu10k1x_pcm *epcm;
1da177e4
LT		 366
367 if ((epcm = voice->epcm) == NULL)
368 return;
369 if (epcm->substream == NULL)
370 return;
371#if 0
372 snd_printk(KERN_INFO "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
373 epcm->substream->ops->pointer(epcm->substream),
374 snd_pcm_lib_period_bytes(epcm->substream),
375 snd_pcm_lib_buffer_bytes(epcm->substream));
376#endif
377 snd_pcm_period_elapsed(epcm->substream);
378}
379
380/* open callback */
4b32f1aa 381static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream)
1da177e4 382{
4b32f1aa
TI		 383 struct emu10k1x *chip = snd_pcm_substream_chip(substream);
384 struct emu10k1x_pcm *epcm;
385 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 386 int err;
387
388 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) {
389 return err;
390 }
391 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
392 return err;
393
e560d8d8 394 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
1da177e4
LT		 395 if (epcm == NULL)
396 return -ENOMEM;
397 epcm->emu = chip;
398 epcm->substream = substream;
399
400 runtime->private_data = epcm;
401 runtime->private_free = snd_emu10k1x_pcm_free_substream;
402
403 runtime->hw = snd_emu10k1x_playback_hw;
404
405 return 0;
406}
407
408/* close callback */
4b32f1aa 409static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream)
1da177e4
LT		 410{
411 return 0;
412}
413
414/* hw_params callback */
4b32f1aa
TI		 415static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream,
416 struct snd_pcm_hw_params *hw_params)
1da177e4 417{
4b32f1aa
TI		 418 struct snd_pcm_runtime *runtime = substream->runtime;
419 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 420
421 if (! epcm->voice) {
422 epcm->voice = &epcm->emu->voices[substream->pcm->device];
423 epcm->voice->use = 1;
424 epcm->voice->epcm = epcm;
425 }
426
427 return snd_pcm_lib_malloc_pages(substream,
428 params_buffer_bytes(hw_params));
429}
430
431/* hw_free callback */
4b32f1aa 432static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4 433{
4b32f1aa
TI		 434 struct snd_pcm_runtime *runtime = substream->runtime;
435 struct emu10k1x_pcm *epcm;
1da177e4
LT		 436
437 if (runtime->private_data == NULL)
438 return 0;
439
440 epcm = runtime->private_data;
441
442 if (epcm->voice) {
443 epcm->voice->use = 0;
444 epcm->voice->epcm = NULL;
445 epcm->voice = NULL;
446 }
447
448 return snd_pcm_lib_free_pages(substream);
449}
450
451/* prepare callback */
4b32f1aa 452static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream)
1da177e4 453{
4b32f1aa
TI		 454 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
455 struct snd_pcm_runtime *runtime = substream->runtime;
456 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 457 int voice = epcm->voice->number;
458 u32 *table_base = (u32 *)(emu->dma_buffer.area+1024*voice);
459 u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
460 int i;
461
9f4bd5dd 462 for(i = 0; i < runtime->periods; i++) {
1da177e4
LT		 463 *table_base++=runtime->dma_addr+(i*period_size_bytes);
464 *table_base++=period_size_bytes<<16;
465 }
466
467 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer.addr+1024*voice);
468 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
469 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
470 snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
471 snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
472 snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
473 snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
474
475 snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
476
477 return 0;
478}
479
480/* trigger callback */
4b32f1aa 481static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 482 int cmd)
483{
4b32f1aa
TI		 484 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
485 struct snd_pcm_runtime *runtime = substream->runtime;
486 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 487 int channel = epcm->voice->number;
488 int result = 0;
489
490// snd_printk(KERN_INFO "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n", (int)emu, cmd, (int)substream->ops->pointer(substream));
491
492 switch (cmd) {
493 case SNDRV_PCM_TRIGGER_START:
494 if(runtime->periods == 2)
495 snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
496 else
497 snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
498 epcm->running = 1;
499 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
500 break;
501 case SNDRV_PCM_TRIGGER_STOP:
502 epcm->running = 0;
503 snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
504 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
505 break;
506 default:
507 result = -EINVAL;
508 break;
509 }
510 return result;
511}
512
513/* pointer callback */
514static snd_pcm_uframes_t
4b32f1aa 515snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 516{
4b32f1aa
TI		 517 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
518 struct snd_pcm_runtime *runtime = substream->runtime;
519 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 520 int channel = epcm->voice->number;
521 snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
522
523 if (!epcm->running)
524 return 0;
525
526 ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
527 ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
528 ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
529
530 if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
531 return 0;
532
533 if (ptr3 != ptr4)
534 ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
535 ptr2 = bytes_to_frames(runtime, ptr1);
536 ptr2 += (ptr4 >> 3) * runtime->period_size;
537 ptr = ptr2;
538
539 if (ptr >= runtime->buffer_size)
540 ptr -= runtime->buffer_size;
541
542 return ptr;
543}
544
545/* operators */
4b32f1aa 546static struct snd_pcm_ops snd_emu10k1x_playback_ops = {
1da177e4
LT		 547 .open = snd_emu10k1x_playback_open,
548 .close = snd_emu10k1x_playback_close,
549 .ioctl = snd_pcm_lib_ioctl,
550 .hw_params = snd_emu10k1x_pcm_hw_params,
551 .hw_free = snd_emu10k1x_pcm_hw_free,
552 .prepare = snd_emu10k1x_pcm_prepare,
553 .trigger = snd_emu10k1x_pcm_trigger,
554 .pointer = snd_emu10k1x_pcm_pointer,
555};
556
557/* open_capture callback */
4b32f1aa 558static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream)
1da177e4 559{
4b32f1aa
TI		 560 struct emu10k1x *chip = snd_pcm_substream_chip(substream);
561 struct emu10k1x_pcm *epcm;
562 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 563 int err;
564
565 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
566 return err;
567 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
568 return err;
569
e560d8d8 570 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
1da177e4
LT		 571 if (epcm == NULL)
572 return -ENOMEM;
573
574 epcm->emu = chip;
575 epcm->substream = substream;
576
577 runtime->private_data = epcm;
578 runtime->private_free = snd_emu10k1x_pcm_free_substream;
579
580 runtime->hw = snd_emu10k1x_capture_hw;
581
582 return 0;
583}
584
585/* close callback */
4b32f1aa 586static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 587{
588 return 0;
589}
590
591/* hw_params callback */
4b32f1aa
TI		 592static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream,
593 struct snd_pcm_hw_params *hw_params)
1da177e4 594{
4b32f1aa
TI		 595 struct snd_pcm_runtime *runtime = substream->runtime;
596 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 597
598 if (! epcm->voice) {
599 if (epcm->emu->capture_voice.use)
600 return -EBUSY;
601 epcm->voice = &epcm->emu->capture_voice;
602 epcm->voice->epcm = epcm;
603 epcm->voice->use = 1;
604 }
605
606 return snd_pcm_lib_malloc_pages(substream,
607 params_buffer_bytes(hw_params));
608}
609
610/* hw_free callback */
4b32f1aa 611static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream)
1da177e4 612{
4b32f1aa 613 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 614
4b32f1aa 615 struct emu10k1x_pcm *epcm;
1da177e4
LT		 616
617 if (runtime->private_data == NULL)
618 return 0;
619 epcm = runtime->private_data;
620
621 if (epcm->voice) {
622 epcm->voice->use = 0;
623 epcm->voice->epcm = NULL;
624 epcm->voice = NULL;
625 }
626
627 return snd_pcm_lib_free_pages(substream);
628}
629
630/* prepare capture callback */
4b32f1aa 631static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream)
1da177e4 632{
4b32f1aa
TI		 633 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
634 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 635
636 snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
637 snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
638 snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
639 snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
640
641 return 0;
642}
643
644/* trigger_capture callback */
4b32f1aa 645static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream,
1da177e4
LT		 646 int cmd)
647{
4b32f1aa
TI		 648 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
649 struct snd_pcm_runtime *runtime = substream->runtime;
650 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 651 int result = 0;
652
653 switch (cmd) {
654 case SNDRV_PCM_TRIGGER_START:
655 snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
656 INTE_CAP_0_HALF_LOOP);
657 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
658 epcm->running = 1;
659 break;
660 case SNDRV_PCM_TRIGGER_STOP:
661 epcm->running = 0;
662 snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
663 INTE_CAP_0_HALF_LOOP);
664 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
665 break;
666 default:
667 result = -EINVAL;
668 break;
669 }
670 return result;
671}
672
673/* pointer_capture callback */
674static snd_pcm_uframes_t
4b32f1aa 675snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream)
1da177e4 676{
4b32f1aa
TI		 677 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
678 struct snd_pcm_runtime *runtime = substream->runtime;
679 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 680 snd_pcm_uframes_t ptr;
681
682 if (!epcm->running)
683 return 0;
684
685 ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
686 if (ptr >= runtime->buffer_size)
687 ptr -= runtime->buffer_size;
688
689 return ptr;
690}
691
4b32f1aa 692static struct snd_pcm_ops snd_emu10k1x_capture_ops = {
1da177e4
LT		 693 .open = snd_emu10k1x_pcm_open_capture,
694 .close = snd_emu10k1x_pcm_close_capture,
695 .ioctl = snd_pcm_lib_ioctl,
696 .hw_params = snd_emu10k1x_pcm_hw_params_capture,
697 .hw_free = snd_emu10k1x_pcm_hw_free_capture,
698 .prepare = snd_emu10k1x_pcm_prepare_capture,
699 .trigger = snd_emu10k1x_pcm_trigger_capture,
700 .pointer = snd_emu10k1x_pcm_pointer_capture,
701};
702
4b32f1aa 703static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 704 unsigned short reg)
705{
4b32f1aa 706 struct emu10k1x *emu = ac97->private_data;
1da177e4
LT		 707 unsigned long flags;
708 unsigned short val;
709
710 spin_lock_irqsave(&emu->emu_lock, flags);
711 outb(reg, emu->port + AC97ADDRESS);
712 val = inw(emu->port + AC97DATA);
713 spin_unlock_irqrestore(&emu->emu_lock, flags);
714 return val;
715}
716
4b32f1aa 717static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 718 unsigned short reg, unsigned short val)
719{
4b32f1aa 720 struct emu10k1x *emu = ac97->private_data;
1da177e4
LT		 721 unsigned long flags;
722
723 spin_lock_irqsave(&emu->emu_lock, flags);
724 outb(reg, emu->port + AC97ADDRESS);
725 outw(val, emu->port + AC97DATA);
726 spin_unlock_irqrestore(&emu->emu_lock, flags);
727}
728
4b32f1aa 729static int snd_emu10k1x_ac97(struct emu10k1x *chip)
1da177e4 730{
4b32f1aa
TI		 731 struct snd_ac97_bus *pbus;
732 struct snd_ac97_template ac97;
1da177e4 733 int err;
4b32f1aa 734 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 735 .write = snd_emu10k1x_ac97_write,
736 .read = snd_emu10k1x_ac97_read,
737 };
738
739 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
740 return err;
741 pbus->no_vra = 1; /* we don't need VRA */
742
743 memset(&ac97, 0, sizeof(ac97));
744 ac97.private_data = chip;
745 ac97.scaps = AC97_SCAP_NO_SPDIF;
746 return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
747}
748
4b32f1aa 749static int snd_emu10k1x_free(struct emu10k1x *chip)
1da177e4
LT		 750{
751 snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
752 // disable interrupts
753 outl(0, chip->port + INTE);
754 // disable audio
755 outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
756
ebf029da 757 /* release the irq */
1da177e4 758 if (chip->irq >= 0)
437a5a46 759 free_irq(chip->irq, chip);
1da177e4 760
ebf029da
TI		 761 // release the i/o port
762 release_and_free_resource(chip->res_port);
763
1da177e4
LT		 764 // release the DMA
765 if (chip->dma_buffer.area) {
766 snd_dma_free_pages(&chip->dma_buffer);
767 }
768
769 pci_disable_device(chip->pci);
770
771 // release the data
772 kfree(chip);
773 return 0;
774}
775
4b32f1aa 776static int snd_emu10k1x_dev_free(struct snd_device *device)
1da177e4 777{
4b32f1aa 778 struct emu10k1x *chip = device->device_data;
1da177e4
LT		 779 return snd_emu10k1x_free(chip);
780}
781
7d12e780 782static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id)
1da177e4
LT		 783{
784 unsigned int status;
785
4b32f1aa
TI		 786 struct emu10k1x *chip = dev_id;
787 struct emu10k1x_voice *pvoice = chip->voices;
1da177e4
LT		 788 int i;
789 int mask;
790
791 status = inl(chip->port + IPR);
792
89173bd4
TI		 793 if (! status)
794 return IRQ_NONE;
795
796 // capture interrupt
797 if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
f2948fc2
HH		 798 struct emu10k1x_voice *cap_voice = &chip->capture_voice;
799 if (cap_voice->use)
800 snd_emu10k1x_pcm_interrupt(chip, cap_voice);
89173bd4
TI		 801 else
802 snd_emu10k1x_intr_disable(chip,
803 INTE_CAP_0_LOOP |
804 INTE_CAP_0_HALF_LOOP);
805 }
1da177e4 806
89173bd4
TI		 807 mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
808 for (i = 0; i < 3; i++) {
809 if (status & mask) {
810 if (pvoice->use)
811 snd_emu10k1x_pcm_interrupt(chip, pvoice);
812 else
813 snd_emu10k1x_intr_disable(chip, mask);
1da177e4 814 }
89173bd4
TI		 815 pvoice++;
816 mask <<= 1;
817 }
1da177e4 818
89173bd4
TI		 819 if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
820 if (chip->midi.interrupt)
821 chip->midi.interrupt(chip, status);
822 else
823 snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
1da177e4 824 }
89173bd4
TI		 825
826 // acknowledge the interrupt if necessary
827 outl(status, chip->port + IPR);
1da177e4 828
89173bd4 829 // snd_printk(KERN_INFO "interrupt %08x\n", status);
1da177e4
LT		 830 return IRQ_HANDLED;
831}
832
4b32f1aa 833static int __devinit snd_emu10k1x_pcm(struct emu10k1x *emu, int device, struct snd_pcm **rpcm)
1da177e4 834{
4b32f1aa 835 struct snd_pcm *pcm;
1da177e4
LT		 836 int err;
837 int capture = 0;
838
839 if (rpcm)
840 *rpcm = NULL;
841 if (device == 0)
842 capture = 1;
843
844 if ((err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm)) < 0)
845 return err;
846
847 pcm->private_data = emu;
1da177e4
LT		 848
849 switch(device) {
850 case 0:
851 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
852 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
853 break;
854 case 1:
855 case 2:
856 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
857 break;
858 }
859
860 pcm->info_flags = 0;
861 pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
862 switch(device) {
863 case 0:
864 strcpy(pcm->name, "EMU10K1X Front");
865 break;
866 case 1:
867 strcpy(pcm->name, "EMU10K1X Rear");
868 break;
869 case 2:
870 strcpy(pcm->name, "EMU10K1X Center/LFE");
871 break;
872 }
873 emu->pcm = pcm;
874
875 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
876 snd_dma_pci_data(emu->pci),
877 32*1024, 32*1024);
878
879 if (rpcm)
880 *rpcm = pcm;
881
882 return 0;
883}
884
4b32f1aa 885static int __devinit snd_emu10k1x_create(struct snd_card *card,
1da177e4 886 struct pci_dev *pci,
4b32f1aa 887 struct emu10k1x **rchip)
1da177e4 888{
4b32f1aa 889 struct emu10k1x *chip;
1da177e4
LT		 890 int err;
891 int ch;
4b32f1aa 892 static struct snd_device_ops ops = {
1da177e4
LT		 893 .dev_free = snd_emu10k1x_dev_free,
894 };
9d2f928d 895
1da177e4 896 *rchip = NULL;
9d2f928d 897
1da177e4
LT		 898 if ((err = pci_enable_device(pci)) < 0)
899 return err;
9d2f928d
TK		 900 if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
901 pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
1da177e4
LT		 902 snd_printk(KERN_ERR "error to set 28bit mask DMA\n");
903 pci_disable_device(pci);
904 return -ENXIO;
905 }
9d2f928d 906
e560d8d8 907 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 908 if (chip == NULL) {
909 pci_disable_device(pci);
910 return -ENOMEM;
911 }
9d2f928d 912
1da177e4
LT		 913 chip->card = card;
914 chip->pci = pci;
915 chip->irq = -1;
916
917 spin_lock_init(&chip->emu_lock);
918 spin_lock_init(&chip->voice_lock);
919
920 chip->port = pci_resource_start(pci, 0);
921 if ((chip->res_port = request_region(chip->port, 8,
922 "EMU10K1X")) == NULL) {
923 snd_printk(KERN_ERR "emu10k1x: cannot allocate the port 0x%lx\n", chip->port);
924 snd_emu10k1x_free(chip);
925 return -EBUSY;
926 }
927
928 if (request_irq(pci->irq, snd_emu10k1x_interrupt,
437a5a46 929 IRQF_SHARED, "EMU10K1X", chip)) {
1da177e4
LT		 930 snd_printk(KERN_ERR "emu10k1x: cannot grab irq %d\n", pci->irq);
931 snd_emu10k1x_free(chip);
932 return -EBUSY;
933 }
934 chip->irq = pci->irq;
935
936 if(snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
937 4 * 1024, &chip->dma_buffer) < 0) {
938 snd_emu10k1x_free(chip);
939 return -ENOMEM;
940 }
941
942 pci_set_master(pci);
943 /* read revision & serial */
44c10138 944 chip->revision = pci->revision;
1da177e4
LT		 945 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
946 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
947 snd_printk(KERN_INFO "Model %04x Rev %08x Serial %08x\n", chip->model,
948 chip->revision, chip->serial);
949
950 outl(0, chip->port + INTE);
951
952 for(ch = 0; ch < 3; ch++) {
953 chip->voices[ch].emu = chip;
954 chip->voices[ch].number = ch;
955 }
956
957 /*
958 * Init to 0x02109204 :
959 * Clock accuracy = 0 (1000ppm)
960 * Sample Rate = 2 (48kHz)
961 * Audio Channel = 1 (Left of 2)
962 * Source Number = 0 (Unspecified)
963 * Generation Status = 1 (Original for Cat Code 12)
964 * Cat Code = 12 (Digital Signal Mixer)
965 * Mode = 0 (Mode 0)
966 * Emphasis = 0 (None)
967 * CP = 1 (Copyright unasserted)
968 * AN = 0 (Audio data)
969 * P = 0 (Consumer)
970 */
971 snd_emu10k1x_ptr_write(chip, SPCS0, 0,
972 chip->spdif_bits[0] =
973 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
974 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
975 SPCS_GENERATIONSTATUS | 0x00001200 |
976 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
977 snd_emu10k1x_ptr_write(chip, SPCS1, 0,
978 chip->spdif_bits[1] =
979 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
980 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
981 SPCS_GENERATIONSTATUS | 0x00001200 |
982 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
983 snd_emu10k1x_ptr_write(chip, SPCS2, 0,
984 chip->spdif_bits[2] =
985 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
986 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
987 SPCS_GENERATIONSTATUS | 0x00001200 |
988 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
989
990 snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
991 snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
992 snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
993
994 outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
995
996 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
997 chip, &ops)) < 0) {
998 snd_emu10k1x_free(chip);
999 return err;
1000 }
1001 *rchip = chip;
1002 return 0;
1003}
1004
4b32f1aa
TI		 1005static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry,
1006 struct snd_info_buffer *buffer)
1da177e4 1007{
4b32f1aa 1008 struct emu10k1x *emu = entry->private_data;
1da177e4
LT		 1009 unsigned long value,value1,value2;
1010 unsigned long flags;
1011 int i;
1012
1013 snd_iprintf(buffer, "Registers:\n\n");
1014 for(i = 0; i < 0x20; i+=4) {
1015 spin_lock_irqsave(&emu->emu_lock, flags);
1016 value = inl(emu->port + i);
1017 spin_unlock_irqrestore(&emu->emu_lock, flags);
1018 snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
1019 }
1020 snd_iprintf(buffer, "\nRegisters\n\n");
1021 for(i = 0; i <= 0x48; i++) {
1022 value = snd_emu10k1x_ptr_read(emu, i, 0);
1023 if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
1024 value1 = snd_emu10k1x_ptr_read(emu, i, 1);
1025 value2 = snd_emu10k1x_ptr_read(emu, i, 2);
1026 snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
1027 } else {
1028 snd_iprintf(buffer, "%02X: %08lX\n", i, value);
1029 }
1030 }
1031}
1032
4b32f1aa
TI		 1033static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry,
1034 struct snd_info_buffer *buffer)
1da177e4 1035{
4b32f1aa 1036 struct emu10k1x *emu = entry->private_data;
1da177e4
LT		 1037 char line[64];
1038 unsigned int reg, channel_id , val;
1039
1040 while (!snd_info_get_line(buffer, line, sizeof(line))) {
1041 if (sscanf(line, "%x %x %x", &reg, &channel_id, &val) != 3)
1042 continue;
1043
9f4bd5dd
JCD		 1044 if ((reg < 0x49) && (reg >= 0) && (val <= 0xffffffff)
1045 && (channel_id >= 0) && (channel_id <= 2) )
1da177e4
LT		 1046 snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
1047 }
1048}
1049
4b32f1aa 1050static int __devinit snd_emu10k1x_proc_init(struct emu10k1x * emu)
1da177e4 1051{
4b32f1aa 1052 struct snd_info_entry *entry;
1da177e4
LT		 1053
1054 if(! snd_card_proc_new(emu->card, "emu10k1x_regs", &entry)) {
bf850204 1055 snd_info_set_text_ops(entry, emu, snd_emu10k1x_proc_reg_read);
1da177e4 1056 entry->c.text.write = snd_emu10k1x_proc_reg_write;
bd7bf042 1057 entry->mode |= S_IWUSR;
1da177e4
LT		 1058 entry->private_data = emu;
1059 }
1060
1061 return 0;
1062}
1063
a5ce8890 1064#define snd_emu10k1x_shared_spdif_info snd_ctl_boolean_mono_info
1da177e4 1065
4b32f1aa
TI		 1066static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol,
1067 struct snd_ctl_elem_value *ucontrol)
1da177e4 1068{
4b32f1aa 1069 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1070
1071 ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
1072
1073 return 0;
1074}
1075
4b32f1aa
TI		 1076static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol,
1077 struct snd_ctl_elem_value *ucontrol)
1da177e4 1078{
4b32f1aa 1079 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1080 unsigned int val;
1081 int change = 0;
1082
1083 val = ucontrol->value.integer.value[0] ;
1084
1085 if (val) {
1086 // enable spdif output
1087 snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
1088 snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
1089 snd_emu10k1x_gpio_write(emu, 0x1000);
1090 } else {
1091 // disable spdif output
1092 snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
1093 snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
1094 snd_emu10k1x_gpio_write(emu, 0x1080);
1095 }
1096 return change;
1097}
1098
4b32f1aa 1099static struct snd_kcontrol_new snd_emu10k1x_shared_spdif __devinitdata =
1da177e4
LT		 1100{
1101 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1102 .name = "Analog/Digital Output Jack",
1103 .info = snd_emu10k1x_shared_spdif_info,
1104 .get = snd_emu10k1x_shared_spdif_get,
1105 .put = snd_emu10k1x_shared_spdif_put
1106};
1107
4b32f1aa 1108static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1109{
1110 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1111 uinfo->count = 1;
1112 return 0;
1113}
1114
4b32f1aa
TI		 1115static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol,
1116 struct snd_ctl_elem_value *ucontrol)
1da177e4 1117{
4b32f1aa 1118 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1119 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1120
1121 ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
1122 ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
1123 ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
1124 ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
1125 return 0;
1126}
1127
4b32f1aa
TI		 1128static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol,
1129 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1130{
1131 ucontrol->value.iec958.status[0] = 0xff;
1132 ucontrol->value.iec958.status[1] = 0xff;
1133 ucontrol->value.iec958.status[2] = 0xff;
1134 ucontrol->value.iec958.status[3] = 0xff;
1135 return 0;
1136}
1137
4b32f1aa
TI		 1138static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol,
1139 struct snd_ctl_elem_value *ucontrol)
1da177e4 1140{
4b32f1aa 1141 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1142 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1143 int change;
1144 unsigned int val;
1145
1146 val = (ucontrol->value.iec958.status[0] << 0) |
1147 (ucontrol->value.iec958.status[1] << 8) |
1148 (ucontrol->value.iec958.status[2] << 16) |
1149 (ucontrol->value.iec958.status[3] << 24);
1150 change = val != emu->spdif_bits[idx];
1151 if (change) {
1152 snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
1153 emu->spdif_bits[idx] = val;
1154 }
1155 return change;
1156}
1157
4b32f1aa 1158static struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control =
1da177e4
LT		 1159{
1160 .access = SNDRV_CTL_ELEM_ACCESS_READ,
5549d549 1161 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1162 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
1163 .count = 3,
1164 .info = snd_emu10k1x_spdif_info,
1165 .get = snd_emu10k1x_spdif_get_mask
1166};
1167
4b32f1aa 1168static struct snd_kcontrol_new snd_emu10k1x_spdif_control =
1da177e4 1169{
5549d549 1170 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1171 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1172 .count = 3,
1173 .info = snd_emu10k1x_spdif_info,
1174 .get = snd_emu10k1x_spdif_get,
1175 .put = snd_emu10k1x_spdif_put
1176};
1177
4b32f1aa 1178static int __devinit snd_emu10k1x_mixer(struct emu10k1x *emu)
1da177e4
LT		 1179{
1180 int err;
4b32f1aa
TI		 1181 struct snd_kcontrol *kctl;
1182 struct snd_card *card = emu->card;
1da177e4
LT		 1183
1184 if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu)) == NULL)
1185 return -ENOMEM;
1186 if ((err = snd_ctl_add(card, kctl)))
1187 return err;
1188 if ((kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu)) == NULL)
1189 return -ENOMEM;
1190 if ((err = snd_ctl_add(card, kctl)))
1191 return err;
1192 if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu)) == NULL)
1193 return -ENOMEM;
1194 if ((err = snd_ctl_add(card, kctl)))
1195 return err;
1196
1197 return 0;
1198}
1199
1200#define EMU10K1X_MIDI_MODE_INPUT (1<<0)
1201#define EMU10K1X_MIDI_MODE_OUTPUT (1<<1)
1202
4b32f1aa 1203static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx)
1da177e4
LT		 1204{
1205 return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
1206}
1207
4b32f1aa 1208static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx)
1da177e4
LT		 1209{
1210 snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
1211}
1212
1213#define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
1214#define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
1215#define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
1216#define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
1217
1218#define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
1219#define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
1220
1221#define MPU401_RESET 0xff
1222#define MPU401_ENTER_UART 0x3f
1223#define MPU401_ACK 0xfe
1224
4b32f1aa 1225static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu)
1da177e4
LT		 1226{
1227 int timeout = 100000;
1228 for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
1229 mpu401_read_data(emu, mpu);
1230#ifdef CONFIG_SND_DEBUG
1231 if (timeout <= 0)
1232 snd_printk(KERN_ERR "cmd: clear rx timeout (status = 0x%x)\n", mpu401_read_stat(emu, mpu));
1233#endif
1234}
1235
1236/*
1237
1238 */
1239
4b32f1aa
TI		 1240static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu,
1241 struct emu10k1x_midi *midi, unsigned int status)
1da177e4
LT		 1242{
1243 unsigned char byte;
1244
1245 if (midi->rmidi == NULL) {
1246 snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
1247 return;
1248 }
1249
1250 spin_lock(&midi->input_lock);
1251 if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
1252 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1253 mpu401_clear_rx(emu, midi);
1254 } else {
1255 byte = mpu401_read_data(emu, midi);
1256 if (midi->substream_input)
1257 snd_rawmidi_receive(midi->substream_input, &byte, 1);
1258 }
1259 }
1260 spin_unlock(&midi->input_lock);
1261
1262 spin_lock(&midi->output_lock);
1263 if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
1264 if (midi->substream_output &&
1265 snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
1266 mpu401_write_data(emu, midi, byte);
1267 } else {
1268 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1269 }
1270 }
1271 spin_unlock(&midi->output_lock);
1272}
1273
4b32f1aa 1274static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status)
1da177e4
LT		 1275{
1276 do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
1277}
1278
b130807d 1279static int snd_emu10k1x_midi_cmd(struct emu10k1x * emu,
4b32f1aa 1280 struct emu10k1x_midi *midi, unsigned char cmd, int ack)
1da177e4
LT		 1281{
1282 unsigned long flags;
1283 int timeout, ok;
1284
1285 spin_lock_irqsave(&midi->input_lock, flags);
1286 mpu401_write_data(emu, midi, 0x00);
1287 /* mpu401_clear_rx(emu, midi); */
1288
1289 mpu401_write_cmd(emu, midi, cmd);
1290 if (ack) {
1291 ok = 0;
1292 timeout = 10000;
1293 while (!ok && timeout-- > 0) {
1294 if (mpu401_input_avail(emu, midi)) {
1295 if (mpu401_read_data(emu, midi) == MPU401_ACK)
1296 ok = 1;
1297 }
1298 }
1299 if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
1300 ok = 1;
1301 } else {
1302 ok = 1;
1303 }
1304 spin_unlock_irqrestore(&midi->input_lock, flags);
b130807d 1305 if (!ok) {
1da177e4
LT		 1306 snd_printk(KERN_ERR "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
1307 cmd, emu->port,
1308 mpu401_read_stat(emu, midi),
1309 mpu401_read_data(emu, midi));
b130807d
RD		 1310 return 1;
1311 }
1312 return 0;
1da177e4
LT		 1313}
1314
4b32f1aa 1315static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream)
1da177e4 1316{
4b32f1aa
TI		 1317 struct emu10k1x *emu;
1318 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1319 unsigned long flags;
1320
1321 emu = midi->emu;
da3cec35
TI		 1322 if (snd_BUG_ON(!emu))
1323 return -ENXIO;
1da177e4
LT		 1324 spin_lock_irqsave(&midi->open_lock, flags);
1325 midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
1326 midi->substream_input = substream;
1327 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
1328 spin_unlock_irqrestore(&midi->open_lock, flags);
b130807d
RD		 1329 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
1330 goto error_out;
1331 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
1332 goto error_out;
1da177e4
LT		 1333 } else {
1334 spin_unlock_irqrestore(&midi->open_lock, flags);
1335 }
1336 return 0;
b130807d
RD		 1337
1338error_out:
1339 return -EIO;
1da177e4
LT		 1340}
1341
4b32f1aa 1342static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream)
1da177e4 1343{
4b32f1aa
TI		 1344 struct emu10k1x *emu;
1345 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1346 unsigned long flags;
1347
1348 emu = midi->emu;
da3cec35
TI		 1349 if (snd_BUG_ON(!emu))
1350 return -ENXIO;
1da177e4
LT		 1351 spin_lock_irqsave(&midi->open_lock, flags);
1352 midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
1353 midi->substream_output = substream;
1354 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1355 spin_unlock_irqrestore(&midi->open_lock, flags);
b130807d
RD		 1356 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
1357 goto error_out;
1358 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
1359 goto error_out;
1da177e4
LT		 1360 } else {
1361 spin_unlock_irqrestore(&midi->open_lock, flags);
1362 }
1363 return 0;
b130807d
RD		 1364
1365error_out:
1366 return -EIO;
1da177e4
LT		 1367}
1368
4b32f1aa 1369static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream)
1da177e4 1370{
4b32f1aa
TI		 1371 struct emu10k1x *emu;
1372 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4 1373 unsigned long flags;
b130807d 1374 int err = 0;
1da177e4
LT		 1375
1376 emu = midi->emu;
da3cec35
TI		 1377 if (snd_BUG_ON(!emu))
1378 return -ENXIO;
1da177e4
LT		 1379 spin_lock_irqsave(&midi->open_lock, flags);
1380 snd_emu10k1x_intr_disable(emu, midi->rx_enable);
1381 midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
1382 midi->substream_input = NULL;
1383 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
1384 spin_unlock_irqrestore(&midi->open_lock, flags);
b130807d 1385 err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
1da177e4
LT		 1386 } else {
1387 spin_unlock_irqrestore(&midi->open_lock, flags);
1388 }
b130807d 1389 return err;
1da177e4
LT		 1390}
1391
4b32f1aa 1392static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream)
1da177e4 1393{
4b32f1aa
TI		 1394 struct emu10k1x *emu;
1395 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4 1396 unsigned long flags;
b130807d 1397 int err = 0;
1da177e4
LT		 1398
1399 emu = midi->emu;
da3cec35
TI		 1400 if (snd_BUG_ON(!emu))
1401 return -ENXIO;
1da177e4
LT		 1402 spin_lock_irqsave(&midi->open_lock, flags);
1403 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1404 midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
1405 midi->substream_output = NULL;
1406 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1407 spin_unlock_irqrestore(&midi->open_lock, flags);
b130807d 1408 err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
1da177e4
LT		 1409 } else {
1410 spin_unlock_irqrestore(&midi->open_lock, flags);
1411 }
b130807d 1412 return err;
1da177e4
LT		 1413}
1414
4b32f1aa 1415static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1da177e4 1416{
4b32f1aa
TI		 1417 struct emu10k1x *emu;
1418 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4 1419 emu = midi->emu;
da3cec35
TI		 1420 if (snd_BUG_ON(!emu))
1421 return;
1da177e4
LT		 1422
1423 if (up)
1424 snd_emu10k1x_intr_enable(emu, midi->rx_enable);
1425 else
1426 snd_emu10k1x_intr_disable(emu, midi->rx_enable);
1427}
1428
4b32f1aa 1429static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1da177e4 1430{
4b32f1aa
TI		 1431 struct emu10k1x *emu;
1432 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1433 unsigned long flags;
1434
1435 emu = midi->emu;
da3cec35
TI		 1436 if (snd_BUG_ON(!emu))
1437 return;
1da177e4
LT		 1438
1439 if (up) {
1440 int max = 4;
1441 unsigned char byte;
1442
1443 /* try to send some amount of bytes here before interrupts */
1444 spin_lock_irqsave(&midi->output_lock, flags);
1445 while (max > 0) {
1446 if (mpu401_output_ready(emu, midi)) {
1447 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
1448 snd_rawmidi_transmit(substream, &byte, 1) != 1) {
1449 /* no more data */
1450 spin_unlock_irqrestore(&midi->output_lock, flags);
1451 return;
1452 }
1453 mpu401_write_data(emu, midi, byte);
1454 max--;
1455 } else {
1456 break;
1457 }
1458 }
1459 spin_unlock_irqrestore(&midi->output_lock, flags);
1460 snd_emu10k1x_intr_enable(emu, midi->tx_enable);
1461 } else {
1462 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1463 }
1464}
1465
1466/*
1467
1468 */
1469
4b32f1aa 1470static struct snd_rawmidi_ops snd_emu10k1x_midi_output =
1da177e4
LT		 1471{
1472 .open = snd_emu10k1x_midi_output_open,
1473 .close = snd_emu10k1x_midi_output_close,
1474 .trigger = snd_emu10k1x_midi_output_trigger,
1475};
1476
4b32f1aa 1477static struct snd_rawmidi_ops snd_emu10k1x_midi_input =
1da177e4
LT		 1478{
1479 .open = snd_emu10k1x_midi_input_open,
1480 .close = snd_emu10k1x_midi_input_close,
1481 .trigger = snd_emu10k1x_midi_input_trigger,
1482};
1483
4b32f1aa 1484static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi)
1da177e4 1485{
4b32f1aa 1486 struct emu10k1x_midi *midi = rmidi->private_data;
1da177e4
LT		 1487 midi->interrupt = NULL;
1488 midi->rmidi = NULL;
1489}
1490
4b32f1aa
TI		 1491static int __devinit emu10k1x_midi_init(struct emu10k1x *emu,
1492 struct emu10k1x_midi *midi, int device, char *name)
1da177e4 1493{
4b32f1aa 1494 struct snd_rawmidi *rmidi;
1da177e4
LT		 1495 int err;
1496
1497 if ((err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi)) < 0)
1498 return err;
1499 midi->emu = emu;
1500 spin_lock_init(&midi->open_lock);
1501 spin_lock_init(&midi->input_lock);
1502 spin_lock_init(&midi->output_lock);
1503 strcpy(rmidi->name, name);
1504 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
1505 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
1506 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1507 SNDRV_RAWMIDI_INFO_INPUT |
1508 SNDRV_RAWMIDI_INFO_DUPLEX;
1509 rmidi->private_data = midi;
1510 rmidi->private_free = snd_emu10k1x_midi_free;
1511 midi->rmidi = rmidi;
1512 return 0;
1513}
1514
4b32f1aa 1515static int __devinit snd_emu10k1x_midi(struct emu10k1x *emu)
1da177e4 1516{
4b32f1aa 1517 struct emu10k1x_midi *midi = &emu->midi;
1da177e4
LT		 1518 int err;
1519
1520 if ((err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)")) < 0)
1521 return err;
1522
1523 midi->tx_enable = INTE_MIDITXENABLE;
1524 midi->rx_enable = INTE_MIDIRXENABLE;
1525 midi->port = MUDATA;
1526 midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
1527 midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
1528 midi->interrupt = snd_emu10k1x_midi_interrupt;
1529 return 0;
1530}
1531
1532static int __devinit snd_emu10k1x_probe(struct pci_dev *pci,
1533 const struct pci_device_id *pci_id)
1534{
1535 static int dev;
4b32f1aa
TI		 1536 struct snd_card *card;
1537 struct emu10k1x *chip;
1da177e4
LT		 1538 int err;
1539
1540 if (dev >= SNDRV_CARDS)
1541 return -ENODEV;
1542 if (!enable[dev]) {
1543 dev++;
1544 return -ENOENT;
1545 }
1546
e58de7ba
TI		 1547 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
1548 if (err < 0)
1549 return err;
1da177e4
LT		 1550
1551 if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) {
1552 snd_card_free(card);
1553 return err;
1554 }
1555
1556 if ((err = snd_emu10k1x_pcm(chip, 0, NULL)) < 0) {
1557 snd_card_free(card);
1558 return err;
1559 }
1560 if ((err = snd_emu10k1x_pcm(chip, 1, NULL)) < 0) {
1561 snd_card_free(card);
1562 return err;
1563 }
1564 if ((err = snd_emu10k1x_pcm(chip, 2, NULL)) < 0) {
1565 snd_card_free(card);
1566 return err;
1567 }
1568
1569 if ((err = snd_emu10k1x_ac97(chip)) < 0) {
1570 snd_card_free(card);
1571 return err;
1572 }
1573
1574 if ((err = snd_emu10k1x_mixer(chip)) < 0) {
1575 snd_card_free(card);
1576 return err;
1577 }
1578
1579 if ((err = snd_emu10k1x_midi(chip)) < 0) {
1580 snd_card_free(card);
1581 return err;
1582 }
1583
1584 snd_emu10k1x_proc_init(chip);
1585
1586 strcpy(card->driver, "EMU10K1X");
1587 strcpy(card->shortname, "Dell Sound Blaster Live!");
1588 sprintf(card->longname, "%s at 0x%lx irq %i",
1589 card->shortname, chip->port, chip->irq);
1590
682fc0a5
TI		 1591 snd_card_set_dev(card, &pci->dev);
1592
1da177e4
LT		 1593 if ((err = snd_card_register(card)) < 0) {
1594 snd_card_free(card);
1595 return err;
1596 }
1597
1598 pci_set_drvdata(pci, card);
1599 dev++;
1600 return 0;
1601}
1602
1603static void __devexit snd_emu10k1x_remove(struct pci_dev *pci)
1604{
1605 snd_card_free(pci_get_drvdata(pci));
1606 pci_set_drvdata(pci, NULL);
1607}
1608
1609// PCI IDs
f40b6890 1610static struct pci_device_id snd_emu10k1x_ids[] = {
1da177e4
LT		 1611 { 0x1102, 0x0006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* Dell OEM version (EMU10K1) */
1612 { 0, }
1613};
1614MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
1615
1616// pci_driver definition
1617static struct pci_driver driver = {
1618 .name = "EMU10K1X",
1619 .id_table = snd_emu10k1x_ids,
1620 .probe = snd_emu10k1x_probe,
1621 .remove = __devexit_p(snd_emu10k1x_remove),
1622};
1623
1624// initialization of the module
1625static int __init alsa_card_emu10k1x_init(void)
1626{
80b556f2 1627 return pci_register_driver(&driver);
1da177e4
LT		 1628}
1629
1630// clean up the module
1631static void __exit alsa_card_emu10k1x_exit(void)
1632{
1633 pci_unregister_driver(&driver);
1634}
1635
1636module_init(alsa_card_emu10k1x_init)
1637module_exit(alsa_card_emu10k1x_exit)
Linux kernel - Deliverables
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