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1da177e4 LT |
1 | /* |
2 | * The driver for the ForteMedia FM801 based soundcards | |
3 | * Copyright (c) by Jaroslav Kysela <perex@suse.cz> | |
4 | * | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <sound/driver.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/moduleparam.h> | |
29 | #include <sound/core.h> | |
30 | #include <sound/pcm.h> | |
31 | #include <sound/ac97_codec.h> | |
32 | #include <sound/mpu401.h> | |
33 | #include <sound/opl3.h> | |
34 | #include <sound/initval.h> | |
35 | ||
36 | #include <asm/io.h> | |
37 | ||
38 | #if (defined(CONFIG_SND_FM801_TEA575X) || defined(CONFIG_SND_FM801_TEA575X_MODULE)) && (defined(CONFIG_VIDEO_DEV) || defined(CONFIG_VIDEO_DEV_MODULE)) | |
39 | #include <sound/tea575x-tuner.h> | |
40 | #define TEA575X_RADIO 1 | |
41 | #endif | |
42 | ||
43 | MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); | |
44 | MODULE_DESCRIPTION("ForteMedia FM801"); | |
45 | MODULE_LICENSE("GPL"); | |
46 | MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801}," | |
47 | "{Genius,SoundMaker Live 5.1}}"); | |
48 | ||
49 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
50 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
51 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | |
52 | /* | |
53 | * Enable TEA575x tuner | |
54 | * 1 = MediaForte 256-PCS | |
55 | * 2 = MediaForte 256-PCPR | |
56 | * 3 = MediaForte 64-PCR | |
57 | * High 16-bits are video (radio) device number + 1 | |
58 | */ | |
59 | static int tea575x_tuner[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; | |
60 | ||
61 | module_param_array(index, int, NULL, 0444); | |
62 | MODULE_PARM_DESC(index, "Index value for the FM801 soundcard."); | |
63 | module_param_array(id, charp, NULL, 0444); | |
64 | MODULE_PARM_DESC(id, "ID string for the FM801 soundcard."); | |
65 | module_param_array(enable, bool, NULL, 0444); | |
66 | MODULE_PARM_DESC(enable, "Enable FM801 soundcard."); | |
67 | module_param_array(tea575x_tuner, int, NULL, 0444); | |
68 | MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner."); | |
69 | ||
70 | /* | |
71 | * Direct registers | |
72 | */ | |
73 | ||
74 | #define FM801_REG(chip, reg) (chip->port + FM801_##reg) | |
75 | ||
76 | #define FM801_PCM_VOL 0x00 /* PCM Output Volume */ | |
77 | #define FM801_FM_VOL 0x02 /* FM Output Volume */ | |
78 | #define FM801_I2S_VOL 0x04 /* I2S Volume */ | |
79 | #define FM801_REC_SRC 0x06 /* Record Source */ | |
80 | #define FM801_PLY_CTRL 0x08 /* Playback Control */ | |
81 | #define FM801_PLY_COUNT 0x0a /* Playback Count */ | |
82 | #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */ | |
83 | #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */ | |
84 | #define FM801_CAP_CTRL 0x14 /* Capture Control */ | |
85 | #define FM801_CAP_COUNT 0x16 /* Capture Count */ | |
86 | #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */ | |
87 | #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */ | |
88 | #define FM801_CODEC_CTRL 0x22 /* Codec Control */ | |
89 | #define FM801_I2S_MODE 0x24 /* I2S Mode Control */ | |
90 | #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */ | |
91 | #define FM801_I2C_CTRL 0x29 /* I2C Control */ | |
92 | #define FM801_AC97_CMD 0x2a /* AC'97 Command */ | |
93 | #define FM801_AC97_DATA 0x2c /* AC'97 Data */ | |
94 | #define FM801_MPU401_DATA 0x30 /* MPU401 Data */ | |
95 | #define FM801_MPU401_CMD 0x31 /* MPU401 Command */ | |
96 | #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */ | |
97 | #define FM801_GEN_CTRL 0x54 /* General Control */ | |
98 | #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */ | |
99 | #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */ | |
100 | #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */ | |
101 | #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */ | |
102 | #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */ | |
103 | #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */ | |
104 | #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */ | |
105 | ||
106 | #define FM801_AC97_ADDR_SHIFT 10 | |
107 | ||
108 | /* playback and record control register bits */ | |
109 | #define FM801_BUF1_LAST (1<<1) | |
110 | #define FM801_BUF2_LAST (1<<2) | |
111 | #define FM801_START (1<<5) | |
112 | #define FM801_PAUSE (1<<6) | |
113 | #define FM801_IMMED_STOP (1<<7) | |
114 | #define FM801_RATE_SHIFT 8 | |
115 | #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT) | |
116 | #define FM801_CHANNELS_4 (1<<12) /* playback only */ | |
117 | #define FM801_CHANNELS_6 (2<<12) /* playback only */ | |
118 | #define FM801_CHANNELS_6MS (3<<12) /* playback only */ | |
119 | #define FM801_CHANNELS_MASK (3<<12) | |
120 | #define FM801_16BIT (1<<14) | |
121 | #define FM801_STEREO (1<<15) | |
122 | ||
123 | /* IRQ status bits */ | |
124 | #define FM801_IRQ_PLAYBACK (1<<8) | |
125 | #define FM801_IRQ_CAPTURE (1<<9) | |
126 | #define FM801_IRQ_VOLUME (1<<14) | |
127 | #define FM801_IRQ_MPU (1<<15) | |
128 | ||
129 | /* GPIO control register */ | |
130 | #define FM801_GPIO_GP0 (1<<0) /* read/write */ | |
131 | #define FM801_GPIO_GP1 (1<<1) | |
132 | #define FM801_GPIO_GP2 (1<<2) | |
133 | #define FM801_GPIO_GP3 (1<<3) | |
134 | #define FM801_GPIO_GP(x) (1<<(0+(x))) | |
135 | #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/ | |
136 | #define FM801_GPIO_GD1 (1<<9) | |
137 | #define FM801_GPIO_GD2 (1<<10) | |
138 | #define FM801_GPIO_GD3 (1<<11) | |
139 | #define FM801_GPIO_GD(x) (1<<(8+(x))) | |
140 | #define FM801_GPIO_GS0 (1<<12) /* function select: */ | |
141 | #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */ | |
142 | #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */ | |
143 | #define FM801_GPIO_GS3 (1<<15) | |
144 | #define FM801_GPIO_GS(x) (1<<(12+(x))) | |
145 | ||
146 | /* | |
147 | ||
148 | */ | |
149 | ||
a5f22156 | 150 | struct fm801 { |
1da177e4 LT |
151 | int irq; |
152 | ||
153 | unsigned long port; /* I/O port number */ | |
154 | unsigned int multichannel: 1, /* multichannel support */ | |
155 | secondary: 1; /* secondary codec */ | |
156 | unsigned char secondary_addr; /* address of the secondary codec */ | |
157 | ||
158 | unsigned short ply_ctrl; /* playback control */ | |
159 | unsigned short cap_ctrl; /* capture control */ | |
160 | ||
161 | unsigned long ply_buffer; | |
162 | unsigned int ply_buf; | |
163 | unsigned int ply_count; | |
164 | unsigned int ply_size; | |
165 | unsigned int ply_pos; | |
166 | ||
167 | unsigned long cap_buffer; | |
168 | unsigned int cap_buf; | |
169 | unsigned int cap_count; | |
170 | unsigned int cap_size; | |
171 | unsigned int cap_pos; | |
172 | ||
a5f22156 TI |
173 | struct snd_ac97_bus *ac97_bus; |
174 | struct snd_ac97 *ac97; | |
175 | struct snd_ac97 *ac97_sec; | |
1da177e4 LT |
176 | |
177 | struct pci_dev *pci; | |
a5f22156 TI |
178 | struct snd_card *card; |
179 | struct snd_pcm *pcm; | |
180 | struct snd_rawmidi *rmidi; | |
181 | struct snd_pcm_substream *playback_substream; | |
182 | struct snd_pcm_substream *capture_substream; | |
1da177e4 LT |
183 | unsigned int p_dma_size; |
184 | unsigned int c_dma_size; | |
185 | ||
186 | spinlock_t reg_lock; | |
a5f22156 | 187 | struct snd_info_entry *proc_entry; |
1da177e4 LT |
188 | |
189 | #ifdef TEA575X_RADIO | |
a5f22156 | 190 | struct snd_tea575x tea; |
1da177e4 LT |
191 | #endif |
192 | }; | |
193 | ||
194 | static struct pci_device_id snd_fm801_ids[] = { | |
195 | { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */ | |
26be8659 | 196 | { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */ |
1da177e4 LT |
197 | { 0, } |
198 | }; | |
199 | ||
200 | MODULE_DEVICE_TABLE(pci, snd_fm801_ids); | |
201 | ||
202 | /* | |
203 | * common I/O routines | |
204 | */ | |
205 | ||
a5f22156 | 206 | static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg, |
1da177e4 LT |
207 | unsigned short mask, unsigned short value) |
208 | { | |
209 | int change; | |
210 | unsigned long flags; | |
211 | unsigned short old, new; | |
212 | ||
213 | spin_lock_irqsave(&chip->reg_lock, flags); | |
214 | old = inw(chip->port + reg); | |
215 | new = (old & ~mask) | value; | |
216 | change = old != new; | |
217 | if (change) | |
218 | outw(new, chip->port + reg); | |
219 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
220 | return change; | |
221 | } | |
222 | ||
a5f22156 | 223 | static void snd_fm801_codec_write(struct snd_ac97 *ac97, |
1da177e4 LT |
224 | unsigned short reg, |
225 | unsigned short val) | |
226 | { | |
a5f22156 | 227 | struct fm801 *chip = ac97->private_data; |
1da177e4 LT |
228 | int idx; |
229 | ||
230 | /* | |
231 | * Wait until the codec interface is not ready.. | |
232 | */ | |
233 | for (idx = 0; idx < 100; idx++) { | |
234 | if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9))) | |
235 | goto ok1; | |
236 | udelay(10); | |
237 | } | |
99b359ba | 238 | snd_printk(KERN_ERR "AC'97 interface is busy (1)\n"); |
1da177e4 LT |
239 | return; |
240 | ||
241 | ok1: | |
242 | /* write data and address */ | |
243 | outw(val, FM801_REG(chip, AC97_DATA)); | |
244 | outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD)); | |
245 | /* | |
246 | * Wait until the write command is not completed.. | |
247 | */ | |
248 | for (idx = 0; idx < 1000; idx++) { | |
249 | if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9))) | |
250 | return; | |
251 | udelay(10); | |
252 | } | |
99b359ba | 253 | snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num); |
1da177e4 LT |
254 | } |
255 | ||
a5f22156 | 256 | static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg) |
1da177e4 | 257 | { |
a5f22156 | 258 | struct fm801 *chip = ac97->private_data; |
1da177e4 LT |
259 | int idx; |
260 | ||
261 | /* | |
262 | * Wait until the codec interface is not ready.. | |
263 | */ | |
264 | for (idx = 0; idx < 100; idx++) { | |
265 | if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9))) | |
266 | goto ok1; | |
267 | udelay(10); | |
268 | } | |
99b359ba | 269 | snd_printk(KERN_ERR "AC'97 interface is busy (1)\n"); |
1da177e4 LT |
270 | return 0; |
271 | ||
272 | ok1: | |
273 | /* read command */ | |
274 | outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | (1<<7), FM801_REG(chip, AC97_CMD)); | |
275 | for (idx = 0; idx < 100; idx++) { | |
276 | if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9))) | |
277 | goto ok2; | |
278 | udelay(10); | |
279 | } | |
99b359ba | 280 | snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num); |
1da177e4 LT |
281 | return 0; |
282 | ||
283 | ok2: | |
284 | for (idx = 0; idx < 1000; idx++) { | |
285 | if (inw(FM801_REG(chip, AC97_CMD)) & (1<<8)) | |
286 | goto ok3; | |
287 | udelay(10); | |
288 | } | |
99b359ba | 289 | snd_printk(KERN_ERR "AC'97 interface #%d is not valid (2)\n", ac97->num); |
1da177e4 LT |
290 | return 0; |
291 | ||
292 | ok3: | |
293 | return inw(FM801_REG(chip, AC97_DATA)); | |
294 | } | |
295 | ||
296 | static unsigned int rates[] = { | |
297 | 5500, 8000, 9600, 11025, | |
298 | 16000, 19200, 22050, 32000, | |
299 | 38400, 44100, 48000 | |
300 | }; | |
301 | ||
a5f22156 | 302 | static struct snd_pcm_hw_constraint_list hw_constraints_rates = { |
1da177e4 LT |
303 | .count = ARRAY_SIZE(rates), |
304 | .list = rates, | |
305 | .mask = 0, | |
306 | }; | |
307 | ||
308 | static unsigned int channels[] = { | |
309 | 2, 4, 6 | |
310 | }; | |
311 | ||
312 | #define CHANNELS sizeof(channels) / sizeof(channels[0]) | |
313 | ||
a5f22156 | 314 | static struct snd_pcm_hw_constraint_list hw_constraints_channels = { |
1da177e4 LT |
315 | .count = CHANNELS, |
316 | .list = channels, | |
317 | .mask = 0, | |
318 | }; | |
319 | ||
320 | /* | |
321 | * Sample rate routines | |
322 | */ | |
323 | ||
324 | static unsigned short snd_fm801_rate_bits(unsigned int rate) | |
325 | { | |
326 | unsigned int idx; | |
327 | ||
328 | for (idx = 0; idx < ARRAY_SIZE(rates); idx++) | |
329 | if (rates[idx] == rate) | |
330 | return idx; | |
331 | snd_BUG(); | |
332 | return ARRAY_SIZE(rates) - 1; | |
333 | } | |
334 | ||
335 | /* | |
336 | * PCM part | |
337 | */ | |
338 | ||
a5f22156 | 339 | static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
340 | int cmd) |
341 | { | |
a5f22156 | 342 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
343 | |
344 | spin_lock(&chip->reg_lock); | |
345 | switch (cmd) { | |
346 | case SNDRV_PCM_TRIGGER_START: | |
347 | chip->ply_ctrl &= ~(FM801_BUF1_LAST | | |
348 | FM801_BUF2_LAST | | |
349 | FM801_PAUSE); | |
350 | chip->ply_ctrl |= FM801_START | | |
351 | FM801_IMMED_STOP; | |
352 | break; | |
353 | case SNDRV_PCM_TRIGGER_STOP: | |
354 | chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE); | |
355 | break; | |
356 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
357 | chip->ply_ctrl |= FM801_PAUSE; | |
358 | break; | |
359 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
360 | chip->ply_ctrl &= ~FM801_PAUSE; | |
361 | break; | |
362 | default: | |
363 | spin_unlock(&chip->reg_lock); | |
364 | snd_BUG(); | |
365 | return -EINVAL; | |
366 | } | |
367 | outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL)); | |
368 | spin_unlock(&chip->reg_lock); | |
369 | return 0; | |
370 | } | |
371 | ||
a5f22156 | 372 | static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
373 | int cmd) |
374 | { | |
a5f22156 | 375 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
376 | |
377 | spin_lock(&chip->reg_lock); | |
378 | switch (cmd) { | |
379 | case SNDRV_PCM_TRIGGER_START: | |
380 | chip->cap_ctrl &= ~(FM801_BUF1_LAST | | |
381 | FM801_BUF2_LAST | | |
382 | FM801_PAUSE); | |
383 | chip->cap_ctrl |= FM801_START | | |
384 | FM801_IMMED_STOP; | |
385 | break; | |
386 | case SNDRV_PCM_TRIGGER_STOP: | |
387 | chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE); | |
388 | break; | |
389 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
390 | chip->cap_ctrl |= FM801_PAUSE; | |
391 | break; | |
392 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
393 | chip->cap_ctrl &= ~FM801_PAUSE; | |
394 | break; | |
395 | default: | |
396 | spin_unlock(&chip->reg_lock); | |
397 | snd_BUG(); | |
398 | return -EINVAL; | |
399 | } | |
400 | outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL)); | |
401 | spin_unlock(&chip->reg_lock); | |
402 | return 0; | |
403 | } | |
404 | ||
a5f22156 TI |
405 | static int snd_fm801_hw_params(struct snd_pcm_substream *substream, |
406 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 LT |
407 | { |
408 | return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | |
409 | } | |
410 | ||
a5f22156 | 411 | static int snd_fm801_hw_free(struct snd_pcm_substream *substream) |
1da177e4 LT |
412 | { |
413 | return snd_pcm_lib_free_pages(substream); | |
414 | } | |
415 | ||
a5f22156 | 416 | static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 417 | { |
a5f22156 TI |
418 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
419 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
420 | |
421 | chip->ply_size = snd_pcm_lib_buffer_bytes(substream); | |
422 | chip->ply_count = snd_pcm_lib_period_bytes(substream); | |
423 | spin_lock_irq(&chip->reg_lock); | |
424 | chip->ply_ctrl &= ~(FM801_START | FM801_16BIT | | |
425 | FM801_STEREO | FM801_RATE_MASK | | |
426 | FM801_CHANNELS_MASK); | |
427 | if (snd_pcm_format_width(runtime->format) == 16) | |
428 | chip->ply_ctrl |= FM801_16BIT; | |
429 | if (runtime->channels > 1) { | |
430 | chip->ply_ctrl |= FM801_STEREO; | |
431 | if (runtime->channels == 4) | |
432 | chip->ply_ctrl |= FM801_CHANNELS_4; | |
433 | else if (runtime->channels == 6) | |
434 | chip->ply_ctrl |= FM801_CHANNELS_6; | |
435 | } | |
436 | chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; | |
437 | chip->ply_buf = 0; | |
438 | outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL)); | |
439 | outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT)); | |
440 | chip->ply_buffer = runtime->dma_addr; | |
441 | chip->ply_pos = 0; | |
442 | outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1)); | |
443 | outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2)); | |
444 | spin_unlock_irq(&chip->reg_lock); | |
445 | return 0; | |
446 | } | |
447 | ||
a5f22156 | 448 | static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 449 | { |
a5f22156 TI |
450 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
451 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
452 | |
453 | chip->cap_size = snd_pcm_lib_buffer_bytes(substream); | |
454 | chip->cap_count = snd_pcm_lib_period_bytes(substream); | |
455 | spin_lock_irq(&chip->reg_lock); | |
456 | chip->cap_ctrl &= ~(FM801_START | FM801_16BIT | | |
457 | FM801_STEREO | FM801_RATE_MASK); | |
458 | if (snd_pcm_format_width(runtime->format) == 16) | |
459 | chip->cap_ctrl |= FM801_16BIT; | |
460 | if (runtime->channels > 1) | |
461 | chip->cap_ctrl |= FM801_STEREO; | |
462 | chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; | |
463 | chip->cap_buf = 0; | |
464 | outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL)); | |
465 | outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT)); | |
466 | chip->cap_buffer = runtime->dma_addr; | |
467 | chip->cap_pos = 0; | |
468 | outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1)); | |
469 | outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2)); | |
470 | spin_unlock_irq(&chip->reg_lock); | |
471 | return 0; | |
472 | } | |
473 | ||
a5f22156 | 474 | static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 475 | { |
a5f22156 | 476 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
477 | size_t ptr; |
478 | ||
479 | if (!(chip->ply_ctrl & FM801_START)) | |
480 | return 0; | |
481 | spin_lock(&chip->reg_lock); | |
482 | ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT)); | |
483 | if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) { | |
484 | ptr += chip->ply_count; | |
485 | ptr %= chip->ply_size; | |
486 | } | |
487 | spin_unlock(&chip->reg_lock); | |
488 | return bytes_to_frames(substream->runtime, ptr); | |
489 | } | |
490 | ||
a5f22156 | 491 | static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 492 | { |
a5f22156 | 493 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
494 | size_t ptr; |
495 | ||
496 | if (!(chip->cap_ctrl & FM801_START)) | |
497 | return 0; | |
498 | spin_lock(&chip->reg_lock); | |
499 | ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT)); | |
500 | if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) { | |
501 | ptr += chip->cap_count; | |
502 | ptr %= chip->cap_size; | |
503 | } | |
504 | spin_unlock(&chip->reg_lock); | |
505 | return bytes_to_frames(substream->runtime, ptr); | |
506 | } | |
507 | ||
508 | static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
509 | { | |
a5f22156 | 510 | struct fm801 *chip = dev_id; |
1da177e4 LT |
511 | unsigned short status; |
512 | unsigned int tmp; | |
513 | ||
514 | status = inw(FM801_REG(chip, IRQ_STATUS)); | |
515 | status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME; | |
516 | if (! status) | |
517 | return IRQ_NONE; | |
518 | /* ack first */ | |
519 | outw(status, FM801_REG(chip, IRQ_STATUS)); | |
520 | if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) { | |
521 | spin_lock(&chip->reg_lock); | |
522 | chip->ply_buf++; | |
523 | chip->ply_pos += chip->ply_count; | |
524 | chip->ply_pos %= chip->ply_size; | |
525 | tmp = chip->ply_pos + chip->ply_count; | |
526 | tmp %= chip->ply_size; | |
527 | outl(chip->ply_buffer + tmp, | |
528 | (chip->ply_buf & 1) ? | |
529 | FM801_REG(chip, PLY_BUF1) : | |
530 | FM801_REG(chip, PLY_BUF2)); | |
531 | spin_unlock(&chip->reg_lock); | |
532 | snd_pcm_period_elapsed(chip->playback_substream); | |
533 | } | |
534 | if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) { | |
535 | spin_lock(&chip->reg_lock); | |
536 | chip->cap_buf++; | |
537 | chip->cap_pos += chip->cap_count; | |
538 | chip->cap_pos %= chip->cap_size; | |
539 | tmp = chip->cap_pos + chip->cap_count; | |
540 | tmp %= chip->cap_size; | |
541 | outl(chip->cap_buffer + tmp, | |
542 | (chip->cap_buf & 1) ? | |
543 | FM801_REG(chip, CAP_BUF1) : | |
544 | FM801_REG(chip, CAP_BUF2)); | |
545 | spin_unlock(&chip->reg_lock); | |
546 | snd_pcm_period_elapsed(chip->capture_substream); | |
547 | } | |
548 | if (chip->rmidi && (status & FM801_IRQ_MPU)) | |
549 | snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); | |
550 | if (status & FM801_IRQ_VOLUME) | |
551 | ;/* TODO */ | |
552 | ||
553 | return IRQ_HANDLED; | |
554 | } | |
555 | ||
a5f22156 | 556 | static struct snd_pcm_hardware snd_fm801_playback = |
1da177e4 LT |
557 | { |
558 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
559 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
560 | SNDRV_PCM_INFO_PAUSE | | |
561 | SNDRV_PCM_INFO_MMAP_VALID), | |
562 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
563 | .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, | |
564 | .rate_min = 5500, | |
565 | .rate_max = 48000, | |
566 | .channels_min = 1, | |
567 | .channels_max = 2, | |
568 | .buffer_bytes_max = (128*1024), | |
569 | .period_bytes_min = 64, | |
570 | .period_bytes_max = (128*1024), | |
571 | .periods_min = 1, | |
572 | .periods_max = 1024, | |
573 | .fifo_size = 0, | |
574 | }; | |
575 | ||
a5f22156 | 576 | static struct snd_pcm_hardware snd_fm801_capture = |
1da177e4 LT |
577 | { |
578 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
579 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
580 | SNDRV_PCM_INFO_PAUSE | | |
581 | SNDRV_PCM_INFO_MMAP_VALID), | |
582 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
583 | .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, | |
584 | .rate_min = 5500, | |
585 | .rate_max = 48000, | |
586 | .channels_min = 1, | |
587 | .channels_max = 2, | |
588 | .buffer_bytes_max = (128*1024), | |
589 | .period_bytes_min = 64, | |
590 | .period_bytes_max = (128*1024), | |
591 | .periods_min = 1, | |
592 | .periods_max = 1024, | |
593 | .fifo_size = 0, | |
594 | }; | |
595 | ||
a5f22156 | 596 | static int snd_fm801_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 597 | { |
a5f22156 TI |
598 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
599 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
600 | int err; |
601 | ||
602 | chip->playback_substream = substream; | |
603 | runtime->hw = snd_fm801_playback; | |
a5f22156 TI |
604 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, |
605 | &hw_constraints_rates); | |
1da177e4 LT |
606 | if (chip->multichannel) { |
607 | runtime->hw.channels_max = 6; | |
a5f22156 TI |
608 | snd_pcm_hw_constraint_list(runtime, 0, |
609 | SNDRV_PCM_HW_PARAM_CHANNELS, | |
610 | &hw_constraints_channels); | |
1da177e4 LT |
611 | } |
612 | if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) | |
613 | return err; | |
614 | return 0; | |
615 | } | |
616 | ||
a5f22156 | 617 | static int snd_fm801_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 618 | { |
a5f22156 TI |
619 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
620 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
621 | int err; |
622 | ||
623 | chip->capture_substream = substream; | |
624 | runtime->hw = snd_fm801_capture; | |
a5f22156 TI |
625 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, |
626 | &hw_constraints_rates); | |
1da177e4 LT |
627 | if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) |
628 | return err; | |
629 | return 0; | |
630 | } | |
631 | ||
a5f22156 | 632 | static int snd_fm801_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 633 | { |
a5f22156 | 634 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
635 | |
636 | chip->playback_substream = NULL; | |
637 | return 0; | |
638 | } | |
639 | ||
a5f22156 | 640 | static int snd_fm801_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 641 | { |
a5f22156 | 642 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
643 | |
644 | chip->capture_substream = NULL; | |
645 | return 0; | |
646 | } | |
647 | ||
a5f22156 | 648 | static struct snd_pcm_ops snd_fm801_playback_ops = { |
1da177e4 LT |
649 | .open = snd_fm801_playback_open, |
650 | .close = snd_fm801_playback_close, | |
651 | .ioctl = snd_pcm_lib_ioctl, | |
652 | .hw_params = snd_fm801_hw_params, | |
653 | .hw_free = snd_fm801_hw_free, | |
654 | .prepare = snd_fm801_playback_prepare, | |
655 | .trigger = snd_fm801_playback_trigger, | |
656 | .pointer = snd_fm801_playback_pointer, | |
657 | }; | |
658 | ||
a5f22156 | 659 | static struct snd_pcm_ops snd_fm801_capture_ops = { |
1da177e4 LT |
660 | .open = snd_fm801_capture_open, |
661 | .close = snd_fm801_capture_close, | |
662 | .ioctl = snd_pcm_lib_ioctl, | |
663 | .hw_params = snd_fm801_hw_params, | |
664 | .hw_free = snd_fm801_hw_free, | |
665 | .prepare = snd_fm801_capture_prepare, | |
666 | .trigger = snd_fm801_capture_trigger, | |
667 | .pointer = snd_fm801_capture_pointer, | |
668 | }; | |
669 | ||
a5f22156 | 670 | static int __devinit snd_fm801_pcm(struct fm801 *chip, int device, struct snd_pcm ** rpcm) |
1da177e4 | 671 | { |
a5f22156 | 672 | struct snd_pcm *pcm; |
1da177e4 LT |
673 | int err; |
674 | ||
675 | if (rpcm) | |
676 | *rpcm = NULL; | |
677 | if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0) | |
678 | return err; | |
679 | ||
680 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops); | |
681 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops); | |
682 | ||
683 | pcm->private_data = chip; | |
1da177e4 LT |
684 | pcm->info_flags = 0; |
685 | strcpy(pcm->name, "FM801"); | |
686 | chip->pcm = pcm; | |
687 | ||
688 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
689 | snd_dma_pci_data(chip->pci), | |
690 | chip->multichannel ? 128*1024 : 64*1024, 128*1024); | |
691 | ||
692 | if (rpcm) | |
693 | *rpcm = pcm; | |
694 | return 0; | |
695 | } | |
696 | ||
697 | /* | |
698 | * TEA5757 radio | |
699 | */ | |
700 | ||
701 | #ifdef TEA575X_RADIO | |
702 | ||
703 | /* 256PCS GPIO numbers */ | |
704 | #define TEA_256PCS_DATA 1 | |
705 | #define TEA_256PCS_WRITE_ENABLE 2 /* inverted */ | |
706 | #define TEA_256PCS_BUS_CLOCK 3 | |
707 | ||
a5f22156 | 708 | static void snd_fm801_tea575x_256pcs_write(struct snd_tea575x *tea, unsigned int val) |
1da177e4 | 709 | { |
a5f22156 | 710 | struct fm801 *chip = tea->private_data; |
1da177e4 LT |
711 | unsigned short reg; |
712 | int i = 25; | |
713 | ||
714 | spin_lock_irq(&chip->reg_lock); | |
715 | reg = inw(FM801_REG(chip, GPIO_CTRL)); | |
716 | /* use GPIO lines and set write enable bit */ | |
717 | reg |= FM801_GPIO_GS(TEA_256PCS_DATA) | | |
718 | FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) | | |
719 | FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK); | |
720 | /* all of lines are in the write direction */ | |
721 | /* clear data and clock lines */ | |
722 | reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) | | |
723 | FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) | | |
724 | FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) | | |
725 | FM801_GPIO_GP(TEA_256PCS_DATA) | | |
726 | FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) | | |
727 | FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE)); | |
728 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
729 | udelay(1); | |
730 | ||
731 | while (i--) { | |
732 | if (val & (1 << i)) | |
733 | reg |= FM801_GPIO_GP(TEA_256PCS_DATA); | |
734 | else | |
735 | reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA); | |
736 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
737 | udelay(1); | |
738 | reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); | |
739 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
740 | reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); | |
741 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
742 | udelay(1); | |
743 | } | |
744 | ||
745 | /* and reset the write enable bit */ | |
746 | reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) | | |
747 | FM801_GPIO_GP(TEA_256PCS_DATA); | |
748 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
749 | spin_unlock_irq(&chip->reg_lock); | |
750 | } | |
751 | ||
a5f22156 | 752 | static unsigned int snd_fm801_tea575x_256pcs_read(struct snd_tea575x *tea) |
1da177e4 | 753 | { |
a5f22156 | 754 | struct fm801 *chip = tea->private_data; |
1da177e4 LT |
755 | unsigned short reg; |
756 | unsigned int val = 0; | |
757 | int i; | |
758 | ||
759 | spin_lock_irq(&chip->reg_lock); | |
760 | reg = inw(FM801_REG(chip, GPIO_CTRL)); | |
761 | /* use GPIO lines, set data direction to input */ | |
762 | reg |= FM801_GPIO_GS(TEA_256PCS_DATA) | | |
763 | FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) | | |
764 | FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) | | |
765 | FM801_GPIO_GD(TEA_256PCS_DATA) | | |
766 | FM801_GPIO_GP(TEA_256PCS_DATA) | | |
767 | FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE); | |
768 | /* all of lines are in the write direction, except data */ | |
769 | /* clear data, write enable and clock lines */ | |
770 | reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) | | |
771 | FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) | | |
772 | FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK)); | |
773 | ||
774 | for (i = 0; i < 24; i++) { | |
775 | reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); | |
776 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
777 | udelay(1); | |
778 | reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); | |
779 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
780 | udelay(1); | |
781 | val <<= 1; | |
782 | if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA)) | |
783 | val |= 1; | |
784 | } | |
785 | ||
786 | spin_unlock_irq(&chip->reg_lock); | |
787 | ||
788 | return val; | |
789 | } | |
790 | ||
791 | /* 256PCPR GPIO numbers */ | |
792 | #define TEA_256PCPR_BUS_CLOCK 0 | |
793 | #define TEA_256PCPR_DATA 1 | |
794 | #define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */ | |
795 | ||
a5f22156 | 796 | static void snd_fm801_tea575x_256pcpr_write(struct snd_tea575x *tea, unsigned int val) |
1da177e4 | 797 | { |
a5f22156 | 798 | struct fm801 *chip = tea->private_data; |
1da177e4 LT |
799 | unsigned short reg; |
800 | int i = 25; | |
801 | ||
802 | spin_lock_irq(&chip->reg_lock); | |
803 | reg = inw(FM801_REG(chip, GPIO_CTRL)); | |
804 | /* use GPIO lines and set write enable bit */ | |
805 | reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) | | |
806 | FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) | | |
807 | FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK); | |
808 | /* all of lines are in the write direction */ | |
809 | /* clear data and clock lines */ | |
810 | reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) | | |
811 | FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) | | |
812 | FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) | | |
813 | FM801_GPIO_GP(TEA_256PCPR_DATA) | | |
814 | FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) | | |
815 | FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE)); | |
816 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
817 | udelay(1); | |
818 | ||
819 | while (i--) { | |
820 | if (val & (1 << i)) | |
821 | reg |= FM801_GPIO_GP(TEA_256PCPR_DATA); | |
822 | else | |
823 | reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA); | |
824 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
825 | udelay(1); | |
826 | reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); | |
827 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
828 | reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); | |
829 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
830 | udelay(1); | |
831 | } | |
832 | ||
833 | /* and reset the write enable bit */ | |
834 | reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) | | |
835 | FM801_GPIO_GP(TEA_256PCPR_DATA); | |
836 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
837 | spin_unlock_irq(&chip->reg_lock); | |
838 | } | |
839 | ||
a5f22156 | 840 | static unsigned int snd_fm801_tea575x_256pcpr_read(struct snd_tea575x *tea) |
1da177e4 | 841 | { |
a5f22156 | 842 | struct fm801 *chip = tea->private_data; |
1da177e4 LT |
843 | unsigned short reg; |
844 | unsigned int val = 0; | |
845 | int i; | |
846 | ||
847 | spin_lock_irq(&chip->reg_lock); | |
848 | reg = inw(FM801_REG(chip, GPIO_CTRL)); | |
849 | /* use GPIO lines, set data direction to input */ | |
850 | reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) | | |
851 | FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) | | |
852 | FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) | | |
853 | FM801_GPIO_GD(TEA_256PCPR_DATA) | | |
854 | FM801_GPIO_GP(TEA_256PCPR_DATA) | | |
855 | FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE); | |
856 | /* all of lines are in the write direction, except data */ | |
857 | /* clear data, write enable and clock lines */ | |
858 | reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) | | |
859 | FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) | | |
860 | FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK)); | |
861 | ||
862 | for (i = 0; i < 24; i++) { | |
863 | reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); | |
864 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
865 | udelay(1); | |
866 | reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); | |
867 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
868 | udelay(1); | |
869 | val <<= 1; | |
870 | if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA)) | |
871 | val |= 1; | |
872 | } | |
873 | ||
874 | spin_unlock_irq(&chip->reg_lock); | |
875 | ||
876 | return val; | |
877 | } | |
878 | ||
879 | /* 64PCR GPIO numbers */ | |
880 | #define TEA_64PCR_BUS_CLOCK 0 | |
881 | #define TEA_64PCR_WRITE_ENABLE 1 /* inverted */ | |
882 | #define TEA_64PCR_DATA 2 | |
883 | ||
a5f22156 | 884 | static void snd_fm801_tea575x_64pcr_write(struct snd_tea575x *tea, unsigned int val) |
1da177e4 | 885 | { |
a5f22156 | 886 | struct fm801 *chip = tea->private_data; |
1da177e4 LT |
887 | unsigned short reg; |
888 | int i = 25; | |
889 | ||
890 | spin_lock_irq(&chip->reg_lock); | |
891 | reg = inw(FM801_REG(chip, GPIO_CTRL)); | |
892 | /* use GPIO lines and set write enable bit */ | |
893 | reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | | |
894 | FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) | | |
895 | FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK); | |
896 | /* all of lines are in the write direction */ | |
897 | /* clear data and clock lines */ | |
898 | reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) | | |
899 | FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) | | |
900 | FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) | | |
901 | FM801_GPIO_GP(TEA_64PCR_DATA) | | |
902 | FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) | | |
903 | FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE)); | |
904 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
905 | udelay(1); | |
906 | ||
907 | while (i--) { | |
908 | if (val & (1 << i)) | |
909 | reg |= FM801_GPIO_GP(TEA_64PCR_DATA); | |
910 | else | |
911 | reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA); | |
912 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
913 | udelay(1); | |
914 | reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); | |
915 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
916 | reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); | |
917 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
918 | udelay(1); | |
919 | } | |
920 | ||
921 | /* and reset the write enable bit */ | |
922 | reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) | | |
923 | FM801_GPIO_GP(TEA_64PCR_DATA); | |
924 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
925 | spin_unlock_irq(&chip->reg_lock); | |
926 | } | |
927 | ||
a5f22156 | 928 | static unsigned int snd_fm801_tea575x_64pcr_read(struct snd_tea575x *tea) |
1da177e4 | 929 | { |
a5f22156 | 930 | struct fm801 *chip = tea->private_data; |
1da177e4 LT |
931 | unsigned short reg; |
932 | unsigned int val = 0; | |
933 | int i; | |
934 | ||
935 | spin_lock_irq(&chip->reg_lock); | |
936 | reg = inw(FM801_REG(chip, GPIO_CTRL)); | |
937 | /* use GPIO lines, set data direction to input */ | |
938 | reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | | |
939 | FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) | | |
940 | FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) | | |
941 | FM801_GPIO_GD(TEA_64PCR_DATA) | | |
942 | FM801_GPIO_GP(TEA_64PCR_DATA) | | |
943 | FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE); | |
944 | /* all of lines are in the write direction, except data */ | |
945 | /* clear data, write enable and clock lines */ | |
946 | reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) | | |
947 | FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) | | |
948 | FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK)); | |
949 | ||
950 | for (i = 0; i < 24; i++) { | |
951 | reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); | |
952 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
953 | udelay(1); | |
954 | reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); | |
955 | outw(reg, FM801_REG(chip, GPIO_CTRL)); | |
956 | udelay(1); | |
957 | val <<= 1; | |
958 | if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA)) | |
959 | val |= 1; | |
960 | } | |
961 | ||
962 | spin_unlock_irq(&chip->reg_lock); | |
963 | ||
964 | return val; | |
965 | } | |
966 | ||
967 | static struct snd_tea575x_ops snd_fm801_tea_ops[3] = { | |
968 | { | |
969 | /* 1 = MediaForte 256-PCS */ | |
970 | .write = snd_fm801_tea575x_256pcs_write, | |
971 | .read = snd_fm801_tea575x_256pcs_read, | |
972 | }, | |
973 | { | |
974 | /* 2 = MediaForte 256-PCPR */ | |
975 | .write = snd_fm801_tea575x_256pcpr_write, | |
976 | .read = snd_fm801_tea575x_256pcpr_read, | |
977 | }, | |
978 | { | |
979 | /* 3 = MediaForte 64-PCR */ | |
980 | .write = snd_fm801_tea575x_64pcr_write, | |
981 | .read = snd_fm801_tea575x_64pcr_read, | |
982 | } | |
983 | }; | |
984 | #endif | |
985 | ||
986 | /* | |
987 | * Mixer routines | |
988 | */ | |
989 | ||
990 | #define FM801_SINGLE(xname, reg, shift, mask, invert) \ | |
991 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \ | |
992 | .get = snd_fm801_get_single, .put = snd_fm801_put_single, \ | |
993 | .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } | |
994 | ||
a5f22156 TI |
995 | static int snd_fm801_info_single(struct snd_kcontrol *kcontrol, |
996 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
997 | { |
998 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
999 | ||
1000 | uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1001 | uinfo->count = 1; | |
1002 | uinfo->value.integer.min = 0; | |
1003 | uinfo->value.integer.max = mask; | |
1004 | return 0; | |
1005 | } | |
1006 | ||
a5f22156 TI |
1007 | static int snd_fm801_get_single(struct snd_kcontrol *kcontrol, |
1008 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1009 | { |
a5f22156 | 1010 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1011 | int reg = kcontrol->private_value & 0xff; |
1012 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1013 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1014 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1015 | ||
1016 | ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask; | |
1017 | if (invert) | |
1018 | ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; | |
1019 | return 0; | |
1020 | } | |
1021 | ||
a5f22156 TI |
1022 | static int snd_fm801_put_single(struct snd_kcontrol *kcontrol, |
1023 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1024 | { |
a5f22156 | 1025 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1026 | int reg = kcontrol->private_value & 0xff; |
1027 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1028 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1029 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1030 | unsigned short val; | |
1031 | ||
1032 | val = (ucontrol->value.integer.value[0] & mask); | |
1033 | if (invert) | |
1034 | val = mask - val; | |
1035 | return snd_fm801_update_bits(chip, reg, mask << shift, val << shift); | |
1036 | } | |
1037 | ||
1038 | #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ | |
1039 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \ | |
1040 | .get = snd_fm801_get_double, .put = snd_fm801_put_double, \ | |
1041 | .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) } | |
1042 | ||
a5f22156 TI |
1043 | static int snd_fm801_info_double(struct snd_kcontrol *kcontrol, |
1044 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1045 | { |
1046 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1047 | ||
1048 | uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1049 | uinfo->count = 2; | |
1050 | uinfo->value.integer.min = 0; | |
1051 | uinfo->value.integer.max = mask; | |
1052 | return 0; | |
1053 | } | |
1054 | ||
a5f22156 TI |
1055 | static int snd_fm801_get_double(struct snd_kcontrol *kcontrol, |
1056 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1057 | { |
a5f22156 | 1058 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1059 | int reg = kcontrol->private_value & 0xff; |
1060 | int shift_left = (kcontrol->private_value >> 8) & 0x0f; | |
1061 | int shift_right = (kcontrol->private_value >> 12) & 0x0f; | |
1062 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1063 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1064 | ||
1065 | spin_lock_irq(&chip->reg_lock); | |
1066 | ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask; | |
1067 | ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask; | |
1068 | spin_unlock_irq(&chip->reg_lock); | |
1069 | if (invert) { | |
1070 | ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; | |
1071 | ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; | |
1072 | } | |
1073 | return 0; | |
1074 | } | |
1075 | ||
a5f22156 TI |
1076 | static int snd_fm801_put_double(struct snd_kcontrol *kcontrol, |
1077 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1078 | { |
a5f22156 | 1079 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1080 | int reg = kcontrol->private_value & 0xff; |
1081 | int shift_left = (kcontrol->private_value >> 8) & 0x0f; | |
1082 | int shift_right = (kcontrol->private_value >> 12) & 0x0f; | |
1083 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1084 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1085 | unsigned short val1, val2; | |
1086 | ||
1087 | val1 = ucontrol->value.integer.value[0] & mask; | |
1088 | val2 = ucontrol->value.integer.value[1] & mask; | |
1089 | if (invert) { | |
1090 | val1 = mask - val1; | |
1091 | val2 = mask - val2; | |
1092 | } | |
1093 | return snd_fm801_update_bits(chip, reg, | |
1094 | (mask << shift_left) | (mask << shift_right), | |
1095 | (val1 << shift_left ) | (val2 << shift_right)); | |
1096 | } | |
1097 | ||
a5f22156 TI |
1098 | static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol, |
1099 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1100 | { |
1101 | static char *texts[5] = { | |
1102 | "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary" | |
1103 | }; | |
1104 | ||
1105 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1106 | uinfo->count = 1; | |
1107 | uinfo->value.enumerated.items = 5; | |
1108 | if (uinfo->value.enumerated.item > 4) | |
1109 | uinfo->value.enumerated.item = 4; | |
1110 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1111 | return 0; | |
1112 | } | |
1113 | ||
a5f22156 TI |
1114 | static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol, |
1115 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1116 | { |
a5f22156 | 1117 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1118 | unsigned short val; |
1119 | ||
1120 | val = inw(FM801_REG(chip, REC_SRC)) & 7; | |
1121 | if (val > 4) | |
1122 | val = 4; | |
1123 | ucontrol->value.enumerated.item[0] = val; | |
1124 | return 0; | |
1125 | } | |
1126 | ||
a5f22156 TI |
1127 | static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol, |
1128 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1129 | { |
a5f22156 | 1130 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1131 | unsigned short val; |
1132 | ||
1133 | if ((val = ucontrol->value.enumerated.item[0]) > 4) | |
1134 | return -EINVAL; | |
1135 | return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val); | |
1136 | } | |
1137 | ||
a5f22156 | 1138 | #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls) |
1da177e4 | 1139 | |
a5f22156 | 1140 | static struct snd_kcontrol_new snd_fm801_controls[] __devinitdata = { |
1da177e4 LT |
1141 | FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1), |
1142 | FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1), | |
1143 | FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1), | |
1144 | FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1), | |
1145 | FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1), | |
1146 | FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1), | |
1147 | { | |
1148 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1149 | .name = "Digital Capture Source", | |
1150 | .info = snd_fm801_info_mux, | |
1151 | .get = snd_fm801_get_mux, | |
1152 | .put = snd_fm801_put_mux, | |
1153 | } | |
1154 | }; | |
1155 | ||
a5f22156 | 1156 | #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi) |
1da177e4 | 1157 | |
a5f22156 | 1158 | static struct snd_kcontrol_new snd_fm801_controls_multi[] __devinitdata = { |
1da177e4 LT |
1159 | FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0), |
1160 | FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0), | |
10e8d78a CL |
1161 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0), |
1162 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0), | |
1163 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0), | |
1164 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0), | |
1da177e4 LT |
1165 | }; |
1166 | ||
a5f22156 | 1167 | static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus) |
1da177e4 | 1168 | { |
a5f22156 | 1169 | struct fm801 *chip = bus->private_data; |
1da177e4 LT |
1170 | chip->ac97_bus = NULL; |
1171 | } | |
1172 | ||
a5f22156 | 1173 | static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97) |
1da177e4 | 1174 | { |
a5f22156 | 1175 | struct fm801 *chip = ac97->private_data; |
1da177e4 LT |
1176 | if (ac97->num == 0) { |
1177 | chip->ac97 = NULL; | |
1178 | } else { | |
1179 | chip->ac97_sec = NULL; | |
1180 | } | |
1181 | } | |
1182 | ||
a5f22156 | 1183 | static int __devinit snd_fm801_mixer(struct fm801 *chip) |
1da177e4 | 1184 | { |
a5f22156 | 1185 | struct snd_ac97_template ac97; |
1da177e4 LT |
1186 | unsigned int i; |
1187 | int err; | |
a5f22156 | 1188 | static struct snd_ac97_bus_ops ops = { |
1da177e4 LT |
1189 | .write = snd_fm801_codec_write, |
1190 | .read = snd_fm801_codec_read, | |
1191 | }; | |
1192 | ||
1193 | if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) | |
1194 | return err; | |
1195 | chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus; | |
1196 | ||
1197 | memset(&ac97, 0, sizeof(ac97)); | |
1198 | ac97.private_data = chip; | |
1199 | ac97.private_free = snd_fm801_mixer_free_ac97; | |
1200 | if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) | |
1201 | return err; | |
1202 | if (chip->secondary) { | |
1203 | ac97.num = 1; | |
1204 | ac97.addr = chip->secondary_addr; | |
1205 | if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0) | |
1206 | return err; | |
1207 | } | |
1208 | for (i = 0; i < FM801_CONTROLS; i++) | |
1209 | snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip)); | |
1210 | if (chip->multichannel) { | |
1211 | for (i = 0; i < FM801_CONTROLS_MULTI; i++) | |
1212 | snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip)); | |
1213 | } | |
1214 | return 0; | |
1215 | } | |
1216 | ||
1217 | /* | |
1218 | * initialization routines | |
1219 | */ | |
1220 | ||
a5f22156 | 1221 | static int snd_fm801_free(struct fm801 *chip) |
1da177e4 LT |
1222 | { |
1223 | unsigned short cmdw; | |
1224 | ||
1225 | if (chip->irq < 0) | |
1226 | goto __end_hw; | |
1227 | ||
1228 | /* interrupt setup - mask everything */ | |
1229 | cmdw = inw(FM801_REG(chip, IRQ_MASK)); | |
1230 | cmdw |= 0x00c3; | |
1231 | outw(cmdw, FM801_REG(chip, IRQ_MASK)); | |
1232 | ||
1233 | __end_hw: | |
1234 | #ifdef TEA575X_RADIO | |
1235 | snd_tea575x_exit(&chip->tea); | |
1236 | #endif | |
1237 | if (chip->irq >= 0) | |
a5f22156 | 1238 | free_irq(chip->irq, chip); |
1da177e4 LT |
1239 | pci_release_regions(chip->pci); |
1240 | pci_disable_device(chip->pci); | |
1241 | ||
1242 | kfree(chip); | |
1243 | return 0; | |
1244 | } | |
1245 | ||
a5f22156 | 1246 | static int snd_fm801_dev_free(struct snd_device *device) |
1da177e4 | 1247 | { |
a5f22156 | 1248 | struct fm801 *chip = device->device_data; |
1da177e4 LT |
1249 | return snd_fm801_free(chip); |
1250 | } | |
1251 | ||
a5f22156 | 1252 | static int __devinit snd_fm801_create(struct snd_card *card, |
1da177e4 LT |
1253 | struct pci_dev * pci, |
1254 | int tea575x_tuner, | |
a5f22156 | 1255 | struct fm801 ** rchip) |
1da177e4 | 1256 | { |
a5f22156 | 1257 | struct fm801 *chip; |
1da177e4 LT |
1258 | unsigned char rev, id; |
1259 | unsigned short cmdw; | |
1260 | unsigned long timeout; | |
1261 | int err; | |
a5f22156 | 1262 | static struct snd_device_ops ops = { |
1da177e4 LT |
1263 | .dev_free = snd_fm801_dev_free, |
1264 | }; | |
1265 | ||
1266 | *rchip = NULL; | |
1267 | if ((err = pci_enable_device(pci)) < 0) | |
1268 | return err; | |
e560d8d8 | 1269 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
1270 | if (chip == NULL) { |
1271 | pci_disable_device(pci); | |
1272 | return -ENOMEM; | |
1273 | } | |
1274 | spin_lock_init(&chip->reg_lock); | |
1275 | chip->card = card; | |
1276 | chip->pci = pci; | |
1277 | chip->irq = -1; | |
1278 | if ((err = pci_request_regions(pci, "FM801")) < 0) { | |
1279 | kfree(chip); | |
1280 | pci_disable_device(pci); | |
1281 | return err; | |
1282 | } | |
1283 | chip->port = pci_resource_start(pci, 0); | |
a5f22156 TI |
1284 | if (request_irq(pci->irq, snd_fm801_interrupt, SA_INTERRUPT|SA_SHIRQ, |
1285 | "FM801", chip)) { | |
99b359ba | 1286 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->irq); |
1da177e4 LT |
1287 | snd_fm801_free(chip); |
1288 | return -EBUSY; | |
1289 | } | |
1290 | chip->irq = pci->irq; | |
1291 | pci_set_master(pci); | |
1292 | ||
1293 | pci_read_config_byte(pci, PCI_REVISION_ID, &rev); | |
1294 | if (rev >= 0xb1) /* FM801-AU */ | |
1295 | chip->multichannel = 1; | |
1296 | ||
1297 | /* codec cold reset + AC'97 warm reset */ | |
1298 | outw((1<<5)|(1<<6), FM801_REG(chip, CODEC_CTRL)); | |
1299 | inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */ | |
1300 | udelay(100); | |
1301 | outw(0, FM801_REG(chip, CODEC_CTRL)); | |
1302 | ||
1303 | timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */ | |
1304 | ||
1305 | outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD)); | |
1306 | udelay(5); | |
1307 | do { | |
1308 | if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) | |
1309 | goto __ac97_secondary; | |
8433a509 | 1310 | schedule_timeout_uninterruptible(1); |
1da177e4 | 1311 | } while (time_after(timeout, jiffies)); |
99b359ba | 1312 | snd_printk(KERN_ERR "Primary AC'97 codec not found\n"); |
1da177e4 LT |
1313 | snd_fm801_free(chip); |
1314 | return -EIO; | |
1315 | ||
1316 | __ac97_secondary: | |
1317 | if (!chip->multichannel) /* lookup is not required */ | |
1318 | goto __ac97_ok; | |
1319 | for (id = 3; id > 0; id--) { /* my card has the secondary codec */ | |
1320 | /* at address #3, so the loop is inverted */ | |
1321 | ||
1322 | timeout = jiffies + HZ / 20; | |
1323 | ||
a5f22156 TI |
1324 | outw((1<<7) | (id << FM801_AC97_ADDR_SHIFT) | AC97_VENDOR_ID1, |
1325 | FM801_REG(chip, AC97_CMD)); | |
1da177e4 LT |
1326 | udelay(5); |
1327 | do { | |
1328 | if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) { | |
1329 | cmdw = inw(FM801_REG(chip, AC97_DATA)); | |
1330 | if (cmdw != 0xffff && cmdw != 0) { | |
1331 | chip->secondary = 1; | |
1332 | chip->secondary_addr = id; | |
1333 | goto __ac97_ok; | |
1334 | } | |
1335 | } | |
8433a509 | 1336 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
1337 | } while (time_after(timeout, jiffies)); |
1338 | } | |
1339 | ||
1340 | /* the recovery phase, it seems that probing for non-existing codec might */ | |
1341 | /* cause timeout problems */ | |
1342 | timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */ | |
1343 | ||
1344 | outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD)); | |
1345 | udelay(5); | |
1346 | do { | |
1347 | if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) | |
1348 | goto __ac97_ok; | |
8433a509 | 1349 | schedule_timeout_uninterruptible(1); |
1da177e4 | 1350 | } while (time_after(timeout, jiffies)); |
99b359ba | 1351 | snd_printk(KERN_ERR "Primary AC'97 codec not responding\n"); |
1da177e4 LT |
1352 | snd_fm801_free(chip); |
1353 | return -EIO; | |
1354 | ||
1355 | __ac97_ok: | |
1356 | ||
1357 | /* init volume */ | |
1358 | outw(0x0808, FM801_REG(chip, PCM_VOL)); | |
1359 | outw(0x9f1f, FM801_REG(chip, FM_VOL)); | |
1360 | outw(0x8808, FM801_REG(chip, I2S_VOL)); | |
1361 | ||
1362 | /* I2S control - I2S mode */ | |
1363 | outw(0x0003, FM801_REG(chip, I2S_MODE)); | |
1364 | ||
1365 | /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */ | |
1366 | cmdw = inw(FM801_REG(chip, IRQ_MASK)); | |
1367 | cmdw &= ~0x0083; | |
1368 | outw(cmdw, FM801_REG(chip, IRQ_MASK)); | |
1369 | ||
1370 | /* interrupt clear */ | |
1371 | outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS)); | |
1372 | ||
1373 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | |
1374 | snd_fm801_free(chip); | |
1375 | return err; | |
1376 | } | |
1377 | ||
1378 | snd_card_set_dev(card, &pci->dev); | |
1379 | ||
1380 | #ifdef TEA575X_RADIO | |
1381 | if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) { | |
1382 | chip->tea.dev_nr = tea575x_tuner >> 16; | |
1383 | chip->tea.card = card; | |
1384 | chip->tea.freq_fixup = 10700; | |
1385 | chip->tea.private_data = chip; | |
1386 | chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1]; | |
1387 | snd_tea575x_init(&chip->tea); | |
1388 | } | |
1389 | #endif | |
1390 | ||
1391 | *rchip = chip; | |
1392 | return 0; | |
1393 | } | |
1394 | ||
1395 | static int __devinit snd_card_fm801_probe(struct pci_dev *pci, | |
1396 | const struct pci_device_id *pci_id) | |
1397 | { | |
1398 | static int dev; | |
a5f22156 TI |
1399 | struct snd_card *card; |
1400 | struct fm801 *chip; | |
1401 | struct snd_opl3 *opl3; | |
1da177e4 LT |
1402 | int err; |
1403 | ||
1404 | if (dev >= SNDRV_CARDS) | |
1405 | return -ENODEV; | |
1406 | if (!enable[dev]) { | |
1407 | dev++; | |
1408 | return -ENOENT; | |
1409 | } | |
1410 | ||
1411 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); | |
1412 | if (card == NULL) | |
1413 | return -ENOMEM; | |
1414 | if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) { | |
1415 | snd_card_free(card); | |
1416 | return err; | |
1417 | } | |
1418 | ||
1419 | strcpy(card->driver, "FM801"); | |
1420 | strcpy(card->shortname, "ForteMedia FM801-"); | |
1421 | strcat(card->shortname, chip->multichannel ? "AU" : "AS"); | |
1422 | sprintf(card->longname, "%s at 0x%lx, irq %i", | |
1423 | card->shortname, chip->port, chip->irq); | |
1424 | ||
1425 | if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) { | |
1426 | snd_card_free(card); | |
1427 | return err; | |
1428 | } | |
1429 | if ((err = snd_fm801_mixer(chip)) < 0) { | |
1430 | snd_card_free(card); | |
1431 | return err; | |
1432 | } | |
1433 | if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801, | |
1434 | FM801_REG(chip, MPU401_DATA), 1, | |
1435 | chip->irq, 0, &chip->rmidi)) < 0) { | |
1436 | snd_card_free(card); | |
1437 | return err; | |
1438 | } | |
1439 | if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0), | |
1440 | FM801_REG(chip, OPL3_BANK1), | |
1441 | OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) { | |
1442 | snd_card_free(card); | |
1443 | return err; | |
1444 | } | |
1445 | if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { | |
1446 | snd_card_free(card); | |
1447 | return err; | |
1448 | } | |
1449 | ||
1450 | if ((err = snd_card_register(card)) < 0) { | |
1451 | snd_card_free(card); | |
1452 | return err; | |
1453 | } | |
1454 | pci_set_drvdata(pci, card); | |
1455 | dev++; | |
1456 | return 0; | |
1457 | } | |
1458 | ||
1459 | static void __devexit snd_card_fm801_remove(struct pci_dev *pci) | |
1460 | { | |
1461 | snd_card_free(pci_get_drvdata(pci)); | |
1462 | pci_set_drvdata(pci, NULL); | |
1463 | } | |
1464 | ||
1465 | static struct pci_driver driver = { | |
1466 | .name = "FM801", | |
1467 | .id_table = snd_fm801_ids, | |
1468 | .probe = snd_card_fm801_probe, | |
1469 | .remove = __devexit_p(snd_card_fm801_remove), | |
1470 | }; | |
1471 | ||
1472 | static int __init alsa_card_fm801_init(void) | |
1473 | { | |
01d25d46 | 1474 | return pci_register_driver(&driver); |
1da177e4 LT |
1475 | } |
1476 | ||
1477 | static void __exit alsa_card_fm801_exit(void) | |
1478 | { | |
1479 | pci_unregister_driver(&driver); | |
1480 | } | |
1481 | ||
1482 | module_init(alsa_card_fm801_init) | |
1483 | module_exit(alsa_card_fm801_exit) |