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sound: mpu401.c: make return of 0 explicit
[deliverable/linux.git] / sound / pci / fm801.c
CommitLineData
1da177e4
LT		 1/*
2 * The driver for the ForteMedia FM801 based soundcards
c1017a4c 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4 4 *
e0a5d82a 5 * Support FM only card by Andy Shevchenko <andy@smile.org.ua>
1da177e4
LT		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
1da177e4
LT		 23#include <linux/delay.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
215dacc2 26#include <linux/io.h>
1da177e4
LT		 27#include <linux/pci.h>
28#include <linux/slab.h>
65a77217 29#include <linux/module.h>
1da177e4
LT		 30#include <sound/core.h>
31#include <sound/pcm.h>
666c70ff 32#include <sound/tlv.h>
1da177e4
LT		 33#include <sound/ac97_codec.h>
34#include <sound/mpu401.h>
35#include <sound/opl3.h>
36#include <sound/initval.h>
37
efce4bb9 38#ifdef CONFIG_SND_FM801_TEA575X_BOOL
59b56459 39#include <media/tea575x.h>
1da177e4
LT		 40#endif
41
c1017a4c 42MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 43MODULE_DESCRIPTION("ForteMedia FM801");
44MODULE_LICENSE("GPL");
45MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
46 "{Genius,SoundMaker Live 5.1}}");
47
48static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
49static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 50static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT		 51/*
52 * Enable TEA575x tuner
53 * 1 = MediaForte 256-PCS
d7ba858a 54 * 2 = MediaForte 256-PCP
1da177e4 55 * 3 = MediaForte 64-PCR
fb716c0b 56 * 16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card
1da177e4
LT		 57 * High 16-bits are video (radio) device number + 1
58 */
6581f4e7 59static int tea575x_tuner[SNDRV_CARDS];
d4ecc83b 60static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
1da177e4
LT		 61
62module_param_array(index, int, NULL, 0444);
63MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
64module_param_array(id, charp, NULL, 0444);
65MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
66module_param_array(enable, bool, NULL, 0444);
67MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
68module_param_array(tea575x_tuner, int, NULL, 0444);
d7ba858a 69MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");
d4ecc83b
HV		 70module_param_array(radio_nr, int, NULL, 0444);
71MODULE_PARM_DESC(radio_nr, "Radio device numbers");
72
fb716c0b 73
c37279b9 74#define TUNER_DISABLED (1<<3)
fb716c0b
OZ		 75#define TUNER_ONLY (1<<4)
76#define TUNER_TYPE_MASK (~TUNER_ONLY & 0xFFFF)
1da177e4
LT		 77
78/*
79 * Direct registers
80 */
81
215dacc2
AS		 82#define fm801_writew(chip,reg,value) outw((value), chip->port + FM801_##reg)
83#define fm801_readw(chip,reg) inw(chip->port + FM801_##reg)
84
85#define fm801_writel(chip,reg,value) outl((value), chip->port + FM801_##reg)
1da177e4
LT		 86
87#define FM801_PCM_VOL 0x00 /* PCM Output Volume */
88#define FM801_FM_VOL 0x02 /* FM Output Volume */
89#define FM801_I2S_VOL 0x04 /* I2S Volume */
90#define FM801_REC_SRC 0x06 /* Record Source */
91#define FM801_PLY_CTRL 0x08 /* Playback Control */
92#define FM801_PLY_COUNT 0x0a /* Playback Count */
93#define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
94#define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
95#define FM801_CAP_CTRL 0x14 /* Capture Control */
96#define FM801_CAP_COUNT 0x16 /* Capture Count */
97#define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
98#define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
99#define FM801_CODEC_CTRL 0x22 /* Codec Control */
100#define FM801_I2S_MODE 0x24 /* I2S Mode Control */
101#define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
102#define FM801_I2C_CTRL 0x29 /* I2C Control */
103#define FM801_AC97_CMD 0x2a /* AC'97 Command */
104#define FM801_AC97_DATA 0x2c /* AC'97 Data */
105#define FM801_MPU401_DATA 0x30 /* MPU401 Data */
106#define FM801_MPU401_CMD 0x31 /* MPU401 Command */
107#define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
108#define FM801_GEN_CTRL 0x54 /* General Control */
109#define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
110#define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
111#define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
112#define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
113#define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
114#define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
115#define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
116
b1e9ed26
TI		 117/* codec access */
118#define FM801_AC97_READ (1<<7) /* read=1, write=0 */
119#define FM801_AC97_VALID (1<<8) /* port valid=1 */
120#define FM801_AC97_BUSY (1<<9) /* busy=1 */
121#define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */
1da177e4
LT		 122
123/* playback and record control register bits */
124#define FM801_BUF1_LAST (1<<1)
125#define FM801_BUF2_LAST (1<<2)
126#define FM801_START (1<<5)
127#define FM801_PAUSE (1<<6)
128#define FM801_IMMED_STOP (1<<7)
129#define FM801_RATE_SHIFT 8
130#define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
131#define FM801_CHANNELS_4 (1<<12) /* playback only */
132#define FM801_CHANNELS_6 (2<<12) /* playback only */
133#define FM801_CHANNELS_6MS (3<<12) /* playback only */
134#define FM801_CHANNELS_MASK (3<<12)
135#define FM801_16BIT (1<<14)
136#define FM801_STEREO (1<<15)
137
138/* IRQ status bits */
139#define FM801_IRQ_PLAYBACK (1<<8)
140#define FM801_IRQ_CAPTURE (1<<9)
141#define FM801_IRQ_VOLUME (1<<14)
142#define FM801_IRQ_MPU (1<<15)
143
144/* GPIO control register */
145#define FM801_GPIO_GP0 (1<<0) /* read/write */
146#define FM801_GPIO_GP1 (1<<1)
147#define FM801_GPIO_GP2 (1<<2)
148#define FM801_GPIO_GP3 (1<<3)
149#define FM801_GPIO_GP(x) (1<<(0+(x)))
150#define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
151#define FM801_GPIO_GD1 (1<<9)
152#define FM801_GPIO_GD2 (1<<10)
153#define FM801_GPIO_GD3 (1<<11)
154#define FM801_GPIO_GD(x) (1<<(8+(x)))
155#define FM801_GPIO_GS0 (1<<12) /* function select: */
156#define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
157#define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
158#define FM801_GPIO_GS3 (1<<15)
159#define FM801_GPIO_GS(x) (1<<(12+(x)))
160
161/*
162
163 */
164
a5f22156 165struct fm801 {
1da177e4
LT		 166 int irq;
167
168 unsigned long port; /* I/O port number */
169 unsigned int multichannel: 1, /* multichannel support */
170 secondary: 1; /* secondary codec */
171 unsigned char secondary_addr; /* address of the secondary codec */
fb716c0b 172 unsigned int tea575x_tuner; /* tuner access method & flags */
1da177e4
LT		 173
174 unsigned short ply_ctrl; /* playback control */
175 unsigned short cap_ctrl; /* capture control */
176
177 unsigned long ply_buffer;
178 unsigned int ply_buf;
179 unsigned int ply_count;
180 unsigned int ply_size;
181 unsigned int ply_pos;
182
183 unsigned long cap_buffer;
184 unsigned int cap_buf;
185 unsigned int cap_count;
186 unsigned int cap_size;
187 unsigned int cap_pos;
188
a5f22156
TI		 189 struct snd_ac97_bus *ac97_bus;
190 struct snd_ac97 *ac97;
191 struct snd_ac97 *ac97_sec;
1da177e4
LT		 192
193 struct pci_dev *pci;
a5f22156
TI		 194 struct snd_card *card;
195 struct snd_pcm *pcm;
196 struct snd_rawmidi *rmidi;
197 struct snd_pcm_substream *playback_substream;
198 struct snd_pcm_substream *capture_substream;
1da177e4
LT		 199 unsigned int p_dma_size;
200 unsigned int c_dma_size;
201
202 spinlock_t reg_lock;
a5f22156 203 struct snd_info_entry *proc_entry;
1da177e4 204
fdb62b50 205#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 206 struct v4l2_device v4l2_dev;
a5f22156 207 struct snd_tea575x tea;
1da177e4 208#endif
b1e9ed26 209
c7561cd8 210#ifdef CONFIG_PM_SLEEP
b1e9ed26
TI		 211 u16 saved_regs[0x20];
212#endif
1da177e4
LT		 213};
214
cebe41d4 215static DEFINE_PCI_DEVICE_TABLE(snd_fm801_ids) = {
1da177e4 216 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
26be8659 217 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
1da177e4
LT		 218 { 0, }
219};
220
221MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
222
223/*
224 * common I/O routines
225 */
226
02fd1a76
AS		 227static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations)
228{
229 unsigned int idx;
230
231 for (idx = 0; idx < iterations; idx++) {
232 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
233 return true;
234 udelay(10);
235 }
236 return false;
237}
238
239static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations)
240{
241 unsigned int idx;
242
243 for (idx = 0; idx < iterations; idx++) {
244 if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)
245 return true;
246 udelay(10);
247 }
248 return false;
249}
250
a5f22156 251static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
1da177e4
LT		 252 unsigned short mask, unsigned short value)
253{
254 int change;
255 unsigned long flags;
256 unsigned short old, new;
257
258 spin_lock_irqsave(&chip->reg_lock, flags);
259 old = inw(chip->port + reg);
260 new = (old & ~mask) | value;
261 change = old != new;
262 if (change)
263 outw(new, chip->port + reg);
264 spin_unlock_irqrestore(&chip->reg_lock, flags);
265 return change;
266}
267
a5f22156 268static void snd_fm801_codec_write(struct snd_ac97 *ac97,
1da177e4
LT		 269 unsigned short reg,
270 unsigned short val)
271{
a5f22156 272 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 273
274 /*
275 * Wait until the codec interface is not ready..
276 */
02fd1a76
AS		 277 if (!fm801_ac97_is_ready(chip, 100)) {
278 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
279 return;
1da177e4 280 }
1da177e4 281
1da177e4 282 /* write data and address */
215dacc2
AS		 283 fm801_writew(chip, AC97_DATA, val);
284 fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));
1da177e4
LT		 285 /*
286 * Wait until the write command is not completed..
02fd1a76
AS		 287 */
288 if (!fm801_ac97_is_ready(chip, 1000))
289 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
290 ac97->num);
1da177e4
LT		 291}
292
a5f22156 293static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 294{
a5f22156 295 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 296
297 /*
298 * Wait until the codec interface is not ready..
299 */
02fd1a76
AS		 300 if (!fm801_ac97_is_ready(chip, 100)) {
301 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
302 return 0;
1da177e4 303 }
1da177e4 304
1da177e4 305 /* read command */
215dacc2
AS		 306 fm801_writew(chip, AC97_CMD,
307 reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
02fd1a76
AS		 308 if (!fm801_ac97_is_ready(chip, 100)) {
309 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
310 ac97->num);
311 return 0;
1da177e4 312 }
1da177e4 313
02fd1a76
AS		 314 if (!fm801_ac97_is_valid(chip, 1000)) {
315 dev_err(chip->card->dev,
316 "AC'97 interface #%d is not valid (2)\n", ac97->num);
317 return 0;
1da177e4 318 }
1da177e4 319
215dacc2 320 return fm801_readw(chip, AC97_DATA);
1da177e4
LT		 321}
322
323static unsigned int rates[] = {
324 5500, 8000, 9600, 11025,
325 16000, 19200, 22050, 32000,
326 38400, 44100, 48000
327};
328
a5f22156 329static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT		 330 .count = ARRAY_SIZE(rates),
331 .list = rates,
332 .mask = 0,
333};
334
335static unsigned int channels[] = {
336 2, 4, 6
337};
338
a5f22156 339static struct snd_pcm_hw_constraint_list hw_constraints_channels = {
5e4968e2 340 .count = ARRAY_SIZE(channels),
1da177e4
LT		 341 .list = channels,
342 .mask = 0,
343};
344
345/*
346 * Sample rate routines
347 */
348
349static unsigned short snd_fm801_rate_bits(unsigned int rate)
350{
351 unsigned int idx;
352
353 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
354 if (rates[idx] == rate)
355 return idx;
356 snd_BUG();
357 return ARRAY_SIZE(rates) - 1;
358}
359
360/*
361 * PCM part
362 */
363
a5f22156 364static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 365 int cmd)
366{
a5f22156 367 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 368
369 spin_lock(&chip->reg_lock);
370 switch (cmd) {
371 case SNDRV_PCM_TRIGGER_START:
372 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
373 FM801_BUF2_LAST |
374 FM801_PAUSE);
375 chip->ply_ctrl |= FM801_START |
376 FM801_IMMED_STOP;
377 break;
378 case SNDRV_PCM_TRIGGER_STOP:
379 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
380 break;
381 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 382 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 383 chip->ply_ctrl |= FM801_PAUSE;
384 break;
385 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 386 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 387 chip->ply_ctrl &= ~FM801_PAUSE;
388 break;
389 default:
390 spin_unlock(&chip->reg_lock);
391 snd_BUG();
392 return -EINVAL;
393 }
215dacc2 394 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
1da177e4
LT		 395 spin_unlock(&chip->reg_lock);
396 return 0;
397}
398
a5f22156 399static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 400 int cmd)
401{
a5f22156 402 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 403
404 spin_lock(&chip->reg_lock);
405 switch (cmd) {
406 case SNDRV_PCM_TRIGGER_START:
407 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
408 FM801_BUF2_LAST |
409 FM801_PAUSE);
410 chip->cap_ctrl |= FM801_START |
411 FM801_IMMED_STOP;
412 break;
413 case SNDRV_PCM_TRIGGER_STOP:
414 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
415 break;
416 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 417 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 418 chip->cap_ctrl |= FM801_PAUSE;
419 break;
420 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 421 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 422 chip->cap_ctrl &= ~FM801_PAUSE;
423 break;
424 default:
425 spin_unlock(&chip->reg_lock);
426 snd_BUG();
427 return -EINVAL;
428 }
215dacc2 429 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
1da177e4
LT		 430 spin_unlock(&chip->reg_lock);
431 return 0;
432}
433
a5f22156
TI		 434static int snd_fm801_hw_params(struct snd_pcm_substream *substream,
435 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 436{
437 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
438}
439
a5f22156 440static int snd_fm801_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 441{
442 return snd_pcm_lib_free_pages(substream);
443}
444
a5f22156 445static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 446{
a5f22156
TI		 447 struct fm801 *chip = snd_pcm_substream_chip(substream);
448 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 449
450 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
451 chip->ply_count = snd_pcm_lib_period_bytes(substream);
452 spin_lock_irq(&chip->reg_lock);
453 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
454 FM801_STEREO | FM801_RATE_MASK |
455 FM801_CHANNELS_MASK);
456 if (snd_pcm_format_width(runtime->format) == 16)
457 chip->ply_ctrl |= FM801_16BIT;
458 if (runtime->channels > 1) {
459 chip->ply_ctrl |= FM801_STEREO;
460 if (runtime->channels == 4)
461 chip->ply_ctrl |= FM801_CHANNELS_4;
462 else if (runtime->channels == 6)
463 chip->ply_ctrl |= FM801_CHANNELS_6;
464 }
465 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
466 chip->ply_buf = 0;
215dacc2
AS		 467 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
468 fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);
1da177e4
LT		 469 chip->ply_buffer = runtime->dma_addr;
470 chip->ply_pos = 0;
215dacc2
AS		 471 fm801_writel(chip, PLY_BUF1, chip->ply_buffer);
472 fm801_writel(chip, PLY_BUF2,
473 chip->ply_buffer + (chip->ply_count % chip->ply_size));
1da177e4
LT		 474 spin_unlock_irq(&chip->reg_lock);
475 return 0;
476}
477
a5f22156 478static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 479{
a5f22156
TI		 480 struct fm801 *chip = snd_pcm_substream_chip(substream);
481 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 482
483 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
484 chip->cap_count = snd_pcm_lib_period_bytes(substream);
485 spin_lock_irq(&chip->reg_lock);
486 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
487 FM801_STEREO | FM801_RATE_MASK);
488 if (snd_pcm_format_width(runtime->format) == 16)
489 chip->cap_ctrl |= FM801_16BIT;
490 if (runtime->channels > 1)
491 chip->cap_ctrl |= FM801_STEREO;
492 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
493 chip->cap_buf = 0;
215dacc2
AS		 494 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
495 fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);
1da177e4
LT		 496 chip->cap_buffer = runtime->dma_addr;
497 chip->cap_pos = 0;
215dacc2
AS		 498 fm801_writel(chip, CAP_BUF1, chip->cap_buffer);
499 fm801_writel(chip, CAP_BUF2,
500 chip->cap_buffer + (chip->cap_count % chip->cap_size));
1da177e4
LT		 501 spin_unlock_irq(&chip->reg_lock);
502 return 0;
503}
504
a5f22156 505static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 506{
a5f22156 507 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 508 size_t ptr;
509
510 if (!(chip->ply_ctrl & FM801_START))
511 return 0;
512 spin_lock(&chip->reg_lock);
215dacc2
AS		 513 ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);
514 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {
1da177e4
LT		 515 ptr += chip->ply_count;
516 ptr %= chip->ply_size;
517 }
518 spin_unlock(&chip->reg_lock);
519 return bytes_to_frames(substream->runtime, ptr);
520}
521
a5f22156 522static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 523{
a5f22156 524 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 525 size_t ptr;
526
527 if (!(chip->cap_ctrl & FM801_START))
528 return 0;
529 spin_lock(&chip->reg_lock);
215dacc2
AS		 530 ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);
531 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {
1da177e4
LT		 532 ptr += chip->cap_count;
533 ptr %= chip->cap_size;
534 }
535 spin_unlock(&chip->reg_lock);
536 return bytes_to_frames(substream->runtime, ptr);
537}
538
7d12e780 539static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
1da177e4 540{
a5f22156 541 struct fm801 *chip = dev_id;
1da177e4
LT		 542 unsigned short status;
543 unsigned int tmp;
544
215dacc2 545 status = fm801_readw(chip, IRQ_STATUS);
1da177e4
LT		 546 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
547 if (! status)
548 return IRQ_NONE;
549 /* ack first */
215dacc2 550 fm801_writew(chip, IRQ_STATUS, status);
1da177e4
LT		 551 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
552 spin_lock(&chip->reg_lock);
553 chip->ply_buf++;
554 chip->ply_pos += chip->ply_count;
555 chip->ply_pos %= chip->ply_size;
556 tmp = chip->ply_pos + chip->ply_count;
557 tmp %= chip->ply_size;
215dacc2
AS		 558 if (chip->ply_buf & 1)
559 fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);
560 else
561 fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);
1da177e4
LT		 562 spin_unlock(&chip->reg_lock);
563 snd_pcm_period_elapsed(chip->playback_substream);
564 }
565 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
566 spin_lock(&chip->reg_lock);
567 chip->cap_buf++;
568 chip->cap_pos += chip->cap_count;
569 chip->cap_pos %= chip->cap_size;
570 tmp = chip->cap_pos + chip->cap_count;
571 tmp %= chip->cap_size;
215dacc2
AS		 572 if (chip->cap_buf & 1)
573 fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);
574 else
575 fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);
1da177e4
LT		 576 spin_unlock(&chip->reg_lock);
577 snd_pcm_period_elapsed(chip->capture_substream);
578 }
579 if (chip->rmidi && (status & FM801_IRQ_MPU))
7d12e780 580 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 581 if (status & FM801_IRQ_VOLUME)
582 ;/* TODO */
583
584 return IRQ_HANDLED;
585}
586
a5f22156 587static struct snd_pcm_hardware snd_fm801_playback =
1da177e4
LT		 588{
589 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
590 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 591 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT		 592 SNDRV_PCM_INFO_MMAP_VALID),
593 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
594 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
595 .rate_min = 5500,
596 .rate_max = 48000,
597 .channels_min = 1,
598 .channels_max = 2,
599 .buffer_bytes_max = (128*1024),
600 .period_bytes_min = 64,
601 .period_bytes_max = (128*1024),
602 .periods_min = 1,
603 .periods_max = 1024,
604 .fifo_size = 0,
605};
606
a5f22156 607static struct snd_pcm_hardware snd_fm801_capture =
1da177e4
LT		 608{
609 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
610 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 611 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT		 612 SNDRV_PCM_INFO_MMAP_VALID),
613 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
614 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
615 .rate_min = 5500,
616 .rate_max = 48000,
617 .channels_min = 1,
618 .channels_max = 2,
619 .buffer_bytes_max = (128*1024),
620 .period_bytes_min = 64,
621 .period_bytes_max = (128*1024),
622 .periods_min = 1,
623 .periods_max = 1024,
624 .fifo_size = 0,
625};
626
a5f22156 627static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
1da177e4 628{
a5f22156
TI		 629 struct fm801 *chip = snd_pcm_substream_chip(substream);
630 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 631 int err;
632
633 chip->playback_substream = substream;
634 runtime->hw = snd_fm801_playback;
a5f22156
TI		 635 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
636 &hw_constraints_rates);
1da177e4
LT		 637 if (chip->multichannel) {
638 runtime->hw.channels_max = 6;
a5f22156
TI		 639 snd_pcm_hw_constraint_list(runtime, 0,
640 SNDRV_PCM_HW_PARAM_CHANNELS,
641 &hw_constraints_channels);
1da177e4
LT		 642 }
643 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
644 return err;
645 return 0;
646}
647
a5f22156 648static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
1da177e4 649{
a5f22156
TI		 650 struct fm801 *chip = snd_pcm_substream_chip(substream);
651 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 652 int err;
653
654 chip->capture_substream = substream;
655 runtime->hw = snd_fm801_capture;
a5f22156
TI		 656 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
657 &hw_constraints_rates);
1da177e4
LT		 658 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
659 return err;
660 return 0;
661}
662
a5f22156 663static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
1da177e4 664{
a5f22156 665 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 666
667 chip->playback_substream = NULL;
668 return 0;
669}
670
a5f22156 671static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
1da177e4 672{
a5f22156 673 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 674
675 chip->capture_substream = NULL;
676 return 0;
677}
678
a5f22156 679static struct snd_pcm_ops snd_fm801_playback_ops = {
1da177e4
LT		 680 .open = snd_fm801_playback_open,
681 .close = snd_fm801_playback_close,
682 .ioctl = snd_pcm_lib_ioctl,
683 .hw_params = snd_fm801_hw_params,
684 .hw_free = snd_fm801_hw_free,
685 .prepare = snd_fm801_playback_prepare,
686 .trigger = snd_fm801_playback_trigger,
687 .pointer = snd_fm801_playback_pointer,
688};
689
a5f22156 690static struct snd_pcm_ops snd_fm801_capture_ops = {
1da177e4
LT		 691 .open = snd_fm801_capture_open,
692 .close = snd_fm801_capture_close,
693 .ioctl = snd_pcm_lib_ioctl,
694 .hw_params = snd_fm801_hw_params,
695 .hw_free = snd_fm801_hw_free,
696 .prepare = snd_fm801_capture_prepare,
697 .trigger = snd_fm801_capture_trigger,
698 .pointer = snd_fm801_capture_pointer,
699};
700
e23e7a14 701static int snd_fm801_pcm(struct fm801 *chip, int device, struct snd_pcm **rpcm)
1da177e4 702{
a5f22156 703 struct snd_pcm *pcm;
1da177e4
LT		 704 int err;
705
706 if (rpcm)
707 *rpcm = NULL;
708 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
709 return err;
710
711 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
712 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
713
714 pcm->private_data = chip;
1da177e4
LT		 715 pcm->info_flags = 0;
716 strcpy(pcm->name, "FM801");
717 chip->pcm = pcm;
718
719 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
720 snd_dma_pci_data(chip->pci),
721 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
722
e36e3b86
TI		 723 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
724 snd_pcm_alt_chmaps,
725 chip->multichannel ? 6 : 2, 0,
726 NULL);
727 if (err < 0)
728 return err;
729
1da177e4
LT		 730 if (rpcm)
731 *rpcm = pcm;
732 return 0;
733}
734
735/*
736 * TEA5757 radio
737 */
738
fdb62b50 739#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1da177e4 740
938a1566
OZ		 741/* GPIO to TEA575x maps */
742struct snd_fm801_tea575x_gpio {
743 u8 data, clk, wren, most;
d7ba858a 744 char *name;
938a1566 745};
1da177e4 746
938a1566 747static struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {
d7ba858a
OZ		 748 { .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },
749 { .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },
750 { .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },
938a1566 751};
1da177e4 752
8e699d2c
TI		 753#define get_tea575x_gpio(chip) \
754 (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])
755
938a1566 756static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
1da177e4 757{
a5f22156 758 struct fm801 *chip = tea->private_data;
215dacc2 759 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 760 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 761
938a1566
OZ		 762 reg &= ~(FM801_GPIO_GP(gpio.data) |
763 FM801_GPIO_GP(gpio.clk) |
764 FM801_GPIO_GP(gpio.wren));
1da177e4 765
938a1566
OZ		 766 reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;
767 reg |= (pins & TEA575X_CLK) ? FM801_GPIO_GP(gpio.clk) : 0;
768 /* WRITE_ENABLE is inverted */
769 reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);
1da177e4 770
215dacc2 771 fm801_writew(chip, GPIO_CTRL, reg);
1da177e4
LT		 772}
773
938a1566 774static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)
1da177e4 775{
a5f22156 776 struct fm801 *chip = tea->private_data;
215dacc2 777 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 778 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
effded75
DC		 779 u8 ret;
780
781 ret = 0;
782 if (reg & FM801_GPIO_GP(gpio.data))
783 ret |= TEA575X_DATA;
784 if (reg & FM801_GPIO_GP(gpio.most))
785 ret |= TEA575X_MOST;
786 return ret;
1da177e4
LT		 787}
788
938a1566 789static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)
1da177e4 790{
a5f22156 791 struct fm801 *chip = tea->private_data;
215dacc2 792 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 793 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 794
1da177e4 795 /* use GPIO lines and set write enable bit */
938a1566
OZ		 796 reg |= FM801_GPIO_GS(gpio.data) |
797 FM801_GPIO_GS(gpio.wren) |
798 FM801_GPIO_GS(gpio.clk) |
799 FM801_GPIO_GS(gpio.most);
800 if (output) {
801 /* all of lines are in the write direction */
802 /* clear data and clock lines */
803 reg &= ~(FM801_GPIO_GD(gpio.data) |
804 FM801_GPIO_GD(gpio.wren) |
805 FM801_GPIO_GD(gpio.clk) |
806 FM801_GPIO_GP(gpio.data) |
807 FM801_GPIO_GP(gpio.clk) |
808 FM801_GPIO_GP(gpio.wren));
809 } else {
810 /* use GPIO lines, set data direction to input */
811 reg |= FM801_GPIO_GD(gpio.data) |
812 FM801_GPIO_GD(gpio.most) |
813 FM801_GPIO_GP(gpio.data) |
814 FM801_GPIO_GP(gpio.most) |
815 FM801_GPIO_GP(gpio.wren);
816 /* all of lines are in the write direction, except data */
817 /* clear data, write enable and clock lines */
818 reg &= ~(FM801_GPIO_GD(gpio.wren) |
819 FM801_GPIO_GD(gpio.clk) |
820 FM801_GPIO_GP(gpio.clk));
1da177e4
LT		 821 }
822
215dacc2 823 fm801_writew(chip, GPIO_CTRL, reg);
69252128
AS		 824}
825
938a1566
OZ		 826static struct snd_tea575x_ops snd_fm801_tea_ops = {
827 .set_pins = snd_fm801_tea575x_set_pins,
828 .get_pins = snd_fm801_tea575x_get_pins,
829 .set_direction = snd_fm801_tea575x_set_direction,
1da177e4
LT		 830};
831#endif
832
833/*
834 * Mixer routines
835 */
836
837#define FM801_SINGLE(xname, reg, shift, mask, invert) \
838{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
839 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
840 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
841
a5f22156
TI		 842static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
843 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 844{
845 int mask = (kcontrol->private_value >> 16) & 0xff;
846
847 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
848 uinfo->count = 1;
849 uinfo->value.integer.min = 0;
850 uinfo->value.integer.max = mask;
851 return 0;
852}
853
a5f22156
TI		 854static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
855 struct snd_ctl_elem_value *ucontrol)
1da177e4 856{
a5f22156 857 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 858 int reg = kcontrol->private_value & 0xff;
859 int shift = (kcontrol->private_value >> 8) & 0xff;
860 int mask = (kcontrol->private_value >> 16) & 0xff;
861 int invert = (kcontrol->private_value >> 24) & 0xff;
862
863 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
864 if (invert)
865 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
866 return 0;
867}
868
a5f22156
TI		 869static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
870 struct snd_ctl_elem_value *ucontrol)
1da177e4 871{
a5f22156 872 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 873 int reg = kcontrol->private_value & 0xff;
874 int shift = (kcontrol->private_value >> 8) & 0xff;
875 int mask = (kcontrol->private_value >> 16) & 0xff;
876 int invert = (kcontrol->private_value >> 24) & 0xff;
877 unsigned short val;
878
879 val = (ucontrol->value.integer.value[0] & mask);
880 if (invert)
881 val = mask - val;
882 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
883}
884
885#define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
886{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
887 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
888 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
666c70ff
TI		 889#define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
890{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
891 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
892 .name = xname, .info = snd_fm801_info_double, \
893 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
894 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
895 .tlv = { .p = (xtlv) } }
1da177e4 896
a5f22156
TI		 897static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
898 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 899{
900 int mask = (kcontrol->private_value >> 16) & 0xff;
901
902 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
903 uinfo->count = 2;
904 uinfo->value.integer.min = 0;
905 uinfo->value.integer.max = mask;
906 return 0;
907}
908
a5f22156
TI		 909static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
910 struct snd_ctl_elem_value *ucontrol)
1da177e4 911{
a5f22156 912 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 913 int reg = kcontrol->private_value & 0xff;
914 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
915 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
916 int mask = (kcontrol->private_value >> 16) & 0xff;
917 int invert = (kcontrol->private_value >> 24) & 0xff;
918
919 spin_lock_irq(&chip->reg_lock);
920 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
921 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
922 spin_unlock_irq(&chip->reg_lock);
923 if (invert) {
924 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
925 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
926 }
927 return 0;
928}
929
a5f22156
TI		 930static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
931 struct snd_ctl_elem_value *ucontrol)
1da177e4 932{
a5f22156 933 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 934 int reg = kcontrol->private_value & 0xff;
935 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
936 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
937 int mask = (kcontrol->private_value >> 16) & 0xff;
938 int invert = (kcontrol->private_value >> 24) & 0xff;
939 unsigned short val1, val2;
940
941 val1 = ucontrol->value.integer.value[0] & mask;
942 val2 = ucontrol->value.integer.value[1] & mask;
943 if (invert) {
944 val1 = mask - val1;
945 val2 = mask - val2;
946 }
947 return snd_fm801_update_bits(chip, reg,
948 (mask << shift_left) | (mask << shift_right),
949 (val1 << shift_left ) | (val2 << shift_right));
950}
951
a5f22156
TI		 952static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
953 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 954{
955 static char *texts[5] = {
956 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
957 };
958
959 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
960 uinfo->count = 1;
961 uinfo->value.enumerated.items = 5;
962 if (uinfo->value.enumerated.item > 4)
963 uinfo->value.enumerated.item = 4;
964 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
965 return 0;
966}
967
a5f22156
TI		 968static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
969 struct snd_ctl_elem_value *ucontrol)
1da177e4 970{
a5f22156 971 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 972 unsigned short val;
973
215dacc2 974 val = fm801_readw(chip, REC_SRC) & 7;
1da177e4
LT		 975 if (val > 4)
976 val = 4;
977 ucontrol->value.enumerated.item[0] = val;
978 return 0;
979}
980
a5f22156
TI		 981static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
982 struct snd_ctl_elem_value *ucontrol)
1da177e4 983{
a5f22156 984 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 985 unsigned short val;
986
987 if ((val = ucontrol->value.enumerated.item[0]) > 4)
988 return -EINVAL;
989 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
990}
991
0cb29ea0 992static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
666c70ff 993
a5f22156 994#define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
1da177e4 995
e23e7a14 996static struct snd_kcontrol_new snd_fm801_controls[] = {
666c70ff
TI		 997FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
998 db_scale_dsp),
1da177e4 999FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
666c70ff
TI		 1000FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
1001 db_scale_dsp),
1da177e4 1002FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
666c70ff
TI		 1003FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
1004 db_scale_dsp),
1da177e4
LT		 1005FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1006{
1007 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1008 .name = "Digital Capture Source",
1009 .info = snd_fm801_info_mux,
1010 .get = snd_fm801_get_mux,
1011 .put = snd_fm801_put_mux,
1012}
1013};
1014
a5f22156 1015#define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1da177e4 1016
e23e7a14 1017static struct snd_kcontrol_new snd_fm801_controls_multi[] = {
1da177e4
LT		 1018FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1019FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
10e8d78a
CL		 1020FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1021FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1022FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1023FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1da177e4
LT		 1024};
1025
a5f22156 1026static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1027{
a5f22156 1028 struct fm801 *chip = bus->private_data;
1da177e4
LT		 1029 chip->ac97_bus = NULL;
1030}
1031
a5f22156 1032static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1033{
a5f22156 1034 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 1035 if (ac97->num == 0) {
1036 chip->ac97 = NULL;
1037 } else {
1038 chip->ac97_sec = NULL;
1039 }
1040}
1041
e23e7a14 1042static int snd_fm801_mixer(struct fm801 *chip)
1da177e4 1043{
a5f22156 1044 struct snd_ac97_template ac97;
1da177e4
LT		 1045 unsigned int i;
1046 int err;
a5f22156 1047 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1048 .write = snd_fm801_codec_write,
1049 .read = snd_fm801_codec_read,
1050 };
1051
1052 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1053 return err;
1054 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1055
1056 memset(&ac97, 0, sizeof(ac97));
1057 ac97.private_data = chip;
1058 ac97.private_free = snd_fm801_mixer_free_ac97;
1059 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1060 return err;
1061 if (chip->secondary) {
1062 ac97.num = 1;
1063 ac97.addr = chip->secondary_addr;
1064 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1065 return err;
1066 }
1067 for (i = 0; i < FM801_CONTROLS; i++)
1068 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1069 if (chip->multichannel) {
1070 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1071 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1072 }
1073 return 0;
1074}
1075
1076/*
1077 * initialization routines
1078 */
1079
b1e9ed26
TI		 1080static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1081 unsigned short reg, unsigned long waits)
1082{
1083 unsigned long timeout = jiffies + waits;
1084
215dacc2
AS		 1085 fm801_writew(chip, AC97_CMD,
1086 reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
b1e9ed26
TI		 1087 udelay(5);
1088 do {
215dacc2
AS		 1089 if ((fm801_readw(chip, AC97_CMD) &
1090 (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)
b1e9ed26
TI		 1091 return 0;
1092 schedule_timeout_uninterruptible(1);
1093 } while (time_after(timeout, jiffies));
1094 return -EIO;
1095}
1096
1097static int snd_fm801_chip_init(struct fm801 *chip, int resume)
1098{
b1e9ed26
TI		 1099 unsigned short cmdw;
1100
fb716c0b 1101 if (chip->tea575x_tuner & TUNER_ONLY)
e0a5d82a
AS		 1102 goto __ac97_ok;
1103
b1e9ed26 1104 /* codec cold reset + AC'97 warm reset */
215dacc2
AS		 1105 fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));
1106 fm801_readw(chip, CODEC_CTRL); /* flush posting data */
b1e9ed26 1107 udelay(100);
215dacc2 1108 fm801_writew(chip, CODEC_CTRL, 0);
b1e9ed26 1109
fb716c0b
OZ		 1110 if (wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)) < 0)
1111 if (!resume) {
9c7f9abf
TI		 1112 dev_info(chip->card->dev,
1113 "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");
fb716c0b
OZ		 1114 chip->tea575x_tuner = 3 | TUNER_ONLY;
1115 goto __ac97_ok;
1116 }
b1e9ed26
TI		 1117
1118 if (chip->multichannel) {
1119 if (chip->secondary_addr) {
1120 wait_for_codec(chip, chip->secondary_addr,
1121 AC97_VENDOR_ID1, msecs_to_jiffies(50));
1122 } else {
1123 /* my card has the secondary codec */
1124 /* at address #3, so the loop is inverted */
58e4334e
HH		 1125 int i;
1126 for (i = 3; i > 0; i--) {
1127 if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,
b1e9ed26 1128 msecs_to_jiffies(50))) {
215dacc2 1129 cmdw = fm801_readw(chip, AC97_DATA);
b1e9ed26
TI		 1130 if (cmdw != 0xffff && cmdw != 0) {
1131 chip->secondary = 1;
58e4334e 1132 chip->secondary_addr = i;
b1e9ed26
TI		 1133 break;
1134 }
1135 }
1136 }
1137 }
1138
1139 /* the recovery phase, it seems that probing for non-existing codec might */
1140 /* cause timeout problems */
1141 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1142 }
1143
6bbe13ec
JK		 1144 __ac97_ok:
1145
b1e9ed26 1146 /* init volume */
215dacc2
AS		 1147 fm801_writew(chip, PCM_VOL, 0x0808);
1148 fm801_writew(chip, FM_VOL, 0x9f1f);
1149 fm801_writew(chip, I2S_VOL, 0x8808);
b1e9ed26
TI		 1150
1151 /* I2S control - I2S mode */
215dacc2 1152 fm801_writew(chip, I2S_MODE, 0x0003);
b1e9ed26 1153
6bbe13ec 1154 /* interrupt setup */
215dacc2 1155 cmdw = fm801_readw(chip, IRQ_MASK);
6bbe13ec
JK		 1156 if (chip->irq < 0)
1157 cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */
1158 else
1159 cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */
215dacc2 1160 fm801_writew(chip, IRQ_MASK, cmdw);
b1e9ed26
TI		 1161
1162 /* interrupt clear */
215dacc2
AS		 1163 fm801_writew(chip, IRQ_STATUS,
1164 FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);
b1e9ed26
TI		 1165
1166 return 0;
1167}
1168
1169
a5f22156 1170static int snd_fm801_free(struct fm801 *chip)
1da177e4
LT		 1171{
1172 unsigned short cmdw;
1173
1174 if (chip->irq < 0)
1175 goto __end_hw;
1176
1177 /* interrupt setup - mask everything */
215dacc2 1178 cmdw = fm801_readw(chip, IRQ_MASK);
1da177e4 1179 cmdw |= 0x00c3;
215dacc2 1180 fm801_writew(chip, IRQ_MASK, cmdw);
1da177e4
LT		 1181
1182 __end_hw:
fdb62b50 1183#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 1184 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
c37279b9 1185 snd_tea575x_exit(&chip->tea);
d4ecc83b
HV		 1186 v4l2_device_unregister(&chip->v4l2_dev);
1187 }
1da177e4
LT		 1188#endif
1189 if (chip->irq >= 0)
a5f22156 1190 free_irq(chip->irq, chip);
1da177e4
LT		 1191 pci_release_regions(chip->pci);
1192 pci_disable_device(chip->pci);
1193
1194 kfree(chip);
1195 return 0;
1196}
1197
a5f22156 1198static int snd_fm801_dev_free(struct snd_device *device)
1da177e4 1199{
a5f22156 1200 struct fm801 *chip = device->device_data;
1da177e4
LT		 1201 return snd_fm801_free(chip);
1202}
1203
e23e7a14
BP		 1204static int snd_fm801_create(struct snd_card *card,
1205 struct pci_dev *pci,
1206 int tea575x_tuner,
1207 int radio_nr,
1208 struct fm801 **rchip)
1da177e4 1209{
a5f22156 1210 struct fm801 *chip;
1da177e4 1211 int err;
a5f22156 1212 static struct snd_device_ops ops = {
1da177e4
LT		 1213 .dev_free = snd_fm801_dev_free,
1214 };
1215
1216 *rchip = NULL;
1217 if ((err = pci_enable_device(pci)) < 0)
1218 return err;
e560d8d8 1219 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1220 if (chip == NULL) {
1221 pci_disable_device(pci);
1222 return -ENOMEM;
1223 }
1224 spin_lock_init(&chip->reg_lock);
1225 chip->card = card;
1226 chip->pci = pci;
1227 chip->irq = -1;
6bbe13ec 1228 chip->tea575x_tuner = tea575x_tuner;
1da177e4
LT		 1229 if ((err = pci_request_regions(pci, "FM801")) < 0) {
1230 kfree(chip);
1231 pci_disable_device(pci);
1232 return err;
1233 }
1234 chip->port = pci_resource_start(pci, 0);
fb716c0b 1235 if ((tea575x_tuner & TUNER_ONLY) == 0) {
437a5a46 1236 if (request_irq(pci->irq, snd_fm801_interrupt, IRQF_SHARED,
934c2b6d 1237 KBUILD_MODNAME, chip)) {
9c7f9abf 1238 dev_err(card->dev, "unable to grab IRQ %d\n", chip->irq);
6bbe13ec
JK		 1239 snd_fm801_free(chip);
1240 return -EBUSY;
1241 }
1242 chip->irq = pci->irq;
1243 pci_set_master(pci);
1da177e4 1244 }
1da177e4 1245
44c10138 1246 if (pci->revision >= 0xb1) /* FM801-AU */
1da177e4
LT		 1247 chip->multichannel = 1;
1248
b1e9ed26 1249 snd_fm801_chip_init(chip, 0);
fb716c0b
OZ		 1250 /* init might set tuner access method */
1251 tea575x_tuner = chip->tea575x_tuner;
1252
1253 if (chip->irq >= 0 && (tea575x_tuner & TUNER_ONLY)) {
1254 pci_clear_master(pci);
1255 free_irq(chip->irq, chip);
1256 chip->irq = -1;
1257 }
1da177e4
LT		 1258
1259 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1260 snd_fm801_free(chip);
1261 return err;
1262 }
1263
fdb62b50 1264#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b
HV		 1265 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
1266 if (err < 0) {
1267 snd_fm801_free(chip);
1268 return err;
1269 }
1270 chip->tea.v4l2_dev = &chip->v4l2_dev;
1271 chip->tea.radio_nr = radio_nr;
d7ba858a
OZ		 1272 chip->tea.private_data = chip;
1273 chip->tea.ops = &snd_fm801_tea_ops;
10ca7201 1274 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
fb716c0b
OZ		 1275 if ((tea575x_tuner & TUNER_TYPE_MASK) > 0 &&
1276 (tea575x_tuner & TUNER_TYPE_MASK) < 4) {
5daf53a6 1277 if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf 1278 dev_err(card->dev, "TEA575x radio not found\n");
d4ecc83b 1279 snd_fm801_free(chip);
96760015
DC		 1280 return -ENODEV;
1281 }
1282 } else if ((tea575x_tuner & TUNER_TYPE_MASK) == 0) {
d7ba858a
OZ		 1283 /* autodetect tuner connection */
1284 for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {
1285 chip->tea575x_tuner = tea575x_tuner;
5daf53a6 1286 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf
TI		 1287 dev_info(card->dev,
1288 "detected TEA575x radio type %s\n",
8e699d2c 1289 get_tea575x_gpio(chip)->name);
d7ba858a
OZ		 1290 break;
1291 }
1292 }
96760015 1293 if (tea575x_tuner == 4) {
9c7f9abf 1294 dev_err(card->dev, "TEA575x radio not found\n");
c37279b9 1295 chip->tea575x_tuner = TUNER_DISABLED;
96760015
DC		 1296 }
1297 }
c37279b9 1298 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
8e699d2c 1299 strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name,
c37279b9
BH		 1300 sizeof(chip->tea.card));
1301 }
1da177e4
LT		 1302#endif
1303
1304 *rchip = chip;
1305 return 0;
1306}
1307
e23e7a14
BP		 1308static int snd_card_fm801_probe(struct pci_dev *pci,
1309 const struct pci_device_id *pci_id)
1da177e4
LT		 1310{
1311 static int dev;
a5f22156
TI		 1312 struct snd_card *card;
1313 struct fm801 *chip;
1314 struct snd_opl3 *opl3;
1da177e4
LT		 1315 int err;
1316
1317 if (dev >= SNDRV_CARDS)
1318 return -ENODEV;
1319 if (!enable[dev]) {
1320 dev++;
1321 return -ENOENT;
1322 }
1323
60c5772b
TI		 1324 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1325 0, &card);
e58de7ba
TI		 1326 if (err < 0)
1327 return err;
d4ecc83b 1328 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev], &chip)) < 0) {
1da177e4
LT		 1329 snd_card_free(card);
1330 return err;
1331 }
b1e9ed26 1332 card->private_data = chip;
1da177e4
LT		 1333
1334 strcpy(card->driver, "FM801");
1335 strcpy(card->shortname, "ForteMedia FM801-");
1336 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1337 sprintf(card->longname, "%s at 0x%lx, irq %i",
1338 card->shortname, chip->port, chip->irq);
1339
fb716c0b 1340 if (chip->tea575x_tuner & TUNER_ONLY)
e0a5d82a
AS		 1341 goto __fm801_tuner_only;
1342
1da177e4
LT		 1343 if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
1344 snd_card_free(card);
1345 return err;
1346 }
1347 if ((err = snd_fm801_mixer(chip)) < 0) {
1348 snd_card_free(card);
1349 return err;
1350 }
1351 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
215dacc2 1352 chip->port + FM801_MPU401_DATA,
dba8b469
CL		 1353 MPU401_INFO_INTEGRATED |
1354 MPU401_INFO_IRQ_HOOK,
1355 -1, &chip->rmidi)) < 0) {
1da177e4
LT		 1356 snd_card_free(card);
1357 return err;
1358 }
215dacc2
AS		 1359 if ((err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,
1360 chip->port + FM801_OPL3_BANK1,
1da177e4
LT		 1361 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1362 snd_card_free(card);
1363 return err;
1364 }
1365 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1366 snd_card_free(card);
1367 return err;
1368 }
1369
e0a5d82a 1370 __fm801_tuner_only:
1da177e4
LT		 1371 if ((err = snd_card_register(card)) < 0) {
1372 snd_card_free(card);
1373 return err;
1374 }
1375 pci_set_drvdata(pci, card);
1376 dev++;
1377 return 0;
1378}
1379
e23e7a14 1380static void snd_card_fm801_remove(struct pci_dev *pci)
1da177e4
LT		 1381{
1382 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 1383}
1384
c7561cd8 1385#ifdef CONFIG_PM_SLEEP
b1e9ed26
TI		 1386static unsigned char saved_regs[] = {
1387 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1388 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1389 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1390 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1391};
1392
68cb2b55 1393static int snd_fm801_suspend(struct device *dev)
b1e9ed26 1394{
68cb2b55
TI		 1395 struct pci_dev *pci = to_pci_dev(dev);
1396 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI		 1397 struct fm801 *chip = card->private_data;
1398 int i;
1399
1400 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1401 snd_pcm_suspend_all(chip->pcm);
1402 snd_ac97_suspend(chip->ac97);
1403 snd_ac97_suspend(chip->ac97_sec);
1404 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1405 chip->saved_regs[i] = inw(chip->port + saved_regs[i]);
1406 /* FIXME: tea575x suspend */
1407
b1e9ed26
TI		 1408 pci_disable_device(pci);
1409 pci_save_state(pci);
68cb2b55 1410 pci_set_power_state(pci, PCI_D3hot);
b1e9ed26
TI		 1411 return 0;
1412}
1413
68cb2b55 1414static int snd_fm801_resume(struct device *dev)
b1e9ed26 1415{
68cb2b55
TI		 1416 struct pci_dev *pci = to_pci_dev(dev);
1417 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI		 1418 struct fm801 *chip = card->private_data;
1419 int i;
1420
b1e9ed26 1421 pci_set_power_state(pci, PCI_D0);
30b35399
TI		 1422 pci_restore_state(pci);
1423 if (pci_enable_device(pci) < 0) {
9c7f9abf 1424 dev_err(dev, "pci_enable_device failed, disabling device\n");
30b35399
TI		 1425 snd_card_disconnect(card);
1426 return -EIO;
1427 }
b1e9ed26
TI		 1428 pci_set_master(pci);
1429
1430 snd_fm801_chip_init(chip, 1);
1431 snd_ac97_resume(chip->ac97);
1432 snd_ac97_resume(chip->ac97_sec);
1433 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1434 outw(chip->saved_regs[i], chip->port + saved_regs[i]);
1435
1436 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1437 return 0;
1438}
68cb2b55
TI		 1439
1440static SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);
1441#define SND_FM801_PM_OPS &snd_fm801_pm
1442#else
1443#define SND_FM801_PM_OPS NULL
c7561cd8 1444#endif /* CONFIG_PM_SLEEP */
b1e9ed26 1445
e9f66d9b 1446static struct pci_driver fm801_driver = {
3733e424 1447 .name = KBUILD_MODNAME,
1da177e4
LT		 1448 .id_table = snd_fm801_ids,
1449 .probe = snd_card_fm801_probe,
e23e7a14 1450 .remove = snd_card_fm801_remove,
68cb2b55
TI		 1451 .driver = {
1452 .pm = SND_FM801_PM_OPS,
1453 },
1da177e4
LT		 1454};
1455
e9f66d9b 1456module_pci_driver(fm801_driver);
Linux kernel - Deliverables
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