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Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
[deliverable/linux.git] / sound / pci / hda / patch_ca0132.c
CommitLineData
95c6e9cb
IM		 1/*
2 * HD audio interface patch for Creative CA0132 chip
3 *
4 * Copyright (c) 2011, Creative Technology Ltd.
5 *
6 * Based on patch_ca0110.c
7 * Copyright (c) 2008 Takashi Iwai <tiwai@suse.de>
8 *
9 * This driver is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This driver is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/slab.h>
27#include <linux/pci.h>
28#include <linux/mutex.h>
da155d5b 29#include <linux/module.h>
95c6e9cb
IM		 30#include <sound/core.h>
31#include "hda_codec.h"
32#include "hda_local.h"
128bc4ba 33#include "hda_auto_parser.h"
95c6e9cb
IM		 34
35#define WIDGET_CHIP_CTRL 0x15
36#define WIDGET_DSP_CTRL 0x16
37
38#define WUH_MEM_CONNID 10
39#define DSP_MEM_CONNID 16
40
41enum hda_cmd_vendor_io {
42 /* for DspIO node */
43 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
44 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
45
46 VENDOR_DSPIO_STATUS = 0xF01,
47 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
48 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
49 VENDOR_DSPIO_DSP_INIT = 0x703,
50 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
51 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
52
53 /* for ChipIO node */
54 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
55 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
56 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
57 VENDOR_CHIPIO_DATA_LOW = 0x300,
58 VENDOR_CHIPIO_DATA_HIGH = 0x400,
59
60 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
61 VENDOR_CHIPIO_STATUS = 0xF01,
62 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
63 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
64
65 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
66
67 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
68 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
69 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
70 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
71 VENDOR_CHIPIO_FLAG_SET = 0x70F,
72 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
73 VENDOR_CHIPIO_PARAMETER_SET = 0x710,
74 VENDOR_CHIPIO_PARAMETER_GET = 0xF10,
75
76 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
77 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
78 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
79 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
80
81 VENDOR_CHIPIO_PARAMETER_EX_ID_GET = 0xF17,
82 VENDOR_CHIPIO_PARAMETER_EX_ID_SET = 0x717,
83 VENDOR_CHIPIO_PARAMETER_EX_VALUE_GET = 0xF18,
84 VENDOR_CHIPIO_PARAMETER_EX_VALUE_SET = 0x718
85};
86
87/*
88 * Control flag IDs
89 */
90enum control_flag_id {
91 /* Connection manager stream setup is bypassed/enabled */
92 CONTROL_FLAG_C_MGR = 0,
93 /* DSP DMA is bypassed/enabled */
94 CONTROL_FLAG_DMA = 1,
95 /* 8051 'idle' mode is disabled/enabled */
96 CONTROL_FLAG_IDLE_ENABLE = 2,
97 /* Tracker for the SPDIF-in path is bypassed/enabled */
98 CONTROL_FLAG_TRACKER = 3,
99 /* DigitalOut to Spdif2Out connection is disabled/enabled */
100 CONTROL_FLAG_SPDIF2OUT = 4,
101 /* Digital Microphone is disabled/enabled */
102 CONTROL_FLAG_DMIC = 5,
103 /* ADC_B rate is 48 kHz/96 kHz */
104 CONTROL_FLAG_ADC_B_96KHZ = 6,
105 /* ADC_C rate is 48 kHz/96 kHz */
106 CONTROL_FLAG_ADC_C_96KHZ = 7,
107 /* DAC rate is 48 kHz/96 kHz (affects all DACs) */
108 CONTROL_FLAG_DAC_96KHZ = 8,
109 /* DSP rate is 48 kHz/96 kHz */
110 CONTROL_FLAG_DSP_96KHZ = 9,
111 /* SRC clock is 98 MHz/196 MHz (196 MHz forces rate to 96 KHz) */
112 CONTROL_FLAG_SRC_CLOCK_196MHZ = 10,
113 /* SRC rate is 48 kHz/96 kHz (48 kHz disabled when clock is 196 MHz) */
114 CONTROL_FLAG_SRC_RATE_96KHZ = 11,
115 /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
116 CONTROL_FLAG_DECODE_LOOP = 12,
117 /* De-emphasis filter on DAC-1 disabled/enabled */
118 CONTROL_FLAG_DAC1_DEEMPHASIS = 13,
119 /* De-emphasis filter on DAC-2 disabled/enabled */
120 CONTROL_FLAG_DAC2_DEEMPHASIS = 14,
121 /* De-emphasis filter on DAC-3 disabled/enabled */
122 CONTROL_FLAG_DAC3_DEEMPHASIS = 15,
123 /* High-pass filter on ADC_B disabled/enabled */
124 CONTROL_FLAG_ADC_B_HIGH_PASS = 16,
125 /* High-pass filter on ADC_C disabled/enabled */
126 CONTROL_FLAG_ADC_C_HIGH_PASS = 17,
127 /* Common mode on Port_A disabled/enabled */
128 CONTROL_FLAG_PORT_A_COMMON_MODE = 18,
129 /* Common mode on Port_D disabled/enabled */
130 CONTROL_FLAG_PORT_D_COMMON_MODE = 19,
131 /* Impedance for ramp generator on Port_A 16 Ohm/10K Ohm */
132 CONTROL_FLAG_PORT_A_10KOHM_LOAD = 20,
133 /* Impedance for ramp generator on Port_D, 16 Ohm/10K Ohm */
134 CONTROL_FLAG_PORT_D_10K0HM_LOAD = 21,
135 /* ASI rate is 48kHz/96kHz */
136 CONTROL_FLAG_ASI_96KHZ = 22,
137 /* DAC power settings able to control attached ports no/yes */
138 CONTROL_FLAG_DACS_CONTROL_PORTS = 23,
139 /* Clock Stop OK reporting is disabled/enabled */
140 CONTROL_FLAG_CONTROL_STOP_OK_ENABLE = 24,
141 /* Number of control flags */
142 CONTROL_FLAGS_MAX = (CONTROL_FLAG_CONTROL_STOP_OK_ENABLE+1)
143};
144
145/*
146 * Control parameter IDs
147 */
148enum control_parameter_id {
149 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
150 CONTROL_PARAM_SPDIF1_SOURCE = 2,
151
152 /* Stream Control */
153
154 /* Select stream with the given ID */
155 CONTROL_PARAM_STREAM_ID = 24,
156 /* Source connection point for the selected stream */
157 CONTROL_PARAM_STREAM_SOURCE_CONN_POINT = 25,
158 /* Destination connection point for the selected stream */
159 CONTROL_PARAM_STREAM_DEST_CONN_POINT = 26,
160 /* Number of audio channels in the selected stream */
161 CONTROL_PARAM_STREAMS_CHANNELS = 27,
162 /*Enable control for the selected stream */
163 CONTROL_PARAM_STREAM_CONTROL = 28,
164
165 /* Connection Point Control */
166
167 /* Select connection point with the given ID */
168 CONTROL_PARAM_CONN_POINT_ID = 29,
169 /* Connection point sample rate */
170 CONTROL_PARAM_CONN_POINT_SAMPLE_RATE = 30,
171
172 /* Node Control */
173
174 /* Select HDA node with the given ID */
175 CONTROL_PARAM_NODE_ID = 31
176};
177
178/*
179 * Dsp Io Status codes
180 */
181enum hda_vendor_status_dspio {
182 /* Success */
183 VENDOR_STATUS_DSPIO_OK = 0x00,
184 /* Busy, unable to accept new command, the host must retry */
185 VENDOR_STATUS_DSPIO_BUSY = 0x01,
186 /* SCP command queue is full */
187 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
188 /* SCP response queue is empty */
189 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
190};
191
192/*
193 * Chip Io Status codes
194 */
195enum hda_vendor_status_chipio {
196 /* Success */
197 VENDOR_STATUS_CHIPIO_OK = 0x00,
198 /* Busy, unable to accept new command, the host must retry */
199 VENDOR_STATUS_CHIPIO_BUSY = 0x01
200};
201
202/*
203 * CA0132 sample rate
204 */
205enum ca0132_sample_rate {
206 SR_6_000 = 0x00,
207 SR_8_000 = 0x01,
208 SR_9_600 = 0x02,
209 SR_11_025 = 0x03,
210 SR_16_000 = 0x04,
211 SR_22_050 = 0x05,
212 SR_24_000 = 0x06,
213 SR_32_000 = 0x07,
214 SR_44_100 = 0x08,
215 SR_48_000 = 0x09,
216 SR_88_200 = 0x0A,
217 SR_96_000 = 0x0B,
218 SR_144_000 = 0x0C,
219 SR_176_400 = 0x0D,
220 SR_192_000 = 0x0E,
221 SR_384_000 = 0x0F,
222
223 SR_COUNT = 0x10,
224
225 SR_RATE_UNKNOWN = 0x1F
226};
227
228/*
229 * Scp Helper function
230 */
231enum get_set {
232 IS_SET = 0,
233 IS_GET = 1,
234};
235
236/*
237 * Duplicated from ca0110 codec
238 */
239
240static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac)
241{
242 if (pin) {
cdd03ced 243 snd_hda_set_pin_ctl(codec, pin, PIN_HP);
95c6e9cb
IM		 244 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
245 snd_hda_codec_write(codec, pin, 0,
246 AC_VERB_SET_AMP_GAIN_MUTE,
247 AMP_OUT_UNMUTE);
248 }
8e13fc1c 249 if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP))
95c6e9cb
IM		 250 snd_hda_codec_write(codec, dac, 0,
251 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO);
252}
253
254static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc)
255{
256 if (pin) {
4740860b
TI		 257 snd_hda_set_pin_ctl(codec, pin, PIN_IN |
258 snd_hda_get_default_vref(codec, pin));
95c6e9cb
IM		 259 if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP)
260 snd_hda_codec_write(codec, pin, 0,
261 AC_VERB_SET_AMP_GAIN_MUTE,
262 AMP_IN_UNMUTE(0));
263 }
8e13fc1c 264 if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP))
95c6e9cb
IM		 265 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE,
266 AMP_IN_UNMUTE(0));
267}
268
269static char *dirstr[2] = { "Playback", "Capture" };
270
271static int _add_switch(struct hda_codec *codec, hda_nid_t nid, const char *pfx,
272 int chan, int dir)
273{
274 char namestr[44];
275 int type = dir ? HDA_INPUT : HDA_OUTPUT;
276 struct snd_kcontrol_new knew =
277 HDA_CODEC_MUTE_MONO(namestr, nid, chan, 0, type);
c41999a2
DH		 278 if ((query_amp_caps(codec, nid, type) & AC_AMPCAP_MUTE) == 0) {
279 snd_printdd("Skipping '%s %s Switch' (no mute on node 0x%x)\n", pfx, dirstr[dir], nid);
280 return 0;
281 }
95c6e9cb
IM		 282 sprintf(namestr, "%s %s Switch", pfx, dirstr[dir]);
283 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
284}
285
286static int _add_volume(struct hda_codec *codec, hda_nid_t nid, const char *pfx,
287 int chan, int dir)
288{
289 char namestr[44];
290 int type = dir ? HDA_INPUT : HDA_OUTPUT;
291 struct snd_kcontrol_new knew =
292 HDA_CODEC_VOLUME_MONO(namestr, nid, chan, 0, type);
c41999a2
DH		 293 if ((query_amp_caps(codec, nid, type) & AC_AMPCAP_NUM_STEPS) == 0) {
294 snd_printdd("Skipping '%s %s Volume' (no amp on node 0x%x)\n", pfx, dirstr[dir], nid);
295 return 0;
296 }
95c6e9cb
IM		 297 sprintf(namestr, "%s %s Volume", pfx, dirstr[dir]);
298 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
299}
300
301#define add_out_switch(codec, nid, pfx) _add_switch(codec, nid, pfx, 3, 0)
302#define add_out_volume(codec, nid, pfx) _add_volume(codec, nid, pfx, 3, 0)
303#define add_in_switch(codec, nid, pfx) _add_switch(codec, nid, pfx, 3, 1)
304#define add_in_volume(codec, nid, pfx) _add_volume(codec, nid, pfx, 3, 1)
305#define add_mono_switch(codec, nid, pfx, chan) \
306 _add_switch(codec, nid, pfx, chan, 0)
307#define add_mono_volume(codec, nid, pfx, chan) \
308 _add_volume(codec, nid, pfx, chan, 0)
309#define add_in_mono_switch(codec, nid, pfx, chan) \
310 _add_switch(codec, nid, pfx, chan, 1)
311#define add_in_mono_volume(codec, nid, pfx, chan) \
312 _add_volume(codec, nid, pfx, chan, 1)
313
314
315/*
316 * CA0132 specific
317 */
318
319struct ca0132_spec {
320 struct auto_pin_cfg autocfg;
321 struct hda_multi_out multiout;
322 hda_nid_t out_pins[AUTO_CFG_MAX_OUTS];
323 hda_nid_t dacs[AUTO_CFG_MAX_OUTS];
324 hda_nid_t hp_dac;
325 hda_nid_t input_pins[AUTO_PIN_LAST];
326 hda_nid_t adcs[AUTO_PIN_LAST];
327 hda_nid_t dig_out;
328 hda_nid_t dig_in;
329 unsigned int num_inputs;
330 long curr_hp_switch;
331 long curr_hp_volume[2];
332 long curr_speaker_switch;
333 struct mutex chipio_mutex;
334 const char *input_labels[AUTO_PIN_LAST];
335 struct hda_pcm pcm_rec[2]; /* PCM information */
336};
337
338/* Chip access helper function */
339static int chipio_send(struct hda_codec *codec,
340 unsigned int reg,
341 unsigned int data)
342{
343 unsigned int res;
344 int retry = 50;
345
346 /* send bits of data specified by reg */
347 do {
348 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
349 reg, data);
350 if (res == VENDOR_STATUS_CHIPIO_OK)
351 return 0;
352 } while (--retry);
353 return -EIO;
354}
355
356/*
357 * Write chip address through the vendor widget -- NOT protected by the Mutex!
358 */
359static int chipio_write_address(struct hda_codec *codec,
360 unsigned int chip_addx)
361{
362 int res;
363
364 /* send low 16 bits of the address */
365 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW,
366 chip_addx & 0xffff);
367
368 if (res != -EIO) {
369 /* send high 16 bits of the address */
370 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH,
371 chip_addx >> 16);
372 }
373
374 return res;
375}
376
377/*
378 * Write data through the vendor widget -- NOT protected by the Mutex!
379 */
380
381static int chipio_write_data(struct hda_codec *codec, unsigned int data)
382{
383 int res;
384
385 /* send low 16 bits of the data */
386 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff);
387
388 if (res != -EIO) {
389 /* send high 16 bits of the data */
390 res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH,
391 data >> 16);
392 }
393
394 return res;
395}
396
397/*
398 * Read data through the vendor widget -- NOT protected by the Mutex!
399 */
400static int chipio_read_data(struct hda_codec *codec, unsigned int *data)
401{
402 int res;
403
404 /* post read */
405 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0);
406
407 if (res != -EIO) {
408 /* read status */
409 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
410 }
411
412 if (res != -EIO) {
413 /* read data */
414 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
415 VENDOR_CHIPIO_HIC_READ_DATA,
416 0);
417 }
418
419 return res;
420}
421
422/*
423 * Write given value to the given address through the chip I/O widget.
424 * protected by the Mutex
425 */
426static int chipio_write(struct hda_codec *codec,
427 unsigned int chip_addx, const unsigned int data)
428{
429 struct ca0132_spec *spec = codec->spec;
430 int err;
431
432 mutex_lock(&spec->chipio_mutex);
433
434 /* write the address, and if successful proceed to write data */
435 err = chipio_write_address(codec, chip_addx);
436 if (err < 0)
437 goto exit;
438
439 err = chipio_write_data(codec, data);
440 if (err < 0)
441 goto exit;
442
443exit:
444 mutex_unlock(&spec->chipio_mutex);
445 return err;
446}
447
448/*
449 * Read the given address through the chip I/O widget
450 * protected by the Mutex
451 */
452static int chipio_read(struct hda_codec *codec,
453 unsigned int chip_addx, unsigned int *data)
454{
455 struct ca0132_spec *spec = codec->spec;
456 int err;
457
458 mutex_lock(&spec->chipio_mutex);
459
460 /* write the address, and if successful proceed to write data */
461 err = chipio_write_address(codec, chip_addx);
462 if (err < 0)
463 goto exit;
464
465 err = chipio_read_data(codec, data);
466 if (err < 0)
467 goto exit;
468
469exit:
470 mutex_unlock(&spec->chipio_mutex);
471 return err;
472}
473
474/*
27ebeb0b 475 * PCM callbacks
95c6e9cb 476 */
27ebeb0b
TI		 477static int ca0132_playback_pcm_open(struct hda_pcm_stream *hinfo,
478 struct hda_codec *codec,
479 struct snd_pcm_substream *substream)
95c6e9cb 480{
27ebeb0b
TI		 481 struct ca0132_spec *spec = codec->spec;
482 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
483 hinfo);
95c6e9cb
IM		 484}
485
95c6e9cb
IM		 486static int ca0132_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
487 struct hda_codec *codec,
488 unsigned int stream_tag,
489 unsigned int format,
490 struct snd_pcm_substream *substream)
491{
492 struct ca0132_spec *spec = codec->spec;
27ebeb0b
TI		 493 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout,
494 stream_tag, format, substream);
95c6e9cb
IM		 495}
496
497static int ca0132_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
498 struct hda_codec *codec,
499 struct snd_pcm_substream *substream)
500{
501 struct ca0132_spec *spec = codec->spec;
27ebeb0b 502 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
95c6e9cb
IM		 503}
504
505/*
506 * Digital out
507 */
27ebeb0b
TI		 508static int ca0132_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
509 struct hda_codec *codec,
510 struct snd_pcm_substream *substream)
95c6e9cb
IM		 511{
512 struct ca0132_spec *spec = codec->spec;
27ebeb0b 513 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
95c6e9cb
IM		 514}
515
27ebeb0b 516static int ca0132_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
95c6e9cb
IM		 517 struct hda_codec *codec,
518 unsigned int stream_tag,
519 unsigned int format,
520 struct snd_pcm_substream *substream)
521{
522 struct ca0132_spec *spec = codec->spec;
27ebeb0b
TI		 523 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
524 stream_tag, format, substream);
95c6e9cb
IM		 525}
526
27ebeb0b 527static int ca0132_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
95c6e9cb 528 struct hda_codec *codec,
95c6e9cb
IM		 529 struct snd_pcm_substream *substream)
530{
531 struct ca0132_spec *spec = codec->spec;
27ebeb0b 532 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
95c6e9cb
IM		 533}
534
27ebeb0b
TI		 535static int ca0132_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
536 struct hda_codec *codec,
537 struct snd_pcm_substream *substream)
95c6e9cb
IM		 538{
539 struct ca0132_spec *spec = codec->spec;
27ebeb0b 540 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
95c6e9cb
IM		 541}
542
543/*
544 */
545static struct hda_pcm_stream ca0132_pcm_analog_playback = {
546 .substreams = 1,
547 .channels_min = 2,
548 .channels_max = 2,
549 .ops = {
27ebeb0b 550 .open = ca0132_playback_pcm_open,
95c6e9cb
IM		 551 .prepare = ca0132_playback_pcm_prepare,
552 .cleanup = ca0132_playback_pcm_cleanup
553 },
554};
555
556static struct hda_pcm_stream ca0132_pcm_analog_capture = {
557 .substreams = 1,
558 .channels_min = 2,
559 .channels_max = 2,
95c6e9cb
IM		 560};
561
562static struct hda_pcm_stream ca0132_pcm_digital_playback = {
563 .substreams = 1,
564 .channels_min = 2,
565 .channels_max = 2,
566 .ops = {
27ebeb0b
TI		 567 .open = ca0132_dig_playback_pcm_open,
568 .close = ca0132_dig_playback_pcm_close,
95c6e9cb
IM		 569 .prepare = ca0132_dig_playback_pcm_prepare,
570 .cleanup = ca0132_dig_playback_pcm_cleanup
571 },
572};
573
574static struct hda_pcm_stream ca0132_pcm_digital_capture = {
575 .substreams = 1,
576 .channels_min = 2,
577 .channels_max = 2,
95c6e9cb
IM		 578};
579
580static int ca0132_build_pcms(struct hda_codec *codec)
581{
582 struct ca0132_spec *spec = codec->spec;
583 struct hda_pcm *info = spec->pcm_rec;
584
585 codec->pcm_info = info;
586 codec->num_pcms = 0;
587
588 info->name = "CA0132 Analog";
589 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback;
590 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0];
591 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max =
592 spec->multiout.max_channels;
593 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;
594 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_inputs;
595 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0];
596 codec->num_pcms++;
597
598 if (!spec->dig_out && !spec->dig_in)
599 return 0;
600
601 info++;
602 info->name = "CA0132 Digital";
603 info->pcm_type = HDA_PCM_TYPE_SPDIF;
604 if (spec->dig_out) {
605 info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
606 ca0132_pcm_digital_playback;
607 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out;
608 }
609 if (spec->dig_in) {
610 info->stream[SNDRV_PCM_STREAM_CAPTURE] =
611 ca0132_pcm_digital_capture;
612 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in;
613 }
614 codec->num_pcms++;
615
616 return 0;
617}
618
619#define REG_CODEC_MUTE 0x18b014
620#define REG_CODEC_HP_VOL_L 0x18b070
621#define REG_CODEC_HP_VOL_R 0x18b074
622
623static int ca0132_hp_switch_get(struct snd_kcontrol *kcontrol,
624 struct snd_ctl_elem_value *ucontrol)
625{
626 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
627 struct ca0132_spec *spec = codec->spec;
628 long *valp = ucontrol->value.integer.value;
629
630 *valp = spec->curr_hp_switch;
631 return 0;
632}
633
634static int ca0132_hp_switch_put(struct snd_kcontrol *kcontrol,
635 struct snd_ctl_elem_value *ucontrol)
636{
637 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
638 struct ca0132_spec *spec = codec->spec;
639 long *valp = ucontrol->value.integer.value;
640 unsigned int data;
641 int err;
642
643 /* any change? */
644 if (spec->curr_hp_switch == *valp)
645 return 0;
646
647 snd_hda_power_up(codec);
648
649 err = chipio_read(codec, REG_CODEC_MUTE, &data);
650 if (err < 0)
b97f6bfd 651 goto exit;
95c6e9cb
IM		 652
653 /* *valp 0 is mute, 1 is unmute */
654 data = (data & 0x7f) | (*valp ? 0 : 0x80);
b97f6bfd 655 err = chipio_write(codec, REG_CODEC_MUTE, data);
95c6e9cb 656 if (err < 0)
b97f6bfd 657 goto exit;
95c6e9cb
IM		 658
659 spec->curr_hp_switch = *valp;
660
b97f6bfd 661 exit:
95c6e9cb 662 snd_hda_power_down(codec);
b97f6bfd 663 return err < 0 ? err : 1;
95c6e9cb
IM		 664}
665
666static int ca0132_speaker_switch_get(struct snd_kcontrol *kcontrol,
667 struct snd_ctl_elem_value *ucontrol)
668{
669 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
670 struct ca0132_spec *spec = codec->spec;
671 long *valp = ucontrol->value.integer.value;
672
673 *valp = spec->curr_speaker_switch;
674 return 0;
675}
676
677static int ca0132_speaker_switch_put(struct snd_kcontrol *kcontrol,
678 struct snd_ctl_elem_value *ucontrol)
679{
680 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
681 struct ca0132_spec *spec = codec->spec;
682 long *valp = ucontrol->value.integer.value;
683 unsigned int data;
684 int err;
685
686 /* any change? */
687 if (spec->curr_speaker_switch == *valp)
688 return 0;
689
690 snd_hda_power_up(codec);
691
692 err = chipio_read(codec, REG_CODEC_MUTE, &data);
693 if (err < 0)
b97f6bfd 694 goto exit;
95c6e9cb
IM		 695
696 /* *valp 0 is mute, 1 is unmute */
697 data = (data & 0xef) | (*valp ? 0 : 0x10);
b97f6bfd 698 err = chipio_write(codec, REG_CODEC_MUTE, data);
95c6e9cb 699 if (err < 0)
b97f6bfd 700 goto exit;
95c6e9cb
IM		 701
702 spec->curr_speaker_switch = *valp;
703
b97f6bfd 704 exit:
95c6e9cb 705 snd_hda_power_down(codec);
b97f6bfd 706 return err < 0 ? err : 1;
95c6e9cb
IM		 707}
708
709static int ca0132_hp_volume_get(struct snd_kcontrol *kcontrol,
710 struct snd_ctl_elem_value *ucontrol)
711{
712 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
713 struct ca0132_spec *spec = codec->spec;
714 long *valp = ucontrol->value.integer.value;
715
716 *valp++ = spec->curr_hp_volume[0];
717 *valp = spec->curr_hp_volume[1];
718 return 0;
719}
720
721static int ca0132_hp_volume_put(struct snd_kcontrol *kcontrol,
722 struct snd_ctl_elem_value *ucontrol)
723{
724 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
725 struct ca0132_spec *spec = codec->spec;
726 long *valp = ucontrol->value.integer.value;
727 long left_vol, right_vol;
728 unsigned int data;
729 int val;
730 int err;
731
732 left_vol = *valp++;
733 right_vol = *valp;
734
735 /* any change? */
736 if ((spec->curr_hp_volume[0] == left_vol) &&
737 (spec->curr_hp_volume[1] == right_vol))
738 return 0;
739
740 snd_hda_power_up(codec);
741
742 err = chipio_read(codec, REG_CODEC_HP_VOL_L, &data);
743 if (err < 0)
b97f6bfd 744 goto exit;
95c6e9cb
IM		 745
746 val = 31 - left_vol;
747 data = (data & 0xe0) | val;
b97f6bfd 748 err = chipio_write(codec, REG_CODEC_HP_VOL_L, data);
95c6e9cb 749 if (err < 0)
b97f6bfd 750 goto exit;
95c6e9cb
IM		 751
752 val = 31 - right_vol;
753 data = (data & 0xe0) | val;
b97f6bfd 754 err = chipio_write(codec, REG_CODEC_HP_VOL_R, data);
95c6e9cb 755 if (err < 0)
b97f6bfd 756 goto exit;
95c6e9cb
IM		 757
758 spec->curr_hp_volume[0] = left_vol;
759 spec->curr_hp_volume[1] = right_vol;
760
b97f6bfd 761 exit:
95c6e9cb 762 snd_hda_power_down(codec);
b97f6bfd 763 return err < 0 ? err : 1;
95c6e9cb
IM		 764}
765
766static int add_hp_switch(struct hda_codec *codec, hda_nid_t nid)
767{
768 struct snd_kcontrol_new knew =
769 HDA_CODEC_MUTE_MONO("Headphone Playback Switch",
770 nid, 1, 0, HDA_OUTPUT);
771 knew.get = ca0132_hp_switch_get;
772 knew.put = ca0132_hp_switch_put;
773 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
774}
775
776static int add_hp_volume(struct hda_codec *codec, hda_nid_t nid)
777{
778 struct snd_kcontrol_new knew =
779 HDA_CODEC_VOLUME_MONO("Headphone Playback Volume",
780 nid, 3, 0, HDA_OUTPUT);
781 knew.get = ca0132_hp_volume_get;
782 knew.put = ca0132_hp_volume_put;
783 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
784}
785
786static int add_speaker_switch(struct hda_codec *codec, hda_nid_t nid)
787{
788 struct snd_kcontrol_new knew =
789 HDA_CODEC_MUTE_MONO("Speaker Playback Switch",
790 nid, 1, 0, HDA_OUTPUT);
791 knew.get = ca0132_speaker_switch_get;
792 knew.put = ca0132_speaker_switch_put;
793 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
794}
795
796static void ca0132_fix_hp_caps(struct hda_codec *codec)
797{
798 struct ca0132_spec *spec = codec->spec;
799 struct auto_pin_cfg *cfg = &spec->autocfg;
800 unsigned int caps;
801
802 /* set mute-capable, 1db step, 32 steps, ofs 6 */
803 caps = 0x80031f06;
804 snd_hda_override_amp_caps(codec, cfg->hp_pins[0], HDA_OUTPUT, caps);
805}
806
807static int ca0132_build_controls(struct hda_codec *codec)
808{
809 struct ca0132_spec *spec = codec->spec;
810 struct auto_pin_cfg *cfg = &spec->autocfg;
811 int i, err;
812
813 if (spec->multiout.num_dacs) {
814 err = add_speaker_switch(codec, spec->out_pins[0]);
815 if (err < 0)
816 return err;
817 }
818
819 if (cfg->hp_outs) {
820 ca0132_fix_hp_caps(codec);
821 err = add_hp_switch(codec, cfg->hp_pins[0]);
822 if (err < 0)
823 return err;
824 err = add_hp_volume(codec, cfg->hp_pins[0]);
825 if (err < 0)
826 return err;
827 }
828
829 for (i = 0; i < spec->num_inputs; i++) {
830 const char *label = spec->input_labels[i];
831
832 err = add_in_switch(codec, spec->adcs[i], label);
833 if (err < 0)
834 return err;
835 err = add_in_volume(codec, spec->adcs[i], label);
836 if (err < 0)
837 return err;
838 if (cfg->inputs[i].type == AUTO_PIN_MIC) {
839 /* add Mic-Boost */
840 err = add_in_mono_volume(codec, spec->input_pins[i],
841 "Mic Boost", 1);
842 if (err < 0)
843 return err;
844 }
845 }
846
847 if (spec->dig_out) {
efb9f469
TI		 848 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,
849 spec->dig_out);
95c6e9cb
IM		 850 if (err < 0)
851 return err;
8e13fc1c 852 err = snd_hda_create_spdif_share_sw(codec, &spec->multiout);
95c6e9cb
IM		 853 if (err < 0)
854 return err;
8e13fc1c 855 /* spec->multiout.share_spdif = 1; */
95c6e9cb
IM		 856 }
857
858 if (spec->dig_in) {
859 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);
860 if (err < 0)
861 return err;
95c6e9cb
IM		 862 }
863 return 0;
864}
865
866
867static void ca0132_set_ct_ext(struct hda_codec *codec, int enable)
868{
869 /* Set Creative extension */
870 snd_printdd("SET CREATIVE EXTENSION\n");
871 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
872 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE,
873 enable);
874 msleep(20);
875}
876
877
878static void ca0132_config(struct hda_codec *codec)
879{
880 struct ca0132_spec *spec = codec->spec;
881 struct auto_pin_cfg *cfg = &spec->autocfg;
882
27ebeb0b
TI		 883 codec->pcm_format_first = 1;
884 codec->no_sticky_stream = 1;
885
95c6e9cb
IM		 886 /* line-outs */
887 cfg->line_outs = 1;
888 cfg->line_out_pins[0] = 0x0b; /* front */
889 cfg->line_out_type = AUTO_PIN_LINE_OUT;
890
891 spec->dacs[0] = 0x02;
892 spec->out_pins[0] = 0x0b;
893 spec->multiout.dac_nids = spec->dacs;
894 spec->multiout.num_dacs = 1;
895 spec->multiout.max_channels = 2;
896
897 /* headphone */
898 cfg->hp_outs = 1;
899 cfg->hp_pins[0] = 0x0f;
900
901 spec->hp_dac = 0;
902 spec->multiout.hp_nid = 0;
903
904 /* inputs */
905 cfg->num_inputs = 2; /* Mic-in and line-in */
906 cfg->inputs[0].pin = 0x12;
907 cfg->inputs[0].type = AUTO_PIN_MIC;
908 cfg->inputs[1].pin = 0x11;
909 cfg->inputs[1].type = AUTO_PIN_LINE_IN;
910
911 /* Mic-in */
912 spec->input_pins[0] = 0x12;
55cf87fe 913 spec->input_labels[0] = "Mic";
95c6e9cb
IM		 914 spec->adcs[0] = 0x07;
915
916 /* Line-In */
917 spec->input_pins[1] = 0x11;
55cf87fe 918 spec->input_labels[1] = "Line";
95c6e9cb
IM		 919 spec->adcs[1] = 0x08;
920 spec->num_inputs = 2;
8e13fc1c
TI		 921
922 /* SPDIF I/O */
923 spec->dig_out = 0x05;
924 spec->multiout.dig_out_nid = spec->dig_out;
925 cfg->dig_out_pins[0] = 0x0c;
926 cfg->dig_outs = 1;
927 cfg->dig_out_type[0] = HDA_PCM_TYPE_SPDIF;
928 spec->dig_in = 0x09;
929 cfg->dig_in_pin = 0x0e;
930 cfg->dig_in_type = HDA_PCM_TYPE_SPDIF;
95c6e9cb
IM		 931}
932
933static void ca0132_init_chip(struct hda_codec *codec)
934{
935 struct ca0132_spec *spec = codec->spec;
936
937 mutex_init(&spec->chipio_mutex);
938}
939
940static void ca0132_exit_chip(struct hda_codec *codec)
941{
942 /* put any chip cleanup stuffs here. */
943}
944
945static int ca0132_init(struct hda_codec *codec)
946{
947 struct ca0132_spec *spec = codec->spec;
948 struct auto_pin_cfg *cfg = &spec->autocfg;
949 int i;
950
951 for (i = 0; i < spec->multiout.num_dacs; i++) {
952 init_output(codec, spec->out_pins[i],
953 spec->multiout.dac_nids[i]);
954 }
955 init_output(codec, cfg->hp_pins[0], spec->hp_dac);
956 init_output(codec, cfg->dig_out_pins[0], spec->dig_out);
957
958 for (i = 0; i < spec->num_inputs; i++)
959 init_input(codec, spec->input_pins[i], spec->adcs[i]);
960
961 init_input(codec, cfg->dig_in_pin, spec->dig_in);
962
963 ca0132_set_ct_ext(codec, 1);
964
965 return 0;
966}
967
968
969static void ca0132_free(struct hda_codec *codec)
970{
971 ca0132_set_ct_ext(codec, 0);
972 ca0132_exit_chip(codec);
973 kfree(codec->spec);
974}
975
976static struct hda_codec_ops ca0132_patch_ops = {
977 .build_controls = ca0132_build_controls,
978 .build_pcms = ca0132_build_pcms,
979 .init = ca0132_init,
980 .free = ca0132_free,
981};
982
983
984
985static int patch_ca0132(struct hda_codec *codec)
986{
987 struct ca0132_spec *spec;
988
989 snd_printdd("patch_ca0132\n");
990
991 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
992 if (!spec)
993 return -ENOMEM;
994 codec->spec = spec;
995
996 ca0132_init_chip(codec);
997
998 ca0132_config(codec);
999
1000 codec->patch_ops = ca0132_patch_ops;
1001
1002 return 0;
1003}
1004
1005/*
1006 * patch entries
1007 */
1008static struct hda_codec_preset snd_hda_preset_ca0132[] = {
1009 { .id = 0x11020011, .name = "CA0132", .patch = patch_ca0132 },
1010 {} /* terminator */
1011};
1012
1013MODULE_ALIAS("snd-hda-codec-id:11020011");
1014
1015MODULE_LICENSE("GPL");
1016MODULE_DESCRIPTION("Creative CA0132, CA0132 HD-audio codec");
1017
1018static struct hda_codec_preset_list ca0132_list = {
1019 .preset = snd_hda_preset_ca0132,
1020 .owner = THIS_MODULE,
1021};
1022
1023static int __init patch_ca0132_init(void)
1024{
1025 return snd_hda_add_codec_preset(&ca0132_list);
1026}
1027
1028static void __exit patch_ca0132_exit(void)
1029{
1030 snd_hda_delete_codec_preset(&ca0132_list);
1031}
1032
1033module_init(patch_ca0132_init)
1034module_exit(patch_ca0132_exit)
Linux kernel - Deliverables
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