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[ALSA] hda - Fujitsu Lifebook PC speaker signal
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
2f2f4251 36
4e55096e 37#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 38#define STAC_PWR_EVENT 0x20
39#define STAC_HP_EVENT 0x30
4e55096e 40
f5fcc13c
TI		 41enum {
42 STAC_REF,
bf277785 43 STAC_9200_OQO,
dfe495d0
TI		 44 STAC_9200_DELL_D21,
45 STAC_9200_DELL_D22,
46 STAC_9200_DELL_D23,
47 STAC_9200_DELL_M21,
48 STAC_9200_DELL_M22,
49 STAC_9200_DELL_M23,
50 STAC_9200_DELL_M24,
51 STAC_9200_DELL_M25,
52 STAC_9200_DELL_M26,
53 STAC_9200_DELL_M27,
1194b5b7 54 STAC_9200_GATEWAY,
117f257d 55 STAC_9200_PANASONIC,
f5fcc13c
TI		 56 STAC_9200_MODELS
57};
58
59enum {
60 STAC_9205_REF,
dfe495d0 61 STAC_9205_DELL_M42,
ae0a8ed8
TD		 62 STAC_9205_DELL_M43,
63 STAC_9205_DELL_M44,
f5fcc13c
TI		 64 STAC_9205_MODELS
65};
66
e1f0d669
MR		 67enum {
68 STAC_92HD73XX_REF,
a7662640 69 STAC_DELL_M6,
e1f0d669
MR		 70 STAC_92HD73XX_MODELS
71};
72
e035b841
MR		 73enum {
74 STAC_92HD71BXX_REF,
a7662640
MR		 75 STAC_DELL_M4_1,
76 STAC_DELL_M4_2,
e035b841
MR		 77 STAC_92HD71BXX_MODELS
78};
79
8e21c34c
TD		 80enum {
81 STAC_925x_REF,
82 STAC_M2_2,
83 STAC_MA6,
2c11f955 84 STAC_PA6,
8e21c34c
TD		 85 STAC_925x_MODELS
86};
87
f5fcc13c
TI		 88enum {
89 STAC_D945_REF,
90 STAC_D945GTP3,
91 STAC_D945GTP5,
5d5d3bc3
IZ		 92 STAC_INTEL_MAC_V1,
93 STAC_INTEL_MAC_V2,
94 STAC_INTEL_MAC_V3,
95 STAC_INTEL_MAC_V4,
96 STAC_INTEL_MAC_V5,
dfe495d0 97 /* for backward compatibility */
f5fcc13c 98 STAC_MACMINI,
3fc24d85 99 STAC_MACBOOK,
6f0778d8
NB		 100 STAC_MACBOOK_PRO_V1,
101 STAC_MACBOOK_PRO_V2,
f16928fb 102 STAC_IMAC_INTEL,
0dae0f83 103 STAC_IMAC_INTEL_20,
dfe495d0
TI		 104 STAC_922X_DELL_D81,
105 STAC_922X_DELL_D82,
106 STAC_922X_DELL_M81,
107 STAC_922X_DELL_M82,
f5fcc13c
TI		 108 STAC_922X_MODELS
109};
110
111enum {
112 STAC_D965_REF,
113 STAC_D965_3ST,
114 STAC_D965_5ST,
4ff076e5 115 STAC_DELL_3ST,
8e9068b1 116 STAC_DELL_BIOS,
f5fcc13c
TI		 117 STAC_927X_MODELS
118};
403d1944 119
2f2f4251 120struct sigmatel_spec {
c8b6bf9b 121 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 122 unsigned int num_mixers;
123
403d1944 124 int board_config;
c7d4b2fa 125 unsigned int surr_switch: 1;
403d1944
MP		 126 unsigned int line_switch: 1;
127 unsigned int mic_switch: 1;
3cc08dc6 128 unsigned int alt_switch: 1;
82bc955f 129 unsigned int hp_detect: 1;
c7d4b2fa 130
4fe5195c
MR		 131 /* gpio lines */
132 unsigned int gpio_mask;
133 unsigned int gpio_dir;
134 unsigned int gpio_data;
135 unsigned int gpio_mute;
136
137 /* analog loopback */
e1f0d669
MR		 138 unsigned char aloopback_mask;
139 unsigned char aloopback_shift;
8259980e 140
a64135a2
MR		 141 /* power management */
142 unsigned int num_pwrs;
143 hda_nid_t *pwr_nids;
b76c850f 144 hda_nid_t *dac_list;
a64135a2 145
2f2f4251 146 /* playback */
b22b4821
MR		 147 struct hda_input_mux *mono_mux;
148 unsigned int cur_mmux;
2f2f4251 149 struct hda_multi_out multiout;
3cc08dc6 150 hda_nid_t dac_nids[5];
2f2f4251
M		 151
152 /* capture */
153 hda_nid_t *adc_nids;
2f2f4251 154 unsigned int num_adcs;
dabbed6f
M		 155 hda_nid_t *mux_nids;
156 unsigned int num_muxes;
8b65727b
MP		 157 hda_nid_t *dmic_nids;
158 unsigned int num_dmics;
e1f0d669 159 hda_nid_t *dmux_nids;
1697055e 160 unsigned int num_dmuxes;
dabbed6f 161 hda_nid_t dig_in_nid;
b22b4821 162 hda_nid_t mono_nid;
2f2f4251 163
2f2f4251
M		 164 /* pin widgets */
165 hda_nid_t *pin_nids;
166 unsigned int num_pins;
2f2f4251 167 unsigned int *pin_configs;
11b44bbd 168 unsigned int *bios_pin_configs;
2f2f4251
M		 169
170 /* codec specific stuff */
171 struct hda_verb *init;
c8b6bf9b 172 struct snd_kcontrol_new *mixer;
2f2f4251
M		 173
174 /* capture source */
8b65727b 175 struct hda_input_mux *dinput_mux;
e1f0d669 176 unsigned int cur_dmux[2];
c7d4b2fa 177 struct hda_input_mux *input_mux;
3cc08dc6 178 unsigned int cur_mux[3];
2f2f4251 179
403d1944
MP		 180 /* i/o switches */
181 unsigned int io_switch[2];
0fb87bb4 182 unsigned int clfe_swap;
5f10c4a9 183 unsigned int aloopback;
2f2f4251 184
c7d4b2fa
M		 185 struct hda_pcm pcm_rec[2]; /* PCM information */
186
187 /* dynamic controls and input_mux */
188 struct auto_pin_cfg autocfg;
189 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 190 struct snd_kcontrol_new *kctl_alloc;
8b65727b 191 struct hda_input_mux private_dimux;
c7d4b2fa 192 struct hda_input_mux private_imux;
b22b4821 193 struct hda_input_mux private_mono_mux;
2f2f4251
M		 194};
195
196static hda_nid_t stac9200_adc_nids[1] = {
197 0x03,
198};
199
200static hda_nid_t stac9200_mux_nids[1] = {
201 0x0c,
202};
203
204static hda_nid_t stac9200_dac_nids[1] = {
205 0x02,
206};
207
a64135a2
MR		 208static hda_nid_t stac92hd73xx_pwr_nids[8] = {
209 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
210 0x0f, 0x10, 0x11
211};
212
e1f0d669
MR		 213static hda_nid_t stac92hd73xx_adc_nids[2] = {
214 0x1a, 0x1b
215};
216
217#define STAC92HD73XX_NUM_DMICS 2
218static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
219 0x13, 0x14, 0
220};
221
222#define STAC92HD73_DAC_COUNT 5
223static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
224 0x15, 0x16, 0x17, 0x18, 0x19,
225};
226
227static hda_nid_t stac92hd73xx_mux_nids[4] = {
228 0x28, 0x29, 0x2a, 0x2b,
229};
230
231static hda_nid_t stac92hd73xx_dmux_nids[2] = {
232 0x20, 0x21,
233};
234
a64135a2
MR		 235static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
236 0x0a, 0x0d, 0x0f
237};
238
e035b841
MR		 239static hda_nid_t stac92hd71bxx_adc_nids[2] = {
240 0x12, 0x13,
241};
242
243static hda_nid_t stac92hd71bxx_mux_nids[2] = {
244 0x1a, 0x1b
245};
246
e1f0d669
MR		 247static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
248 0x1c,
249};
250
aea7bb0a 251static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 252 0x10, /*0x11, */
253};
254
255#define STAC92HD71BXX_NUM_DMICS 2
256static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
257 0x18, 0x19, 0
258};
259
8e21c34c
TD		 260static hda_nid_t stac925x_adc_nids[1] = {
261 0x03,
262};
263
264static hda_nid_t stac925x_mux_nids[1] = {
265 0x0f,
266};
267
268static hda_nid_t stac925x_dac_nids[1] = {
269 0x02,
270};
271
f6e9852a
TI		 272#define STAC925X_NUM_DMICS 1
273static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
274 0x15, 0
2c11f955
TD		 275};
276
1697055e
TI		 277static hda_nid_t stac925x_dmux_nids[1] = {
278 0x14,
279};
280
2f2f4251
M		 281static hda_nid_t stac922x_adc_nids[2] = {
282 0x06, 0x07,
283};
284
285static hda_nid_t stac922x_mux_nids[2] = {
286 0x12, 0x13,
287};
288
3cc08dc6
MP		 289static hda_nid_t stac927x_adc_nids[3] = {
290 0x07, 0x08, 0x09
291};
292
293static hda_nid_t stac927x_mux_nids[3] = {
294 0x15, 0x16, 0x17
295};
296
b76c850f
MR		 297static hda_nid_t stac927x_dac_nids[6] = {
298 0x02, 0x03, 0x04, 0x05, 0x06, 0
299};
300
e1f0d669
MR		 301static hda_nid_t stac927x_dmux_nids[1] = {
302 0x1b,
303};
304
7f16859a
MR		 305#define STAC927X_NUM_DMICS 2
306static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
307 0x13, 0x14, 0
308};
309
f3302a59
MP		 310static hda_nid_t stac9205_adc_nids[2] = {
311 0x12, 0x13
312};
313
314static hda_nid_t stac9205_mux_nids[2] = {
315 0x19, 0x1a
316};
317
e1f0d669 318static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 319 0x1d,
e1f0d669
MR		 320};
321
f6e9852a
TI		 322#define STAC9205_NUM_DMICS 2
323static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
324 0x17, 0x18, 0
8b65727b
MP		 325};
326
c7d4b2fa 327static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 328 0x08, 0x09, 0x0d, 0x0e,
329 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 330};
331
8e21c34c
TD		 332static hda_nid_t stac925x_pin_nids[8] = {
333 0x07, 0x08, 0x0a, 0x0b,
334 0x0c, 0x0d, 0x10, 0x11,
335};
336
2f2f4251
M		 337static hda_nid_t stac922x_pin_nids[10] = {
338 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
339 0x0f, 0x10, 0x11, 0x15, 0x1b,
340};
341
a7662640 342static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 343 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
344 0x0f, 0x10, 0x11, 0x12, 0x13,
a7662640 345 0x14, 0x1e, 0x22
e1f0d669
MR		 346};
347
e035b841
MR		 348static hda_nid_t stac92hd71bxx_pin_nids[10] = {
349 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
350 0x0f, 0x14, 0x18, 0x19, 0x1e,
351};
352
3cc08dc6
MP		 353static hda_nid_t stac927x_pin_nids[14] = {
354 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
355 0x0f, 0x10, 0x11, 0x12, 0x13,
356 0x14, 0x21, 0x22, 0x23,
357};
358
f3302a59
MP		 359static hda_nid_t stac9205_pin_nids[12] = {
360 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
361 0x0f, 0x14, 0x16, 0x17, 0x18,
362 0x21, 0x22,
f3302a59
MP		 363};
364
8b65727b
MP		 365static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
366 struct snd_ctl_elem_info *uinfo)
367{
368 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
369 struct sigmatel_spec *spec = codec->spec;
370 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
371}
372
373static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
374 struct snd_ctl_elem_value *ucontrol)
375{
376 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
377 struct sigmatel_spec *spec = codec->spec;
e1f0d669 378 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 379
e1f0d669 380 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 381 return 0;
382}
383
384static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
385 struct snd_ctl_elem_value *ucontrol)
386{
387 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
388 struct sigmatel_spec *spec = codec->spec;
e1f0d669 389 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 390
391 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 392 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 393}
394
c8b6bf9b 395static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 396{
397 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
398 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 399 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 400}
401
c8b6bf9b 402static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 403{
404 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
405 struct sigmatel_spec *spec = codec->spec;
406 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
407
408 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
409 return 0;
410}
411
c8b6bf9b 412static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 413{
414 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
415 struct sigmatel_spec *spec = codec->spec;
416 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
417
c7d4b2fa 418 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 419 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
420}
421
b22b4821
MR		 422static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
423 struct snd_ctl_elem_info *uinfo)
424{
425 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
426 struct sigmatel_spec *spec = codec->spec;
427 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
428}
429
430static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
431 struct snd_ctl_elem_value *ucontrol)
432{
433 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
434 struct sigmatel_spec *spec = codec->spec;
435
436 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
437 return 0;
438}
439
440static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
441 struct snd_ctl_elem_value *ucontrol)
442{
443 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
444 struct sigmatel_spec *spec = codec->spec;
445
446 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
447 spec->mono_nid, &spec->cur_mmux);
448}
449
5f10c4a9
ML		 450#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
451
452static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
453 struct snd_ctl_elem_value *ucontrol)
454{
455 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 456 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 457 struct sigmatel_spec *spec = codec->spec;
458
e1f0d669
MR		 459 ucontrol->value.integer.value[0] = !!(spec->aloopback &
460 (spec->aloopback_mask << idx));
5f10c4a9
ML		 461 return 0;
462}
463
464static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
465 struct snd_ctl_elem_value *ucontrol)
466{
467 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
468 struct sigmatel_spec *spec = codec->spec;
e1f0d669 469 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 470 unsigned int dac_mode;
e1f0d669 471 unsigned int val, idx_val;
5f10c4a9 472
e1f0d669
MR		 473 idx_val = spec->aloopback_mask << idx;
474 if (ucontrol->value.integer.value[0])
475 val = spec->aloopback | idx_val;
476 else
477 val = spec->aloopback & ~idx_val;
68ea7b2f 478 if (spec->aloopback == val)
5f10c4a9
ML		 479 return 0;
480
68ea7b2f 481 spec->aloopback = val;
5f10c4a9 482
e1f0d669
MR		 483 /* Only return the bits defined by the shift value of the
484 * first two bytes of the mask
485 */
5f10c4a9 486 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 487 kcontrol->private_value & 0xFFFF, 0x0);
488 dac_mode >>= spec->aloopback_shift;
5f10c4a9 489
e1f0d669 490 if (spec->aloopback & idx_val) {
5f10c4a9 491 snd_hda_power_up(codec);
e1f0d669 492 dac_mode |= idx_val;
5f10c4a9
ML		 493 } else {
494 snd_hda_power_down(codec);
e1f0d669 495 dac_mode &= ~idx_val;
5f10c4a9
ML		 496 }
497
498 snd_hda_codec_write_cache(codec, codec->afg, 0,
499 kcontrol->private_value >> 16, dac_mode);
500
501 return 1;
502}
503
c7d4b2fa 504static struct hda_verb stac9200_core_init[] = {
2f2f4251 505 /* set dac0mux for dac converter */
c7d4b2fa 506 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 507 {}
508};
509
1194b5b7
TI		 510static struct hda_verb stac9200_eapd_init[] = {
511 /* set dac0mux for dac converter */
512 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
513 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
514 {}
515};
516
e1f0d669
MR		 517static struct hda_verb stac92hd73xx_6ch_core_init[] = {
518 /* set master volume and direct control */
519 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
520 /* setup audio connections */
521 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
522 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
523 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
524 /* setup adcs to point to mixer */
525 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
526 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 527 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
528 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
529 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
530 /* setup import muxs */
531 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
532 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
533 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
534 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
535 {}
536};
537
d654a660
MR		 538static struct hda_verb dell_eq_core_init[] = {
539 /* set master volume to max value without distortion
540 * and direct control */
541 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
542 /* setup audio connections */
543 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
544 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
545 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
546 /* setup adcs to point to mixer */
547 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
548 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
549 /* setup import muxs */
550 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
551 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
552 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
553 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
554 {}
555};
556
52fe0f9d
MR		 557static struct hda_verb dell_m6_core_init[] = {
558 /* set master volume and direct control */
559 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
560 /* setup audio connections */
7747ecce
MR		 561 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
562 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 563 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
564 /* setup adcs to point to mixer */
565 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
566 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
567 /* setup import muxs */
568 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
569 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
570 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
571 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
572 {}
573};
574
e1f0d669
MR		 575static struct hda_verb stac92hd73xx_8ch_core_init[] = {
576 /* set master volume and direct control */
577 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
578 /* setup audio connections */
579 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
580 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
581 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
582 /* connect hp ports to dac3 */
583 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
584 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
585 /* setup adcs to point to mixer */
586 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
587 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 588 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
589 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
590 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
591 /* setup import muxs */
592 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
593 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
594 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
595 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
596 {}
597};
598
599static struct hda_verb stac92hd73xx_10ch_core_init[] = {
600 /* set master volume and direct control */
601 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
602 /* setup audio connections */
603 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
604 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
605 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
606 /* dac3 is connected to import3 mux */
607 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
608 /* connect hp ports to dac4 */
609 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
610 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
611 /* setup adcs to point to mixer */
612 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
613 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 614 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
615 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
616 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
617 /* setup import muxs */
618 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
619 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
620 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
621 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
622 {}
623};
624
e035b841 625static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 626 /* set master volume and direct control */
627 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
628 /* connect headphone jack to dac1 */
629 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
630 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
631 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
632 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
633 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
634 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 635};
636
637static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 638 /* set master volume and direct control */
639 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
640 /* connect headphone jack to dac1 */
641 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 642 /* connect ports 0d and 0f to audio mixer */
643 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
644 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 645 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 646 /* unmute dac0 input in audio mixer */
647 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 648 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
649 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
650 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
651 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 652 {}
653};
654
8e21c34c
TD		 655static struct hda_verb stac925x_core_init[] = {
656 /* set dac0mux for dac converter */
657 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
658 {}
659};
660
c7d4b2fa 661static struct hda_verb stac922x_core_init[] = {
2f2f4251 662 /* set master volume and direct control */
c7d4b2fa 663 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 664 {}
665};
666
93ed1503 667static struct hda_verb d965_core_init[] = {
19039bd0 668 /* set master volume and direct control */
93ed1503 669 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 670 /* unmute node 0x1b */
671 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
672 /* select node 0x03 as DAC */
673 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
674 {}
675};
676
3cc08dc6
MP		 677static struct hda_verb stac927x_core_init[] = {
678 /* set master volume and direct control */
679 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
680 {}
681};
682
f3302a59
MP		 683static struct hda_verb stac9205_core_init[] = {
684 /* set master volume and direct control */
685 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
686 {}
687};
688
b22b4821
MR		 689#define STAC_MONO_MUX \
690 { \
691 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
692 .name = "Mono Mux", \
693 .count = 1, \
694 .info = stac92xx_mono_mux_enum_info, \
695 .get = stac92xx_mono_mux_enum_get, \
696 .put = stac92xx_mono_mux_enum_put, \
697 }
698
9e05b7a3 699#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 700 { \
701 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
702 .name = "Input Source", \
9e05b7a3 703 .count = cnt, \
ca7c5a8b
ML		 704 .info = stac92xx_mux_enum_info, \
705 .get = stac92xx_mux_enum_get, \
706 .put = stac92xx_mux_enum_put, \
707 }
708
e1f0d669 709#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 710 { \
711 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
712 .name = "Analog Loopback", \
e1f0d669 713 .count = cnt, \
5f10c4a9
ML		 714 .info = stac92xx_aloopback_info, \
715 .get = stac92xx_aloopback_get, \
716 .put = stac92xx_aloopback_put, \
717 .private_value = verb_read | (verb_write << 16), \
718 }
719
c8b6bf9b 720static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 721 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
722 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 723 STAC_INPUT_SOURCE(1),
2f2f4251
M		 724 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
725 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 726 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 727 { } /* end */
728};
729
e1f0d669 730static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 731 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
732
e1f0d669
MR		 733 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
734 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
735
736 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
737 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
738
739 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
740 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
741
742 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
743 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
744
745 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
746 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
747
748 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
749 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
750
751 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
752 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
753 { } /* end */
754};
755
756static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 757 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
758
e1f0d669
MR		 759 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
760 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
761
762 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
763 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
764
765 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
766 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
767
768 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
769 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
770
771 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
772 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
773
774 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
775 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
776
777 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
778 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
779 { } /* end */
780};
781
782static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 783 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
784
e1f0d669
MR		 785 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
786 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
787
788 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
789 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
790
791 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
792 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
793
794 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
795 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
796
797 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
798 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
799
800 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
801 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
802
803 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
804 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
805 { } /* end */
806};
807
541eee87 808static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 809 STAC_INPUT_SOURCE(2),
e035b841 810
9b35947f
MR		 811 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
812 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
813 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
814
815 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
816 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
817 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 818
9b35947f
MR		 819 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
820 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 821 { } /* end */
822};
823
541eee87 824static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 825 STAC_INPUT_SOURCE(2),
826 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
827
541eee87
MR		 828 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
829 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
830 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
831
832 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
833 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
834 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
835 { } /* end */
836};
837
8e21c34c 838static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 839 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 840 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
841 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
842 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
843 { } /* end */
844};
845
9e05b7a3 846static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 847 STAC_INPUT_SOURCE(2),
e1f0d669 848 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 849
850 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
851 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
852 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
853
854 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
855 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
856 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
857
2f2f4251
M		 858 { } /* end */
859};
860
19039bd0 861/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 862static struct snd_kcontrol_new stac922x_mixer[] = {
863 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 864 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
865 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
866 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
867
868 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
869 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
870 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 871 { } /* end */
872};
873
9e05b7a3 874
d1d985f0 875static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 876 STAC_INPUT_SOURCE(3),
e1f0d669 877 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 878
9e05b7a3
ML		 879 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
880 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
881 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
882
883 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
884 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
885 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
886
887 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
888 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
889 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 890 { } /* end */
891};
892
1697055e
TI		 893static struct snd_kcontrol_new stac_dmux_mixer = {
894 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
895 .name = "Digital Input Source",
896 /* count set later */
897 .info = stac92xx_dmux_enum_info,
898 .get = stac92xx_dmux_enum_get,
899 .put = stac92xx_dmux_enum_put,
900};
901
2134ea4f
TI		 902static const char *slave_vols[] = {
903 "Front Playback Volume",
904 "Surround Playback Volume",
905 "Center Playback Volume",
906 "LFE Playback Volume",
907 "Side Playback Volume",
908 "Headphone Playback Volume",
909 "Headphone Playback Volume",
910 "Speaker Playback Volume",
911 "External Speaker Playback Volume",
912 "Speaker2 Playback Volume",
913 NULL
914};
915
916static const char *slave_sws[] = {
917 "Front Playback Switch",
918 "Surround Playback Switch",
919 "Center Playback Switch",
920 "LFE Playback Switch",
921 "Side Playback Switch",
922 "Headphone Playback Switch",
923 "Headphone Playback Switch",
924 "Speaker Playback Switch",
925 "External Speaker Playback Switch",
926 "Speaker2 Playback Switch",
edb54a55 927 "IEC958 Playback Switch",
2134ea4f
TI		 928 NULL
929};
930
2f2f4251
M		 931static int stac92xx_build_controls(struct hda_codec *codec)
932{
933 struct sigmatel_spec *spec = codec->spec;
934 int err;
c7d4b2fa 935 int i;
2f2f4251
M		 936
937 err = snd_hda_add_new_ctls(codec, spec->mixer);
938 if (err < 0)
939 return err;
c7d4b2fa
M		 940
941 for (i = 0; i < spec->num_mixers; i++) {
942 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
943 if (err < 0)
944 return err;
945 }
1697055e
TI		 946 if (spec->num_dmuxes > 0) {
947 stac_dmux_mixer.count = spec->num_dmuxes;
948 err = snd_ctl_add(codec->bus->card,
949 snd_ctl_new1(&stac_dmux_mixer, codec));
950 if (err < 0)
951 return err;
952 }
c7d4b2fa 953
dabbed6f
M		 954 if (spec->multiout.dig_out_nid) {
955 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
956 if (err < 0)
957 return err;
9a08160b
TI		 958 err = snd_hda_create_spdif_share_sw(codec,
959 &spec->multiout);
960 if (err < 0)
961 return err;
962 spec->multiout.share_spdif = 1;
dabbed6f
M		 963 }
964 if (spec->dig_in_nid) {
965 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
966 if (err < 0)
967 return err;
968 }
2134ea4f
TI		 969
970 /* if we have no master control, let's create it */
971 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 972 unsigned int vmaster_tlv[4];
2134ea4f 973 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 974 HDA_OUTPUT, vmaster_tlv);
2134ea4f 975 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 976 vmaster_tlv, slave_vols);
2134ea4f
TI		 977 if (err < 0)
978 return err;
979 }
980 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
981 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
982 NULL, slave_sws);
983 if (err < 0)
984 return err;
985 }
986
dabbed6f 987 return 0;
2f2f4251
M		 988}
989
403d1944 990static unsigned int ref9200_pin_configs[8] = {
dabbed6f 991 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 992 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
993};
994
dfe495d0
TI		 995/*
996 STAC 9200 pin configs for
997 102801A8
998 102801DE
999 102801E8
1000*/
1001static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1002 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1003 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1004};
1005
1006/*
1007 STAC 9200 pin configs for
1008 102801C0
1009 102801C1
1010*/
1011static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1012 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1013 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1014};
1015
1016/*
1017 STAC 9200 pin configs for
1018 102801C4 (Dell Dimension E310)
1019 102801C5
1020 102801C7
1021 102801D9
1022 102801DA
1023 102801E3
1024*/
1025static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1026 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1027 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1028};
1029
1030
1031/*
1032 STAC 9200-32 pin configs for
1033 102801B5 (Dell Inspiron 630m)
1034 102801D8 (Dell Inspiron 640m)
1035*/
1036static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1037 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1038 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1039};
1040
1041/*
1042 STAC 9200-32 pin configs for
1043 102801C2 (Dell Latitude D620)
1044 102801C8
1045 102801CC (Dell Latitude D820)
1046 102801D4
1047 102801D6
1048*/
1049static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1050 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1051 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1052};
1053
1054/*
1055 STAC 9200-32 pin configs for
1056 102801CE (Dell XPS M1710)
1057 102801CF (Dell Precision M90)
1058*/
1059static unsigned int dell9200_m23_pin_configs[8] = {
1060 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1061 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1062};
1063
1064/*
1065 STAC 9200-32 pin configs for
1066 102801C9
1067 102801CA
1068 102801CB (Dell Latitude 120L)
1069 102801D3
1070*/
1071static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1072 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1073 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1074};
1075
1076/*
1077 STAC 9200-32 pin configs for
1078 102801BD (Dell Inspiron E1505n)
1079 102801EE
1080 102801EF
1081*/
1082static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1083 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1084 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1085};
1086
1087/*
1088 STAC 9200-32 pin configs for
1089 102801F5 (Dell Inspiron 1501)
1090 102801F6
1091*/
1092static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1093 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1094 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1095};
1096
1097/*
1098 STAC 9200-32
1099 102801CD (Dell Inspiron E1705/9400)
1100*/
1101static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1102 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1103 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1104};
1105
bf277785
TD		 1106static unsigned int oqo9200_pin_configs[8] = {
1107 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1108 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1109};
1110
dfe495d0 1111
f5fcc13c
TI		 1112static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1113 [STAC_REF] = ref9200_pin_configs,
bf277785 1114 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1115 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1116 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1117 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1118 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1119 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1120 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1121 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1122 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1123 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1124 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1125 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1126};
1127
f5fcc13c
TI		 1128static const char *stac9200_models[STAC_9200_MODELS] = {
1129 [STAC_REF] = "ref",
bf277785 1130 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1131 [STAC_9200_DELL_D21] = "dell-d21",
1132 [STAC_9200_DELL_D22] = "dell-d22",
1133 [STAC_9200_DELL_D23] = "dell-d23",
1134 [STAC_9200_DELL_M21] = "dell-m21",
1135 [STAC_9200_DELL_M22] = "dell-m22",
1136 [STAC_9200_DELL_M23] = "dell-m23",
1137 [STAC_9200_DELL_M24] = "dell-m24",
1138 [STAC_9200_DELL_M25] = "dell-m25",
1139 [STAC_9200_DELL_M26] = "dell-m26",
1140 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1141 [STAC_9200_GATEWAY] = "gateway",
117f257d 1142 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1143};
1144
1145static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1146 /* SigmaTel reference board */
1147 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1148 "DFI LanParty", STAC_REF),
e7377071 1149 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1151 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1153 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1155 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1157 "unknown Dell", STAC_9200_DELL_D22),
1158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1159 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1161 "Dell Latitude D620", STAC_9200_DELL_M22),
1162 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1163 "unknown Dell", STAC_9200_DELL_D23),
1164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1165 "unknown Dell", STAC_9200_DELL_D23),
1166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1167 "unknown Dell", STAC_9200_DELL_M22),
1168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1169 "unknown Dell", STAC_9200_DELL_M24),
1170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1171 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1173 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1175 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1177 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1179 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1181 "Dell Precision M90", STAC_9200_DELL_M23),
1182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1183 "unknown Dell", STAC_9200_DELL_M22),
1184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1185 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1187 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1189 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1191 "unknown Dell", STAC_9200_DELL_D23),
1192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1193 "unknown Dell", STAC_9200_DELL_D23),
1194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1195 "unknown Dell", STAC_9200_DELL_D21),
1196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1197 "unknown Dell", STAC_9200_DELL_D23),
1198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1199 "unknown Dell", STAC_9200_DELL_D21),
1200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1201 "unknown Dell", STAC_9200_DELL_M25),
1202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1203 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1205 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1207 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1208 /* Panasonic */
117f257d 1209 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1210 /* Gateway machines needs EAPD to be set on resume */
1211 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1212 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1213 STAC_9200_GATEWAY),
1214 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1215 STAC_9200_GATEWAY),
bf277785
TD		 1216 /* OQO Mobile */
1217 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1218 {} /* terminator */
1219};
1220
8e21c34c
TD		 1221static unsigned int ref925x_pin_configs[8] = {
1222 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1223 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1224};
1225
1226static unsigned int stac925x_MA6_pin_configs[8] = {
1227 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1228 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1229};
1230
2c11f955
TD		 1231static unsigned int stac925x_PA6_pin_configs[8] = {
1232 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1233 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1234};
1235
8e21c34c 1236static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1237 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1238 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1239};
1240
1241static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1242 [STAC_REF] = ref925x_pin_configs,
1243 [STAC_M2_2] = stac925xM2_2_pin_configs,
1244 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1245 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1246};
1247
1248static const char *stac925x_models[STAC_925x_MODELS] = {
1249 [STAC_REF] = "ref",
1250 [STAC_M2_2] = "m2-2",
1251 [STAC_MA6] = "m6",
2c11f955 1252 [STAC_PA6] = "pa6",
8e21c34c
TD		 1253};
1254
1255static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1256 /* SigmaTel reference board */
1257 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1258 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1259 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1260 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1261 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1262 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1263 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1264 {} /* terminator */
1265};
1266
a7662640 1267static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1268 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1269 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1270 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1271 0x01452050,
1272};
1273
1274static unsigned int dell_m6_pin_configs[13] = {
1275 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
1276 0x03a11020, 0x03011050, 0x4f0000f0, 0x4f0000f0,
1277 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1278 0x4f0000f0,
e1f0d669
MR		 1279};
1280
1281static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1282 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1283 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1284};
1285
1286static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1287 [STAC_92HD73XX_REF] = "ref",
a7662640 1288 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1289};
1290
1291static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1292 /* SigmaTel reference board */
1293 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1294 "DFI LanParty", STAC_92HD73XX_REF),
1295 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1296 "unknown Dell", STAC_DELL_M6),
1297 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1298 "unknown Dell", STAC_DELL_M6),
1299 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1300 "unknown Dell", STAC_DELL_M6),
1301 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1302 "unknown Dell", STAC_DELL_M6),
1303 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1304 "unknown Dell", STAC_DELL_M6),
1305 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1306 "unknown Dell", STAC_DELL_M6),
1307 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1308 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1309 {} /* terminator */
1310};
1311
e035b841
MR		 1312static unsigned int ref92hd71bxx_pin_configs[10] = {
1313 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1314 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1315 0x90a000f0, 0x01452050,
1316};
1317
a7662640
MR		 1318static unsigned int dell_m4_1_pin_configs[13] = {
1319 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1320 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
a7662640
MR		 1321 0x40f000f0, 0x4f0000f0,
1322};
1323
1324static unsigned int dell_m4_2_pin_configs[13] = {
1325 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1326 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1327 0x40f000f0, 0x044413b0,
1328};
1329
e035b841
MR		 1330static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1331 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1332 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1333 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1334};
1335
1336static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1337 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1338 [STAC_DELL_M4_1] = "dell-m4-1",
1339 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1340};
1341
1342static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1343 /* SigmaTel reference board */
1344 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1345 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1346 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1347 "unknown Dell", STAC_DELL_M4_1),
1348 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1349 "unknown Dell", STAC_DELL_M4_1),
1350 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1351 "unknown Dell", STAC_DELL_M4_1),
1352 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1353 "unknown Dell", STAC_DELL_M4_1),
1354 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1355 "unknown Dell", STAC_DELL_M4_1),
1356 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1357 "unknown Dell", STAC_DELL_M4_1),
1358 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1359 "unknown Dell", STAC_DELL_M4_1),
1360 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1361 "unknown Dell", STAC_DELL_M4_2),
1362 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1363 "unknown Dell", STAC_DELL_M4_2),
1364 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1365 "unknown Dell", STAC_DELL_M4_2),
1366 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1367 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1368 {} /* terminator */
1369};
1370
403d1944
MP		 1371static unsigned int ref922x_pin_configs[10] = {
1372 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1373 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1374 0x40000100, 0x40000100,
1375};
1376
dfe495d0
TI		 1377/*
1378 STAC 922X pin configs for
1379 102801A7
1380 102801AB
1381 102801A9
1382 102801D1
1383 102801D2
1384*/
1385static unsigned int dell_922x_d81_pin_configs[10] = {
1386 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1387 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1388 0x01813122, 0x400001f2,
1389};
1390
1391/*
1392 STAC 922X pin configs for
1393 102801AC
1394 102801D0
1395*/
1396static unsigned int dell_922x_d82_pin_configs[10] = {
1397 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1398 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1399 0x01813122, 0x400001f1,
1400};
1401
1402/*
1403 STAC 922X pin configs for
1404 102801BF
1405*/
1406static unsigned int dell_922x_m81_pin_configs[10] = {
1407 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1408 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1409 0x40C003f1, 0x405003f0,
1410};
1411
1412/*
1413 STAC 9221 A1 pin configs for
1414 102801D7 (Dell XPS M1210)
1415*/
1416static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1417 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1418 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1419 0x508003f3, 0x405003f4,
1420};
1421
403d1944 1422static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1423 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1424 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1425 0x02a19120, 0x40000100,
1426};
1427
1428static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1429 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1430 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1431 0x02a19320, 0x40000100,
1432};
1433
5d5d3bc3
IZ		 1434static unsigned int intel_mac_v1_pin_configs[10] = {
1435 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1436 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1437 0x400000fc, 0x400000fb,
1438};
1439
1440static unsigned int intel_mac_v2_pin_configs[10] = {
1441 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1442 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1443 0x400000fc, 0x400000fb,
6f0778d8
NB		 1444};
1445
5d5d3bc3
IZ		 1446static unsigned int intel_mac_v3_pin_configs[10] = {
1447 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1448 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1449 0x400000fc, 0x400000fb,
1450};
1451
5d5d3bc3
IZ		 1452static unsigned int intel_mac_v4_pin_configs[10] = {
1453 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1454 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1455 0x400000fc, 0x400000fb,
1456};
1457
5d5d3bc3
IZ		 1458static unsigned int intel_mac_v5_pin_configs[10] = {
1459 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1460 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1461 0x400000fc, 0x400000fb,
0dae0f83
TI		 1462};
1463
76c08828 1464
19039bd0 1465static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1466 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1467 [STAC_D945GTP3] = d945gtp3_pin_configs,
1468 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1469 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1470 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1471 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1472 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1473 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1474 /* for backward compatibility */
5d5d3bc3
IZ		 1475 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1476 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1477 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1478 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1479 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1480 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1481 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1482 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1483 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1484 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1485};
1486
f5fcc13c
TI		 1487static const char *stac922x_models[STAC_922X_MODELS] = {
1488 [STAC_D945_REF] = "ref",
1489 [STAC_D945GTP5] = "5stack",
1490 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1491 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1492 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1493 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1494 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1495 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1496 /* for backward compatibility */
f5fcc13c 1497 [STAC_MACMINI] = "macmini",
3fc24d85 1498 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1499 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1500 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1501 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1502 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1503 [STAC_922X_DELL_D81] = "dell-d81",
1504 [STAC_922X_DELL_D82] = "dell-d82",
1505 [STAC_922X_DELL_M81] = "dell-m81",
1506 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1507};
1508
1509static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1510 /* SigmaTel reference board */
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1512 "DFI LanParty", STAC_D945_REF),
1513 /* Intel 945G based systems */
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1515 "Intel D945G", STAC_D945GTP3),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1517 "Intel D945G", STAC_D945GTP3),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1519 "Intel D945G", STAC_D945GTP3),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1521 "Intel D945G", STAC_D945GTP3),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1523 "Intel D945G", STAC_D945GTP3),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1525 "Intel D945G", STAC_D945GTP3),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1527 "Intel D945G", STAC_D945GTP3),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1529 "Intel D945G", STAC_D945GTP3),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1531 "Intel D945G", STAC_D945GTP3),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1533 "Intel D945G", STAC_D945GTP3),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1535 "Intel D945G", STAC_D945GTP3),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1537 "Intel D945G", STAC_D945GTP3),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1539 "Intel D945G", STAC_D945GTP3),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1541 "Intel D945G", STAC_D945GTP3),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1543 "Intel D945G", STAC_D945GTP3),
1544 /* Intel D945G 5-stack systems */
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1546 "Intel D945G", STAC_D945GTP5),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1548 "Intel D945G", STAC_D945GTP5),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1550 "Intel D945G", STAC_D945GTP5),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1552 "Intel D945G", STAC_D945GTP5),
1553 /* Intel 945P based systems */
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1555 "Intel D945P", STAC_D945GTP3),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1557 "Intel D945P", STAC_D945GTP3),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1559 "Intel D945P", STAC_D945GTP3),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1561 "Intel D945P", STAC_D945GTP3),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1563 "Intel D945P", STAC_D945GTP3),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1565 "Intel D945P", STAC_D945GTP5),
1566 /* other systems */
1567 /* Apple Mac Mini (early 2006) */
1568 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1569 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1570 /* Dell systems */
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1572 "unknown Dell", STAC_922X_DELL_D81),
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1574 "unknown Dell", STAC_922X_DELL_D81),
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1576 "unknown Dell", STAC_922X_DELL_D81),
1577 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1578 "unknown Dell", STAC_922X_DELL_D82),
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1580 "unknown Dell", STAC_922X_DELL_M81),
1581 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1582 "unknown Dell", STAC_922X_DELL_D82),
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1584 "unknown Dell", STAC_922X_DELL_D81),
1585 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1586 "unknown Dell", STAC_922X_DELL_D81),
1587 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1588 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1589 {} /* terminator */
1590};
1591
3cc08dc6 1592static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1593 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1594 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1595 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1596 0x01c42190, 0x40000100,
3cc08dc6
MP		 1597};
1598
93ed1503 1599static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1600 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1601 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1602 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1603 0x40000100, 0x40000100
1604};
1605
93ed1503
TD		 1606static unsigned int d965_5st_pin_configs[14] = {
1607 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1608 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1609 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1610 0x40000100, 0x40000100
1611};
1612
4ff076e5
TD		 1613static unsigned int dell_3st_pin_configs[14] = {
1614 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1615 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1616 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1617 0x40c003fc, 0x40000100
1618};
1619
93ed1503 1620static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1621 [STAC_D965_REF] = ref927x_pin_configs,
1622 [STAC_D965_3ST] = d965_3st_pin_configs,
1623 [STAC_D965_5ST] = d965_5st_pin_configs,
1624 [STAC_DELL_3ST] = dell_3st_pin_configs,
1625 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1626};
1627
f5fcc13c 1628static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1629 [STAC_D965_REF] = "ref",
1630 [STAC_D965_3ST] = "3stack",
1631 [STAC_D965_5ST] = "5stack",
1632 [STAC_DELL_3ST] = "dell-3stack",
1633 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1634};
1635
1636static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1637 /* SigmaTel reference board */
1638 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1639 "DFI LanParty", STAC_D965_REF),
81d3dbde 1640 /* Intel 946 based systems */
f5fcc13c
TI		 1641 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1642 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1643 /* 965 based 3 stack systems */
f5fcc13c
TI		 1644 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1645 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1646 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1648 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1649 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1650 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1657 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1660 /* Dell 3 stack systems */
8e9068b1 1661 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1662 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1663 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1664 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1665 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1666 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1667 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1668 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1669 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1670 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1671 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1672 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1673 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1674 /* 965 based 5 stack systems */
f5fcc13c
TI		 1675 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1679 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1680 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1682 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1684 {} /* terminator */
1685};
1686
f3302a59
MP		 1687static unsigned int ref9205_pin_configs[12] = {
1688 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1689 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1690 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1691};
1692
dfe495d0
TI		 1693/*
1694 STAC 9205 pin configs for
1695 102801F1
1696 102801F2
1697 102801FC
1698 102801FD
1699 10280204
1700 1028021F
3fa2ef74 1701 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1702*/
1703static unsigned int dell_9205_m42_pin_configs[12] = {
1704 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1705 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1706 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1707};
1708
1709/*
1710 STAC 9205 pin configs for
1711 102801F9
1712 102801FA
1713 102801FE
1714 102801FF (Dell Precision M4300)
1715 10280206
1716 10280200
1717 10280201
1718*/
1719static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1720 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1721 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1722 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1723};
1724
dfe495d0 1725static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1726 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1727 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1728 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1729};
1730
f5fcc13c 1731static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1732 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1733 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1734 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1735 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1736};
1737
f5fcc13c
TI		 1738static const char *stac9205_models[STAC_9205_MODELS] = {
1739 [STAC_9205_REF] = "ref",
dfe495d0 1740 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1741 [STAC_9205_DELL_M43] = "dell-m43",
1742 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1743};
1744
1745static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1746 /* SigmaTel reference board */
1747 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1748 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1749 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1750 "unknown Dell", STAC_9205_DELL_M42),
1751 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1752 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1753 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1754 "Dell Precision", STAC_9205_DELL_M43),
1755 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1756 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1757 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1758 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1759 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1760 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1761 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1762 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1763 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1764 "unknown Dell", STAC_9205_DELL_M42),
1765 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1766 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1767 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1768 "Dell Precision", STAC_9205_DELL_M43),
1769 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1770 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1771 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1772 "Dell Precision", STAC_9205_DELL_M43),
1773 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1774 "Dell Inspiron", STAC_9205_DELL_M44),
1775 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1776 "Dell Inspiron", STAC_9205_DELL_M44),
1777 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1778 "Dell Inspiron", STAC_9205_DELL_M44),
1779 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1780 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1781 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1782 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1783 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1784 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1785 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1786 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1787 {} /* terminator */
1788};
1789
11b44bbd
RF		 1790static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1791{
1792 int i;
1793 struct sigmatel_spec *spec = codec->spec;
1794
1795 if (! spec->bios_pin_configs) {
1796 spec->bios_pin_configs = kcalloc(spec->num_pins,
1797 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1798 if (! spec->bios_pin_configs)
1799 return -ENOMEM;
1800 }
1801
1802 for (i = 0; i < spec->num_pins; i++) {
1803 hda_nid_t nid = spec->pin_nids[i];
1804 unsigned int pin_cfg;
1805
1806 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1807 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1808 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1809 nid, pin_cfg);
1810 spec->bios_pin_configs[i] = pin_cfg;
1811 }
1812
1813 return 0;
1814}
1815
87d48363
MR		 1816static void stac92xx_set_config_reg(struct hda_codec *codec,
1817 hda_nid_t pin_nid, unsigned int pin_config)
1818{
1819 int i;
1820 snd_hda_codec_write(codec, pin_nid, 0,
1821 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1822 pin_config & 0x000000ff);
1823 snd_hda_codec_write(codec, pin_nid, 0,
1824 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1825 (pin_config & 0x0000ff00) >> 8);
1826 snd_hda_codec_write(codec, pin_nid, 0,
1827 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1828 (pin_config & 0x00ff0000) >> 16);
1829 snd_hda_codec_write(codec, pin_nid, 0,
1830 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1831 pin_config >> 24);
1832 i = snd_hda_codec_read(codec, pin_nid, 0,
1833 AC_VERB_GET_CONFIG_DEFAULT,
1834 0x00);
1835 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1836 pin_nid, i);
1837}
1838
2f2f4251
M		 1839static void stac92xx_set_config_regs(struct hda_codec *codec)
1840{
1841 int i;
1842 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1843
87d48363
MR		 1844 if (!spec->pin_configs)
1845 return;
11b44bbd 1846
87d48363
MR		 1847 for (i = 0; i < spec->num_pins; i++)
1848 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1849 spec->pin_configs[i]);
2f2f4251 1850}
2f2f4251 1851
dabbed6f 1852/*
c7d4b2fa 1853 * Analog playback callbacks
dabbed6f 1854 */
c7d4b2fa
M		 1855static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1856 struct hda_codec *codec,
c8b6bf9b 1857 struct snd_pcm_substream *substream)
2f2f4251 1858{
dabbed6f 1859 struct sigmatel_spec *spec = codec->spec;
9a08160b
TI		 1860 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
1861 hinfo);
2f2f4251
M		 1862}
1863
2f2f4251
M		 1864static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1865 struct hda_codec *codec,
1866 unsigned int stream_tag,
1867 unsigned int format,
c8b6bf9b 1868 struct snd_pcm_substream *substream)
2f2f4251
M		 1869{
1870 struct sigmatel_spec *spec = codec->spec;
403d1944 1871 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1872}
1873
1874static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1875 struct hda_codec *codec,
c8b6bf9b 1876 struct snd_pcm_substream *substream)
2f2f4251
M		 1877{
1878 struct sigmatel_spec *spec = codec->spec;
1879 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1880}
1881
dabbed6f
M		 1882/*
1883 * Digital playback callbacks
1884 */
1885static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1886 struct hda_codec *codec,
c8b6bf9b 1887 struct snd_pcm_substream *substream)
dabbed6f
M		 1888{
1889 struct sigmatel_spec *spec = codec->spec;
1890 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1891}
1892
1893static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1894 struct hda_codec *codec,
c8b6bf9b 1895 struct snd_pcm_substream *substream)
dabbed6f
M		 1896{
1897 struct sigmatel_spec *spec = codec->spec;
1898 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1899}
1900
6b97eb45
TI		 1901static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1902 struct hda_codec *codec,
1903 unsigned int stream_tag,
1904 unsigned int format,
1905 struct snd_pcm_substream *substream)
1906{
1907 struct sigmatel_spec *spec = codec->spec;
1908 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1909 stream_tag, format, substream);
1910}
1911
dabbed6f 1912
2f2f4251
M		 1913/*
1914 * Analog capture callbacks
1915 */
1916static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1917 struct hda_codec *codec,
1918 unsigned int stream_tag,
1919 unsigned int format,
c8b6bf9b 1920 struct snd_pcm_substream *substream)
2f2f4251
M		 1921{
1922 struct sigmatel_spec *spec = codec->spec;
1923
1924 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1925 stream_tag, 0, format);
1926 return 0;
1927}
1928
1929static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1930 struct hda_codec *codec,
c8b6bf9b 1931 struct snd_pcm_substream *substream)
2f2f4251
M		 1932{
1933 struct sigmatel_spec *spec = codec->spec;
1934
888afa15 1935 snd_hda_codec_cleanup_stream(codec, spec->adc_nids[substream->number]);
2f2f4251
M		 1936 return 0;
1937}
1938
dabbed6f
M		 1939static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1940 .substreams = 1,
1941 .channels_min = 2,
1942 .channels_max = 2,
1943 /* NID is set in stac92xx_build_pcms */
1944 .ops = {
1945 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1946 .close = stac92xx_dig_playback_pcm_close,
1947 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1948 },
1949};
1950
1951static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1952 .substreams = 1,
1953 .channels_min = 2,
1954 .channels_max = 2,
1955 /* NID is set in stac92xx_build_pcms */
1956};
1957
2f2f4251
M		 1958static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1959 .substreams = 1,
1960 .channels_min = 2,
c7d4b2fa 1961 .channels_max = 8,
2f2f4251
M		 1962 .nid = 0x02, /* NID to query formats and rates */
1963 .ops = {
1964 .open = stac92xx_playback_pcm_open,
1965 .prepare = stac92xx_playback_pcm_prepare,
1966 .cleanup = stac92xx_playback_pcm_cleanup
1967 },
1968};
1969
3cc08dc6
MP		 1970static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1971 .substreams = 1,
1972 .channels_min = 2,
1973 .channels_max = 2,
1974 .nid = 0x06, /* NID to query formats and rates */
1975 .ops = {
1976 .open = stac92xx_playback_pcm_open,
1977 .prepare = stac92xx_playback_pcm_prepare,
1978 .cleanup = stac92xx_playback_pcm_cleanup
1979 },
1980};
1981
2f2f4251 1982static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1983 .channels_min = 2,
1984 .channels_max = 2,
9e05b7a3 1985 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1986 .ops = {
1987 .prepare = stac92xx_capture_pcm_prepare,
1988 .cleanup = stac92xx_capture_pcm_cleanup
1989 },
1990};
1991
1992static int stac92xx_build_pcms(struct hda_codec *codec)
1993{
1994 struct sigmatel_spec *spec = codec->spec;
1995 struct hda_pcm *info = spec->pcm_rec;
1996
1997 codec->num_pcms = 1;
1998 codec->pcm_info = info;
1999
c7d4b2fa 2000 info->name = "STAC92xx Analog";
2f2f4251 2001 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2002 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2003 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2004 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2005
2006 if (spec->alt_switch) {
2007 codec->num_pcms++;
2008 info++;
2009 info->name = "STAC92xx Analog Alt";
2010 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2011 }
2f2f4251 2012
dabbed6f
M		 2013 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2014 codec->num_pcms++;
2015 info++;
2016 info->name = "STAC92xx Digital";
7ba72ba1 2017 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2018 if (spec->multiout.dig_out_nid) {
2019 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2020 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2021 }
2022 if (spec->dig_in_nid) {
2023 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2024 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2025 }
2026 }
2027
2f2f4251
M		 2028 return 0;
2029}
2030
c960a03b
TI		 2031static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2032{
2033 unsigned int pincap = snd_hda_param_read(codec, nid,
2034 AC_PAR_PIN_CAP);
2035 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2036 if (pincap & AC_PINCAP_VREF_100)
2037 return AC_PINCTL_VREF_100;
2038 if (pincap & AC_PINCAP_VREF_80)
2039 return AC_PINCTL_VREF_80;
2040 if (pincap & AC_PINCAP_VREF_50)
2041 return AC_PINCTL_VREF_50;
2042 if (pincap & AC_PINCAP_VREF_GRD)
2043 return AC_PINCTL_VREF_GRD;
2044 return 0;
2045}
2046
403d1944
MP		 2047static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2048
2049{
82beb8fd
TI		 2050 snd_hda_codec_write_cache(codec, nid, 0,
2051 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2052}
2053
a5ce8890 2054#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2055
2056static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2057{
2058 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2059 struct sigmatel_spec *spec = codec->spec;
2060 int io_idx = kcontrol-> private_value & 0xff;
2061
2062 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2063 return 0;
2064}
2065
2066static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2067{
2068 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2069 struct sigmatel_spec *spec = codec->spec;
2070 hda_nid_t nid = kcontrol->private_value >> 8;
2071 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2072 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2073
2074 spec->io_switch[io_idx] = val;
2075
2076 if (val)
2077 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2078 else {
2079 unsigned int pinctl = AC_PINCTL_IN_EN;
2080 if (io_idx) /* set VREF for mic */
2081 pinctl |= stac92xx_get_vref(codec, nid);
2082 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2083 }
40c1d308
JZ		 2084
2085 /* check the auto-mute again: we need to mute/unmute the speaker
2086 * appropriately according to the pin direction
2087 */
2088 if (spec->hp_detect)
2089 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2090
403d1944
MP		 2091 return 1;
2092}
2093
0fb87bb4
ML		 2094#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2095
2096static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2097 struct snd_ctl_elem_value *ucontrol)
2098{
2099 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2100 struct sigmatel_spec *spec = codec->spec;
2101
2102 ucontrol->value.integer.value[0] = spec->clfe_swap;
2103 return 0;
2104}
2105
2106static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2107 struct snd_ctl_elem_value *ucontrol)
2108{
2109 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2110 struct sigmatel_spec *spec = codec->spec;
2111 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2112 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2113
68ea7b2f 2114 if (spec->clfe_swap == val)
0fb87bb4
ML		 2115 return 0;
2116
68ea7b2f 2117 spec->clfe_swap = val;
0fb87bb4
ML		 2118
2119 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2120 spec->clfe_swap ? 0x4 : 0x0);
2121
2122 return 1;
2123}
2124
403d1944
MP		 2125#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2126 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2127 .name = xname, \
2128 .index = 0, \
2129 .info = stac92xx_io_switch_info, \
2130 .get = stac92xx_io_switch_get, \
2131 .put = stac92xx_io_switch_put, \
2132 .private_value = xpval, \
2133 }
2134
0fb87bb4
ML		 2135#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2136 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2137 .name = xname, \
2138 .index = 0, \
2139 .info = stac92xx_clfe_switch_info, \
2140 .get = stac92xx_clfe_switch_get, \
2141 .put = stac92xx_clfe_switch_put, \
2142 .private_value = xpval, \
2143 }
403d1944 2144
c7d4b2fa
M		 2145enum {
2146 STAC_CTL_WIDGET_VOL,
2147 STAC_CTL_WIDGET_MUTE,
09a99959 2148 STAC_CTL_WIDGET_MONO_MUX,
403d1944 2149 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2150 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2151};
2152
c8b6bf9b 2153static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2154 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2155 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2156 STAC_MONO_MUX,
403d1944 2157 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2158 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2159};
2160
2161/* add dynamic controls */
2162static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2163{
c8b6bf9b 2164 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2165
2166 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2167 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2168
2169 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2170 if (! knew)
2171 return -ENOMEM;
2172 if (spec->kctl_alloc) {
2173 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2174 kfree(spec->kctl_alloc);
2175 }
2176 spec->kctl_alloc = knew;
2177 spec->num_kctl_alloc = num;
2178 }
2179
2180 knew = &spec->kctl_alloc[spec->num_kctl_used];
2181 *knew = stac92xx_control_templates[type];
82fe0c58 2182 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2183 if (! knew->name)
2184 return -ENOMEM;
2185 knew->private_value = val;
2186 spec->num_kctl_used++;
2187 return 0;
2188}
2189
403d1944
MP		 2190/* flag inputs as additional dynamic lineouts */
2191static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2192{
2193 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2194 unsigned int wcaps, wtype;
2195 int i, num_dacs = 0;
2196
2197 /* use the wcaps cache to count all DACs available for line-outs */
2198 for (i = 0; i < codec->num_nodes; i++) {
2199 wcaps = codec->wcaps[i];
2200 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2201
7b043899
SL		 2202 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2203 num_dacs++;
2204 }
403d1944 2205
7b043899
SL		 2206 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2207
403d1944
MP		 2208 switch (cfg->line_outs) {
2209 case 3:
2210 /* add line-in as side */
7b043899 2211 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2212 cfg->line_out_pins[cfg->line_outs] =
2213 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2214 spec->line_switch = 1;
2215 cfg->line_outs++;
2216 }
2217 break;
2218 case 2:
2219 /* add line-in as clfe and mic as side */
7b043899 2220 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2221 cfg->line_out_pins[cfg->line_outs] =
2222 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2223 spec->line_switch = 1;
2224 cfg->line_outs++;
2225 }
7b043899 2226 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2227 cfg->line_out_pins[cfg->line_outs] =
2228 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2229 spec->mic_switch = 1;
2230 cfg->line_outs++;
2231 }
2232 break;
2233 case 1:
2234 /* add line-in as surr and mic as clfe */
7b043899 2235 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2236 cfg->line_out_pins[cfg->line_outs] =
2237 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2238 spec->line_switch = 1;
2239 cfg->line_outs++;
2240 }
7b043899 2241 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2242 cfg->line_out_pins[cfg->line_outs] =
2243 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2244 spec->mic_switch = 1;
2245 cfg->line_outs++;
2246 }
2247 break;
2248 }
2249
2250 return 0;
2251}
2252
7b043899
SL		 2253
2254static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2255{
2256 int i;
2257
2258 for (i = 0; i < spec->multiout.num_dacs; i++) {
2259 if (spec->multiout.dac_nids[i] == nid)
2260 return 1;
2261 }
2262
2263 return 0;
2264}
2265
3cc08dc6 2266/*
7b043899
SL		 2267 * Fill in the dac_nids table from the parsed pin configuration
2268 * This function only works when every pin in line_out_pins[]
2269 * contains atleast one DAC in its connection list. Some 92xx
2270 * codecs are not connected directly to a DAC, such as the 9200
2271 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2272 */
19039bd0 2273static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2274 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2275{
2276 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2277 int i, j, conn_len = 0;
2278 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2279 unsigned int wcaps, wtype;
2280
c7d4b2fa
M		 2281 for (i = 0; i < cfg->line_outs; i++) {
2282 nid = cfg->line_out_pins[i];
7b043899
SL		 2283 conn_len = snd_hda_get_connections(codec, nid, conn,
2284 HDA_MAX_CONNECTIONS);
2285 for (j = 0; j < conn_len; j++) {
2286 wcaps = snd_hda_param_read(codec, conn[j],
2287 AC_PAR_AUDIO_WIDGET_CAP);
2288 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2289 if (wtype != AC_WID_AUD_OUT ||
2290 (wcaps & AC_WCAP_DIGITAL))
2291 continue;
2292 /* conn[j] is a DAC routed to this line-out */
2293 if (!is_in_dac_nids(spec, conn[j]))
2294 break;
2295 }
2296
2297 if (j == conn_len) {
df802952
TI		 2298 if (spec->multiout.num_dacs > 0) {
2299 /* we have already working output pins,
2300 * so let's drop the broken ones again
2301 */
2302 cfg->line_outs = spec->multiout.num_dacs;
2303 break;
2304 }
7b043899
SL		 2305 /* error out, no available DAC found */
2306 snd_printk(KERN_ERR
2307 "%s: No available DAC for pin 0x%x\n",
2308 __func__, nid);
2309 return -ENODEV;
2310 }
2311
2312 spec->multiout.dac_nids[i] = conn[j];
2313 spec->multiout.num_dacs++;
2314 if (conn_len > 1) {
2315 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2316 snd_hda_codec_write_cache(codec, nid, 0,
2317 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2318
7b043899
SL		 2319 }
2320 }
c7d4b2fa 2321
7b043899
SL		 2322 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2323 spec->multiout.num_dacs,
2324 spec->multiout.dac_nids[0],
2325 spec->multiout.dac_nids[1],
2326 spec->multiout.dac_nids[2],
2327 spec->multiout.dac_nids[3],
2328 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2329 return 0;
2330}
2331
eb06ed8f
TI		 2332/* create volume control/switch for the given prefx type */
2333static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2334{
2335 char name[32];
2336 int err;
2337
2338 sprintf(name, "%s Playback Volume", pfx);
2339 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2340 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2341 if (err < 0)
2342 return err;
2343 sprintf(name, "%s Playback Switch", pfx);
2344 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2345 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2346 if (err < 0)
2347 return err;
2348 return 0;
2349}
2350
ae0afd81
MR		 2351static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2352{
2353 if (!spec->multiout.hp_nid)
2354 spec->multiout.hp_nid = nid;
2355 else if (spec->multiout.num_dacs > 4) {
2356 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2357 return 1;
2358 } else {
2359 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2360 spec->multiout.num_dacs++;
2361 }
2362 return 0;
2363}
2364
2365static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2366{
2367 if (is_in_dac_nids(spec, nid))
2368 return 1;
2369 if (spec->multiout.hp_nid == nid)
2370 return 1;
2371 return 0;
2372}
2373
c7d4b2fa 2374/* add playback controls from the parsed DAC table */
0fb87bb4 2375static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2376 const struct auto_pin_cfg *cfg)
c7d4b2fa 2377{
19039bd0
TI		 2378 static const char *chname[4] = {
2379 "Front", "Surround", NULL /*CLFE*/, "Side"
2380 };
c7d4b2fa
M		 2381 hda_nid_t nid;
2382 int i, err;
2383
0fb87bb4 2384 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2385 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2386
2387
40ac8c4f 2388 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2389 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2390 continue;
2391
2392 nid = spec->multiout.dac_nids[i];
2393
2394 if (i == 2) {
2395 /* Center/LFE */
eb06ed8f
TI		 2396 err = create_controls(spec, "Center", nid, 1);
2397 if (err < 0)
c7d4b2fa 2398 return err;
eb06ed8f
TI		 2399 err = create_controls(spec, "LFE", nid, 2);
2400 if (err < 0)
c7d4b2fa 2401 return err;
0fb87bb4
ML		 2402
2403 wid_caps = get_wcaps(codec, nid);
2404
2405 if (wid_caps & AC_WCAP_LR_SWAP) {
2406 err = stac92xx_add_control(spec,
2407 STAC_CTL_WIDGET_CLFE_SWITCH,
2408 "Swap Center/LFE Playback Switch", nid);
2409
2410 if (err < 0)
2411 return err;
2412 }
2413
c7d4b2fa 2414 } else {
eb06ed8f
TI		 2415 err = create_controls(spec, chname[i], nid, 3);
2416 if (err < 0)
c7d4b2fa
M		 2417 return err;
2418 }
2419 }
2420
b5895dc8
MR		 2421 if (spec->line_switch) {
2422 nid = cfg->input_pins[AUTO_PIN_LINE];
2423 pincap = snd_hda_param_read(codec, nid,
2424 AC_PAR_PIN_CAP);
2425 if (pincap & AC_PINCAP_OUT) {
2426 err = stac92xx_add_control(spec,
2427 STAC_CTL_WIDGET_IO_SWITCH,
2428 "Line In as Output Switch", nid << 8);
2429 if (err < 0)
2430 return err;
2431 }
2432 }
403d1944 2433
b5895dc8 2434 if (spec->mic_switch) {
cace16f1 2435 unsigned int def_conf;
ae0afd81
MR		 2436 unsigned int mic_pin = AUTO_PIN_MIC;
2437again:
2438 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2439 def_conf = snd_hda_codec_read(codec, nid, 0,
2440 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2441 /* some laptops have an internal analog microphone
2442 * which can't be used as a output */
2443 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2444 pincap = snd_hda_param_read(codec, nid,
2445 AC_PAR_PIN_CAP);
2446 if (pincap & AC_PINCAP_OUT) {
2447 err = stac92xx_add_control(spec,
2448 STAC_CTL_WIDGET_IO_SWITCH,
2449 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2450 nid = snd_hda_codec_read(codec, nid, 0,
2451 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2452 if (!check_in_dac_nids(spec, nid))
2453 add_spec_dacs(spec, nid);
cace16f1
MR		 2454 if (err < 0)
2455 return err;
2456 }
ae0afd81
MR		 2457 } else if (mic_pin == AUTO_PIN_MIC) {
2458 mic_pin = AUTO_PIN_FRONT_MIC;
2459 goto again;
b5895dc8
MR		 2460 }
2461 }
403d1944 2462
c7d4b2fa
M		 2463 return 0;
2464}
2465
eb06ed8f
TI		 2466/* add playback controls for Speaker and HP outputs */
2467static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2468 struct auto_pin_cfg *cfg)
2469{
2470 struct sigmatel_spec *spec = codec->spec;
2471 hda_nid_t nid;
2472 int i, old_num_dacs, err;
2473
2474 old_num_dacs = spec->multiout.num_dacs;
2475 for (i = 0; i < cfg->hp_outs; i++) {
2476 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2477 if (wid_caps & AC_WCAP_UNSOL_CAP)
2478 spec->hp_detect = 1;
2479 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2480 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2481 if (check_in_dac_nids(spec, nid))
2482 nid = 0;
2483 if (! nid)
c7d4b2fa 2484 continue;
eb06ed8f
TI		 2485 add_spec_dacs(spec, nid);
2486 }
2487 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2488 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2489 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2490 if (check_in_dac_nids(spec, nid))
2491 nid = 0;
eb06ed8f
TI		 2492 if (! nid)
2493 continue;
2494 add_spec_dacs(spec, nid);
c7d4b2fa 2495 }
1b290a51
MR		 2496 for (i = 0; i < cfg->line_outs; i++) {
2497 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2498 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2499 if (check_in_dac_nids(spec, nid))
2500 nid = 0;
2501 if (! nid)
2502 continue;
2503 add_spec_dacs(spec, nid);
2504 }
eb06ed8f
TI		 2505 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2506 static const char *pfxs[] = {
2507 "Speaker", "External Speaker", "Speaker2",
2508 };
2509 err = create_controls(spec, pfxs[i - old_num_dacs],
2510 spec->multiout.dac_nids[i], 3);
2511 if (err < 0)
2512 return err;
2513 }
2514 if (spec->multiout.hp_nid) {
2626a263
TI		 2515 err = create_controls(spec, "Headphone",
2516 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2517 if (err < 0)
2518 return err;
2519 }
c7d4b2fa
M		 2520
2521 return 0;
2522}
2523
b22b4821
MR		 2524/* labels for mono mux outputs */
2525static const char *stac92xx_mono_labels[3] = {
2526 "DAC0", "DAC1", "Mixer"
2527};
2528
2529/* create mono mux for mono out on capable codecs */
2530static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2531{
2532 struct sigmatel_spec *spec = codec->spec;
2533 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2534 int i, num_cons;
2535 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2536
2537 num_cons = snd_hda_get_connections(codec,
2538 spec->mono_nid,
2539 con_lst,
2540 HDA_MAX_NUM_INPUTS);
2541 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2542 return -EINVAL;
2543
2544 for (i = 0; i < num_cons; i++) {
2545 mono_mux->items[mono_mux->num_items].label =
2546 stac92xx_mono_labels[i];
2547 mono_mux->items[mono_mux->num_items].index = i;
2548 mono_mux->num_items++;
2549 }
09a99959
MR		 2550
2551 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2552 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2553}
2554
8b65727b 2555/* labels for dmic mux inputs */
ddc2cec4 2556static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2557 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2558 "Digital Mic 3", "Digital Mic 4"
2559};
2560
2561/* create playback/capture controls for input pins on dmic capable codecs */
2562static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2563 const struct auto_pin_cfg *cfg)
2564{
2565 struct sigmatel_spec *spec = codec->spec;
2566 struct hda_input_mux *dimux = &spec->private_dimux;
2567 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2568 int err, i, j;
2569 char name[32];
8b65727b
MP		 2570
2571 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2572 dimux->items[dimux->num_items].index = 0;
2573 dimux->num_items++;
2574
2575 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2576 hda_nid_t nid;
8b65727b
MP		 2577 int index;
2578 int num_cons;
0678accd 2579 unsigned int wcaps;
8b65727b
MP		 2580 unsigned int def_conf;
2581
2582 def_conf = snd_hda_codec_read(codec,
2583 spec->dmic_nids[i],
2584 0,
2585 AC_VERB_GET_CONFIG_DEFAULT,
2586 0);
2587 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2588 continue;
2589
0678accd 2590 nid = spec->dmic_nids[i];
8b65727b 2591 num_cons = snd_hda_get_connections(codec,
e1f0d669 2592 spec->dmux_nids[0],
8b65727b
MP		 2593 con_lst,
2594 HDA_MAX_NUM_INPUTS);
2595 for (j = 0; j < num_cons; j++)
0678accd 2596 if (con_lst[j] == nid) {
8b65727b
MP		 2597 index = j;
2598 goto found;
2599 }
2600 continue;
2601found:
0678accd
MR		 2602 wcaps = get_wcaps(codec, nid);
2603
2604 if (wcaps & AC_WCAP_OUT_AMP) {
2605 sprintf(name, "%s Capture Volume",
2606 stac92xx_dmic_labels[dimux->num_items]);
2607
2608 err = stac92xx_add_control(spec,
2609 STAC_CTL_WIDGET_VOL,
2610 name,
2611 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2612 if (err < 0)
2613 return err;
2614 }
2615
8b65727b
MP		 2616 dimux->items[dimux->num_items].label =
2617 stac92xx_dmic_labels[dimux->num_items];
2618 dimux->items[dimux->num_items].index = index;
2619 dimux->num_items++;
2620 }
2621
2622 return 0;
2623}
2624
c7d4b2fa
M		 2625/* create playback/capture controls for input pins */
2626static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2627{
2628 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2629 struct hda_input_mux *imux = &spec->private_imux;
2630 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2631 int i, j, k;
2632
2633 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2634 int index;
2635
2636 if (!cfg->input_pins[i])
2637 continue;
2638 index = -1;
2639 for (j = 0; j < spec->num_muxes; j++) {
2640 int num_cons;
2641 num_cons = snd_hda_get_connections(codec,
2642 spec->mux_nids[j],
2643 con_lst,
2644 HDA_MAX_NUM_INPUTS);
2645 for (k = 0; k < num_cons; k++)
2646 if (con_lst[k] == cfg->input_pins[i]) {
2647 index = k;
2648 goto found;
2649 }
c7d4b2fa 2650 }
314634bc
TI		 2651 continue;
2652 found:
2653 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2654 imux->items[imux->num_items].index = index;
2655 imux->num_items++;
c7d4b2fa
M		 2656 }
2657
7b043899 2658 if (imux->num_items) {
62fe78e9
SR		 2659 /*
2660 * Set the current input for the muxes.
2661 * The STAC9221 has two input muxes with identical source
2662 * NID lists. Hopefully this won't get confused.
2663 */
2664 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2665 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2666 AC_VERB_SET_CONNECT_SEL,
2667 imux->items[0].index);
62fe78e9
SR		 2668 }
2669 }
2670
c7d4b2fa
M		 2671 return 0;
2672}
2673
c7d4b2fa
M		 2674static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2675{
2676 struct sigmatel_spec *spec = codec->spec;
2677 int i;
2678
2679 for (i = 0; i < spec->autocfg.line_outs; i++) {
2680 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2681 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2682 }
2683}
2684
2685static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2686{
2687 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2688 int i;
c7d4b2fa 2689
eb06ed8f
TI		 2690 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2691 hda_nid_t pin;
2692 pin = spec->autocfg.hp_pins[i];
2693 if (pin) /* connect to front */
2694 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2695 }
2696 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2697 hda_nid_t pin;
2698 pin = spec->autocfg.speaker_pins[i];
2699 if (pin) /* connect to front */
2700 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2701 }
c7d4b2fa
M		 2702}
2703
3cc08dc6 2704static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2705{
2706 struct sigmatel_spec *spec = codec->spec;
2707 int err;
bcecd9bd 2708 int hp_speaker_swap = 0;
c7d4b2fa 2709
8b65727b
MP		 2710 if ((err = snd_hda_parse_pin_def_config(codec,
2711 &spec->autocfg,
2712 spec->dmic_nids)) < 0)
c7d4b2fa 2713 return err;
82bc955f 2714 if (! spec->autocfg.line_outs)
869264c4 2715 return 0; /* can't find valid pin config */
19039bd0 2716
bcecd9bd
JZ		 2717 /* If we have no real line-out pin and multiple hp-outs, HPs should
2718 * be set up as multi-channel outputs.
2719 */
2720 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2721 spec->autocfg.hp_outs > 1) {
2722 /* Copy hp_outs to line_outs, backup line_outs in
2723 * speaker_outs so that the following routines can handle
2724 * HP pins as primary outputs.
2725 */
2726 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2727 sizeof(spec->autocfg.line_out_pins));
2728 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2729 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2730 sizeof(spec->autocfg.hp_pins));
2731 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2732 hp_speaker_swap = 1;
2733 }
09a99959
MR		 2734 if (spec->autocfg.mono_out_pin) {
2735 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2736 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2737 u32 caps = query_amp_caps(codec,
2738 spec->autocfg.mono_out_pin, dir);
2739 hda_nid_t conn_list[1];
2740
2741 /* get the mixer node and then the mono mux if it exists */
2742 if (snd_hda_get_connections(codec,
2743 spec->autocfg.mono_out_pin, conn_list, 1) &&
2744 snd_hda_get_connections(codec, conn_list[0],
2745 conn_list, 1)) {
2746
2747 int wcaps = get_wcaps(codec, conn_list[0]);
2748 int wid_type = (wcaps & AC_WCAP_TYPE)
2749 >> AC_WCAP_TYPE_SHIFT;
2750 /* LR swap check, some stac925x have a mux that
2751 * changes the DACs output path instead of the
2752 * mono-mux path.
2753 */
2754 if (wid_type == AC_WID_AUD_SEL &&
2755 !(wcaps & AC_WCAP_LR_SWAP))
2756 spec->mono_nid = conn_list[0];
2757 }
2758 /* all mono outs have a least a mute/unmute switch */
2759 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2760 "Mono Playback Switch",
2761 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2762 1, 0, dir));
2763 if (err < 0)
2764 return err;
2765 /* check to see if there is volume support for the amp */
2766 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2767 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2768 "Mono Playback Volume",
2769 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2770 1, 0, dir));
2771 if (err < 0)
2772 return err;
2773 }
2774
2775 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2776 AC_PINCTL_OUT_EN);
2777 }
bcecd9bd 2778
403d1944
MP		 2779 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2780 return err;
19039bd0
TI		 2781 if (spec->multiout.num_dacs == 0)
2782 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2783 return err;
c7d4b2fa 2784
0fb87bb4
ML		 2785 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2786
2787 if (err < 0)
2788 return err;
2789
bcecd9bd
JZ		 2790 if (hp_speaker_swap == 1) {
2791 /* Restore the hp_outs and line_outs */
2792 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2793 sizeof(spec->autocfg.line_out_pins));
2794 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2795 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2796 sizeof(spec->autocfg.speaker_pins));
2797 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2798 memset(spec->autocfg.speaker_pins, 0,
2799 sizeof(spec->autocfg.speaker_pins));
2800 spec->autocfg.speaker_outs = 0;
2801 }
2802
0fb87bb4
ML		 2803 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2804
2805 if (err < 0)
2806 return err;
2807
2808 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2809
2810 if (err < 0)
c7d4b2fa
M		 2811 return err;
2812
b22b4821
MR		 2813 if (spec->mono_nid > 0) {
2814 err = stac92xx_auto_create_mono_output_ctls(codec);
2815 if (err < 0)
2816 return err;
2817 }
2818
8b65727b
MP		 2819 if (spec->num_dmics > 0)
2820 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2821 &spec->autocfg)) < 0)
2822 return err;
2823
c7d4b2fa 2824 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2825 if (spec->multiout.max_channels > 2)
c7d4b2fa 2826 spec->surr_switch = 1;
c7d4b2fa 2827
82bc955f 2828 if (spec->autocfg.dig_out_pin)
3cc08dc6 2829 spec->multiout.dig_out_nid = dig_out;
82bc955f 2830 if (spec->autocfg.dig_in_pin)
3cc08dc6 2831 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2832
2833 if (spec->kctl_alloc)
2834 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2835
2836 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2837 if (!spec->dinput_mux)
2838 spec->dinput_mux = &spec->private_dimux;
b22b4821 2839 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2840
2841 return 1;
2842}
2843
82bc955f
TI		 2844/* add playback controls for HP output */
2845static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2846 struct auto_pin_cfg *cfg)
2847{
2848 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2849 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2850 unsigned int wid_caps;
2851
2852 if (! pin)
2853 return 0;
2854
2855 wid_caps = get_wcaps(codec, pin);
505cb341 2856 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2857 spec->hp_detect = 1;
82bc955f
TI		 2858
2859 return 0;
2860}
2861
160ea0dc
RF		 2862/* add playback controls for LFE output */
2863static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2864 struct auto_pin_cfg *cfg)
2865{
2866 struct sigmatel_spec *spec = codec->spec;
2867 int err;
2868 hda_nid_t lfe_pin = 0x0;
2869 int i;
2870
2871 /*
2872 * search speaker outs and line outs for a mono speaker pin
2873 * with an amp. If one is found, add LFE controls
2874 * for it.
2875 */
2876 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2877 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 2878 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2879 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2880 if (wcaps == AC_WCAP_OUT_AMP)
2881 /* found a mono speaker with an amp, must be lfe */
2882 lfe_pin = pin;
2883 }
2884
2885 /* if speaker_outs is 0, then speakers may be in line_outs */
2886 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2887 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2888 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 2889 unsigned int defcfg;
8b551785 2890 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 2891 AC_VERB_GET_CONFIG_DEFAULT,
2892 0x00);
8b551785 2893 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 2894 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2895 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2896 if (wcaps == AC_WCAP_OUT_AMP)
2897 /* found a mono speaker with an amp,
2898 must be lfe */
2899 lfe_pin = pin;
2900 }
2901 }
2902 }
2903
2904 if (lfe_pin) {
eb06ed8f 2905 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2906 if (err < 0)
2907 return err;
2908 }
2909
2910 return 0;
2911}
2912
c7d4b2fa
M		 2913static int stac9200_parse_auto_config(struct hda_codec *codec)
2914{
2915 struct sigmatel_spec *spec = codec->spec;
2916 int err;
2917
df694daa 2918 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2919 return err;
2920
2921 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2922 return err;
2923
82bc955f
TI		 2924 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2925 return err;
2926
160ea0dc
RF		 2927 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2928 return err;
2929
82bc955f 2930 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2931 spec->multiout.dig_out_nid = 0x05;
82bc955f 2932 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2933 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2934
2935 if (spec->kctl_alloc)
2936 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2937
2938 spec->input_mux = &spec->private_imux;
8b65727b 2939 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2940
2941 return 1;
2942}
2943
62fe78e9
SR		 2944/*
2945 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2946 * funky external mute control using GPIO pins.
2947 */
2948
76e1ddfb 2949static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 2950 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 2951{
2952 unsigned int gpiostate, gpiomask, gpiodir;
2953
2954 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2955 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 2956 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 2957
2958 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2959 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2960 gpiomask |= mask;
62fe78e9
SR		 2961
2962 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2963 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 2964 gpiodir |= dir_mask;
62fe78e9 2965
76e1ddfb 2966 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2967 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2968
2969 snd_hda_codec_write(codec, codec->afg, 0,
2970 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2971 snd_hda_codec_read(codec, codec->afg, 0,
2972 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2973
2974 msleep(1);
2975
76e1ddfb
TI		 2976 snd_hda_codec_read(codec, codec->afg, 0,
2977 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2978}
2979
314634bc
TI		 2980static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2981 unsigned int event)
2982{
2983 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2984 snd_hda_codec_write_cache(codec, nid, 0,
2985 AC_VERB_SET_UNSOLICITED_ENABLE,
2986 (AC_USRSP_EN | event));
314634bc
TI		 2987}
2988
a64135a2
MR		 2989static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2990{
2991 int i;
2992 for (i = 0; i < cfg->hp_outs; i++)
2993 if (cfg->hp_pins[i] == nid)
2994 return 1; /* nid is a HP-Out */
2995
2996 return 0; /* nid is not a HP-Out */
2997};
2998
b76c850f
MR		 2999static void stac92xx_power_down(struct hda_codec *codec)
3000{
3001 struct sigmatel_spec *spec = codec->spec;
3002
3003 /* power down inactive DACs */
3004 hda_nid_t *dac;
3005 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3006 if (!is_in_dac_nids(spec, *dac) &&
3007 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3008 snd_hda_codec_write_cache(codec, *dac, 0,
3009 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3010}
3011
c7d4b2fa
M		 3012static int stac92xx_init(struct hda_codec *codec)
3013{
3014 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3015 struct auto_pin_cfg *cfg = &spec->autocfg;
3016 int i;
c7d4b2fa 3017
c7d4b2fa
M		 3018 snd_hda_sequence_write(codec, spec->init);
3019
82bc955f
TI		 3020 /* set up pins */
3021 if (spec->hp_detect) {
505cb341 3022 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3023 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3024 enable_pin_detect(codec, cfg->hp_pins[i],
3025 STAC_HP_EVENT);
0a07acaf
TI		 3026 /* force to enable the first line-out; the others are set up
3027 * in unsol_event
3028 */
3029 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3030 AC_PINCTL_OUT_EN);
eb995a8c 3031 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3032 /* fake event to set up pins */
3033 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3034 } else {
3035 stac92xx_auto_init_multi_out(codec);
3036 stac92xx_auto_init_hp_out(codec);
3037 }
3038 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3039 hda_nid_t nid = cfg->input_pins[i];
3040 if (nid) {
3041 unsigned int pinctl = AC_PINCTL_IN_EN;
3042 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3043 pinctl |= stac92xx_get_vref(codec, nid);
3044 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3045 }
82bc955f 3046 }
a64135a2
MR		 3047 for (i = 0; i < spec->num_dmics; i++)
3048 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3049 AC_PINCTL_IN_EN);
3050 for (i = 0; i < spec->num_pwrs; i++) {
3051 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3052 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3053 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3054 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3055 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3056 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
a64135a2
MR		 3057 /* outputs are only ports capable of power management
3058 * any attempts on powering down a input port cause the
3059 * referenced VREF to act quirky.
3060 */
3061 if (pinctl & AC_PINCTL_IN_EN)
3062 continue;
bce6c2b5
MR		 3063 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED)
3064 continue;
a64135a2
MR		 3065 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3066 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3067 }
b76c850f
MR		 3068 if (spec->dac_list)
3069 stac92xx_power_down(codec);
82bc955f
TI		 3070 if (cfg->dig_out_pin)
3071 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3072 AC_PINCTL_OUT_EN);
3073 if (cfg->dig_in_pin)
3074 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3075 AC_PINCTL_IN_EN);
3076
4fe5195c
MR		 3077 stac_gpio_set(codec, spec->gpio_mask,
3078 spec->gpio_dir, spec->gpio_data);
62fe78e9 3079
c7d4b2fa
M		 3080 return 0;
3081}
3082
2f2f4251
M		 3083static void stac92xx_free(struct hda_codec *codec)
3084{
c7d4b2fa
M		 3085 struct sigmatel_spec *spec = codec->spec;
3086 int i;
3087
3088 if (! spec)
3089 return;
3090
3091 if (spec->kctl_alloc) {
3092 for (i = 0; i < spec->num_kctl_used; i++)
3093 kfree(spec->kctl_alloc[i].name);
3094 kfree(spec->kctl_alloc);
3095 }
3096
11b44bbd
RF		 3097 if (spec->bios_pin_configs)
3098 kfree(spec->bios_pin_configs);
3099
c7d4b2fa 3100 kfree(spec);
2f2f4251
M		 3101}
3102
4e55096e
M		 3103static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3104 unsigned int flag)
3105{
3106 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3107 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3108
f9acba43
TI		 3109 if (pin_ctl & AC_PINCTL_IN_EN) {
3110 /*
3111 * we need to check the current set-up direction of
3112 * shared input pins since they can be switched via
3113 * "xxx as Output" mixer switch
3114 */
3115 struct sigmatel_spec *spec = codec->spec;
3116 struct auto_pin_cfg *cfg = &spec->autocfg;
3117 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3118 spec->line_switch) ||
3119 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3120 spec->mic_switch))
3121 return;
3122 }
3123
7b043899
SL		 3124 /* if setting pin direction bits, clear the current
3125 direction bits first */
3126 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3127 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3128
82beb8fd 3129 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3130 AC_VERB_SET_PIN_WIDGET_CONTROL,
3131 pin_ctl | flag);
3132}
3133
3134static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3135 unsigned int flag)
3136{
3137 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3138 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3139 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3140 AC_VERB_SET_PIN_WIDGET_CONTROL,
3141 pin_ctl & ~flag);
3142}
3143
40c1d308 3144static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3145{
3146 if (!nid)
3147 return 0;
3148 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3149 & (1 << 31)) {
3150 unsigned int pinctl;
3151 pinctl = snd_hda_codec_read(codec, nid, 0,
3152 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3153 if (pinctl & AC_PINCTL_IN_EN)
3154 return 0; /* mic- or line-input */
3155 else
3156 return 1; /* HP-output */
3157 }
314634bc
TI		 3158 return 0;
3159}
3160
3161static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3162{
3163 struct sigmatel_spec *spec = codec->spec;
3164 struct auto_pin_cfg *cfg = &spec->autocfg;
3165 int i, presence;
3166
eb06ed8f 3167 presence = 0;
4fe5195c
MR		 3168 if (spec->gpio_mute)
3169 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3170 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3171
eb06ed8f 3172 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3173 if (presence)
3174 break;
4fe5195c 3175 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3176 }
4e55096e
M		 3177
3178 if (presence) {
3179 /* disable lineouts, enable hp */
3180 for (i = 0; i < cfg->line_outs; i++)
3181 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3182 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3183 for (i = 0; i < cfg->speaker_outs; i++)
3184 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3185 AC_PINCTL_OUT_EN);
4e55096e
M		 3186 } else {
3187 /* enable lineouts, disable hp */
3188 for (i = 0; i < cfg->line_outs; i++)
3189 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3190 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3191 for (i = 0; i < cfg->speaker_outs; i++)
3192 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3193 AC_PINCTL_OUT_EN);
4e55096e
M		 3194 }
3195}
3196
a64135a2
MR		 3197static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3198{
3199 struct sigmatel_spec *spec = codec->spec;
3200 hda_nid_t nid = spec->pwr_nids[idx];
3201 int presence, val;
3202 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3203 & 0x000000ff;
3204 presence = get_hp_pin_presence(codec, nid);
3205 idx = 1 << idx;
3206
3207 if (presence)
3208 val &= ~idx;
3209 else
3210 val |= idx;
3211
3212 /* power down unused output ports */
3213 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3214};
3215
314634bc
TI		 3216static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3217{
a64135a2
MR		 3218 struct sigmatel_spec *spec = codec->spec;
3219 int idx = res >> 26 & 0x0f;
3220
3221 switch ((res >> 26) & 0x30) {
314634bc
TI		 3222 case STAC_HP_EVENT:
3223 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3224 /* fallthru */
3225 case STAC_PWR_EVENT:
3226 if (spec->num_pwrs > 0)
3227 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3228 }
3229}
3230
cb53c626 3231#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3232static int stac92xx_resume(struct hda_codec *codec)
3233{
dc81bed1
TI		 3234 struct sigmatel_spec *spec = codec->spec;
3235
11b44bbd 3236 stac92xx_set_config_regs(codec);
dc81bed1 3237 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3238 stac_gpio_set(codec, spec->gpio_mask,
3239 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3240 snd_hda_codec_resume_amp(codec);
3241 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3242 /* power down inactive DACs */
3243 if (spec->dac_list)
3244 stac92xx_power_down(codec);
dc81bed1
TI		 3245 /* invoke unsolicited event to reset the HP state */
3246 if (spec->hp_detect)
3247 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3248 return 0;
3249}
3250#endif
3251
2f2f4251
M		 3252static struct hda_codec_ops stac92xx_patch_ops = {
3253 .build_controls = stac92xx_build_controls,
3254 .build_pcms = stac92xx_build_pcms,
3255 .init = stac92xx_init,
3256 .free = stac92xx_free,
4e55096e 3257 .unsol_event = stac92xx_unsol_event,
cb53c626 3258#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3259 .resume = stac92xx_resume,
3260#endif
2f2f4251
M		 3261};
3262
3263static int patch_stac9200(struct hda_codec *codec)
3264{
3265 struct sigmatel_spec *spec;
c7d4b2fa 3266 int err;
2f2f4251 3267
e560d8d8 3268 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3269 if (spec == NULL)
3270 return -ENOMEM;
3271
3272 codec->spec = spec;
a4eed138 3273 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3274 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3275 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3276 stac9200_models,
3277 stac9200_cfg_tbl);
11b44bbd
RF		 3278 if (spec->board_config < 0) {
3279 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3280 err = stac92xx_save_bios_config_regs(codec);
3281 if (err < 0) {
3282 stac92xx_free(codec);
3283 return err;
3284 }
3285 spec->pin_configs = spec->bios_pin_configs;
3286 } else {
403d1944
MP		 3287 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3288 stac92xx_set_config_regs(codec);
3289 }
2f2f4251
M		 3290
3291 spec->multiout.max_channels = 2;
3292 spec->multiout.num_dacs = 1;
3293 spec->multiout.dac_nids = stac9200_dac_nids;
3294 spec->adc_nids = stac9200_adc_nids;
3295 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3296 spec->num_muxes = 1;
8b65727b 3297 spec->num_dmics = 0;
9e05b7a3 3298 spec->num_adcs = 1;
a64135a2 3299 spec->num_pwrs = 0;
c7d4b2fa 3300
bf277785
TD		 3301 if (spec->board_config == STAC_9200_GATEWAY ||
3302 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3303 spec->init = stac9200_eapd_init;
3304 else
3305 spec->init = stac9200_core_init;
2f2f4251 3306 spec->mixer = stac9200_mixer;
c7d4b2fa 3307
117f257d
TI		 3308 if (spec->board_config == STAC_9200_PANASONIC) {
3309 spec->gpio_mask = spec->gpio_dir = 0x09;
3310 spec->gpio_data = 0x00;
3311 }
3312
c7d4b2fa
M		 3313 err = stac9200_parse_auto_config(codec);
3314 if (err < 0) {
3315 stac92xx_free(codec);
3316 return err;
3317 }
2f2f4251
M		 3318
3319 codec->patch_ops = stac92xx_patch_ops;
3320
3321 return 0;
3322}
3323
8e21c34c
TD		 3324static int patch_stac925x(struct hda_codec *codec)
3325{
3326 struct sigmatel_spec *spec;
3327 int err;
3328
3329 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3330 if (spec == NULL)
3331 return -ENOMEM;
3332
3333 codec->spec = spec;
a4eed138 3334 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3335 spec->pin_nids = stac925x_pin_nids;
3336 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3337 stac925x_models,
3338 stac925x_cfg_tbl);
9e507abd 3339 again:
8e21c34c 3340 if (spec->board_config < 0) {
2c11f955
TD		 3341 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3342 "using BIOS defaults\n");
8e21c34c
TD		 3343 err = stac92xx_save_bios_config_regs(codec);
3344 if (err < 0) {
3345 stac92xx_free(codec);
3346 return err;
3347 }
3348 spec->pin_configs = spec->bios_pin_configs;
3349 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3350 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3351 stac92xx_set_config_regs(codec);
3352 }
3353
3354 spec->multiout.max_channels = 2;
3355 spec->multiout.num_dacs = 1;
3356 spec->multiout.dac_nids = stac925x_dac_nids;
3357 spec->adc_nids = stac925x_adc_nids;
3358 spec->mux_nids = stac925x_mux_nids;
3359 spec->num_muxes = 1;
9e05b7a3 3360 spec->num_adcs = 1;
a64135a2 3361 spec->num_pwrs = 0;
2c11f955
TD		 3362 switch (codec->vendor_id) {
3363 case 0x83847632: /* STAC9202 */
3364 case 0x83847633: /* STAC9202D */
3365 case 0x83847636: /* STAC9251 */
3366 case 0x83847637: /* STAC9251D */
f6e9852a 3367 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3368 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3369 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3370 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3371 break;
3372 default:
3373 spec->num_dmics = 0;
3374 break;
3375 }
8e21c34c
TD		 3376
3377 spec->init = stac925x_core_init;
3378 spec->mixer = stac925x_mixer;
3379
3380 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3381 if (!err) {
3382 if (spec->board_config < 0) {
3383 printk(KERN_WARNING "hda_codec: No auto-config is "
3384 "available, default to model=ref\n");
3385 spec->board_config = STAC_925x_REF;
3386 goto again;
3387 }
3388 err = -EINVAL;
3389 }
8e21c34c
TD		 3390 if (err < 0) {
3391 stac92xx_free(codec);
3392 return err;
3393 }
3394
3395 codec->patch_ops = stac92xx_patch_ops;
3396
3397 return 0;
3398}
3399
e1f0d669
MR		 3400static struct hda_input_mux stac92hd73xx_dmux = {
3401 .num_items = 4,
3402 .items = {
3403 { "Analog Inputs", 0x0b },
3404 { "CD", 0x08 },
3405 { "Digital Mic 1", 0x09 },
3406 { "Digital Mic 2", 0x0a },
3407 }
3408};
3409
3410static int patch_stac92hd73xx(struct hda_codec *codec)
3411{
3412 struct sigmatel_spec *spec;
3413 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3414 int err = 0;
3415
3416 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3417 if (spec == NULL)
3418 return -ENOMEM;
3419
3420 codec->spec = spec;
3421 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3422 spec->pin_nids = stac92hd73xx_pin_nids;
3423 spec->board_config = snd_hda_check_board_config(codec,
3424 STAC_92HD73XX_MODELS,
3425 stac92hd73xx_models,
3426 stac92hd73xx_cfg_tbl);
3427again:
3428 if (spec->board_config < 0) {
3429 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3430 " STAC92HD73XX, using BIOS defaults\n");
3431 err = stac92xx_save_bios_config_regs(codec);
3432 if (err < 0) {
3433 stac92xx_free(codec);
3434 return err;
3435 }
3436 spec->pin_configs = spec->bios_pin_configs;
3437 } else {
3438 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3439 stac92xx_set_config_regs(codec);
3440 }
3441
3442 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3443 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3444
3445 if (spec->multiout.num_dacs < 0) {
3446 printk(KERN_WARNING "hda_codec: Could not determine "
3447 "number of channels defaulting to DAC count\n");
3448 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3449 }
3450
3451 switch (spec->multiout.num_dacs) {
3452 case 0x3: /* 6 Channel */
3453 spec->mixer = stac92hd73xx_6ch_mixer;
3454 spec->init = stac92hd73xx_6ch_core_init;
3455 break;
3456 case 0x4: /* 8 Channel */
3457 spec->multiout.hp_nid = 0x18;
3458 spec->mixer = stac92hd73xx_8ch_mixer;
3459 spec->init = stac92hd73xx_8ch_core_init;
3460 break;
3461 case 0x5: /* 10 Channel */
3462 spec->multiout.hp_nid = 0x19;
3463 spec->mixer = stac92hd73xx_10ch_mixer;
3464 spec->init = stac92hd73xx_10ch_core_init;
3465 };
3466
3467 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3468 spec->aloopback_mask = 0x01;
3469 spec->aloopback_shift = 8;
3470
3471 spec->mux_nids = stac92hd73xx_mux_nids;
3472 spec->adc_nids = stac92hd73xx_adc_nids;
3473 spec->dmic_nids = stac92hd73xx_dmic_nids;
3474 spec->dmux_nids = stac92hd73xx_dmux_nids;
3475
3476 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3477 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3478 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3479 spec->dinput_mux = &stac92hd73xx_dmux;
3480 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3481 spec->gpio_mask = spec->gpio_dir = 0x1;
3482 spec->gpio_data = 0x01;
e1f0d669 3483
a7662640
MR		 3484 switch (spec->board_config) {
3485 case STAC_DELL_M6:
d654a660 3486 spec->init = dell_eq_core_init;
a7662640
MR		 3487 switch (codec->subsystem_id) {
3488 case 0x1028025e: /* Analog Mics */
3489 case 0x1028025f:
3490 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3491 spec->num_dmics = 0;
3492 break;
d654a660 3493 case 0x10280271: /* Digital Mics */
a7662640 3494 case 0x10280272:
d654a660
MR		 3495 spec->init = dell_m6_core_init;
3496 /* fall-through */
3497 case 0x10280254:
3498 case 0x10280255:
a7662640
MR		 3499 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3500 spec->num_dmics = 1;
3501 break;
3502 case 0x10280256: /* Both */
3503 case 0x10280057:
3504 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3505 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3506 spec->num_dmics = 1;
3507 break;
3508 }
3509 break;
3510 default:
3511 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3512 }
3513
a64135a2
MR		 3514 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3515 spec->pwr_nids = stac92hd73xx_pwr_nids;
3516
e1f0d669
MR		 3517 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3518
3519 if (!err) {
3520 if (spec->board_config < 0) {
3521 printk(KERN_WARNING "hda_codec: No auto-config is "
3522 "available, default to model=ref\n");
3523 spec->board_config = STAC_92HD73XX_REF;
3524 goto again;
3525 }
3526 err = -EINVAL;
3527 }
3528
3529 if (err < 0) {
3530 stac92xx_free(codec);
3531 return err;
3532 }
3533
3534 codec->patch_ops = stac92xx_patch_ops;
3535
3536 return 0;
3537}
3538
e035b841
MR		 3539static int patch_stac92hd71bxx(struct hda_codec *codec)
3540{
3541 struct sigmatel_spec *spec;
3542 int err = 0;
3543
3544 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3545 if (spec == NULL)
3546 return -ENOMEM;
3547
3548 codec->spec = spec;
3549 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3550 spec->pin_nids = stac92hd71bxx_pin_nids;
3551 spec->board_config = snd_hda_check_board_config(codec,
3552 STAC_92HD71BXX_MODELS,
3553 stac92hd71bxx_models,
3554 stac92hd71bxx_cfg_tbl);
3555again:
3556 if (spec->board_config < 0) {
3557 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3558 " STAC92HD71BXX, using BIOS defaults\n");
3559 err = stac92xx_save_bios_config_regs(codec);
3560 if (err < 0) {
3561 stac92xx_free(codec);
3562 return err;
3563 }
3564 spec->pin_configs = spec->bios_pin_configs;
3565 } else {
3566 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3567 stac92xx_set_config_regs(codec);
3568 }
3569
541eee87
MR		 3570 switch (codec->vendor_id) {
3571 case 0x111d76b6: /* 4 Port without Analog Mixer */
3572 case 0x111d76b7:
3573 case 0x111d76b4: /* 6 Port without Analog Mixer */
3574 case 0x111d76b5:
3575 spec->mixer = stac92hd71bxx_mixer;
3576 spec->init = stac92hd71bxx_core_init;
3577 break;
3578 default:
3579 spec->mixer = stac92hd71bxx_analog_mixer;
3580 spec->init = stac92hd71bxx_analog_core_init;
3581 }
3582
3583 spec->aloopback_mask = 0x20;
3584 spec->aloopback_shift = 0;
3585
4fe5195c
MR		 3586 /* GPIO0 High = EAPD */
3587 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0x1;
e035b841 3588
e035b841
MR		 3589 spec->mux_nids = stac92hd71bxx_mux_nids;
3590 spec->adc_nids = stac92hd71bxx_adc_nids;
3591 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3592 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3593
3594 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3595 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3596 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3597 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3598
a64135a2
MR		 3599 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3600 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3601
aea7bb0a 3602 spec->multiout.num_dacs = 1;
e035b841
MR		 3603 spec->multiout.hp_nid = 0x11;
3604 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3605
3606 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3607 if (!err) {
3608 if (spec->board_config < 0) {
3609 printk(KERN_WARNING "hda_codec: No auto-config is "
3610 "available, default to model=ref\n");
3611 spec->board_config = STAC_92HD71BXX_REF;
3612 goto again;
3613 }
3614 err = -EINVAL;
3615 }
3616
3617 if (err < 0) {
3618 stac92xx_free(codec);
3619 return err;
3620 }
3621
3622 codec->patch_ops = stac92xx_patch_ops;
3623
3624 return 0;
3625};
3626
2f2f4251
M		 3627static int patch_stac922x(struct hda_codec *codec)
3628{
3629 struct sigmatel_spec *spec;
c7d4b2fa 3630 int err;
2f2f4251 3631
e560d8d8 3632 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3633 if (spec == NULL)
3634 return -ENOMEM;
3635
3636 codec->spec = spec;
a4eed138 3637 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3638 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3639 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3640 stac922x_models,
3641 stac922x_cfg_tbl);
5d5d3bc3 3642 if (spec->board_config == STAC_INTEL_MAC_V3) {
4fe5195c
MR		 3643 spec->gpio_mask = spec->gpio_dir = 0x03;
3644 spec->gpio_data = 0x03;
3fc24d85
TI		 3645 /* Intel Macs have all same PCI SSID, so we need to check
3646 * codec SSID to distinguish the exact models
3647 */
6f0778d8 3648 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3649 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3650
3651 case 0x106b0800:
3652 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3653 break;
5d5d3bc3
IZ		 3654 case 0x106b0600:
3655 case 0x106b0700:
3656 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3657 break;
5d5d3bc3
IZ		 3658 case 0x106b0e00:
3659 case 0x106b0f00:
3660 case 0x106b1600:
3661 case 0x106b1700:
3662 case 0x106b0200:
3663 case 0x106b1e00:
3664 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3665 break;
5d5d3bc3
IZ		 3666 case 0x106b1a00:
3667 case 0x00000100:
3668 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3669 break;
5d5d3bc3
IZ		 3670 case 0x106b0a00:
3671 case 0x106b2200:
3672 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3673 break;
3fc24d85
TI		 3674 }
3675 }
3676
9e507abd 3677 again:
11b44bbd
RF		 3678 if (spec->board_config < 0) {
3679 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3680 "using BIOS defaults\n");
3681 err = stac92xx_save_bios_config_regs(codec);
3682 if (err < 0) {
3683 stac92xx_free(codec);
3684 return err;
3685 }
3686 spec->pin_configs = spec->bios_pin_configs;
3687 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3688 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3689 stac92xx_set_config_regs(codec);
3690 }
2f2f4251 3691
c7d4b2fa
M		 3692 spec->adc_nids = stac922x_adc_nids;
3693 spec->mux_nids = stac922x_mux_nids;
2549413e 3694 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3695 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3696 spec->num_dmics = 0;
a64135a2 3697 spec->num_pwrs = 0;
c7d4b2fa
M		 3698
3699 spec->init = stac922x_core_init;
2f2f4251 3700 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3701
3702 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3703
3cc08dc6 3704 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3705 if (!err) {
3706 if (spec->board_config < 0) {
3707 printk(KERN_WARNING "hda_codec: No auto-config is "
3708 "available, default to model=ref\n");
3709 spec->board_config = STAC_D945_REF;
3710 goto again;
3711 }
3712 err = -EINVAL;
3713 }
3cc08dc6
MP		 3714 if (err < 0) {
3715 stac92xx_free(codec);
3716 return err;
3717 }
3718
3719 codec->patch_ops = stac92xx_patch_ops;
3720
807a4636
TI		 3721 /* Fix Mux capture level; max to 2 */
3722 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3723 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3724 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3725 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3726 (0 << AC_AMPCAP_MUTE_SHIFT));
3727
3cc08dc6
MP		 3728 return 0;
3729}
3730
3731static int patch_stac927x(struct hda_codec *codec)
3732{
3733 struct sigmatel_spec *spec;
3734 int err;
3735
3736 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3737 if (spec == NULL)
3738 return -ENOMEM;
3739
3740 codec->spec = spec;
a4eed138 3741 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3742 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3743 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3744 stac927x_models,
3745 stac927x_cfg_tbl);
9e507abd 3746 again:
8e9068b1
MR		 3747 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3748 if (spec->board_config < 0)
3749 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3750 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3751 err = stac92xx_save_bios_config_regs(codec);
3752 if (err < 0) {
3753 stac92xx_free(codec);
3754 return err;
3755 }
3756 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3757 } else {
3cc08dc6
MP		 3758 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3759 stac92xx_set_config_regs(codec);
3760 }
3761
8e9068b1
MR		 3762 spec->adc_nids = stac927x_adc_nids;
3763 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3764 spec->mux_nids = stac927x_mux_nids;
3765 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
b76c850f 3766 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 3767 spec->multiout.dac_nids = spec->dac_nids;
3768
81d3dbde 3769 switch (spec->board_config) {
93ed1503 3770 case STAC_D965_3ST:
93ed1503 3771 case STAC_D965_5ST:
8e9068b1 3772 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3773 spec->gpio_mask = spec->gpio_dir = 0x01;
3774 spec->gpio_data = 0x01;
8e9068b1
MR		 3775 spec->num_dmics = 0;
3776
93ed1503 3777 spec->init = d965_core_init;
9e05b7a3 3778 spec->mixer = stac927x_mixer;
81d3dbde 3779 break;
8e9068b1 3780 case STAC_DELL_BIOS:
03d7ca17
MR		 3781 /* configure the analog microphone on some laptops */
3782 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 3783 /* correct the front output jack as a hp out */
7989fba9 3784 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 3785 /* correct the front input jack as a mic */
3786 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3787 /* fallthru */
8e9068b1
MR		 3788 case STAC_DELL_3ST:
3789 /* GPIO2 High = Enable EAPD */
4fe5195c
MR		 3790 spec->gpio_mask = spec->gpio_dir = 0x04;
3791 spec->gpio_data = 0x04;
7f16859a
MR		 3792 spec->dmic_nids = stac927x_dmic_nids;
3793 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3794
8e9068b1
MR		 3795 spec->init = d965_core_init;
3796 spec->mixer = stac927x_mixer;
3797 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3798 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3799 break;
3800 default:
f1f208d0 3801 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3802 spec->gpio_mask = spec->gpio_dir = 0x1;
3803 spec->gpio_data = 0x01;
8e9068b1
MR		 3804 spec->num_dmics = 0;
3805
3806 spec->init = stac927x_core_init;
3807 spec->mixer = stac927x_mixer;
7f16859a
MR		 3808 }
3809
a64135a2 3810 spec->num_pwrs = 0;
e1f0d669
MR		 3811 spec->aloopback_mask = 0x40;
3812 spec->aloopback_shift = 0;
8e9068b1 3813
3cc08dc6 3814 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3815 if (!err) {
3816 if (spec->board_config < 0) {
3817 printk(KERN_WARNING "hda_codec: No auto-config is "
3818 "available, default to model=ref\n");
3819 spec->board_config = STAC_D965_REF;
3820 goto again;
3821 }
3822 err = -EINVAL;
3823 }
c7d4b2fa
M		 3824 if (err < 0) {
3825 stac92xx_free(codec);
3826 return err;
3827 }
2f2f4251
M		 3828
3829 codec->patch_ops = stac92xx_patch_ops;
3830
52987656
TI		 3831 /*
3832 * !!FIXME!!
3833 * The STAC927x seem to require fairly long delays for certain
3834 * command sequences. With too short delays (even if the answer
3835 * is set to RIRB properly), it results in the silence output
3836 * on some hardwares like Dell.
3837 *
3838 * The below flag enables the longer delay (see get_response
3839 * in hda_intel.c).
3840 */
3841 codec->bus->needs_damn_long_delay = 1;
3842
2f2f4251
M		 3843 return 0;
3844}
3845
f3302a59
MP		 3846static int patch_stac9205(struct hda_codec *codec)
3847{
3848 struct sigmatel_spec *spec;
8259980e 3849 int err;
f3302a59
MP		 3850
3851 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3852 if (spec == NULL)
3853 return -ENOMEM;
3854
3855 codec->spec = spec;
a4eed138 3856 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3857 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3858 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3859 stac9205_models,
3860 stac9205_cfg_tbl);
9e507abd 3861 again:
11b44bbd
RF		 3862 if (spec->board_config < 0) {
3863 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3864 err = stac92xx_save_bios_config_regs(codec);
3865 if (err < 0) {
3866 stac92xx_free(codec);
3867 return err;
3868 }
3869 spec->pin_configs = spec->bios_pin_configs;
3870 } else {
f3302a59
MP		 3871 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3872 stac92xx_set_config_regs(codec);
3873 }
3874
3875 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3876 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3877 spec->mux_nids = stac9205_mux_nids;
2549413e 3878 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3879 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3880 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3881 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3882 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3883 spec->num_pwrs = 0;
f3302a59
MP		 3884
3885 spec->init = stac9205_core_init;
3886 spec->mixer = stac9205_mixer;
3887
e1f0d669
MR		 3888 spec->aloopback_mask = 0x40;
3889 spec->aloopback_shift = 0;
f3302a59 3890 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3891
ae0a8ed8 3892 switch (spec->board_config){
ae0a8ed8 3893 case STAC_9205_DELL_M43:
87d48363
MR		 3894 /* Enable SPDIF in/out */
3895 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3896 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3897
4fe5195c
MR		 3898 /* Enable unsol response for GPIO4/Dock HP connection */
3899 snd_hda_codec_write(codec, codec->afg, 0,
3900 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3901 snd_hda_codec_write_cache(codec, codec->afg, 0,
3902 AC_VERB_SET_UNSOLICITED_ENABLE,
3903 (AC_USRSP_EN | STAC_HP_EVENT));
3904
3905 spec->gpio_dir = 0x0b;
3906 spec->gpio_mask = 0x1b;
3907 spec->gpio_mute = 0x10;
e2e7d624 3908 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 3909 * GPIO3 Low = DRM
87d48363 3910 */
4fe5195c 3911 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3912 break;
3913 default:
3914 /* GPIO0 High = EAPD */
4fe5195c
MR		 3915 spec->gpio_mask = spec->gpio_dir = 0x1;
3916 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3917 break;
3918 }
33382403 3919
f3302a59 3920 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3921 if (!err) {
3922 if (spec->board_config < 0) {
3923 printk(KERN_WARNING "hda_codec: No auto-config is "
3924 "available, default to model=ref\n");
3925 spec->board_config = STAC_9205_REF;
3926 goto again;
3927 }
3928 err = -EINVAL;
3929 }
f3302a59
MP		 3930 if (err < 0) {
3931 stac92xx_free(codec);
3932 return err;
3933 }
3934
3935 codec->patch_ops = stac92xx_patch_ops;
3936
3937 return 0;
3938}
3939
db064e50 3940/*
6d859065 3941 * STAC9872 hack
db064e50
TI		 3942 */
3943
99ccc560 3944/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3945static hda_nid_t vaio_dacs[] = { 0x2 };
3946#define VAIO_HP_DAC 0x5
3947static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3948static hda_nid_t vaio_mux_nids[] = { 0x15 };
3949
3950static struct hda_input_mux vaio_mux = {
a3a2f429 3951 .num_items = 3,
db064e50 3952 .items = {
d773781c 3953 /* { "HP", 0x0 }, */
1624cb9a
TI		 3954 { "Mic Jack", 0x1 },
3955 { "Internal Mic", 0x2 },
db064e50
TI		 3956 { "PCM", 0x3 },
3957 }
3958};
3959
3960static struct hda_verb vaio_init[] = {
3961 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3962 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3963 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3964 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3965 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3966 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3967 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3968 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3969 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3970 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3971 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3972 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3973 {}
3974};
3975
6d859065
GM		 3976static struct hda_verb vaio_ar_init[] = {
3977 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3978 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3979 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3980 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3981/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3982 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3983 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3984 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3985 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3986/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3987 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3988 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3989 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3990 {}
3991};
3992
db064e50 3993/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3994static struct hda_bind_ctls vaio_bind_master_vol = {
3995 .ops = &snd_hda_bind_vol,
3996 .values = {
3997 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3998 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3999 0
4000 },
4001};
db064e50
TI		 4002
4003/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4004static struct hda_bind_ctls vaio_bind_master_sw = {
4005 .ops = &snd_hda_bind_sw,
4006 .values = {
4007 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4008 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4009 0,
4010 },
4011};
db064e50
TI		 4012
4013static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4014 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4015 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4016 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4017 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4018 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4019 {
4020 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4021 .name = "Capture Source",
4022 .count = 1,
4023 .info = stac92xx_mux_enum_info,
4024 .get = stac92xx_mux_enum_get,
4025 .put = stac92xx_mux_enum_put,
4026 },
4027 {}
4028};
4029
6d859065 4030static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4031 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4032 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4033 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4034 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4035 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4036 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4037 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4038 {
4039 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4040 .name = "Capture Source",
4041 .count = 1,
4042 .info = stac92xx_mux_enum_info,
4043 .get = stac92xx_mux_enum_get,
4044 .put = stac92xx_mux_enum_put,
4045 },
4046 {}
4047};
4048
4049static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4050 .build_controls = stac92xx_build_controls,
4051 .build_pcms = stac92xx_build_pcms,
4052 .init = stac92xx_init,
4053 .free = stac92xx_free,
cb53c626 4054#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4055 .resume = stac92xx_resume,
4056#endif
4057};
4058
72e7b0dd
TI		 4059static int stac9872_vaio_init(struct hda_codec *codec)
4060{
4061 int err;
4062
4063 err = stac92xx_init(codec);
4064 if (err < 0)
4065 return err;
4066 if (codec->patch_ops.unsol_event)
4067 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4068 return 0;
4069}
4070
4071static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4072{
40c1d308 4073 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4074 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4075 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4076 } else {
4077 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4078 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4079 }
4080}
4081
4082static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4083{
4084 switch (res >> 26) {
4085 case STAC_HP_EVENT:
4086 stac9872_vaio_hp_detect(codec, res);
4087 break;
4088 }
4089}
4090
4091static struct hda_codec_ops stac9872_vaio_patch_ops = {
4092 .build_controls = stac92xx_build_controls,
4093 .build_pcms = stac92xx_build_pcms,
4094 .init = stac9872_vaio_init,
4095 .free = stac92xx_free,
4096 .unsol_event = stac9872_vaio_unsol_event,
4097#ifdef CONFIG_PM
4098 .resume = stac92xx_resume,
4099#endif
4100};
4101
6d859065
GM		 4102enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4103 CXD9872RD_VAIO,
4104 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4105 STAC9872AK_VAIO,
4106 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4107 STAC9872K_VAIO,
4108 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4109 CXD9872AKD_VAIO,
4110 STAC_9872_MODELS,
4111};
4112
4113static const char *stac9872_models[STAC_9872_MODELS] = {
4114 [CXD9872RD_VAIO] = "vaio",
4115 [CXD9872AKD_VAIO] = "vaio-ar",
4116};
4117
4118static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4119 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4120 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4121 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4122 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4123 {}
4124};
4125
6d859065 4126static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4127{
4128 struct sigmatel_spec *spec;
4129 int board_config;
4130
f5fcc13c
TI		 4131 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4132 stac9872_models,
4133 stac9872_cfg_tbl);
db064e50
TI		 4134 if (board_config < 0)
4135 /* unknown config, let generic-parser do its job... */
4136 return snd_hda_parse_generic_codec(codec);
4137
4138 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4139 if (spec == NULL)
4140 return -ENOMEM;
4141
4142 codec->spec = spec;
4143 switch (board_config) {
6d859065
GM		 4144 case CXD9872RD_VAIO:
4145 case STAC9872AK_VAIO:
4146 case STAC9872K_VAIO:
db064e50
TI		 4147 spec->mixer = vaio_mixer;
4148 spec->init = vaio_init;
4149 spec->multiout.max_channels = 2;
4150 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4151 spec->multiout.dac_nids = vaio_dacs;
4152 spec->multiout.hp_nid = VAIO_HP_DAC;
4153 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4154 spec->adc_nids = vaio_adcs;
a64135a2 4155 spec->num_pwrs = 0;
db064e50
TI		 4156 spec->input_mux = &vaio_mux;
4157 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4158 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4159 break;
6d859065
GM		 4160
4161 case CXD9872AKD_VAIO:
4162 spec->mixer = vaio_ar_mixer;
4163 spec->init = vaio_ar_init;
4164 spec->multiout.max_channels = 2;
4165 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4166 spec->multiout.dac_nids = vaio_dacs;
4167 spec->multiout.hp_nid = VAIO_HP_DAC;
4168 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4169 spec->num_pwrs = 0;
6d859065
GM		 4170 spec->adc_nids = vaio_adcs;
4171 spec->input_mux = &vaio_mux;
4172 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4173 codec->patch_ops = stac9872_patch_ops;
6d859065 4174 break;
db064e50
TI		 4175 }
4176
db064e50
TI		 4177 return 0;
4178}
4179
4180
2f2f4251
M		 4181/*
4182 * patch entries
4183 */
4184struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4185 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4186 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4187 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4188 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4189 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4190 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4191 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4192 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4193 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4194 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4195 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4196 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4197 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4198 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4199 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4200 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4201 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4202 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4203 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4204 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4205 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4206 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4207 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4208 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4209 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4210 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4211 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4212 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4213 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 4214 /* The following does not take into account .id=0x83847661 when subsys =
4215 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4216 * currently not fully supported.
4217 */
4218 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4219 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4220 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4221 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4222 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4223 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4224 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4225 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4226 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4227 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4228 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 4229 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4230 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4231 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4232 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
4233 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4234 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4235 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4236 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4237 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4238 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4239 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4240 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4241 {} /* terminator */
4242};
Linux kernel - Deliverables
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