ALSA: hda - Move default input-src selection to init part
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M
1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M
8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
2f2f4251 32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
45a6ac16 34#include <sound/jack.h>
a74ccea5 35#include <sound/tlv.h>
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M
36#include "hda_codec.h"
37#include "hda_local.h"
1cd2224c 38#include "hda_beep.h"
2f2f4251 39
c6e4c666
TI
40enum {
41 STAC_VREF_EVENT = 1,
42 STAC_INSERT_EVENT,
43 STAC_PWR_EVENT,
44 STAC_HP_EVENT,
fefd67f3 45 STAC_LO_EVENT,
3d21d3f7 46 STAC_MIC_EVENT,
c6e4c666 47};
4e55096e 48
f5fcc13c 49enum {
1607b8ea 50 STAC_AUTO,
f5fcc13c 51 STAC_REF,
bf277785 52 STAC_9200_OQO,
dfe495d0
TI
53 STAC_9200_DELL_D21,
54 STAC_9200_DELL_D22,
55 STAC_9200_DELL_D23,
56 STAC_9200_DELL_M21,
57 STAC_9200_DELL_M22,
58 STAC_9200_DELL_M23,
59 STAC_9200_DELL_M24,
60 STAC_9200_DELL_M25,
61 STAC_9200_DELL_M26,
62 STAC_9200_DELL_M27,
58eec423
MCC
63 STAC_9200_M4,
64 STAC_9200_M4_2,
117f257d 65 STAC_9200_PANASONIC,
f5fcc13c
TI
66 STAC_9200_MODELS
67};
68
69enum {
1607b8ea 70 STAC_9205_AUTO,
f5fcc13c 71 STAC_9205_REF,
dfe495d0 72 STAC_9205_DELL_M42,
ae0a8ed8
TD
73 STAC_9205_DELL_M43,
74 STAC_9205_DELL_M44,
d9a4268e 75 STAC_9205_EAPD,
f5fcc13c
TI
76 STAC_9205_MODELS
77};
78
e1f0d669 79enum {
1607b8ea 80 STAC_92HD73XX_AUTO,
9e43f0de 81 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 82 STAC_92HD73XX_REF,
ae709440 83 STAC_92HD73XX_INTEL,
661cd8fb
TI
84 STAC_DELL_M6_AMIC,
85 STAC_DELL_M6_DMIC,
86 STAC_DELL_M6_BOTH,
6b3ab21e 87 STAC_DELL_EQ,
842ae638 88 STAC_ALIENWARE_M17X,
e1f0d669
MR
89 STAC_92HD73XX_MODELS
90};
91
d0513fc6 92enum {
1607b8ea 93 STAC_92HD83XXX_AUTO,
d0513fc6 94 STAC_92HD83XXX_REF,
32ed3f46 95 STAC_92HD83XXX_PWR_REF,
8bb0ac55 96 STAC_DELL_S14,
b4e81876 97 STAC_92HD83XXX_HP,
48315590 98 STAC_HP_DV7_4000,
d0513fc6
MR
99 STAC_92HD83XXX_MODELS
100};
101
e035b841 102enum {
1607b8ea 103 STAC_92HD71BXX_AUTO,
e035b841 104 STAC_92HD71BXX_REF,
a7662640
MR
105 STAC_DELL_M4_1,
106 STAC_DELL_M4_2,
3a7abfd2 107 STAC_DELL_M4_3,
6a14f585 108 STAC_HP_M4,
2a6ce6e5 109 STAC_HP_DV4,
1b0652eb 110 STAC_HP_DV5,
ae6241fb 111 STAC_HP_HDX,
514bf54c 112 STAC_HP_DV4_1222NR,
e035b841
MR
113 STAC_92HD71BXX_MODELS
114};
115
8e21c34c 116enum {
1607b8ea 117 STAC_925x_AUTO,
8e21c34c 118 STAC_925x_REF,
9cb36c2a
MCC
119 STAC_M1,
120 STAC_M1_2,
121 STAC_M2,
8e21c34c 122 STAC_M2_2,
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MCC
123 STAC_M3,
124 STAC_M5,
125 STAC_M6,
8e21c34c
TD
126 STAC_925x_MODELS
127};
128
f5fcc13c 129enum {
1607b8ea 130 STAC_922X_AUTO,
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TI
131 STAC_D945_REF,
132 STAC_D945GTP3,
133 STAC_D945GTP5,
5d5d3bc3
IZ
134 STAC_INTEL_MAC_V1,
135 STAC_INTEL_MAC_V2,
136 STAC_INTEL_MAC_V3,
137 STAC_INTEL_MAC_V4,
138 STAC_INTEL_MAC_V5,
536319af
NB
139 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
140 * is given, one of the above models will be
141 * chosen according to the subsystem id. */
dfe495d0 142 /* for backward compatibility */
f5fcc13c 143 STAC_MACMINI,
3fc24d85 144 STAC_MACBOOK,
6f0778d8
NB
145 STAC_MACBOOK_PRO_V1,
146 STAC_MACBOOK_PRO_V2,
f16928fb 147 STAC_IMAC_INTEL,
0dae0f83 148 STAC_IMAC_INTEL_20,
8c650087 149 STAC_ECS_202,
dfe495d0
TI
150 STAC_922X_DELL_D81,
151 STAC_922X_DELL_D82,
152 STAC_922X_DELL_M81,
153 STAC_922X_DELL_M82,
f5fcc13c
TI
154 STAC_922X_MODELS
155};
156
157enum {
1607b8ea 158 STAC_927X_AUTO,
e28d8322 159 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI
160 STAC_D965_REF,
161 STAC_D965_3ST,
162 STAC_D965_5ST,
679d92ed 163 STAC_D965_5ST_NO_FP,
4ff076e5 164 STAC_DELL_3ST,
8e9068b1 165 STAC_DELL_BIOS,
54930531 166 STAC_927X_VOLKNOB,
f5fcc13c
TI
167 STAC_927X_MODELS
168};
403d1944 169
307282c8
TI
170enum {
171 STAC_9872_AUTO,
172 STAC_9872_VAIO,
173 STAC_9872_MODELS
174};
175
74aeaabc
MR
176struct sigmatel_event {
177 hda_nid_t nid;
c6e4c666
TI
178 unsigned char type;
179 unsigned char tag;
74aeaabc
MR
180 int data;
181};
182
3d21d3f7
TI
183struct sigmatel_mic_route {
184 hda_nid_t pin;
02d33322
TI
185 signed char mux_idx;
186 signed char dmux_idx;
3d21d3f7
TI
187};
188
2f2f4251 189struct sigmatel_spec {
c8b6bf9b 190 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M
191 unsigned int num_mixers;
192
403d1944 193 int board_config;
c0cea0d0 194 unsigned int eapd_switch: 1;
c7d4b2fa 195 unsigned int surr_switch: 1;
3cc08dc6 196 unsigned int alt_switch: 1;
82bc955f 197 unsigned int hp_detect: 1;
00ef50c2 198 unsigned int spdif_mute: 1;
7c7767eb 199 unsigned int check_volume_offset:1;
3d21d3f7 200 unsigned int auto_mic:1;
1b0e372d 201 unsigned int linear_tone_beep:1;
c7d4b2fa 202
4fe5195c 203 /* gpio lines */
0fc9dec4 204 unsigned int eapd_mask;
4fe5195c
MR
205 unsigned int gpio_mask;
206 unsigned int gpio_dir;
207 unsigned int gpio_data;
208 unsigned int gpio_mute;
86d190e7 209 unsigned int gpio_led;
c357aab0 210 unsigned int gpio_led_polarity;
4fe5195c 211
8daaaa97
MR
212 /* stream */
213 unsigned int stream_delay;
214
4fe5195c 215 /* analog loopback */
d78d7a90 216 struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR
217 unsigned char aloopback_mask;
218 unsigned char aloopback_shift;
8259980e 219
a64135a2
MR
220 /* power management */
221 unsigned int num_pwrs;
d0513fc6 222 unsigned int *pwr_mapping;
a64135a2 223 hda_nid_t *pwr_nids;
b76c850f 224 hda_nid_t *dac_list;
a64135a2 225
74aeaabc
MR
226 /* events */
227 struct snd_array events;
228
2f2f4251 229 /* playback */
b22b4821
MR
230 struct hda_input_mux *mono_mux;
231 unsigned int cur_mmux;
2f2f4251 232 struct hda_multi_out multiout;
3cc08dc6 233 hda_nid_t dac_nids[5];
c21ca4a8
TI
234 hda_nid_t hp_dacs[5];
235 hda_nid_t speaker_dacs[5];
2f2f4251 236
7c7767eb
TI
237 int volume_offset;
238
2f2f4251
M
239 /* capture */
240 hda_nid_t *adc_nids;
2f2f4251 241 unsigned int num_adcs;
dabbed6f
M
242 hda_nid_t *mux_nids;
243 unsigned int num_muxes;
8b65727b
MP
244 hda_nid_t *dmic_nids;
245 unsigned int num_dmics;
e1f0d669 246 hda_nid_t *dmux_nids;
1697055e 247 unsigned int num_dmuxes;
d9737751
MR
248 hda_nid_t *smux_nids;
249 unsigned int num_smuxes;
5207e10e 250 unsigned int num_analog_muxes;
6479c631
TI
251
252 unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
253 unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
254 unsigned int num_caps; /* number of capture volume/switch elements */
255
3d21d3f7
TI
256 struct sigmatel_mic_route ext_mic;
257 struct sigmatel_mic_route int_mic;
9907790a 258 struct sigmatel_mic_route dock_mic;
3d21d3f7 259
ea734963 260 const char * const *spdif_labels;
d9737751 261
dabbed6f 262 hda_nid_t dig_in_nid;
b22b4821 263 hda_nid_t mono_nid;
1cd2224c
MR
264 hda_nid_t anabeep_nid;
265 hda_nid_t digbeep_nid;
2f2f4251 266
2f2f4251
M
267 /* pin widgets */
268 hda_nid_t *pin_nids;
269 unsigned int num_pins;
2f2f4251
M
270
271 /* codec specific stuff */
272 struct hda_verb *init;
c8b6bf9b 273 struct snd_kcontrol_new *mixer;
2f2f4251
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274
275 /* capture source */
8b65727b 276 struct hda_input_mux *dinput_mux;
e1f0d669 277 unsigned int cur_dmux[2];
c7d4b2fa 278 struct hda_input_mux *input_mux;
3cc08dc6 279 unsigned int cur_mux[3];
d9737751
MR
280 struct hda_input_mux *sinput_mux;
281 unsigned int cur_smux[2];
2a9c7816
MR
282 unsigned int cur_amux;
283 hda_nid_t *amp_nids;
8daaaa97 284 unsigned int powerdown_adcs;
2f2f4251 285
403d1944
MP
286 /* i/o switches */
287 unsigned int io_switch[2];
0fb87bb4 288 unsigned int clfe_swap;
c21ca4a8
TI
289 hda_nid_t line_switch; /* shared line-in for input and output */
290 hda_nid_t mic_switch; /* shared mic-in for input and output */
291 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 292 unsigned int aloopback;
2f2f4251 293
c7d4b2fa
M
294 struct hda_pcm pcm_rec[2]; /* PCM information */
295
296 /* dynamic controls and input_mux */
297 struct auto_pin_cfg autocfg;
603c4019 298 struct snd_array kctls;
8b65727b 299 struct hda_input_mux private_dimux;
c7d4b2fa 300 struct hda_input_mux private_imux;
d9737751 301 struct hda_input_mux private_smux;
b22b4821 302 struct hda_input_mux private_mono_mux;
2f2f4251
M
303};
304
305static hda_nid_t stac9200_adc_nids[1] = {
306 0x03,
307};
308
309static hda_nid_t stac9200_mux_nids[1] = {
310 0x0c,
311};
312
313static hda_nid_t stac9200_dac_nids[1] = {
314 0x02,
315};
316
a64135a2
MR
317static hda_nid_t stac92hd73xx_pwr_nids[8] = {
318 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
319 0x0f, 0x10, 0x11
320};
321
0ffa9807
MR
322static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
323 0x26, 0,
324};
325
e1f0d669
MR
326static hda_nid_t stac92hd73xx_adc_nids[2] = {
327 0x1a, 0x1b
328};
329
330#define STAC92HD73XX_NUM_DMICS 2
331static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
332 0x13, 0x14, 0
333};
334
335#define STAC92HD73_DAC_COUNT 5
e1f0d669 336
e2aec171
TI
337static hda_nid_t stac92hd73xx_mux_nids[2] = {
338 0x20, 0x21,
e1f0d669
MR
339};
340
341static hda_nid_t stac92hd73xx_dmux_nids[2] = {
342 0x20, 0x21,
343};
344
d9737751
MR
345static hda_nid_t stac92hd73xx_smux_nids[2] = {
346 0x22, 0x23,
347};
348
6479c631
TI
349#define STAC92HD73XX_NUM_CAPS 2
350static unsigned long stac92hd73xx_capvols[] = {
351 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
352 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
353};
354#define stac92hd73xx_capsws stac92hd73xx_capvols
355
d0513fc6 356#define STAC92HD83_DAC_COUNT 3
d0513fc6 357
667067d8 358static hda_nid_t stac92hd83xxx_mux_nids[2] = {
d0513fc6
MR
359 0x17, 0x18,
360};
361
362static hda_nid_t stac92hd83xxx_adc_nids[2] = {
363 0x15, 0x16,
364};
365
366static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
367 0xa, 0xb, 0xd, 0xe,
368};
369
0ffa9807
MR
370static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
371 0x1e, 0,
372};
373
d0513fc6 374static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 375 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR
376};
377
ab5a6ebe
VK
378#define STAC92HD83XXX_NUM_DMICS 2
379static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
380 0x11, 0x20, 0
381};
382
bdfe6f45
DH
383#define STAC92HD88XXX_NUM_DMICS STAC92HD83XXX_NUM_DMICS
384#define stac92hd88xxx_dmic_nids stac92hd83xxx_dmic_nids
385
89feca1a
DH
386#define STAC92HD87B_NUM_DMICS 1
387static hda_nid_t stac92hd87b_dmic_nids[STAC92HD87B_NUM_DMICS + 1] = {
388 0x11, 0
389};
390
6479c631
TI
391#define STAC92HD83XXX_NUM_CAPS 2
392static unsigned long stac92hd83xxx_capvols[] = {
393 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_OUTPUT),
394 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_OUTPUT),
395};
396#define stac92hd83xxx_capsws stac92hd83xxx_capvols
397
a64135a2
MR
398static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
399 0x0a, 0x0d, 0x0f
400};
401
e035b841
MR
402static hda_nid_t stac92hd71bxx_adc_nids[2] = {
403 0x12, 0x13,
404};
405
406static hda_nid_t stac92hd71bxx_mux_nids[2] = {
407 0x1a, 0x1b
408};
409
4b33c767
MR
410static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
411 0x1c, 0x1d,
e1f0d669
MR
412};
413
d9737751
MR
414static hda_nid_t stac92hd71bxx_smux_nids[2] = {
415 0x24, 0x25,
416};
417
e035b841
MR
418#define STAC92HD71BXX_NUM_DMICS 2
419static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
420 0x18, 0x19, 0
421};
422
0ffa9807
MR
423static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
424 0x22, 0
425};
426
6479c631
TI
427#define STAC92HD71BXX_NUM_CAPS 2
428static unsigned long stac92hd71bxx_capvols[] = {
429 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
430 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
431};
432#define stac92hd71bxx_capsws stac92hd71bxx_capvols
433
8e21c34c
TD
434static hda_nid_t stac925x_adc_nids[1] = {
435 0x03,
436};
437
438static hda_nid_t stac925x_mux_nids[1] = {
439 0x0f,
440};
441
442static hda_nid_t stac925x_dac_nids[1] = {
443 0x02,
444};
445
f6e9852a
TI
446#define STAC925X_NUM_DMICS 1
447static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
448 0x15, 0
2c11f955
TD
449};
450
1697055e
TI
451static hda_nid_t stac925x_dmux_nids[1] = {
452 0x14,
453};
454
6479c631
TI
455static unsigned long stac925x_capvols[] = {
456 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
457};
458static unsigned long stac925x_capsws[] = {
459 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
460};
461
2f2f4251
M
462static hda_nid_t stac922x_adc_nids[2] = {
463 0x06, 0x07,
464};
465
466static hda_nid_t stac922x_mux_nids[2] = {
467 0x12, 0x13,
468};
469
6479c631
TI
470#define STAC922X_NUM_CAPS 2
471static unsigned long stac922x_capvols[] = {
472 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
473 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
474};
475#define stac922x_capsws stac922x_capvols
476
45c1d85b
MR
477static hda_nid_t stac927x_slave_dig_outs[2] = {
478 0x1f, 0,
479};
480
3cc08dc6
MP
481static hda_nid_t stac927x_adc_nids[3] = {
482 0x07, 0x08, 0x09
483};
484
485static hda_nid_t stac927x_mux_nids[3] = {
486 0x15, 0x16, 0x17
487};
488
d9737751
MR
489static hda_nid_t stac927x_smux_nids[1] = {
490 0x21,
491};
492
b76c850f
MR
493static hda_nid_t stac927x_dac_nids[6] = {
494 0x02, 0x03, 0x04, 0x05, 0x06, 0
495};
496
e1f0d669
MR
497static hda_nid_t stac927x_dmux_nids[1] = {
498 0x1b,
499};
500
7f16859a
MR
501#define STAC927X_NUM_DMICS 2
502static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
503 0x13, 0x14, 0
504};
505
6479c631
TI
506#define STAC927X_NUM_CAPS 3
507static unsigned long stac927x_capvols[] = {
508 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
509 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
510 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
511};
512static unsigned long stac927x_capsws[] = {
513 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
514 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
515 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
516};
517
ea734963 518static const char * const stac927x_spdif_labels[5] = {
65973632
MR
519 "Digital Playback", "ADAT", "Analog Mux 1",
520 "Analog Mux 2", "Analog Mux 3"
521};
522
f3302a59
MP
523static hda_nid_t stac9205_adc_nids[2] = {
524 0x12, 0x13
525};
526
527static hda_nid_t stac9205_mux_nids[2] = {
528 0x19, 0x1a
529};
530
e1f0d669 531static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 532 0x1d,
e1f0d669
MR
533};
534
d9737751
MR
535static hda_nid_t stac9205_smux_nids[1] = {
536 0x21,
537};
538
f6e9852a
TI
539#define STAC9205_NUM_DMICS 2
540static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
541 0x17, 0x18, 0
8b65727b
MP
542};
543
6479c631
TI
544#define STAC9205_NUM_CAPS 2
545static unsigned long stac9205_capvols[] = {
546 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
547 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
548};
549static unsigned long stac9205_capsws[] = {
550 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
551 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
552};
553
c7d4b2fa 554static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
555 0x08, 0x09, 0x0d, 0x0e,
556 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M
557};
558
8e21c34c
TD
559static hda_nid_t stac925x_pin_nids[8] = {
560 0x07, 0x08, 0x0a, 0x0b,
561 0x0c, 0x0d, 0x10, 0x11,
562};
563
2f2f4251
M
564static hda_nid_t stac922x_pin_nids[10] = {
565 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
566 0x0f, 0x10, 0x11, 0x15, 0x1b,
567};
568
a7662640 569static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR
570 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
571 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 572 0x14, 0x22, 0x23
e1f0d669
MR
573};
574
8bb0ac55 575static hda_nid_t stac92hd83xxx_pin_nids[10] = {
d0513fc6 576 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
8bb0ac55 577 0x0f, 0x10, 0x11, 0x1f, 0x20,
d0513fc6 578};
616f89e7 579
4dfb8a45
VK
580static hda_nid_t stac92hd87xxx_pin_nids[6] = {
581 0x0a, 0x0b, 0x0c, 0x0d,
582 0x0f, 0x11,
583};
584
585static hda_nid_t stac92hd88xxx_pin_nids[8] = {
36706005
CC
586 0x0a, 0x0b, 0x0c, 0x0d,
587 0x0f, 0x11, 0x1f, 0x20,
588};
589
616f89e7
HRK
590#define STAC92HD71BXX_NUM_PINS 13
591static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
592 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
593 0x00, 0x14, 0x18, 0x19, 0x1e,
594 0x1f, 0x20, 0x27
595};
596static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR
597 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
598 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 599 0x1f, 0x20, 0x27
e035b841
MR
600};
601
3cc08dc6
MP
602static hda_nid_t stac927x_pin_nids[14] = {
603 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
604 0x0f, 0x10, 0x11, 0x12, 0x13,
605 0x14, 0x21, 0x22, 0x23,
606};
607
f3302a59
MP
608static hda_nid_t stac9205_pin_nids[12] = {
609 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
610 0x0f, 0x14, 0x16, 0x17, 0x18,
611 0x21, 0x22,
f3302a59
MP
612};
613
8b65727b
MP
614static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_info *uinfo)
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
619 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
620}
621
622static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624{
625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
626 struct sigmatel_spec *spec = codec->spec;
e1f0d669 627 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 628
e1f0d669 629 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP
630 return 0;
631}
632
633static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_value *ucontrol)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
e1f0d669 638 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
639
640 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 641 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
642}
643
d9737751
MR
644static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
645 struct snd_ctl_elem_info *uinfo)
646{
647 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
648 struct sigmatel_spec *spec = codec->spec;
649 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
650}
651
652static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
653 struct snd_ctl_elem_value *ucontrol)
654{
655 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
656 struct sigmatel_spec *spec = codec->spec;
657 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
658
659 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
660 return 0;
661}
662
663static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
664 struct snd_ctl_elem_value *ucontrol)
665{
666 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
667 struct sigmatel_spec *spec = codec->spec;
00ef50c2 668 struct hda_input_mux *smux = &spec->private_smux;
d9737751 669 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
670 int err, val;
671 hda_nid_t nid;
d9737751 672
00ef50c2 673 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 674 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
675 if (err < 0)
676 return err;
677
678 if (spec->spdif_mute) {
679 if (smux_idx == 0)
680 nid = spec->multiout.dig_out_nid;
681 else
682 nid = codec->slave_dig_outs[smux_idx - 1];
683 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 684 val = HDA_AMP_MUTE;
00ef50c2 685 else
c9b46f91 686 val = 0;
00ef50c2 687 /* un/mute SPDIF out */
c9b46f91
TI
688 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
689 HDA_AMP_MUTE, val);
00ef50c2
MR
690 }
691 return 0;
d9737751
MR
692}
693
2fc99890
NL
694static unsigned int stac92xx_vref_set(struct hda_codec *codec,
695 hda_nid_t nid, unsigned int new_vref)
696{
b8621516 697 int error;
2fc99890
NL
698 unsigned int pincfg;
699 pincfg = snd_hda_codec_read(codec, nid, 0,
700 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
701
702 pincfg &= 0xff;
703 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
704 pincfg |= new_vref;
705
706 if (new_vref == AC_PINCTL_VREF_HIZ)
707 pincfg |= AC_PINCTL_OUT_EN;
708 else
709 pincfg |= AC_PINCTL_IN_EN;
710
711 error = snd_hda_codec_write_cache(codec, nid, 0,
712 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
713 if (error < 0)
714 return error;
715 else
716 return 1;
717}
718
719static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
720{
721 unsigned int vref;
722 vref = snd_hda_codec_read(codec, nid, 0,
723 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
724 vref &= AC_PINCTL_VREFEN;
725 return vref;
726}
727
c8b6bf9b 728static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
729{
730 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
731 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 732 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
733}
734
c8b6bf9b 735static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
736{
737 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
738 struct sigmatel_spec *spec = codec->spec;
739 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
740
741 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
742 return 0;
743}
744
c8b6bf9b 745static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
746{
747 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
748 struct sigmatel_spec *spec = codec->spec;
749 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e
TI
750 const struct hda_input_mux *imux = spec->input_mux;
751 unsigned int idx, prev_idx;
752
753 idx = ucontrol->value.enumerated.item[0];
754 if (idx >= imux->num_items)
755 idx = imux->num_items - 1;
756 prev_idx = spec->cur_mux[adc_idx];
757 if (prev_idx == idx)
758 return 0;
759 if (idx < spec->num_analog_muxes) {
760 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
761 AC_VERB_SET_CONNECT_SEL,
762 imux->items[idx].index);
763 if (prev_idx >= spec->num_analog_muxes) {
764 imux = spec->dinput_mux;
765 /* 0 = analog */
766 snd_hda_codec_write_cache(codec,
767 spec->dmux_nids[adc_idx], 0,
768 AC_VERB_SET_CONNECT_SEL,
769 imux->items[0].index);
770 }
771 } else {
772 imux = spec->dinput_mux;
773 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
774 AC_VERB_SET_CONNECT_SEL,
775 imux->items[idx - 1].index);
776 }
777 spec->cur_mux[adc_idx] = idx;
778 return 1;
2f2f4251
M
779}
780
b22b4821
MR
781static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
782 struct snd_ctl_elem_info *uinfo)
783{
784 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
785 struct sigmatel_spec *spec = codec->spec;
786 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
787}
788
789static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
790 struct snd_ctl_elem_value *ucontrol)
791{
792 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
793 struct sigmatel_spec *spec = codec->spec;
794
795 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
796 return 0;
797}
798
799static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
800 struct snd_ctl_elem_value *ucontrol)
801{
802 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
803 struct sigmatel_spec *spec = codec->spec;
804
805 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
806 spec->mono_nid, &spec->cur_mmux);
807}
808
5f10c4a9
ML
809#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
810
811static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
812 struct snd_ctl_elem_value *ucontrol)
813{
814 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 815 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
816 struct sigmatel_spec *spec = codec->spec;
817
e1f0d669
MR
818 ucontrol->value.integer.value[0] = !!(spec->aloopback &
819 (spec->aloopback_mask << idx));
5f10c4a9
ML
820 return 0;
821}
822
823static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
824 struct snd_ctl_elem_value *ucontrol)
825{
826 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
827 struct sigmatel_spec *spec = codec->spec;
e1f0d669 828 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 829 unsigned int dac_mode;
e1f0d669 830 unsigned int val, idx_val;
5f10c4a9 831
e1f0d669
MR
832 idx_val = spec->aloopback_mask << idx;
833 if (ucontrol->value.integer.value[0])
834 val = spec->aloopback | idx_val;
835 else
836 val = spec->aloopback & ~idx_val;
68ea7b2f 837 if (spec->aloopback == val)
5f10c4a9
ML
838 return 0;
839
68ea7b2f 840 spec->aloopback = val;
5f10c4a9 841
e1f0d669
MR
842 /* Only return the bits defined by the shift value of the
843 * first two bytes of the mask
844 */
5f10c4a9 845 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
846 kcontrol->private_value & 0xFFFF, 0x0);
847 dac_mode >>= spec->aloopback_shift;
5f10c4a9 848
e1f0d669 849 if (spec->aloopback & idx_val) {
5f10c4a9 850 snd_hda_power_up(codec);
e1f0d669 851 dac_mode |= idx_val;
5f10c4a9
ML
852 } else {
853 snd_hda_power_down(codec);
e1f0d669 854 dac_mode &= ~idx_val;
5f10c4a9
ML
855 }
856
857 snd_hda_codec_write_cache(codec, codec->afg, 0,
858 kcontrol->private_value >> 16, dac_mode);
859
860 return 1;
861}
862
c7d4b2fa 863static struct hda_verb stac9200_core_init[] = {
2f2f4251 864 /* set dac0mux for dac converter */
c7d4b2fa 865 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
866 {}
867};
868
1194b5b7
TI
869static struct hda_verb stac9200_eapd_init[] = {
870 /* set dac0mux for dac converter */
871 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
872 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
873 {}
874};
875
d654a660
MR
876static struct hda_verb dell_eq_core_init[] = {
877 /* set master volume to max value without distortion
878 * and direct control */
879 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR
880 {}
881};
882
e2aec171 883static struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR
884 /* set master volume and direct control */
885 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
886 {}
887};
888
d0513fc6 889static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR
890 /* power state controls amps */
891 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 892 {}
d0513fc6
MR
893};
894
e035b841 895static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
896 /* set master volume and direct control */
897 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 898 {}
541eee87
MR
899};
900
ca8d33fc
MR
901static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
902 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
903 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
904 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
905 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
906 {}
907};
908
8e21c34c
TD
909static struct hda_verb stac925x_core_init[] = {
910 /* set dac0mux for dac converter */
911 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI
912 /* mute the master volume */
913 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD
914 {}
915};
916
c7d4b2fa 917static struct hda_verb stac922x_core_init[] = {
2f2f4251 918 /* set master volume and direct control */
c7d4b2fa 919 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
920 {}
921};
922
93ed1503 923static struct hda_verb d965_core_init[] = {
19039bd0 924 /* set master volume and direct control */
93ed1503 925 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
926 /* unmute node 0x1b */
927 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
928 /* select node 0x03 as DAC */
929 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
930 {}
931};
932
ccca7cdc
TI
933static struct hda_verb dell_3st_core_init[] = {
934 /* don't set delta bit */
935 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
936 /* unmute node 0x1b */
937 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
938 /* select node 0x03 as DAC */
939 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
940 {}
941};
942
3cc08dc6
MP
943static struct hda_verb stac927x_core_init[] = {
944 /* set master volume and direct control */
945 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
946 /* enable analog pc beep path */
947 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
948 {}
949};
950
54930531
TI
951static struct hda_verb stac927x_volknob_core_init[] = {
952 /* don't set delta bit */
953 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
954 /* enable analog pc beep path */
955 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
956 {}
957};
958
f3302a59
MP
959static struct hda_verb stac9205_core_init[] = {
960 /* set master volume and direct control */
961 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
962 /* enable analog pc beep path */
963 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
964 {}
965};
966
b22b4821
MR
967#define STAC_MONO_MUX \
968 { \
969 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
970 .name = "Mono Mux", \
971 .count = 1, \
972 .info = stac92xx_mono_mux_enum_info, \
973 .get = stac92xx_mono_mux_enum_get, \
974 .put = stac92xx_mono_mux_enum_put, \
975 }
976
e1f0d669 977#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
978 { \
979 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
980 .name = "Analog Loopback", \
e1f0d669 981 .count = cnt, \
5f10c4a9
ML
982 .info = stac92xx_aloopback_info, \
983 .get = stac92xx_aloopback_get, \
984 .put = stac92xx_aloopback_put, \
985 .private_value = verb_read | (verb_write << 16), \
986 }
987
2fc99890
NL
988#define DC_BIAS(xname, idx, nid) \
989 { \
990 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
991 .name = xname, \
992 .index = idx, \
993 .info = stac92xx_dc_bias_info, \
994 .get = stac92xx_dc_bias_get, \
995 .put = stac92xx_dc_bias_put, \
996 .private_value = nid, \
997 }
998
c8b6bf9b 999static struct snd_kcontrol_new stac9200_mixer[] = {
de8c85f7 1000 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
2f2f4251 1001 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M
1002 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1003 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
1004 { } /* end */
1005};
1006
d78d7a90
TI
1007static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
1008 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1009 {}
1010};
1011
1012static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1013 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI
1014 {}
1015};
e1f0d669 1016
d78d7a90
TI
1017static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
1018 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1019 {}
1020};
1021
d0513fc6 1022
d78d7a90
TI
1023static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
1024 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1025};
541eee87 1026
8e21c34c 1027static struct snd_kcontrol_new stac925x_mixer[] = {
de8c85f7 1028 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xe, 0, HDA_OUTPUT),
c9280d68 1029 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M
1030 { } /* end */
1031};
1032
d78d7a90
TI
1033static struct snd_kcontrol_new stac9205_loopback[] = {
1034 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1035 {}
1036};
1037
d78d7a90
TI
1038static struct snd_kcontrol_new stac927x_loopback[] = {
1039 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1040 {}
1041};
1042
1697055e
TI
1043static struct snd_kcontrol_new stac_dmux_mixer = {
1044 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1045 .name = "Digital Input Source",
1046 /* count set later */
1047 .info = stac92xx_dmux_enum_info,
1048 .get = stac92xx_dmux_enum_get,
1049 .put = stac92xx_dmux_enum_put,
1050};
1051
d9737751
MR
1052static struct snd_kcontrol_new stac_smux_mixer = {
1053 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1054 .name = "IEC958 Playback Source",
d9737751
MR
1055 /* count set later */
1056 .info = stac92xx_smux_enum_info,
1057 .get = stac92xx_smux_enum_get,
1058 .put = stac92xx_smux_enum_put,
1059};
1060
ea734963 1061static const char * const slave_vols[] = {
2134ea4f
TI
1062 "Front Playback Volume",
1063 "Surround Playback Volume",
1064 "Center Playback Volume",
1065 "LFE Playback Volume",
1066 "Side Playback Volume",
1067 "Headphone Playback Volume",
2134ea4f 1068 "Speaker Playback Volume",
2134ea4f
TI
1069 NULL
1070};
1071
ea734963 1072static const char * const slave_sws[] = {
2134ea4f
TI
1073 "Front Playback Switch",
1074 "Surround Playback Switch",
1075 "Center Playback Switch",
1076 "LFE Playback Switch",
1077 "Side Playback Switch",
1078 "Headphone Playback Switch",
2134ea4f 1079 "Speaker Playback Switch",
edb54a55 1080 "IEC958 Playback Switch",
2134ea4f
TI
1081 NULL
1082};
1083
603c4019 1084static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1085static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1086
2f2f4251
M
1087static int stac92xx_build_controls(struct hda_codec *codec)
1088{
1089 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1090 struct auto_pin_cfg *cfg = &spec->autocfg;
1091 hda_nid_t nid;
2f2f4251 1092 int err;
c7d4b2fa 1093 int i;
2f2f4251 1094
6479c631
TI
1095 if (spec->mixer) {
1096 err = snd_hda_add_new_ctls(codec, spec->mixer);
1097 if (err < 0)
1098 return err;
1099 }
c7d4b2fa
M
1100
1101 for (i = 0; i < spec->num_mixers; i++) {
1102 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1103 if (err < 0)
1104 return err;
1105 }
5207e10e
TI
1106 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1107 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1108 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1109 err = snd_hda_ctl_add(codec, 0,
1697055e
TI
1110 snd_ctl_new1(&stac_dmux_mixer, codec));
1111 if (err < 0)
1112 return err;
1113 }
d9737751 1114 if (spec->num_smuxes > 0) {
00ef50c2
MR
1115 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1116 struct hda_input_mux *smux = &spec->private_smux;
1117 /* check for mute support on SPDIF out */
1118 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1119 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR
1120 spec->spdif_mute = 1;
1121 }
d9737751 1122 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1123 err = snd_hda_ctl_add(codec, 0,
d9737751
MR
1124 snd_ctl_new1(&stac_smux_mixer, codec));
1125 if (err < 0)
1126 return err;
1127 }
c7d4b2fa 1128
dabbed6f
M
1129 if (spec->multiout.dig_out_nid) {
1130 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1131 if (err < 0)
1132 return err;
9a08160b
TI
1133 err = snd_hda_create_spdif_share_sw(codec,
1134 &spec->multiout);
1135 if (err < 0)
1136 return err;
1137 spec->multiout.share_spdif = 1;
dabbed6f 1138 }
da74ae3e 1139 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1140 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1141 if (err < 0)
1142 return err;
1143 }
2134ea4f
TI
1144
1145 /* if we have no master control, let's create it */
1146 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1147 unsigned int vmaster_tlv[4];
2134ea4f 1148 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1149 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI
1150 /* correct volume offset */
1151 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
de8c85f7 1152 /* minimum value is actually mute */
a74ccea5 1153 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
2134ea4f 1154 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1155 vmaster_tlv, slave_vols);
2134ea4f
TI
1156 if (err < 0)
1157 return err;
1158 }
1159 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1160 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1161 NULL, slave_sws);
1162 if (err < 0)
1163 return err;
1164 }
1165
d78d7a90
TI
1166 if (spec->aloopback_ctl &&
1167 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1168 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1169 if (err < 0)
1170 return err;
1171 }
1172
603c4019 1173 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1174
1175 /* create jack input elements */
1176 if (spec->hp_detect) {
1177 for (i = 0; i < cfg->hp_outs; i++) {
1178 int type = SND_JACK_HEADPHONE;
1179 nid = cfg->hp_pins[i];
1180 /* jack detection */
1181 if (cfg->hp_outs == i)
1182 type |= SND_JACK_LINEOUT;
1183 err = stac92xx_add_jack(codec, nid, type);
1184 if (err < 0)
1185 return err;
1186 }
1187 }
1188 for (i = 0; i < cfg->line_outs; i++) {
1189 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1190 SND_JACK_LINEOUT);
1191 if (err < 0)
1192 return err;
1193 }
eea7dc93
TI
1194 for (i = 0; i < cfg->num_inputs; i++) {
1195 nid = cfg->inputs[i].pin;
1196 err = stac92xx_add_jack(codec, nid, SND_JACK_MICROPHONE);
1197 if (err < 0)
1198 return err;
e4973e1e
TI
1199 }
1200
dabbed6f 1201 return 0;
2f2f4251
M
1202}
1203
403d1944 1204static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1205 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1206 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1207};
1208
58eec423
MCC
1209static unsigned int gateway9200_m4_pin_configs[8] = {
1210 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1211 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1212};
1213static unsigned int gateway9200_m4_2_pin_configs[8] = {
1214 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1215 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1216};
1217
1218/*
dfe495d0
TI
1219 STAC 9200 pin configs for
1220 102801A8
1221 102801DE
1222 102801E8
1223*/
1224static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1225 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1226 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1227};
1228
1229/*
1230 STAC 9200 pin configs for
1231 102801C0
1232 102801C1
1233*/
1234static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1235 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1236 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1237};
1238
1239/*
1240 STAC 9200 pin configs for
1241 102801C4 (Dell Dimension E310)
1242 102801C5
1243 102801C7
1244 102801D9
1245 102801DA
1246 102801E3
1247*/
1248static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1249 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1250 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1251};
1252
1253
1254/*
1255 STAC 9200-32 pin configs for
1256 102801B5 (Dell Inspiron 630m)
1257 102801D8 (Dell Inspiron 640m)
1258*/
1259static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1260 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1261 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1262};
1263
1264/*
1265 STAC 9200-32 pin configs for
1266 102801C2 (Dell Latitude D620)
1267 102801C8
1268 102801CC (Dell Latitude D820)
1269 102801D4
1270 102801D6
1271*/
1272static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1273 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1274 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1275};
1276
1277/*
1278 STAC 9200-32 pin configs for
1279 102801CE (Dell XPS M1710)
1280 102801CF (Dell Precision M90)
1281*/
1282static unsigned int dell9200_m23_pin_configs[8] = {
1283 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1284 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1285};
1286
1287/*
1288 STAC 9200-32 pin configs for
1289 102801C9
1290 102801CA
1291 102801CB (Dell Latitude 120L)
1292 102801D3
1293*/
1294static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1295 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1296 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1297};
1298
1299/*
1300 STAC 9200-32 pin configs for
1301 102801BD (Dell Inspiron E1505n)
1302 102801EE
1303 102801EF
1304*/
1305static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1306 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1307 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1308};
1309
1310/*
1311 STAC 9200-32 pin configs for
1312 102801F5 (Dell Inspiron 1501)
1313 102801F6
1314*/
1315static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1316 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1317 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1318};
1319
1320/*
1321 STAC 9200-32
1322 102801CD (Dell Inspiron E1705/9400)
1323*/
1324static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1325 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1326 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1327};
1328
bf277785
TD
1329static unsigned int oqo9200_pin_configs[8] = {
1330 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1331 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1332};
1333
dfe495d0 1334
f5fcc13c
TI
1335static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1336 [STAC_REF] = ref9200_pin_configs,
bf277785 1337 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1338 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1339 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1340 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1341 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1342 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1343 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1344 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1345 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1346 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1347 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1348 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1349 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1350 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1351};
1352
ea734963 1353static const char * const stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1354 [STAC_AUTO] = "auto",
f5fcc13c 1355 [STAC_REF] = "ref",
bf277785 1356 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1357 [STAC_9200_DELL_D21] = "dell-d21",
1358 [STAC_9200_DELL_D22] = "dell-d22",
1359 [STAC_9200_DELL_D23] = "dell-d23",
1360 [STAC_9200_DELL_M21] = "dell-m21",
1361 [STAC_9200_DELL_M22] = "dell-m22",
1362 [STAC_9200_DELL_M23] = "dell-m23",
1363 [STAC_9200_DELL_M24] = "dell-m24",
1364 [STAC_9200_DELL_M25] = "dell-m25",
1365 [STAC_9200_DELL_M26] = "dell-m26",
1366 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1367 [STAC_9200_M4] = "gateway-m4",
1368 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1369 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1370};
1371
1372static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1373 /* SigmaTel reference board */
1374 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1375 "DFI LanParty", STAC_REF),
577aa2c1
MR
1376 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1377 "DFI LanParty", STAC_REF),
e7377071 1378 /* Dell laptops have BIOS problem */
dfe495d0
TI
1379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1380 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1382 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1384 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1385 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1386 "unknown Dell", STAC_9200_DELL_D22),
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1388 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1390 "Dell Latitude D620", STAC_9200_DELL_M22),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1392 "unknown Dell", STAC_9200_DELL_D23),
1393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1394 "unknown Dell", STAC_9200_DELL_D23),
1395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1396 "unknown Dell", STAC_9200_DELL_M22),
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1398 "unknown Dell", STAC_9200_DELL_M24),
1399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1400 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1402 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1404 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1405 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1406 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1407 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1408 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1409 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1410 "Dell Precision M90", STAC_9200_DELL_M23),
1411 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1412 "unknown Dell", STAC_9200_DELL_M22),
1413 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1414 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1415 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1416 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1417 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1418 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1419 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1420 "unknown Dell", STAC_9200_DELL_D23),
1421 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1422 "unknown Dell", STAC_9200_DELL_D23),
1423 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1424 "unknown Dell", STAC_9200_DELL_D21),
1425 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1426 "unknown Dell", STAC_9200_DELL_D23),
1427 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1428 "unknown Dell", STAC_9200_DELL_D21),
1429 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1430 "unknown Dell", STAC_9200_DELL_M25),
1431 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1432 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1433 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1434 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1435 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1436 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1437 /* Panasonic */
117f257d 1438 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1439 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1440 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1441 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1442 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1443 /* OQO Mobile */
1444 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1445 {} /* terminator */
1446};
1447
8e21c34c
TD
1448static unsigned int ref925x_pin_configs[8] = {
1449 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1450 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1451};
1452
9cb36c2a
MCC
1453static unsigned int stac925xM1_pin_configs[8] = {
1454 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1455 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1456};
1457
9cb36c2a
MCC
1458static unsigned int stac925xM1_2_pin_configs[8] = {
1459 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1460 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1461};
58eec423 1462
9cb36c2a
MCC
1463static unsigned int stac925xM2_pin_configs[8] = {
1464 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1465 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1466};
1467
8e21c34c 1468static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1469 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1470 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1471};
1472
9cb36c2a
MCC
1473static unsigned int stac925xM3_pin_configs[8] = {
1474 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1475 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1476};
58eec423 1477
9cb36c2a
MCC
1478static unsigned int stac925xM5_pin_configs[8] = {
1479 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1480 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1481};
1482
9cb36c2a
MCC
1483static unsigned int stac925xM6_pin_configs[8] = {
1484 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1485 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1486};
1487
1488static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1489 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1490 [STAC_M1] = stac925xM1_pin_configs,
1491 [STAC_M1_2] = stac925xM1_2_pin_configs,
1492 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1493 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1494 [STAC_M3] = stac925xM3_pin_configs,
1495 [STAC_M5] = stac925xM5_pin_configs,
1496 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1497};
1498
ea734963 1499static const char * const stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1500 [STAC_925x_AUTO] = "auto",
8e21c34c 1501 [STAC_REF] = "ref",
9cb36c2a
MCC
1502 [STAC_M1] = "m1",
1503 [STAC_M1_2] = "m1-2",
1504 [STAC_M2] = "m2",
8e21c34c 1505 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1506 [STAC_M3] = "m3",
1507 [STAC_M5] = "m5",
1508 [STAC_M6] = "m6",
8e21c34c
TD
1509};
1510
9cb36c2a 1511static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1512 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1513 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1514 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1515 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1516 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1517 /* Not sure about the brand name for those */
1518 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1519 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1520 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1521 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1522 {} /* terminator */
8e21c34c
TD
1523};
1524
1525static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1526 /* SigmaTel reference board */
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1529 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1530
1531 /* Default table for unknown ID */
1532 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1533
8e21c34c
TD
1534 {} /* terminator */
1535};
1536
a7662640 1537static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1538 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1539 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1540 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1541 0x01452050,
1542};
1543
1544static unsigned int dell_m6_pin_configs[13] = {
1545 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1546 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1547 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1548 0x4f0000f0,
e1f0d669
MR
1549};
1550
842ae638
TI
1551static unsigned int alienware_m17x_pin_configs[13] = {
1552 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1553 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1554 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1555 0x904601b0,
1556};
1557
4d26f446 1558static unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1559 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1560 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF
1561};
1562
e1f0d669 1563static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1564 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1565 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1566 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1567 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1568 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1569 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1570 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR
1571};
1572
ea734963 1573static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1574 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1575 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1576 [STAC_92HD73XX_REF] = "ref",
ae709440 1577 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI
1578 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1579 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1580 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1581 [STAC_DELL_EQ] = "dell-eq",
842ae638 1582 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR
1583};
1584
1585static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1586 /* SigmaTel reference board */
1587 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1588 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR
1589 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1590 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF
1591 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1592 "Intel DG45ID", STAC_92HD73XX_INTEL),
1593 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1594 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1596 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1598 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1600 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1602 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1604 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1606 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1607 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1608 "unknown Dell", STAC_DELL_M6_DMIC),
1609 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1610 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1612 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1614 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI
1615 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1616 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB
1617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1618 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf
DC
1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1620 "Dell Studio XPS 1645", STAC_DELL_M6_BOTH),
5c1bccf6
DC
1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1622 "Dell Studio 1558", STAC_DELL_M6_BOTH),
e1f0d669
MR
1623 {} /* terminator */
1624};
1625
842ae638
TI
1626static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1628 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC
1629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1630 "Alienware M17x", STAC_ALIENWARE_M17X),
842ae638
TI
1631 {} /* terminator */
1632};
1633
8bb0ac55 1634static unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR
1635 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1636 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR
1637 0x01451160, 0x98560170,
1638};
1639
8bb0ac55 1640static unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI
1641 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1642 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR
1643 0x40f000f0, 0x40f000f0,
1644};
1645
48315590
SE
1646static unsigned int hp_dv7_4000_pin_configs[10] = {
1647 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1648 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1649 0x40f000f0, 0x40f000f0,
1650};
1651
d0513fc6
MR
1652static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1653 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1654 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1655 [STAC_DELL_S14] = dell_s14_pin_configs,
48315590 1656 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
d0513fc6
MR
1657};
1658
ea734963 1659static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1660 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1661 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1662 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1663 [STAC_DELL_S14] = "dell-s14",
b4e81876 1664 [STAC_92HD83XXX_HP] = "hp",
48315590 1665 [STAC_HP_DV7_4000] = "hp-dv7-4000",
d0513fc6
MR
1666};
1667
1668static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1669 /* SigmaTel reference board */
1670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1671 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR
1672 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1673 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR
1674 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1675 "unknown Dell", STAC_DELL_S14),
b4e81876
TI
1676 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x3600,
1677 "HP", STAC_92HD83XXX_HP),
574f3c4f 1678 {} /* terminator */
d0513fc6
MR
1679};
1680
616f89e7 1681static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1682 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1683 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK
1684 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1685 0x00000000
e035b841
MR
1686};
1687
616f89e7 1688static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1689 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1690 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1691 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1692 0x00000000
a7662640
MR
1693};
1694
616f89e7 1695static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR
1696 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1697 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK
1698 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1699 0x00000000
a7662640
MR
1700};
1701
616f89e7 1702static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR
1703 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1704 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1705 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1706 0x00000000
3a7abfd2
MR
1707};
1708
e035b841
MR
1709static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1710 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1711 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1712 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1713 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1714 [STAC_HP_M4] = NULL,
2a6ce6e5 1715 [STAC_HP_DV4] = NULL,
1b0652eb 1716 [STAC_HP_DV5] = NULL,
ae6241fb 1717 [STAC_HP_HDX] = NULL,
514bf54c 1718 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR
1719};
1720
ea734963 1721static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1722 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1723 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1724 [STAC_DELL_M4_1] = "dell-m4-1",
1725 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1726 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1727 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1728 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1729 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1730 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1731 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR
1732};
1733
1734static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1735 /* SigmaTel reference board */
1736 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1737 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR
1738 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1739 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG
1740 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1741 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK
1742 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1743 "HP", STAC_HP_DV5),
58d8395b
TI
1744 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1745 "HP", STAC_HP_DV5),
2ae466f8 1746 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1747 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI
1748 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1749 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI
1750 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1751 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1752 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1753 "HP mini 1000", STAC_HP_M4),
ae6241fb 1754 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1755 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI
1756 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1757 "HP dv6", STAC_HP_DV5),
e3d2530a
KG
1758 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1759 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY
1760 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1761 "HP DV6", STAC_HP_DV5),
1972d025
TI
1762 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1763 "HP", STAC_HP_DV5),
a7662640
MR
1764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1765 "unknown Dell", STAC_DELL_M4_1),
1766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1767 "unknown Dell", STAC_DELL_M4_1),
1768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1769 "unknown Dell", STAC_DELL_M4_1),
1770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1771 "unknown Dell", STAC_DELL_M4_1),
1772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1773 "unknown Dell", STAC_DELL_M4_1),
1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1775 "unknown Dell", STAC_DELL_M4_1),
1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1777 "unknown Dell", STAC_DELL_M4_1),
1778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1779 "unknown Dell", STAC_DELL_M4_2),
1780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1781 "unknown Dell", STAC_DELL_M4_2),
1782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1783 "unknown Dell", STAC_DELL_M4_2),
1784 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1785 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1786 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1787 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1788 {} /* terminator */
1789};
1790
403d1944
MP
1791static unsigned int ref922x_pin_configs[10] = {
1792 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1793 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1794 0x40000100, 0x40000100,
1795};
1796
dfe495d0
TI
1797/*
1798 STAC 922X pin configs for
1799 102801A7
1800 102801AB
1801 102801A9
1802 102801D1
1803 102801D2
1804*/
1805static unsigned int dell_922x_d81_pin_configs[10] = {
1806 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1807 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1808 0x01813122, 0x400001f2,
1809};
1810
1811/*
1812 STAC 922X pin configs for
1813 102801AC
1814 102801D0
1815*/
1816static unsigned int dell_922x_d82_pin_configs[10] = {
1817 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1818 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1819 0x01813122, 0x400001f1,
1820};
1821
1822/*
1823 STAC 922X pin configs for
1824 102801BF
1825*/
1826static unsigned int dell_922x_m81_pin_configs[10] = {
1827 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1828 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1829 0x40C003f1, 0x405003f0,
1830};
1831
1832/*
1833 STAC 9221 A1 pin configs for
1834 102801D7 (Dell XPS M1210)
1835*/
1836static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1837 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1838 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1839 0x508003f3, 0x405003f4,
1840};
1841
403d1944 1842static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1843 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1844 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1845 0x02a19120, 0x40000100,
1846};
1847
1848static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1849 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1850 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1851 0x02a19320, 0x40000100,
1852};
1853
5d5d3bc3
IZ
1854static unsigned int intel_mac_v1_pin_configs[10] = {
1855 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1856 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1857 0x400000fc, 0x400000fb,
1858};
1859
1860static unsigned int intel_mac_v2_pin_configs[10] = {
1861 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1862 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1863 0x400000fc, 0x400000fb,
6f0778d8
NB
1864};
1865
5d5d3bc3
IZ
1866static unsigned int intel_mac_v3_pin_configs[10] = {
1867 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1868 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1869 0x400000fc, 0x400000fb,
1870};
1871
5d5d3bc3
IZ
1872static unsigned int intel_mac_v4_pin_configs[10] = {
1873 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1874 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1875 0x400000fc, 0x400000fb,
1876};
1877
5d5d3bc3
IZ
1878static unsigned int intel_mac_v5_pin_configs[10] = {
1879 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1880 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1881 0x400000fc, 0x400000fb,
0dae0f83
TI
1882};
1883
8c650087
MCC
1884static unsigned int ecs202_pin_configs[10] = {
1885 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1886 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1887 0x9037012e, 0x40e000f2,
1888};
76c08828 1889
19039bd0 1890static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1891 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1892 [STAC_D945GTP3] = d945gtp3_pin_configs,
1893 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1894 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1895 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1896 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1897 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1898 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1899 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1900 /* for backward compatibility */
5d5d3bc3
IZ
1901 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1902 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1903 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1904 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1905 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1906 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1907 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1908 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1909 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1910 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1911 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
1912};
1913
ea734963 1914static const char * const stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1915 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI
1916 [STAC_D945_REF] = "ref",
1917 [STAC_D945GTP5] = "5stack",
1918 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
1919 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1920 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1921 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1922 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1923 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1924 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1925 /* for backward compatibility */
f5fcc13c 1926 [STAC_MACMINI] = "macmini",
3fc24d85 1927 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
1928 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1929 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1930 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1931 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1932 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
1933 [STAC_922X_DELL_D81] = "dell-d81",
1934 [STAC_922X_DELL_D82] = "dell-d82",
1935 [STAC_922X_DELL_M81] = "dell-m81",
1936 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
1937};
1938
1939static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1940 /* SigmaTel reference board */
1941 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1942 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR
1943 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1944 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI
1945 /* Intel 945G based systems */
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1947 "Intel D945G", STAC_D945GTP3),
1948 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1949 "Intel D945G", STAC_D945GTP3),
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1951 "Intel D945G", STAC_D945GTP3),
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1953 "Intel D945G", STAC_D945GTP3),
1954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1955 "Intel D945G", STAC_D945GTP3),
1956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1957 "Intel D945G", STAC_D945GTP3),
1958 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1959 "Intel D945G", STAC_D945GTP3),
1960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1961 "Intel D945G", STAC_D945GTP3),
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1963 "Intel D945G", STAC_D945GTP3),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1965 "Intel D945G", STAC_D945GTP3),
1966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1967 "Intel D945G", STAC_D945GTP3),
1968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1969 "Intel D945G", STAC_D945GTP3),
1970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1971 "Intel D945G", STAC_D945GTP3),
1972 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1973 "Intel D945G", STAC_D945GTP3),
1974 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1975 "Intel D945G", STAC_D945GTP3),
1976 /* Intel D945G 5-stack systems */
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1978 "Intel D945G", STAC_D945GTP5),
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1980 "Intel D945G", STAC_D945GTP5),
1981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1982 "Intel D945G", STAC_D945GTP5),
1983 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1984 "Intel D945G", STAC_D945GTP5),
1985 /* Intel 945P based systems */
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1987 "Intel D945P", STAC_D945GTP3),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1989 "Intel D945P", STAC_D945GTP3),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1991 "Intel D945P", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1993 "Intel D945P", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1995 "Intel D945P", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1997 "Intel D945P", STAC_D945GTP5),
8056d47e
TI
1998 /* other intel */
1999 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2000 "Intel D945", STAC_D945_REF),
f5fcc13c 2001 /* other systems */
536319af 2002 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2003 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2004 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
2005 /* Dell systems */
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2007 "unknown Dell", STAC_922X_DELL_D81),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2009 "unknown Dell", STAC_922X_DELL_D81),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2011 "unknown Dell", STAC_922X_DELL_D81),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2013 "unknown Dell", STAC_922X_DELL_D82),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2015 "unknown Dell", STAC_922X_DELL_M81),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2017 "unknown Dell", STAC_922X_DELL_D82),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2019 "unknown Dell", STAC_922X_DELL_D81),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2021 "unknown Dell", STAC_922X_DELL_D81),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2023 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2024 /* ECS/PC Chips boards */
dea0a509 2025 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2026 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2027 {} /* terminator */
2028};
2029
3cc08dc6 2030static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2031 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2032 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2033 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2034 0x01c42190, 0x40000100,
3cc08dc6
MP
2035};
2036
93ed1503 2037static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2038 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2039 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2040 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2041 0x40000100, 0x40000100
2042};
2043
93ed1503
TD
2044static unsigned int d965_5st_pin_configs[14] = {
2045 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2046 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2047 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2048 0x40000100, 0x40000100
2049};
2050
679d92ed
TI
2051static unsigned int d965_5st_no_fp_pin_configs[14] = {
2052 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2053 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2054 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2055 0x40000100, 0x40000100
2056};
2057
4ff076e5
TD
2058static unsigned int dell_3st_pin_configs[14] = {
2059 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2060 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2061 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2062 0x40c003fc, 0x40000100
2063};
2064
93ed1503 2065static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2066 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2067 [STAC_D965_REF] = ref927x_pin_configs,
2068 [STAC_D965_3ST] = d965_3st_pin_configs,
2069 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2070 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR
2071 [STAC_DELL_3ST] = dell_3st_pin_configs,
2072 [STAC_DELL_BIOS] = NULL,
54930531 2073 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP
2074};
2075
ea734963 2076static const char * const stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2077 [STAC_927X_AUTO] = "auto",
e28d8322 2078 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2079 [STAC_D965_REF] = "ref",
2080 [STAC_D965_3ST] = "3stack",
2081 [STAC_D965_5ST] = "5stack",
679d92ed 2082 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR
2083 [STAC_DELL_3ST] = "dell-3stack",
2084 [STAC_DELL_BIOS] = "dell-bios",
54930531 2085 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI
2086};
2087
2088static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2089 /* SigmaTel reference board */
2090 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2091 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR
2092 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2093 "DFI LanParty", STAC_D965_REF),
81d3dbde 2094 /* Intel 946 based systems */
f5fcc13c
TI
2095 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2096 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2097 /* 965 based 3 stack systems */
dea0a509
TI
2098 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2099 "Intel D965", STAC_D965_3ST),
2100 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2101 "Intel D965", STAC_D965_3ST),
4ff076e5 2102 /* Dell 3 stack systems */
dfe495d0 2103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2106 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR
2112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2116 /* 965 based 5 stack systems */
dea0a509
TI
2117 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2118 "Intel D965", STAC_D965_5ST),
2119 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2120 "Intel D965", STAC_D965_5ST),
54930531
TI
2121 /* volume-knob fixes */
2122 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP
2123 {} /* terminator */
2124};
2125
f3302a59
MP
2126static unsigned int ref9205_pin_configs[12] = {
2127 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2128 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2129 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2130};
2131
dfe495d0
TI
2132/*
2133 STAC 9205 pin configs for
2134 102801F1
2135 102801F2
2136 102801FC
2137 102801FD
2138 10280204
2139 1028021F
3fa2ef74 2140 10280228 (Dell Vostro 1500)
95e70e87 2141 10280229 (Dell Vostro 1700)
dfe495d0
TI
2142*/
2143static unsigned int dell_9205_m42_pin_configs[12] = {
2144 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2145 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2146 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2147};
2148
2149/*
2150 STAC 9205 pin configs for
2151 102801F9
2152 102801FA
2153 102801FE
2154 102801FF (Dell Precision M4300)
2155 10280206
2156 10280200
2157 10280201
2158*/
2159static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2160 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2161 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2162 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2163};
2164
dfe495d0 2165static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2166 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2167 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2168 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2169};
2170
f5fcc13c 2171static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2172 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2173 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2174 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2175 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2176 [STAC_9205_EAPD] = NULL,
f3302a59
MP
2177};
2178
ea734963 2179static const char * const stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2180 [STAC_9205_AUTO] = "auto",
f5fcc13c 2181 [STAC_9205_REF] = "ref",
dfe495d0 2182 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2183 [STAC_9205_DELL_M43] = "dell-m43",
2184 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2185 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI
2186};
2187
2188static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2189 /* SigmaTel reference board */
2190 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2191 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK
2192 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2193 "SigmaTel", STAC_9205_REF),
577aa2c1
MR
2194 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2195 "DFI LanParty", STAC_9205_REF),
d9a4268e 2196 /* Dell */
dfe495d0
TI
2197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2198 "unknown Dell", STAC_9205_DELL_M42),
2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2200 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2202 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2204 "Dell Precision", STAC_9205_DELL_M43),
2205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2206 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2208 "unknown Dell", STAC_9205_DELL_M42),
2209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2210 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2212 "Dell Precision", STAC_9205_DELL_M43),
2213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2214 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2216 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2218 "Dell Precision", STAC_9205_DELL_M43),
2219 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2220 "Dell Precision", STAC_9205_DELL_M43),
2221 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2222 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2223 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2224 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2225 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2226 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA
2227 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2228 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2229 /* Gateway */
42b95f0c 2230 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2231 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP
2232 {} /* terminator */
2233};
2234
330ee995
TI
2235static void stac92xx_set_config_regs(struct hda_codec *codec,
2236 unsigned int *pincfgs)
11b44bbd
RF
2237{
2238 int i;
2239 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2240
330ee995
TI
2241 if (!pincfgs)
2242 return;
11b44bbd 2243
87d48363 2244 for (i = 0; i < spec->num_pins; i++)
330ee995
TI
2245 if (spec->pin_nids[i] && pincfgs[i])
2246 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2247 pincfgs[i]);
af9f341a
TI
2248}
2249
dabbed6f 2250/*
c7d4b2fa 2251 * Analog playback callbacks
dabbed6f 2252 */
c7d4b2fa
M
2253static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2254 struct hda_codec *codec,
c8b6bf9b 2255 struct snd_pcm_substream *substream)
2f2f4251 2256{
dabbed6f 2257 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2258 if (spec->stream_delay)
2259 msleep(spec->stream_delay);
9a08160b
TI
2260 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2261 hinfo);
2f2f4251
M
2262}
2263
2f2f4251
M
2264static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2265 struct hda_codec *codec,
2266 unsigned int stream_tag,
2267 unsigned int format,
c8b6bf9b 2268 struct snd_pcm_substream *substream)
2f2f4251
M
2269{
2270 struct sigmatel_spec *spec = codec->spec;
403d1944 2271 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2272}
2273
2274static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2275 struct hda_codec *codec,
c8b6bf9b 2276 struct snd_pcm_substream *substream)
2f2f4251
M
2277{
2278 struct sigmatel_spec *spec = codec->spec;
2279 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2280}
2281
dabbed6f
M
2282/*
2283 * Digital playback callbacks
2284 */
2285static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2286 struct hda_codec *codec,
c8b6bf9b 2287 struct snd_pcm_substream *substream)
dabbed6f
M
2288{
2289 struct sigmatel_spec *spec = codec->spec;
2290 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2291}
2292
2293static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2294 struct hda_codec *codec,
c8b6bf9b 2295 struct snd_pcm_substream *substream)
dabbed6f
M
2296{
2297 struct sigmatel_spec *spec = codec->spec;
2298 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2299}
2300
6b97eb45
TI
2301static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2302 struct hda_codec *codec,
2303 unsigned int stream_tag,
2304 unsigned int format,
2305 struct snd_pcm_substream *substream)
2306{
2307 struct sigmatel_spec *spec = codec->spec;
2308 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2309 stream_tag, format, substream);
2310}
2311
9411e21c
TI
2312static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2313 struct hda_codec *codec,
2314 struct snd_pcm_substream *substream)
2315{
2316 struct sigmatel_spec *spec = codec->spec;
2317 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2318}
2319
dabbed6f 2320
2f2f4251
M
2321/*
2322 * Analog capture callbacks
2323 */
2324static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2325 struct hda_codec *codec,
2326 unsigned int stream_tag,
2327 unsigned int format,
c8b6bf9b 2328 struct snd_pcm_substream *substream)
2f2f4251
M
2329{
2330 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2331 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2332
8daaaa97
MR
2333 if (spec->powerdown_adcs) {
2334 msleep(40);
8c2f767b 2335 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2336 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2337 }
2338 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2339 return 0;
2340}
2341
2342static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2343 struct hda_codec *codec,
c8b6bf9b 2344 struct snd_pcm_substream *substream)
2f2f4251
M
2345{
2346 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2347 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2348
8daaaa97
MR
2349 snd_hda_codec_cleanup_stream(codec, nid);
2350 if (spec->powerdown_adcs)
8c2f767b 2351 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2352 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2353 return 0;
2354}
2355
dabbed6f
M
2356static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2357 .substreams = 1,
2358 .channels_min = 2,
2359 .channels_max = 2,
2360 /* NID is set in stac92xx_build_pcms */
2361 .ops = {
2362 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2363 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI
2364 .prepare = stac92xx_dig_playback_pcm_prepare,
2365 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M
2366 },
2367};
2368
2369static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2370 .substreams = 1,
2371 .channels_min = 2,
2372 .channels_max = 2,
2373 /* NID is set in stac92xx_build_pcms */
2374};
2375
2f2f4251
M
2376static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2377 .substreams = 1,
2378 .channels_min = 2,
c7d4b2fa 2379 .channels_max = 8,
2f2f4251
M
2380 .nid = 0x02, /* NID to query formats and rates */
2381 .ops = {
2382 .open = stac92xx_playback_pcm_open,
2383 .prepare = stac92xx_playback_pcm_prepare,
2384 .cleanup = stac92xx_playback_pcm_cleanup
2385 },
2386};
2387
3cc08dc6
MP
2388static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2389 .substreams = 1,
2390 .channels_min = 2,
2391 .channels_max = 2,
2392 .nid = 0x06, /* NID to query formats and rates */
2393 .ops = {
2394 .open = stac92xx_playback_pcm_open,
2395 .prepare = stac92xx_playback_pcm_prepare,
2396 .cleanup = stac92xx_playback_pcm_cleanup
2397 },
2398};
2399
2f2f4251 2400static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2401 .channels_min = 2,
2402 .channels_max = 2,
9e05b7a3 2403 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2404 .ops = {
2405 .prepare = stac92xx_capture_pcm_prepare,
2406 .cleanup = stac92xx_capture_pcm_cleanup
2407 },
2408};
2409
2410static int stac92xx_build_pcms(struct hda_codec *codec)
2411{
2412 struct sigmatel_spec *spec = codec->spec;
2413 struct hda_pcm *info = spec->pcm_rec;
2414
2415 codec->num_pcms = 1;
2416 codec->pcm_info = info;
2417
c7d4b2fa 2418 info->name = "STAC92xx Analog";
2f2f4251 2419 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI
2420 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2421 spec->multiout.dac_nids[0];
2f2f4251 2422 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2423 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2424 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2425
2426 if (spec->alt_switch) {
2427 codec->num_pcms++;
2428 info++;
2429 info->name = "STAC92xx Analog Alt";
2430 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2431 }
2f2f4251 2432
dabbed6f
M
2433 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2434 codec->num_pcms++;
2435 info++;
2436 info->name = "STAC92xx Digital";
0852d7a6 2437 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M
2438 if (spec->multiout.dig_out_nid) {
2439 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2440 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2441 }
2442 if (spec->dig_in_nid) {
2443 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2444 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2445 }
2446 }
2447
2f2f4251
M
2448 return 0;
2449}
2450
7c922de7
NL
2451static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2452 hda_nid_t nid)
c960a03b 2453{
1327a32b 2454 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI
2455 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2456 if (pincap & AC_PINCAP_VREF_100)
2457 return AC_PINCTL_VREF_100;
2458 if (pincap & AC_PINCAP_VREF_80)
2459 return AC_PINCTL_VREF_80;
2460 if (pincap & AC_PINCAP_VREF_50)
2461 return AC_PINCTL_VREF_50;
2462 if (pincap & AC_PINCAP_VREF_GRD)
2463 return AC_PINCTL_VREF_GRD;
2464 return 0;
2465}
2466
403d1944
MP
2467static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2468
2469{
82beb8fd
TI
2470 snd_hda_codec_write_cache(codec, nid, 0,
2471 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2472}
2473
7c2ba97b
MR
2474#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2475
2476static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2477 struct snd_ctl_elem_value *ucontrol)
2478{
2479 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2480 struct sigmatel_spec *spec = codec->spec;
2481
d7a89436 2482 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2483 return 0;
2484}
2485
62558ce1 2486static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2487
7c2ba97b
MR
2488static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2489 struct snd_ctl_elem_value *ucontrol)
2490{
2491 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2492 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2493 int nid = kcontrol->private_value;
2494
2495 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2496
2497 /* check to be sure that the ports are upto date with
2498 * switch changes
2499 */
62558ce1 2500 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR
2501
2502 return 1;
2503}
2504
7c922de7
NL
2505static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2506 struct snd_ctl_elem_info *uinfo)
2507{
2508 int i;
2509 static char *texts[] = {
2510 "Mic In", "Line In", "Line Out"
2511 };
2512
2513 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2514 struct sigmatel_spec *spec = codec->spec;
2515 hda_nid_t nid = kcontrol->private_value;
2516
2517 if (nid == spec->mic_switch || nid == spec->line_switch)
2518 i = 3;
2519 else
2520 i = 2;
2521
2522 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2523 uinfo->value.enumerated.items = i;
2524 uinfo->count = 1;
2525 if (uinfo->value.enumerated.item >= i)
2526 uinfo->value.enumerated.item = i-1;
2527 strcpy(uinfo->value.enumerated.name,
2528 texts[uinfo->value.enumerated.item]);
2529
2530 return 0;
2531}
2532
2533static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2534 struct snd_ctl_elem_value *ucontrol)
2535{
2536 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2537 hda_nid_t nid = kcontrol->private_value;
2538 unsigned int vref = stac92xx_vref_get(codec, nid);
2539
2540 if (vref == stac92xx_get_default_vref(codec, nid))
2541 ucontrol->value.enumerated.item[0] = 0;
2542 else if (vref == AC_PINCTL_VREF_GRD)
2543 ucontrol->value.enumerated.item[0] = 1;
2544 else if (vref == AC_PINCTL_VREF_HIZ)
2545 ucontrol->value.enumerated.item[0] = 2;
2546
2547 return 0;
2548}
2549
2550static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2551 struct snd_ctl_elem_value *ucontrol)
2552{
2553 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2554 unsigned int new_vref = 0;
b8621516 2555 int error;
7c922de7
NL
2556 hda_nid_t nid = kcontrol->private_value;
2557
2558 if (ucontrol->value.enumerated.item[0] == 0)
2559 new_vref = stac92xx_get_default_vref(codec, nid);
2560 else if (ucontrol->value.enumerated.item[0] == 1)
2561 new_vref = AC_PINCTL_VREF_GRD;
2562 else if (ucontrol->value.enumerated.item[0] == 2)
2563 new_vref = AC_PINCTL_VREF_HIZ;
2564 else
2565 return 0;
2566
2567 if (new_vref != stac92xx_vref_get(codec, nid)) {
2568 error = stac92xx_vref_set(codec, nid, new_vref);
2569 return error;
2570 }
2571
2572 return 0;
2573}
2574
2575static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2576 struct snd_ctl_elem_info *uinfo)
2577{
2578 static char *texts[2];
2579 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2580 struct sigmatel_spec *spec = codec->spec;
2581
2582 if (kcontrol->private_value == spec->line_switch)
2583 texts[0] = "Line In";
2584 else
2585 texts[0] = "Mic In";
2586 texts[1] = "Line Out";
2587 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2588 uinfo->value.enumerated.items = 2;
2589 uinfo->count = 1;
2590
2591 if (uinfo->value.enumerated.item >= 2)
2592 uinfo->value.enumerated.item = 1;
2593 strcpy(uinfo->value.enumerated.name,
2594 texts[uinfo->value.enumerated.item]);
2595
2596 return 0;
2597}
403d1944
MP
2598
2599static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2600{
2601 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2602 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL
2603 hda_nid_t nid = kcontrol->private_value;
2604 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2605
7c922de7 2606 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP
2607 return 0;
2608}
2609
2610static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2611{
2612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2613 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL
2614 hda_nid_t nid = kcontrol->private_value;
2615 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2616 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP
2617
2618 spec->io_switch[io_idx] = val;
2619
2620 if (val)
2621 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2622 else {
2623 unsigned int pinctl = AC_PINCTL_IN_EN;
2624 if (io_idx) /* set VREF for mic */
7c922de7 2625 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI
2626 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2627 }
40c1d308
JZ
2628
2629 /* check the auto-mute again: we need to mute/unmute the speaker
2630 * appropriately according to the pin direction
2631 */
2632 if (spec->hp_detect)
62558ce1 2633 stac_issue_unsol_event(codec, nid);
40c1d308 2634
403d1944
MP
2635 return 1;
2636}
2637
0fb87bb4
ML
2638#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2639
2640static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2641 struct snd_ctl_elem_value *ucontrol)
2642{
2643 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2644 struct sigmatel_spec *spec = codec->spec;
2645
2646 ucontrol->value.integer.value[0] = spec->clfe_swap;
2647 return 0;
2648}
2649
2650static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2651 struct snd_ctl_elem_value *ucontrol)
2652{
2653 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2654 struct sigmatel_spec *spec = codec->spec;
2655 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2656 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2657
68ea7b2f 2658 if (spec->clfe_swap == val)
0fb87bb4
ML
2659 return 0;
2660
68ea7b2f 2661 spec->clfe_swap = val;
0fb87bb4
ML
2662
2663 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2664 spec->clfe_swap ? 0x4 : 0x0);
2665
2666 return 1;
2667}
2668
7c2ba97b
MR
2669#define STAC_CODEC_HP_SWITCH(xname) \
2670 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2671 .name = xname, \
2672 .index = 0, \
2673 .info = stac92xx_hp_switch_info, \
2674 .get = stac92xx_hp_switch_get, \
2675 .put = stac92xx_hp_switch_put, \
2676 }
2677
403d1944
MP
2678#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2679 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2680 .name = xname, \
2681 .index = 0, \
2682 .info = stac92xx_io_switch_info, \
2683 .get = stac92xx_io_switch_get, \
2684 .put = stac92xx_io_switch_put, \
2685 .private_value = xpval, \
2686 }
2687
0fb87bb4
ML
2688#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2689 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2690 .name = xname, \
2691 .index = 0, \
2692 .info = stac92xx_clfe_switch_info, \
2693 .get = stac92xx_clfe_switch_get, \
2694 .put = stac92xx_clfe_switch_put, \
2695 .private_value = xpval, \
2696 }
403d1944 2697
c7d4b2fa
M
2698enum {
2699 STAC_CTL_WIDGET_VOL,
2700 STAC_CTL_WIDGET_MUTE,
123c07ae 2701 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2702 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2703 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2704 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL
2705 STAC_CTL_WIDGET_CLFE_SWITCH,
2706 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M
2707};
2708
c8b6bf9b 2709static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2710 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2711 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2712 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2713 STAC_MONO_MUX,
7c2ba97b 2714 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2715 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2716 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2717 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M
2718};
2719
2720/* add dynamic controls */
e3c75964
TI
2721static struct snd_kcontrol_new *
2722stac_control_new(struct sigmatel_spec *spec,
2723 struct snd_kcontrol_new *ktemp,
4d02d1b6 2724 const char *name,
5e26dfd0 2725 unsigned int subdev)
c7d4b2fa 2726{
c8b6bf9b 2727 struct snd_kcontrol_new *knew;
c7d4b2fa 2728
603c4019
TI
2729 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2730 knew = snd_array_new(&spec->kctls);
2731 if (!knew)
e3c75964 2732 return NULL;
4d4e9bb3 2733 *knew = *ktemp;
82fe0c58 2734 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI
2735 if (!knew->name) {
2736 /* roolback */
2737 memset(knew, 0, sizeof(*knew));
2738 spec->kctls.alloced--;
2739 return NULL;
2740 }
5e26dfd0 2741 knew->subdevice = subdev;
e3c75964
TI
2742 return knew;
2743}
2744
2745static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2746 struct snd_kcontrol_new *ktemp,
2747 int idx, const char *name,
2748 unsigned long val)
2749{
4d02d1b6 2750 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2751 HDA_SUBDEV_AMP_FLAG);
e3c75964 2752 if (!knew)
c7d4b2fa 2753 return -ENOMEM;
e3c75964 2754 knew->index = idx;
c7d4b2fa 2755 knew->private_value = val;
c7d4b2fa
M
2756 return 0;
2757}
2758
4d4e9bb3
TI
2759static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2760 int type, int idx, const char *name,
2761 unsigned long val)
2762{
2763 return stac92xx_add_control_temp(spec,
2764 &stac92xx_control_templates[type],
2765 idx, name, val);
2766}
2767
4682eee0
MR
2768
2769/* add dynamic controls */
4d4e9bb3
TI
2770static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2771 const char *name, unsigned long val)
4682eee0
MR
2772{
2773 return stac92xx_add_control_idx(spec, type, 0, name, val);
2774}
2775
e3c75964
TI
2776static struct snd_kcontrol_new stac_input_src_temp = {
2777 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2778 .name = "Input Source",
2779 .info = stac92xx_mux_enum_info,
2780 .get = stac92xx_mux_enum_get,
2781 .put = stac92xx_mux_enum_put,
2782};
2783
7c922de7
NL
2784static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2785 hda_nid_t nid, int idx)
2786{
2787 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2788 int control = 0;
2789 struct sigmatel_spec *spec = codec->spec;
2790 char name[22];
2791
99ae28be 2792 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
7c922de7
NL
2793 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2794 && nid == spec->line_switch)
2795 control = STAC_CTL_WIDGET_IO_SWITCH;
2796 else if (snd_hda_query_pin_caps(codec, nid)
2797 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2798 control = STAC_CTL_WIDGET_DC_BIAS;
2799 else if (nid == spec->mic_switch)
2800 control = STAC_CTL_WIDGET_IO_SWITCH;
2801 }
2802
2803 if (control) {
10a20af7 2804 strcpy(name, hda_get_input_pin_label(codec, nid, 1));
7c922de7
NL
2805 return stac92xx_add_control(codec->spec, control,
2806 strcat(name, " Jack Mode"), nid);
2807 }
2808
2809 return 0;
2810}
2811
e3c75964
TI
2812static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2813{
2814 struct snd_kcontrol_new *knew;
2815 struct hda_input_mux *imux = &spec->private_imux;
2816
3d21d3f7
TI
2817 if (spec->auto_mic)
2818 return 0; /* no need for input source */
e3c75964
TI
2819 if (!spec->num_adcs || imux->num_items <= 1)
2820 return 0; /* no need for input source control */
2821 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2822 stac_input_src_temp.name, 0);
e3c75964
TI
2823 if (!knew)
2824 return -ENOMEM;
2825 knew->count = spec->num_adcs;
2826 return 0;
2827}
2828
c21ca4a8
TI
2829/* check whether the line-input can be used as line-out */
2830static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2831{
2832 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2833 struct auto_pin_cfg *cfg = &spec->autocfg;
2834 hda_nid_t nid;
2835 unsigned int pincap;
eea7dc93 2836 int i;
8e9068b1 2837
c21ca4a8
TI
2838 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2839 return 0;
eea7dc93 2840 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 2841 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI
2842 nid = cfg->inputs[i].pin;
2843 pincap = snd_hda_query_pin_caps(codec, nid);
2844 if (pincap & AC_PINCAP_OUT)
2845 return nid;
2846 }
2847 }
c21ca4a8
TI
2848 return 0;
2849}
403d1944 2850
eea7dc93
TI
2851static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2852
c21ca4a8 2853/* check whether the mic-input can be used as line-out */
eea7dc93 2854static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI
2855{
2856 struct sigmatel_spec *spec = codec->spec;
2857 struct auto_pin_cfg *cfg = &spec->autocfg;
2858 unsigned int def_conf, pincap;
86e2959a 2859 int i;
c21ca4a8 2860
eea7dc93 2861 *dac = 0;
c21ca4a8
TI
2862 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2863 return 0;
eea7dc93
TI
2864 for (i = 0; i < cfg->num_inputs; i++) {
2865 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 2866 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 2867 continue;
330ee995 2868 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI
2869 /* some laptops have an internal analog microphone
2870 * which can't be used as a output */
99ae28be 2871 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 2872 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI
2873 if (pincap & AC_PINCAP_OUT) {
2874 *dac = get_unassigned_dac(codec, nid);
2875 if (*dac)
2876 return nid;
2877 }
403d1944 2878 }
403d1944 2879 }
403d1944
MP
2880 return 0;
2881}
2882
7b043899
SL
2883static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2884{
2885 int i;
2886
2887 for (i = 0; i < spec->multiout.num_dacs; i++) {
2888 if (spec->multiout.dac_nids[i] == nid)
2889 return 1;
2890 }
2891
2892 return 0;
2893}
2894
c21ca4a8
TI
2895static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2896{
2897 int i;
2898 if (is_in_dac_nids(spec, nid))
2899 return 1;
2900 for (i = 0; i < spec->autocfg.hp_outs; i++)
2901 if (spec->hp_dacs[i] == nid)
2902 return 1;
2903 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2904 if (spec->speaker_dacs[i] == nid)
2905 return 1;
2906 return 0;
2907}
2908
2909static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2910{
2911 struct sigmatel_spec *spec = codec->spec;
2912 int j, conn_len;
2913 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2914 unsigned int wcaps, wtype;
2915
2916 conn_len = snd_hda_get_connections(codec, nid, conn,
2917 HDA_MAX_CONNECTIONS);
36706005
CC
2918 /* 92HD88: trace back up the link of nids to find the DAC */
2919 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2920 != AC_WID_AUD_OUT)) {
2921 nid = conn[0];
2922 conn_len = snd_hda_get_connections(codec, nid, conn,
2923 HDA_MAX_CONNECTIONS);
2924 }
c21ca4a8 2925 for (j = 0; j < conn_len; j++) {
14bafe32 2926 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2927 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI
2928 /* we check only analog outputs */
2929 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2930 continue;
2931 /* if this route has a free DAC, assign it */
2932 if (!check_all_dac_nids(spec, conn[j])) {
2933 if (conn_len > 1) {
2934 /* select this DAC in the pin's input mux */
2935 snd_hda_codec_write_cache(codec, nid, 0,
2936 AC_VERB_SET_CONNECT_SEL, j);
2937 }
2938 return conn[j];
2939 }
2940 }
ee58a7ca
TI
2941 /* if all DACs are already assigned, connect to the primary DAC */
2942 if (conn_len > 1) {
2943 for (j = 0; j < conn_len; j++) {
2944 if (conn[j] == spec->multiout.dac_nids[0]) {
2945 snd_hda_codec_write_cache(codec, nid, 0,
2946 AC_VERB_SET_CONNECT_SEL, j);
2947 break;
2948 }
2949 }
2950 }
c21ca4a8
TI
2951 return 0;
2952}
2953
2954static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2955static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2956
3cc08dc6 2957/*
7b043899
SL
2958 * Fill in the dac_nids table from the parsed pin configuration
2959 * This function only works when every pin in line_out_pins[]
2960 * contains atleast one DAC in its connection list. Some 92xx
2961 * codecs are not connected directly to a DAC, such as the 9200
2962 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2963 */
c21ca4a8 2964static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2965{
2966 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2967 struct auto_pin_cfg *cfg = &spec->autocfg;
2968 int i;
2969 hda_nid_t nid, dac;
7b043899 2970
c7d4b2fa
M
2971 for (i = 0; i < cfg->line_outs; i++) {
2972 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2973 dac = get_unassigned_dac(codec, nid);
2974 if (!dac) {
df802952
TI
2975 if (spec->multiout.num_dacs > 0) {
2976 /* we have already working output pins,
2977 * so let's drop the broken ones again
2978 */
2979 cfg->line_outs = spec->multiout.num_dacs;
2980 break;
2981 }
7b043899
SL
2982 /* error out, no available DAC found */
2983 snd_printk(KERN_ERR
2984 "%s: No available DAC for pin 0x%x\n",
2985 __func__, nid);
2986 return -ENODEV;
2987 }
c21ca4a8
TI
2988 add_spec_dacs(spec, dac);
2989 }
7b043899 2990
139e071b
TI
2991 for (i = 0; i < cfg->hp_outs; i++) {
2992 nid = cfg->hp_pins[i];
2993 dac = get_unassigned_dac(codec, nid);
2994 if (dac) {
2995 if (!spec->multiout.hp_nid)
2996 spec->multiout.hp_nid = dac;
2997 else
2998 add_spec_extra_dacs(spec, dac);
2999 }
3000 spec->hp_dacs[i] = dac;
3001 }
3002
3003 for (i = 0; i < cfg->speaker_outs; i++) {
3004 nid = cfg->speaker_pins[i];
3005 dac = get_unassigned_dac(codec, nid);
3006 if (dac)
3007 add_spec_extra_dacs(spec, dac);
3008 spec->speaker_dacs[i] = dac;
3009 }
3010
c21ca4a8
TI
3011 /* add line-in as output */
3012 nid = check_line_out_switch(codec);
3013 if (nid) {
3014 dac = get_unassigned_dac(codec, nid);
3015 if (dac) {
3016 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3017 nid, cfg->line_outs);
3018 cfg->line_out_pins[cfg->line_outs] = nid;
3019 cfg->line_outs++;
3020 spec->line_switch = nid;
3021 add_spec_dacs(spec, dac);
3022 }
3023 }
3024 /* add mic as output */
eea7dc93
TI
3025 nid = check_mic_out_switch(codec, &dac);
3026 if (nid && dac) {
3027 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3028 nid, cfg->line_outs);
3029 cfg->line_out_pins[cfg->line_outs] = nid;
3030 cfg->line_outs++;
3031 spec->mic_switch = nid;
3032 add_spec_dacs(spec, dac);
c21ca4a8 3033 }
c7d4b2fa 3034
c21ca4a8 3035 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
3036 spec->multiout.num_dacs,
3037 spec->multiout.dac_nids[0],
3038 spec->multiout.dac_nids[1],
3039 spec->multiout.dac_nids[2],
3040 spec->multiout.dac_nids[3],
3041 spec->multiout.dac_nids[4]);
c21ca4a8 3042
c7d4b2fa
M
3043 return 0;
3044}
3045
eb06ed8f 3046/* create volume control/switch for the given prefx type */
668b9652
TI
3047static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3048 int idx, hda_nid_t nid, int chs)
eb06ed8f 3049{
7c7767eb 3050 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI
3051 char name[32];
3052 int err;
3053
7c7767eb
TI
3054 if (!spec->check_volume_offset) {
3055 unsigned int caps, step, nums, db_scale;
3056 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3057 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3058 AC_AMPCAP_STEP_SIZE_SHIFT;
3059 step = (step + 1) * 25; /* in .01dB unit */
3060 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3061 AC_AMPCAP_NUM_STEPS_SHIFT;
3062 db_scale = nums * step;
3063 /* if dB scale is over -64dB, and finer enough,
3064 * let's reduce it to half
3065 */
3066 if (db_scale > 6400 && nums >= 0x1f)
3067 spec->volume_offset = nums / 2;
3068 spec->check_volume_offset = 1;
3069 }
3070
eb06ed8f 3071 sprintf(name, "%s Playback Volume", pfx);
668b9652 3072 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI
3073 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3074 spec->volume_offset));
eb06ed8f
TI
3075 if (err < 0)
3076 return err;
3077 sprintf(name, "%s Playback Switch", pfx);
668b9652 3078 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI
3079 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3080 if (err < 0)
3081 return err;
3082 return 0;
3083}
3084
668b9652
TI
3085#define create_controls(codec, pfx, nid, chs) \
3086 create_controls_idx(codec, pfx, 0, nid, chs)
3087
ae0afd81
MR
3088static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3089{
c21ca4a8 3090 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
3091 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3092 return 1;
3093 } else {
3094 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3095 spec->multiout.num_dacs++;
3096 }
3097 return 0;
3098}
3099
c21ca4a8 3100static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3101{
c21ca4a8
TI
3102 int i;
3103 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3104 if (!spec->multiout.extra_out_nid[i]) {
3105 spec->multiout.extra_out_nid[i] = nid;
3106 return 0;
3107 }
3108 }
3109 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3110 return 1;
ae0afd81
MR
3111}
3112
dc04d1b4
TI
3113/* Create output controls
3114 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3115 */
3116static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3117 const hda_nid_t *pins,
3118 const hda_nid_t *dac_nids,
3119 int type)
c7d4b2fa 3120{
76624534 3121 struct sigmatel_spec *spec = codec->spec;
ea734963 3122 static const char * const chname[4] = {
19039bd0
TI
3123 "Front", "Surround", NULL /*CLFE*/, "Side"
3124 };
dc04d1b4 3125 hda_nid_t nid;
91589232
TI
3126 int i, err;
3127 unsigned int wid_caps;
0fb87bb4 3128
dc04d1b4 3129 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c
TI
3130 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
3131 wid_caps = get_wcaps(codec, pins[i]);
3132 if (wid_caps & AC_WCAP_UNSOL_CAP)
3133 spec->hp_detect = 1;
3134 }
dc04d1b4
TI
3135 nid = dac_nids[i];
3136 if (!nid)
3137 continue;
3138 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3139 /* Center/LFE */
7c7767eb 3140 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3141 if (err < 0)
c7d4b2fa 3142 return err;
7c7767eb 3143 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3144 if (err < 0)
c7d4b2fa 3145 return err;
0fb87bb4
ML
3146
3147 wid_caps = get_wcaps(codec, nid);
3148
3149 if (wid_caps & AC_WCAP_LR_SWAP) {
3150 err = stac92xx_add_control(spec,
3151 STAC_CTL_WIDGET_CLFE_SWITCH,
3152 "Swap Center/LFE Playback Switch", nid);
3153
3154 if (err < 0)
3155 return err;
3156 }
3157
c7d4b2fa 3158 } else {
dc04d1b4 3159 const char *name;
668b9652 3160 int idx;
dc04d1b4
TI
3161 switch (type) {
3162 case AUTO_PIN_HP_OUT:
668b9652
TI
3163 name = "Headphone";
3164 idx = i;
dc04d1b4
TI
3165 break;
3166 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI
3167 name = "Speaker";
3168 idx = i;
dc04d1b4
TI
3169 break;
3170 default:
3171 name = chname[i];
668b9652 3172 idx = 0;
dc04d1b4 3173 break;
76624534 3174 }
668b9652 3175 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3176 if (err < 0)
c7d4b2fa
M
3177 return err;
3178 }
3179 }
dc04d1b4
TI
3180 return 0;
3181}
3182
6479c631
TI
3183static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3184 unsigned long sw, int idx)
3185{
3186 int err;
3187 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3188 "Capture Volume", vol);
6479c631
TI
3189 if (err < 0)
3190 return err;
3191 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3192 "Capture Switch", sw);
6479c631
TI
3193 if (err < 0)
3194 return err;
3195 return 0;
3196}
3197
dc04d1b4
TI
3198/* add playback controls from the parsed DAC table */
3199static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3200 const struct auto_pin_cfg *cfg)
3201{
3202 struct sigmatel_spec *spec = codec->spec;
7c922de7 3203 hda_nid_t nid;
dc04d1b4 3204 int err;
7c922de7 3205 int idx;
dc04d1b4
TI
3206
3207 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3208 spec->multiout.dac_nids,
3209 cfg->line_out_type);
3210 if (err < 0)
3211 return err;
c7d4b2fa 3212
a9cb5c90 3213 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3214 err = stac92xx_add_control(spec,
3215 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3216 "Headphone as Line Out Switch",
3217 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3218 if (err < 0)
3219 return err;
3220 }
3221
eea7dc93 3222 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3223 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI
3224 break;
3225 nid = cfg->inputs[idx].pin;
3226 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3227 if (err < 0)
3228 return err;
b5895dc8 3229 }
403d1944 3230
c7d4b2fa
M
3231 return 0;
3232}
3233
eb06ed8f
TI
3234/* add playback controls for Speaker and HP outputs */
3235static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3236 struct auto_pin_cfg *cfg)
3237{
3238 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI
3239 int err;
3240
3241 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3242 spec->hp_dacs, AUTO_PIN_HP_OUT);
3243 if (err < 0)
3244 return err;
3245
3246 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3247 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3248 if (err < 0)
3249 return err;
eb06ed8f 3250
c7d4b2fa
M
3251 return 0;
3252}
3253
b22b4821 3254/* labels for mono mux outputs */
ea734963 3255static const char * const stac92xx_mono_labels[4] = {
d0513fc6 3256 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3257};
3258
3259/* create mono mux for mono out on capable codecs */
3260static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3261{
3262 struct sigmatel_spec *spec = codec->spec;
3263 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3264 int i, num_cons;
3265 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3266
3267 num_cons = snd_hda_get_connections(codec,
3268 spec->mono_nid,
3269 con_lst,
3270 HDA_MAX_NUM_INPUTS);
16a433d8 3271 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR
3272 return -EINVAL;
3273
10a20af7
TI
3274 for (i = 0; i < num_cons; i++)
3275 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3276 NULL);
09a99959
MR
3277
3278 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3279 "Mono Mux", spec->mono_nid);
b22b4821
MR
3280}
3281
1cd2224c
MR
3282/* create PC beep volume controls */
3283static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3284 hda_nid_t nid)
3285{
3286 struct sigmatel_spec *spec = codec->spec;
3287 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK
3288 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3289
3290 if (spec->anabeep_nid == nid)
3291 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR
3292
3293 /* check for mute support for the the amp */
3294 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3295 err = stac92xx_add_control(spec, type,
d355c82a 3296 "Beep Playback Switch",
1cd2224c
MR
3297 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3298 if (err < 0)
3299 return err;
3300 }
3301
3302 /* check to see if there is volume support for the amp */
3303 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3304 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3305 "Beep Playback Volume",
1cd2224c
MR
3306 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3307 if (err < 0)
3308 return err;
3309 }
3310 return 0;
3311}
3312
4d4e9bb3
TI
3313#ifdef CONFIG_SND_HDA_INPUT_BEEP
3314#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3315
3316static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3317 struct snd_ctl_elem_value *ucontrol)
3318{
3319 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3320 ucontrol->value.integer.value[0] = codec->beep->enabled;
3321 return 0;
3322}
3323
3324static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3325 struct snd_ctl_elem_value *ucontrol)
3326{
3327 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3328 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI
3329}
3330
3331static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3332 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3333 .info = stac92xx_dig_beep_switch_info,
3334 .get = stac92xx_dig_beep_switch_get,
3335 .put = stac92xx_dig_beep_switch_put,
3336};
3337
3338static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3339{
3340 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3341 0, "Beep Playback Switch", 0);
4d4e9bb3
TI
3342}
3343#endif
3344
4682eee0
MR
3345static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3346{
3347 struct sigmatel_spec *spec = codec->spec;
667067d8 3348 int i, j, err = 0;
4682eee0
MR
3349
3350 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI
3351 hda_nid_t nid;
3352 unsigned int wcaps;
3353 unsigned long val;
3354
4682eee0
MR
3355 nid = spec->mux_nids[i];
3356 wcaps = get_wcaps(codec, nid);
667067d8
TI
3357 if (!(wcaps & AC_WCAP_OUT_AMP))
3358 continue;
4682eee0 3359
667067d8
TI
3360 /* check whether already the same control was created as
3361 * normal Capture Volume.
3362 */
3363 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3364 for (j = 0; j < spec->num_caps; j++) {
3365 if (spec->capvols[j] == val)
3366 break;
4682eee0 3367 }
667067d8
TI
3368 if (j < spec->num_caps)
3369 continue;
3370
3371 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3372 "Mux Capture Volume", val);
3373 if (err < 0)
3374 return err;
4682eee0
MR
3375 }
3376 return 0;
3377};
3378
ea734963 3379static const char * const stac92xx_spdif_labels[3] = {
65973632 3380 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3381};
3382
3383static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3384{
3385 struct sigmatel_spec *spec = codec->spec;
3386 struct hda_input_mux *spdif_mux = &spec->private_smux;
ea734963 3387 const char * const *labels = spec->spdif_labels;
d9737751 3388 int i, num_cons;
65973632 3389 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3390
3391 num_cons = snd_hda_get_connections(codec,
3392 spec->smux_nids[0],
3393 con_lst,
3394 HDA_MAX_NUM_INPUTS);
16a433d8 3395 if (num_cons <= 0)
d9737751
MR
3396 return -EINVAL;
3397
65973632
MR
3398 if (!labels)
3399 labels = stac92xx_spdif_labels;
3400
10a20af7
TI
3401 for (i = 0; i < num_cons; i++)
3402 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR
3403
3404 return 0;
3405}
3406
8b65727b 3407/* labels for dmic mux inputs */
ea734963 3408static const char * const stac92xx_dmic_labels[5] = {
8b65727b
MP
3409 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3410 "Digital Mic 3", "Digital Mic 4"
3411};
3412
3d21d3f7
TI
3413static int get_connection_index(struct hda_codec *codec, hda_nid_t mux,
3414 hda_nid_t nid)
3415{
3416 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3417 int i, nums;
3418
3419 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3420 for (i = 0; i < nums; i++)
3421 if (conn[i] == nid)
3422 return i;
3423 return -1;
3424}
3425
667067d8 3426/* create a volume assigned to the given pin (only if supported) */
96f845de 3427/* return 1 if the volume control is created */
667067d8 3428static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3429 const char *label, int idx, int direction)
667067d8
TI
3430{
3431 unsigned int caps, nums;
3432 char name[32];
96f845de 3433 int err;
667067d8 3434
96f845de
TI
3435 if (direction == HDA_OUTPUT)
3436 caps = AC_WCAP_OUT_AMP;
3437 else
3438 caps = AC_WCAP_IN_AMP;
3439 if (!(get_wcaps(codec, nid) & caps))
667067d8 3440 return 0;
96f845de 3441 caps = query_amp_caps(codec, nid, direction);
667067d8
TI
3442 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3443 if (!nums)
3444 return 0;
3445 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI
3446 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3447 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI
3448 if (err < 0)
3449 return err;
3450 return 1;
667067d8
TI
3451}
3452
8b65727b
MP
3453/* create playback/capture controls for input pins on dmic capable codecs */
3454static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3455 const struct auto_pin_cfg *cfg)
3456{
3457 struct sigmatel_spec *spec = codec->spec;
5207e10e 3458 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3459 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3460 int err, i;
5207e10e 3461 unsigned int def_conf;
8b65727b 3462
10a20af7 3463 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3464
8b65727b 3465 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3466 hda_nid_t nid;
10a20af7 3467 int index, type_idx;
5207e10e 3468 const char *label;
8b65727b 3469
667067d8
TI
3470 nid = spec->dmic_nids[i];
3471 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3472 continue;
3473 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP
3474 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3475 continue;
3476
3d21d3f7
TI
3477 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3478 if (index < 0)
3479 continue;
3480
10a20af7
TI
3481 label = hda_get_input_pin_label(codec, nid, 1);
3482 snd_hda_add_imux_item(dimux, label, index, &type_idx);
2d7ec12b
TI
3483 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1)
3484 snd_hda_add_imux_item(imux, label, index, &type_idx);
5207e10e 3485
10a20af7
TI
3486 err = create_elem_capture_vol(codec, nid, label, type_idx,
3487 HDA_INPUT);
667067d8
TI
3488 if (err < 0)
3489 return err;
96f845de
TI
3490 if (!err) {
3491 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3492 type_idx, HDA_OUTPUT);
96f845de
TI
3493 if (err < 0)
3494 return err;
3495 }
8b65727b
MP
3496 }
3497
3498 return 0;
3499}
3500
3d21d3f7 3501static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3502 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI
3503{
3504 unsigned int cfg;
3505
3506 if (!nid)
3507 return 0;
3508 cfg = snd_hda_codec_get_pincfg(codec, nid);
99ae28be
TI
3509 switch (snd_hda_get_input_pin_attr(cfg)) {
3510 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI
3511 if (*fixed)
3512 return 1; /* already occupied */
3513 *fixed = nid;
3514 break;
99ae28be
TI
3515 case INPUT_PIN_ATTR_UNUSED:
3516 break;
3517 case INPUT_PIN_ATTR_DOCK:
3518 if (*dock)
3519 return 1; /* already occupied */
3520 *dock = nid;
3521 break;
3522 default:
3d21d3f7
TI
3523 if (*ext)
3524 return 1; /* already occupied */
3525 *ext = nid;
3526 break;
3527 }
3528 return 0;
3529}
3530
3531static int set_mic_route(struct hda_codec *codec,
3532 struct sigmatel_mic_route *mic,
3533 hda_nid_t pin)
3534{
3535 struct sigmatel_spec *spec = codec->spec;
3536 struct auto_pin_cfg *cfg = &spec->autocfg;
3537 int i;
3538
3539 mic->pin = pin;
9907790a
CC
3540 if (pin == 0)
3541 return 0;
eea7dc93
TI
3542 for (i = 0; i < cfg->num_inputs; i++) {
3543 if (pin == cfg->inputs[i].pin)
3d21d3f7 3544 break;
eea7dc93 3545 }
86e2959a 3546 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3547 /* analog pin */
3d21d3f7
TI
3548 i = get_connection_index(codec, spec->mux_nids[0], pin);
3549 if (i < 0)
3550 return -1;
3551 mic->mux_idx = i;
02d33322
TI
3552 mic->dmux_idx = -1;
3553 if (spec->dmux_nids)
3554 mic->dmux_idx = get_connection_index(codec,
3555 spec->dmux_nids[0],
3556 spec->mux_nids[0]);
da2a2aaa 3557 } else if (spec->dmux_nids) {
3d21d3f7 3558 /* digital pin */
3d21d3f7
TI
3559 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3560 if (i < 0)
3561 return -1;
3562 mic->dmux_idx = i;
02d33322
TI
3563 mic->mux_idx = -1;
3564 if (spec->mux_nids)
3565 mic->mux_idx = get_connection_index(codec,
3566 spec->mux_nids[0],
3567 spec->dmux_nids[0]);
3d21d3f7
TI
3568 }
3569 return 0;
3570}
3571
3572/* return non-zero if the device is for automatic mic switch */
3573static int stac_check_auto_mic(struct hda_codec *codec)
3574{
3575 struct sigmatel_spec *spec = codec->spec;
3576 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3577 hda_nid_t fixed, ext, dock;
3d21d3f7
TI
3578 int i;
3579
eea7dc93 3580 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 3581 if (cfg->inputs[i].type >= AUTO_PIN_LINE_IN)
3d21d3f7
TI
3582 return 0; /* must be exclusively mics */
3583 }
9907790a 3584 fixed = ext = dock = 0;
eea7dc93 3585 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC
3586 if (check_mic_pin(codec, cfg->inputs[i].pin,
3587 &fixed, &ext, &dock))
3d21d3f7
TI
3588 return 0;
3589 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC
3590 if (check_mic_pin(codec, spec->dmic_nids[i],
3591 &fixed, &ext, &dock))
3d21d3f7 3592 return 0;
80c67852 3593 if (!fixed || (!ext && !dock))
9907790a 3594 return 0; /* no input to switch */
3d21d3f7
TI
3595 if (!(get_wcaps(codec, ext) & AC_WCAP_UNSOL_CAP))
3596 return 0; /* no unsol support */
3597 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC
3598 set_mic_route(codec, &spec->int_mic, fixed) ||
3599 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI
3600 return 0; /* something is wrong */
3601 return 1;
3602}
3603
c7d4b2fa
M
3604/* create playback/capture controls for input pins */
3605static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3606{
3607 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3608 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3609 int i, j;
263d0328 3610 const char *label;
c7d4b2fa 3611
eea7dc93
TI
3612 for (i = 0; i < cfg->num_inputs; i++) {
3613 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3614 int index, err, type_idx;
314634bc 3615
314634bc
TI
3616 index = -1;
3617 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI
3618 index = get_connection_index(codec, spec->mux_nids[j],
3619 nid);
3620 if (index >= 0)
3621 break;
c7d4b2fa 3622 }
667067d8
TI
3623 if (index < 0)
3624 continue;
3625
10a20af7
TI
3626 label = hda_get_autocfg_input_label(codec, cfg, i);
3627 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3628
667067d8 3629 err = create_elem_capture_vol(codec, nid,
263d0328 3630 label, type_idx,
96f845de 3631 HDA_INPUT);
667067d8
TI
3632 if (err < 0)
3633 return err;
c7d4b2fa 3634 }
5207e10e 3635 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3636
7b043899 3637 if (imux->num_items) {
62fe78e9
SR
3638 /*
3639 * Set the current input for the muxes.
3640 * The STAC9221 has two input muxes with identical source
3641 * NID lists. Hopefully this won't get confused.
3642 */
3643 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3644 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3645 AC_VERB_SET_CONNECT_SEL,
3646 imux->items[0].index);
62fe78e9
SR
3647 }
3648 }
3649
c7d4b2fa
M
3650 return 0;
3651}
3652
c7d4b2fa
M
3653static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3654{
3655 struct sigmatel_spec *spec = codec->spec;
3656 int i;
3657
3658 for (i = 0; i < spec->autocfg.line_outs; i++) {
3659 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3660 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3661 }
3662}
3663
3664static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3665{
3666 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3667 int i;
c7d4b2fa 3668
eb06ed8f
TI
3669 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3670 hda_nid_t pin;
3671 pin = spec->autocfg.hp_pins[i];
3672 if (pin) /* connect to front */
3673 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3674 }
3675 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3676 hda_nid_t pin;
3677 pin = spec->autocfg.speaker_pins[i];
3678 if (pin) /* connect to front */
3679 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3680 }
c7d4b2fa
M
3681}
3682
8af3aeb4
TI
3683static int is_dual_headphones(struct hda_codec *codec)
3684{
3685 struct sigmatel_spec *spec = codec->spec;
3686 int i, valid_hps;
3687
3688 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3689 spec->autocfg.hp_outs <= 1)
3690 return 0;
3691 valid_hps = 0;
3692 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3693 hda_nid_t nid = spec->autocfg.hp_pins[i];
3694 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3695 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3696 continue;
3697 valid_hps++;
3698 }
3699 return (valid_hps > 1);
3700}
3701
3702
3cc08dc6 3703static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3704{
3705 struct sigmatel_spec *spec = codec->spec;
dc04d1b4 3706 int hp_swap = 0;
6479c631 3707 int i, err;
c7d4b2fa 3708
8b65727b
MP
3709 if ((err = snd_hda_parse_pin_def_config(codec,
3710 &spec->autocfg,
3711 spec->dmic_nids)) < 0)
c7d4b2fa 3712 return err;
82bc955f 3713 if (! spec->autocfg.line_outs)
869264c4 3714 return 0; /* can't find valid pin config */
19039bd0 3715
bcecd9bd
JZ
3716 /* If we have no real line-out pin and multiple hp-outs, HPs should
3717 * be set up as multi-channel outputs.
3718 */
8af3aeb4 3719 if (is_dual_headphones(codec)) {
bcecd9bd
JZ
3720 /* Copy hp_outs to line_outs, backup line_outs in
3721 * speaker_outs so that the following routines can handle
3722 * HP pins as primary outputs.
3723 */
c21ca4a8 3724 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3725 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3726 sizeof(spec->autocfg.line_out_pins));
3727 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3728 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3729 sizeof(spec->autocfg.hp_pins));
3730 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3731 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3732 spec->autocfg.hp_outs = 0;
dc04d1b4 3733 hp_swap = 1;
bcecd9bd 3734 }
09a99959 3735 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3736 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3737 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3738 u32 caps = query_amp_caps(codec,
3739 spec->autocfg.mono_out_pin, dir);
3740 hda_nid_t conn_list[1];
3741
3742 /* get the mixer node and then the mono mux if it exists */
3743 if (snd_hda_get_connections(codec,
3744 spec->autocfg.mono_out_pin, conn_list, 1) &&
3745 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3746 conn_list, 1) > 0) {
09a99959
MR
3747
3748 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3749 int wid_type = get_wcaps_type(wcaps);
09a99959
MR
3750 /* LR swap check, some stac925x have a mux that
3751 * changes the DACs output path instead of the
3752 * mono-mux path.
3753 */
3754 if (wid_type == AC_WID_AUD_SEL &&
3755 !(wcaps & AC_WCAP_LR_SWAP))
3756 spec->mono_nid = conn_list[0];
3757 }
d0513fc6
MR
3758 if (dir) {
3759 hda_nid_t nid = spec->autocfg.mono_out_pin;
3760
3761 /* most mono outs have a least a mute/unmute switch */
3762 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3763 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3764 "Mono Playback Switch",
3765 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3766 if (err < 0)
3767 return err;
d0513fc6
MR
3768 /* check for volume support for the amp */
3769 if ((caps & AC_AMPCAP_NUM_STEPS)
3770 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3771 err = stac92xx_add_control(spec,
3772 STAC_CTL_WIDGET_VOL,
3773 "Mono Playback Volume",
3774 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3775 if (err < 0)
3776 return err;
3777 }
09a99959
MR
3778 }
3779
3780 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3781 AC_PINCTL_OUT_EN);
3782 }
bcecd9bd 3783
c21ca4a8
TI
3784 if (!spec->multiout.num_dacs) {
3785 err = stac92xx_auto_fill_dac_nids(codec);
3786 if (err < 0)
19039bd0 3787 return err;
c9280d68
TI
3788 err = stac92xx_auto_create_multi_out_ctls(codec,
3789 &spec->autocfg);
3790 if (err < 0)
3791 return err;
c21ca4a8 3792 }
c7d4b2fa 3793
1cd2224c
MR
3794 /* setup analog beep controls */
3795 if (spec->anabeep_nid > 0) {
3796 err = stac92xx_auto_create_beep_ctls(codec,
3797 spec->anabeep_nid);
3798 if (err < 0)
3799 return err;
3800 }
3801
3802 /* setup digital beep controls and input device */
3803#ifdef CONFIG_SND_HDA_INPUT_BEEP
3804 if (spec->digbeep_nid > 0) {
3805 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3806 unsigned int caps;
1cd2224c
MR
3807
3808 err = stac92xx_auto_create_beep_ctls(codec, nid);
3809 if (err < 0)
3810 return err;
3811 err = snd_hda_attach_beep_device(codec, nid);
3812 if (err < 0)
3813 return err;
d8d881dd
TI
3814 if (codec->beep) {
3815 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3816 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI
3817 /* if no beep switch is available, make its own one */
3818 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3819 if (!(caps & AC_AMPCAP_MUTE)) {
3820 err = stac92xx_beep_switch_ctl(codec);
3821 if (err < 0)
3822 return err;
3823 }
4d4e9bb3 3824 }
1cd2224c
MR
3825 }
3826#endif
3827
0fb87bb4 3828 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML
3829 if (err < 0)
3830 return err;
3831
dc04d1b4
TI
3832 /* All output parsing done, now restore the swapped hp pins */
3833 if (hp_swap) {
3834 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3835 sizeof(spec->autocfg.hp_pins));
3836 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3837 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3838 spec->autocfg.line_outs = 0;
3839 }
0fb87bb4 3840
3d21d3f7
TI
3841 if (stac_check_auto_mic(codec)) {
3842 spec->auto_mic = 1;
3843 /* only one capture for auto-mic */
3844 spec->num_adcs = 1;
3845 spec->num_caps = 1;
3846 spec->num_muxes = 1;
3847 }
3848
6479c631
TI
3849 for (i = 0; i < spec->num_caps; i++) {
3850 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3851 spec->capsws[i], i);
3852 if (err < 0)
3853 return err;
3854 }
3855
dc04d1b4 3856 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3857 if (err < 0)
c7d4b2fa
M
3858 return err;
3859
b22b4821
MR
3860 if (spec->mono_nid > 0) {
3861 err = stac92xx_auto_create_mono_output_ctls(codec);
3862 if (err < 0)
3863 return err;
3864 }
2a9c7816 3865 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3866 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3867 &spec->autocfg)) < 0)
3868 return err;
4682eee0
MR
3869 if (spec->num_muxes > 0) {
3870 err = stac92xx_auto_create_mux_input_ctls(codec);
3871 if (err < 0)
3872 return err;
3873 }
d9737751
MR
3874 if (spec->num_smuxes > 0) {
3875 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3876 if (err < 0)
3877 return err;
3878 }
8b65727b 3879
e3c75964
TI
3880 err = stac92xx_add_input_source(spec);
3881 if (err < 0)
3882 return err;
3883
c7d4b2fa 3884 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3885 if (spec->multiout.max_channels > 2)
c7d4b2fa 3886 spec->surr_switch = 1;
c7d4b2fa 3887
0852d7a6 3888 if (spec->autocfg.dig_outs)
3cc08dc6 3889 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3890 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3891 spec->dig_in_nid = dig_in;
c7d4b2fa 3892
603c4019
TI
3893 if (spec->kctls.list)
3894 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3895
3896 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3897 if (!spec->dinput_mux)
3898 spec->dinput_mux = &spec->private_dimux;
d9737751 3899 spec->sinput_mux = &spec->private_smux;
b22b4821 3900 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M
3901 return 1;
3902}
3903
82bc955f
TI
3904/* add playback controls for HP output */
3905static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3906 struct auto_pin_cfg *cfg)
3907{
3908 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3909 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3910 unsigned int wid_caps;
3911
3912 if (! pin)
3913 return 0;
3914
3915 wid_caps = get_wcaps(codec, pin);
505cb341 3916 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3917 spec->hp_detect = 1;
82bc955f
TI
3918
3919 return 0;
3920}
3921
160ea0dc
RF
3922/* add playback controls for LFE output */
3923static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3924 struct auto_pin_cfg *cfg)
3925{
3926 struct sigmatel_spec *spec = codec->spec;
3927 int err;
3928 hda_nid_t lfe_pin = 0x0;
3929 int i;
3930
3931 /*
3932 * search speaker outs and line outs for a mono speaker pin
3933 * with an amp. If one is found, add LFE controls
3934 * for it.
3935 */
3936 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3937 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3938 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3939 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3940 if (wcaps == AC_WCAP_OUT_AMP)
3941 /* found a mono speaker with an amp, must be lfe */
3942 lfe_pin = pin;
3943 }
3944
3945 /* if speaker_outs is 0, then speakers may be in line_outs */
3946 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3947 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3948 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3949 unsigned int defcfg;
330ee995 3950 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 3951 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3952 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3953 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3954 if (wcaps == AC_WCAP_OUT_AMP)
3955 /* found a mono speaker with an amp,
3956 must be lfe */
3957 lfe_pin = pin;
3958 }
3959 }
3960 }
3961
3962 if (lfe_pin) {
7c7767eb 3963 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF
3964 if (err < 0)
3965 return err;
3966 }
3967
3968 return 0;
3969}
3970
c7d4b2fa
M
3971static int stac9200_parse_auto_config(struct hda_codec *codec)
3972{
3973 struct sigmatel_spec *spec = codec->spec;
3974 int err;
3975
df694daa 3976 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3977 return err;
3978
3979 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3980 return err;
3981
82bc955f
TI
3982 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3983 return err;
3984
160ea0dc
RF
3985 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3986 return err;
3987
355a0ec4
TI
3988 if (spec->num_muxes > 0) {
3989 err = stac92xx_auto_create_mux_input_ctls(codec);
3990 if (err < 0)
3991 return err;
3992 }
3993
e3c75964
TI
3994 err = stac92xx_add_input_source(spec);
3995 if (err < 0)
3996 return err;
3997
0852d7a6 3998 if (spec->autocfg.dig_outs)
c7d4b2fa 3999 spec->multiout.dig_out_nid = 0x05;
82bc955f 4000 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4001 spec->dig_in_nid = 0x04;
c7d4b2fa 4002
603c4019
TI
4003 if (spec->kctls.list)
4004 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
4005
4006 spec->input_mux = &spec->private_imux;
8b65727b 4007 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
4008
4009 return 1;
4010}
4011
62fe78e9
SR
4012/*
4013 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4014 * funky external mute control using GPIO pins.
4015 */
4016
76e1ddfb 4017static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4018 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
4019{
4020 unsigned int gpiostate, gpiomask, gpiodir;
4021
4022 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4023 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4024 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
4025
4026 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4027 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4028 gpiomask |= mask;
62fe78e9
SR
4029
4030 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4031 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4032 gpiodir |= dir_mask;
62fe78e9 4033
76e1ddfb 4034 /* Configure GPIOx as CMOS */
62fe78e9
SR
4035 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4036
4037 snd_hda_codec_write(codec, codec->afg, 0,
4038 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
4039 snd_hda_codec_read(codec, codec->afg, 0,
4040 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
4041
4042 msleep(1);
4043
76e1ddfb
TI
4044 snd_hda_codec_read(codec, codec->afg, 0,
4045 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
4046}
4047
74aeaabc
MR
4048static int stac92xx_add_jack(struct hda_codec *codec,
4049 hda_nid_t nid, int type)
4050{
8c8145b8 4051#ifdef CONFIG_SND_HDA_INPUT_JACK
330ee995 4052 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc
MR
4053 int connectivity = get_defcfg_connect(def_conf);
4054 char name[32];
95c09099 4055 int err;
74aeaabc
MR
4056
4057 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
4058 return 0;
4059
86de7416 4060 snprintf(name, sizeof(name), "%s at %s %s Jack",
74aeaabc
MR
4061 snd_hda_get_jack_type(def_conf),
4062 snd_hda_get_jack_connectivity(def_conf),
4063 snd_hda_get_jack_location(def_conf));
4064
cd372fb3
TI
4065 err = snd_hda_input_jack_add(codec, nid, type, name);
4066 if (err < 0)
95c09099 4067 return err;
cd372fb3 4068#endif /* CONFIG_SND_HDA_INPUT_JACK */
95c09099 4069 return 0;
74aeaabc
MR
4070}
4071
c6e4c666
TI
4072static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
4073 unsigned char type, int data)
74aeaabc
MR
4074{
4075 struct sigmatel_event *event;
4076
4077 snd_array_init(&spec->events, sizeof(*event), 32);
4078 event = snd_array_new(&spec->events);
4079 if (!event)
4080 return -ENOMEM;
4081 event->nid = nid;
c6e4c666
TI
4082 event->type = type;
4083 event->tag = spec->events.used;
74aeaabc
MR
4084 event->data = data;
4085
c6e4c666 4086 return event->tag;
74aeaabc
MR
4087}
4088
c6e4c666 4089static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
62558ce1 4090 hda_nid_t nid)
74aeaabc
MR
4091{
4092 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4093 struct sigmatel_event *event = spec->events.list;
4094 int i;
4095
4096 for (i = 0; i < spec->events.used; i++, event++) {
62558ce1 4097 if (event->nid == nid)
c6e4c666 4098 return event;
74aeaabc 4099 }
c6e4c666 4100 return NULL;
74aeaabc
MR
4101}
4102
c6e4c666
TI
4103static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
4104 unsigned char tag)
314634bc 4105{
c6e4c666
TI
4106 struct sigmatel_spec *spec = codec->spec;
4107 struct sigmatel_event *event = spec->events.list;
4108 int i;
4109
4110 for (i = 0; i < spec->events.used; i++, event++) {
4111 if (event->tag == tag)
4112 return event;
74aeaabc 4113 }
c6e4c666
TI
4114 return NULL;
4115}
4116
62558ce1
TI
4117/* check if given nid is a valid pin and no other events are assigned
4118 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4119 * Otherwise, returns zero.
4120 */
4121static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4122 unsigned int type)
c6e4c666
TI
4123{
4124 struct sigmatel_event *event;
4125 int tag;
4126
4127 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
62558ce1
TI
4128 return 0;
4129 event = stac_get_event(codec, nid);
4130 if (event) {
4131 if (event->type != type)
4132 return 0;
c6e4c666 4133 tag = event->tag;
62558ce1 4134 } else {
c6e4c666 4135 tag = stac_add_event(codec->spec, nid, type, 0);
62558ce1
TI
4136 if (tag < 0)
4137 return 0;
4138 }
c6e4c666
TI
4139 snd_hda_codec_write_cache(codec, nid, 0,
4140 AC_VERB_SET_UNSOLICITED_ENABLE,
4141 AC_USRSP_EN | tag);
62558ce1 4142 return 1;
314634bc
TI
4143}
4144
a64135a2
MR
4145static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4146{
4147 int i;
4148 for (i = 0; i < cfg->hp_outs; i++)
4149 if (cfg->hp_pins[i] == nid)
4150 return 1; /* nid is a HP-Out */
4151
4152 return 0; /* nid is not a HP-Out */
4153};
4154
b76c850f
MR
4155static void stac92xx_power_down(struct hda_codec *codec)
4156{
4157 struct sigmatel_spec *spec = codec->spec;
4158
4159 /* power down inactive DACs */
4160 hda_nid_t *dac;
4161 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4162 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4163 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
4164 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4165}
4166
f73d3585
TI
4167static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4168 int enable);
4169
014c41fc
TI
4170static inline int get_int_hint(struct hda_codec *codec, const char *key,
4171 int *valp)
4172{
4173 const char *p;
4174 p = snd_hda_get_hint(codec, key);
4175 if (p) {
4176 unsigned long val;
4177 if (!strict_strtoul(p, 0, &val)) {
4178 *valp = val;
4179 return 1;
4180 }
4181 }
4182 return 0;
4183}
4184
6565e4fa
TI
4185/* override some hints from the hwdep entry */
4186static void stac_store_hints(struct hda_codec *codec)
4187{
4188 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI
4189 int val;
4190
4191 val = snd_hda_get_bool_hint(codec, "hp_detect");
4192 if (val >= 0)
4193 spec->hp_detect = val;
014c41fc 4194 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI
4195 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4196 spec->gpio_mask;
4197 }
014c41fc
TI
4198 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4199 spec->gpio_mask &= spec->gpio_mask;
4200 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4201 spec->gpio_dir &= spec->gpio_mask;
4202 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4203 spec->eapd_mask &= spec->gpio_mask;
4204 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4205 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI
4206 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4207 if (val >= 0)
4208 spec->eapd_switch = val;
014c41fc
TI
4209 get_int_hint(codec, "gpio_led_polarity", &spec->gpio_led_polarity);
4210 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
043958e6
TI
4211 spec->gpio_mask |= spec->gpio_led;
4212 spec->gpio_dir |= spec->gpio_led;
4213 if (spec->gpio_led_polarity)
4214 spec->gpio_data |= spec->gpio_led;
4215 }
6565e4fa
TI
4216}
4217
c7d4b2fa
M
4218static int stac92xx_init(struct hda_codec *codec)
4219{
4220 struct sigmatel_spec *spec = codec->spec;
82bc955f 4221 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4222 unsigned int gpio;
e4973e1e 4223 int i;
c7d4b2fa 4224
c7d4b2fa
M
4225 snd_hda_sequence_write(codec, spec->init);
4226
8daaaa97
MR
4227 /* power down adcs initially */
4228 if (spec->powerdown_adcs)
4229 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4230 snd_hda_codec_write(codec,
8daaaa97
MR
4231 spec->adc_nids[i], 0,
4232 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4233
6565e4fa
TI
4234 /* override some hints */
4235 stac_store_hints(codec);
4236
f73d3585
TI
4237 /* set up GPIO */
4238 gpio = spec->gpio_data;
4239 /* turn on EAPD statically when spec->eapd_switch isn't set.
4240 * otherwise, unsol event will turn it on/off dynamically
4241 */
4242 if (!spec->eapd_switch)
4243 gpio |= spec->eapd_mask;
4244 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4245
82bc955f
TI
4246 /* set up pins */
4247 if (spec->hp_detect) {
505cb341 4248 /* Enable unsolicited responses on the HP widget */
74aeaabc 4249 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4250 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4251 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4252 }
1c4bdf9b
TI
4253 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4254 cfg->speaker_outs > 0) {
fefd67f3 4255 /* enable pin-detect for line-outs as well */
15cfa2b3
TI
4256 for (i = 0; i < cfg->line_outs; i++) {
4257 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI
4258 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4259 }
4260 }
4261
0a07acaf
TI
4262 /* force to enable the first line-out; the others are set up
4263 * in unsol_event
4264 */
4265 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4266 AC_PINCTL_OUT_EN);
82bc955f 4267 /* fake event to set up pins */
5f380eb1
TI
4268 if (cfg->hp_pins[0])
4269 stac_issue_unsol_event(codec, cfg->hp_pins[0]);
4270 else if (cfg->line_out_pins[0])
4271 stac_issue_unsol_event(codec, cfg->line_out_pins[0]);
82bc955f
TI
4272 } else {
4273 stac92xx_auto_init_multi_out(codec);
4274 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
4275 for (i = 0; i < cfg->hp_outs; i++)
4276 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4277 }
3d21d3f7 4278 if (spec->auto_mic) {
15b4f296 4279 /* initialize connection to analog input */
da2a2aaa
TI
4280 if (spec->dmux_nids)
4281 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4282 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI
4283 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4284 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC
4285 if (enable_pin_detect(codec, spec->dock_mic.pin,
4286 STAC_MIC_EVENT))
4287 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4288 }
eea7dc93
TI
4289 for (i = 0; i < cfg->num_inputs; i++) {
4290 hda_nid_t nid = cfg->inputs[i].pin;
4291 int type = cfg->inputs[i].type;
4292 unsigned int pinctl, conf;
86e2959a 4293 if (type == AUTO_PIN_MIC) {
eea7dc93
TI
4294 /* for mic pins, force to initialize */
4295 pinctl = stac92xx_get_default_vref(codec, nid);
4296 pinctl |= AC_PINCTL_IN_EN;
4297 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4298 } else {
4299 pinctl = snd_hda_codec_read(codec, nid, 0,
4300 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4301 /* if PINCTL already set then skip */
4302 /* Also, if both INPUT and OUTPUT are set,
4303 * it must be a BIOS bug; need to override, too
4304 */
4305 if (!(pinctl & AC_PINCTL_IN_EN) ||
4306 (pinctl & AC_PINCTL_OUT_EN)) {
4307 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI
4308 pinctl |= AC_PINCTL_IN_EN;
4309 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4310 }
c960a03b 4311 }
eea7dc93
TI
4312 conf = snd_hda_codec_get_pincfg(codec, nid);
4313 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4314 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4315 stac_issue_unsol_event(codec, nid);
4316 }
82bc955f 4317 }
a64135a2
MR
4318 for (i = 0; i < spec->num_dmics; i++)
4319 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4320 AC_PINCTL_IN_EN);
0852d7a6
TI
4321 if (cfg->dig_out_pins[0])
4322 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI
4323 AC_PINCTL_OUT_EN);
4324 if (cfg->dig_in_pin)
4325 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4326 AC_PINCTL_IN_EN);
a64135a2 4327 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4328 hda_nid_t nid = spec->pwr_nids[i];
4329 int pinctl, def_conf;
f73d3585 4330
eb632128
TI
4331 /* power on when no jack detection is available */
4332 if (!spec->hp_detect) {
4333 stac_toggle_power_map(codec, nid, 1);
4334 continue;
4335 }
4336
4337 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4338 continue; /* already has an unsol event */
4339
4340 pinctl = snd_hda_codec_read(codec, nid, 0,
4341 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4342 /* outputs are only ports capable of power management
4343 * any attempts on powering down a input port cause the
4344 * referenced VREF to act quirky.
4345 */
eb632128
TI
4346 if (pinctl & AC_PINCTL_IN_EN) {
4347 stac_toggle_power_map(codec, nid, 1);
a64135a2 4348 continue;
eb632128 4349 }
330ee995 4350 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4351 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4352 /* skip any ports that don't have jacks since presence
4353 * detection is useless */
f73d3585
TI
4354 if (def_conf != AC_JACK_PORT_COMPLEX) {
4355 if (def_conf != AC_JACK_PORT_NONE)
4356 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4357 continue;
f73d3585 4358 }
62558ce1
TI
4359 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT))
4360 stac_issue_unsol_event(codec, nid);
a64135a2 4361 }
c21bd025 4362
c21bd025 4363 /* sync mute LED */
9e5341b9
TI
4364 if (spec->gpio_led)
4365 hda_call_check_power_status(codec, 0x01);
b76c850f
MR
4366 if (spec->dac_list)
4367 stac92xx_power_down(codec);
c7d4b2fa
M
4368 return 0;
4369}
4370
603c4019
TI
4371static void stac92xx_free_kctls(struct hda_codec *codec)
4372{
4373 struct sigmatel_spec *spec = codec->spec;
4374
4375 if (spec->kctls.list) {
4376 struct snd_kcontrol_new *kctl = spec->kctls.list;
4377 int i;
4378 for (i = 0; i < spec->kctls.used; i++)
4379 kfree(kctl[i].name);
4380 }
4381 snd_array_free(&spec->kctls);
4382}
4383
167eae5a
TI
4384static void stac92xx_shutup(struct hda_codec *codec)
4385{
4386 struct sigmatel_spec *spec = codec->spec;
167eae5a 4387
92ee6162 4388 snd_hda_shutup_pins(codec);
167eae5a
TI
4389
4390 if (spec->eapd_mask)
4391 stac_gpio_set(codec, spec->gpio_mask,
4392 spec->gpio_dir, spec->gpio_data &
4393 ~spec->eapd_mask);
4394}
4395
2f2f4251
M
4396static void stac92xx_free(struct hda_codec *codec)
4397{
c7d4b2fa 4398 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4399
4400 if (! spec)
4401 return;
4402
167eae5a 4403 stac92xx_shutup(codec);
cd372fb3 4404 snd_hda_input_jack_free(codec);
74aeaabc 4405 snd_array_free(&spec->events);
11b44bbd 4406
c7d4b2fa 4407 kfree(spec);
1cd2224c 4408 snd_hda_detach_beep_device(codec);
2f2f4251
M
4409}
4410
4e55096e
M
4411static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4412 unsigned int flag)
4413{
8ce84198
TI
4414 unsigned int old_ctl, pin_ctl;
4415
4416 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4417 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4418
f9acba43
TI
4419 if (pin_ctl & AC_PINCTL_IN_EN) {
4420 /*
4421 * we need to check the current set-up direction of
4422 * shared input pins since they can be switched via
4423 * "xxx as Output" mixer switch
4424 */
4425 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4426 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4427 return;
4428 }
4429
8ce84198 4430 old_ctl = pin_ctl;
7b043899
SL
4431 /* if setting pin direction bits, clear the current
4432 direction bits first */
4433 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4434 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4435
8ce84198
TI
4436 pin_ctl |= flag;
4437 if (old_ctl != pin_ctl)
4438 snd_hda_codec_write_cache(codec, nid, 0,
4439 AC_VERB_SET_PIN_WIDGET_CONTROL,
4440 pin_ctl);
4e55096e
M
4441}
4442
4443static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4444 unsigned int flag)
4445{
4446 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4447 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI
4448 if (pin_ctl & flag)
4449 snd_hda_codec_write_cache(codec, nid, 0,
4450 AC_VERB_SET_PIN_WIDGET_CONTROL,
4451 pin_ctl & ~flag);
4e55096e
M
4452}
4453
d56757ab 4454static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4455{
4456 if (!nid)
4457 return 0;
a252c81a 4458 return snd_hda_jack_detect(codec, nid);
314634bc
TI
4459}
4460
fefd67f3
TI
4461static void stac92xx_line_out_detect(struct hda_codec *codec,
4462 int presence)
4463{
4464 struct sigmatel_spec *spec = codec->spec;
4465 struct auto_pin_cfg *cfg = &spec->autocfg;
4466 int i;
4467
4468 for (i = 0; i < cfg->line_outs; i++) {
4469 if (presence)
4470 break;
4471 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4472 if (presence) {
4473 unsigned int pinctl;
4474 pinctl = snd_hda_codec_read(codec,
4475 cfg->line_out_pins[i], 0,
4476 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4477 if (pinctl & AC_PINCTL_IN_EN)
4478 presence = 0; /* mic- or line-input */
4479 }
4480 }
4481
4482 if (presence) {
4483 /* disable speakers */
4484 for (i = 0; i < cfg->speaker_outs; i++)
4485 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4486 AC_PINCTL_OUT_EN);
4487 if (spec->eapd_mask && spec->eapd_switch)
4488 stac_gpio_set(codec, spec->gpio_mask,
4489 spec->gpio_dir, spec->gpio_data &
4490 ~spec->eapd_mask);
4491 } else {
4492 /* enable speakers */
4493 for (i = 0; i < cfg->speaker_outs; i++)
4494 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4495 AC_PINCTL_OUT_EN);
4496 if (spec->eapd_mask && spec->eapd_switch)
4497 stac_gpio_set(codec, spec->gpio_mask,
4498 spec->gpio_dir, spec->gpio_data |
4499 spec->eapd_mask);
4500 }
4501}
4502
d7a89436
TI
4503/* return non-zero if the hp-pin of the given array index isn't
4504 * a jack-detection target
4505 */
4506static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4507{
4508 struct auto_pin_cfg *cfg = &spec->autocfg;
4509
4510 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4511 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4512 return 1;
c21ca4a8 4513 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4514 return 1;
4515 /* ignore if the pin is set as line-out */
4516 if (cfg->hp_pins[i] == spec->hp_switch)
4517 return 1;
4518 return 0;
4519}
4520
c6e4c666 4521static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4522{
4523 struct sigmatel_spec *spec = codec->spec;
4524 struct auto_pin_cfg *cfg = &spec->autocfg;
4525 int i, presence;
4526
eb06ed8f 4527 presence = 0;
4fe5195c
MR
4528 if (spec->gpio_mute)
4529 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4530 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4531
eb06ed8f 4532 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4533 if (presence)
4534 break;
d7a89436
TI
4535 if (no_hp_sensing(spec, i))
4536 continue;
e6e3ea25
TI
4537 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4538 if (presence) {
4539 unsigned int pinctl;
4540 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4541 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4542 if (pinctl & AC_PINCTL_IN_EN)
4543 presence = 0; /* mic- or line-input */
4544 }
eb06ed8f 4545 }
4e55096e
M
4546
4547 if (presence) {
d7a89436 4548 /* disable lineouts */
7c2ba97b 4549 if (spec->hp_switch)
d7a89436
TI
4550 stac92xx_reset_pinctl(codec, spec->hp_switch,
4551 AC_PINCTL_OUT_EN);
4e55096e
M
4552 for (i = 0; i < cfg->line_outs; i++)
4553 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4554 AC_PINCTL_OUT_EN);
4e55096e 4555 } else {
d7a89436 4556 /* enable lineouts */
7c2ba97b 4557 if (spec->hp_switch)
d7a89436
TI
4558 stac92xx_set_pinctl(codec, spec->hp_switch,
4559 AC_PINCTL_OUT_EN);
4e55096e
M
4560 for (i = 0; i < cfg->line_outs; i++)
4561 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4562 AC_PINCTL_OUT_EN);
4e55096e 4563 }
fefd67f3 4564 stac92xx_line_out_detect(codec, presence);
d7a89436
TI
4565 /* toggle hp outs */
4566 for (i = 0; i < cfg->hp_outs; i++) {
4567 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4568 if (no_hp_sensing(spec, i))
4569 continue;
4570 if (presence)
4571 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4572#if 0 /* FIXME */
4573/* Resetting the pinctl like below may lead to (a sort of) regressions
4574 * on some devices since they use the HP pin actually for line/speaker
4575 * outs although the default pin config shows a different pin (that is
4576 * wrong and useless).
4577 *
4578 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4579 * But, disabling the code below just works around it, and I'm too tired of
4580 * bug reports with such devices...
4581 */
d7a89436
TI
4582 else
4583 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4584#endif /* FIXME */
d7a89436 4585 }
4e55096e
M
4586}
4587
f73d3585
TI
4588static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4589 int enable)
a64135a2
MR
4590{
4591 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4592 unsigned int idx, val;
4593
4594 for (idx = 0; idx < spec->num_pwrs; idx++) {
4595 if (spec->pwr_nids[idx] == nid)
4596 break;
4597 }
4598 if (idx >= spec->num_pwrs)
4599 return;
d0513fc6
MR
4600
4601 /* several codecs have two power down bits */
4602 if (spec->pwr_mapping)
4603 idx = spec->pwr_mapping[idx];
4604 else
4605 idx = 1 << idx;
a64135a2 4606
f73d3585
TI
4607 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4608 if (enable)
a64135a2
MR
4609 val &= ~idx;
4610 else
4611 val |= idx;
4612
4613 /* power down unused output ports */
4614 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4615}
4616
f73d3585
TI
4617static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4618{
e6e3ea25 4619 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4620}
a64135a2 4621
ab5a6ebe
VK
4622/* get the pin connection (fixed, none, etc) */
4623static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4624{
4625 struct sigmatel_spec *spec = codec->spec;
4626 unsigned int cfg;
4627
4628 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4629 return get_defcfg_connect(cfg);
4630}
4631
4632static int stac92xx_connected_ports(struct hda_codec *codec,
4633 hda_nid_t *nids, int num_nids)
4634{
4635 struct sigmatel_spec *spec = codec->spec;
4636 int idx, num;
4637 unsigned int def_conf;
4638
4639 for (num = 0; num < num_nids; num++) {
4640 for (idx = 0; idx < spec->num_pins; idx++)
4641 if (spec->pin_nids[idx] == nids[num])
4642 break;
4643 if (idx >= spec->num_pins)
4644 break;
4645 def_conf = stac_get_defcfg_connect(codec, idx);
4646 if (def_conf == AC_JACK_PORT_NONE)
4647 break;
4648 }
4649 return num;
4650}
4651
3d21d3f7
TI
4652static void stac92xx_mic_detect(struct hda_codec *codec)
4653{
4654 struct sigmatel_spec *spec = codec->spec;
4655 struct sigmatel_mic_route *mic;
4656
4657 if (get_pin_presence(codec, spec->ext_mic.pin))
4658 mic = &spec->ext_mic;
9907790a
CC
4659 else if (get_pin_presence(codec, spec->dock_mic.pin))
4660 mic = &spec->dock_mic;
3d21d3f7
TI
4661 else
4662 mic = &spec->int_mic;
02d33322 4663 if (mic->dmux_idx >= 0)
3d21d3f7
TI
4664 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4665 AC_VERB_SET_CONNECT_SEL,
4666 mic->dmux_idx);
02d33322 4667 if (mic->mux_idx >= 0)
3d21d3f7
TI
4668 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4669 AC_VERB_SET_CONNECT_SEL,
4670 mic->mux_idx);
4671}
4672
62558ce1 4673static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
c6e4c666 4674{
62558ce1 4675 struct sigmatel_event *event = stac_get_event(codec, nid);
c6e4c666
TI
4676 if (!event)
4677 return;
4678 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4679}
4680
314634bc
TI
4681static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4682{
a64135a2 4683 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4684 struct sigmatel_event *event;
4685 int tag, data;
a64135a2 4686
c6e4c666
TI
4687 tag = (res >> 26) & 0x7f;
4688 event = stac_get_event_from_tag(codec, tag);
4689 if (!event)
4690 return;
4691
4692 switch (event->type) {
314634bc 4693 case STAC_HP_EVENT:
fefd67f3 4694 case STAC_LO_EVENT:
16ffe32c 4695 stac92xx_hp_detect(codec);
fefd67f3 4696 break;
3d21d3f7
TI
4697 case STAC_MIC_EVENT:
4698 stac92xx_mic_detect(codec);
4699 break;
4700 }
4701
4702 switch (event->type) {
4703 case STAC_HP_EVENT:
fefd67f3 4704 case STAC_LO_EVENT:
3d21d3f7 4705 case STAC_MIC_EVENT:
74aeaabc 4706 case STAC_INSERT_EVENT:
a64135a2 4707 case STAC_PWR_EVENT:
c6e4c666
TI
4708 if (spec->num_pwrs > 0)
4709 stac92xx_pin_sense(codec, event->nid);
cd372fb3 4710 snd_hda_input_jack_report(codec, event->nid);
fd60cc89
MR
4711
4712 switch (codec->subsystem_id) {
4713 case 0x103c308f:
4714 if (event->nid == 0xb) {
4715 int pin = AC_PINCTL_IN_EN;
4716
4717 if (get_pin_presence(codec, 0xa)
4718 && get_pin_presence(codec, 0xb))
4719 pin |= AC_PINCTL_VREF_80;
4720 if (!get_pin_presence(codec, 0xb))
4721 pin |= AC_PINCTL_VREF_80;
4722
4723 /* toggle VREF state based on mic + hp pin
4724 * status
4725 */
4726 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4727 }
4728 }
72474be6 4729 break;
c6e4c666
TI
4730 case STAC_VREF_EVENT:
4731 data = snd_hda_codec_read(codec, codec->afg, 0,
4732 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4733 /* toggle VREF state based on GPIOx status */
4734 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4735 !!(data & (1 << event->data)));
72474be6 4736 break;
314634bc
TI
4737 }
4738}
4739
d38cce70
KG
4740static int hp_blike_system(u32 subsystem_id);
4741
4742static void set_hp_led_gpio(struct hda_codec *codec)
4743{
4744 struct sigmatel_spec *spec = codec->spec;
07f80449
TI
4745 unsigned int gpio;
4746
26ebe0a2
TI
4747 if (spec->gpio_led)
4748 return;
4749
07f80449
TI
4750 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4751 gpio &= AC_GPIO_IO_COUNT;
4752 if (gpio > 3)
4753 spec->gpio_led = 0x08; /* GPIO 3 */
4754 else
4755 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG
4756}
4757
c357aab0
VK
4758/*
4759 * This method searches for the mute LED GPIO configuration
4760 * provided as OEM string in SMBIOS. The format of that string
4761 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4762 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4763 * that corresponds to the NOT muted state of the master volume
4764 * and G is the index of the GPIO to use as the mute LED control (0..9)
4765 * If _G portion is missing it is assigned based on the codec ID
4766 *
4767 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4768 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG
4769 *
4770 *
4771 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4772 * SMBIOS - at least the ones I have seen do not have them - which include
4773 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4774 * HP Pavilion dv9500t CTO.
4775 * Need more information on whether it is true across the entire series.
4776 * -- kunal
c357aab0 4777 */
dce17d4f 4778static int find_mute_led_gpio(struct hda_codec *codec, int default_polarity)
c357aab0
VK
4779{
4780 struct sigmatel_spec *spec = codec->spec;
4781 const struct dmi_device *dev = NULL;
4782
4783 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4784 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4785 NULL, dev))) {
4786 if (sscanf(dev->name, "HP_Mute_LED_%d_%d",
d38cce70
KG
4787 &spec->gpio_led_polarity,
4788 &spec->gpio_led) == 2) {
c357aab0
VK
4789 spec->gpio_led = 1 << spec->gpio_led;
4790 return 1;
4791 }
4792 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG
4793 &spec->gpio_led_polarity) == 1) {
4794 set_hp_led_gpio(codec);
4795 return 1;
c357aab0
VK
4796 }
4797 }
d38cce70
KG
4798
4799 /*
4800 * Fallback case - if we don't find the DMI strings,
4801 * we statically set the GPIO - if not a B-series system.
4802 */
4803 if (!hp_blike_system(codec->subsystem_id)) {
4804 set_hp_led_gpio(codec);
dce17d4f 4805 spec->gpio_led_polarity = default_polarity;
d38cce70
KG
4806 return 1;
4807 }
c357aab0
VK
4808 }
4809 return 0;
4810}
4811
4812static int hp_blike_system(u32 subsystem_id)
78987bdc
RD
4813{
4814 switch (subsystem_id) {
c357aab0
VK
4815 case 0x103c1520:
4816 case 0x103c1521:
4817 case 0x103c1523:
4818 case 0x103c1524:
4819 case 0x103c1525:
78987bdc
RD
4820 case 0x103c1722:
4821 case 0x103c1723:
4822 case 0x103c1724:
4823 case 0x103c1725:
4824 case 0x103c1726:
4825 case 0x103c1727:
4826 case 0x103c1728:
4827 case 0x103c1729:
c357aab0
VK
4828 case 0x103c172a:
4829 case 0x103c172b:
4830 case 0x103c307e:
4831 case 0x103c307f:
4832 case 0x103c3080:
4833 case 0x103c3081:
4834 case 0x103c7007:
4835 case 0x103c7008:
78987bdc
RD
4836 return 1;
4837 }
4838 return 0;
4839}
4840
2d34e1b3
TI
4841#ifdef CONFIG_PROC_FS
4842static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4843 struct hda_codec *codec, hda_nid_t nid)
4844{
4845 if (nid == codec->afg)
4846 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4847 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4848}
4849
4850static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4851 struct hda_codec *codec,
4852 unsigned int verb)
4853{
4854 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4855 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4856}
4857
4858/* stac92hd71bxx, stac92hd73xx */
4859static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4860 struct hda_codec *codec, hda_nid_t nid)
4861{
4862 stac92hd_proc_hook(buffer, codec, nid);
4863 if (nid == codec->afg)
4864 analog_loop_proc_hook(buffer, codec, 0xfa0);
4865}
4866
4867static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4868 struct hda_codec *codec, hda_nid_t nid)
4869{
4870 if (nid == codec->afg)
4871 analog_loop_proc_hook(buffer, codec, 0xfe0);
4872}
4873
4874static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4875 struct hda_codec *codec, hda_nid_t nid)
4876{
4877 if (nid == codec->afg)
4878 analog_loop_proc_hook(buffer, codec, 0xfeb);
4879}
4880#else
4881#define stac92hd_proc_hook NULL
4882#define stac92hd7x_proc_hook NULL
4883#define stac9205_proc_hook NULL
4884#define stac927x_proc_hook NULL
4885#endif
4886
cb53c626 4887#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4888static int stac92xx_resume(struct hda_codec *codec)
4889{
dc81bed1
TI
4890 struct sigmatel_spec *spec = codec->spec;
4891
2c885878 4892 stac92xx_init(codec);
82beb8fd
TI
4893 snd_hda_codec_resume_amp(codec);
4894 snd_hda_codec_resume_cache(codec);
2c885878 4895 /* fake event to set up pins again to override cached values */
5f380eb1
TI
4896 if (spec->hp_detect) {
4897 if (spec->autocfg.hp_pins[0])
4898 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
4899 else if (spec->autocfg.line_out_pins[0])
4900 stac_issue_unsol_event(codec,
4901 spec->autocfg.line_out_pins[0]);
4902 }
c21bd025 4903 /* sync mute LED */
9e5341b9
TI
4904 if (spec->gpio_led)
4905 hda_call_check_power_status(codec, 0x01);
ff6fdc37
M
4906 return 0;
4907}
c6798d2b 4908
ae6241fb 4909/*
514bf54c 4910 * using power check for controlling mute led of HP notebooks
ae6241fb
CP
4911 * check for mute state only on Speakers (nid = 0x10)
4912 *
4913 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed, otherwise
4914 * the LED is NOT working properly !
514bf54c
JG
4915 *
4916 * Changed name to reflect that it now works for any designated
4917 * model, not just HP HDX.
ae6241fb
CP
4918 */
4919
4920#ifdef CONFIG_SND_HDA_POWER_SAVE
514bf54c 4921static int stac92xx_hp_check_power_status(struct hda_codec *codec,
6fce61ae 4922 hda_nid_t nid)
ae6241fb
CP
4923{
4924 struct sigmatel_spec *spec = codec->spec;
c21bd025 4925 int i, muted = 1;
6fce61ae 4926
c21bd025
TI
4927 for (i = 0; i < spec->multiout.num_dacs; i++) {
4928 nid = spec->multiout.dac_nids[i];
4929 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
4930 HDA_AMP_MUTE)) {
4931 muted = 0; /* something heard */
4932 break;
5bdaaada 4933 }
ae6241fb 4934 }
c21bd025
TI
4935 if (muted)
4936 spec->gpio_data &= ~spec->gpio_led; /* orange */
4937 else
4938 spec->gpio_data |= spec->gpio_led; /* white */
ae6241fb 4939
c21bd025
TI
4940 if (!spec->gpio_led_polarity) {
4941 /* LED state is inverted on these systems */
4942 spec->gpio_data ^= spec->gpio_led;
4943 }
b4e81876 4944
b4e81876 4945 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
b4e81876
TI
4946 return 0;
4947}
ae6241fb
CP
4948#endif
4949
c6798d2b
MR
4950static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4951{
167eae5a 4952 stac92xx_shutup(codec);
c6798d2b
MR
4953 return 0;
4954}
ff6fdc37
M
4955#endif
4956
2f2f4251
M
4957static struct hda_codec_ops stac92xx_patch_ops = {
4958 .build_controls = stac92xx_build_controls,
4959 .build_pcms = stac92xx_build_pcms,
4960 .init = stac92xx_init,
4961 .free = stac92xx_free,
4e55096e 4962 .unsol_event = stac92xx_unsol_event,
cb53c626 4963#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4964 .suspend = stac92xx_suspend,
ff6fdc37
M
4965 .resume = stac92xx_resume,
4966#endif
fb8d1a34 4967 .reboot_notify = stac92xx_shutup,
2f2f4251
M
4968};
4969
4970static int patch_stac9200(struct hda_codec *codec)
4971{
4972 struct sigmatel_spec *spec;
c7d4b2fa 4973 int err;
2f2f4251 4974
e560d8d8 4975 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
4976 if (spec == NULL)
4977 return -ENOMEM;
4978
a252c81a 4979 codec->no_trigger_sense = 1;
2f2f4251 4980 codec->spec = spec;
1b0e372d 4981 spec->linear_tone_beep = 1;
a4eed138 4982 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4983 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
4984 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4985 stac9200_models,
4986 stac9200_cfg_tbl);
330ee995 4987 if (spec->board_config < 0)
9a11f1aa
TI
4988 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
4989 codec->chip_name);
330ee995
TI
4990 else
4991 stac92xx_set_config_regs(codec,
af9f341a 4992 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M
4993
4994 spec->multiout.max_channels = 2;
4995 spec->multiout.num_dacs = 1;
4996 spec->multiout.dac_nids = stac9200_dac_nids;
4997 spec->adc_nids = stac9200_adc_nids;
4998 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4999 spec->num_muxes = 1;
8b65727b 5000 spec->num_dmics = 0;
9e05b7a3 5001 spec->num_adcs = 1;
a64135a2 5002 spec->num_pwrs = 0;
c7d4b2fa 5003
58eec423
MCC
5004 if (spec->board_config == STAC_9200_M4 ||
5005 spec->board_config == STAC_9200_M4_2 ||
bf277785 5006 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
5007 spec->init = stac9200_eapd_init;
5008 else
5009 spec->init = stac9200_core_init;
2f2f4251 5010 spec->mixer = stac9200_mixer;
c7d4b2fa 5011
117f257d
TI
5012 if (spec->board_config == STAC_9200_PANASONIC) {
5013 spec->gpio_mask = spec->gpio_dir = 0x09;
5014 spec->gpio_data = 0x00;
5015 }
5016
c7d4b2fa
M
5017 err = stac9200_parse_auto_config(codec);
5018 if (err < 0) {
5019 stac92xx_free(codec);
5020 return err;
5021 }
2f2f4251 5022
2acc9dcb
TI
5023 /* CF-74 has no headphone detection, and the driver should *NOT*
5024 * do detection and HP/speaker toggle because the hardware does it.
5025 */
5026 if (spec->board_config == STAC_9200_PANASONIC)
5027 spec->hp_detect = 0;
5028
2f2f4251
M
5029 codec->patch_ops = stac92xx_patch_ops;
5030
5031 return 0;
5032}
5033
8e21c34c
TD
5034static int patch_stac925x(struct hda_codec *codec)
5035{
5036 struct sigmatel_spec *spec;
5037 int err;
5038
5039 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5040 if (spec == NULL)
5041 return -ENOMEM;
5042
a252c81a 5043 codec->no_trigger_sense = 1;
8e21c34c 5044 codec->spec = spec;
1b0e372d 5045 spec->linear_tone_beep = 1;
a4eed138 5046 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5047 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
5048
5049 /* Check first for codec ID */
5050 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5051 STAC_925x_MODELS,
5052 stac925x_models,
5053 stac925x_codec_id_cfg_tbl);
5054
5055 /* Now checks for PCI ID, if codec ID is not found */
5056 if (spec->board_config < 0)
5057 spec->board_config = snd_hda_check_board_config(codec,
5058 STAC_925x_MODELS,
8e21c34c
TD
5059 stac925x_models,
5060 stac925x_cfg_tbl);
9e507abd 5061 again:
330ee995 5062 if (spec->board_config < 0)
9a11f1aa
TI
5063 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5064 codec->chip_name);
330ee995
TI
5065 else
5066 stac92xx_set_config_regs(codec,
af9f341a 5067 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD
5068
5069 spec->multiout.max_channels = 2;
5070 spec->multiout.num_dacs = 1;
5071 spec->multiout.dac_nids = stac925x_dac_nids;
5072 spec->adc_nids = stac925x_adc_nids;
5073 spec->mux_nids = stac925x_mux_nids;
5074 spec->num_muxes = 1;
9e05b7a3 5075 spec->num_adcs = 1;
a64135a2 5076 spec->num_pwrs = 0;
2c11f955
TD
5077 switch (codec->vendor_id) {
5078 case 0x83847632: /* STAC9202 */
5079 case 0x83847633: /* STAC9202D */
5080 case 0x83847636: /* STAC9251 */
5081 case 0x83847637: /* STAC9251D */
f6e9852a 5082 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5083 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
5084 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5085 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
5086 break;
5087 default:
5088 spec->num_dmics = 0;
5089 break;
5090 }
8e21c34c
TD
5091
5092 spec->init = stac925x_core_init;
5093 spec->mixer = stac925x_mixer;
6479c631
TI
5094 spec->num_caps = 1;
5095 spec->capvols = stac925x_capvols;
5096 spec->capsws = stac925x_capsws;
8e21c34c
TD
5097
5098 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
5099 if (!err) {
5100 if (spec->board_config < 0) {
5101 printk(KERN_WARNING "hda_codec: No auto-config is "
5102 "available, default to model=ref\n");
5103 spec->board_config = STAC_925x_REF;
5104 goto again;
5105 }
5106 err = -EINVAL;
5107 }
8e21c34c
TD
5108 if (err < 0) {
5109 stac92xx_free(codec);
5110 return err;
5111 }
5112
5113 codec->patch_ops = stac92xx_patch_ops;
5114
5115 return 0;
5116}
5117
e1f0d669
MR
5118static int patch_stac92hd73xx(struct hda_codec *codec)
5119{
5120 struct sigmatel_spec *spec;
5121 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5122 int err = 0;
c21ca4a8 5123 int num_dacs;
e1f0d669
MR
5124
5125 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5126 if (spec == NULL)
5127 return -ENOMEM;
5128
a252c81a 5129 codec->no_trigger_sense = 1;
e1f0d669 5130 codec->spec = spec;
1b0e372d 5131 spec->linear_tone_beep = 0;
e99d32b3 5132 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
5133 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5134 spec->pin_nids = stac92hd73xx_pin_nids;
5135 spec->board_config = snd_hda_check_board_config(codec,
5136 STAC_92HD73XX_MODELS,
5137 stac92hd73xx_models,
5138 stac92hd73xx_cfg_tbl);
842ae638
TI
5139 /* check codec subsystem id if not found */
5140 if (spec->board_config < 0)
5141 spec->board_config =
5142 snd_hda_check_board_codec_sid_config(codec,
5143 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5144 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5145again:
330ee995 5146 if (spec->board_config < 0)
9a11f1aa
TI
5147 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5148 codec->chip_name);
330ee995
TI
5149 else
5150 stac92xx_set_config_regs(codec,
af9f341a 5151 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5152
c21ca4a8 5153 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
5154 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5155
c21ca4a8 5156 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
5157 printk(KERN_WARNING "hda_codec: Could not determine "
5158 "number of channels defaulting to DAC count\n");
c21ca4a8 5159 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5160 }
e2aec171 5161 spec->init = stac92hd73xx_core_init;
c21ca4a8 5162 switch (num_dacs) {
e1f0d669 5163 case 0x3: /* 6 Channel */
d78d7a90 5164 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR
5165 break;
5166 case 0x4: /* 8 Channel */
d78d7a90 5167 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR
5168 break;
5169 case 0x5: /* 10 Channel */
d78d7a90
TI
5170 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5171 break;
c21ca4a8
TI
5172 }
5173 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5174
e1f0d669
MR
5175 spec->aloopback_mask = 0x01;
5176 spec->aloopback_shift = 8;
5177
1cd2224c 5178 spec->digbeep_nid = 0x1c;
e1f0d669
MR
5179 spec->mux_nids = stac92hd73xx_mux_nids;
5180 spec->adc_nids = stac92hd73xx_adc_nids;
5181 spec->dmic_nids = stac92hd73xx_dmic_nids;
5182 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5183 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR
5184
5185 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5186 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5187 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5188
6479c631
TI
5189 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5190 spec->capvols = stac92hd73xx_capvols;
5191 spec->capsws = stac92hd73xx_capsws;
5192
a7662640 5193 switch (spec->board_config) {
6b3ab21e 5194 case STAC_DELL_EQ:
d654a660 5195 spec->init = dell_eq_core_init;
6b3ab21e 5196 /* fallthru */
661cd8fb
TI
5197 case STAC_DELL_M6_AMIC:
5198 case STAC_DELL_M6_DMIC:
5199 case STAC_DELL_M6_BOTH:
2a9c7816 5200 spec->num_smuxes = 0;
c0cea0d0 5201 spec->eapd_switch = 0;
6b3ab21e 5202
661cd8fb
TI
5203 switch (spec->board_config) {
5204 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5205 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR
5206 spec->num_dmics = 0;
5207 break;
661cd8fb 5208 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5209 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR
5210 spec->num_dmics = 1;
5211 break;
661cd8fb 5212 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI
5213 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5214 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR
5215 spec->num_dmics = 1;
5216 break;
5217 }
5218 break;
842ae638
TI
5219 case STAC_ALIENWARE_M17X:
5220 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5221 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5222 spec->eapd_switch = 0;
5223 break;
a7662640
MR
5224 default:
5225 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5226 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5227 spec->eapd_switch = 1;
5207e10e 5228 break;
a7662640 5229 }
af6ee302 5230 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR
5231 /* GPIO0 High = Enable EAPD */
5232 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5233 spec->gpio_data = 0x01;
5234 }
a7662640 5235
a64135a2
MR
5236 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5237 spec->pwr_nids = stac92hd73xx_pwr_nids;
5238
d9737751 5239 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
5240
5241 if (!err) {
5242 if (spec->board_config < 0) {
5243 printk(KERN_WARNING "hda_codec: No auto-config is "
5244 "available, default to model=ref\n");
5245 spec->board_config = STAC_92HD73XX_REF;
5246 goto again;
5247 }
5248 err = -EINVAL;
5249 }
5250
5251 if (err < 0) {
5252 stac92xx_free(codec);
5253 return err;
5254 }
5255
9e43f0de
TI
5256 if (spec->board_config == STAC_92HD73XX_NO_JD)
5257 spec->hp_detect = 0;
5258
e1f0d669
MR
5259 codec->patch_ops = stac92xx_patch_ops;
5260
2d34e1b3
TI
5261 codec->proc_widget_hook = stac92hd7x_proc_hook;
5262
e1f0d669
MR
5263 return 0;
5264}
5265
cbbf50b2 5266static int hp_bnb2011_with_dock(struct hda_codec *codec)
335e3b86
VK
5267{
5268 if (codec->vendor_id != 0x111d7605 &&
5269 codec->vendor_id != 0x111d76d1)
5270 return 0;
5271
5272 switch (codec->subsystem_id) {
5273 case 0x103c1618:
5274 case 0x103c1619:
5275 case 0x103c161a:
5276 case 0x103c161b:
5277 case 0x103c161c:
5278 case 0x103c161d:
5279 case 0x103c161e:
5280 case 0x103c161f:
335e3b86
VK
5281
5282 case 0x103c162a:
5283 case 0x103c162b:
5284
5285 case 0x103c1630:
5286 case 0x103c1631:
5287
5288 case 0x103c1633:
cbbf50b2 5289 case 0x103c1634:
335e3b86
VK
5290 case 0x103c1635:
5291
335e3b86
VK
5292 case 0x103c3587:
5293 case 0x103c3588:
5294 case 0x103c3589:
5295 case 0x103c358a:
5296
5297 case 0x103c3667:
5298 case 0x103c3668:
cbbf50b2
VK
5299 case 0x103c3669:
5300
5301 return 1;
335e3b86
VK
5302 }
5303 return 0;
5304}
5305
d0513fc6
MR
5306static int patch_stac92hd83xxx(struct hda_codec *codec)
5307{
5308 struct sigmatel_spec *spec;
65557f35 5309 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 5310 int err;
65557f35 5311 int num_dacs;
d0513fc6
MR
5312
5313 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5314 if (spec == NULL)
5315 return -ENOMEM;
5316
cbbf50b2
VK
5317 if (hp_bnb2011_with_dock(codec)) {
5318 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
5319 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
5320 }
5321
1cc9e8f4
C
5322 /* reset pin power-down; Windows may leave these bits after reboot */
5323 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7EC, 0);
5324 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7ED, 0);
a252c81a 5325 codec->no_trigger_sense = 1;
d0513fc6 5326 codec->spec = spec;
1db7ccdb 5327 spec->linear_tone_beep = 0;
0ffa9807 5328 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5329 spec->digbeep_nid = 0x21;
ab5a6ebe
VK
5330 spec->dmic_nids = stac92hd83xxx_dmic_nids;
5331 spec->dmux_nids = stac92hd83xxx_mux_nids;
667067d8
TI
5332 spec->mux_nids = stac92hd83xxx_mux_nids;
5333 spec->num_muxes = ARRAY_SIZE(stac92hd83xxx_mux_nids);
d0513fc6 5334 spec->adc_nids = stac92hd83xxx_adc_nids;
7570ef18 5335 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
d0513fc6
MR
5336 spec->pwr_nids = stac92hd83xxx_pwr_nids;
5337 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
5338 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5339 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR
5340
5341 spec->init = stac92hd83xxx_core_init;
d0513fc6 5342 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
d0513fc6 5343 spec->pin_nids = stac92hd83xxx_pin_nids;
6479c631
TI
5344 spec->num_caps = STAC92HD83XXX_NUM_CAPS;
5345 spec->capvols = stac92hd83xxx_capvols;
5346 spec->capsws = stac92hd83xxx_capsws;
5347
d0513fc6
MR
5348 spec->board_config = snd_hda_check_board_config(codec,
5349 STAC_92HD83XXX_MODELS,
5350 stac92hd83xxx_models,
5351 stac92hd83xxx_cfg_tbl);
5352again:
330ee995 5353 if (spec->board_config < 0)
9a11f1aa
TI
5354 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5355 codec->chip_name);
330ee995
TI
5356 else
5357 stac92xx_set_config_regs(codec,
af9f341a 5358 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5359
32ed3f46 5360 switch (codec->vendor_id) {
89feca1a
DH
5361 case 0x111d76d1:
5362 case 0x111d76d9:
4dfb8a45 5363 case 0x111d76e5:
89feca1a
DH
5364 spec->dmic_nids = stac92hd87b_dmic_nids;
5365 spec->num_dmics = stac92xx_connected_ports(codec,
5366 stac92hd87b_dmic_nids,
5367 STAC92HD87B_NUM_DMICS);
4dfb8a45
VK
5368 spec->num_pins = ARRAY_SIZE(stac92hd87xxx_pin_nids);
5369 spec->pin_nids = stac92hd87xxx_pin_nids;
bdfe6f45
DH
5370 spec->mono_nid = 0;
5371 spec->num_pwrs = 0;
5372 break;
36706005
CC
5373 case 0x111d7666:
5374 case 0x111d7667:
5375 case 0x111d7668:
5376 case 0x111d7669:
4dfb8a45 5377 case 0x111d76e3:
bdfe6f45
DH
5378 spec->num_dmics = stac92xx_connected_ports(codec,
5379 stac92hd88xxx_dmic_nids,
5380 STAC92HD88XXX_NUM_DMICS);
36706005
CC
5381 spec->num_pins = ARRAY_SIZE(stac92hd88xxx_pin_nids);
5382 spec->pin_nids = stac92hd88xxx_pin_nids;
5383 spec->mono_nid = 0;
36706005
CC
5384 spec->num_pwrs = 0;
5385 break;
32ed3f46 5386 case 0x111d7604:
a9694faa 5387 case 0x111d76d4:
32ed3f46 5388 case 0x111d7605:
ff2e7337 5389 case 0x111d76d5:
ab5a6ebe 5390 case 0x111d76e7:
32ed3f46
MR
5391 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
5392 break;
5393 spec->num_pwrs = 0;
ab5a6ebe
VK
5394 spec->num_dmics = stac92xx_connected_ports(codec,
5395 stac92hd83xxx_dmic_nids,
5396 STAC92HD83XXX_NUM_DMICS);
32ed3f46
MR
5397 break;
5398 }
5399
b4e81876
TI
5400 codec->patch_ops = stac92xx_patch_ops;
5401
dce17d4f 5402 if (find_mute_led_gpio(codec, 0))
e108c7b7
VK
5403 snd_printd("mute LED gpio %d polarity %d\n",
5404 spec->gpio_led,
5405 spec->gpio_led_polarity);
5406
b4e81876
TI
5407#ifdef CONFIG_SND_HDA_POWER_SAVE
5408 if (spec->gpio_led) {
5409 spec->gpio_mask |= spec->gpio_led;
5410 spec->gpio_dir |= spec->gpio_led;
5411 spec->gpio_data |= spec->gpio_led;
5412 /* register check_power_status callback. */
5413 codec->patch_ops.check_power_status =
c21bd025 5414 stac92xx_hp_check_power_status;
b4e81876
TI
5415 }
5416#endif
5417
d0513fc6
MR
5418 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
5419 if (!err) {
5420 if (spec->board_config < 0) {
5421 printk(KERN_WARNING "hda_codec: No auto-config is "
5422 "available, default to model=ref\n");
5423 spec->board_config = STAC_92HD83XXX_REF;
5424 goto again;
5425 }
5426 err = -EINVAL;
5427 }
5428
5429 if (err < 0) {
5430 stac92xx_free(codec);
5431 return err;
5432 }
5433
04b5efe5
CC
5434 /* docking output support */
5435 num_dacs = snd_hda_get_connections(codec, 0xF,
8bb0ac55 5436 conn, STAC92HD83_DAC_COUNT + 1) - 1;
04b5efe5
CC
5437 /* skip non-DAC connections */
5438 while (num_dacs >= 0 &&
5439 (get_wcaps_type(get_wcaps(codec, conn[num_dacs]))
5440 != AC_WID_AUD_OUT))
5441 num_dacs--;
5442 /* set port E and F to select the last DAC */
5443 if (num_dacs >= 0) {
5444 snd_hda_codec_write_cache(codec, 0xE, 0,
5445 AC_VERB_SET_CONNECT_SEL, num_dacs);
5446 snd_hda_codec_write_cache(codec, 0xF, 0,
8bb0ac55 5447 AC_VERB_SET_CONNECT_SEL, num_dacs);
04b5efe5 5448 }
8bb0ac55 5449
2d34e1b3
TI
5450 codec->proc_widget_hook = stac92hd_proc_hook;
5451
d0513fc6
MR
5452 return 0;
5453}
5454
6df703ae
HRK
5455static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5456 hda_nid_t dig0pin)
5457{
5458 struct sigmatel_spec *spec = codec->spec;
5459 int idx;
5460
5461 for (idx = 0; idx < spec->num_pins; idx++)
5462 if (spec->pin_nids[idx] == dig0pin)
5463 break;
5464 if ((idx + 2) >= spec->num_pins)
5465 return 0;
5466
5467 /* dig1pin case */
330ee995 5468 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK
5469 return 2;
5470
5471 /* dig0pin + dig2pin case */
330ee995 5472 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5473 return 2;
330ee995 5474 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK
5475 return 1;
5476 else
5477 return 0;
5478}
5479
75d1aeb9
TI
5480/* HP dv7 bass switch - GPIO5 */
5481#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5482static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5483 struct snd_ctl_elem_value *ucontrol)
5484{
5485 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5486 struct sigmatel_spec *spec = codec->spec;
5487 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5488 return 0;
5489}
5490
5491static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5492 struct snd_ctl_elem_value *ucontrol)
5493{
5494 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5495 struct sigmatel_spec *spec = codec->spec;
5496 unsigned int gpio_data;
5497
5498 gpio_data = (spec->gpio_data & ~0x20) |
5499 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5500 if (gpio_data == spec->gpio_data)
5501 return 0;
5502 spec->gpio_data = gpio_data;
5503 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5504 return 1;
5505}
5506
5507static struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
5508 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5509 .info = stac_hp_bass_gpio_info,
5510 .get = stac_hp_bass_gpio_get,
5511 .put = stac_hp_bass_gpio_put,
5512};
5513
5514static int stac_add_hp_bass_switch(struct hda_codec *codec)
5515{
5516 struct sigmatel_spec *spec = codec->spec;
5517
5518 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5519 "Bass Speaker Playback Switch", 0))
5520 return -ENOMEM;
5521
5522 spec->gpio_mask |= 0x20;
5523 spec->gpio_dir |= 0x20;
5524 spec->gpio_data |= 0x20;
5525 return 0;
5526}
5527
e035b841
MR
5528static int patch_stac92hd71bxx(struct hda_codec *codec)
5529{
5530 struct sigmatel_spec *spec;
ca8d33fc 5531 struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5532 unsigned int pin_cfg;
e035b841
MR
5533 int err = 0;
5534
5535 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5536 if (spec == NULL)
5537 return -ENOMEM;
5538
a252c81a 5539 codec->no_trigger_sense = 1;
e035b841 5540 codec->spec = spec;
1b0e372d 5541 spec->linear_tone_beep = 0;
8daaaa97 5542 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK
5543 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5544 switch (codec->vendor_id) {
5545 case 0x111d76b6:
5546 case 0x111d76b7:
5547 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5548 break;
5549 case 0x111d7603:
5550 case 0x111d7608:
5551 /* On 92HD75Bx 0x27 isn't a pin nid */
5552 spec->num_pins--;
5553 /* fallthrough */
5554 default:
5555 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5556 }
aafc4412 5557 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR
5558 spec->board_config = snd_hda_check_board_config(codec,
5559 STAC_92HD71BXX_MODELS,
5560 stac92hd71bxx_models,
5561 stac92hd71bxx_cfg_tbl);
5562again:
330ee995 5563 if (spec->board_config < 0)
9a11f1aa
TI
5564 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5565 codec->chip_name);
330ee995
TI
5566 else
5567 stac92xx_set_config_regs(codec,
af9f341a 5568 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5569
fc64b26c 5570 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI
5571 /* GPIO0 = EAPD */
5572 spec->gpio_mask = 0x01;
5573 spec->gpio_dir = 0x01;
5574 spec->gpio_data = 0x01;
5575 }
5576
6df703ae
HRK
5577 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5578 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5579
6479c631
TI
5580 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5581 spec->capvols = stac92hd71bxx_capvols;
5582 spec->capsws = stac92hd71bxx_capsws;
5583
541eee87
MR
5584 switch (codec->vendor_id) {
5585 case 0x111d76b6: /* 4 Port without Analog Mixer */
5586 case 0x111d76b7:
23c7b521
HRK
5587 unmute_init++;
5588 /* fallthru */
541eee87
MR
5589 case 0x111d76b4: /* 6 Port without Analog Mixer */
5590 case 0x111d76b5:
541eee87 5591 spec->init = stac92hd71bxx_core_init;
0ffa9807 5592 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5593 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK
5594 stac92hd71bxx_dmic_nids,
5595 STAC92HD71BXX_NUM_DMICS);
541eee87 5596 break;
aafc4412 5597 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI
5598 switch (spec->board_config) {
5599 case STAC_HP_M4:
72474be6 5600 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
5601 err = stac_add_event(spec, codec->afg,
5602 STAC_VREF_EVENT, 0x02);
5603 if (err < 0)
5604 return err;
c5d08bb5 5605 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
5606 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5607 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5608 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5609 AC_USRSP_EN | err);
72474be6
MR
5610 spec->gpio_mask |= 0x02;
5611 break;
5612 }
8daaaa97 5613 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5614 (codec->revision_id & 0xf) == 1)
8daaaa97 5615 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5616
aafc4412
MR
5617 /* no output amps */
5618 spec->num_pwrs = 0;
aafc4412 5619 /* disable VSW */
26a27980 5620 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5621 unmute_init++;
330ee995
TI
5622 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5623 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
6df703ae 5624 stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
ab5a6ebe 5625 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK
5626 stac92hd71bxx_dmic_nids,
5627 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR
5628 break;
5629 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5630 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5631 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5632
aafc4412
MR
5633 /* no output amps */
5634 spec->num_pwrs = 0;
5635 /* fallthru */
541eee87 5636 default:
26a27980 5637 spec->init = stac92hd71bxx_core_init;
0ffa9807 5638 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5639 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK
5640 stac92hd71bxx_dmic_nids,
5641 STAC92HD71BXX_NUM_DMICS);
5207e10e 5642 break;
541eee87
MR
5643 }
5644
ca8d33fc
MR
5645 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5646 snd_hda_sequence_write_cache(codec, unmute_init);
5647
b20f3b83
TI
5648 /* Some HP machines seem to have unstable codec communications
5649 * especially with ATI fglrx driver. For recovering from the
5650 * CORB/RIRB stall, allow the BUS reset and keep always sync
5651 */
5652 if (spec->board_config == STAC_HP_DV5) {
5653 codec->bus->sync_write = 1;
5654 codec->bus->allow_bus_reset = 1;
5655 }
5656
d78d7a90 5657 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5658 spec->aloopback_mask = 0x50;
541eee87
MR
5659 spec->aloopback_shift = 0;
5660
8daaaa97 5661 spec->powerdown_adcs = 1;
1cd2224c 5662 spec->digbeep_nid = 0x26;
e035b841
MR
5663 spec->mux_nids = stac92hd71bxx_mux_nids;
5664 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5665 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5666 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
5667
5668 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5669 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5670 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5671 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5672
d38cce70
KG
5673 snd_printdd("Found board config: %d\n", spec->board_config);
5674
6a14f585
MR
5675 switch (spec->board_config) {
5676 case STAC_HP_M4:
6a14f585 5677 /* enable internal microphone */
330ee995 5678 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR
5679 stac92xx_auto_set_pinctl(codec, 0x0e,
5680 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
5681 /* fallthru */
5682 case STAC_DELL_M4_2:
5683 spec->num_dmics = 0;
5684 spec->num_smuxes = 0;
5685 spec->num_dmuxes = 0;
5686 break;
5687 case STAC_DELL_M4_1:
5688 case STAC_DELL_M4_3:
5689 spec->num_dmics = 1;
5690 spec->num_smuxes = 0;
ea18aa46 5691 spec->num_dmuxes = 1;
6a14f585 5692 break;
514bf54c
JG
5693 case STAC_HP_DV4_1222NR:
5694 spec->num_dmics = 1;
5695 /* I don't know if it needs 1 or 2 smuxes - will wait for
5696 * bug reports to fix if needed
5697 */
5698 spec->num_smuxes = 1;
5699 spec->num_dmuxes = 1;
514bf54c 5700 /* fallthrough */
2a6ce6e5
TI
5701 case STAC_HP_DV4:
5702 spec->gpio_led = 0x01;
5703 /* fallthrough */
e2ea57a8 5704 case STAC_HP_DV5:
330ee995 5705 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5706 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI
5707 /* HP dv6 gives the headphone pin as a line-out. Thus we
5708 * need to set hp_detect flag here to force to enable HP
5709 * detection.
5710 */
5711 spec->hp_detect = 1;
e2ea57a8 5712 break;
ae6241fb
CP
5713 case STAC_HP_HDX:
5714 spec->num_dmics = 1;
5715 spec->num_dmuxes = 1;
5716 spec->num_smuxes = 1;
26ebe0a2 5717 spec->gpio_led = 0x08;
86d190e7
TI
5718 break;
5719 }
443e26d0 5720
c357aab0 5721 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK
5722 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5723 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5724 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5725 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5726 /* It was changed in the BIOS to just satisfy MS DTM.
5727 * Lets turn it back into slaved HP
5728 */
5729 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5730 | (AC_JACK_HP_OUT <<
5731 AC_DEFCFG_DEVICE_SHIFT);
5732 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5733 | AC_DEFCFG_SEQUENCE)))
5734 | 0x1f;
5735 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5736 }
5737 }
5738
dce17d4f 5739 if (find_mute_led_gpio(codec, 1))
c357aab0
VK
5740 snd_printd("mute LED gpio %d polarity %d\n",
5741 spec->gpio_led,
5742 spec->gpio_led_polarity);
5bdaaada 5743
86d190e7
TI
5744#ifdef CONFIG_SND_HDA_POWER_SAVE
5745 if (spec->gpio_led) {
5746 spec->gpio_mask |= spec->gpio_led;
5747 spec->gpio_dir |= spec->gpio_led;
5748 spec->gpio_data |= spec->gpio_led;
443e26d0 5749 /* register check_power_status callback. */
6fce61ae 5750 codec->patch_ops.check_power_status =
86d190e7
TI
5751 stac92xx_hp_check_power_status;
5752 }
443e26d0 5753#endif
6a14f585 5754
c21ca4a8 5755 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5756
29d4ab4d 5757 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR
5758 if (!err) {
5759 if (spec->board_config < 0) {
5760 printk(KERN_WARNING "hda_codec: No auto-config is "
5761 "available, default to model=ref\n");
5762 spec->board_config = STAC_92HD71BXX_REF;
5763 goto again;
5764 }
5765 err = -EINVAL;
5766 }
5767
5768 if (err < 0) {
5769 stac92xx_free(codec);
5770 return err;
5771 }
5772
75d1aeb9 5773 /* enable bass on HP dv7 */
2a6ce6e5
TI
5774 if (spec->board_config == STAC_HP_DV4 ||
5775 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI
5776 unsigned int cap;
5777 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
5778 cap &= AC_GPIO_IO_COUNT;
5779 if (cap >= 6)
5780 stac_add_hp_bass_switch(codec);
5781 }
5782
2d34e1b3
TI
5783 codec->proc_widget_hook = stac92hd7x_proc_hook;
5784
e035b841 5785 return 0;
86d190e7 5786}
e035b841 5787
2f2f4251
M
5788static int patch_stac922x(struct hda_codec *codec)
5789{
5790 struct sigmatel_spec *spec;
c7d4b2fa 5791 int err;
2f2f4251 5792
e560d8d8 5793 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5794 if (spec == NULL)
5795 return -ENOMEM;
5796
a252c81a 5797 codec->no_trigger_sense = 1;
2f2f4251 5798 codec->spec = spec;
1b0e372d 5799 spec->linear_tone_beep = 1;
a4eed138 5800 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5801 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5802 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5803 stac922x_models,
5804 stac922x_cfg_tbl);
536319af 5805 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5806 spec->gpio_mask = spec->gpio_dir = 0x03;
5807 spec->gpio_data = 0x03;
3fc24d85
TI
5808 /* Intel Macs have all same PCI SSID, so we need to check
5809 * codec SSID to distinguish the exact models
5810 */
6f0778d8 5811 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5812 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5813
5814 case 0x106b0800:
5815 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5816 break;
5d5d3bc3
IZ
5817 case 0x106b0600:
5818 case 0x106b0700:
5819 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5820 break;
5d5d3bc3
IZ
5821 case 0x106b0e00:
5822 case 0x106b0f00:
5823 case 0x106b1600:
5824 case 0x106b1700:
5825 case 0x106b0200:
5826 case 0x106b1e00:
5827 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5828 break;
5d5d3bc3
IZ
5829 case 0x106b1a00:
5830 case 0x00000100:
5831 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5832 break;
5d5d3bc3
IZ
5833 case 0x106b0a00:
5834 case 0x106b2200:
5835 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5836 break;
536319af
NB
5837 default:
5838 spec->board_config = STAC_INTEL_MAC_V3;
5839 break;
3fc24d85
TI
5840 }
5841 }
5842
9e507abd 5843 again:
330ee995 5844 if (spec->board_config < 0)
9a11f1aa
TI
5845 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5846 codec->chip_name);
330ee995
TI
5847 else
5848 stac92xx_set_config_regs(codec,
af9f341a 5849 stac922x_brd_tbl[spec->board_config]);
2f2f4251 5850
c7d4b2fa
M
5851 spec->adc_nids = stac922x_adc_nids;
5852 spec->mux_nids = stac922x_mux_nids;
2549413e 5853 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5854 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5855 spec->num_dmics = 0;
a64135a2 5856 spec->num_pwrs = 0;
c7d4b2fa
M
5857
5858 spec->init = stac922x_core_init;
6479c631
TI
5859
5860 spec->num_caps = STAC922X_NUM_CAPS;
5861 spec->capvols = stac922x_capvols;
5862 spec->capsws = stac922x_capsws;
c7d4b2fa
M
5863
5864 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5865
3cc08dc6 5866 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5867 if (!err) {
5868 if (spec->board_config < 0) {
5869 printk(KERN_WARNING "hda_codec: No auto-config is "
5870 "available, default to model=ref\n");
5871 spec->board_config = STAC_D945_REF;
5872 goto again;
5873 }
5874 err = -EINVAL;
5875 }
3cc08dc6
MP
5876 if (err < 0) {
5877 stac92xx_free(codec);
5878 return err;
5879 }
5880
5881 codec->patch_ops = stac92xx_patch_ops;
5882
807a4636
TI
5883 /* Fix Mux capture level; max to 2 */
5884 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5885 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5886 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5887 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5888 (0 << AC_AMPCAP_MUTE_SHIFT));
5889
3cc08dc6
MP
5890 return 0;
5891}
5892
5893static int patch_stac927x(struct hda_codec *codec)
5894{
5895 struct sigmatel_spec *spec;
5896 int err;
5897
5898 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5899 if (spec == NULL)
5900 return -ENOMEM;
5901
a252c81a 5902 codec->no_trigger_sense = 1;
3cc08dc6 5903 codec->spec = spec;
1b0e372d 5904 spec->linear_tone_beep = 1;
45c1d85b 5905 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 5906 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5907 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5908 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5909 stac927x_models,
5910 stac927x_cfg_tbl);
9e507abd 5911 again:
330ee995 5912 if (spec->board_config < 0)
9a11f1aa
TI
5913 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5914 codec->chip_name);
330ee995
TI
5915 else
5916 stac92xx_set_config_regs(codec,
af9f341a 5917 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 5918
1cd2224c 5919 spec->digbeep_nid = 0x23;
8e9068b1
MR
5920 spec->adc_nids = stac927x_adc_nids;
5921 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5922 spec->mux_nids = stac927x_mux_nids;
5923 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5924 spec->smux_nids = stac927x_smux_nids;
5925 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5926 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5927 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5928 spec->multiout.dac_nids = spec->dac_nids;
5929
af6ee302
TI
5930 if (spec->board_config != STAC_D965_REF) {
5931 /* GPIO0 High = Enable EAPD */
5932 spec->eapd_mask = spec->gpio_mask = 0x01;
5933 spec->gpio_dir = spec->gpio_data = 0x01;
5934 }
5935
81d3dbde 5936 switch (spec->board_config) {
93ed1503 5937 case STAC_D965_3ST:
93ed1503 5938 case STAC_D965_5ST:
8e9068b1 5939 /* GPIO0 High = Enable EAPD */
8e9068b1 5940 spec->num_dmics = 0;
93ed1503 5941 spec->init = d965_core_init;
81d3dbde 5942 break;
8e9068b1 5943 case STAC_DELL_BIOS:
780c8be4
MR
5944 switch (codec->subsystem_id) {
5945 case 0x10280209:
5946 case 0x1028022e:
5947 /* correct the device field to SPDIF out */
330ee995 5948 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 5949 break;
86d190e7 5950 }
03d7ca17 5951 /* configure the analog microphone on some laptops */
330ee995 5952 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 5953 /* correct the front output jack as a hp out */
330ee995 5954 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 5955 /* correct the front input jack as a mic */
330ee995 5956 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 5957 /* fallthru */
8e9068b1 5958 case STAC_DELL_3ST:
af6ee302
TI
5959 if (codec->subsystem_id != 0x1028022f) {
5960 /* GPIO2 High = Enable EAPD */
5961 spec->eapd_mask = spec->gpio_mask = 0x04;
5962 spec->gpio_dir = spec->gpio_data = 0x04;
5963 }
7f16859a
MR
5964 spec->dmic_nids = stac927x_dmic_nids;
5965 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5966
ccca7cdc 5967 spec->init = dell_3st_core_init;
8e9068b1 5968 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5969 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 5970 break;
54930531
TI
5971 case STAC_927X_VOLKNOB:
5972 spec->num_dmics = 0;
5973 spec->init = stac927x_volknob_core_init;
5974 break;
7f16859a 5975 default:
8e9068b1 5976 spec->num_dmics = 0;
8e9068b1 5977 spec->init = stac927x_core_init;
af6ee302 5978 break;
7f16859a
MR
5979 }
5980
6479c631
TI
5981 spec->num_caps = STAC927X_NUM_CAPS;
5982 spec->capvols = stac927x_capvols;
5983 spec->capsws = stac927x_capsws;
5984
a64135a2 5985 spec->num_pwrs = 0;
d78d7a90 5986 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR
5987 spec->aloopback_mask = 0x40;
5988 spec->aloopback_shift = 0;
c0cea0d0 5989 spec->eapd_switch = 1;
8e9068b1 5990
3cc08dc6 5991 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5992 if (!err) {
5993 if (spec->board_config < 0) {
5994 printk(KERN_WARNING "hda_codec: No auto-config is "
5995 "available, default to model=ref\n");
5996 spec->board_config = STAC_D965_REF;
5997 goto again;
5998 }
5999 err = -EINVAL;
6000 }
c7d4b2fa
M
6001 if (err < 0) {
6002 stac92xx_free(codec);
6003 return err;
6004 }
2f2f4251
M
6005
6006 codec->patch_ops = stac92xx_patch_ops;
6007
2d34e1b3
TI
6008 codec->proc_widget_hook = stac927x_proc_hook;
6009
52987656
TI
6010 /*
6011 * !!FIXME!!
6012 * The STAC927x seem to require fairly long delays for certain
6013 * command sequences. With too short delays (even if the answer
6014 * is set to RIRB properly), it results in the silence output
6015 * on some hardwares like Dell.
6016 *
6017 * The below flag enables the longer delay (see get_response
6018 * in hda_intel.c).
6019 */
6020 codec->bus->needs_damn_long_delay = 1;
6021
e28d8322
TI
6022 /* no jack detecion for ref-no-jd model */
6023 if (spec->board_config == STAC_D965_REF_NO_JD)
6024 spec->hp_detect = 0;
6025
2f2f4251
M
6026 return 0;
6027}
6028
f3302a59
MP
6029static int patch_stac9205(struct hda_codec *codec)
6030{
6031 struct sigmatel_spec *spec;
8259980e 6032 int err;
f3302a59
MP
6033
6034 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6035 if (spec == NULL)
6036 return -ENOMEM;
6037
a252c81a 6038 codec->no_trigger_sense = 1;
f3302a59 6039 codec->spec = spec;
1b0e372d 6040 spec->linear_tone_beep = 1;
a4eed138 6041 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6042 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
6043 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6044 stac9205_models,
6045 stac9205_cfg_tbl);
9e507abd 6046 again:
330ee995 6047 if (spec->board_config < 0)
9a11f1aa
TI
6048 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6049 codec->chip_name);
330ee995
TI
6050 else
6051 stac92xx_set_config_regs(codec,
af9f341a 6052 stac9205_brd_tbl[spec->board_config]);
f3302a59 6053
1cd2224c 6054 spec->digbeep_nid = 0x23;
f3302a59 6055 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6056 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6057 spec->mux_nids = stac9205_mux_nids;
2549413e 6058 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
6059 spec->smux_nids = stac9205_smux_nids;
6060 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6061 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6062 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6063 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6064 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6065 spec->num_pwrs = 0;
f3302a59
MP
6066
6067 spec->init = stac9205_core_init;
d78d7a90 6068 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6069
6479c631
TI
6070 spec->num_caps = STAC9205_NUM_CAPS;
6071 spec->capvols = stac9205_capvols;
6072 spec->capsws = stac9205_capsws;
6073
e1f0d669
MR
6074 spec->aloopback_mask = 0x40;
6075 spec->aloopback_shift = 0;
d9a4268e
TI
6076 /* Turn on/off EAPD per HP plugging */
6077 if (spec->board_config != STAC_9205_EAPD)
6078 spec->eapd_switch = 1;
f3302a59 6079 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6080
ae0a8ed8 6081 switch (spec->board_config){
ae0a8ed8 6082 case STAC_9205_DELL_M43:
87d48363 6083 /* Enable SPDIF in/out */
330ee995
TI
6084 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6085 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6086
4fe5195c 6087 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
6088 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
6089 if (err < 0)
6090 return err;
c5d08bb5 6091 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
6092 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
6093 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
6094 AC_VERB_SET_UNSOLICITED_ENABLE,
6095 AC_USRSP_EN | err);
4fe5195c
MR
6096
6097 spec->gpio_dir = 0x0b;
0fc9dec4 6098 spec->eapd_mask = 0x01;
4fe5195c
MR
6099 spec->gpio_mask = 0x1b;
6100 spec->gpio_mute = 0x10;
e2e7d624 6101 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6102 * GPIO3 Low = DRM
87d48363 6103 */
4fe5195c 6104 spec->gpio_data = 0x01;
ae0a8ed8 6105 break;
b2c4f4d7
MR
6106 case STAC_9205_REF:
6107 /* SPDIF-In enabled */
6108 break;
ae0a8ed8
TD
6109 default:
6110 /* GPIO0 High = EAPD */
0fc9dec4 6111 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6112 spec->gpio_data = 0x01;
ae0a8ed8
TD
6113 break;
6114 }
33382403 6115
f3302a59 6116 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
6117 if (!err) {
6118 if (spec->board_config < 0) {
6119 printk(KERN_WARNING "hda_codec: No auto-config is "
6120 "available, default to model=ref\n");
6121 spec->board_config = STAC_9205_REF;
6122 goto again;
6123 }
6124 err = -EINVAL;
6125 }
f3302a59
MP
6126 if (err < 0) {
6127 stac92xx_free(codec);
6128 return err;
6129 }
6130
6131 codec->patch_ops = stac92xx_patch_ops;
6132
2d34e1b3
TI
6133 codec->proc_widget_hook = stac9205_proc_hook;
6134
f3302a59
MP
6135 return 0;
6136}
6137
db064e50 6138/*
6d859065 6139 * STAC9872 hack
db064e50
TI
6140 */
6141
1e137f92 6142static struct hda_verb stac9872_core_init[] = {
1624cb9a 6143 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
6144 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6145 {}
6146};
6147
caa10b6e
TI
6148static hda_nid_t stac9872_pin_nids[] = {
6149 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6150 0x11, 0x13, 0x14,
6151};
6152
6153static hda_nid_t stac9872_adc_nids[] = {
6154 0x8 /*,0x6*/
6155};
6156
6157static hda_nid_t stac9872_mux_nids[] = {
6158 0x15
6159};
6160
6479c631
TI
6161static unsigned long stac9872_capvols[] = {
6162 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6163};
6164#define stac9872_capsws stac9872_capvols
6165
307282c8
TI
6166static unsigned int stac9872_vaio_pin_configs[9] = {
6167 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6168 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6169 0x90a7013e
6170};
6171
ea734963 6172static const char * const stac9872_models[STAC_9872_MODELS] = {
307282c8
TI
6173 [STAC_9872_AUTO] = "auto",
6174 [STAC_9872_VAIO] = "vaio",
6175};
6176
6177static unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
6178 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6179};
6180
6181static struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI
6182 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6183 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI
6184 {} /* terminator */
6185};
6186
6d859065 6187static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
6188{
6189 struct sigmatel_spec *spec;
1e137f92 6190 int err;
db064e50 6191
db064e50
TI
6192 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6193 if (spec == NULL)
6194 return -ENOMEM;
a252c81a 6195 codec->no_trigger_sense = 1;
db064e50 6196 codec->spec = spec;
1b0e372d 6197 spec->linear_tone_beep = 1;
b04add95
TI
6198 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6199 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI
6200
6201 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6202 stac9872_models,
6203 stac9872_cfg_tbl);
307282c8 6204 if (spec->board_config < 0)
9a11f1aa
TI
6205 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6206 codec->chip_name);
307282c8
TI
6207 else
6208 stac92xx_set_config_regs(codec,
6209 stac9872_brd_tbl[spec->board_config]);
db064e50 6210
1e137f92
TI
6211 spec->multiout.dac_nids = spec->dac_nids;
6212 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6213 spec->adc_nids = stac9872_adc_nids;
6214 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6215 spec->mux_nids = stac9872_mux_nids;
1e137f92 6216 spec->init = stac9872_core_init;
6479c631
TI
6217 spec->num_caps = 1;
6218 spec->capvols = stac9872_capvols;
6219 spec->capsws = stac9872_capsws;
1e137f92
TI
6220
6221 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
6222 if (err < 0) {
6223 stac92xx_free(codec);
6224 return -EINVAL;
6225 }
6226 spec->input_mux = &spec->private_imux;
6227 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI
6228 return 0;
6229}
6230
6231
2f2f4251
M
6232/*
6233 * patch entries
6234 */
1289e9e8 6235static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
6236 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6237 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6238 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6239 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6240 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6241 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6242 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
6243 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6244 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6245 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6246 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6247 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6248 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
6249 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6250 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6251 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6252 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6253 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6254 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6255 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6256 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6257 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6258 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
6259 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6260 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6261 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6262 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6263 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6264 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
6265 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6266 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
6267 /* The following does not take into account .id=0x83847661 when subsys =
6268 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6269 * currently not fully supported.
6270 */
6271 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6272 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6273 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6274 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP
6275 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6276 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6277 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6278 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6279 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6280 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6281 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6282 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6283 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6284 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6285 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6286 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6287 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC
6288 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6289 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC
6290 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6291 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6292 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6293 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6294 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
6295 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6296 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6297 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
6298 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6299 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6300 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6301 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6302 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6303 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6304 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6305 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC
6306 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6307 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6308 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6309 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6310 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6311 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6312 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6313 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6314 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6315 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6316 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6317 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6318 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6319 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6320 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
ab5a6ebe 6321 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK
6322 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
6323 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6324 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
2f2f4251
M
6325 {} /* terminator */
6326};
1289e9e8
TI
6327
6328MODULE_ALIAS("snd-hda-codec-id:8384*");
6329MODULE_ALIAS("snd-hda-codec-id:111d*");
6330
6331MODULE_LICENSE("GPL");
6332MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6333
6334static struct hda_codec_preset_list sigmatel_list = {
6335 .preset = snd_hda_preset_sigmatel,
6336 .owner = THIS_MODULE,
6337};
6338
6339static int __init patch_sigmatel_init(void)
6340{
6341 return snd_hda_add_codec_preset(&sigmatel_list);
6342}
6343
6344static void __exit patch_sigmatel_exit(void)
6345{
6346 snd_hda_delete_codec_preset(&sigmatel_list);
6347}
6348
6349module_init(patch_sigmatel_init)
6350module_exit(patch_sigmatel_exit)
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