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ALSA: hda - Fix silent outputs from docking-station jacks of Dell laptops
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
da155d5b 32#include <linux/module.h>
2f2f4251 33#include <sound/core.h>
c7d4b2fa 34#include <sound/asoundef.h>
45a6ac16 35#include <sound/jack.h>
a74ccea5 36#include <sound/tlv.h>
2f2f4251
M		 37#include "hda_codec.h"
38#include "hda_local.h"
1cd2224c 39#include "hda_beep.h"
1835a0f9 40#include "hda_jack.h"
2f2f4251 41
c6e4c666
TI		 42enum {
43 STAC_VREF_EVENT = 1,
44 STAC_INSERT_EVENT,
45 STAC_PWR_EVENT,
46 STAC_HP_EVENT,
fefd67f3 47 STAC_LO_EVENT,
3d21d3f7 48 STAC_MIC_EVENT,
c6e4c666 49};
4e55096e 50
f5fcc13c 51enum {
1607b8ea 52 STAC_AUTO,
f5fcc13c 53 STAC_REF,
bf277785 54 STAC_9200_OQO,
dfe495d0
TI		 55 STAC_9200_DELL_D21,
56 STAC_9200_DELL_D22,
57 STAC_9200_DELL_D23,
58 STAC_9200_DELL_M21,
59 STAC_9200_DELL_M22,
60 STAC_9200_DELL_M23,
61 STAC_9200_DELL_M24,
62 STAC_9200_DELL_M25,
63 STAC_9200_DELL_M26,
64 STAC_9200_DELL_M27,
58eec423
MCC		 65 STAC_9200_M4,
66 STAC_9200_M4_2,
117f257d 67 STAC_9200_PANASONIC,
f5fcc13c
TI		 68 STAC_9200_MODELS
69};
70
71enum {
1607b8ea 72 STAC_9205_AUTO,
f5fcc13c 73 STAC_9205_REF,
dfe495d0 74 STAC_9205_DELL_M42,
ae0a8ed8
TD		 75 STAC_9205_DELL_M43,
76 STAC_9205_DELL_M44,
d9a4268e 77 STAC_9205_EAPD,
f5fcc13c
TI		 78 STAC_9205_MODELS
79};
80
e1f0d669 81enum {
1607b8ea 82 STAC_92HD73XX_AUTO,
9e43f0de 83 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 84 STAC_92HD73XX_REF,
ae709440 85 STAC_92HD73XX_INTEL,
661cd8fb
TI		 86 STAC_DELL_M6_AMIC,
87 STAC_DELL_M6_DMIC,
88 STAC_DELL_M6_BOTH,
6b3ab21e 89 STAC_DELL_EQ,
842ae638 90 STAC_ALIENWARE_M17X,
e1f0d669
MR		 91 STAC_92HD73XX_MODELS
92};
93
d0513fc6 94enum {
1607b8ea 95 STAC_92HD83XXX_AUTO,
d0513fc6 96 STAC_92HD83XXX_REF,
32ed3f46 97 STAC_92HD83XXX_PWR_REF,
8bb0ac55 98 STAC_DELL_S14,
f7f9bdfa 99 STAC_DELL_VOSTRO_3500,
0c27c180 100 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 101 STAC_HP_DV7_4000,
d0513fc6
MR		 102 STAC_92HD83XXX_MODELS
103};
104
e035b841 105enum {
1607b8ea 106 STAC_92HD71BXX_AUTO,
e035b841 107 STAC_92HD71BXX_REF,
a7662640
MR		 108 STAC_DELL_M4_1,
109 STAC_DELL_M4_2,
3a7abfd2 110 STAC_DELL_M4_3,
6a14f585 111 STAC_HP_M4,
2a6ce6e5 112 STAC_HP_DV4,
1b0652eb 113 STAC_HP_DV5,
ae6241fb 114 STAC_HP_HDX,
514bf54c 115 STAC_HP_DV4_1222NR,
e035b841
MR		 116 STAC_92HD71BXX_MODELS
117};
118
8e21c34c 119enum {
1607b8ea 120 STAC_925x_AUTO,
8e21c34c 121 STAC_925x_REF,
9cb36c2a
MCC		 122 STAC_M1,
123 STAC_M1_2,
124 STAC_M2,
8e21c34c 125 STAC_M2_2,
9cb36c2a
MCC		 126 STAC_M3,
127 STAC_M5,
128 STAC_M6,
8e21c34c
TD		 129 STAC_925x_MODELS
130};
131
f5fcc13c 132enum {
1607b8ea 133 STAC_922X_AUTO,
f5fcc13c
TI		 134 STAC_D945_REF,
135 STAC_D945GTP3,
136 STAC_D945GTP5,
5d5d3bc3
IZ		 137 STAC_INTEL_MAC_V1,
138 STAC_INTEL_MAC_V2,
139 STAC_INTEL_MAC_V3,
140 STAC_INTEL_MAC_V4,
141 STAC_INTEL_MAC_V5,
536319af
NB		 142 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
143 * is given, one of the above models will be
144 * chosen according to the subsystem id. */
dfe495d0 145 /* for backward compatibility */
f5fcc13c 146 STAC_MACMINI,
3fc24d85 147 STAC_MACBOOK,
6f0778d8
NB		 148 STAC_MACBOOK_PRO_V1,
149 STAC_MACBOOK_PRO_V2,
f16928fb 150 STAC_IMAC_INTEL,
0dae0f83 151 STAC_IMAC_INTEL_20,
8c650087 152 STAC_ECS_202,
dfe495d0
TI		 153 STAC_922X_DELL_D81,
154 STAC_922X_DELL_D82,
155 STAC_922X_DELL_M81,
156 STAC_922X_DELL_M82,
f5fcc13c
TI		 157 STAC_922X_MODELS
158};
159
160enum {
1607b8ea 161 STAC_927X_AUTO,
e28d8322 162 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 163 STAC_D965_REF,
164 STAC_D965_3ST,
165 STAC_D965_5ST,
679d92ed 166 STAC_D965_5ST_NO_FP,
4ff076e5 167 STAC_DELL_3ST,
8e9068b1 168 STAC_DELL_BIOS,
54930531 169 STAC_927X_VOLKNOB,
f5fcc13c
TI		 170 STAC_927X_MODELS
171};
403d1944 172
307282c8
TI		 173enum {
174 STAC_9872_AUTO,
175 STAC_9872_VAIO,
176 STAC_9872_MODELS
177};
178
3d21d3f7
TI		 179struct sigmatel_mic_route {
180 hda_nid_t pin;
02d33322
TI		 181 signed char mux_idx;
182 signed char dmux_idx;
3d21d3f7
TI		 183};
184
699d8995
VK		 185#define MAX_PINS_NUM 16
186#define MAX_ADCS_NUM 4
187#define MAX_DMICS_NUM 4
188
2f2f4251 189struct sigmatel_spec {
c8b6bf9b 190 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 191 unsigned int num_mixers;
192
403d1944 193 int board_config;
c0cea0d0 194 unsigned int eapd_switch: 1;
c7d4b2fa 195 unsigned int surr_switch: 1;
3cc08dc6 196 unsigned int alt_switch: 1;
82bc955f 197 unsigned int hp_detect: 1;
00ef50c2 198 unsigned int spdif_mute: 1;
7c7767eb 199 unsigned int check_volume_offset:1;
3d21d3f7 200 unsigned int auto_mic:1;
1b0e372d 201 unsigned int linear_tone_beep:1;
c7d4b2fa 202
4fe5195c 203 /* gpio lines */
0fc9dec4 204 unsigned int eapd_mask;
4fe5195c
MR		 205 unsigned int gpio_mask;
206 unsigned int gpio_dir;
207 unsigned int gpio_data;
208 unsigned int gpio_mute;
86d190e7 209 unsigned int gpio_led;
c357aab0 210 unsigned int gpio_led_polarity;
f1a73746 211 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 212 unsigned int vref_led;
4fe5195c 213
8daaaa97
MR		 214 /* stream */
215 unsigned int stream_delay;
216
4fe5195c 217 /* analog loopback */
2b63536f 218 const struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 219 unsigned char aloopback_mask;
220 unsigned char aloopback_shift;
8259980e 221
a64135a2
MR		 222 /* power management */
223 unsigned int num_pwrs;
2b63536f
TI		 224 const hda_nid_t *pwr_nids;
225 const hda_nid_t *dac_list;
a64135a2 226
2f2f4251 227 /* playback */
b22b4821
MR		 228 struct hda_input_mux *mono_mux;
229 unsigned int cur_mmux;
2f2f4251 230 struct hda_multi_out multiout;
3cc08dc6 231 hda_nid_t dac_nids[5];
c21ca4a8
TI		 232 hda_nid_t hp_dacs[5];
233 hda_nid_t speaker_dacs[5];
2f2f4251 234
7c7767eb
TI		 235 int volume_offset;
236
2f2f4251 237 /* capture */
2b63536f 238 const hda_nid_t *adc_nids;
2f2f4251 239 unsigned int num_adcs;
2b63536f 240 const hda_nid_t *mux_nids;
dabbed6f 241 unsigned int num_muxes;
2b63536f 242 const hda_nid_t *dmic_nids;
8b65727b 243 unsigned int num_dmics;
2b63536f 244 const hda_nid_t *dmux_nids;
1697055e 245 unsigned int num_dmuxes;
2b63536f 246 const hda_nid_t *smux_nids;
d9737751 247 unsigned int num_smuxes;
5207e10e 248 unsigned int num_analog_muxes;
6479c631 249
2b63536f
TI		 250 const unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
251 const unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
6479c631
TI		 252 unsigned int num_caps; /* number of capture volume/switch elements */
253
3d21d3f7
TI		 254 struct sigmatel_mic_route ext_mic;
255 struct sigmatel_mic_route int_mic;
9907790a 256 struct sigmatel_mic_route dock_mic;
3d21d3f7 257
ea734963 258 const char * const *spdif_labels;
d9737751 259
dabbed6f 260 hda_nid_t dig_in_nid;
b22b4821 261 hda_nid_t mono_nid;
1cd2224c
MR		 262 hda_nid_t anabeep_nid;
263 hda_nid_t digbeep_nid;
2f2f4251 264
2f2f4251 265 /* pin widgets */
2b63536f 266 const hda_nid_t *pin_nids;
2f2f4251 267 unsigned int num_pins;
2f2f4251
M		 268
269 /* codec specific stuff */
2b63536f
TI		 270 const struct hda_verb *init;
271 const struct snd_kcontrol_new *mixer;
2f2f4251
M		 272
273 /* capture source */
8b65727b 274 struct hda_input_mux *dinput_mux;
e1f0d669 275 unsigned int cur_dmux[2];
c7d4b2fa 276 struct hda_input_mux *input_mux;
3cc08dc6 277 unsigned int cur_mux[3];
d9737751
MR		 278 struct hda_input_mux *sinput_mux;
279 unsigned int cur_smux[2];
2a9c7816
MR		 280 unsigned int cur_amux;
281 hda_nid_t *amp_nids;
8daaaa97 282 unsigned int powerdown_adcs;
2f2f4251 283
403d1944
MP		 284 /* i/o switches */
285 unsigned int io_switch[2];
0fb87bb4 286 unsigned int clfe_swap;
c21ca4a8
TI		 287 hda_nid_t line_switch; /* shared line-in for input and output */
288 hda_nid_t mic_switch; /* shared mic-in for input and output */
289 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 290 unsigned int aloopback;
2f2f4251 291
c7d4b2fa
M		 292 struct hda_pcm pcm_rec[2]; /* PCM information */
293
294 /* dynamic controls and input_mux */
295 struct auto_pin_cfg autocfg;
603c4019 296 struct snd_array kctls;
8b65727b 297 struct hda_input_mux private_dimux;
c7d4b2fa 298 struct hda_input_mux private_imux;
d9737751 299 struct hda_input_mux private_smux;
b22b4821 300 struct hda_input_mux private_mono_mux;
699d8995
VK		 301
302 /* auto spec */
303 unsigned auto_pin_cnt;
304 hda_nid_t auto_pin_nids[MAX_PINS_NUM];
305 unsigned auto_adc_cnt;
306 hda_nid_t auto_adc_nids[MAX_ADCS_NUM];
307 hda_nid_t auto_mux_nids[MAX_ADCS_NUM];
308 hda_nid_t auto_dmux_nids[MAX_ADCS_NUM];
309 unsigned long auto_capvols[MAX_ADCS_NUM];
310 unsigned auto_dmic_cnt;
311 hda_nid_t auto_dmic_nids[MAX_DMICS_NUM];
2f2f4251
M		 312};
313
2b63536f 314static const hda_nid_t stac9200_adc_nids[1] = {
2f2f4251
M		 315 0x03,
316};
317
2b63536f 318static const hda_nid_t stac9200_mux_nids[1] = {
2f2f4251
M		 319 0x0c,
320};
321
2b63536f 322static const hda_nid_t stac9200_dac_nids[1] = {
2f2f4251
M		 323 0x02,
324};
325
2b63536f 326static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 327 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
328 0x0f, 0x10, 0x11
329};
330
2b63536f 331static const hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
0ffa9807
MR		 332 0x26, 0,
333};
334
2b63536f 335static const hda_nid_t stac92hd73xx_adc_nids[2] = {
e1f0d669
MR		 336 0x1a, 0x1b
337};
338
339#define STAC92HD73XX_NUM_DMICS 2
2b63536f 340static const hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
e1f0d669
MR		 341 0x13, 0x14, 0
342};
343
344#define STAC92HD73_DAC_COUNT 5
e1f0d669 345
2b63536f 346static const hda_nid_t stac92hd73xx_mux_nids[2] = {
e2aec171 347 0x20, 0x21,
e1f0d669
MR		 348};
349
2b63536f 350static const hda_nid_t stac92hd73xx_dmux_nids[2] = {
e1f0d669
MR		 351 0x20, 0x21,
352};
353
2b63536f 354static const hda_nid_t stac92hd73xx_smux_nids[2] = {
d9737751
MR		 355 0x22, 0x23,
356};
357
6479c631 358#define STAC92HD73XX_NUM_CAPS 2
2b63536f 359static const unsigned long stac92hd73xx_capvols[] = {
6479c631
TI		 360 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
361 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
362};
363#define stac92hd73xx_capsws stac92hd73xx_capvols
364
d0513fc6 365#define STAC92HD83_DAC_COUNT 3
d0513fc6 366
afef2cfa
CC		 367static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
368 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
369 0x0f, 0x10
d0513fc6
MR		 370};
371
2b63536f 372static const hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
0ffa9807
MR		 373 0x1e, 0,
374};
375
2b63536f 376static const hda_nid_t stac92hd83xxx_dmic_nids[] = {
699d8995 377 0x11, 0x20,
ab5a6ebe
VK		 378};
379
2b63536f 380static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 381 0x0a, 0x0d, 0x0f
382};
383
2b63536f 384static const hda_nid_t stac92hd71bxx_adc_nids[2] = {
e035b841
MR		 385 0x12, 0x13,
386};
387
2b63536f 388static const hda_nid_t stac92hd71bxx_mux_nids[2] = {
e035b841
MR		 389 0x1a, 0x1b
390};
391
2b63536f 392static const hda_nid_t stac92hd71bxx_dmux_nids[2] = {
4b33c767 393 0x1c, 0x1d,
e1f0d669
MR		 394};
395
2b63536f 396static const hda_nid_t stac92hd71bxx_smux_nids[2] = {
d9737751
MR		 397 0x24, 0x25,
398};
399
e035b841 400#define STAC92HD71BXX_NUM_DMICS 2
2b63536f 401static const hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
e035b841
MR		 402 0x18, 0x19, 0
403};
404
2b63536f
TI		 405static const hda_nid_t stac92hd71bxx_dmic_5port_nids[STAC92HD71BXX_NUM_DMICS] = {
406 0x18, 0
407};
408
409static const hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
0ffa9807
MR		 410 0x22, 0
411};
412
6479c631 413#define STAC92HD71BXX_NUM_CAPS 2
2b63536f 414static const unsigned long stac92hd71bxx_capvols[] = {
6479c631
TI		 415 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
416 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
417};
418#define stac92hd71bxx_capsws stac92hd71bxx_capvols
419
2b63536f 420static const hda_nid_t stac925x_adc_nids[1] = {
8e21c34c
TD		 421 0x03,
422};
423
2b63536f 424static const hda_nid_t stac925x_mux_nids[1] = {
8e21c34c
TD		 425 0x0f,
426};
427
2b63536f 428static const hda_nid_t stac925x_dac_nids[1] = {
8e21c34c
TD		 429 0x02,
430};
431
f6e9852a 432#define STAC925X_NUM_DMICS 1
2b63536f 433static const hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
f6e9852a 434 0x15, 0
2c11f955
TD		 435};
436
2b63536f 437static const hda_nid_t stac925x_dmux_nids[1] = {
1697055e
TI		 438 0x14,
439};
440
2b63536f 441static const unsigned long stac925x_capvols[] = {
6479c631
TI		 442 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
443};
2b63536f 444static const unsigned long stac925x_capsws[] = {
6479c631
TI		 445 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
446};
447
2b63536f 448static const hda_nid_t stac922x_adc_nids[2] = {
2f2f4251
M		 449 0x06, 0x07,
450};
451
2b63536f 452static const hda_nid_t stac922x_mux_nids[2] = {
2f2f4251
M		 453 0x12, 0x13,
454};
455
6479c631 456#define STAC922X_NUM_CAPS 2
2b63536f 457static const unsigned long stac922x_capvols[] = {
6479c631
TI		 458 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
459 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
460};
461#define stac922x_capsws stac922x_capvols
462
2b63536f 463static const hda_nid_t stac927x_slave_dig_outs[2] = {
45c1d85b
MR		 464 0x1f, 0,
465};
466
2b63536f 467static const hda_nid_t stac927x_adc_nids[3] = {
3cc08dc6
MP		 468 0x07, 0x08, 0x09
469};
470
2b63536f 471static const hda_nid_t stac927x_mux_nids[3] = {
3cc08dc6
MP		 472 0x15, 0x16, 0x17
473};
474
2b63536f 475static const hda_nid_t stac927x_smux_nids[1] = {
d9737751
MR		 476 0x21,
477};
478
2b63536f 479static const hda_nid_t stac927x_dac_nids[6] = {
b76c850f
MR		 480 0x02, 0x03, 0x04, 0x05, 0x06, 0
481};
482
2b63536f 483static const hda_nid_t stac927x_dmux_nids[1] = {
e1f0d669
MR		 484 0x1b,
485};
486
7f16859a 487#define STAC927X_NUM_DMICS 2
2b63536f 488static const hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
7f16859a
MR		 489 0x13, 0x14, 0
490};
491
6479c631 492#define STAC927X_NUM_CAPS 3
2b63536f 493static const unsigned long stac927x_capvols[] = {
6479c631
TI		 494 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
495 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
496 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
497};
2b63536f 498static const unsigned long stac927x_capsws[] = {
6479c631
TI		 499 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
500 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
501 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
502};
503
ea734963 504static const char * const stac927x_spdif_labels[5] = {
65973632
MR		 505 "Digital Playback", "ADAT", "Analog Mux 1",
506 "Analog Mux 2", "Analog Mux 3"
507};
508
2b63536f 509static const hda_nid_t stac9205_adc_nids[2] = {
f3302a59
MP		 510 0x12, 0x13
511};
512
2b63536f 513static const hda_nid_t stac9205_mux_nids[2] = {
f3302a59
MP		 514 0x19, 0x1a
515};
516
2b63536f 517static const hda_nid_t stac9205_dmux_nids[1] = {
1697055e 518 0x1d,
e1f0d669
MR		 519};
520
2b63536f 521static const hda_nid_t stac9205_smux_nids[1] = {
d9737751
MR		 522 0x21,
523};
524
f6e9852a 525#define STAC9205_NUM_DMICS 2
2b63536f 526static const hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
f6e9852a 527 0x17, 0x18, 0
8b65727b
MP		 528};
529
6479c631 530#define STAC9205_NUM_CAPS 2
2b63536f 531static const unsigned long stac9205_capvols[] = {
6479c631
TI		 532 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
533 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
534};
2b63536f 535static const unsigned long stac9205_capsws[] = {
6479c631
TI		 536 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
537 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
538};
539
2b63536f 540static const hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 541 0x08, 0x09, 0x0d, 0x0e,
542 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 543};
544
2b63536f 545static const hda_nid_t stac925x_pin_nids[8] = {
8e21c34c
TD		 546 0x07, 0x08, 0x0a, 0x0b,
547 0x0c, 0x0d, 0x10, 0x11,
548};
549
2b63536f 550static const hda_nid_t stac922x_pin_nids[10] = {
2f2f4251
M		 551 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
552 0x0f, 0x10, 0x11, 0x15, 0x1b,
553};
554
2b63536f 555static const hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 556 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
557 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 558 0x14, 0x22, 0x23
e1f0d669
MR		 559};
560
616f89e7 561#define STAC92HD71BXX_NUM_PINS 13
2b63536f 562static const hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
616f89e7
HRK		 563 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
564 0x00, 0x14, 0x18, 0x19, 0x1e,
565 0x1f, 0x20, 0x27
566};
2b63536f 567static const hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 568 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
569 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 570 0x1f, 0x20, 0x27
e035b841
MR		 571};
572
2b63536f 573static const hda_nid_t stac927x_pin_nids[14] = {
3cc08dc6
MP		 574 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
575 0x0f, 0x10, 0x11, 0x12, 0x13,
576 0x14, 0x21, 0x22, 0x23,
577};
578
2b63536f 579static const hda_nid_t stac9205_pin_nids[12] = {
f3302a59
MP		 580 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
581 0x0f, 0x14, 0x16, 0x17, 0x18,
582 0x21, 0x22,
f3302a59
MP		 583};
584
8b65727b
MP		 585static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
586 struct snd_ctl_elem_info *uinfo)
587{
588 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
589 struct sigmatel_spec *spec = codec->spec;
590 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
591}
592
593static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
594 struct snd_ctl_elem_value *ucontrol)
595{
596 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
597 struct sigmatel_spec *spec = codec->spec;
e1f0d669 598 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 599
e1f0d669 600 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 601 return 0;
602}
603
604static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
605 struct snd_ctl_elem_value *ucontrol)
606{
607 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
608 struct sigmatel_spec *spec = codec->spec;
e1f0d669 609 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 610
611 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 612 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 613}
614
d9737751
MR		 615static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
616 struct snd_ctl_elem_info *uinfo)
617{
618 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
619 struct sigmatel_spec *spec = codec->spec;
620 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
621}
622
623static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
624 struct snd_ctl_elem_value *ucontrol)
625{
626 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
627 struct sigmatel_spec *spec = codec->spec;
628 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
629
630 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
631 return 0;
632}
633
634static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
635 struct snd_ctl_elem_value *ucontrol)
636{
637 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
638 struct sigmatel_spec *spec = codec->spec;
00ef50c2 639 struct hda_input_mux *smux = &spec->private_smux;
d9737751 640 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 641 int err, val;
642 hda_nid_t nid;
d9737751 643
00ef50c2 644 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 645 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 646 if (err < 0)
647 return err;
648
649 if (spec->spdif_mute) {
650 if (smux_idx == 0)
651 nid = spec->multiout.dig_out_nid;
652 else
653 nid = codec->slave_dig_outs[smux_idx - 1];
654 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 655 val = HDA_AMP_MUTE;
00ef50c2 656 else
c9b46f91 657 val = 0;
00ef50c2 658 /* un/mute SPDIF out */
c9b46f91
TI		 659 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
660 HDA_AMP_MUTE, val);
00ef50c2
MR		 661 }
662 return 0;
d9737751
MR		 663}
664
96b63597 665#ifdef CONFIG_SND_HDA_POWER_SAVE
45eebda7
VK		 666static int stac_vrefout_set(struct hda_codec *codec,
667 hda_nid_t nid, unsigned int new_vref)
668{
669 int error, pinctl;
670
671 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
672 pinctl = snd_hda_codec_read(codec, nid, 0,
673 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
674
675 if (pinctl < 0)
676 return pinctl;
677
678 pinctl &= 0xff;
679 pinctl &= ~AC_PINCTL_VREFEN;
680 pinctl |= (new_vref & AC_PINCTL_VREFEN);
681
682 error = snd_hda_codec_write_cache(codec, nid, 0,
683 AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl);
684 if (error < 0)
685 return error;
686
687 return 1;
688}
96b63597 689#endif
45eebda7 690
2fc99890
NL		 691static unsigned int stac92xx_vref_set(struct hda_codec *codec,
692 hda_nid_t nid, unsigned int new_vref)
693{
b8621516 694 int error;
2fc99890
NL		 695 unsigned int pincfg;
696 pincfg = snd_hda_codec_read(codec, nid, 0,
697 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
698
699 pincfg &= 0xff;
700 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
701 pincfg |= new_vref;
702
703 if (new_vref == AC_PINCTL_VREF_HIZ)
704 pincfg |= AC_PINCTL_OUT_EN;
705 else
706 pincfg |= AC_PINCTL_IN_EN;
707
708 error = snd_hda_codec_write_cache(codec, nid, 0,
709 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
710 if (error < 0)
711 return error;
712 else
713 return 1;
714}
715
716static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
717{
718 unsigned int vref;
719 vref = snd_hda_codec_read(codec, nid, 0,
720 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
721 vref &= AC_PINCTL_VREFEN;
722 return vref;
723}
724
c8b6bf9b 725static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 726{
727 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
728 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 729 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 730}
731
c8b6bf9b 732static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 733{
734 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
735 struct sigmatel_spec *spec = codec->spec;
736 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
737
738 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
739 return 0;
740}
741
c8b6bf9b 742static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 743{
744 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
745 struct sigmatel_spec *spec = codec->spec;
746 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e 747 const struct hda_input_mux *imux = spec->input_mux;
094a4245 748 unsigned int idx, prev_idx, didx;
5207e10e
TI		 749
750 idx = ucontrol->value.enumerated.item[0];
751 if (idx >= imux->num_items)
752 idx = imux->num_items - 1;
753 prev_idx = spec->cur_mux[adc_idx];
754 if (prev_idx == idx)
755 return 0;
756 if (idx < spec->num_analog_muxes) {
757 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
758 AC_VERB_SET_CONNECT_SEL,
759 imux->items[idx].index);
094a4245
VK		 760 if (prev_idx >= spec->num_analog_muxes &&
761 spec->mux_nids[adc_idx] != spec->dmux_nids[adc_idx]) {
5207e10e
TI		 762 imux = spec->dinput_mux;
763 /* 0 = analog */
764 snd_hda_codec_write_cache(codec,
765 spec->dmux_nids[adc_idx], 0,
766 AC_VERB_SET_CONNECT_SEL,
767 imux->items[0].index);
768 }
769 } else {
770 imux = spec->dinput_mux;
094a4245
VK		 771 /* first dimux item is hardcoded to select analog imux,
772 * so lets skip it
773 */
774 didx = idx - spec->num_analog_muxes + 1;
5207e10e
TI		 775 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
776 AC_VERB_SET_CONNECT_SEL,
094a4245 777 imux->items[didx].index);
5207e10e
TI		 778 }
779 spec->cur_mux[adc_idx] = idx;
780 return 1;
2f2f4251
M		 781}
782
b22b4821
MR		 783static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
784 struct snd_ctl_elem_info *uinfo)
785{
786 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
787 struct sigmatel_spec *spec = codec->spec;
788 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
789}
790
791static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
792 struct snd_ctl_elem_value *ucontrol)
793{
794 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
795 struct sigmatel_spec *spec = codec->spec;
796
797 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
798 return 0;
799}
800
801static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
802 struct snd_ctl_elem_value *ucontrol)
803{
804 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
805 struct sigmatel_spec *spec = codec->spec;
806
807 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
808 spec->mono_nid, &spec->cur_mmux);
809}
810
5f10c4a9
ML		 811#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
812
813static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
814 struct snd_ctl_elem_value *ucontrol)
815{
816 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 817 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 818 struct sigmatel_spec *spec = codec->spec;
819
e1f0d669
MR		 820 ucontrol->value.integer.value[0] = !!(spec->aloopback &
821 (spec->aloopback_mask << idx));
5f10c4a9
ML		 822 return 0;
823}
824
825static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
826 struct snd_ctl_elem_value *ucontrol)
827{
828 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
829 struct sigmatel_spec *spec = codec->spec;
e1f0d669 830 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 831 unsigned int dac_mode;
e1f0d669 832 unsigned int val, idx_val;
5f10c4a9 833
e1f0d669
MR		 834 idx_val = spec->aloopback_mask << idx;
835 if (ucontrol->value.integer.value[0])
836 val = spec->aloopback | idx_val;
837 else
838 val = spec->aloopback & ~idx_val;
68ea7b2f 839 if (spec->aloopback == val)
5f10c4a9
ML		 840 return 0;
841
68ea7b2f 842 spec->aloopback = val;
5f10c4a9 843
e1f0d669
MR		 844 /* Only return the bits defined by the shift value of the
845 * first two bytes of the mask
846 */
5f10c4a9 847 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 848 kcontrol->private_value & 0xFFFF, 0x0);
849 dac_mode >>= spec->aloopback_shift;
5f10c4a9 850
e1f0d669 851 if (spec->aloopback & idx_val) {
5f10c4a9 852 snd_hda_power_up(codec);
e1f0d669 853 dac_mode |= idx_val;
5f10c4a9
ML		 854 } else {
855 snd_hda_power_down(codec);
e1f0d669 856 dac_mode &= ~idx_val;
5f10c4a9
ML		 857 }
858
859 snd_hda_codec_write_cache(codec, codec->afg, 0,
860 kcontrol->private_value >> 16, dac_mode);
861
862 return 1;
863}
864
2b63536f 865static const struct hda_verb stac9200_core_init[] = {
2f2f4251 866 /* set dac0mux for dac converter */
c7d4b2fa 867 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 868 {}
869};
870
2b63536f 871static const struct hda_verb stac9200_eapd_init[] = {
1194b5b7
TI		 872 /* set dac0mux for dac converter */
873 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
874 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
875 {}
876};
877
2b63536f 878static const struct hda_verb dell_eq_core_init[] = {
d654a660
MR		 879 /* set master volume to max value without distortion
880 * and direct control */
881 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 882 {}
883};
884
2b63536f 885static const struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 886 /* set master volume and direct control */
887 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 888 {}
889};
890
2b63536f 891static const struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 892 /* power state controls amps */
893 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 894 {}
d0513fc6
MR		 895};
896
2b63536f 897static const struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 898 /* set master volume and direct control */
899 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 900 {}
541eee87
MR		 901};
902
2b63536f 903static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
ca8d33fc
MR		 904 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
905 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 906 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
907 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 908 {}
909};
910
2b63536f 911static const struct hda_verb stac925x_core_init[] = {
8e21c34c
TD		 912 /* set dac0mux for dac converter */
913 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 914 /* mute the master volume */
915 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 916 {}
917};
918
2b63536f 919static const struct hda_verb stac922x_core_init[] = {
2f2f4251 920 /* set master volume and direct control */
c7d4b2fa 921 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 922 {}
923};
924
2b63536f 925static const struct hda_verb d965_core_init[] = {
19039bd0 926 /* set master volume and direct control */
93ed1503 927 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 928 /* unmute node 0x1b */
929 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
930 /* select node 0x03 as DAC */
931 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
932 {}
933};
934
2b63536f 935static const struct hda_verb dell_3st_core_init[] = {
ccca7cdc
TI		 936 /* don't set delta bit */
937 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
938 /* unmute node 0x1b */
939 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
940 /* select node 0x03 as DAC */
941 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
942 {}
943};
944
2b63536f 945static const struct hda_verb stac927x_core_init[] = {
3cc08dc6
MP		 946 /* set master volume and direct control */
947 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 948 /* enable analog pc beep path */
949 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 950 {}
951};
952
2b63536f 953static const struct hda_verb stac927x_volknob_core_init[] = {
54930531
TI		 954 /* don't set delta bit */
955 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
956 /* enable analog pc beep path */
957 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
958 {}
959};
960
2b63536f 961static const struct hda_verb stac9205_core_init[] = {
f3302a59
MP		 962 /* set master volume and direct control */
963 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 964 /* enable analog pc beep path */
965 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 966 {}
967};
968
b22b4821
MR		 969#define STAC_MONO_MUX \
970 { \
971 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
972 .name = "Mono Mux", \
973 .count = 1, \
974 .info = stac92xx_mono_mux_enum_info, \
975 .get = stac92xx_mono_mux_enum_get, \
976 .put = stac92xx_mono_mux_enum_put, \
977 }
978
e1f0d669 979#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 980 { \
981 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
982 .name = "Analog Loopback", \
e1f0d669 983 .count = cnt, \
5f10c4a9
ML		 984 .info = stac92xx_aloopback_info, \
985 .get = stac92xx_aloopback_get, \
986 .put = stac92xx_aloopback_put, \
987 .private_value = verb_read | (verb_write << 16), \
988 }
989
2fc99890
NL		 990#define DC_BIAS(xname, idx, nid) \
991 { \
992 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
993 .name = xname, \
994 .index = idx, \
995 .info = stac92xx_dc_bias_info, \
996 .get = stac92xx_dc_bias_get, \
997 .put = stac92xx_dc_bias_put, \
998 .private_value = nid, \
999 }
1000
2b63536f 1001static const struct snd_kcontrol_new stac9200_mixer[] = {
de8c85f7 1002 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
2f2f4251 1003 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 1004 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1005 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1006 { } /* end */
1007};
1008
2b63536f 1009static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
d78d7a90
TI		 1010 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1011 {}
1012};
1013
2b63536f 1014static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1015 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 1016 {}
1017};
e1f0d669 1018
2b63536f 1019static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
d78d7a90
TI		 1020 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1021 {}
1022};
1023
d0513fc6 1024
2b63536f 1025static const struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
d78d7a90
TI		 1026 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1027};
541eee87 1028
2b63536f 1029static const struct snd_kcontrol_new stac925x_mixer[] = {
de8c85f7 1030 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xe, 0, HDA_OUTPUT),
c9280d68 1031 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 1032 { } /* end */
1033};
1034
2b63536f 1035static const struct snd_kcontrol_new stac9205_loopback[] = {
d78d7a90
TI		 1036 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1037 {}
1038};
1039
2b63536f 1040static const struct snd_kcontrol_new stac927x_loopback[] = {
d78d7a90
TI		 1041 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1042 {}
1043};
1044
1697055e
TI		 1045static struct snd_kcontrol_new stac_dmux_mixer = {
1046 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1047 .name = "Digital Input Source",
1048 /* count set later */
1049 .info = stac92xx_dmux_enum_info,
1050 .get = stac92xx_dmux_enum_get,
1051 .put = stac92xx_dmux_enum_put,
1052};
1053
d9737751
MR		 1054static struct snd_kcontrol_new stac_smux_mixer = {
1055 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1056 .name = "IEC958 Playback Source",
d9737751
MR		 1057 /* count set later */
1058 .info = stac92xx_smux_enum_info,
1059 .get = stac92xx_smux_enum_get,
1060 .put = stac92xx_smux_enum_put,
1061};
1062
ea734963 1063static const char * const slave_vols[] = {
2134ea4f
TI		 1064 "Front Playback Volume",
1065 "Surround Playback Volume",
1066 "Center Playback Volume",
1067 "LFE Playback Volume",
1068 "Side Playback Volume",
1069 "Headphone Playback Volume",
2134ea4f 1070 "Speaker Playback Volume",
2134ea4f
TI		 1071 NULL
1072};
1073
ea734963 1074static const char * const slave_sws[] = {
2134ea4f
TI		 1075 "Front Playback Switch",
1076 "Surround Playback Switch",
1077 "Center Playback Switch",
1078 "LFE Playback Switch",
1079 "Side Playback Switch",
1080 "Headphone Playback Switch",
2134ea4f 1081 "Speaker Playback Switch",
edb54a55 1082 "IEC958 Playback Switch",
2134ea4f
TI		 1083 NULL
1084};
1085
603c4019
TI		 1086static void stac92xx_free_kctls(struct hda_codec *codec);
1087
2f2f4251
M		 1088static int stac92xx_build_controls(struct hda_codec *codec)
1089{
1090 struct sigmatel_spec *spec = codec->spec;
1091 int err;
c7d4b2fa 1092 int i;
2f2f4251 1093
6479c631
TI		 1094 if (spec->mixer) {
1095 err = snd_hda_add_new_ctls(codec, spec->mixer);
1096 if (err < 0)
1097 return err;
1098 }
c7d4b2fa
M		 1099
1100 for (i = 0; i < spec->num_mixers; i++) {
1101 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1102 if (err < 0)
1103 return err;
1104 }
5207e10e
TI		 1105 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1106 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1107 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1108 err = snd_hda_ctl_add(codec, 0,
1697055e
TI		 1109 snd_ctl_new1(&stac_dmux_mixer, codec));
1110 if (err < 0)
1111 return err;
1112 }
d9737751 1113 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1114 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1115 struct hda_input_mux *smux = &spec->private_smux;
1116 /* check for mute support on SPDIF out */
1117 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1118 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR		 1119 spec->spdif_mute = 1;
1120 }
d9737751 1121 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1122 err = snd_hda_ctl_add(codec, 0,
d9737751
MR		 1123 snd_ctl_new1(&stac_smux_mixer, codec));
1124 if (err < 0)
1125 return err;
1126 }
c7d4b2fa 1127
dabbed6f 1128 if (spec->multiout.dig_out_nid) {
74b654c9
SW		 1129 err = snd_hda_create_spdif_out_ctls(codec,
1130 spec->multiout.dig_out_nid,
1131 spec->multiout.dig_out_nid);
dabbed6f
M		 1132 if (err < 0)
1133 return err;
9a08160b
TI		 1134 err = snd_hda_create_spdif_share_sw(codec,
1135 &spec->multiout);
1136 if (err < 0)
1137 return err;
1138 spec->multiout.share_spdif = 1;
dabbed6f 1139 }
da74ae3e 1140 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1141 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1142 if (err < 0)
1143 return err;
1144 }
2134ea4f
TI		 1145
1146 /* if we have no master control, let's create it */
1147 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1148 unsigned int vmaster_tlv[4];
2134ea4f 1149 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1150 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1151 /* correct volume offset */
1152 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
de8c85f7 1153 /* minimum value is actually mute */
a74ccea5 1154 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
2134ea4f 1155 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1156 vmaster_tlv, slave_vols);
2134ea4f
TI		 1157 if (err < 0)
1158 return err;
1159 }
1160 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1161 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1162 NULL, slave_sws);
1163 if (err < 0)
1164 return err;
1165 }
1166
d78d7a90
TI		 1167 if (spec->aloopback_ctl &&
1168 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1169 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1170 if (err < 0)
1171 return err;
1172 }
1173
603c4019 1174 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e 1175
01a61e12
TI		 1176 err = snd_hda_jack_add_kctls(codec, &spec->autocfg);
1177 if (err < 0)
1178 return err;
e4973e1e 1179
dabbed6f 1180 return 0;
2f2f4251
M		 1181}
1182
2b63536f 1183static const unsigned int ref9200_pin_configs[8] = {
dabbed6f 1184 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1185 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1186};
1187
2b63536f 1188static const unsigned int gateway9200_m4_pin_configs[8] = {
58eec423
MCC		 1189 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1190 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1191};
2b63536f 1192static const unsigned int gateway9200_m4_2_pin_configs[8] = {
58eec423
MCC		 1193 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1194 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1195};
1196
1197/*
dfe495d0
TI		 1198 STAC 9200 pin configs for
1199 102801A8
1200 102801DE
1201 102801E8
1202*/
2b63536f 1203static const unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1204 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1205 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1206};
1207
1208/*
1209 STAC 9200 pin configs for
1210 102801C0
1211 102801C1
1212*/
2b63536f 1213static const unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1214 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1215 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1216};
1217
1218/*
1219 STAC 9200 pin configs for
1220 102801C4 (Dell Dimension E310)
1221 102801C5
1222 102801C7
1223 102801D9
1224 102801DA
1225 102801E3
1226*/
2b63536f 1227static const unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1228 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1229 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1230};
1231
1232
1233/*
1234 STAC 9200-32 pin configs for
1235 102801B5 (Dell Inspiron 630m)
1236 102801D8 (Dell Inspiron 640m)
1237*/
2b63536f 1238static const unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1239 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1240 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1241};
1242
1243/*
1244 STAC 9200-32 pin configs for
1245 102801C2 (Dell Latitude D620)
1246 102801C8
1247 102801CC (Dell Latitude D820)
1248 102801D4
1249 102801D6
1250*/
2b63536f 1251static const unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1252 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1253 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1254};
1255
1256/*
1257 STAC 9200-32 pin configs for
1258 102801CE (Dell XPS M1710)
1259 102801CF (Dell Precision M90)
1260*/
2b63536f 1261static const unsigned int dell9200_m23_pin_configs[8] = {
dfe495d0
TI		 1262 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1263 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1264};
1265
1266/*
1267 STAC 9200-32 pin configs for
1268 102801C9
1269 102801CA
1270 102801CB (Dell Latitude 120L)
1271 102801D3
1272*/
2b63536f 1273static const unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1274 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1275 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1276};
1277
1278/*
1279 STAC 9200-32 pin configs for
1280 102801BD (Dell Inspiron E1505n)
1281 102801EE
1282 102801EF
1283*/
2b63536f 1284static const unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1285 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1286 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1287};
1288
1289/*
1290 STAC 9200-32 pin configs for
1291 102801F5 (Dell Inspiron 1501)
1292 102801F6
1293*/
2b63536f 1294static const unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1295 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1296 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1297};
1298
1299/*
1300 STAC 9200-32
1301 102801CD (Dell Inspiron E1705/9400)
1302*/
2b63536f 1303static const unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1304 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1305 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1306};
1307
2b63536f 1308static const unsigned int oqo9200_pin_configs[8] = {
bf277785
TD		 1309 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1310 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1311};
1312
dfe495d0 1313
2b63536f 1314static const unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
f5fcc13c 1315 [STAC_REF] = ref9200_pin_configs,
bf277785 1316 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1317 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1318 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1319 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1320 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1321 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1322 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1323 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1324 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1325 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1326 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1327 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1328 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1329 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1330};
1331
ea734963 1332static const char * const stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1333 [STAC_AUTO] = "auto",
f5fcc13c 1334 [STAC_REF] = "ref",
bf277785 1335 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1336 [STAC_9200_DELL_D21] = "dell-d21",
1337 [STAC_9200_DELL_D22] = "dell-d22",
1338 [STAC_9200_DELL_D23] = "dell-d23",
1339 [STAC_9200_DELL_M21] = "dell-m21",
1340 [STAC_9200_DELL_M22] = "dell-m22",
1341 [STAC_9200_DELL_M23] = "dell-m23",
1342 [STAC_9200_DELL_M24] = "dell-m24",
1343 [STAC_9200_DELL_M25] = "dell-m25",
1344 [STAC_9200_DELL_M26] = "dell-m26",
1345 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1346 [STAC_9200_M4] = "gateway-m4",
1347 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1348 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1349};
1350
2b63536f 1351static const struct snd_pci_quirk stac9200_cfg_tbl[] = {
f5fcc13c
TI		 1352 /* SigmaTel reference board */
1353 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1354 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1355 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1356 "DFI LanParty", STAC_REF),
e7377071 1357 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1358 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1359 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1360 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1361 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1362 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1363 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1364 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1365 "unknown Dell", STAC_9200_DELL_D22),
1366 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1367 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1368 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1369 "Dell Latitude D620", STAC_9200_DELL_M22),
1370 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1371 "unknown Dell", STAC_9200_DELL_D23),
1372 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1373 "unknown Dell", STAC_9200_DELL_D23),
1374 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1375 "unknown Dell", STAC_9200_DELL_M22),
1376 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1377 "unknown Dell", STAC_9200_DELL_M24),
1378 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1379 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1380 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1381 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1382 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1383 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1384 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1385 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1386 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1387 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1388 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1389 "Dell Precision M90", STAC_9200_DELL_M23),
1390 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1391 "unknown Dell", STAC_9200_DELL_M22),
1392 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1393 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1394 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1395 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1396 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1397 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1398 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1399 "unknown Dell", STAC_9200_DELL_D23),
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1401 "unknown Dell", STAC_9200_DELL_D23),
1402 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1403 "unknown Dell", STAC_9200_DELL_D21),
1404 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1405 "unknown Dell", STAC_9200_DELL_D23),
1406 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1407 "unknown Dell", STAC_9200_DELL_D21),
1408 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1409 "unknown Dell", STAC_9200_DELL_M25),
1410 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1411 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1412 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1413 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1414 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1415 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1416 /* Panasonic */
117f257d 1417 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1418 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1419 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1420 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1421 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1422 /* OQO Mobile */
1423 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1424 {} /* terminator */
1425};
1426
2b63536f 1427static const unsigned int ref925x_pin_configs[8] = {
8e21c34c 1428 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1429 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1430};
1431
2b63536f 1432static const unsigned int stac925xM1_pin_configs[8] = {
9cb36c2a
MCC		 1433 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1434 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1435};
1436
2b63536f 1437static const unsigned int stac925xM1_2_pin_configs[8] = {
9cb36c2a
MCC		 1438 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1439 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1440};
58eec423 1441
2b63536f 1442static const unsigned int stac925xM2_pin_configs[8] = {
9cb36c2a
MCC		 1443 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1444 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1445};
1446
2b63536f 1447static const unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1448 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1449 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1450};
1451
2b63536f 1452static const unsigned int stac925xM3_pin_configs[8] = {
9cb36c2a
MCC		 1453 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1454 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1455};
58eec423 1456
2b63536f 1457static const unsigned int stac925xM5_pin_configs[8] = {
9cb36c2a
MCC		 1458 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1459 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1460};
1461
2b63536f 1462static const unsigned int stac925xM6_pin_configs[8] = {
9cb36c2a
MCC		 1463 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1464 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1465};
1466
2b63536f 1467static const unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
8e21c34c 1468 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1469 [STAC_M1] = stac925xM1_pin_configs,
1470 [STAC_M1_2] = stac925xM1_2_pin_configs,
1471 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1472 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1473 [STAC_M3] = stac925xM3_pin_configs,
1474 [STAC_M5] = stac925xM5_pin_configs,
1475 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1476};
1477
ea734963 1478static const char * const stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1479 [STAC_925x_AUTO] = "auto",
8e21c34c 1480 [STAC_REF] = "ref",
9cb36c2a
MCC		 1481 [STAC_M1] = "m1",
1482 [STAC_M1_2] = "m1-2",
1483 [STAC_M2] = "m2",
8e21c34c 1484 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1485 [STAC_M3] = "m3",
1486 [STAC_M5] = "m5",
1487 [STAC_M6] = "m6",
8e21c34c
TD		 1488};
1489
2b63536f 1490static const struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1491 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1492 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1493 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1494 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1495 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1496 /* Not sure about the brand name for those */
1497 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1498 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1499 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1500 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1501 {} /* terminator */
8e21c34c
TD		 1502};
1503
2b63536f 1504static const struct snd_pci_quirk stac925x_cfg_tbl[] = {
8e21c34c
TD		 1505 /* SigmaTel reference board */
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1508 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1509
1510 /* Default table for unknown ID */
1511 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1512
8e21c34c
TD		 1513 {} /* terminator */
1514};
1515
2b63536f 1516static const unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1517 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1518 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1519 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1520 0x01452050,
1521};
1522
2b63536f 1523static const unsigned int dell_m6_pin_configs[13] = {
a7662640 1524 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1525 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1526 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1527 0x4f0000f0,
e1f0d669
MR		 1528};
1529
2b63536f 1530static const unsigned int alienware_m17x_pin_configs[13] = {
842ae638
TI		 1531 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1532 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1533 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1534 0x904601b0,
1535};
1536
2b63536f 1537static const unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1538 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1539 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF		 1540};
1541
2b63536f 1542static const unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1543 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1544 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1545 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1546 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1547 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1548 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1549 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR		 1550};
1551
ea734963 1552static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1553 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1554 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1555 [STAC_92HD73XX_REF] = "ref",
ae709440 1556 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1557 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1558 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1559 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1560 [STAC_DELL_EQ] = "dell-eq",
842ae638 1561 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1562};
1563
2b63536f 1564static const struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
e1f0d669
MR		 1565 /* SigmaTel reference board */
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1567 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1568 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1569 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1570 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1571 "Intel DG45ID", STAC_92HD73XX_INTEL),
1572 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1573 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1574 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1575 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1576 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1577 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1578 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1579 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1580 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1581 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1582 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1583 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1584 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1585 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1586 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1587 "unknown Dell", STAC_DELL_M6_DMIC),
1588 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1589 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1590 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1591 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1592 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1593 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1594 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1595 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1596 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1597 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf 1598 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
ffe535ed 1599 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
5c1bccf6 1600 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1601 "Dell Studio 1558", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1602 {} /* terminator */
1603};
1604
2b63536f 1605static const struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
842ae638
TI		 1606 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1607 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1608 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1609 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547 1610 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
b9ecc4ee 1611 "Alienware M17x R3", STAC_DELL_EQ),
842ae638
TI		 1612 {} /* terminator */
1613};
1614
2b63536f 1615static const unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1616 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1617 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1618 0x01451160, 0x98560170,
1619};
1620
2b63536f 1621static const unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI		 1622 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1623 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR		 1624 0x40f000f0, 0x40f000f0,
1625};
1626
f7f9bdfa
JW		 1627static const unsigned int dell_vostro_3500_pin_configs[10] = {
1628 0x02a11020, 0x0221101f, 0x400000f0, 0x90170110,
1629 0x400000f1, 0x400000f2, 0x400000f3, 0x90a60160,
1630 0x400000f4, 0x400000f5,
1631};
1632
2b63536f 1633static const unsigned int hp_dv7_4000_pin_configs[10] = {
48315590
SE		 1634 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1635 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1636 0x40f000f0, 0x40f000f0,
1637};
1638
0c27c180
VK		 1639static const unsigned int hp_cNB11_intquad_pin_configs[10] = {
1640 0x40f000f0, 0x0221101f, 0x02a11020, 0x92170110,
1641 0x40f000f0, 0x92170110, 0x40f000f0, 0xd5a30130,
1642 0x40f000f0, 0x40f000f0,
1643};
1644
2b63536f 1645static const unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
d0513fc6 1646 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1647 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1648 [STAC_DELL_S14] = dell_s14_pin_configs,
f7f9bdfa 1649 [STAC_DELL_VOSTRO_3500] = dell_vostro_3500_pin_configs,
0c27c180 1650 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = hp_cNB11_intquad_pin_configs,
48315590 1651 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
d0513fc6
MR		 1652};
1653
ea734963 1654static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1655 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1656 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1657 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1658 [STAC_DELL_S14] = "dell-s14",
f7f9bdfa 1659 [STAC_DELL_VOSTRO_3500] = "dell-vostro-3500",
0c27c180 1660 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = "hp_cNB11_intquad",
48315590 1661 [STAC_HP_DV7_4000] = "hp-dv7-4000",
d0513fc6
MR		 1662};
1663
2b63536f 1664static const struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
d0513fc6
MR		 1665 /* SigmaTel reference board */
1666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1667 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1668 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1669 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1670 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1671 "unknown Dell", STAC_DELL_S14),
f7f9bdfa
JW		 1672 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
1673 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
0c27c180
VK		 1674 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
1675 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1676 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
1677 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1678 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
1679 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1680 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
1681 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1682 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
1683 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1684 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
1685 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1686 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
1687 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1688 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
1689 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1690 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
1691 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1692 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
1693 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1694 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
1695 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1696 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
1697 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
1699 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1700 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
1701 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1702 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
1703 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
1705 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
1707 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1708 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
1709 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1710 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
1711 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1712 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
1713 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
574f3c4f 1714 {} /* terminator */
d0513fc6
MR		 1715};
1716
2b63536f 1717static const unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1718 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1719 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1720 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1721 0x00000000
e035b841
MR		 1722};
1723
2b63536f 1724static const unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1725 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1726 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1727 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1728 0x00000000
a7662640
MR		 1729};
1730
2b63536f 1731static const unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1732 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1733 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1734 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1735 0x00000000
a7662640
MR		 1736};
1737
2b63536f 1738static const unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1739 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1740 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1741 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1742 0x00000000
3a7abfd2
MR		 1743};
1744
2b63536f 1745static const unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
e035b841 1746 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1747 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1748 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1749 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1750 [STAC_HP_M4] = NULL,
2a6ce6e5 1751 [STAC_HP_DV4] = NULL,
1b0652eb 1752 [STAC_HP_DV5] = NULL,
ae6241fb 1753 [STAC_HP_HDX] = NULL,
514bf54c 1754 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1755};
1756
ea734963 1757static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1758 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1759 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1760 [STAC_DELL_M4_1] = "dell-m4-1",
1761 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1762 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1763 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1764 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1765 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1766 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1767 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 1768};
1769
2b63536f 1770static const struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
e035b841
MR		 1771 /* SigmaTel reference board */
1772 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1773 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1775 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 1776 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1777 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK		 1778 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1779 "HP", STAC_HP_DV5),
58d8395b
TI		 1780 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1781 "HP", STAC_HP_DV5),
2ae466f8 1782 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1783 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 1784 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1785 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 1786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1787 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1789 "HP mini 1000", STAC_HP_M4),
ae6241fb 1790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1791 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 1792 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1793 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 1794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1795 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 1796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1797 "HP DV6", STAC_HP_DV5),
1972d025
TI		 1798 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1799 "HP", STAC_HP_DV5),
a7662640
MR		 1800 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1801 "unknown Dell", STAC_DELL_M4_1),
1802 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1803 "unknown Dell", STAC_DELL_M4_1),
1804 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1805 "unknown Dell", STAC_DELL_M4_1),
1806 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1807 "unknown Dell", STAC_DELL_M4_1),
1808 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1809 "unknown Dell", STAC_DELL_M4_1),
1810 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1811 "unknown Dell", STAC_DELL_M4_1),
1812 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1813 "unknown Dell", STAC_DELL_M4_1),
1814 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1815 "unknown Dell", STAC_DELL_M4_2),
1816 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1817 "unknown Dell", STAC_DELL_M4_2),
1818 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1819 "unknown Dell", STAC_DELL_M4_2),
1820 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1821 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1822 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1823 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1824 {} /* terminator */
1825};
1826
2b63536f 1827static const unsigned int ref922x_pin_configs[10] = {
403d1944
MP		 1828 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1829 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1830 0x40000100, 0x40000100,
1831};
1832
dfe495d0
TI		 1833/*
1834 STAC 922X pin configs for
1835 102801A7
1836 102801AB
1837 102801A9
1838 102801D1
1839 102801D2
1840*/
2b63536f 1841static const unsigned int dell_922x_d81_pin_configs[10] = {
dfe495d0
TI		 1842 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1843 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1844 0x01813122, 0x400001f2,
1845};
1846
1847/*
1848 STAC 922X pin configs for
1849 102801AC
1850 102801D0
1851*/
2b63536f 1852static const unsigned int dell_922x_d82_pin_configs[10] = {
dfe495d0
TI		 1853 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1854 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1855 0x01813122, 0x400001f1,
1856};
1857
1858/*
1859 STAC 922X pin configs for
1860 102801BF
1861*/
2b63536f 1862static const unsigned int dell_922x_m81_pin_configs[10] = {
dfe495d0
TI		 1863 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1864 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1865 0x40C003f1, 0x405003f0,
1866};
1867
1868/*
1869 STAC 9221 A1 pin configs for
1870 102801D7 (Dell XPS M1210)
1871*/
2b63536f 1872static const unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1873 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1874 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1875 0x508003f3, 0x405003f4,
1876};
1877
2b63536f 1878static const unsigned int d945gtp3_pin_configs[10] = {
869264c4 1879 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1880 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1881 0x02a19120, 0x40000100,
1882};
1883
2b63536f 1884static const unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1885 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1886 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1887 0x02a19320, 0x40000100,
1888};
1889
2b63536f 1890static const unsigned int intel_mac_v1_pin_configs[10] = {
5d5d3bc3
IZ		 1891 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1892 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1893 0x400000fc, 0x400000fb,
1894};
1895
2b63536f 1896static const unsigned int intel_mac_v2_pin_configs[10] = {
5d5d3bc3
IZ		 1897 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1898 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1899 0x400000fc, 0x400000fb,
6f0778d8
NB		 1900};
1901
2b63536f 1902static const unsigned int intel_mac_v3_pin_configs[10] = {
5d5d3bc3
IZ		 1903 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1904 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1905 0x400000fc, 0x400000fb,
1906};
1907
2b63536f 1908static const unsigned int intel_mac_v4_pin_configs[10] = {
5d5d3bc3
IZ		 1909 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1910 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1911 0x400000fc, 0x400000fb,
1912};
1913
2b63536f 1914static const unsigned int intel_mac_v5_pin_configs[10] = {
5d5d3bc3
IZ		 1915 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1916 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1917 0x400000fc, 0x400000fb,
0dae0f83
TI		 1918};
1919
2b63536f 1920static const unsigned int ecs202_pin_configs[10] = {
8c650087
MCC		 1921 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1922 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1923 0x9037012e, 0x40e000f2,
1924};
76c08828 1925
2b63536f 1926static const unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1927 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1928 [STAC_D945GTP3] = d945gtp3_pin_configs,
1929 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1930 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1931 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1932 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1933 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1934 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1935 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1936 /* for backward compatibility */
5d5d3bc3
IZ		 1937 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1938 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1939 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1940 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1941 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1942 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1943 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1944 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1945 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1946 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1947 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1948};
1949
ea734963 1950static const char * const stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1951 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 1952 [STAC_D945_REF] = "ref",
1953 [STAC_D945GTP5] = "5stack",
1954 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1955 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1956 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1957 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1958 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1959 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1960 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1961 /* for backward compatibility */
f5fcc13c 1962 [STAC_MACMINI] = "macmini",
3fc24d85 1963 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1964 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1965 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1966 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1967 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1968 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1969 [STAC_922X_DELL_D81] = "dell-d81",
1970 [STAC_922X_DELL_D82] = "dell-d82",
1971 [STAC_922X_DELL_M81] = "dell-m81",
1972 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1973};
1974
2b63536f 1975static const struct snd_pci_quirk stac922x_cfg_tbl[] = {
f5fcc13c
TI		 1976 /* SigmaTel reference board */
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1978 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 1979 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1980 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 1981 /* Intel 945G based systems */
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1983 "Intel D945G", STAC_D945GTP3),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1985 "Intel D945G", STAC_D945GTP3),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1987 "Intel D945G", STAC_D945GTP3),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1989 "Intel D945G", STAC_D945GTP3),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1991 "Intel D945G", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1993 "Intel D945G", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1995 "Intel D945G", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2011 "Intel D945G", STAC_D945GTP3),
2012 /* Intel D945G 5-stack systems */
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2014 "Intel D945G", STAC_D945GTP5),
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2016 "Intel D945G", STAC_D945GTP5),
2017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2018 "Intel D945G", STAC_D945GTP5),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2020 "Intel D945G", STAC_D945GTP5),
2021 /* Intel 945P based systems */
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2023 "Intel D945P", STAC_D945GTP3),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2025 "Intel D945P", STAC_D945GTP3),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2027 "Intel D945P", STAC_D945GTP3),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2029 "Intel D945P", STAC_D945GTP3),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2031 "Intel D945P", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2033 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 2034 /* other intel */
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2036 "Intel D945", STAC_D945_REF),
f5fcc13c 2037 /* other systems */
536319af 2038 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2039 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2040 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2041 /* Dell systems */
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2043 "unknown Dell", STAC_922X_DELL_D81),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2045 "unknown Dell", STAC_922X_DELL_D81),
2046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2047 "unknown Dell", STAC_922X_DELL_D81),
2048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2049 "unknown Dell", STAC_922X_DELL_D82),
2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2051 "unknown Dell", STAC_922X_DELL_M81),
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2053 "unknown Dell", STAC_922X_DELL_D82),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2055 "unknown Dell", STAC_922X_DELL_D81),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2057 "unknown Dell", STAC_922X_DELL_D81),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2059 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2060 /* ECS/PC Chips boards */
dea0a509 2061 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2062 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2063 {} /* terminator */
2064};
2065
2b63536f 2066static const unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2067 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2068 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2069 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2070 0x01c42190, 0x40000100,
3cc08dc6
MP		 2071};
2072
2b63536f 2073static const unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2074 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2075 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2076 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2077 0x40000100, 0x40000100
2078};
2079
2b63536f 2080static const unsigned int d965_5st_pin_configs[14] = {
93ed1503
TD		 2081 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2082 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2083 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2084 0x40000100, 0x40000100
2085};
2086
2b63536f 2087static const unsigned int d965_5st_no_fp_pin_configs[14] = {
679d92ed
TI		 2088 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2089 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2090 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2091 0x40000100, 0x40000100
2092};
2093
2b63536f 2094static const unsigned int dell_3st_pin_configs[14] = {
4ff076e5
TD		 2095 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2096 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2097 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2098 0x40c003fc, 0x40000100
2099};
2100
2b63536f 2101static const unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2102 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2103 [STAC_D965_REF] = ref927x_pin_configs,
2104 [STAC_D965_3ST] = d965_3st_pin_configs,
2105 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2106 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2107 [STAC_DELL_3ST] = dell_3st_pin_configs,
2108 [STAC_DELL_BIOS] = NULL,
54930531 2109 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP		 2110};
2111
ea734963 2112static const char * const stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2113 [STAC_927X_AUTO] = "auto",
e28d8322 2114 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2115 [STAC_D965_REF] = "ref",
2116 [STAC_D965_3ST] = "3stack",
2117 [STAC_D965_5ST] = "5stack",
679d92ed 2118 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2119 [STAC_DELL_3ST] = "dell-3stack",
2120 [STAC_DELL_BIOS] = "dell-bios",
54930531 2121 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI		 2122};
2123
2b63536f 2124static const struct snd_pci_quirk stac927x_cfg_tbl[] = {
f5fcc13c
TI		 2125 /* SigmaTel reference board */
2126 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2127 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2128 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2129 "DFI LanParty", STAC_D965_REF),
81d3dbde 2130 /* Intel 946 based systems */
f5fcc13c
TI		 2131 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2132 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2133 /* 965 based 3 stack systems */
dea0a509
TI		 2134 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2135 "Intel D965", STAC_D965_3ST),
2136 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2137 "Intel D965", STAC_D965_3ST),
4ff076e5 2138 /* Dell 3 stack systems */
dfe495d0 2139 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2141 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2142 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2143 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2144 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2145 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2146 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2147 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2148 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2152 /* 965 based 5 stack systems */
dea0a509
TI		 2153 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2154 "Intel D965", STAC_D965_5ST),
2155 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2156 "Intel D965", STAC_D965_5ST),
54930531
TI		 2157 /* volume-knob fixes */
2158 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 2159 {} /* terminator */
2160};
2161
2b63536f 2162static const unsigned int ref9205_pin_configs[12] = {
f3302a59 2163 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2164 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2165 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2166};
2167
dfe495d0
TI		 2168/*
2169 STAC 9205 pin configs for
2170 102801F1
2171 102801F2
2172 102801FC
2173 102801FD
2174 10280204
2175 1028021F
3fa2ef74 2176 10280228 (Dell Vostro 1500)
95e70e87 2177 10280229 (Dell Vostro 1700)
dfe495d0 2178*/
2b63536f 2179static const unsigned int dell_9205_m42_pin_configs[12] = {
dfe495d0
TI		 2180 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2181 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2182 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2183};
2184
2185/*
2186 STAC 9205 pin configs for
2187 102801F9
2188 102801FA
2189 102801FE
2190 102801FF (Dell Precision M4300)
2191 10280206
2192 10280200
2193 10280201
2194*/
2b63536f 2195static const unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2196 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2197 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2198 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2199};
2200
2b63536f 2201static const unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2202 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2203 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2204 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2205};
2206
2b63536f 2207static const unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2208 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2209 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2210 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2211 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2212 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2213};
2214
ea734963 2215static const char * const stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2216 [STAC_9205_AUTO] = "auto",
f5fcc13c 2217 [STAC_9205_REF] = "ref",
dfe495d0 2218 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2219 [STAC_9205_DELL_M43] = "dell-m43",
2220 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2221 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2222};
2223
2b63536f 2224static const struct snd_pci_quirk stac9205_cfg_tbl[] = {
f5fcc13c
TI		 2225 /* SigmaTel reference board */
2226 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2227 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2228 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2229 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2230 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2231 "DFI LanParty", STAC_9205_REF),
d9a4268e 2232 /* Dell */
dfe495d0
TI		 2233 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2234 "unknown Dell", STAC_9205_DELL_M42),
2235 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2236 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2237 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2238 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2239 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2240 "Dell Precision", STAC_9205_DELL_M43),
2241 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2242 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2243 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2244 "unknown Dell", STAC_9205_DELL_M42),
2245 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2246 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2247 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2248 "Dell Precision", STAC_9205_DELL_M43),
2249 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2250 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2251 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2252 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2253 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2254 "Dell Precision", STAC_9205_DELL_M43),
2255 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2256 "Dell Precision", STAC_9205_DELL_M43),
2257 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2258 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2259 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2260 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2261 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2262 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA		 2263 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2264 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2265 /* Gateway */
42b95f0c 2266 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2267 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2268 {} /* terminator */
2269};
2270
330ee995 2271static void stac92xx_set_config_regs(struct hda_codec *codec,
2b63536f 2272 const unsigned int *pincfgs)
11b44bbd
RF		 2273{
2274 int i;
2275 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2276
330ee995
TI		 2277 if (!pincfgs)
2278 return;
11b44bbd 2279
87d48363 2280 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2281 if (spec->pin_nids[i] && pincfgs[i])
2282 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2283 pincfgs[i]);
af9f341a
TI		 2284}
2285
dabbed6f 2286/*
c7d4b2fa 2287 * Analog playback callbacks
dabbed6f 2288 */
c7d4b2fa
M		 2289static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2290 struct hda_codec *codec,
c8b6bf9b 2291 struct snd_pcm_substream *substream)
2f2f4251 2292{
dabbed6f 2293 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2294 if (spec->stream_delay)
2295 msleep(spec->stream_delay);
9a08160b
TI		 2296 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2297 hinfo);
2f2f4251
M		 2298}
2299
2f2f4251
M		 2300static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2301 struct hda_codec *codec,
2302 unsigned int stream_tag,
2303 unsigned int format,
c8b6bf9b 2304 struct snd_pcm_substream *substream)
2f2f4251
M		 2305{
2306 struct sigmatel_spec *spec = codec->spec;
403d1944 2307 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2308}
2309
2310static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2311 struct hda_codec *codec,
c8b6bf9b 2312 struct snd_pcm_substream *substream)
2f2f4251
M		 2313{
2314 struct sigmatel_spec *spec = codec->spec;
2315 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2316}
2317
dabbed6f
M		 2318/*
2319 * Digital playback callbacks
2320 */
2321static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2322 struct hda_codec *codec,
c8b6bf9b 2323 struct snd_pcm_substream *substream)
dabbed6f
M		 2324{
2325 struct sigmatel_spec *spec = codec->spec;
2326 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2327}
2328
2329static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2330 struct hda_codec *codec,
c8b6bf9b 2331 struct snd_pcm_substream *substream)
dabbed6f
M		 2332{
2333 struct sigmatel_spec *spec = codec->spec;
2334 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2335}
2336
6b97eb45
TI		 2337static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2338 struct hda_codec *codec,
2339 unsigned int stream_tag,
2340 unsigned int format,
2341 struct snd_pcm_substream *substream)
2342{
2343 struct sigmatel_spec *spec = codec->spec;
2344 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2345 stream_tag, format, substream);
2346}
2347
9411e21c
TI		 2348static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2349 struct hda_codec *codec,
2350 struct snd_pcm_substream *substream)
2351{
2352 struct sigmatel_spec *spec = codec->spec;
2353 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2354}
2355
dabbed6f 2356
2f2f4251
M		 2357/*
2358 * Analog capture callbacks
2359 */
2360static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2361 struct hda_codec *codec,
2362 unsigned int stream_tag,
2363 unsigned int format,
c8b6bf9b 2364 struct snd_pcm_substream *substream)
2f2f4251
M		 2365{
2366 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2367 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2368
8daaaa97
MR		 2369 if (spec->powerdown_adcs) {
2370 msleep(40);
8c2f767b 2371 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2372 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2373 }
2374 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2375 return 0;
2376}
2377
2378static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2379 struct hda_codec *codec,
c8b6bf9b 2380 struct snd_pcm_substream *substream)
2f2f4251
M		 2381{
2382 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2383 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2384
8daaaa97
MR		 2385 snd_hda_codec_cleanup_stream(codec, nid);
2386 if (spec->powerdown_adcs)
8c2f767b 2387 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2388 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2389 return 0;
2390}
2391
2b63536f 2392static const struct hda_pcm_stream stac92xx_pcm_digital_playback = {
dabbed6f
M		 2393 .substreams = 1,
2394 .channels_min = 2,
2395 .channels_max = 2,
2396 /* NID is set in stac92xx_build_pcms */
2397 .ops = {
2398 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2399 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2400 .prepare = stac92xx_dig_playback_pcm_prepare,
2401 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2402 },
2403};
2404
2b63536f 2405static const struct hda_pcm_stream stac92xx_pcm_digital_capture = {
dabbed6f
M		 2406 .substreams = 1,
2407 .channels_min = 2,
2408 .channels_max = 2,
2409 /* NID is set in stac92xx_build_pcms */
2410};
2411
2b63536f 2412static const struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2f2f4251
M		 2413 .substreams = 1,
2414 .channels_min = 2,
c7d4b2fa 2415 .channels_max = 8,
2f2f4251
M		 2416 .nid = 0x02, /* NID to query formats and rates */
2417 .ops = {
2418 .open = stac92xx_playback_pcm_open,
2419 .prepare = stac92xx_playback_pcm_prepare,
2420 .cleanup = stac92xx_playback_pcm_cleanup
2421 },
2422};
2423
2b63536f 2424static const struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
3cc08dc6
MP		 2425 .substreams = 1,
2426 .channels_min = 2,
2427 .channels_max = 2,
2428 .nid = 0x06, /* NID to query formats and rates */
2429 .ops = {
2430 .open = stac92xx_playback_pcm_open,
2431 .prepare = stac92xx_playback_pcm_prepare,
2432 .cleanup = stac92xx_playback_pcm_cleanup
2433 },
2434};
2435
2b63536f 2436static const struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2437 .channels_min = 2,
2438 .channels_max = 2,
9e05b7a3 2439 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2440 .ops = {
2441 .prepare = stac92xx_capture_pcm_prepare,
2442 .cleanup = stac92xx_capture_pcm_cleanup
2443 },
2444};
2445
2446static int stac92xx_build_pcms(struct hda_codec *codec)
2447{
2448 struct sigmatel_spec *spec = codec->spec;
2449 struct hda_pcm *info = spec->pcm_rec;
2450
2451 codec->num_pcms = 1;
2452 codec->pcm_info = info;
2453
c7d4b2fa 2454 info->name = "STAC92xx Analog";
2f2f4251 2455 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2456 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2457 spec->multiout.dac_nids[0];
2f2f4251 2458 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2459 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2460 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2461
2462 if (spec->alt_switch) {
2463 codec->num_pcms++;
2464 info++;
2465 info->name = "STAC92xx Analog Alt";
2466 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2467 }
2f2f4251 2468
dabbed6f
M		 2469 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2470 codec->num_pcms++;
2471 info++;
2472 info->name = "STAC92xx Digital";
0852d7a6 2473 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2474 if (spec->multiout.dig_out_nid) {
2475 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2476 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2477 }
2478 if (spec->dig_in_nid) {
2479 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2480 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2481 }
2482 }
2483
2f2f4251
M		 2484 return 0;
2485}
2486
7c922de7
NL		 2487static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2488 hda_nid_t nid)
c960a03b 2489{
1327a32b 2490 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI		 2491 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2492 if (pincap & AC_PINCAP_VREF_100)
2493 return AC_PINCTL_VREF_100;
2494 if (pincap & AC_PINCAP_VREF_80)
2495 return AC_PINCTL_VREF_80;
2496 if (pincap & AC_PINCAP_VREF_50)
2497 return AC_PINCTL_VREF_50;
2498 if (pincap & AC_PINCAP_VREF_GRD)
2499 return AC_PINCTL_VREF_GRD;
2500 return 0;
2501}
2502
403d1944
MP		 2503static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2504
2505{
82beb8fd
TI		 2506 snd_hda_codec_write_cache(codec, nid, 0,
2507 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2508}
2509
7c2ba97b
MR		 2510#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2511
2512static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2513 struct snd_ctl_elem_value *ucontrol)
2514{
2515 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2516 struct sigmatel_spec *spec = codec->spec;
2517
d7a89436 2518 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2519 return 0;
2520}
2521
62558ce1 2522static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2523
7c2ba97b
MR		 2524static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2525 struct snd_ctl_elem_value *ucontrol)
2526{
2527 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2528 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2529 int nid = kcontrol->private_value;
2530
2531 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b 2532
25985edc 2533 /* check to be sure that the ports are up to date with
7c2ba97b
MR		 2534 * switch changes
2535 */
62558ce1 2536 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2537
2538 return 1;
2539}
2540
7c922de7
NL		 2541static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2542 struct snd_ctl_elem_info *uinfo)
2543{
2544 int i;
2b63536f 2545 static const char * const texts[] = {
7c922de7
NL		 2546 "Mic In", "Line In", "Line Out"
2547 };
2548
2549 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2550 struct sigmatel_spec *spec = codec->spec;
2551 hda_nid_t nid = kcontrol->private_value;
2552
2553 if (nid == spec->mic_switch || nid == spec->line_switch)
2554 i = 3;
2555 else
2556 i = 2;
2557
2558 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2559 uinfo->value.enumerated.items = i;
2560 uinfo->count = 1;
2561 if (uinfo->value.enumerated.item >= i)
2562 uinfo->value.enumerated.item = i-1;
2563 strcpy(uinfo->value.enumerated.name,
2564 texts[uinfo->value.enumerated.item]);
2565
2566 return 0;
2567}
2568
2569static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2570 struct snd_ctl_elem_value *ucontrol)
2571{
2572 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2573 hda_nid_t nid = kcontrol->private_value;
2574 unsigned int vref = stac92xx_vref_get(codec, nid);
2575
2576 if (vref == stac92xx_get_default_vref(codec, nid))
2577 ucontrol->value.enumerated.item[0] = 0;
2578 else if (vref == AC_PINCTL_VREF_GRD)
2579 ucontrol->value.enumerated.item[0] = 1;
2580 else if (vref == AC_PINCTL_VREF_HIZ)
2581 ucontrol->value.enumerated.item[0] = 2;
2582
2583 return 0;
2584}
2585
2586static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2587 struct snd_ctl_elem_value *ucontrol)
2588{
2589 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2590 unsigned int new_vref = 0;
b8621516 2591 int error;
7c922de7
NL		 2592 hda_nid_t nid = kcontrol->private_value;
2593
2594 if (ucontrol->value.enumerated.item[0] == 0)
2595 new_vref = stac92xx_get_default_vref(codec, nid);
2596 else if (ucontrol->value.enumerated.item[0] == 1)
2597 new_vref = AC_PINCTL_VREF_GRD;
2598 else if (ucontrol->value.enumerated.item[0] == 2)
2599 new_vref = AC_PINCTL_VREF_HIZ;
2600 else
2601 return 0;
2602
2603 if (new_vref != stac92xx_vref_get(codec, nid)) {
2604 error = stac92xx_vref_set(codec, nid, new_vref);
2605 return error;
2606 }
2607
2608 return 0;
2609}
2610
2611static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2612 struct snd_ctl_elem_info *uinfo)
2613{
2b63536f 2614 char *texts[2];
7c922de7
NL		 2615 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2616 struct sigmatel_spec *spec = codec->spec;
2617
2618 if (kcontrol->private_value == spec->line_switch)
2619 texts[0] = "Line In";
2620 else
2621 texts[0] = "Mic In";
2622 texts[1] = "Line Out";
2623 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2624 uinfo->value.enumerated.items = 2;
2625 uinfo->count = 1;
2626
2627 if (uinfo->value.enumerated.item >= 2)
2628 uinfo->value.enumerated.item = 1;
2629 strcpy(uinfo->value.enumerated.name,
2630 texts[uinfo->value.enumerated.item]);
2631
2632 return 0;
2633}
403d1944
MP		 2634
2635static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2636{
2637 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2638 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2639 hda_nid_t nid = kcontrol->private_value;
2640 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2641
7c922de7 2642 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2643 return 0;
2644}
2645
2646static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2647{
2648 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2649 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2650 hda_nid_t nid = kcontrol->private_value;
2651 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2652 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2653
2654 spec->io_switch[io_idx] = val;
2655
2656 if (val)
2657 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2658 else {
2659 unsigned int pinctl = AC_PINCTL_IN_EN;
2660 if (io_idx) /* set VREF for mic */
7c922de7 2661 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI		 2662 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2663 }
40c1d308
JZ		 2664
2665 /* check the auto-mute again: we need to mute/unmute the speaker
2666 * appropriately according to the pin direction
2667 */
2668 if (spec->hp_detect)
62558ce1 2669 stac_issue_unsol_event(codec, nid);
40c1d308 2670
403d1944
MP		 2671 return 1;
2672}
2673
0fb87bb4
ML		 2674#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2675
2676static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2677 struct snd_ctl_elem_value *ucontrol)
2678{
2679 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2680 struct sigmatel_spec *spec = codec->spec;
2681
2682 ucontrol->value.integer.value[0] = spec->clfe_swap;
2683 return 0;
2684}
2685
2686static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2687 struct snd_ctl_elem_value *ucontrol)
2688{
2689 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2690 struct sigmatel_spec *spec = codec->spec;
2691 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2692 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2693
68ea7b2f 2694 if (spec->clfe_swap == val)
0fb87bb4
ML		 2695 return 0;
2696
68ea7b2f 2697 spec->clfe_swap = val;
0fb87bb4
ML		 2698
2699 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2700 spec->clfe_swap ? 0x4 : 0x0);
2701
2702 return 1;
2703}
2704
7c2ba97b
MR		 2705#define STAC_CODEC_HP_SWITCH(xname) \
2706 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2707 .name = xname, \
2708 .index = 0, \
2709 .info = stac92xx_hp_switch_info, \
2710 .get = stac92xx_hp_switch_get, \
2711 .put = stac92xx_hp_switch_put, \
2712 }
2713
403d1944
MP		 2714#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2715 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2716 .name = xname, \
2717 .index = 0, \
2718 .info = stac92xx_io_switch_info, \
2719 .get = stac92xx_io_switch_get, \
2720 .put = stac92xx_io_switch_put, \
2721 .private_value = xpval, \
2722 }
2723
0fb87bb4
ML		 2724#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2725 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2726 .name = xname, \
2727 .index = 0, \
2728 .info = stac92xx_clfe_switch_info, \
2729 .get = stac92xx_clfe_switch_get, \
2730 .put = stac92xx_clfe_switch_put, \
2731 .private_value = xpval, \
2732 }
403d1944 2733
c7d4b2fa
M		 2734enum {
2735 STAC_CTL_WIDGET_VOL,
2736 STAC_CTL_WIDGET_MUTE,
123c07ae 2737 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2738 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2739 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2740 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2741 STAC_CTL_WIDGET_CLFE_SWITCH,
2742 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2743};
2744
2b63536f 2745static const struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2746 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2747 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2748 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2749 STAC_MONO_MUX,
7c2ba97b 2750 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2751 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2752 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2753 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2754};
2755
2756/* add dynamic controls */
e3c75964
TI		 2757static struct snd_kcontrol_new *
2758stac_control_new(struct sigmatel_spec *spec,
2b63536f 2759 const struct snd_kcontrol_new *ktemp,
4d02d1b6 2760 const char *name,
5e26dfd0 2761 unsigned int subdev)
c7d4b2fa 2762{
c8b6bf9b 2763 struct snd_kcontrol_new *knew;
c7d4b2fa 2764
603c4019
TI		 2765 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2766 knew = snd_array_new(&spec->kctls);
2767 if (!knew)
e3c75964 2768 return NULL;
4d4e9bb3 2769 *knew = *ktemp;
82fe0c58 2770 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2771 if (!knew->name) {
2772 /* roolback */
2773 memset(knew, 0, sizeof(*knew));
2774 spec->kctls.alloced--;
2775 return NULL;
2776 }
5e26dfd0 2777 knew->subdevice = subdev;
e3c75964
TI		 2778 return knew;
2779}
2780
2781static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2b63536f 2782 const struct snd_kcontrol_new *ktemp,
e3c75964
TI		 2783 int idx, const char *name,
2784 unsigned long val)
2785{
4d02d1b6 2786 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2787 HDA_SUBDEV_AMP_FLAG);
e3c75964 2788 if (!knew)
c7d4b2fa 2789 return -ENOMEM;
e3c75964 2790 knew->index = idx;
c7d4b2fa 2791 knew->private_value = val;
c7d4b2fa
M		 2792 return 0;
2793}
2794
4d4e9bb3
TI		 2795static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2796 int type, int idx, const char *name,
2797 unsigned long val)
2798{
2799 return stac92xx_add_control_temp(spec,
2800 &stac92xx_control_templates[type],
2801 idx, name, val);
2802}
2803
4682eee0
MR		 2804
2805/* add dynamic controls */
4d4e9bb3
TI		 2806static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2807 const char *name, unsigned long val)
4682eee0
MR		 2808{
2809 return stac92xx_add_control_idx(spec, type, 0, name, val);
2810}
2811
2b63536f 2812static const struct snd_kcontrol_new stac_input_src_temp = {
e3c75964
TI		 2813 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2814 .name = "Input Source",
2815 .info = stac92xx_mux_enum_info,
2816 .get = stac92xx_mux_enum_get,
2817 .put = stac92xx_mux_enum_put,
2818};
2819
7c922de7
NL		 2820static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2821 hda_nid_t nid, int idx)
2822{
2823 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2824 int control = 0;
2825 struct sigmatel_spec *spec = codec->spec;
2826 char name[22];
2827
99ae28be 2828 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
7c922de7
NL		 2829 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2830 && nid == spec->line_switch)
2831 control = STAC_CTL_WIDGET_IO_SWITCH;
2832 else if (snd_hda_query_pin_caps(codec, nid)
2833 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2834 control = STAC_CTL_WIDGET_DC_BIAS;
2835 else if (nid == spec->mic_switch)
2836 control = STAC_CTL_WIDGET_IO_SWITCH;
2837 }
2838
2839 if (control) {
201e06ff
TI		 2840 snd_hda_get_pin_label(codec, nid, &spec->autocfg,
2841 name, sizeof(name), NULL);
7c922de7
NL		 2842 return stac92xx_add_control(codec->spec, control,
2843 strcat(name, " Jack Mode"), nid);
2844 }
2845
2846 return 0;
2847}
2848
e3c75964
TI		 2849static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2850{
2851 struct snd_kcontrol_new *knew;
2852 struct hda_input_mux *imux = &spec->private_imux;
2853
3d21d3f7
TI		 2854 if (spec->auto_mic)
2855 return 0; /* no need for input source */
e3c75964
TI		 2856 if (!spec->num_adcs || imux->num_items <= 1)
2857 return 0; /* no need for input source control */
2858 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2859 stac_input_src_temp.name, 0);
e3c75964
TI		 2860 if (!knew)
2861 return -ENOMEM;
2862 knew->count = spec->num_adcs;
2863 return 0;
2864}
2865
c21ca4a8
TI		 2866/* check whether the line-input can be used as line-out */
2867static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2868{
2869 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2870 struct auto_pin_cfg *cfg = &spec->autocfg;
2871 hda_nid_t nid;
2872 unsigned int pincap;
eea7dc93 2873 int i;
8e9068b1 2874
c21ca4a8
TI		 2875 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2876 return 0;
eea7dc93 2877 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 2878 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI		 2879 nid = cfg->inputs[i].pin;
2880 pincap = snd_hda_query_pin_caps(codec, nid);
2881 if (pincap & AC_PINCAP_OUT)
2882 return nid;
2883 }
2884 }
c21ca4a8
TI		 2885 return 0;
2886}
403d1944 2887
eea7dc93
TI		 2888static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2889
c21ca4a8 2890/* check whether the mic-input can be used as line-out */
eea7dc93 2891static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI		 2892{
2893 struct sigmatel_spec *spec = codec->spec;
2894 struct auto_pin_cfg *cfg = &spec->autocfg;
2895 unsigned int def_conf, pincap;
86e2959a 2896 int i;
c21ca4a8 2897
eea7dc93 2898 *dac = 0;
c21ca4a8
TI		 2899 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2900 return 0;
eea7dc93
TI		 2901 for (i = 0; i < cfg->num_inputs; i++) {
2902 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 2903 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 2904 continue;
330ee995 2905 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 2906 /* some laptops have an internal analog microphone
2907 * which can't be used as a output */
99ae28be 2908 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 2909 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI		 2910 if (pincap & AC_PINCAP_OUT) {
2911 *dac = get_unassigned_dac(codec, nid);
2912 if (*dac)
2913 return nid;
2914 }
403d1944 2915 }
403d1944 2916 }
403d1944
MP		 2917 return 0;
2918}
2919
7b043899
SL		 2920static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2921{
2922 int i;
2923
2924 for (i = 0; i < spec->multiout.num_dacs; i++) {
2925 if (spec->multiout.dac_nids[i] == nid)
2926 return 1;
2927 }
2928
2929 return 0;
2930}
2931
c21ca4a8
TI		 2932static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2933{
2934 int i;
2935 if (is_in_dac_nids(spec, nid))
2936 return 1;
2937 for (i = 0; i < spec->autocfg.hp_outs; i++)
2938 if (spec->hp_dacs[i] == nid)
2939 return 1;
2940 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2941 if (spec->speaker_dacs[i] == nid)
2942 return 1;
2943 return 0;
2944}
2945
2946static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2947{
2948 struct sigmatel_spec *spec = codec->spec;
48718eab 2949 struct auto_pin_cfg *cfg = &spec->autocfg;
c21ca4a8 2950 int j, conn_len;
48718eab 2951 hda_nid_t conn[HDA_MAX_CONNECTIONS], fallback_dac;
c21ca4a8
TI		 2952 unsigned int wcaps, wtype;
2953
2954 conn_len = snd_hda_get_connections(codec, nid, conn,
2955 HDA_MAX_CONNECTIONS);
36706005
CC		 2956 /* 92HD88: trace back up the link of nids to find the DAC */
2957 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2958 != AC_WID_AUD_OUT)) {
2959 nid = conn[0];
2960 conn_len = snd_hda_get_connections(codec, nid, conn,
2961 HDA_MAX_CONNECTIONS);
2962 }
c21ca4a8 2963 for (j = 0; j < conn_len; j++) {
14bafe32 2964 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2965 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 2966 /* we check only analog outputs */
2967 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2968 continue;
2969 /* if this route has a free DAC, assign it */
2970 if (!check_all_dac_nids(spec, conn[j])) {
2971 if (conn_len > 1) {
2972 /* select this DAC in the pin's input mux */
2973 snd_hda_codec_write_cache(codec, nid, 0,
2974 AC_VERB_SET_CONNECT_SEL, j);
2975 }
2976 return conn[j];
2977 }
2978 }
48718eab
DH		 2979
2980 /* if all DACs are already assigned, connect to the primary DAC,
2981 unless we're assigning a secondary headphone */
2982 fallback_dac = spec->multiout.dac_nids[0];
2983 if (spec->multiout.hp_nid) {
2984 for (j = 0; j < cfg->hp_outs; j++)
2985 if (cfg->hp_pins[j] == nid) {
2986 fallback_dac = spec->multiout.hp_nid;
2987 break;
2988 }
2989 }
2990
ee58a7ca
TI		 2991 if (conn_len > 1) {
2992 for (j = 0; j < conn_len; j++) {
48718eab 2993 if (conn[j] == fallback_dac) {
ee58a7ca
TI		 2994 snd_hda_codec_write_cache(codec, nid, 0,
2995 AC_VERB_SET_CONNECT_SEL, j);
2996 break;
2997 }
2998 }
2999 }
c21ca4a8
TI		 3000 return 0;
3001}
3002
3003static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3004static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3005
3cc08dc6 3006/*
7b043899
SL		 3007 * Fill in the dac_nids table from the parsed pin configuration
3008 * This function only works when every pin in line_out_pins[]
3009 * contains atleast one DAC in its connection list. Some 92xx
3010 * codecs are not connected directly to a DAC, such as the 9200
3011 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 3012 */
c21ca4a8 3013static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 3014{
3015 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 3016 struct auto_pin_cfg *cfg = &spec->autocfg;
3017 int i;
3018 hda_nid_t nid, dac;
7b043899 3019
c7d4b2fa
M		 3020 for (i = 0; i < cfg->line_outs; i++) {
3021 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 3022 dac = get_unassigned_dac(codec, nid);
3023 if (!dac) {
df802952
TI		 3024 if (spec->multiout.num_dacs > 0) {
3025 /* we have already working output pins,
3026 * so let's drop the broken ones again
3027 */
3028 cfg->line_outs = spec->multiout.num_dacs;
3029 break;
3030 }
7b043899
SL		 3031 /* error out, no available DAC found */
3032 snd_printk(KERN_ERR
3033 "%s: No available DAC for pin 0x%x\n",
3034 __func__, nid);
3035 return -ENODEV;
3036 }
c21ca4a8
TI		 3037 add_spec_dacs(spec, dac);
3038 }
7b043899 3039
139e071b
TI		 3040 for (i = 0; i < cfg->hp_outs; i++) {
3041 nid = cfg->hp_pins[i];
3042 dac = get_unassigned_dac(codec, nid);
3043 if (dac) {
3044 if (!spec->multiout.hp_nid)
3045 spec->multiout.hp_nid = dac;
3046 else
3047 add_spec_extra_dacs(spec, dac);
3048 }
3049 spec->hp_dacs[i] = dac;
3050 }
3051
3052 for (i = 0; i < cfg->speaker_outs; i++) {
3053 nid = cfg->speaker_pins[i];
3054 dac = get_unassigned_dac(codec, nid);
3055 if (dac)
3056 add_spec_extra_dacs(spec, dac);
3057 spec->speaker_dacs[i] = dac;
3058 }
3059
c21ca4a8
TI		 3060 /* add line-in as output */
3061 nid = check_line_out_switch(codec);
3062 if (nid) {
3063 dac = get_unassigned_dac(codec, nid);
3064 if (dac) {
3065 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3066 nid, cfg->line_outs);
3067 cfg->line_out_pins[cfg->line_outs] = nid;
3068 cfg->line_outs++;
3069 spec->line_switch = nid;
3070 add_spec_dacs(spec, dac);
3071 }
3072 }
3073 /* add mic as output */
eea7dc93
TI		 3074 nid = check_mic_out_switch(codec, &dac);
3075 if (nid && dac) {
3076 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3077 nid, cfg->line_outs);
3078 cfg->line_out_pins[cfg->line_outs] = nid;
3079 cfg->line_outs++;
3080 spec->mic_switch = nid;
3081 add_spec_dacs(spec, dac);
c21ca4a8 3082 }
c7d4b2fa 3083
c21ca4a8 3084 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3085 spec->multiout.num_dacs,
3086 spec->multiout.dac_nids[0],
3087 spec->multiout.dac_nids[1],
3088 spec->multiout.dac_nids[2],
3089 spec->multiout.dac_nids[3],
3090 spec->multiout.dac_nids[4]);
c21ca4a8 3091
c7d4b2fa
M		 3092 return 0;
3093}
3094
eb06ed8f 3095/* create volume control/switch for the given prefx type */
668b9652
TI		 3096static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3097 int idx, hda_nid_t nid, int chs)
eb06ed8f 3098{
7c7767eb 3099 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3100 char name[32];
3101 int err;
3102
7c7767eb
TI		 3103 if (!spec->check_volume_offset) {
3104 unsigned int caps, step, nums, db_scale;
3105 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3106 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3107 AC_AMPCAP_STEP_SIZE_SHIFT;
3108 step = (step + 1) * 25; /* in .01dB unit */
3109 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3110 AC_AMPCAP_NUM_STEPS_SHIFT;
3111 db_scale = nums * step;
3112 /* if dB scale is over -64dB, and finer enough,
3113 * let's reduce it to half
3114 */
3115 if (db_scale > 6400 && nums >= 0x1f)
3116 spec->volume_offset = nums / 2;
3117 spec->check_volume_offset = 1;
3118 }
3119
eb06ed8f 3120 sprintf(name, "%s Playback Volume", pfx);
668b9652 3121 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 3122 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3123 spec->volume_offset));
eb06ed8f
TI		 3124 if (err < 0)
3125 return err;
3126 sprintf(name, "%s Playback Switch", pfx);
668b9652 3127 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 3128 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3129 if (err < 0)
3130 return err;
3131 return 0;
3132}
3133
668b9652
TI		 3134#define create_controls(codec, pfx, nid, chs) \
3135 create_controls_idx(codec, pfx, 0, nid, chs)
3136
ae0afd81
MR		 3137static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3138{
c21ca4a8 3139 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3140 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3141 return 1;
3142 } else {
dda14410
TI		 3143 snd_BUG_ON(spec->multiout.dac_nids != spec->dac_nids);
3144 spec->dac_nids[spec->multiout.num_dacs] = nid;
ae0afd81
MR		 3145 spec->multiout.num_dacs++;
3146 }
3147 return 0;
3148}
3149
c21ca4a8 3150static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3151{
c21ca4a8
TI		 3152 int i;
3153 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3154 if (!spec->multiout.extra_out_nid[i]) {
3155 spec->multiout.extra_out_nid[i] = nid;
3156 return 0;
3157 }
3158 }
3159 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3160 return 1;
ae0afd81
MR		 3161}
3162
dc04d1b4
TI		 3163/* Create output controls
3164 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3165 */
3166static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3167 const hda_nid_t *pins,
3168 const hda_nid_t *dac_nids,
3169 int type)
c7d4b2fa 3170{
76624534 3171 struct sigmatel_spec *spec = codec->spec;
ea734963 3172 static const char * const chname[4] = {
19039bd0
TI		 3173 "Front", "Surround", NULL /*CLFE*/, "Side"
3174 };
dc04d1b4 3175 hda_nid_t nid;
91589232
TI		 3176 int i, err;
3177 unsigned int wid_caps;
0fb87bb4 3178
dc04d1b4 3179 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c 3180 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
e35d9d6a 3181 if (is_jack_detectable(codec, pins[i]))
ffd0e56c
TI		 3182 spec->hp_detect = 1;
3183 }
dc04d1b4
TI		 3184 nid = dac_nids[i];
3185 if (!nid)
3186 continue;
3187 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3188 /* Center/LFE */
7c7767eb 3189 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3190 if (err < 0)
c7d4b2fa 3191 return err;
7c7767eb 3192 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3193 if (err < 0)
c7d4b2fa 3194 return err;
0fb87bb4
ML		 3195
3196 wid_caps = get_wcaps(codec, nid);
3197
3198 if (wid_caps & AC_WCAP_LR_SWAP) {
3199 err = stac92xx_add_control(spec,
3200 STAC_CTL_WIDGET_CLFE_SWITCH,
3201 "Swap Center/LFE Playback Switch", nid);
3202
3203 if (err < 0)
3204 return err;
3205 }
3206
c7d4b2fa 3207 } else {
dc04d1b4 3208 const char *name;
668b9652 3209 int idx;
dc04d1b4
TI		 3210 switch (type) {
3211 case AUTO_PIN_HP_OUT:
668b9652
TI		 3212 name = "Headphone";
3213 idx = i;
dc04d1b4
TI		 3214 break;
3215 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI		 3216 name = "Speaker";
3217 idx = i;
dc04d1b4
TI		 3218 break;
3219 default:
3220 name = chname[i];
668b9652 3221 idx = 0;
dc04d1b4 3222 break;
76624534 3223 }
668b9652 3224 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3225 if (err < 0)
c7d4b2fa
M		 3226 return err;
3227 }
3228 }
dc04d1b4
TI		 3229 return 0;
3230}
3231
6479c631
TI		 3232static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3233 unsigned long sw, int idx)
3234{
3235 int err;
3236 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3237 "Capture Volume", vol);
6479c631
TI		 3238 if (err < 0)
3239 return err;
3240 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3241 "Capture Switch", sw);
6479c631
TI		 3242 if (err < 0)
3243 return err;
3244 return 0;
3245}
3246
dc04d1b4
TI		 3247/* add playback controls from the parsed DAC table */
3248static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3249 const struct auto_pin_cfg *cfg)
3250{
3251 struct sigmatel_spec *spec = codec->spec;
7c922de7 3252 hda_nid_t nid;
dc04d1b4 3253 int err;
7c922de7 3254 int idx;
dc04d1b4
TI		 3255
3256 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3257 spec->multiout.dac_nids,
3258 cfg->line_out_type);
3259 if (err < 0)
3260 return err;
c7d4b2fa 3261
a9cb5c90 3262 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3263 err = stac92xx_add_control(spec,
3264 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3265 "Headphone as Line Out Switch",
3266 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3267 if (err < 0)
3268 return err;
3269 }
3270
eea7dc93 3271 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3272 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI		 3273 break;
3274 nid = cfg->inputs[idx].pin;
3275 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3276 if (err < 0)
3277 return err;
b5895dc8 3278 }
403d1944 3279
c7d4b2fa
M		 3280 return 0;
3281}
3282
eb06ed8f
TI		 3283/* add playback controls for Speaker and HP outputs */
3284static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3285 struct auto_pin_cfg *cfg)
3286{
3287 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3288 int err;
3289
3290 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3291 spec->hp_dacs, AUTO_PIN_HP_OUT);
3292 if (err < 0)
3293 return err;
3294
3295 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3296 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3297 if (err < 0)
3298 return err;
eb06ed8f 3299
c7d4b2fa
M		 3300 return 0;
3301}
3302
b22b4821 3303/* labels for mono mux outputs */
ea734963 3304static const char * const stac92xx_mono_labels[4] = {
d0513fc6 3305 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3306};
3307
3308/* create mono mux for mono out on capable codecs */
3309static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3310{
3311 struct sigmatel_spec *spec = codec->spec;
3312 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3313 int i, num_cons;
3314 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3315
3316 num_cons = snd_hda_get_connections(codec,
3317 spec->mono_nid,
3318 con_lst,
3319 HDA_MAX_NUM_INPUTS);
16a433d8 3320 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3321 return -EINVAL;
3322
10a20af7
TI		 3323 for (i = 0; i < num_cons; i++)
3324 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3325 NULL);
09a99959
MR		 3326
3327 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3328 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3329}
3330
1cd2224c
MR		 3331/* create PC beep volume controls */
3332static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3333 hda_nid_t nid)
3334{
3335 struct sigmatel_spec *spec = codec->spec;
3336 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK		 3337 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3338
3339 if (spec->anabeep_nid == nid)
3340 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR		 3341
3342 /* check for mute support for the the amp */
3343 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3344 err = stac92xx_add_control(spec, type,
d355c82a 3345 "Beep Playback Switch",
1cd2224c
MR		 3346 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3347 if (err < 0)
3348 return err;
3349 }
3350
3351 /* check to see if there is volume support for the amp */
3352 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3353 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3354 "Beep Playback Volume",
1cd2224c
MR		 3355 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3356 if (err < 0)
3357 return err;
3358 }
3359 return 0;
3360}
3361
4d4e9bb3
TI		 3362#ifdef CONFIG_SND_HDA_INPUT_BEEP
3363#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3364
3365static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3366 struct snd_ctl_elem_value *ucontrol)
3367{
3368 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3369 ucontrol->value.integer.value[0] = codec->beep->enabled;
3370 return 0;
3371}
3372
3373static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3374 struct snd_ctl_elem_value *ucontrol)
3375{
3376 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3377 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI		 3378}
3379
2b63536f 3380static const struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
4d4e9bb3
TI		 3381 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3382 .info = stac92xx_dig_beep_switch_info,
3383 .get = stac92xx_dig_beep_switch_get,
3384 .put = stac92xx_dig_beep_switch_put,
3385};
3386
3387static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3388{
3389 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3390 0, "Beep Playback Switch", 0);
4d4e9bb3
TI		 3391}
3392#endif
3393
4682eee0
MR		 3394static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3395{
3396 struct sigmatel_spec *spec = codec->spec;
667067d8 3397 int i, j, err = 0;
4682eee0
MR		 3398
3399 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3400 hda_nid_t nid;
3401 unsigned int wcaps;
3402 unsigned long val;
3403
4682eee0
MR		 3404 nid = spec->mux_nids[i];
3405 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3406 if (!(wcaps & AC_WCAP_OUT_AMP))
3407 continue;
4682eee0 3408
667067d8
TI		 3409 /* check whether already the same control was created as
3410 * normal Capture Volume.
3411 */
3412 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3413 for (j = 0; j < spec->num_caps; j++) {
3414 if (spec->capvols[j] == val)
3415 break;
4682eee0 3416 }
667067d8
TI		 3417 if (j < spec->num_caps)
3418 continue;
3419
3420 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3421 "Mux Capture Volume", val);
3422 if (err < 0)
3423 return err;
4682eee0
MR		 3424 }
3425 return 0;
3426};
3427
ea734963 3428static const char * const stac92xx_spdif_labels[3] = {
65973632 3429 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3430};
3431
3432static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3433{
3434 struct sigmatel_spec *spec = codec->spec;
3435 struct hda_input_mux *spdif_mux = &spec->private_smux;
ea734963 3436 const char * const *labels = spec->spdif_labels;
d9737751 3437 int i, num_cons;
65973632 3438 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3439
3440 num_cons = snd_hda_get_connections(codec,
3441 spec->smux_nids[0],
3442 con_lst,
3443 HDA_MAX_NUM_INPUTS);
16a433d8 3444 if (num_cons <= 0)
d9737751
MR		 3445 return -EINVAL;
3446
65973632
MR		 3447 if (!labels)
3448 labels = stac92xx_spdif_labels;
3449
10a20af7
TI		 3450 for (i = 0; i < num_cons; i++)
3451 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR		 3452
3453 return 0;
3454}
3455
8b65727b 3456/* labels for dmic mux inputs */
ea734963 3457static const char * const stac92xx_dmic_labels[5] = {
8b65727b
MP		 3458 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3459 "Digital Mic 3", "Digital Mic 4"
3460};
3461
699d8995
VK		 3462static hda_nid_t get_connected_node(struct hda_codec *codec, hda_nid_t mux,
3463 int idx)
3464{
3465 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3466 int nums;
3467 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3468 if (idx >= 0 && idx < nums)
3469 return conn[idx];
3470 return 0;
3471}
3472
8d087c76
TI		 3473/* look for NID recursively */
3474#define get_connection_index(codec, mux, nid) \
3475 snd_hda_get_conn_index(codec, mux, nid, 1)
3d21d3f7 3476
667067d8 3477/* create a volume assigned to the given pin (only if supported) */
96f845de 3478/* return 1 if the volume control is created */
667067d8 3479static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3480 const char *label, int idx, int direction)
667067d8
TI		 3481{
3482 unsigned int caps, nums;
3483 char name[32];
96f845de 3484 int err;
667067d8 3485
96f845de
TI		 3486 if (direction == HDA_OUTPUT)
3487 caps = AC_WCAP_OUT_AMP;
3488 else
3489 caps = AC_WCAP_IN_AMP;
3490 if (!(get_wcaps(codec, nid) & caps))
667067d8 3491 return 0;
96f845de 3492 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3493 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3494 if (!nums)
3495 return 0;
3496 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI		 3497 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3498 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI		 3499 if (err < 0)
3500 return err;
3501 return 1;
667067d8
TI		 3502}
3503
8b65727b
MP		 3504/* create playback/capture controls for input pins on dmic capable codecs */
3505static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3506 const struct auto_pin_cfg *cfg)
3507{
3508 struct sigmatel_spec *spec = codec->spec;
5207e10e 3509 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3510 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3511 int err, i;
5207e10e 3512 unsigned int def_conf;
8b65727b 3513
10a20af7 3514 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3515
8b65727b 3516 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3517 hda_nid_t nid;
10a20af7 3518 int index, type_idx;
201e06ff 3519 char label[32];
8b65727b 3520
667067d8
TI		 3521 nid = spec->dmic_nids[i];
3522 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3523 continue;
3524 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3525 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3526 continue;
3527
3d21d3f7
TI		 3528 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3529 if (index < 0)
3530 continue;
3531
201e06ff
TI		 3532 snd_hda_get_pin_label(codec, nid, &spec->autocfg,
3533 label, sizeof(label), NULL);
10a20af7 3534 snd_hda_add_imux_item(dimux, label, index, &type_idx);
2d7ec12b
TI		 3535 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1)
3536 snd_hda_add_imux_item(imux, label, index, &type_idx);
5207e10e 3537
10a20af7
TI		 3538 err = create_elem_capture_vol(codec, nid, label, type_idx,
3539 HDA_INPUT);
667067d8
TI		 3540 if (err < 0)
3541 return err;
96f845de
TI		 3542 if (!err) {
3543 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3544 type_idx, HDA_OUTPUT);
96f845de
TI		 3545 if (err < 0)
3546 return err;
699d8995
VK		 3547 if (!err) {
3548 nid = get_connected_node(codec,
3549 spec->dmux_nids[0], index);
3550 if (nid)
3551 err = create_elem_capture_vol(codec,
3552 nid, label,
3553 type_idx, HDA_INPUT);
3554 if (err < 0)
3555 return err;
3556 }
96f845de 3557 }
8b65727b
MP		 3558 }
3559
3560 return 0;
3561}
3562
3d21d3f7 3563static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3564 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI		 3565{
3566 unsigned int cfg;
1f83ac5a 3567 unsigned int type;
3d21d3f7
TI		 3568
3569 if (!nid)
3570 return 0;
3571 cfg = snd_hda_codec_get_pincfg(codec, nid);
1f83ac5a 3572 type = get_defcfg_device(cfg);
99ae28be
TI		 3573 switch (snd_hda_get_input_pin_attr(cfg)) {
3574 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI		 3575 if (*fixed)
3576 return 1; /* already occupied */
1f83ac5a
TI		 3577 if (type != AC_JACK_MIC_IN)
3578 return 1; /* invalid type */
3d21d3f7
TI		 3579 *fixed = nid;
3580 break;
99ae28be
TI		 3581 case INPUT_PIN_ATTR_UNUSED:
3582 break;
3583 case INPUT_PIN_ATTR_DOCK:
3584 if (*dock)
3585 return 1; /* already occupied */
1f83ac5a
TI		 3586 if (type != AC_JACK_MIC_IN && type != AC_JACK_LINE_IN)
3587 return 1; /* invalid type */
99ae28be
TI		 3588 *dock = nid;
3589 break;
3590 default:
3d21d3f7
TI		 3591 if (*ext)
3592 return 1; /* already occupied */
1f83ac5a
TI		 3593 if (type != AC_JACK_MIC_IN)
3594 return 1; /* invalid type */
3d21d3f7
TI		 3595 *ext = nid;
3596 break;
3597 }
3598 return 0;
3599}
3600
3601static int set_mic_route(struct hda_codec *codec,
3602 struct sigmatel_mic_route *mic,
3603 hda_nid_t pin)
3604{
3605 struct sigmatel_spec *spec = codec->spec;
3606 struct auto_pin_cfg *cfg = &spec->autocfg;
3607 int i;
3608
3609 mic->pin = pin;
9907790a
CC		 3610 if (pin == 0)
3611 return 0;
eea7dc93
TI		 3612 for (i = 0; i < cfg->num_inputs; i++) {
3613 if (pin == cfg->inputs[i].pin)
3d21d3f7 3614 break;
eea7dc93 3615 }
86e2959a 3616 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3617 /* analog pin */
3d21d3f7
TI		 3618 i = get_connection_index(codec, spec->mux_nids[0], pin);
3619 if (i < 0)
3620 return -1;
3621 mic->mux_idx = i;
02d33322
TI		 3622 mic->dmux_idx = -1;
3623 if (spec->dmux_nids)
3624 mic->dmux_idx = get_connection_index(codec,
3625 spec->dmux_nids[0],
3626 spec->mux_nids[0]);
da2a2aaa 3627 } else if (spec->dmux_nids) {
3d21d3f7 3628 /* digital pin */
3d21d3f7
TI		 3629 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3630 if (i < 0)
3631 return -1;
3632 mic->dmux_idx = i;
02d33322
TI		 3633 mic->mux_idx = -1;
3634 if (spec->mux_nids)
3635 mic->mux_idx = get_connection_index(codec,
3636 spec->mux_nids[0],
3637 spec->dmux_nids[0]);
3d21d3f7
TI		 3638 }
3639 return 0;
3640}
3641
3642/* return non-zero if the device is for automatic mic switch */
3643static int stac_check_auto_mic(struct hda_codec *codec)
3644{
3645 struct sigmatel_spec *spec = codec->spec;
3646 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3647 hda_nid_t fixed, ext, dock;
3d21d3f7
TI		 3648 int i;
3649
9907790a 3650 fixed = ext = dock = 0;
eea7dc93 3651 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC		 3652 if (check_mic_pin(codec, cfg->inputs[i].pin,
3653 &fixed, &ext, &dock))
3d21d3f7
TI		 3654 return 0;
3655 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC		 3656 if (check_mic_pin(codec, spec->dmic_nids[i],
3657 &fixed, &ext, &dock))
3d21d3f7 3658 return 0;
80c67852 3659 if (!fixed || (!ext && !dock))
9907790a 3660 return 0; /* no input to switch */
e35d9d6a 3661 if (!is_jack_detectable(codec, ext))
3d21d3f7
TI		 3662 return 0; /* no unsol support */
3663 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC		 3664 set_mic_route(codec, &spec->int_mic, fixed) ||
3665 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI		 3666 return 0; /* something is wrong */
3667 return 1;
3668}
3669
c7d4b2fa
M		 3670/* create playback/capture controls for input pins */
3671static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3672{
3673 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3674 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3675 int i, j;
263d0328 3676 const char *label;
c7d4b2fa 3677
eea7dc93
TI		 3678 for (i = 0; i < cfg->num_inputs; i++) {
3679 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3680 int index, err, type_idx;
314634bc 3681
314634bc
TI		 3682 index = -1;
3683 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3684 index = get_connection_index(codec, spec->mux_nids[j],
3685 nid);
3686 if (index >= 0)
3687 break;
c7d4b2fa 3688 }
667067d8
TI		 3689 if (index < 0)
3690 continue;
3691
10a20af7
TI		 3692 label = hda_get_autocfg_input_label(codec, cfg, i);
3693 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3694
667067d8 3695 err = create_elem_capture_vol(codec, nid,
263d0328 3696 label, type_idx,
96f845de 3697 HDA_INPUT);
667067d8
TI		 3698 if (err < 0)
3699 return err;
c7d4b2fa 3700 }
5207e10e 3701 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3702
7b043899 3703 if (imux->num_items) {
62fe78e9
SR		 3704 /*
3705 * Set the current input for the muxes.
3706 * The STAC9221 has two input muxes with identical source
3707 * NID lists. Hopefully this won't get confused.
3708 */
3709 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3710 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3711 AC_VERB_SET_CONNECT_SEL,
3712 imux->items[0].index);
62fe78e9
SR		 3713 }
3714 }
3715
c7d4b2fa
M		 3716 return 0;
3717}
3718
c7d4b2fa
M		 3719static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3720{
3721 struct sigmatel_spec *spec = codec->spec;
3722 int i;
3723
3724 for (i = 0; i < spec->autocfg.line_outs; i++) {
3725 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3726 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3727 }
3728}
3729
3730static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3731{
3732 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3733 int i;
c7d4b2fa 3734
eb06ed8f
TI		 3735 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3736 hda_nid_t pin;
3737 pin = spec->autocfg.hp_pins[i];
3738 if (pin) /* connect to front */
3739 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3740 }
3741 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3742 hda_nid_t pin;
3743 pin = spec->autocfg.speaker_pins[i];
3744 if (pin) /* connect to front */
3745 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3746 }
c7d4b2fa
M		 3747}
3748
8af3aeb4
TI		 3749static int is_dual_headphones(struct hda_codec *codec)
3750{
3751 struct sigmatel_spec *spec = codec->spec;
3752 int i, valid_hps;
3753
3754 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3755 spec->autocfg.hp_outs <= 1)
3756 return 0;
3757 valid_hps = 0;
3758 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3759 hda_nid_t nid = spec->autocfg.hp_pins[i];
3760 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3761 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3762 continue;
3763 valid_hps++;
3764 }
3765 return (valid_hps > 1);
3766}
3767
3768
9009b0e4 3769static int stac92xx_parse_auto_config(struct hda_codec *codec)
c7d4b2fa
M		 3770{
3771 struct sigmatel_spec *spec = codec->spec;
9009b0e4 3772 hda_nid_t dig_out = 0, dig_in = 0;
dc04d1b4 3773 int hp_swap = 0;
6479c631 3774 int i, err;
c7d4b2fa 3775
8b65727b
MP		 3776 if ((err = snd_hda_parse_pin_def_config(codec,
3777 &spec->autocfg,
3778 spec->dmic_nids)) < 0)
c7d4b2fa 3779 return err;
82bc955f 3780 if (! spec->autocfg.line_outs)
869264c4 3781 return 0; /* can't find valid pin config */
19039bd0 3782
bcecd9bd
JZ		 3783 /* If we have no real line-out pin and multiple hp-outs, HPs should
3784 * be set up as multi-channel outputs.
3785 */
8af3aeb4 3786 if (is_dual_headphones(codec)) {
bcecd9bd
JZ		 3787 /* Copy hp_outs to line_outs, backup line_outs in
3788 * speaker_outs so that the following routines can handle
3789 * HP pins as primary outputs.
3790 */
c21ca4a8 3791 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3792 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3793 sizeof(spec->autocfg.line_out_pins));
3794 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3795 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3796 sizeof(spec->autocfg.hp_pins));
3797 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3798 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3799 spec->autocfg.hp_outs = 0;
dc04d1b4 3800 hp_swap = 1;
bcecd9bd 3801 }
09a99959 3802 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3803 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3804 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3805 u32 caps = query_amp_caps(codec,
3806 spec->autocfg.mono_out_pin, dir);
3807 hda_nid_t conn_list[1];
3808
3809 /* get the mixer node and then the mono mux if it exists */
3810 if (snd_hda_get_connections(codec,
3811 spec->autocfg.mono_out_pin, conn_list, 1) &&
3812 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3813 conn_list, 1) > 0) {
09a99959
MR		 3814
3815 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3816 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 3817 /* LR swap check, some stac925x have a mux that
3818 * changes the DACs output path instead of the
3819 * mono-mux path.
3820 */
3821 if (wid_type == AC_WID_AUD_SEL &&
3822 !(wcaps & AC_WCAP_LR_SWAP))
3823 spec->mono_nid = conn_list[0];
3824 }
d0513fc6
MR		 3825 if (dir) {
3826 hda_nid_t nid = spec->autocfg.mono_out_pin;
3827
3828 /* most mono outs have a least a mute/unmute switch */
3829 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3830 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3831 "Mono Playback Switch",
3832 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3833 if (err < 0)
3834 return err;
d0513fc6
MR		 3835 /* check for volume support for the amp */
3836 if ((caps & AC_AMPCAP_NUM_STEPS)
3837 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3838 err = stac92xx_add_control(spec,
3839 STAC_CTL_WIDGET_VOL,
3840 "Mono Playback Volume",
3841 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3842 if (err < 0)
3843 return err;
3844 }
09a99959
MR		 3845 }
3846
3847 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3848 AC_PINCTL_OUT_EN);
3849 }
bcecd9bd 3850
c21ca4a8
TI		 3851 if (!spec->multiout.num_dacs) {
3852 err = stac92xx_auto_fill_dac_nids(codec);
3853 if (err < 0)
19039bd0 3854 return err;
c9280d68
TI		 3855 err = stac92xx_auto_create_multi_out_ctls(codec,
3856 &spec->autocfg);
3857 if (err < 0)
3858 return err;
c21ca4a8 3859 }
c7d4b2fa 3860
1cd2224c
MR		 3861 /* setup analog beep controls */
3862 if (spec->anabeep_nid > 0) {
3863 err = stac92xx_auto_create_beep_ctls(codec,
3864 spec->anabeep_nid);
3865 if (err < 0)
3866 return err;
3867 }
3868
3869 /* setup digital beep controls and input device */
3870#ifdef CONFIG_SND_HDA_INPUT_BEEP
3871 if (spec->digbeep_nid > 0) {
3872 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3873 unsigned int caps;
1cd2224c
MR		 3874
3875 err = stac92xx_auto_create_beep_ctls(codec, nid);
3876 if (err < 0)
3877 return err;
3878 err = snd_hda_attach_beep_device(codec, nid);
3879 if (err < 0)
3880 return err;
d8d881dd
TI		 3881 if (codec->beep) {
3882 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3883 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI		 3884 /* if no beep switch is available, make its own one */
3885 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3886 if (!(caps & AC_AMPCAP_MUTE)) {
3887 err = stac92xx_beep_switch_ctl(codec);
3888 if (err < 0)
3889 return err;
3890 }
4d4e9bb3 3891 }
1cd2224c
MR		 3892 }
3893#endif
3894
0fb87bb4 3895 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 3896 if (err < 0)
3897 return err;
3898
dc04d1b4
TI		 3899 /* All output parsing done, now restore the swapped hp pins */
3900 if (hp_swap) {
3901 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3902 sizeof(spec->autocfg.hp_pins));
3903 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3904 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3905 spec->autocfg.line_outs = 0;
3906 }
0fb87bb4 3907
3d21d3f7
TI		 3908 if (stac_check_auto_mic(codec)) {
3909 spec->auto_mic = 1;
3910 /* only one capture for auto-mic */
3911 spec->num_adcs = 1;
3912 spec->num_caps = 1;
3913 spec->num_muxes = 1;
3914 }
3915
6479c631
TI		 3916 for (i = 0; i < spec->num_caps; i++) {
3917 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3918 spec->capsws[i], i);
3919 if (err < 0)
3920 return err;
3921 }
3922
dc04d1b4 3923 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3924 if (err < 0)
c7d4b2fa
M		 3925 return err;
3926
b22b4821
MR		 3927 if (spec->mono_nid > 0) {
3928 err = stac92xx_auto_create_mono_output_ctls(codec);
3929 if (err < 0)
3930 return err;
3931 }
2a9c7816 3932 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3933 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3934 &spec->autocfg)) < 0)
3935 return err;
4682eee0
MR		 3936 if (spec->num_muxes > 0) {
3937 err = stac92xx_auto_create_mux_input_ctls(codec);
3938 if (err < 0)
3939 return err;
3940 }
d9737751
MR		 3941 if (spec->num_smuxes > 0) {
3942 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3943 if (err < 0)
3944 return err;
3945 }
8b65727b 3946
e3c75964
TI		 3947 err = stac92xx_add_input_source(spec);
3948 if (err < 0)
3949 return err;
3950
c7d4b2fa 3951 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3952 if (spec->multiout.max_channels > 2)
c7d4b2fa 3953 spec->surr_switch = 1;
c7d4b2fa 3954
9009b0e4
CC		 3955 /* find digital out and in converters */
3956 for (i = codec->start_nid; i < codec->start_nid + codec->num_nodes; i++) {
3957 unsigned int wid_caps = get_wcaps(codec, i);
3958 if (wid_caps & AC_WCAP_DIGITAL) {
3959 switch (get_wcaps_type(wid_caps)) {
3960 case AC_WID_AUD_OUT:
3961 if (!dig_out)
3962 dig_out = i;
3963 break;
3964 case AC_WID_AUD_IN:
3965 if (!dig_in)
3966 dig_in = i;
3967 break;
3968 }
3969 }
3970 }
0852d7a6 3971 if (spec->autocfg.dig_outs)
3cc08dc6 3972 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3973 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3974 spec->dig_in_nid = dig_in;
c7d4b2fa 3975
603c4019
TI		 3976 if (spec->kctls.list)
3977 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3978
3979 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3980 if (!spec->dinput_mux)
3981 spec->dinput_mux = &spec->private_dimux;
d9737751 3982 spec->sinput_mux = &spec->private_smux;
b22b4821 3983 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3984 return 1;
3985}
3986
82bc955f
TI		 3987/* add playback controls for HP output */
3988static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3989 struct auto_pin_cfg *cfg)
3990{
3991 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3992 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3993
3994 if (! pin)
3995 return 0;
3996
e35d9d6a 3997 if (is_jack_detectable(codec, pin))
82bc955f 3998 spec->hp_detect = 1;
82bc955f
TI		 3999
4000 return 0;
4001}
4002
160ea0dc
RF		 4003/* add playback controls for LFE output */
4004static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
4005 struct auto_pin_cfg *cfg)
4006{
4007 struct sigmatel_spec *spec = codec->spec;
4008 int err;
4009 hda_nid_t lfe_pin = 0x0;
4010 int i;
4011
4012 /*
4013 * search speaker outs and line outs for a mono speaker pin
4014 * with an amp. If one is found, add LFE controls
4015 * for it.
4016 */
4017 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
4018 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 4019 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4020 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4021 if (wcaps == AC_WCAP_OUT_AMP)
4022 /* found a mono speaker with an amp, must be lfe */
4023 lfe_pin = pin;
4024 }
4025
4026 /* if speaker_outs is 0, then speakers may be in line_outs */
4027 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
4028 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
4029 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 4030 unsigned int defcfg;
330ee995 4031 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 4032 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 4033 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4034 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4035 if (wcaps == AC_WCAP_OUT_AMP)
4036 /* found a mono speaker with an amp,
4037 must be lfe */
4038 lfe_pin = pin;
4039 }
4040 }
4041 }
4042
4043 if (lfe_pin) {
7c7767eb 4044 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 4045 if (err < 0)
4046 return err;
4047 }
4048
4049 return 0;
4050}
4051
c7d4b2fa
M		 4052static int stac9200_parse_auto_config(struct hda_codec *codec)
4053{
4054 struct sigmatel_spec *spec = codec->spec;
4055 int err;
4056
df694daa 4057 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 4058 return err;
4059
4060 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
4061 return err;
4062
82bc955f
TI		 4063 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
4064 return err;
4065
160ea0dc
RF		 4066 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
4067 return err;
4068
355a0ec4
TI		 4069 if (spec->num_muxes > 0) {
4070 err = stac92xx_auto_create_mux_input_ctls(codec);
4071 if (err < 0)
4072 return err;
4073 }
4074
e3c75964
TI		 4075 err = stac92xx_add_input_source(spec);
4076 if (err < 0)
4077 return err;
4078
0852d7a6 4079 if (spec->autocfg.dig_outs)
c7d4b2fa 4080 spec->multiout.dig_out_nid = 0x05;
82bc955f 4081 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4082 spec->dig_in_nid = 0x04;
c7d4b2fa 4083
603c4019
TI		 4084 if (spec->kctls.list)
4085 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4086
4087 spec->input_mux = &spec->private_imux;
8b65727b 4088 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 4089
4090 return 1;
4091}
4092
62fe78e9
SR		 4093/*
4094 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4095 * funky external mute control using GPIO pins.
4096 */
4097
76e1ddfb 4098static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4099 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 4100{
4101 unsigned int gpiostate, gpiomask, gpiodir;
4102
45eebda7
VK		 4103 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
4104
62fe78e9
SR		 4105 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4106 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4107 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 4108
4109 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4110 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4111 gpiomask |= mask;
62fe78e9
SR		 4112
4113 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4114 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4115 gpiodir |= dir_mask;
62fe78e9 4116
76e1ddfb 4117 /* Configure GPIOx as CMOS */
62fe78e9
SR		 4118 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4119
4120 snd_hda_codec_write(codec, codec->afg, 0,
4121 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 4122 snd_hda_codec_read(codec, codec->afg, 0,
4123 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 4124
4125 msleep(1);
4126
76e1ddfb
TI		 4127 snd_hda_codec_read(codec, codec->afg, 0,
4128 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 4129}
4130
3a93897e 4131static int stac_add_event(struct hda_codec *codec, hda_nid_t nid,
c6e4c666 4132 unsigned char type, int data)
74aeaabc 4133{
3a93897e 4134 struct hda_jack_tbl *event;
74aeaabc 4135
3a93897e 4136 event = snd_hda_jack_tbl_new(codec, nid);
74aeaabc
MR		 4137 if (!event)
4138 return -ENOMEM;
3a93897e
TI		 4139 event->action = type;
4140 event->private_data = data;
c6e4c666 4141
3a93897e 4142 return 0;
c6e4c666
TI		 4143}
4144
62558ce1
TI		 4145/* check if given nid is a valid pin and no other events are assigned
4146 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4147 * Otherwise, returns zero.
4148 */
4149static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4150 unsigned int type)
c6e4c666 4151{
3a93897e 4152 struct hda_jack_tbl *event;
c6e4c666 4153
e35d9d6a 4154 if (!is_jack_detectable(codec, nid))
62558ce1 4155 return 0;
3a93897e
TI		 4156 event = snd_hda_jack_tbl_new(codec, nid);
4157 if (!event)
4158 return -ENOMEM;
4159 if (event->action && event->action != type)
4160 return 0;
4161 event->action = type;
4162 snd_hda_jack_detect_enable(codec, nid, 0);
62558ce1 4163 return 1;
314634bc
TI		 4164}
4165
b4ead019 4166static int is_nid_out_jack_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
a64135a2
MR		 4167{
4168 int i;
4169 for (i = 0; i < cfg->hp_outs; i++)
4170 if (cfg->hp_pins[i] == nid)
4171 return 1; /* nid is a HP-Out */
b4ead019
TI		 4172 for (i = 0; i < cfg->line_outs; i++)
4173 if (cfg->line_out_pins[i] == nid)
4174 return 1; /* nid is a line-Out */
a64135a2
MR		 4175 return 0; /* nid is not a HP-Out */
4176};
4177
b76c850f
MR		 4178static void stac92xx_power_down(struct hda_codec *codec)
4179{
4180 struct sigmatel_spec *spec = codec->spec;
4181
4182 /* power down inactive DACs */
2b63536f 4183 const hda_nid_t *dac;
b76c850f 4184 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4185 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4186 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4187 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4188}
4189
f73d3585
TI		 4190static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4191 int enable);
4192
014c41fc
TI		 4193static inline int get_int_hint(struct hda_codec *codec, const char *key,
4194 int *valp)
4195{
4196 const char *p;
4197 p = snd_hda_get_hint(codec, key);
4198 if (p) {
4199 unsigned long val;
4200 if (!strict_strtoul(p, 0, &val)) {
4201 *valp = val;
4202 return 1;
4203 }
4204 }
4205 return 0;
4206}
4207
6565e4fa
TI		 4208/* override some hints from the hwdep entry */
4209static void stac_store_hints(struct hda_codec *codec)
4210{
4211 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI		 4212 int val;
4213
4214 val = snd_hda_get_bool_hint(codec, "hp_detect");
4215 if (val >= 0)
4216 spec->hp_detect = val;
014c41fc 4217 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI		 4218 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4219 spec->gpio_mask;
4220 }
014c41fc
TI		 4221 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4222 spec->gpio_mask &= spec->gpio_mask;
4223 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4224 spec->gpio_dir &= spec->gpio_mask;
4225 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4226 spec->eapd_mask &= spec->gpio_mask;
4227 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4228 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI		 4229 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4230 if (val >= 0)
4231 spec->eapd_switch = val;
014c41fc
TI		 4232 get_int_hint(codec, "gpio_led_polarity", &spec->gpio_led_polarity);
4233 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
f1a73746
TI		 4234 spec->gpio_mask |= spec->gpio_led;
4235 spec->gpio_dir |= spec->gpio_led;
4236 if (spec->gpio_led_polarity)
4237 spec->gpio_data |= spec->gpio_led;
043958e6 4238 }
6565e4fa
TI		 4239}
4240
f2cbba76
TI		 4241static void stac_issue_unsol_events(struct hda_codec *codec, int num_pins,
4242 const hda_nid_t *pins)
4243{
4244 while (num_pins--)
4245 stac_issue_unsol_event(codec, *pins++);
4246}
4247
4248/* fake event to set up pins */
4249static void stac_fake_hp_events(struct hda_codec *codec)
4250{
4251 struct sigmatel_spec *spec = codec->spec;
4252
4253 if (spec->autocfg.hp_outs)
4254 stac_issue_unsol_events(codec, spec->autocfg.hp_outs,
4255 spec->autocfg.hp_pins);
4256 if (spec->autocfg.line_outs &&
4257 spec->autocfg.line_out_pins[0] != spec->autocfg.hp_pins[0])
4258 stac_issue_unsol_events(codec, spec->autocfg.line_outs,
4259 spec->autocfg.line_out_pins);
4260}
4261
c7d4b2fa
M		 4262static int stac92xx_init(struct hda_codec *codec)
4263{
4264 struct sigmatel_spec *spec = codec->spec;
82bc955f 4265 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4266 unsigned int gpio;
e4973e1e 4267 int i;
c7d4b2fa 4268
c7d4b2fa
M		 4269 snd_hda_sequence_write(codec, spec->init);
4270
8daaaa97
MR		 4271 /* power down adcs initially */
4272 if (spec->powerdown_adcs)
4273 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4274 snd_hda_codec_write(codec,
8daaaa97
MR		 4275 spec->adc_nids[i], 0,
4276 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4277
6565e4fa
TI		 4278 /* override some hints */
4279 stac_store_hints(codec);
4280
f73d3585
TI		 4281 /* set up GPIO */
4282 gpio = spec->gpio_data;
4283 /* turn on EAPD statically when spec->eapd_switch isn't set.
4284 * otherwise, unsol event will turn it on/off dynamically
4285 */
4286 if (!spec->eapd_switch)
4287 gpio |= spec->eapd_mask;
4288 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4289
82bc955f
TI		 4290 /* set up pins */
4291 if (spec->hp_detect) {
505cb341 4292 /* Enable unsolicited responses on the HP widget */
74aeaabc 4293 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4294 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4295 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4296 }
1c4bdf9b
TI		 4297 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4298 cfg->speaker_outs > 0) {
fefd67f3 4299 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4300 for (i = 0; i < cfg->line_outs; i++) {
4301 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4302 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4303 }
4304 }
4305
0a07acaf
TI		 4306 /* force to enable the first line-out; the others are set up
4307 * in unsol_event
4308 */
4309 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4310 AC_PINCTL_OUT_EN);
82bc955f 4311 /* fake event to set up pins */
f2cbba76 4312 stac_fake_hp_events(codec);
82bc955f
TI		 4313 } else {
4314 stac92xx_auto_init_multi_out(codec);
4315 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4316 for (i = 0; i < cfg->hp_outs; i++)
4317 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4318 }
3d21d3f7 4319 if (spec->auto_mic) {
15b4f296 4320 /* initialize connection to analog input */
da2a2aaa
TI		 4321 if (spec->dmux_nids)
4322 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4323 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4324 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4325 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC		 4326 if (enable_pin_detect(codec, spec->dock_mic.pin,
4327 STAC_MIC_EVENT))
4328 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4329 }
eea7dc93
TI		 4330 for (i = 0; i < cfg->num_inputs; i++) {
4331 hda_nid_t nid = cfg->inputs[i].pin;
4332 int type = cfg->inputs[i].type;
4333 unsigned int pinctl, conf;
86e2959a 4334 if (type == AUTO_PIN_MIC) {
eea7dc93
TI		 4335 /* for mic pins, force to initialize */
4336 pinctl = stac92xx_get_default_vref(codec, nid);
4337 pinctl |= AC_PINCTL_IN_EN;
4338 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4339 } else {
4340 pinctl = snd_hda_codec_read(codec, nid, 0,
4341 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4342 /* if PINCTL already set then skip */
4343 /* Also, if both INPUT and OUTPUT are set,
4344 * it must be a BIOS bug; need to override, too
4345 */
4346 if (!(pinctl & AC_PINCTL_IN_EN) ||
4347 (pinctl & AC_PINCTL_OUT_EN)) {
4348 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4349 pinctl |= AC_PINCTL_IN_EN;
4350 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4351 }
c960a03b 4352 }
eea7dc93
TI		 4353 conf = snd_hda_codec_get_pincfg(codec, nid);
4354 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4355 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4356 stac_issue_unsol_event(codec, nid);
4357 }
82bc955f 4358 }
a64135a2
MR		 4359 for (i = 0; i < spec->num_dmics; i++)
4360 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4361 AC_PINCTL_IN_EN);
0852d7a6
TI		 4362 if (cfg->dig_out_pins[0])
4363 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4364 AC_PINCTL_OUT_EN);
4365 if (cfg->dig_in_pin)
4366 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4367 AC_PINCTL_IN_EN);
a64135a2 4368 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4369 hda_nid_t nid = spec->pwr_nids[i];
4370 int pinctl, def_conf;
f73d3585 4371
eb632128 4372 /* power on when no jack detection is available */
542c9a0a
TI		 4373 /* or when the VREF is used for controlling LED */
4374 if (!spec->hp_detect ||
a0204283 4375 spec->vref_mute_led_nid == nid) {
eb632128
TI		 4376 stac_toggle_power_map(codec, nid, 1);
4377 continue;
4378 }
4379
b4ead019 4380 if (is_nid_out_jack_pin(cfg, nid))
f73d3585
TI		 4381 continue; /* already has an unsol event */
4382
4383 pinctl = snd_hda_codec_read(codec, nid, 0,
4384 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4385 /* outputs are only ports capable of power management
4386 * any attempts on powering down a input port cause the
4387 * referenced VREF to act quirky.
4388 */
eb632128
TI		 4389 if (pinctl & AC_PINCTL_IN_EN) {
4390 stac_toggle_power_map(codec, nid, 1);
a64135a2 4391 continue;
eb632128 4392 }
330ee995 4393 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4394 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4395 /* skip any ports that don't have jacks since presence
4396 * detection is useless */
f73d3585
TI		 4397 if (def_conf != AC_JACK_PORT_COMPLEX) {
4398 if (def_conf != AC_JACK_PORT_NONE)
4399 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4400 continue;
f73d3585 4401 }
afef2cfa 4402 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT)) {
62558ce1 4403 stac_issue_unsol_event(codec, nid);
afef2cfa
CC		 4404 continue;
4405 }
4406 /* none of the above, turn the port OFF */
4407 stac_toggle_power_map(codec, nid, 0);
a64135a2 4408 }
c21bd025 4409
01a61e12
TI		 4410 snd_hda_jack_report_sync(codec);
4411
c21bd025 4412 /* sync mute LED */
9e5341b9
TI		 4413 if (spec->gpio_led)
4414 hda_call_check_power_status(codec, 0x01);
b76c850f
MR		 4415 if (spec->dac_list)
4416 stac92xx_power_down(codec);
c7d4b2fa
M		 4417 return 0;
4418}
4419
603c4019
TI		 4420static void stac92xx_free_kctls(struct hda_codec *codec)
4421{
4422 struct sigmatel_spec *spec = codec->spec;
4423
4424 if (spec->kctls.list) {
4425 struct snd_kcontrol_new *kctl = spec->kctls.list;
4426 int i;
4427 for (i = 0; i < spec->kctls.used; i++)
4428 kfree(kctl[i].name);
4429 }
4430 snd_array_free(&spec->kctls);
4431}
4432
45eebda7
VK		 4433static void stac92xx_shutup_pins(struct hda_codec *codec)
4434{
4435 unsigned int i, def_conf;
4436
4437 if (codec->bus->shutdown)
4438 return;
4439 for (i = 0; i < codec->init_pins.used; i++) {
4440 struct hda_pincfg *pin = snd_array_elem(&codec->init_pins, i);
4441 def_conf = snd_hda_codec_get_pincfg(codec, pin->nid);
4442 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE)
4443 snd_hda_codec_write(codec, pin->nid, 0,
4444 AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
4445 }
4446}
4447
167eae5a
TI		 4448static void stac92xx_shutup(struct hda_codec *codec)
4449{
4450 struct sigmatel_spec *spec = codec->spec;
167eae5a 4451
45eebda7 4452 stac92xx_shutup_pins(codec);
167eae5a
TI		 4453
4454 if (spec->eapd_mask)
4455 stac_gpio_set(codec, spec->gpio_mask,
4456 spec->gpio_dir, spec->gpio_data &
4457 ~spec->eapd_mask);
4458}
4459
2f2f4251
M		 4460static void stac92xx_free(struct hda_codec *codec)
4461{
c7d4b2fa 4462 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4463
4464 if (! spec)
4465 return;
4466
167eae5a 4467 stac92xx_shutup(codec);
11b44bbd 4468
c7d4b2fa 4469 kfree(spec);
1cd2224c 4470 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4471}
4472
4e55096e
M		 4473static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4474 unsigned int flag)
4475{
8ce84198
TI		 4476 unsigned int old_ctl, pin_ctl;
4477
4478 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4479 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4480
f9acba43
TI		 4481 if (pin_ctl & AC_PINCTL_IN_EN) {
4482 /*
4483 * we need to check the current set-up direction of
4484 * shared input pins since they can be switched via
4485 * "xxx as Output" mixer switch
4486 */
4487 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4488 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4489 return;
4490 }
4491
8ce84198 4492 old_ctl = pin_ctl;
7b043899
SL		 4493 /* if setting pin direction bits, clear the current
4494 direction bits first */
4495 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4496 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4497
8ce84198
TI		 4498 pin_ctl |= flag;
4499 if (old_ctl != pin_ctl)
4500 snd_hda_codec_write_cache(codec, nid, 0,
4501 AC_VERB_SET_PIN_WIDGET_CONTROL,
4502 pin_ctl);
4e55096e
M		 4503}
4504
4505static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4506 unsigned int flag)
4507{
4508 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4509 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI		 4510 if (pin_ctl & flag)
4511 snd_hda_codec_write_cache(codec, nid, 0,
4512 AC_VERB_SET_PIN_WIDGET_CONTROL,
4513 pin_ctl & ~flag);
4e55096e
M		 4514}
4515
d56757ab 4516static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4517{
4518 if (!nid)
4519 return 0;
a252c81a 4520 return snd_hda_jack_detect(codec, nid);
314634bc
TI		 4521}
4522
fefd67f3
TI		 4523static void stac92xx_line_out_detect(struct hda_codec *codec,
4524 int presence)
4525{
4526 struct sigmatel_spec *spec = codec->spec;
4527 struct auto_pin_cfg *cfg = &spec->autocfg;
4528 int i;
4529
4530 for (i = 0; i < cfg->line_outs; i++) {
4531 if (presence)
4532 break;
4533 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4534 if (presence) {
4535 unsigned int pinctl;
4536 pinctl = snd_hda_codec_read(codec,
4537 cfg->line_out_pins[i], 0,
4538 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4539 if (pinctl & AC_PINCTL_IN_EN)
4540 presence = 0; /* mic- or line-input */
4541 }
4542 }
4543
4544 if (presence) {
4545 /* disable speakers */
4546 for (i = 0; i < cfg->speaker_outs; i++)
4547 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4548 AC_PINCTL_OUT_EN);
4549 if (spec->eapd_mask && spec->eapd_switch)
4550 stac_gpio_set(codec, spec->gpio_mask,
4551 spec->gpio_dir, spec->gpio_data &
4552 ~spec->eapd_mask);
4553 } else {
4554 /* enable speakers */
4555 for (i = 0; i < cfg->speaker_outs; i++)
4556 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4557 AC_PINCTL_OUT_EN);
4558 if (spec->eapd_mask && spec->eapd_switch)
4559 stac_gpio_set(codec, spec->gpio_mask,
4560 spec->gpio_dir, spec->gpio_data |
4561 spec->eapd_mask);
4562 }
4563}
4564
d7a89436
TI		 4565/* return non-zero if the hp-pin of the given array index isn't
4566 * a jack-detection target
4567 */
4568static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4569{
4570 struct auto_pin_cfg *cfg = &spec->autocfg;
4571
4572 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4573 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4574 return 1;
c21ca4a8 4575 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4576 return 1;
4577 /* ignore if the pin is set as line-out */
4578 if (cfg->hp_pins[i] == spec->hp_switch)
4579 return 1;
4580 return 0;
4581}
4582
c6e4c666 4583static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4584{
4585 struct sigmatel_spec *spec = codec->spec;
4586 struct auto_pin_cfg *cfg = &spec->autocfg;
4587 int i, presence;
4588
eb06ed8f 4589 presence = 0;
4fe5195c
MR		 4590 if (spec->gpio_mute)
4591 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4592 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4593
eb06ed8f 4594 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4595 if (presence)
4596 break;
d7a89436
TI		 4597 if (no_hp_sensing(spec, i))
4598 continue;
e6e3ea25
TI		 4599 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4600 if (presence) {
4601 unsigned int pinctl;
4602 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4603 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4604 if (pinctl & AC_PINCTL_IN_EN)
4605 presence = 0; /* mic- or line-input */
4606 }
eb06ed8f 4607 }
4e55096e
M		 4608
4609 if (presence) {
d7a89436 4610 /* disable lineouts */
7c2ba97b 4611 if (spec->hp_switch)
d7a89436
TI		 4612 stac92xx_reset_pinctl(codec, spec->hp_switch,
4613 AC_PINCTL_OUT_EN);
4e55096e
M		 4614 for (i = 0; i < cfg->line_outs; i++)
4615 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4616 AC_PINCTL_OUT_EN);
4e55096e 4617 } else {
d7a89436 4618 /* enable lineouts */
7c2ba97b 4619 if (spec->hp_switch)
d7a89436
TI		 4620 stac92xx_set_pinctl(codec, spec->hp_switch,
4621 AC_PINCTL_OUT_EN);
4e55096e
M		 4622 for (i = 0; i < cfg->line_outs; i++)
4623 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4624 AC_PINCTL_OUT_EN);
4e55096e 4625 }
fefd67f3 4626 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4627 /* toggle hp outs */
4628 for (i = 0; i < cfg->hp_outs; i++) {
4629 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4630 if (no_hp_sensing(spec, i))
4631 continue;
4632 if (presence)
4633 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4634#if 0 /* FIXME */
4635/* Resetting the pinctl like below may lead to (a sort of) regressions
4636 * on some devices since they use the HP pin actually for line/speaker
4637 * outs although the default pin config shows a different pin (that is
4638 * wrong and useless).
4639 *
4640 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4641 * But, disabling the code below just works around it, and I'm too tired of
4642 * bug reports with such devices...
4643 */
d7a89436
TI		 4644 else
4645 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4646#endif /* FIXME */
d7a89436 4647 }
4e55096e
M		 4648}
4649
f73d3585
TI		 4650static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4651 int enable)
a64135a2
MR		 4652{
4653 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4654 unsigned int idx, val;
4655
4656 for (idx = 0; idx < spec->num_pwrs; idx++) {
4657 if (spec->pwr_nids[idx] == nid)
4658 break;
4659 }
4660 if (idx >= spec->num_pwrs)
4661 return;
d0513fc6 4662
afef2cfa 4663 idx = 1 << idx;
a64135a2 4664
f73d3585
TI		 4665 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4666 if (enable)
a64135a2
MR		 4667 val &= ~idx;
4668 else
4669 val |= idx;
4670
4671 /* power down unused output ports */
4672 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4673}
4674
f73d3585
TI		 4675static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4676{
e6e3ea25 4677 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4678}
a64135a2 4679
ab5a6ebe
VK		 4680/* get the pin connection (fixed, none, etc) */
4681static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4682{
4683 struct sigmatel_spec *spec = codec->spec;
4684 unsigned int cfg;
4685
4686 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4687 return get_defcfg_connect(cfg);
4688}
4689
4690static int stac92xx_connected_ports(struct hda_codec *codec,
2b63536f 4691 const hda_nid_t *nids, int num_nids)
ab5a6ebe
VK		 4692{
4693 struct sigmatel_spec *spec = codec->spec;
4694 int idx, num;
4695 unsigned int def_conf;
4696
4697 for (num = 0; num < num_nids; num++) {
4698 for (idx = 0; idx < spec->num_pins; idx++)
4699 if (spec->pin_nids[idx] == nids[num])
4700 break;
4701 if (idx >= spec->num_pins)
4702 break;
4703 def_conf = stac_get_defcfg_connect(codec, idx);
4704 if (def_conf == AC_JACK_PORT_NONE)
4705 break;
4706 }
4707 return num;
4708}
4709
3d21d3f7
TI		 4710static void stac92xx_mic_detect(struct hda_codec *codec)
4711{
4712 struct sigmatel_spec *spec = codec->spec;
4713 struct sigmatel_mic_route *mic;
4714
4715 if (get_pin_presence(codec, spec->ext_mic.pin))
4716 mic = &spec->ext_mic;
9907790a
CC		 4717 else if (get_pin_presence(codec, spec->dock_mic.pin))
4718 mic = &spec->dock_mic;
3d21d3f7
TI		 4719 else
4720 mic = &spec->int_mic;
02d33322 4721 if (mic->dmux_idx >= 0)
3d21d3f7
TI		 4722 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4723 AC_VERB_SET_CONNECT_SEL,
4724 mic->dmux_idx);
02d33322 4725 if (mic->mux_idx >= 0)
3d21d3f7
TI		 4726 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4727 AC_VERB_SET_CONNECT_SEL,
4728 mic->mux_idx);
4729}
4730
1835a0f9 4731static void handle_unsol_event(struct hda_codec *codec,
3a93897e 4732 struct hda_jack_tbl *event)
314634bc 4733{
a64135a2 4734 struct sigmatel_spec *spec = codec->spec;
1835a0f9 4735 int data;
c6e4c666 4736
3a93897e 4737 switch (event->action) {
314634bc 4738 case STAC_HP_EVENT:
fefd67f3 4739 case STAC_LO_EVENT:
16ffe32c 4740 stac92xx_hp_detect(codec);
fefd67f3 4741 break;
3d21d3f7
TI		 4742 case STAC_MIC_EVENT:
4743 stac92xx_mic_detect(codec);
4744 break;
4745 }
4746
3a93897e 4747 switch (event->action) {
3d21d3f7 4748 case STAC_HP_EVENT:
fefd67f3 4749 case STAC_LO_EVENT:
3d21d3f7 4750 case STAC_MIC_EVENT:
74aeaabc 4751 case STAC_INSERT_EVENT:
a64135a2 4752 case STAC_PWR_EVENT:
c6e4c666
TI		 4753 if (spec->num_pwrs > 0)
4754 stac92xx_pin_sense(codec, event->nid);
fd60cc89
MR		 4755
4756 switch (codec->subsystem_id) {
4757 case 0x103c308f:
4758 if (event->nid == 0xb) {
4759 int pin = AC_PINCTL_IN_EN;
4760
4761 if (get_pin_presence(codec, 0xa)
4762 && get_pin_presence(codec, 0xb))
4763 pin |= AC_PINCTL_VREF_80;
4764 if (!get_pin_presence(codec, 0xb))
4765 pin |= AC_PINCTL_VREF_80;
4766
4767 /* toggle VREF state based on mic + hp pin
4768 * status
4769 */
4770 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4771 }
4772 }
72474be6 4773 break;
c6e4c666
TI		 4774 case STAC_VREF_EVENT:
4775 data = snd_hda_codec_read(codec, codec->afg, 0,
4776 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4777 /* toggle VREF state based on GPIOx status */
4778 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3a93897e 4779 !!(data & (1 << event->private_data)));
72474be6 4780 break;
314634bc
TI		 4781 }
4782}
4783
1835a0f9
TI		 4784static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
4785{
3a93897e 4786 struct hda_jack_tbl *event = snd_hda_jack_tbl_get(codec, nid);
1835a0f9
TI		 4787 if (!event)
4788 return;
4789 handle_unsol_event(codec, event);
4790}
4791
4792static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4793{
3a93897e 4794 struct hda_jack_tbl *event;
1835a0f9
TI		 4795 int tag;
4796
4797 tag = (res >> 26) & 0x7f;
3a93897e 4798 event = snd_hda_jack_tbl_get_from_tag(codec, tag);
1835a0f9
TI		 4799 if (!event)
4800 return;
3a93897e 4801 event->jack_dirty = 1;
1835a0f9 4802 handle_unsol_event(codec, event);
01a61e12 4803 snd_hda_jack_report_sync(codec);
1835a0f9
TI		 4804}
4805
d38cce70
KG		 4806static int hp_blike_system(u32 subsystem_id);
4807
4808static void set_hp_led_gpio(struct hda_codec *codec)
4809{
4810 struct sigmatel_spec *spec = codec->spec;
07f80449
TI		 4811 unsigned int gpio;
4812
26ebe0a2
TI		 4813 if (spec->gpio_led)
4814 return;
4815
07f80449
TI		 4816 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4817 gpio &= AC_GPIO_IO_COUNT;
4818 if (gpio > 3)
4819 spec->gpio_led = 0x08; /* GPIO 3 */
4820 else
4821 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG		 4822}
4823
c357aab0
VK		 4824/*
4825 * This method searches for the mute LED GPIO configuration
4826 * provided as OEM string in SMBIOS. The format of that string
4827 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4828 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4829 * that corresponds to the NOT muted state of the master volume
4830 * and G is the index of the GPIO to use as the mute LED control (0..9)
4831 * If _G portion is missing it is assigned based on the codec ID
4832 *
4833 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4834 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG		 4835 *
4836 *
4837 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4838 * SMBIOS - at least the ones I have seen do not have them - which include
4839 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4840 * HP Pavilion dv9500t CTO.
4841 * Need more information on whether it is true across the entire series.
4842 * -- kunal
c357aab0 4843 */
6a557c94 4844static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
c357aab0
VK		 4845{
4846 struct sigmatel_spec *spec = codec->spec;
4847 const struct dmi_device *dev = NULL;
4848
4849 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4850 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4851 NULL, dev))) {
45eebda7 4852 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
d38cce70
KG		 4853 &spec->gpio_led_polarity,
4854 &spec->gpio_led) == 2) {
f1a73746
TI		 4855 unsigned int max_gpio;
4856 max_gpio = snd_hda_param_read(codec, codec->afg,
4857 AC_PAR_GPIO_CAP);
4858 max_gpio &= AC_GPIO_IO_COUNT;
4859 if (spec->gpio_led < max_gpio)
45eebda7 4860 spec->gpio_led = 1 << spec->gpio_led;
f1a73746
TI		 4861 else
4862 spec->vref_mute_led_nid = spec->gpio_led;
c357aab0
VK		 4863 return 1;
4864 }
4865 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG		 4866 &spec->gpio_led_polarity) == 1) {
4867 set_hp_led_gpio(codec);
4868 return 1;
c357aab0 4869 }
e2ef36c6
GMDV		 4870 /* BIOS bug: unfilled OEM string */
4871 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
4872 set_hp_led_gpio(codec);
4873 spec->gpio_led_polarity = 1;
4874 return 1;
4875 }
c357aab0 4876 }
d38cce70
KG		 4877
4878 /*
4879 * Fallback case - if we don't find the DMI strings,
6a557c94
VK		 4880 * we statically set the GPIO - if not a B-series system
4881 * and default polarity is provided
d38cce70 4882 */
6a557c94
VK		 4883 if (!hp_blike_system(codec->subsystem_id) &&
4884 (default_polarity == 0 || default_polarity == 1)) {
d38cce70 4885 set_hp_led_gpio(codec);
dce17d4f 4886 spec->gpio_led_polarity = default_polarity;
d38cce70
KG		 4887 return 1;
4888 }
c357aab0
VK		 4889 }
4890 return 0;
4891}
4892
4893static int hp_blike_system(u32 subsystem_id)
78987bdc
RD		 4894{
4895 switch (subsystem_id) {
c357aab0
VK		 4896 case 0x103c1520:
4897 case 0x103c1521:
4898 case 0x103c1523:
4899 case 0x103c1524:
4900 case 0x103c1525:
78987bdc
RD		 4901 case 0x103c1722:
4902 case 0x103c1723:
4903 case 0x103c1724:
4904 case 0x103c1725:
4905 case 0x103c1726:
4906 case 0x103c1727:
4907 case 0x103c1728:
4908 case 0x103c1729:
c357aab0
VK		 4909 case 0x103c172a:
4910 case 0x103c172b:
4911 case 0x103c307e:
4912 case 0x103c307f:
4913 case 0x103c3080:
4914 case 0x103c3081:
4915 case 0x103c7007:
4916 case 0x103c7008:
78987bdc
RD		 4917 return 1;
4918 }
4919 return 0;
4920}
4921
2d34e1b3
TI		 4922#ifdef CONFIG_PROC_FS
4923static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4924 struct hda_codec *codec, hda_nid_t nid)
4925{
4926 if (nid == codec->afg)
4927 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4928 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4929}
4930
4931static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4932 struct hda_codec *codec,
4933 unsigned int verb)
4934{
4935 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4936 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4937}
4938
4939/* stac92hd71bxx, stac92hd73xx */
4940static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4941 struct hda_codec *codec, hda_nid_t nid)
4942{
4943 stac92hd_proc_hook(buffer, codec, nid);
4944 if (nid == codec->afg)
4945 analog_loop_proc_hook(buffer, codec, 0xfa0);
4946}
4947
4948static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4949 struct hda_codec *codec, hda_nid_t nid)
4950{
4951 if (nid == codec->afg)
4952 analog_loop_proc_hook(buffer, codec, 0xfe0);
4953}
4954
4955static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4956 struct hda_codec *codec, hda_nid_t nid)
4957{
4958 if (nid == codec->afg)
4959 analog_loop_proc_hook(buffer, codec, 0xfeb);
4960}
4961#else
4962#define stac92hd_proc_hook NULL
4963#define stac92hd7x_proc_hook NULL
4964#define stac9205_proc_hook NULL
4965#define stac927x_proc_hook NULL
4966#endif
4967
2a43952a 4968#ifdef CONFIG_PM
ff6fdc37
M		 4969static int stac92xx_resume(struct hda_codec *codec)
4970{
2c885878 4971 stac92xx_init(codec);
82beb8fd
TI		 4972 snd_hda_codec_resume_amp(codec);
4973 snd_hda_codec_resume_cache(codec);
2c885878 4974 /* fake event to set up pins again to override cached values */
f2cbba76 4975 stac_fake_hp_events(codec);
ff6fdc37
M		 4976 return 0;
4977}
c6798d2b 4978
45eebda7
VK		 4979static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4980{
4981 stac92xx_shutup(codec);
4982 return 0;
4983}
4984
7df1ce1a 4985#ifdef CONFIG_SND_HDA_POWER_SAVE
45eebda7
VK		 4986static int stac92xx_pre_resume(struct hda_codec *codec)
4987{
4988 struct sigmatel_spec *spec = codec->spec;
4989
4990 /* sync mute LED */
f1a73746
TI		 4991 if (spec->vref_mute_led_nid)
4992 stac_vrefout_set(codec, spec->vref_mute_led_nid,
4993 spec->vref_led);
4994 else if (spec->gpio_led)
4995 stac_gpio_set(codec, spec->gpio_mask,
4996 spec->gpio_dir, spec->gpio_data);
45eebda7
VK		 4997 return 0;
4998}
4999
45eebda7
VK		 5000static void stac92xx_set_power_state(struct hda_codec *codec, hda_nid_t fg,
5001 unsigned int power_state)
5002{
5003 unsigned int afg_power_state = power_state;
5004 struct sigmatel_spec *spec = codec->spec;
5005
5006 if (power_state == AC_PWRST_D3) {
f1a73746 5007 if (spec->vref_mute_led_nid) {
45eebda7
VK		 5008 /* with vref-out pin used for mute led control
5009 * codec AFG is prevented from D3 state
5010 */
5011 afg_power_state = AC_PWRST_D1;
5012 }
5013 /* this delay seems necessary to avoid click noise at power-down */
5014 msleep(100);
5015 }
5016 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
5017 afg_power_state);
5018 snd_hda_codec_set_power_to_all(codec, fg, power_state, true);
5019}
5020
ae6241fb 5021/*
7df1ce1a
VK		 5022 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed
5023 * as mute LED state is updated in check_power_status hook
ae6241fb 5024 */
7df1ce1a 5025static int stac92xx_update_led_status(struct hda_codec *codec)
ae6241fb
CP		 5026{
5027 struct sigmatel_spec *spec = codec->spec;
7df1ce1a 5028 int i, num_ext_dacs, muted = 1;
45eebda7 5029 unsigned int muted_lvl, notmtd_lvl;
7df1ce1a 5030 hda_nid_t nid;
6fce61ae 5031
45eebda7
VK		 5032 if (!spec->gpio_led)
5033 return 0;
5034
c21bd025
TI		 5035 for (i = 0; i < spec->multiout.num_dacs; i++) {
5036 nid = spec->multiout.dac_nids[i];
5037 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
5038 HDA_AMP_MUTE)) {
5039 muted = 0; /* something heard */
5040 break;
5bdaaada 5041 }
ae6241fb 5042 }
7df1ce1a
VK		 5043 if (muted && spec->multiout.hp_nid)
5044 if (!(snd_hda_codec_amp_read(codec,
5045 spec->multiout.hp_nid, 0, HDA_OUTPUT, 0) &
5046 HDA_AMP_MUTE)) {
5047 muted = 0; /* HP is not muted */
5048 }
5049 num_ext_dacs = ARRAY_SIZE(spec->multiout.extra_out_nid);
5050 for (i = 0; muted && i < num_ext_dacs; i++) {
5051 nid = spec->multiout.extra_out_nid[i];
5052 if (nid == 0)
5053 break;
5054 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
5055 HDA_AMP_MUTE)) {
5056 muted = 0; /* extra output is not muted */
5057 }
5058 }
45eebda7 5059 /*polarity defines *not* muted state level*/
f1a73746 5060 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5061 if (muted)
5062 spec->gpio_data &= ~spec->gpio_led; /* orange */
5063 else
5064 spec->gpio_data |= spec->gpio_led; /* white */
ae6241fb 5065
45eebda7
VK		 5066 if (!spec->gpio_led_polarity) {
5067 /* LED state is inverted on these systems */
5068 spec->gpio_data ^= spec->gpio_led;
5069 }
5070 stac_gpio_set(codec, spec->gpio_mask,
5071 spec->gpio_dir, spec->gpio_data);
5072 } else {
5073 notmtd_lvl = spec->gpio_led_polarity ?
5074 AC_PINCTL_VREF_HIZ : AC_PINCTL_VREF_GRD;
5075 muted_lvl = spec->gpio_led_polarity ?
5076 AC_PINCTL_VREF_GRD : AC_PINCTL_VREF_HIZ;
5077 spec->vref_led = muted ? muted_lvl : notmtd_lvl;
f1a73746
TI		 5078 stac_vrefout_set(codec, spec->vref_mute_led_nid,
5079 spec->vref_led);
c21bd025 5080 }
b4e81876
TI		 5081 return 0;
5082}
7df1ce1a
VK		 5083
5084/*
5085 * use power check for controlling mute led of HP notebooks
5086 */
5087static int stac92xx_check_power_status(struct hda_codec *codec,
5088 hda_nid_t nid)
5089{
5090 stac92xx_update_led_status(codec);
5091
5092 return 0;
5093}
45eebda7 5094#endif /* CONFIG_SND_HDA_POWER_SAVE */
2a43952a 5095#endif /* CONFIG_PM */
ff6fdc37 5096
2b63536f 5097static const struct hda_codec_ops stac92xx_patch_ops = {
2f2f4251
M		 5098 .build_controls = stac92xx_build_controls,
5099 .build_pcms = stac92xx_build_pcms,
5100 .init = stac92xx_init,
5101 .free = stac92xx_free,
4e55096e 5102 .unsol_event = stac92xx_unsol_event,
2a43952a 5103#ifdef CONFIG_PM
c6798d2b 5104 .suspend = stac92xx_suspend,
ff6fdc37
M		 5105 .resume = stac92xx_resume,
5106#endif
fb8d1a34 5107 .reboot_notify = stac92xx_shutup,
2f2f4251
M		 5108};
5109
5110static int patch_stac9200(struct hda_codec *codec)
5111{
5112 struct sigmatel_spec *spec;
c7d4b2fa 5113 int err;
2f2f4251 5114
e560d8d8 5115 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5116 if (spec == NULL)
5117 return -ENOMEM;
5118
a252c81a 5119 codec->no_trigger_sense = 1;
2f2f4251 5120 codec->spec = spec;
1b0e372d 5121 spec->linear_tone_beep = 1;
a4eed138 5122 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 5123 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 5124 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
5125 stac9200_models,
5126 stac9200_cfg_tbl);
330ee995 5127 if (spec->board_config < 0)
9a11f1aa
TI		 5128 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5129 codec->chip_name);
330ee995
TI		 5130 else
5131 stac92xx_set_config_regs(codec,
af9f341a 5132 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M		 5133
5134 spec->multiout.max_channels = 2;
5135 spec->multiout.num_dacs = 1;
5136 spec->multiout.dac_nids = stac9200_dac_nids;
5137 spec->adc_nids = stac9200_adc_nids;
5138 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5139 spec->num_muxes = 1;
8b65727b 5140 spec->num_dmics = 0;
9e05b7a3 5141 spec->num_adcs = 1;
a64135a2 5142 spec->num_pwrs = 0;
c7d4b2fa 5143
58eec423
MCC		 5144 if (spec->board_config == STAC_9200_M4 ||
5145 spec->board_config == STAC_9200_M4_2 ||
bf277785 5146 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 5147 spec->init = stac9200_eapd_init;
5148 else
5149 spec->init = stac9200_core_init;
2f2f4251 5150 spec->mixer = stac9200_mixer;
c7d4b2fa 5151
117f257d
TI		 5152 if (spec->board_config == STAC_9200_PANASONIC) {
5153 spec->gpio_mask = spec->gpio_dir = 0x09;
5154 spec->gpio_data = 0x00;
5155 }
5156
c7d4b2fa
M		 5157 err = stac9200_parse_auto_config(codec);
5158 if (err < 0) {
5159 stac92xx_free(codec);
5160 return err;
5161 }
2f2f4251 5162
2acc9dcb
TI		 5163 /* CF-74 has no headphone detection, and the driver should *NOT*
5164 * do detection and HP/speaker toggle because the hardware does it.
5165 */
5166 if (spec->board_config == STAC_9200_PANASONIC)
5167 spec->hp_detect = 0;
5168
2f2f4251
M		 5169 codec->patch_ops = stac92xx_patch_ops;
5170
5171 return 0;
5172}
5173
8e21c34c
TD		 5174static int patch_stac925x(struct hda_codec *codec)
5175{
5176 struct sigmatel_spec *spec;
5177 int err;
5178
5179 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5180 if (spec == NULL)
5181 return -ENOMEM;
5182
a252c81a 5183 codec->no_trigger_sense = 1;
8e21c34c 5184 codec->spec = spec;
1b0e372d 5185 spec->linear_tone_beep = 1;
a4eed138 5186 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5187 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 5188
5189 /* Check first for codec ID */
5190 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5191 STAC_925x_MODELS,
5192 stac925x_models,
5193 stac925x_codec_id_cfg_tbl);
5194
5195 /* Now checks for PCI ID, if codec ID is not found */
5196 if (spec->board_config < 0)
5197 spec->board_config = snd_hda_check_board_config(codec,
5198 STAC_925x_MODELS,
8e21c34c
TD		 5199 stac925x_models,
5200 stac925x_cfg_tbl);
9e507abd 5201 again:
330ee995 5202 if (spec->board_config < 0)
9a11f1aa
TI		 5203 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5204 codec->chip_name);
330ee995
TI		 5205 else
5206 stac92xx_set_config_regs(codec,
af9f341a 5207 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 5208
5209 spec->multiout.max_channels = 2;
5210 spec->multiout.num_dacs = 1;
5211 spec->multiout.dac_nids = stac925x_dac_nids;
5212 spec->adc_nids = stac925x_adc_nids;
5213 spec->mux_nids = stac925x_mux_nids;
5214 spec->num_muxes = 1;
9e05b7a3 5215 spec->num_adcs = 1;
a64135a2 5216 spec->num_pwrs = 0;
2c11f955
TD		 5217 switch (codec->vendor_id) {
5218 case 0x83847632: /* STAC9202 */
5219 case 0x83847633: /* STAC9202D */
5220 case 0x83847636: /* STAC9251 */
5221 case 0x83847637: /* STAC9251D */
f6e9852a 5222 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5223 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 5224 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5225 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 5226 break;
5227 default:
5228 spec->num_dmics = 0;
5229 break;
5230 }
8e21c34c
TD		 5231
5232 spec->init = stac925x_core_init;
5233 spec->mixer = stac925x_mixer;
6479c631
TI		 5234 spec->num_caps = 1;
5235 spec->capvols = stac925x_capvols;
5236 spec->capsws = stac925x_capsws;
8e21c34c 5237
9009b0e4 5238 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 5239 if (!err) {
5240 if (spec->board_config < 0) {
5241 printk(KERN_WARNING "hda_codec: No auto-config is "
5242 "available, default to model=ref\n");
5243 spec->board_config = STAC_925x_REF;
5244 goto again;
5245 }
5246 err = -EINVAL;
5247 }
8e21c34c
TD		 5248 if (err < 0) {
5249 stac92xx_free(codec);
5250 return err;
5251 }
5252
5253 codec->patch_ops = stac92xx_patch_ops;
5254
5255 return 0;
5256}
5257
e1f0d669
MR		 5258static int patch_stac92hd73xx(struct hda_codec *codec)
5259{
5260 struct sigmatel_spec *spec;
5261 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5262 int err = 0;
c21ca4a8 5263 int num_dacs;
e1f0d669
MR		 5264
5265 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5266 if (spec == NULL)
5267 return -ENOMEM;
5268
a252c81a 5269 codec->no_trigger_sense = 1;
e1f0d669 5270 codec->spec = spec;
1b0e372d 5271 spec->linear_tone_beep = 0;
e99d32b3 5272 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 5273 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5274 spec->pin_nids = stac92hd73xx_pin_nids;
5275 spec->board_config = snd_hda_check_board_config(codec,
5276 STAC_92HD73XX_MODELS,
5277 stac92hd73xx_models,
5278 stac92hd73xx_cfg_tbl);
842ae638
TI		 5279 /* check codec subsystem id if not found */
5280 if (spec->board_config < 0)
5281 spec->board_config =
5282 snd_hda_check_board_codec_sid_config(codec,
5283 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5284 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5285again:
330ee995 5286 if (spec->board_config < 0)
9a11f1aa
TI		 5287 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5288 codec->chip_name);
330ee995
TI		 5289 else
5290 stac92xx_set_config_regs(codec,
af9f341a 5291 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5292
c21ca4a8 5293 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 5294 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5295
c21ca4a8 5296 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 5297 printk(KERN_WARNING "hda_codec: Could not determine "
5298 "number of channels defaulting to DAC count\n");
c21ca4a8 5299 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5300 }
e2aec171 5301 spec->init = stac92hd73xx_core_init;
c21ca4a8 5302 switch (num_dacs) {
e1f0d669 5303 case 0x3: /* 6 Channel */
d78d7a90 5304 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 5305 break;
5306 case 0x4: /* 8 Channel */
d78d7a90 5307 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 5308 break;
5309 case 0x5: /* 10 Channel */
d78d7a90
TI		 5310 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5311 break;
c21ca4a8
TI		 5312 }
5313 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5314
e1f0d669
MR		 5315 spec->aloopback_mask = 0x01;
5316 spec->aloopback_shift = 8;
5317
1cd2224c 5318 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 5319 spec->mux_nids = stac92hd73xx_mux_nids;
5320 spec->adc_nids = stac92hd73xx_adc_nids;
5321 spec->dmic_nids = stac92hd73xx_dmic_nids;
5322 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5323 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 5324
5325 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5326 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5327 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5328
6479c631
TI		 5329 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5330 spec->capvols = stac92hd73xx_capvols;
5331 spec->capsws = stac92hd73xx_capsws;
5332
a7662640 5333 switch (spec->board_config) {
6b3ab21e 5334 case STAC_DELL_EQ:
d654a660 5335 spec->init = dell_eq_core_init;
6b3ab21e 5336 /* fallthru */
661cd8fb
TI		 5337 case STAC_DELL_M6_AMIC:
5338 case STAC_DELL_M6_DMIC:
5339 case STAC_DELL_M6_BOTH:
2a9c7816 5340 spec->num_smuxes = 0;
c0cea0d0 5341 spec->eapd_switch = 0;
6b3ab21e 5342
661cd8fb
TI		 5343 switch (spec->board_config) {
5344 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5345 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5346 spec->num_dmics = 0;
5347 break;
661cd8fb 5348 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5349 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5350 spec->num_dmics = 1;
5351 break;
661cd8fb 5352 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5353 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5354 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5355 spec->num_dmics = 1;
5356 break;
5357 }
5358 break;
842ae638
TI		 5359 case STAC_ALIENWARE_M17X:
5360 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5361 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5362 spec->eapd_switch = 0;
5363 break;
a7662640
MR		 5364 default:
5365 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5366 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5367 spec->eapd_switch = 1;
5207e10e 5368 break;
a7662640 5369 }
af6ee302 5370 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5371 /* GPIO0 High = Enable EAPD */
5372 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5373 spec->gpio_data = 0x01;
5374 }
a7662640 5375
a64135a2
MR		 5376 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5377 spec->pwr_nids = stac92hd73xx_pwr_nids;
5378
9009b0e4 5379 err = stac92xx_parse_auto_config(codec);
e1f0d669
MR		 5380
5381 if (!err) {
5382 if (spec->board_config < 0) {
5383 printk(KERN_WARNING "hda_codec: No auto-config is "
5384 "available, default to model=ref\n");
5385 spec->board_config = STAC_92HD73XX_REF;
5386 goto again;
5387 }
5388 err = -EINVAL;
5389 }
5390
5391 if (err < 0) {
5392 stac92xx_free(codec);
5393 return err;
5394 }
5395
9e43f0de
TI		 5396 if (spec->board_config == STAC_92HD73XX_NO_JD)
5397 spec->hp_detect = 0;
5398
e1f0d669
MR		 5399 codec->patch_ops = stac92xx_patch_ops;
5400
2d34e1b3
TI		 5401 codec->proc_widget_hook = stac92hd7x_proc_hook;
5402
e1f0d669
MR		 5403 return 0;
5404}
5405
cbbf50b2 5406static int hp_bnb2011_with_dock(struct hda_codec *codec)
335e3b86
VK		 5407{
5408 if (codec->vendor_id != 0x111d7605 &&
5409 codec->vendor_id != 0x111d76d1)
5410 return 0;
5411
5412 switch (codec->subsystem_id) {
5413 case 0x103c1618:
5414 case 0x103c1619:
5415 case 0x103c161a:
5416 case 0x103c161b:
5417 case 0x103c161c:
5418 case 0x103c161d:
5419 case 0x103c161e:
5420 case 0x103c161f:
335e3b86
VK		 5421
5422 case 0x103c162a:
5423 case 0x103c162b:
5424
5425 case 0x103c1630:
5426 case 0x103c1631:
5427
5428 case 0x103c1633:
cbbf50b2 5429 case 0x103c1634:
335e3b86
VK		 5430 case 0x103c1635:
5431
335e3b86
VK		 5432 case 0x103c3587:
5433 case 0x103c3588:
5434 case 0x103c3589:
5435 case 0x103c358a:
5436
5437 case 0x103c3667:
5438 case 0x103c3668:
cbbf50b2
VK		 5439 case 0x103c3669:
5440
5441 return 1;
335e3b86
VK		 5442 }
5443 return 0;
5444}
5445
699d8995
VK		 5446static void stac92hd8x_add_pin(struct hda_codec *codec, hda_nid_t nid)
5447{
5448 struct sigmatel_spec *spec = codec->spec;
5449 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
5450 int i;
5451
5452 spec->auto_pin_nids[spec->auto_pin_cnt] = nid;
5453 spec->auto_pin_cnt++;
5454
5455 if (get_defcfg_device(def_conf) == AC_JACK_MIC_IN &&
5456 get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE) {
5457 for (i = 0; i < ARRAY_SIZE(stac92hd83xxx_dmic_nids); i++) {
5458 if (nid == stac92hd83xxx_dmic_nids[i]) {
5459 spec->auto_dmic_nids[spec->auto_dmic_cnt] = nid;
5460 spec->auto_dmic_cnt++;
5461 }
5462 }
5463 }
5464}
5465
5466static void stac92hd8x_add_adc(struct hda_codec *codec, hda_nid_t nid)
5467{
5468 struct sigmatel_spec *spec = codec->spec;
5469
5470 spec->auto_adc_nids[spec->auto_adc_cnt] = nid;
5471 spec->auto_adc_cnt++;
5472}
5473
5474static void stac92hd8x_add_mux(struct hda_codec *codec, hda_nid_t nid)
5475{
5476 int i, j;
5477 struct sigmatel_spec *spec = codec->spec;
5478
5479 for (i = 0; i < spec->auto_adc_cnt; i++) {
5480 if (get_connection_index(codec,
5481 spec->auto_adc_nids[i], nid) >= 0) {
5482 /* mux and volume for adc_nids[i] */
5483 if (!spec->auto_mux_nids[i]) {
5484 spec->auto_mux_nids[i] = nid;
5485 /* 92hd codecs capture volume is in mux */
5486 spec->auto_capvols[i] = HDA_COMPOSE_AMP_VAL(nid,
5487 3, 0, HDA_OUTPUT);
5488 }
5489 for (j = 0; j < spec->auto_dmic_cnt; j++) {
5490 if (get_connection_index(codec, nid,
5491 spec->auto_dmic_nids[j]) >= 0) {
5492 /* dmux for adc_nids[i] */
5493 if (!spec->auto_dmux_nids[i])
5494 spec->auto_dmux_nids[i] = nid;
5495 break;
5496 }
5497 }
5498 break;
5499 }
5500 }
5501}
5502
5503static void stac92hd8x_fill_auto_spec(struct hda_codec *codec)
5504{
5505 hda_nid_t nid, end_nid;
5506 unsigned int wid_caps, wid_type;
5507 struct sigmatel_spec *spec = codec->spec;
5508
5509 end_nid = codec->start_nid + codec->num_nodes;
5510
5511 for (nid = codec->start_nid; nid < end_nid; nid++) {
5512 wid_caps = get_wcaps(codec, nid);
5513 wid_type = get_wcaps_type(wid_caps);
5514
5515 if (wid_type == AC_WID_PIN)
5516 stac92hd8x_add_pin(codec, nid);
5517
5518 if (wid_type == AC_WID_AUD_IN && !(wid_caps & AC_WCAP_DIGITAL))
5519 stac92hd8x_add_adc(codec, nid);
5520 }
5521
5522 for (nid = codec->start_nid; nid < end_nid; nid++) {
5523 wid_caps = get_wcaps(codec, nid);
5524 wid_type = get_wcaps_type(wid_caps);
5525
5526 if (wid_type == AC_WID_AUD_SEL)
5527 stac92hd8x_add_mux(codec, nid);
5528 }
5529
5530 spec->pin_nids = spec->auto_pin_nids;
5531 spec->num_pins = spec->auto_pin_cnt;
5532 spec->adc_nids = spec->auto_adc_nids;
5533 spec->num_adcs = spec->auto_adc_cnt;
5534 spec->capvols = spec->auto_capvols;
5535 spec->capsws = spec->auto_capvols;
5536 spec->num_caps = spec->auto_adc_cnt;
5537 spec->mux_nids = spec->auto_mux_nids;
5538 spec->num_muxes = spec->auto_adc_cnt;
5539 spec->dmux_nids = spec->auto_dmux_nids;
5540 spec->num_dmuxes = spec->auto_adc_cnt;
5541 spec->dmic_nids = spec->auto_dmic_nids;
5542 spec->num_dmics = spec->auto_dmic_cnt;
5543}
5544
d0513fc6
MR		 5545static int patch_stac92hd83xxx(struct hda_codec *codec)
5546{
5547 struct sigmatel_spec *spec;
5548 int err;
5549
5550 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5551 if (spec == NULL)
5552 return -ENOMEM;
5553
cbbf50b2
VK		 5554 if (hp_bnb2011_with_dock(codec)) {
5555 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
5556 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
5557 }
5558
a252c81a 5559 codec->no_trigger_sense = 1;
d0513fc6 5560 codec->spec = spec;
699d8995
VK		 5561
5562 stac92hd8x_fill_auto_spec(codec);
5563
1db7ccdb 5564 spec->linear_tone_beep = 0;
0ffa9807 5565 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5566 spec->digbeep_nid = 0x21;
d0513fc6 5567 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 5568 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5569 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 5570 spec->init = stac92hd83xxx_core_init;
6479c631 5571
d0513fc6
MR		 5572 spec->board_config = snd_hda_check_board_config(codec,
5573 STAC_92HD83XXX_MODELS,
5574 stac92hd83xxx_models,
5575 stac92hd83xxx_cfg_tbl);
5576again:
330ee995 5577 if (spec->board_config < 0)
9a11f1aa
TI		 5578 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5579 codec->chip_name);
330ee995
TI		 5580 else
5581 stac92xx_set_config_regs(codec,
af9f341a 5582 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5583
b4e81876
TI		 5584 codec->patch_ops = stac92xx_patch_ops;
5585
6a557c94 5586 if (find_mute_led_cfg(codec, -1/*no default cfg*/))
e108c7b7
VK		 5587 snd_printd("mute LED gpio %d polarity %d\n",
5588 spec->gpio_led,
5589 spec->gpio_led_polarity);
5590
b4e81876
TI		 5591#ifdef CONFIG_SND_HDA_POWER_SAVE
5592 if (spec->gpio_led) {
f1a73746 5593 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5594 spec->gpio_mask |= spec->gpio_led;
5595 spec->gpio_dir |= spec->gpio_led;
5596 spec->gpio_data |= spec->gpio_led;
5597 } else {
5598 codec->patch_ops.set_power_state =
5599 stac92xx_set_power_state;
45eebda7
VK		 5600 }
5601 codec->patch_ops.pre_resume = stac92xx_pre_resume;
b4e81876 5602 codec->patch_ops.check_power_status =
7df1ce1a 5603 stac92xx_check_power_status;
b4e81876
TI		 5604 }
5605#endif
5606
9009b0e4 5607 err = stac92xx_parse_auto_config(codec);
d0513fc6
MR		 5608 if (!err) {
5609 if (spec->board_config < 0) {
5610 printk(KERN_WARNING "hda_codec: No auto-config is "
5611 "available, default to model=ref\n");
5612 spec->board_config = STAC_92HD83XXX_REF;
5613 goto again;
5614 }
5615 err = -EINVAL;
5616 }
5617
5618 if (err < 0) {
5619 stac92xx_free(codec);
5620 return err;
5621 }
5622
2d34e1b3
TI		 5623 codec->proc_widget_hook = stac92hd_proc_hook;
5624
d0513fc6
MR		 5625 return 0;
5626}
5627
6df703ae
HRK		 5628static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5629 hda_nid_t dig0pin)
5630{
5631 struct sigmatel_spec *spec = codec->spec;
5632 int idx;
5633
5634 for (idx = 0; idx < spec->num_pins; idx++)
5635 if (spec->pin_nids[idx] == dig0pin)
5636 break;
5637 if ((idx + 2) >= spec->num_pins)
5638 return 0;
5639
5640 /* dig1pin case */
330ee995 5641 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5642 return 2;
5643
5644 /* dig0pin + dig2pin case */
330ee995 5645 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5646 return 2;
330ee995 5647 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5648 return 1;
5649 else
5650 return 0;
5651}
5652
75d1aeb9
TI		 5653/* HP dv7 bass switch - GPIO5 */
5654#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5655static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5656 struct snd_ctl_elem_value *ucontrol)
5657{
5658 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5659 struct sigmatel_spec *spec = codec->spec;
5660 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5661 return 0;
5662}
5663
5664static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5665 struct snd_ctl_elem_value *ucontrol)
5666{
5667 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5668 struct sigmatel_spec *spec = codec->spec;
5669 unsigned int gpio_data;
5670
5671 gpio_data = (spec->gpio_data & ~0x20) |
5672 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5673 if (gpio_data == spec->gpio_data)
5674 return 0;
5675 spec->gpio_data = gpio_data;
5676 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5677 return 1;
5678}
5679
2b63536f 5680static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
75d1aeb9
TI		 5681 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5682 .info = stac_hp_bass_gpio_info,
5683 .get = stac_hp_bass_gpio_get,
5684 .put = stac_hp_bass_gpio_put,
5685};
5686
5687static int stac_add_hp_bass_switch(struct hda_codec *codec)
5688{
5689 struct sigmatel_spec *spec = codec->spec;
5690
5691 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5692 "Bass Speaker Playback Switch", 0))
5693 return -ENOMEM;
5694
5695 spec->gpio_mask |= 0x20;
5696 spec->gpio_dir |= 0x20;
5697 spec->gpio_data |= 0x20;
5698 return 0;
5699}
5700
e035b841
MR		 5701static int patch_stac92hd71bxx(struct hda_codec *codec)
5702{
5703 struct sigmatel_spec *spec;
2b63536f 5704 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5705 unsigned int pin_cfg;
e035b841
MR		 5706 int err = 0;
5707
5708 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5709 if (spec == NULL)
5710 return -ENOMEM;
5711
a252c81a 5712 codec->no_trigger_sense = 1;
e035b841 5713 codec->spec = spec;
1b0e372d 5714 spec->linear_tone_beep = 0;
8daaaa97 5715 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5716 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5717 switch (codec->vendor_id) {
5718 case 0x111d76b6:
5719 case 0x111d76b7:
5720 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5721 break;
5722 case 0x111d7603:
5723 case 0x111d7608:
5724 /* On 92HD75Bx 0x27 isn't a pin nid */
5725 spec->num_pins--;
5726 /* fallthrough */
5727 default:
5728 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5729 }
aafc4412 5730 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5731 spec->board_config = snd_hda_check_board_config(codec,
5732 STAC_92HD71BXX_MODELS,
5733 stac92hd71bxx_models,
5734 stac92hd71bxx_cfg_tbl);
5735again:
330ee995 5736 if (spec->board_config < 0)
9a11f1aa
TI		 5737 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5738 codec->chip_name);
330ee995
TI		 5739 else
5740 stac92xx_set_config_regs(codec,
af9f341a 5741 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5742
fc64b26c 5743 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5744 /* GPIO0 = EAPD */
5745 spec->gpio_mask = 0x01;
5746 spec->gpio_dir = 0x01;
5747 spec->gpio_data = 0x01;
5748 }
5749
6df703ae
HRK		 5750 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5751 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5752
6479c631
TI		 5753 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5754 spec->capvols = stac92hd71bxx_capvols;
5755 spec->capsws = stac92hd71bxx_capsws;
5756
541eee87
MR		 5757 switch (codec->vendor_id) {
5758 case 0x111d76b6: /* 4 Port without Analog Mixer */
5759 case 0x111d76b7:
23c7b521
HRK		 5760 unmute_init++;
5761 /* fallthru */
541eee87
MR		 5762 case 0x111d76b4: /* 6 Port without Analog Mixer */
5763 case 0x111d76b5:
541eee87 5764 spec->init = stac92hd71bxx_core_init;
0ffa9807 5765 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5766 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5767 stac92hd71bxx_dmic_nids,
5768 STAC92HD71BXX_NUM_DMICS);
541eee87 5769 break;
aafc4412 5770 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 5771 switch (spec->board_config) {
5772 case STAC_HP_M4:
72474be6 5773 /* Enable VREF power saving on GPIO1 detect */
3a93897e 5774 err = stac_add_event(codec, codec->afg,
c6e4c666
TI		 5775 STAC_VREF_EVENT, 0x02);
5776 if (err < 0)
5777 return err;
c5d08bb5 5778 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6 5779 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3a93897e 5780 snd_hda_jack_detect_enable(codec, codec->afg, 0);
72474be6
MR		 5781 spec->gpio_mask |= 0x02;
5782 break;
5783 }
8daaaa97 5784 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5785 (codec->revision_id & 0xf) == 1)
8daaaa97 5786 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5787
aafc4412 5788 /* disable VSW */
26a27980 5789 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5790 unmute_init++;
330ee995
TI		 5791 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5792 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
2b63536f 5793 spec->dmic_nids = stac92hd71bxx_dmic_5port_nids;
ab5a6ebe 5794 spec->num_dmics = stac92xx_connected_ports(codec,
2b63536f 5795 stac92hd71bxx_dmic_5port_nids,
6df703ae 5796 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 5797 break;
5798 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5799 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5800 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5801
aafc4412 5802 /* fallthru */
541eee87 5803 default:
26a27980 5804 spec->init = stac92hd71bxx_core_init;
0ffa9807 5805 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5806 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5807 stac92hd71bxx_dmic_nids,
5808 STAC92HD71BXX_NUM_DMICS);
5207e10e 5809 break;
541eee87
MR		 5810 }
5811
ca8d33fc
MR		 5812 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5813 snd_hda_sequence_write_cache(codec, unmute_init);
5814
d78d7a90 5815 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5816 spec->aloopback_mask = 0x50;
541eee87
MR		 5817 spec->aloopback_shift = 0;
5818
8daaaa97 5819 spec->powerdown_adcs = 1;
1cd2224c 5820 spec->digbeep_nid = 0x26;
e035b841
MR		 5821 spec->mux_nids = stac92hd71bxx_mux_nids;
5822 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5823 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5824 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5825
5826 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5827 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5828 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5829 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5830
d38cce70
KG		 5831 snd_printdd("Found board config: %d\n", spec->board_config);
5832
6a14f585
MR		 5833 switch (spec->board_config) {
5834 case STAC_HP_M4:
6a14f585 5835 /* enable internal microphone */
330ee995 5836 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 5837 stac92xx_auto_set_pinctl(codec, 0x0e,
5838 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5839 /* fallthru */
5840 case STAC_DELL_M4_2:
5841 spec->num_dmics = 0;
5842 spec->num_smuxes = 0;
5843 spec->num_dmuxes = 0;
5844 break;
5845 case STAC_DELL_M4_1:
5846 case STAC_DELL_M4_3:
5847 spec->num_dmics = 1;
5848 spec->num_smuxes = 0;
ea18aa46 5849 spec->num_dmuxes = 1;
6a14f585 5850 break;
514bf54c
JG		 5851 case STAC_HP_DV4_1222NR:
5852 spec->num_dmics = 1;
5853 /* I don't know if it needs 1 or 2 smuxes - will wait for
5854 * bug reports to fix if needed
5855 */
5856 spec->num_smuxes = 1;
5857 spec->num_dmuxes = 1;
514bf54c 5858 /* fallthrough */
2a6ce6e5
TI		 5859 case STAC_HP_DV4:
5860 spec->gpio_led = 0x01;
5861 /* fallthrough */
e2ea57a8 5862 case STAC_HP_DV5:
330ee995 5863 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5864 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 5865 /* HP dv6 gives the headphone pin as a line-out. Thus we
5866 * need to set hp_detect flag here to force to enable HP
5867 * detection.
5868 */
5869 spec->hp_detect = 1;
e2ea57a8 5870 break;
ae6241fb
CP		 5871 case STAC_HP_HDX:
5872 spec->num_dmics = 1;
5873 spec->num_dmuxes = 1;
5874 spec->num_smuxes = 1;
26ebe0a2 5875 spec->gpio_led = 0x08;
86d190e7
TI		 5876 break;
5877 }
443e26d0 5878
c357aab0 5879 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK		 5880 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5881 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5882 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5883 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5884 /* It was changed in the BIOS to just satisfy MS DTM.
5885 * Lets turn it back into slaved HP
5886 */
5887 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5888 | (AC_JACK_HP_OUT <<
5889 AC_DEFCFG_DEVICE_SHIFT);
5890 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5891 | AC_DEFCFG_SEQUENCE)))
5892 | 0x1f;
5893 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5894 }
5895 }
5896
6a557c94 5897 if (find_mute_led_cfg(codec, 1))
c357aab0
VK		 5898 snd_printd("mute LED gpio %d polarity %d\n",
5899 spec->gpio_led,
5900 spec->gpio_led_polarity);
5bdaaada 5901
86d190e7
TI		 5902#ifdef CONFIG_SND_HDA_POWER_SAVE
5903 if (spec->gpio_led) {
f1a73746 5904 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5905 spec->gpio_mask |= spec->gpio_led;
5906 spec->gpio_dir |= spec->gpio_led;
5907 spec->gpio_data |= spec->gpio_led;
5908 } else {
5909 codec->patch_ops.set_power_state =
5910 stac92xx_set_power_state;
45eebda7
VK		 5911 }
5912 codec->patch_ops.pre_resume = stac92xx_pre_resume;
6fce61ae 5913 codec->patch_ops.check_power_status =
7df1ce1a 5914 stac92xx_check_power_status;
86d190e7 5915 }
443e26d0 5916#endif
6a14f585 5917
c21ca4a8 5918 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5919
9009b0e4 5920 err = stac92xx_parse_auto_config(codec);
e035b841
MR		 5921 if (!err) {
5922 if (spec->board_config < 0) {
5923 printk(KERN_WARNING "hda_codec: No auto-config is "
5924 "available, default to model=ref\n");
5925 spec->board_config = STAC_92HD71BXX_REF;
5926 goto again;
5927 }
5928 err = -EINVAL;
5929 }
5930
5931 if (err < 0) {
5932 stac92xx_free(codec);
5933 return err;
5934 }
5935
75d1aeb9 5936 /* enable bass on HP dv7 */
2a6ce6e5
TI		 5937 if (spec->board_config == STAC_HP_DV4 ||
5938 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI		 5939 unsigned int cap;
5940 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
5941 cap &= AC_GPIO_IO_COUNT;
5942 if (cap >= 6)
5943 stac_add_hp_bass_switch(codec);
5944 }
5945
2d34e1b3
TI		 5946 codec->proc_widget_hook = stac92hd7x_proc_hook;
5947
e035b841 5948 return 0;
86d190e7 5949}
e035b841 5950
2f2f4251
M		 5951static int patch_stac922x(struct hda_codec *codec)
5952{
5953 struct sigmatel_spec *spec;
c7d4b2fa 5954 int err;
2f2f4251 5955
e560d8d8 5956 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5957 if (spec == NULL)
5958 return -ENOMEM;
5959
a252c81a 5960 codec->no_trigger_sense = 1;
2f2f4251 5961 codec->spec = spec;
1b0e372d 5962 spec->linear_tone_beep = 1;
a4eed138 5963 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5964 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5965 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5966 stac922x_models,
5967 stac922x_cfg_tbl);
536319af 5968 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5969 spec->gpio_mask = spec->gpio_dir = 0x03;
5970 spec->gpio_data = 0x03;
3fc24d85
TI		 5971 /* Intel Macs have all same PCI SSID, so we need to check
5972 * codec SSID to distinguish the exact models
5973 */
6f0778d8 5974 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5975 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5976
5977 case 0x106b0800:
5978 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5979 break;
5d5d3bc3
IZ		 5980 case 0x106b0600:
5981 case 0x106b0700:
5982 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5983 break;
5d5d3bc3
IZ		 5984 case 0x106b0e00:
5985 case 0x106b0f00:
5986 case 0x106b1600:
5987 case 0x106b1700:
5988 case 0x106b0200:
5989 case 0x106b1e00:
5990 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5991 break;
5d5d3bc3
IZ		 5992 case 0x106b1a00:
5993 case 0x00000100:
5994 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5995 break;
5d5d3bc3
IZ		 5996 case 0x106b0a00:
5997 case 0x106b2200:
5998 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5999 break;
536319af
NB		 6000 default:
6001 spec->board_config = STAC_INTEL_MAC_V3;
6002 break;
3fc24d85
TI		 6003 }
6004 }
6005
9e507abd 6006 again:
330ee995 6007 if (spec->board_config < 0)
9a11f1aa
TI		 6008 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6009 codec->chip_name);
330ee995
TI		 6010 else
6011 stac92xx_set_config_regs(codec,
af9f341a 6012 stac922x_brd_tbl[spec->board_config]);
2f2f4251 6013
c7d4b2fa
M		 6014 spec->adc_nids = stac922x_adc_nids;
6015 spec->mux_nids = stac922x_mux_nids;
2549413e 6016 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 6017 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 6018 spec->num_dmics = 0;
a64135a2 6019 spec->num_pwrs = 0;
c7d4b2fa
M		 6020
6021 spec->init = stac922x_core_init;
6479c631
TI		 6022
6023 spec->num_caps = STAC922X_NUM_CAPS;
6024 spec->capvols = stac922x_capvols;
6025 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 6026
6027 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 6028
9009b0e4 6029 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6030 if (!err) {
6031 if (spec->board_config < 0) {
6032 printk(KERN_WARNING "hda_codec: No auto-config is "
6033 "available, default to model=ref\n");
6034 spec->board_config = STAC_D945_REF;
6035 goto again;
6036 }
6037 err = -EINVAL;
6038 }
3cc08dc6
MP		 6039 if (err < 0) {
6040 stac92xx_free(codec);
6041 return err;
6042 }
6043
6044 codec->patch_ops = stac92xx_patch_ops;
6045
807a4636
TI		 6046 /* Fix Mux capture level; max to 2 */
6047 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
6048 (0 << AC_AMPCAP_OFFSET_SHIFT) |
6049 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
6050 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
6051 (0 << AC_AMPCAP_MUTE_SHIFT));
6052
3cc08dc6
MP		 6053 return 0;
6054}
6055
6056static int patch_stac927x(struct hda_codec *codec)
6057{
6058 struct sigmatel_spec *spec;
6059 int err;
6060
6061 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6062 if (spec == NULL)
6063 return -ENOMEM;
6064
a252c81a 6065 codec->no_trigger_sense = 1;
3cc08dc6 6066 codec->spec = spec;
1b0e372d 6067 spec->linear_tone_beep = 1;
45c1d85b 6068 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 6069 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 6070 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 6071 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
6072 stac927x_models,
6073 stac927x_cfg_tbl);
9e507abd 6074 again:
330ee995 6075 if (spec->board_config < 0)
9a11f1aa
TI		 6076 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6077 codec->chip_name);
330ee995
TI		 6078 else
6079 stac92xx_set_config_regs(codec,
af9f341a 6080 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 6081
1cd2224c 6082 spec->digbeep_nid = 0x23;
8e9068b1
MR		 6083 spec->adc_nids = stac927x_adc_nids;
6084 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
6085 spec->mux_nids = stac927x_mux_nids;
6086 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 6087 spec->smux_nids = stac927x_smux_nids;
6088 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 6089 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 6090 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 6091 spec->multiout.dac_nids = spec->dac_nids;
6092
af6ee302
TI		 6093 if (spec->board_config != STAC_D965_REF) {
6094 /* GPIO0 High = Enable EAPD */
6095 spec->eapd_mask = spec->gpio_mask = 0x01;
6096 spec->gpio_dir = spec->gpio_data = 0x01;
6097 }
6098
81d3dbde 6099 switch (spec->board_config) {
93ed1503 6100 case STAC_D965_3ST:
93ed1503 6101 case STAC_D965_5ST:
8e9068b1 6102 /* GPIO0 High = Enable EAPD */
8e9068b1 6103 spec->num_dmics = 0;
93ed1503 6104 spec->init = d965_core_init;
81d3dbde 6105 break;
8e9068b1 6106 case STAC_DELL_BIOS:
780c8be4
MR		 6107 switch (codec->subsystem_id) {
6108 case 0x10280209:
6109 case 0x1028022e:
6110 /* correct the device field to SPDIF out */
330ee995 6111 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 6112 break;
86d190e7 6113 }
03d7ca17 6114 /* configure the analog microphone on some laptops */
330ee995 6115 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 6116 /* correct the front output jack as a hp out */
330ee995 6117 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 6118 /* correct the front input jack as a mic */
330ee995 6119 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 6120 /* fallthru */
8e9068b1 6121 case STAC_DELL_3ST:
af6ee302
TI		 6122 if (codec->subsystem_id != 0x1028022f) {
6123 /* GPIO2 High = Enable EAPD */
6124 spec->eapd_mask = spec->gpio_mask = 0x04;
6125 spec->gpio_dir = spec->gpio_data = 0x04;
6126 }
7f16859a
MR		 6127 spec->dmic_nids = stac927x_dmic_nids;
6128 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 6129
ccca7cdc 6130 spec->init = dell_3st_core_init;
8e9068b1 6131 spec->dmux_nids = stac927x_dmux_nids;
1697055e 6132 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 6133 break;
54930531
TI		 6134 case STAC_927X_VOLKNOB:
6135 spec->num_dmics = 0;
6136 spec->init = stac927x_volknob_core_init;
6137 break;
7f16859a 6138 default:
8e9068b1 6139 spec->num_dmics = 0;
8e9068b1 6140 spec->init = stac927x_core_init;
af6ee302 6141 break;
7f16859a
MR		 6142 }
6143
6479c631
TI		 6144 spec->num_caps = STAC927X_NUM_CAPS;
6145 spec->capvols = stac927x_capvols;
6146 spec->capsws = stac927x_capsws;
6147
a64135a2 6148 spec->num_pwrs = 0;
d78d7a90 6149 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 6150 spec->aloopback_mask = 0x40;
6151 spec->aloopback_shift = 0;
c0cea0d0 6152 spec->eapd_switch = 1;
8e9068b1 6153
9009b0e4 6154 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6155 if (!err) {
6156 if (spec->board_config < 0) {
6157 printk(KERN_WARNING "hda_codec: No auto-config is "
6158 "available, default to model=ref\n");
6159 spec->board_config = STAC_D965_REF;
6160 goto again;
6161 }
6162 err = -EINVAL;
6163 }
c7d4b2fa
M		 6164 if (err < 0) {
6165 stac92xx_free(codec);
6166 return err;
6167 }
2f2f4251
M		 6168
6169 codec->patch_ops = stac92xx_patch_ops;
6170
2d34e1b3
TI		 6171 codec->proc_widget_hook = stac927x_proc_hook;
6172
52987656
TI		 6173 /*
6174 * !!FIXME!!
6175 * The STAC927x seem to require fairly long delays for certain
6176 * command sequences. With too short delays (even if the answer
6177 * is set to RIRB properly), it results in the silence output
6178 * on some hardwares like Dell.
6179 *
6180 * The below flag enables the longer delay (see get_response
6181 * in hda_intel.c).
6182 */
6183 codec->bus->needs_damn_long_delay = 1;
6184
e28d8322
TI		 6185 /* no jack detecion for ref-no-jd model */
6186 if (spec->board_config == STAC_D965_REF_NO_JD)
6187 spec->hp_detect = 0;
6188
2f2f4251
M		 6189 return 0;
6190}
6191
f3302a59
MP		 6192static int patch_stac9205(struct hda_codec *codec)
6193{
6194 struct sigmatel_spec *spec;
8259980e 6195 int err;
f3302a59
MP		 6196
6197 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6198 if (spec == NULL)
6199 return -ENOMEM;
6200
a252c81a 6201 codec->no_trigger_sense = 1;
f3302a59 6202 codec->spec = spec;
1b0e372d 6203 spec->linear_tone_beep = 1;
a4eed138 6204 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6205 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 6206 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6207 stac9205_models,
6208 stac9205_cfg_tbl);
9e507abd 6209 again:
330ee995 6210 if (spec->board_config < 0)
9a11f1aa
TI		 6211 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6212 codec->chip_name);
330ee995
TI		 6213 else
6214 stac92xx_set_config_regs(codec,
af9f341a 6215 stac9205_brd_tbl[spec->board_config]);
f3302a59 6216
1cd2224c 6217 spec->digbeep_nid = 0x23;
f3302a59 6218 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6219 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6220 spec->mux_nids = stac9205_mux_nids;
2549413e 6221 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 6222 spec->smux_nids = stac9205_smux_nids;
6223 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6224 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6225 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6226 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6227 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6228 spec->num_pwrs = 0;
f3302a59
MP		 6229
6230 spec->init = stac9205_core_init;
d78d7a90 6231 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6232
6479c631
TI		 6233 spec->num_caps = STAC9205_NUM_CAPS;
6234 spec->capvols = stac9205_capvols;
6235 spec->capsws = stac9205_capsws;
6236
e1f0d669
MR		 6237 spec->aloopback_mask = 0x40;
6238 spec->aloopback_shift = 0;
d9a4268e
TI		 6239 /* Turn on/off EAPD per HP plugging */
6240 if (spec->board_config != STAC_9205_EAPD)
6241 spec->eapd_switch = 1;
f3302a59 6242 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6243
ae0a8ed8 6244 switch (spec->board_config){
ae0a8ed8 6245 case STAC_9205_DELL_M43:
87d48363 6246 /* Enable SPDIF in/out */
330ee995
TI		 6247 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6248 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6249
4fe5195c 6250 /* Enable unsol response for GPIO4/Dock HP connection */
3a93897e 6251 err = stac_add_event(codec, codec->afg, STAC_VREF_EVENT, 0x01);
c6e4c666
TI		 6252 if (err < 0)
6253 return err;
c5d08bb5 6254 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c 6255 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3a93897e 6256 snd_hda_jack_detect_enable(codec, codec->afg, 0);
4fe5195c
MR		 6257
6258 spec->gpio_dir = 0x0b;
0fc9dec4 6259 spec->eapd_mask = 0x01;
4fe5195c
MR		 6260 spec->gpio_mask = 0x1b;
6261 spec->gpio_mute = 0x10;
e2e7d624 6262 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6263 * GPIO3 Low = DRM
87d48363 6264 */
4fe5195c 6265 spec->gpio_data = 0x01;
ae0a8ed8 6266 break;
b2c4f4d7
MR		 6267 case STAC_9205_REF:
6268 /* SPDIF-In enabled */
6269 break;
ae0a8ed8
TD		 6270 default:
6271 /* GPIO0 High = EAPD */
0fc9dec4 6272 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6273 spec->gpio_data = 0x01;
ae0a8ed8
TD		 6274 break;
6275 }
33382403 6276
9009b0e4 6277 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6278 if (!err) {
6279 if (spec->board_config < 0) {
6280 printk(KERN_WARNING "hda_codec: No auto-config is "
6281 "available, default to model=ref\n");
6282 spec->board_config = STAC_9205_REF;
6283 goto again;
6284 }
6285 err = -EINVAL;
6286 }
f3302a59
MP		 6287 if (err < 0) {
6288 stac92xx_free(codec);
6289 return err;
6290 }
6291
6292 codec->patch_ops = stac92xx_patch_ops;
6293
2d34e1b3
TI		 6294 codec->proc_widget_hook = stac9205_proc_hook;
6295
f3302a59
MP		 6296 return 0;
6297}
6298
db064e50 6299/*
6d859065 6300 * STAC9872 hack
db064e50
TI		 6301 */
6302
2b63536f 6303static const struct hda_verb stac9872_core_init[] = {
1624cb9a 6304 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 6305 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6306 {}
6307};
6308
2b63536f 6309static const hda_nid_t stac9872_pin_nids[] = {
caa10b6e
TI		 6310 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6311 0x11, 0x13, 0x14,
6312};
6313
2b63536f 6314static const hda_nid_t stac9872_adc_nids[] = {
caa10b6e
TI		 6315 0x8 /*,0x6*/
6316};
6317
2b63536f 6318static const hda_nid_t stac9872_mux_nids[] = {
caa10b6e
TI		 6319 0x15
6320};
6321
2b63536f 6322static const unsigned long stac9872_capvols[] = {
6479c631
TI		 6323 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6324};
6325#define stac9872_capsws stac9872_capvols
6326
2b63536f 6327static const unsigned int stac9872_vaio_pin_configs[9] = {
307282c8
TI		 6328 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6329 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6330 0x90a7013e
6331};
6332
ea734963 6333static const char * const stac9872_models[STAC_9872_MODELS] = {
307282c8
TI		 6334 [STAC_9872_AUTO] = "auto",
6335 [STAC_9872_VAIO] = "vaio",
6336};
6337
2b63536f 6338static const unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
307282c8
TI		 6339 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6340};
6341
2b63536f 6342static const struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 6343 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6344 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 6345 {} /* terminator */
6346};
6347
6d859065 6348static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 6349{
6350 struct sigmatel_spec *spec;
1e137f92 6351 int err;
db064e50 6352
db064e50
TI		 6353 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6354 if (spec == NULL)
6355 return -ENOMEM;
a252c81a 6356 codec->no_trigger_sense = 1;
db064e50 6357 codec->spec = spec;
1b0e372d 6358 spec->linear_tone_beep = 1;
b04add95
TI		 6359 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6360 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI		 6361
6362 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6363 stac9872_models,
6364 stac9872_cfg_tbl);
307282c8 6365 if (spec->board_config < 0)
9a11f1aa
TI		 6366 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6367 codec->chip_name);
307282c8
TI		 6368 else
6369 stac92xx_set_config_regs(codec,
6370 stac9872_brd_tbl[spec->board_config]);
db064e50 6371
1e137f92
TI		 6372 spec->multiout.dac_nids = spec->dac_nids;
6373 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6374 spec->adc_nids = stac9872_adc_nids;
6375 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6376 spec->mux_nids = stac9872_mux_nids;
1e137f92 6377 spec->init = stac9872_core_init;
6479c631
TI		 6378 spec->num_caps = 1;
6379 spec->capvols = stac9872_capvols;
6380 spec->capsws = stac9872_capsws;
1e137f92 6381
9009b0e4 6382 err = stac92xx_parse_auto_config(codec);
1e137f92
TI		 6383 if (err < 0) {
6384 stac92xx_free(codec);
6385 return -EINVAL;
6386 }
6387 spec->input_mux = &spec->private_imux;
6388 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 6389 return 0;
6390}
6391
6392
2f2f4251
M		 6393/*
6394 * patch entries
6395 */
2b63536f 6396static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 6397 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6398 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6399 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6400 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6401 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6402 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6403 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 6404 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6405 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6406 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6407 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6408 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6409 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 6410 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6411 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6412 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6413 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6414 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6415 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6416 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6417 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6418 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6419 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 6420 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6421 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6422 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6423 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6424 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6425 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 6426 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6427 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 6428 /* The following does not take into account .id=0x83847661 when subsys =
6429 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6430 * currently not fully supported.
6431 */
6432 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6433 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6434 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6435 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 6436 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6437 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6438 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6439 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6440 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6441 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6442 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6443 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6444 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6445 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6446 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6447 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6448 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 6449 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6450 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 6451 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6452 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6453 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6454 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6455 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 6456 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6457 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6458 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 6459 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6460 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6461 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6462 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6463 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6464 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6465 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6466 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 6467 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6468 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6469 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6470 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6471 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6472 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6473 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6474 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6475 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6476 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6477 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6478 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6479 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6480 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6481 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
46724c2e 6482 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6483 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK		 6484 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
6485 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6486 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
ad5d8755
CC		 6487 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
6488 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
6489 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
6490 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
6491 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
6492 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
6493 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
6494 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
6495 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
6496 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
6497 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
6498 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
2f2f4251
M		 6499 {} /* terminator */
6500};
1289e9e8
TI		 6501
6502MODULE_ALIAS("snd-hda-codec-id:8384*");
6503MODULE_ALIAS("snd-hda-codec-id:111d*");
6504
6505MODULE_LICENSE("GPL");
6506MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6507
6508static struct hda_codec_preset_list sigmatel_list = {
6509 .preset = snd_hda_preset_sigmatel,
6510 .owner = THIS_MODULE,
6511};
6512
6513static int __init patch_sigmatel_init(void)
6514{
6515 return snd_hda_add_codec_preset(&sigmatel_list);
6516}
6517
6518static void __exit patch_sigmatel_exit(void)
6519{
6520 snd_hda_delete_codec_preset(&sigmatel_list);
6521}
6522
6523module_init(patch_sigmatel_init)
6524module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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