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[ALSA] hda: disable power management on fixed ports
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
2f2f4251 36
4e55096e 37#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 38#define STAC_PWR_EVENT 0x20
39#define STAC_HP_EVENT 0x30
4e55096e 40
f5fcc13c
TI		 41enum {
42 STAC_REF,
bf277785 43 STAC_9200_OQO,
dfe495d0
TI		 44 STAC_9200_DELL_D21,
45 STAC_9200_DELL_D22,
46 STAC_9200_DELL_D23,
47 STAC_9200_DELL_M21,
48 STAC_9200_DELL_M22,
49 STAC_9200_DELL_M23,
50 STAC_9200_DELL_M24,
51 STAC_9200_DELL_M25,
52 STAC_9200_DELL_M26,
53 STAC_9200_DELL_M27,
1194b5b7 54 STAC_9200_GATEWAY,
f5fcc13c
TI		 55 STAC_9200_MODELS
56};
57
58enum {
59 STAC_9205_REF,
dfe495d0 60 STAC_9205_DELL_M42,
ae0a8ed8
TD		 61 STAC_9205_DELL_M43,
62 STAC_9205_DELL_M44,
f5fcc13c
TI		 63 STAC_9205_MODELS
64};
65
e1f0d669
MR		 66enum {
67 STAC_92HD73XX_REF,
a7662640 68 STAC_DELL_M6,
e1f0d669
MR		 69 STAC_92HD73XX_MODELS
70};
71
e035b841
MR		 72enum {
73 STAC_92HD71BXX_REF,
a7662640
MR		 74 STAC_DELL_M4_1,
75 STAC_DELL_M4_2,
e035b841
MR		 76 STAC_92HD71BXX_MODELS
77};
78
8e21c34c
TD		 79enum {
80 STAC_925x_REF,
81 STAC_M2_2,
82 STAC_MA6,
2c11f955 83 STAC_PA6,
8e21c34c
TD		 84 STAC_925x_MODELS
85};
86
f5fcc13c
TI		 87enum {
88 STAC_D945_REF,
89 STAC_D945GTP3,
90 STAC_D945GTP5,
5d5d3bc3
IZ		 91 STAC_INTEL_MAC_V1,
92 STAC_INTEL_MAC_V2,
93 STAC_INTEL_MAC_V3,
94 STAC_INTEL_MAC_V4,
95 STAC_INTEL_MAC_V5,
dfe495d0 96 /* for backward compatibility */
f5fcc13c 97 STAC_MACMINI,
3fc24d85 98 STAC_MACBOOK,
6f0778d8
NB		 99 STAC_MACBOOK_PRO_V1,
100 STAC_MACBOOK_PRO_V2,
f16928fb 101 STAC_IMAC_INTEL,
0dae0f83 102 STAC_IMAC_INTEL_20,
dfe495d0
TI		 103 STAC_922X_DELL_D81,
104 STAC_922X_DELL_D82,
105 STAC_922X_DELL_M81,
106 STAC_922X_DELL_M82,
f5fcc13c
TI		 107 STAC_922X_MODELS
108};
109
110enum {
111 STAC_D965_REF,
112 STAC_D965_3ST,
113 STAC_D965_5ST,
4ff076e5 114 STAC_DELL_3ST,
8e9068b1 115 STAC_DELL_BIOS,
f5fcc13c
TI		 116 STAC_927X_MODELS
117};
403d1944 118
2f2f4251 119struct sigmatel_spec {
c8b6bf9b 120 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 121 unsigned int num_mixers;
122
403d1944 123 int board_config;
c7d4b2fa 124 unsigned int surr_switch: 1;
403d1944
MP		 125 unsigned int line_switch: 1;
126 unsigned int mic_switch: 1;
3cc08dc6 127 unsigned int alt_switch: 1;
82bc955f 128 unsigned int hp_detect: 1;
c7d4b2fa 129
4fe5195c
MR		 130 /* gpio lines */
131 unsigned int gpio_mask;
132 unsigned int gpio_dir;
133 unsigned int gpio_data;
134 unsigned int gpio_mute;
135
136 /* analog loopback */
e1f0d669
MR		 137 unsigned char aloopback_mask;
138 unsigned char aloopback_shift;
8259980e 139
a64135a2
MR		 140 /* power management */
141 unsigned int num_pwrs;
142 hda_nid_t *pwr_nids;
b76c850f 143 hda_nid_t *dac_list;
a64135a2 144
2f2f4251 145 /* playback */
b22b4821
MR		 146 struct hda_input_mux *mono_mux;
147 unsigned int cur_mmux;
2f2f4251 148 struct hda_multi_out multiout;
3cc08dc6 149 hda_nid_t dac_nids[5];
2f2f4251
M		 150
151 /* capture */
152 hda_nid_t *adc_nids;
2f2f4251 153 unsigned int num_adcs;
dabbed6f
M		 154 hda_nid_t *mux_nids;
155 unsigned int num_muxes;
8b65727b
MP		 156 hda_nid_t *dmic_nids;
157 unsigned int num_dmics;
e1f0d669 158 hda_nid_t *dmux_nids;
1697055e 159 unsigned int num_dmuxes;
dabbed6f 160 hda_nid_t dig_in_nid;
b22b4821 161 hda_nid_t mono_nid;
2f2f4251 162
2f2f4251
M		 163 /* pin widgets */
164 hda_nid_t *pin_nids;
165 unsigned int num_pins;
2f2f4251 166 unsigned int *pin_configs;
11b44bbd 167 unsigned int *bios_pin_configs;
2f2f4251
M		 168
169 /* codec specific stuff */
170 struct hda_verb *init;
c8b6bf9b 171 struct snd_kcontrol_new *mixer;
2f2f4251
M		 172
173 /* capture source */
8b65727b 174 struct hda_input_mux *dinput_mux;
e1f0d669 175 unsigned int cur_dmux[2];
c7d4b2fa 176 struct hda_input_mux *input_mux;
3cc08dc6 177 unsigned int cur_mux[3];
2f2f4251 178
403d1944
MP		 179 /* i/o switches */
180 unsigned int io_switch[2];
0fb87bb4 181 unsigned int clfe_swap;
5f10c4a9 182 unsigned int aloopback;
2f2f4251 183
c7d4b2fa
M		 184 struct hda_pcm pcm_rec[2]; /* PCM information */
185
186 /* dynamic controls and input_mux */
187 struct auto_pin_cfg autocfg;
188 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 189 struct snd_kcontrol_new *kctl_alloc;
8b65727b 190 struct hda_input_mux private_dimux;
c7d4b2fa 191 struct hda_input_mux private_imux;
b22b4821 192 struct hda_input_mux private_mono_mux;
2f2f4251
M		 193};
194
195static hda_nid_t stac9200_adc_nids[1] = {
196 0x03,
197};
198
199static hda_nid_t stac9200_mux_nids[1] = {
200 0x0c,
201};
202
203static hda_nid_t stac9200_dac_nids[1] = {
204 0x02,
205};
206
a64135a2
MR		 207static hda_nid_t stac92hd73xx_pwr_nids[8] = {
208 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
209 0x0f, 0x10, 0x11
210};
211
e1f0d669
MR		 212static hda_nid_t stac92hd73xx_adc_nids[2] = {
213 0x1a, 0x1b
214};
215
216#define STAC92HD73XX_NUM_DMICS 2
217static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
218 0x13, 0x14, 0
219};
220
221#define STAC92HD73_DAC_COUNT 5
222static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
223 0x15, 0x16, 0x17, 0x18, 0x19,
224};
225
226static hda_nid_t stac92hd73xx_mux_nids[4] = {
227 0x28, 0x29, 0x2a, 0x2b,
228};
229
230static hda_nid_t stac92hd73xx_dmux_nids[2] = {
231 0x20, 0x21,
232};
233
a64135a2
MR		 234static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
235 0x0a, 0x0d, 0x0f
236};
237
e035b841
MR		 238static hda_nid_t stac92hd71bxx_adc_nids[2] = {
239 0x12, 0x13,
240};
241
242static hda_nid_t stac92hd71bxx_mux_nids[2] = {
243 0x1a, 0x1b
244};
245
e1f0d669
MR		 246static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
247 0x1c,
248};
249
aea7bb0a 250static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 251 0x10, /*0x11, */
252};
253
254#define STAC92HD71BXX_NUM_DMICS 2
255static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
256 0x18, 0x19, 0
257};
258
8e21c34c
TD		 259static hda_nid_t stac925x_adc_nids[1] = {
260 0x03,
261};
262
263static hda_nid_t stac925x_mux_nids[1] = {
264 0x0f,
265};
266
267static hda_nid_t stac925x_dac_nids[1] = {
268 0x02,
269};
270
f6e9852a
TI		 271#define STAC925X_NUM_DMICS 1
272static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
273 0x15, 0
2c11f955
TD		 274};
275
1697055e
TI		 276static hda_nid_t stac925x_dmux_nids[1] = {
277 0x14,
278};
279
2f2f4251
M		 280static hda_nid_t stac922x_adc_nids[2] = {
281 0x06, 0x07,
282};
283
284static hda_nid_t stac922x_mux_nids[2] = {
285 0x12, 0x13,
286};
287
3cc08dc6
MP		 288static hda_nid_t stac927x_adc_nids[3] = {
289 0x07, 0x08, 0x09
290};
291
292static hda_nid_t stac927x_mux_nids[3] = {
293 0x15, 0x16, 0x17
294};
295
b76c850f
MR		 296static hda_nid_t stac927x_dac_nids[6] = {
297 0x02, 0x03, 0x04, 0x05, 0x06, 0
298};
299
e1f0d669
MR		 300static hda_nid_t stac927x_dmux_nids[1] = {
301 0x1b,
302};
303
7f16859a
MR		 304#define STAC927X_NUM_DMICS 2
305static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
306 0x13, 0x14, 0
307};
308
f3302a59
MP		 309static hda_nid_t stac9205_adc_nids[2] = {
310 0x12, 0x13
311};
312
313static hda_nid_t stac9205_mux_nids[2] = {
314 0x19, 0x1a
315};
316
e1f0d669 317static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 318 0x1d,
e1f0d669
MR		 319};
320
f6e9852a
TI		 321#define STAC9205_NUM_DMICS 2
322static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
323 0x17, 0x18, 0
8b65727b
MP		 324};
325
c7d4b2fa 326static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 327 0x08, 0x09, 0x0d, 0x0e,
328 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 329};
330
8e21c34c
TD		 331static hda_nid_t stac925x_pin_nids[8] = {
332 0x07, 0x08, 0x0a, 0x0b,
333 0x0c, 0x0d, 0x10, 0x11,
334};
335
2f2f4251
M		 336static hda_nid_t stac922x_pin_nids[10] = {
337 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
338 0x0f, 0x10, 0x11, 0x15, 0x1b,
339};
340
a7662640 341static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 342 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
343 0x0f, 0x10, 0x11, 0x12, 0x13,
a7662640 344 0x14, 0x1e, 0x22
e1f0d669
MR		 345};
346
e035b841
MR		 347static hda_nid_t stac92hd71bxx_pin_nids[10] = {
348 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
349 0x0f, 0x14, 0x18, 0x19, 0x1e,
350};
351
3cc08dc6
MP		 352static hda_nid_t stac927x_pin_nids[14] = {
353 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
354 0x0f, 0x10, 0x11, 0x12, 0x13,
355 0x14, 0x21, 0x22, 0x23,
356};
357
f3302a59
MP		 358static hda_nid_t stac9205_pin_nids[12] = {
359 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
360 0x0f, 0x14, 0x16, 0x17, 0x18,
361 0x21, 0x22,
f3302a59
MP		 362};
363
8b65727b
MP		 364static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
365 struct snd_ctl_elem_info *uinfo)
366{
367 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
368 struct sigmatel_spec *spec = codec->spec;
369 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
370}
371
372static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
373 struct snd_ctl_elem_value *ucontrol)
374{
375 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
376 struct sigmatel_spec *spec = codec->spec;
e1f0d669 377 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 378
e1f0d669 379 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 380 return 0;
381}
382
383static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
384 struct snd_ctl_elem_value *ucontrol)
385{
386 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
387 struct sigmatel_spec *spec = codec->spec;
e1f0d669 388 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 389
390 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 391 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 392}
393
c8b6bf9b 394static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 395{
396 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
397 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 398 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 399}
400
c8b6bf9b 401static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 402{
403 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
404 struct sigmatel_spec *spec = codec->spec;
405 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
406
407 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
408 return 0;
409}
410
c8b6bf9b 411static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 412{
413 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
414 struct sigmatel_spec *spec = codec->spec;
415 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
416
c7d4b2fa 417 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 418 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
419}
420
b22b4821
MR		 421static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
422 struct snd_ctl_elem_info *uinfo)
423{
424 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
425 struct sigmatel_spec *spec = codec->spec;
426 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
427}
428
429static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
430 struct snd_ctl_elem_value *ucontrol)
431{
432 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
433 struct sigmatel_spec *spec = codec->spec;
434
435 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
436 return 0;
437}
438
439static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
440 struct snd_ctl_elem_value *ucontrol)
441{
442 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
443 struct sigmatel_spec *spec = codec->spec;
444
445 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
446 spec->mono_nid, &spec->cur_mmux);
447}
448
5f10c4a9
ML		 449#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
450
451static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
452 struct snd_ctl_elem_value *ucontrol)
453{
454 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 455 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 456 struct sigmatel_spec *spec = codec->spec;
457
e1f0d669
MR		 458 ucontrol->value.integer.value[0] = !!(spec->aloopback &
459 (spec->aloopback_mask << idx));
5f10c4a9
ML		 460 return 0;
461}
462
463static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
464 struct snd_ctl_elem_value *ucontrol)
465{
466 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
467 struct sigmatel_spec *spec = codec->spec;
e1f0d669 468 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 469 unsigned int dac_mode;
e1f0d669 470 unsigned int val, idx_val;
5f10c4a9 471
e1f0d669
MR		 472 idx_val = spec->aloopback_mask << idx;
473 if (ucontrol->value.integer.value[0])
474 val = spec->aloopback | idx_val;
475 else
476 val = spec->aloopback & ~idx_val;
68ea7b2f 477 if (spec->aloopback == val)
5f10c4a9
ML		 478 return 0;
479
68ea7b2f 480 spec->aloopback = val;
5f10c4a9 481
e1f0d669
MR		 482 /* Only return the bits defined by the shift value of the
483 * first two bytes of the mask
484 */
5f10c4a9 485 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 486 kcontrol->private_value & 0xFFFF, 0x0);
487 dac_mode >>= spec->aloopback_shift;
5f10c4a9 488
e1f0d669 489 if (spec->aloopback & idx_val) {
5f10c4a9 490 snd_hda_power_up(codec);
e1f0d669 491 dac_mode |= idx_val;
5f10c4a9
ML		 492 } else {
493 snd_hda_power_down(codec);
e1f0d669 494 dac_mode &= ~idx_val;
5f10c4a9
ML		 495 }
496
497 snd_hda_codec_write_cache(codec, codec->afg, 0,
498 kcontrol->private_value >> 16, dac_mode);
499
500 return 1;
501}
502
c7d4b2fa 503static struct hda_verb stac9200_core_init[] = {
2f2f4251 504 /* set dac0mux for dac converter */
c7d4b2fa 505 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 506 {}
507};
508
1194b5b7
TI		 509static struct hda_verb stac9200_eapd_init[] = {
510 /* set dac0mux for dac converter */
511 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
512 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
513 {}
514};
515
e1f0d669
MR		 516static struct hda_verb stac92hd73xx_6ch_core_init[] = {
517 /* set master volume and direct control */
518 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
519 /* setup audio connections */
520 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
521 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
522 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
523 /* setup adcs to point to mixer */
524 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
525 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 526 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
527 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
528 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
529 /* setup import muxs */
530 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
531 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
532 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
533 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
534 {}
535};
536
537static struct hda_verb stac92hd73xx_8ch_core_init[] = {
538 /* set master volume and direct control */
539 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
540 /* setup audio connections */
541 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
542 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
543 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
544 /* connect hp ports to dac3 */
545 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
546 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
547 /* setup adcs to point to mixer */
548 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
549 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 550 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
551 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
552 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
553 /* setup import muxs */
554 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
555 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
556 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
557 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
558 {}
559};
560
561static struct hda_verb stac92hd73xx_10ch_core_init[] = {
562 /* set master volume and direct control */
563 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
564 /* setup audio connections */
565 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
566 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
567 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
568 /* dac3 is connected to import3 mux */
569 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
570 /* connect hp ports to dac4 */
571 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
572 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
573 /* setup adcs to point to mixer */
574 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
575 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 576 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
577 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
578 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
579 /* setup import muxs */
580 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
581 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
582 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
583 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
584 {}
585};
586
e035b841 587static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 588 /* set master volume and direct control */
589 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
590 /* connect headphone jack to dac1 */
591 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
592 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
593 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
594 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
595 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
596 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 597};
598
599static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 600 /* set master volume and direct control */
601 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
602 /* connect headphone jack to dac1 */
603 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 604 /* connect ports 0d and 0f to audio mixer */
605 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
606 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 607 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 608 /* unmute dac0 input in audio mixer */
609 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 610 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
611 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
612 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
613 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 614 {}
615};
616
8e21c34c
TD		 617static struct hda_verb stac925x_core_init[] = {
618 /* set dac0mux for dac converter */
619 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
620 {}
621};
622
c7d4b2fa 623static struct hda_verb stac922x_core_init[] = {
2f2f4251 624 /* set master volume and direct control */
c7d4b2fa 625 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 626 {}
627};
628
93ed1503 629static struct hda_verb d965_core_init[] = {
19039bd0 630 /* set master volume and direct control */
93ed1503 631 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 632 /* unmute node 0x1b */
633 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
634 /* select node 0x03 as DAC */
635 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
636 {}
637};
638
3cc08dc6
MP		 639static struct hda_verb stac927x_core_init[] = {
640 /* set master volume and direct control */
641 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
642 {}
643};
644
f3302a59
MP		 645static struct hda_verb stac9205_core_init[] = {
646 /* set master volume and direct control */
647 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
648 {}
649};
650
b22b4821
MR		 651#define STAC_MONO_MUX \
652 { \
653 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
654 .name = "Mono Mux", \
655 .count = 1, \
656 .info = stac92xx_mono_mux_enum_info, \
657 .get = stac92xx_mono_mux_enum_get, \
658 .put = stac92xx_mono_mux_enum_put, \
659 }
660
9e05b7a3 661#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 662 { \
663 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
664 .name = "Input Source", \
9e05b7a3 665 .count = cnt, \
ca7c5a8b
ML		 666 .info = stac92xx_mux_enum_info, \
667 .get = stac92xx_mux_enum_get, \
668 .put = stac92xx_mux_enum_put, \
669 }
670
e1f0d669 671#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 672 { \
673 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
674 .name = "Analog Loopback", \
e1f0d669 675 .count = cnt, \
5f10c4a9
ML		 676 .info = stac92xx_aloopback_info, \
677 .get = stac92xx_aloopback_get, \
678 .put = stac92xx_aloopback_put, \
679 .private_value = verb_read | (verb_write << 16), \
680 }
681
c8b6bf9b 682static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 683 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
684 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 685 STAC_INPUT_SOURCE(1),
2f2f4251
M		 686 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
687 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 688 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 689 { } /* end */
690};
691
e1f0d669 692static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 693 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
694
e1f0d669
MR		 695 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
696 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
697
698 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
699 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
700
701 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
702 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
703
704 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
705 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
706
707 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
708 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
709
710 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
711 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
712
713 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
714 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
715 { } /* end */
716};
717
718static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 719 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
720
e1f0d669
MR		 721 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
722 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
723
724 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
725 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
726
727 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
728 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
729
730 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
731 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
732
733 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
734 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
735
736 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
737 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
738
739 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
740 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
741 { } /* end */
742};
743
744static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 745 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
746
e1f0d669
MR		 747 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
748 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
749
750 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
751 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
752
753 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
754 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
755
756 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
757 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
758
759 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
760 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
761
762 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
763 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
764
765 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
766 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
767 { } /* end */
768};
769
541eee87 770static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 771 STAC_INPUT_SOURCE(2),
e035b841 772
9b35947f
MR		 773 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
774 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
775 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
776
777 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
778 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
779 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 780
9b35947f
MR		 781 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
782 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 783 { } /* end */
784};
785
541eee87 786static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 787 STAC_INPUT_SOURCE(2),
788 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
789
541eee87
MR		 790 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
791 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
792 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
793
794 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
795 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
796 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
797 { } /* end */
798};
799
8e21c34c 800static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 801 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 802 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
803 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
804 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
805 { } /* end */
806};
807
9e05b7a3 808static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 809 STAC_INPUT_SOURCE(2),
e1f0d669 810 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 811
812 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
813 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
814 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
815
816 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
817 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
818 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
819
2f2f4251
M		 820 { } /* end */
821};
822
19039bd0 823/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 824static struct snd_kcontrol_new stac922x_mixer[] = {
825 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 826 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
827 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
828 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
829
830 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
831 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
832 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 833 { } /* end */
834};
835
9e05b7a3 836
d1d985f0 837static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 838 STAC_INPUT_SOURCE(3),
e1f0d669 839 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 840
9e05b7a3
ML		 841 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
842 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
843 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
844
845 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
846 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
847 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
848
849 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
850 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
851 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 852 { } /* end */
853};
854
1697055e
TI		 855static struct snd_kcontrol_new stac_dmux_mixer = {
856 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
857 .name = "Digital Input Source",
858 /* count set later */
859 .info = stac92xx_dmux_enum_info,
860 .get = stac92xx_dmux_enum_get,
861 .put = stac92xx_dmux_enum_put,
862};
863
2134ea4f
TI		 864static const char *slave_vols[] = {
865 "Front Playback Volume",
866 "Surround Playback Volume",
867 "Center Playback Volume",
868 "LFE Playback Volume",
869 "Side Playback Volume",
870 "Headphone Playback Volume",
871 "Headphone Playback Volume",
872 "Speaker Playback Volume",
873 "External Speaker Playback Volume",
874 "Speaker2 Playback Volume",
875 NULL
876};
877
878static const char *slave_sws[] = {
879 "Front Playback Switch",
880 "Surround Playback Switch",
881 "Center Playback Switch",
882 "LFE Playback Switch",
883 "Side Playback Switch",
884 "Headphone Playback Switch",
885 "Headphone Playback Switch",
886 "Speaker Playback Switch",
887 "External Speaker Playback Switch",
888 "Speaker2 Playback Switch",
edb54a55 889 "IEC958 Playback Switch",
2134ea4f
TI		 890 NULL
891};
892
2f2f4251
M		 893static int stac92xx_build_controls(struct hda_codec *codec)
894{
895 struct sigmatel_spec *spec = codec->spec;
896 int err;
c7d4b2fa 897 int i;
2f2f4251
M		 898
899 err = snd_hda_add_new_ctls(codec, spec->mixer);
900 if (err < 0)
901 return err;
c7d4b2fa
M		 902
903 for (i = 0; i < spec->num_mixers; i++) {
904 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
905 if (err < 0)
906 return err;
907 }
1697055e
TI		 908 if (spec->num_dmuxes > 0) {
909 stac_dmux_mixer.count = spec->num_dmuxes;
910 err = snd_ctl_add(codec->bus->card,
911 snd_ctl_new1(&stac_dmux_mixer, codec));
912 if (err < 0)
913 return err;
914 }
c7d4b2fa 915
dabbed6f
M		 916 if (spec->multiout.dig_out_nid) {
917 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
918 if (err < 0)
919 return err;
9a08160b
TI		 920 err = snd_hda_create_spdif_share_sw(codec,
921 &spec->multiout);
922 if (err < 0)
923 return err;
924 spec->multiout.share_spdif = 1;
dabbed6f
M		 925 }
926 if (spec->dig_in_nid) {
927 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
928 if (err < 0)
929 return err;
930 }
2134ea4f
TI		 931
932 /* if we have no master control, let's create it */
933 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 934 unsigned int vmaster_tlv[4];
2134ea4f 935 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 936 HDA_OUTPUT, vmaster_tlv);
2134ea4f 937 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 938 vmaster_tlv, slave_vols);
2134ea4f
TI		 939 if (err < 0)
940 return err;
941 }
942 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
943 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
944 NULL, slave_sws);
945 if (err < 0)
946 return err;
947 }
948
dabbed6f 949 return 0;
2f2f4251
M		 950}
951
403d1944 952static unsigned int ref9200_pin_configs[8] = {
dabbed6f 953 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 954 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
955};
956
dfe495d0
TI		 957/*
958 STAC 9200 pin configs for
959 102801A8
960 102801DE
961 102801E8
962*/
963static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 964 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
965 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 966};
967
968/*
969 STAC 9200 pin configs for
970 102801C0
971 102801C1
972*/
973static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 974 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
975 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 976};
977
978/*
979 STAC 9200 pin configs for
980 102801C4 (Dell Dimension E310)
981 102801C5
982 102801C7
983 102801D9
984 102801DA
985 102801E3
986*/
987static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 988 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
989 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 990};
991
992
993/*
994 STAC 9200-32 pin configs for
995 102801B5 (Dell Inspiron 630m)
996 102801D8 (Dell Inspiron 640m)
997*/
998static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 999 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1000 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1001};
1002
1003/*
1004 STAC 9200-32 pin configs for
1005 102801C2 (Dell Latitude D620)
1006 102801C8
1007 102801CC (Dell Latitude D820)
1008 102801D4
1009 102801D6
1010*/
1011static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1012 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1013 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1014};
1015
1016/*
1017 STAC 9200-32 pin configs for
1018 102801CE (Dell XPS M1710)
1019 102801CF (Dell Precision M90)
1020*/
1021static unsigned int dell9200_m23_pin_configs[8] = {
1022 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1023 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1024};
1025
1026/*
1027 STAC 9200-32 pin configs for
1028 102801C9
1029 102801CA
1030 102801CB (Dell Latitude 120L)
1031 102801D3
1032*/
1033static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1034 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1035 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1036};
1037
1038/*
1039 STAC 9200-32 pin configs for
1040 102801BD (Dell Inspiron E1505n)
1041 102801EE
1042 102801EF
1043*/
1044static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1045 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1046 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1047};
1048
1049/*
1050 STAC 9200-32 pin configs for
1051 102801F5 (Dell Inspiron 1501)
1052 102801F6
1053*/
1054static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1055 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1056 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1057};
1058
1059/*
1060 STAC 9200-32
1061 102801CD (Dell Inspiron E1705/9400)
1062*/
1063static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1064 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1065 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1066};
1067
bf277785
TD		 1068static unsigned int oqo9200_pin_configs[8] = {
1069 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1070 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1071};
1072
dfe495d0 1073
f5fcc13c
TI		 1074static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1075 [STAC_REF] = ref9200_pin_configs,
bf277785 1076 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1077 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1078 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1079 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1080 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1081 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1082 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1083 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1084 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1085 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1086 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1087};
1088
f5fcc13c
TI		 1089static const char *stac9200_models[STAC_9200_MODELS] = {
1090 [STAC_REF] = "ref",
bf277785 1091 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1092 [STAC_9200_DELL_D21] = "dell-d21",
1093 [STAC_9200_DELL_D22] = "dell-d22",
1094 [STAC_9200_DELL_D23] = "dell-d23",
1095 [STAC_9200_DELL_M21] = "dell-m21",
1096 [STAC_9200_DELL_M22] = "dell-m22",
1097 [STAC_9200_DELL_M23] = "dell-m23",
1098 [STAC_9200_DELL_M24] = "dell-m24",
1099 [STAC_9200_DELL_M25] = "dell-m25",
1100 [STAC_9200_DELL_M26] = "dell-m26",
1101 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1102 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1103};
1104
1105static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1106 /* SigmaTel reference board */
1107 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1108 "DFI LanParty", STAC_REF),
e7377071 1109 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1111 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1113 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1115 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1117 "unknown Dell", STAC_9200_DELL_D22),
1118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1119 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1121 "Dell Latitude D620", STAC_9200_DELL_M22),
1122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1123 "unknown Dell", STAC_9200_DELL_D23),
1124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1125 "unknown Dell", STAC_9200_DELL_D23),
1126 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1127 "unknown Dell", STAC_9200_DELL_M22),
1128 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1129 "unknown Dell", STAC_9200_DELL_M24),
1130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1131 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1133 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1135 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1137 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1139 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1141 "Dell Precision M90", STAC_9200_DELL_M23),
1142 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1143 "unknown Dell", STAC_9200_DELL_M22),
1144 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1145 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1146 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1147 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1148 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1149 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1151 "unknown Dell", STAC_9200_DELL_D23),
1152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1153 "unknown Dell", STAC_9200_DELL_D23),
1154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1155 "unknown Dell", STAC_9200_DELL_D21),
1156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1157 "unknown Dell", STAC_9200_DELL_D23),
1158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1159 "unknown Dell", STAC_9200_DELL_D21),
1160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1161 "unknown Dell", STAC_9200_DELL_M25),
1162 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1163 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1165 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1167 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1168 /* Panasonic */
1169 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1170 /* Gateway machines needs EAPD to be set on resume */
1171 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1172 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1173 STAC_9200_GATEWAY),
1174 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1175 STAC_9200_GATEWAY),
bf277785
TD		 1176 /* OQO Mobile */
1177 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1178 {} /* terminator */
1179};
1180
8e21c34c
TD		 1181static unsigned int ref925x_pin_configs[8] = {
1182 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1183 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1184};
1185
1186static unsigned int stac925x_MA6_pin_configs[8] = {
1187 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1188 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1189};
1190
2c11f955
TD		 1191static unsigned int stac925x_PA6_pin_configs[8] = {
1192 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1193 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1194};
1195
8e21c34c 1196static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1197 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1198 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1199};
1200
1201static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1202 [STAC_REF] = ref925x_pin_configs,
1203 [STAC_M2_2] = stac925xM2_2_pin_configs,
1204 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1205 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1206};
1207
1208static const char *stac925x_models[STAC_925x_MODELS] = {
1209 [STAC_REF] = "ref",
1210 [STAC_M2_2] = "m2-2",
1211 [STAC_MA6] = "m6",
2c11f955 1212 [STAC_PA6] = "pa6",
8e21c34c
TD		 1213};
1214
1215static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1216 /* SigmaTel reference board */
1217 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1218 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1219 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1220 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1221 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1222 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1223 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1224 {} /* terminator */
1225};
1226
a7662640 1227static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1228 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1229 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1230 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1231 0x01452050,
1232};
1233
1234static unsigned int dell_m6_pin_configs[13] = {
1235 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
1236 0x03a11020, 0x03011050, 0x4f0000f0, 0x4f0000f0,
1237 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1238 0x4f0000f0,
e1f0d669
MR		 1239};
1240
1241static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1242 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1243 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1244};
1245
1246static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1247 [STAC_92HD73XX_REF] = "ref",
a7662640 1248 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1249};
1250
1251static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1252 /* SigmaTel reference board */
1253 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1254 "DFI LanParty", STAC_92HD73XX_REF),
1255 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1256 "unknown Dell", STAC_DELL_M6),
1257 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1258 "unknown Dell", STAC_DELL_M6),
1259 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1260 "unknown Dell", STAC_DELL_M6),
1261 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1262 "unknown Dell", STAC_DELL_M6),
1263 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1264 "unknown Dell", STAC_DELL_M6),
1265 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1266 "unknown Dell", STAC_DELL_M6),
1267 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1268 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1269 {} /* terminator */
1270};
1271
e035b841
MR		 1272static unsigned int ref92hd71bxx_pin_configs[10] = {
1273 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1274 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1275 0x90a000f0, 0x01452050,
1276};
1277
a7662640
MR		 1278static unsigned int dell_m4_1_pin_configs[13] = {
1279 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
1280 0x23a1902e, 0x23014250, 0x40f000f0, 0x4f0000f0,
1281 0x40f000f0, 0x4f0000f0,
1282};
1283
1284static unsigned int dell_m4_2_pin_configs[13] = {
1285 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1286 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1287 0x40f000f0, 0x044413b0,
1288};
1289
e035b841
MR		 1290static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1291 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1292 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1293 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1294};
1295
1296static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1297 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1298 [STAC_DELL_M4_1] = "dell-m4-1",
1299 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1300};
1301
1302static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1303 /* SigmaTel reference board */
1304 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1305 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1306 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1307 "unknown Dell", STAC_DELL_M4_1),
1308 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1309 "unknown Dell", STAC_DELL_M4_1),
1310 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1311 "unknown Dell", STAC_DELL_M4_1),
1312 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1313 "unknown Dell", STAC_DELL_M4_1),
1314 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1315 "unknown Dell", STAC_DELL_M4_1),
1316 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1317 "unknown Dell", STAC_DELL_M4_1),
1318 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1319 "unknown Dell", STAC_DELL_M4_1),
1320 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1321 "unknown Dell", STAC_DELL_M4_2),
1322 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1323 "unknown Dell", STAC_DELL_M4_2),
1324 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1325 "unknown Dell", STAC_DELL_M4_2),
1326 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1327 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1328 {} /* terminator */
1329};
1330
403d1944
MP		 1331static unsigned int ref922x_pin_configs[10] = {
1332 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1333 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1334 0x40000100, 0x40000100,
1335};
1336
dfe495d0
TI		 1337/*
1338 STAC 922X pin configs for
1339 102801A7
1340 102801AB
1341 102801A9
1342 102801D1
1343 102801D2
1344*/
1345static unsigned int dell_922x_d81_pin_configs[10] = {
1346 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1347 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1348 0x01813122, 0x400001f2,
1349};
1350
1351/*
1352 STAC 922X pin configs for
1353 102801AC
1354 102801D0
1355*/
1356static unsigned int dell_922x_d82_pin_configs[10] = {
1357 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1358 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1359 0x01813122, 0x400001f1,
1360};
1361
1362/*
1363 STAC 922X pin configs for
1364 102801BF
1365*/
1366static unsigned int dell_922x_m81_pin_configs[10] = {
1367 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1368 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1369 0x40C003f1, 0x405003f0,
1370};
1371
1372/*
1373 STAC 9221 A1 pin configs for
1374 102801D7 (Dell XPS M1210)
1375*/
1376static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1377 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1378 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1379 0x508003f3, 0x405003f4,
1380};
1381
403d1944 1382static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1383 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1384 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1385 0x02a19120, 0x40000100,
1386};
1387
1388static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1389 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1390 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1391 0x02a19320, 0x40000100,
1392};
1393
5d5d3bc3
IZ		 1394static unsigned int intel_mac_v1_pin_configs[10] = {
1395 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1396 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1397 0x400000fc, 0x400000fb,
1398};
1399
1400static unsigned int intel_mac_v2_pin_configs[10] = {
1401 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1402 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1403 0x400000fc, 0x400000fb,
6f0778d8
NB		 1404};
1405
5d5d3bc3
IZ		 1406static unsigned int intel_mac_v3_pin_configs[10] = {
1407 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1408 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1409 0x400000fc, 0x400000fb,
1410};
1411
5d5d3bc3
IZ		 1412static unsigned int intel_mac_v4_pin_configs[10] = {
1413 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1414 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1415 0x400000fc, 0x400000fb,
1416};
1417
5d5d3bc3
IZ		 1418static unsigned int intel_mac_v5_pin_configs[10] = {
1419 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1420 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1421 0x400000fc, 0x400000fb,
0dae0f83
TI		 1422};
1423
76c08828 1424
19039bd0 1425static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1426 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1427 [STAC_D945GTP3] = d945gtp3_pin_configs,
1428 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1429 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1430 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1431 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1432 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1433 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1434 /* for backward compatibility */
5d5d3bc3
IZ		 1435 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1436 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1437 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1438 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1439 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1440 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1441 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1442 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1443 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1444 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1445};
1446
f5fcc13c
TI		 1447static const char *stac922x_models[STAC_922X_MODELS] = {
1448 [STAC_D945_REF] = "ref",
1449 [STAC_D945GTP5] = "5stack",
1450 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1451 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1452 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1453 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1454 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1455 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1456 /* for backward compatibility */
f5fcc13c 1457 [STAC_MACMINI] = "macmini",
3fc24d85 1458 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1459 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1460 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1461 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1462 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1463 [STAC_922X_DELL_D81] = "dell-d81",
1464 [STAC_922X_DELL_D82] = "dell-d82",
1465 [STAC_922X_DELL_M81] = "dell-m81",
1466 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1467};
1468
1469static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1470 /* SigmaTel reference board */
1471 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1472 "DFI LanParty", STAC_D945_REF),
1473 /* Intel 945G based systems */
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1475 "Intel D945G", STAC_D945GTP3),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1477 "Intel D945G", STAC_D945GTP3),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1479 "Intel D945G", STAC_D945GTP3),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1481 "Intel D945G", STAC_D945GTP3),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1483 "Intel D945G", STAC_D945GTP3),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1485 "Intel D945G", STAC_D945GTP3),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1487 "Intel D945G", STAC_D945GTP3),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1489 "Intel D945G", STAC_D945GTP3),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1491 "Intel D945G", STAC_D945GTP3),
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1493 "Intel D945G", STAC_D945GTP3),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1495 "Intel D945G", STAC_D945GTP3),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1497 "Intel D945G", STAC_D945GTP3),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1499 "Intel D945G", STAC_D945GTP3),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1501 "Intel D945G", STAC_D945GTP3),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1503 "Intel D945G", STAC_D945GTP3),
1504 /* Intel D945G 5-stack systems */
1505 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1506 "Intel D945G", STAC_D945GTP5),
1507 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1508 "Intel D945G", STAC_D945GTP5),
1509 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1510 "Intel D945G", STAC_D945GTP5),
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1512 "Intel D945G", STAC_D945GTP5),
1513 /* Intel 945P based systems */
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1515 "Intel D945P", STAC_D945GTP3),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1517 "Intel D945P", STAC_D945GTP3),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1519 "Intel D945P", STAC_D945GTP3),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1521 "Intel D945P", STAC_D945GTP3),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1523 "Intel D945P", STAC_D945GTP3),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1525 "Intel D945P", STAC_D945GTP5),
1526 /* other systems */
1527 /* Apple Mac Mini (early 2006) */
1528 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1529 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1530 /* Dell systems */
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1532 "unknown Dell", STAC_922X_DELL_D81),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1534 "unknown Dell", STAC_922X_DELL_D81),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1536 "unknown Dell", STAC_922X_DELL_D81),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1538 "unknown Dell", STAC_922X_DELL_D82),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1540 "unknown Dell", STAC_922X_DELL_M81),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1542 "unknown Dell", STAC_922X_DELL_D82),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1544 "unknown Dell", STAC_922X_DELL_D81),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1546 "unknown Dell", STAC_922X_DELL_D81),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1548 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1549 {} /* terminator */
1550};
1551
3cc08dc6 1552static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1553 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1554 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1555 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1556 0x01c42190, 0x40000100,
3cc08dc6
MP		 1557};
1558
93ed1503 1559static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1560 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1561 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1562 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1563 0x40000100, 0x40000100
1564};
1565
93ed1503
TD		 1566static unsigned int d965_5st_pin_configs[14] = {
1567 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1568 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1569 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1570 0x40000100, 0x40000100
1571};
1572
4ff076e5
TD		 1573static unsigned int dell_3st_pin_configs[14] = {
1574 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1575 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1576 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1577 0x40c003fc, 0x40000100
1578};
1579
93ed1503 1580static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1581 [STAC_D965_REF] = ref927x_pin_configs,
1582 [STAC_D965_3ST] = d965_3st_pin_configs,
1583 [STAC_D965_5ST] = d965_5st_pin_configs,
1584 [STAC_DELL_3ST] = dell_3st_pin_configs,
1585 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1586};
1587
f5fcc13c 1588static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1589 [STAC_D965_REF] = "ref",
1590 [STAC_D965_3ST] = "3stack",
1591 [STAC_D965_5ST] = "5stack",
1592 [STAC_DELL_3ST] = "dell-3stack",
1593 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1594};
1595
1596static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1597 /* SigmaTel reference board */
1598 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1599 "DFI LanParty", STAC_D965_REF),
81d3dbde 1600 /* Intel 946 based systems */
f5fcc13c
TI		 1601 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1602 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1603 /* 965 based 3 stack systems */
f5fcc13c
TI		 1604 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1605 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1606 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1607 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1608 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1609 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1610 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1611 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1612 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1613 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1614 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1615 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1616 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1617 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1618 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1619 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1620 /* Dell 3 stack systems */
8e9068b1 1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1622 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1624 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1625 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1633 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1634 /* 965 based 5 stack systems */
f5fcc13c
TI		 1635 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1636 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1637 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1638 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1639 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1640 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1641 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1642 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1643 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1644 {} /* terminator */
1645};
1646
f3302a59
MP		 1647static unsigned int ref9205_pin_configs[12] = {
1648 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1649 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1650 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1651};
1652
dfe495d0
TI		 1653/*
1654 STAC 9205 pin configs for
1655 102801F1
1656 102801F2
1657 102801FC
1658 102801FD
1659 10280204
1660 1028021F
3fa2ef74 1661 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1662*/
1663static unsigned int dell_9205_m42_pin_configs[12] = {
1664 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1665 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1666 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1667};
1668
1669/*
1670 STAC 9205 pin configs for
1671 102801F9
1672 102801FA
1673 102801FE
1674 102801FF (Dell Precision M4300)
1675 10280206
1676 10280200
1677 10280201
1678*/
1679static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1680 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1681 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1682 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1683};
1684
dfe495d0 1685static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1686 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1687 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1688 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1689};
1690
f5fcc13c 1691static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1692 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1693 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1694 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1695 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1696};
1697
f5fcc13c
TI		 1698static const char *stac9205_models[STAC_9205_MODELS] = {
1699 [STAC_9205_REF] = "ref",
dfe495d0 1700 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1701 [STAC_9205_DELL_M43] = "dell-m43",
1702 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1703};
1704
1705static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1706 /* SigmaTel reference board */
1707 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1708 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1710 "unknown Dell", STAC_9205_DELL_M42),
1711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1712 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1714 "Dell Precision", STAC_9205_DELL_M43),
1715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1716 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1718 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1720 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1722 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1724 "unknown Dell", STAC_9205_DELL_M42),
1725 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1726 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1728 "Dell Precision", STAC_9205_DELL_M43),
1729 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1730 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1731 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1732 "Dell Precision", STAC_9205_DELL_M43),
1733 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1734 "Dell Inspiron", STAC_9205_DELL_M44),
1735 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1736 "Dell Inspiron", STAC_9205_DELL_M44),
1737 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1738 "Dell Inspiron", STAC_9205_DELL_M44),
1739 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1740 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1741 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1742 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1743 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1744 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1745 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1746 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1747 {} /* terminator */
1748};
1749
11b44bbd
RF		 1750static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1751{
1752 int i;
1753 struct sigmatel_spec *spec = codec->spec;
1754
1755 if (! spec->bios_pin_configs) {
1756 spec->bios_pin_configs = kcalloc(spec->num_pins,
1757 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1758 if (! spec->bios_pin_configs)
1759 return -ENOMEM;
1760 }
1761
1762 for (i = 0; i < spec->num_pins; i++) {
1763 hda_nid_t nid = spec->pin_nids[i];
1764 unsigned int pin_cfg;
1765
1766 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1767 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1768 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1769 nid, pin_cfg);
1770 spec->bios_pin_configs[i] = pin_cfg;
1771 }
1772
1773 return 0;
1774}
1775
87d48363
MR		 1776static void stac92xx_set_config_reg(struct hda_codec *codec,
1777 hda_nid_t pin_nid, unsigned int pin_config)
1778{
1779 int i;
1780 snd_hda_codec_write(codec, pin_nid, 0,
1781 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1782 pin_config & 0x000000ff);
1783 snd_hda_codec_write(codec, pin_nid, 0,
1784 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1785 (pin_config & 0x0000ff00) >> 8);
1786 snd_hda_codec_write(codec, pin_nid, 0,
1787 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1788 (pin_config & 0x00ff0000) >> 16);
1789 snd_hda_codec_write(codec, pin_nid, 0,
1790 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1791 pin_config >> 24);
1792 i = snd_hda_codec_read(codec, pin_nid, 0,
1793 AC_VERB_GET_CONFIG_DEFAULT,
1794 0x00);
1795 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1796 pin_nid, i);
1797}
1798
2f2f4251
M		 1799static void stac92xx_set_config_regs(struct hda_codec *codec)
1800{
1801 int i;
1802 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1803
87d48363
MR		 1804 if (!spec->pin_configs)
1805 return;
11b44bbd 1806
87d48363
MR		 1807 for (i = 0; i < spec->num_pins; i++)
1808 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1809 spec->pin_configs[i]);
2f2f4251 1810}
2f2f4251 1811
dabbed6f 1812/*
c7d4b2fa 1813 * Analog playback callbacks
dabbed6f 1814 */
c7d4b2fa
M		 1815static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1816 struct hda_codec *codec,
c8b6bf9b 1817 struct snd_pcm_substream *substream)
2f2f4251 1818{
dabbed6f 1819 struct sigmatel_spec *spec = codec->spec;
9a08160b
TI		 1820 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
1821 hinfo);
2f2f4251
M		 1822}
1823
2f2f4251
M		 1824static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1825 struct hda_codec *codec,
1826 unsigned int stream_tag,
1827 unsigned int format,
c8b6bf9b 1828 struct snd_pcm_substream *substream)
2f2f4251
M		 1829{
1830 struct sigmatel_spec *spec = codec->spec;
403d1944 1831 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1832}
1833
1834static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1835 struct hda_codec *codec,
c8b6bf9b 1836 struct snd_pcm_substream *substream)
2f2f4251
M		 1837{
1838 struct sigmatel_spec *spec = codec->spec;
1839 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1840}
1841
dabbed6f
M		 1842/*
1843 * Digital playback callbacks
1844 */
1845static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1846 struct hda_codec *codec,
c8b6bf9b 1847 struct snd_pcm_substream *substream)
dabbed6f
M		 1848{
1849 struct sigmatel_spec *spec = codec->spec;
1850 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1851}
1852
1853static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1854 struct hda_codec *codec,
c8b6bf9b 1855 struct snd_pcm_substream *substream)
dabbed6f
M		 1856{
1857 struct sigmatel_spec *spec = codec->spec;
1858 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1859}
1860
6b97eb45
TI		 1861static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1862 struct hda_codec *codec,
1863 unsigned int stream_tag,
1864 unsigned int format,
1865 struct snd_pcm_substream *substream)
1866{
1867 struct sigmatel_spec *spec = codec->spec;
1868 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1869 stream_tag, format, substream);
1870}
1871
dabbed6f 1872
2f2f4251
M		 1873/*
1874 * Analog capture callbacks
1875 */
1876static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1877 struct hda_codec *codec,
1878 unsigned int stream_tag,
1879 unsigned int format,
c8b6bf9b 1880 struct snd_pcm_substream *substream)
2f2f4251
M		 1881{
1882 struct sigmatel_spec *spec = codec->spec;
1883
1884 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1885 stream_tag, 0, format);
1886 return 0;
1887}
1888
1889static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1890 struct hda_codec *codec,
c8b6bf9b 1891 struct snd_pcm_substream *substream)
2f2f4251
M		 1892{
1893 struct sigmatel_spec *spec = codec->spec;
1894
1895 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1896 return 0;
1897}
1898
dabbed6f
M		 1899static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1900 .substreams = 1,
1901 .channels_min = 2,
1902 .channels_max = 2,
1903 /* NID is set in stac92xx_build_pcms */
1904 .ops = {
1905 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1906 .close = stac92xx_dig_playback_pcm_close,
1907 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1908 },
1909};
1910
1911static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1912 .substreams = 1,
1913 .channels_min = 2,
1914 .channels_max = 2,
1915 /* NID is set in stac92xx_build_pcms */
1916};
1917
2f2f4251
M		 1918static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1919 .substreams = 1,
1920 .channels_min = 2,
c7d4b2fa 1921 .channels_max = 8,
2f2f4251
M		 1922 .nid = 0x02, /* NID to query formats and rates */
1923 .ops = {
1924 .open = stac92xx_playback_pcm_open,
1925 .prepare = stac92xx_playback_pcm_prepare,
1926 .cleanup = stac92xx_playback_pcm_cleanup
1927 },
1928};
1929
3cc08dc6
MP		 1930static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1931 .substreams = 1,
1932 .channels_min = 2,
1933 .channels_max = 2,
1934 .nid = 0x06, /* NID to query formats and rates */
1935 .ops = {
1936 .open = stac92xx_playback_pcm_open,
1937 .prepare = stac92xx_playback_pcm_prepare,
1938 .cleanup = stac92xx_playback_pcm_cleanup
1939 },
1940};
1941
2f2f4251 1942static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1943 .channels_min = 2,
1944 .channels_max = 2,
9e05b7a3 1945 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1946 .ops = {
1947 .prepare = stac92xx_capture_pcm_prepare,
1948 .cleanup = stac92xx_capture_pcm_cleanup
1949 },
1950};
1951
1952static int stac92xx_build_pcms(struct hda_codec *codec)
1953{
1954 struct sigmatel_spec *spec = codec->spec;
1955 struct hda_pcm *info = spec->pcm_rec;
1956
1957 codec->num_pcms = 1;
1958 codec->pcm_info = info;
1959
c7d4b2fa 1960 info->name = "STAC92xx Analog";
2f2f4251 1961 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1962 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1963 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1964 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1965
1966 if (spec->alt_switch) {
1967 codec->num_pcms++;
1968 info++;
1969 info->name = "STAC92xx Analog Alt";
1970 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1971 }
2f2f4251 1972
dabbed6f
M		 1973 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1974 codec->num_pcms++;
1975 info++;
1976 info->name = "STAC92xx Digital";
7ba72ba1 1977 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 1978 if (spec->multiout.dig_out_nid) {
1979 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1980 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1981 }
1982 if (spec->dig_in_nid) {
1983 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1984 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1985 }
1986 }
1987
2f2f4251
M		 1988 return 0;
1989}
1990
c960a03b
TI		 1991static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1992{
1993 unsigned int pincap = snd_hda_param_read(codec, nid,
1994 AC_PAR_PIN_CAP);
1995 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1996 if (pincap & AC_PINCAP_VREF_100)
1997 return AC_PINCTL_VREF_100;
1998 if (pincap & AC_PINCAP_VREF_80)
1999 return AC_PINCTL_VREF_80;
2000 if (pincap & AC_PINCAP_VREF_50)
2001 return AC_PINCTL_VREF_50;
2002 if (pincap & AC_PINCAP_VREF_GRD)
2003 return AC_PINCTL_VREF_GRD;
2004 return 0;
2005}
2006
403d1944
MP		 2007static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2008
2009{
82beb8fd
TI		 2010 snd_hda_codec_write_cache(codec, nid, 0,
2011 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2012}
2013
a5ce8890 2014#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2015
2016static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2017{
2018 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2019 struct sigmatel_spec *spec = codec->spec;
2020 int io_idx = kcontrol-> private_value & 0xff;
2021
2022 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2023 return 0;
2024}
2025
2026static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2027{
2028 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2029 struct sigmatel_spec *spec = codec->spec;
2030 hda_nid_t nid = kcontrol->private_value >> 8;
2031 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2032 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2033
2034 spec->io_switch[io_idx] = val;
2035
2036 if (val)
2037 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2038 else {
2039 unsigned int pinctl = AC_PINCTL_IN_EN;
2040 if (io_idx) /* set VREF for mic */
2041 pinctl |= stac92xx_get_vref(codec, nid);
2042 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2043 }
40c1d308
JZ		 2044
2045 /* check the auto-mute again: we need to mute/unmute the speaker
2046 * appropriately according to the pin direction
2047 */
2048 if (spec->hp_detect)
2049 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2050
403d1944
MP		 2051 return 1;
2052}
2053
0fb87bb4
ML		 2054#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2055
2056static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2057 struct snd_ctl_elem_value *ucontrol)
2058{
2059 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2060 struct sigmatel_spec *spec = codec->spec;
2061
2062 ucontrol->value.integer.value[0] = spec->clfe_swap;
2063 return 0;
2064}
2065
2066static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2067 struct snd_ctl_elem_value *ucontrol)
2068{
2069 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2070 struct sigmatel_spec *spec = codec->spec;
2071 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2072 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2073
68ea7b2f 2074 if (spec->clfe_swap == val)
0fb87bb4
ML		 2075 return 0;
2076
68ea7b2f 2077 spec->clfe_swap = val;
0fb87bb4
ML		 2078
2079 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2080 spec->clfe_swap ? 0x4 : 0x0);
2081
2082 return 1;
2083}
2084
403d1944
MP		 2085#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2086 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2087 .name = xname, \
2088 .index = 0, \
2089 .info = stac92xx_io_switch_info, \
2090 .get = stac92xx_io_switch_get, \
2091 .put = stac92xx_io_switch_put, \
2092 .private_value = xpval, \
2093 }
2094
0fb87bb4
ML		 2095#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2096 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2097 .name = xname, \
2098 .index = 0, \
2099 .info = stac92xx_clfe_switch_info, \
2100 .get = stac92xx_clfe_switch_get, \
2101 .put = stac92xx_clfe_switch_put, \
2102 .private_value = xpval, \
2103 }
403d1944 2104
c7d4b2fa
M		 2105enum {
2106 STAC_CTL_WIDGET_VOL,
2107 STAC_CTL_WIDGET_MUTE,
09a99959 2108 STAC_CTL_WIDGET_MONO_MUX,
403d1944 2109 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2110 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2111};
2112
c8b6bf9b 2113static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2114 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2115 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2116 STAC_MONO_MUX,
403d1944 2117 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2118 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2119};
2120
2121/* add dynamic controls */
2122static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2123{
c8b6bf9b 2124 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2125
2126 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2127 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2128
2129 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2130 if (! knew)
2131 return -ENOMEM;
2132 if (spec->kctl_alloc) {
2133 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2134 kfree(spec->kctl_alloc);
2135 }
2136 spec->kctl_alloc = knew;
2137 spec->num_kctl_alloc = num;
2138 }
2139
2140 knew = &spec->kctl_alloc[spec->num_kctl_used];
2141 *knew = stac92xx_control_templates[type];
82fe0c58 2142 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2143 if (! knew->name)
2144 return -ENOMEM;
2145 knew->private_value = val;
2146 spec->num_kctl_used++;
2147 return 0;
2148}
2149
403d1944
MP		 2150/* flag inputs as additional dynamic lineouts */
2151static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2152{
2153 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2154 unsigned int wcaps, wtype;
2155 int i, num_dacs = 0;
2156
2157 /* use the wcaps cache to count all DACs available for line-outs */
2158 for (i = 0; i < codec->num_nodes; i++) {
2159 wcaps = codec->wcaps[i];
2160 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2161
7b043899
SL		 2162 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2163 num_dacs++;
2164 }
403d1944 2165
7b043899
SL		 2166 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2167
403d1944
MP		 2168 switch (cfg->line_outs) {
2169 case 3:
2170 /* add line-in as side */
7b043899 2171 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2172 cfg->line_out_pins[cfg->line_outs] =
2173 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2174 spec->line_switch = 1;
2175 cfg->line_outs++;
2176 }
2177 break;
2178 case 2:
2179 /* add line-in as clfe and mic as side */
7b043899 2180 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2181 cfg->line_out_pins[cfg->line_outs] =
2182 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2183 spec->line_switch = 1;
2184 cfg->line_outs++;
2185 }
7b043899 2186 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2187 cfg->line_out_pins[cfg->line_outs] =
2188 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2189 spec->mic_switch = 1;
2190 cfg->line_outs++;
2191 }
2192 break;
2193 case 1:
2194 /* add line-in as surr and mic as clfe */
7b043899 2195 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2196 cfg->line_out_pins[cfg->line_outs] =
2197 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2198 spec->line_switch = 1;
2199 cfg->line_outs++;
2200 }
7b043899 2201 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2202 cfg->line_out_pins[cfg->line_outs] =
2203 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2204 spec->mic_switch = 1;
2205 cfg->line_outs++;
2206 }
2207 break;
2208 }
2209
2210 return 0;
2211}
2212
7b043899
SL		 2213
2214static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2215{
2216 int i;
2217
2218 for (i = 0; i < spec->multiout.num_dacs; i++) {
2219 if (spec->multiout.dac_nids[i] == nid)
2220 return 1;
2221 }
2222
2223 return 0;
2224}
2225
3cc08dc6 2226/*
7b043899
SL		 2227 * Fill in the dac_nids table from the parsed pin configuration
2228 * This function only works when every pin in line_out_pins[]
2229 * contains atleast one DAC in its connection list. Some 92xx
2230 * codecs are not connected directly to a DAC, such as the 9200
2231 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2232 */
19039bd0 2233static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2234 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2235{
2236 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2237 int i, j, conn_len = 0;
2238 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2239 unsigned int wcaps, wtype;
2240
c7d4b2fa
M		 2241 for (i = 0; i < cfg->line_outs; i++) {
2242 nid = cfg->line_out_pins[i];
7b043899
SL		 2243 conn_len = snd_hda_get_connections(codec, nid, conn,
2244 HDA_MAX_CONNECTIONS);
2245 for (j = 0; j < conn_len; j++) {
2246 wcaps = snd_hda_param_read(codec, conn[j],
2247 AC_PAR_AUDIO_WIDGET_CAP);
2248 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2249 if (wtype != AC_WID_AUD_OUT ||
2250 (wcaps & AC_WCAP_DIGITAL))
2251 continue;
2252 /* conn[j] is a DAC routed to this line-out */
2253 if (!is_in_dac_nids(spec, conn[j]))
2254 break;
2255 }
2256
2257 if (j == conn_len) {
df802952
TI		 2258 if (spec->multiout.num_dacs > 0) {
2259 /* we have already working output pins,
2260 * so let's drop the broken ones again
2261 */
2262 cfg->line_outs = spec->multiout.num_dacs;
2263 break;
2264 }
7b043899
SL		 2265 /* error out, no available DAC found */
2266 snd_printk(KERN_ERR
2267 "%s: No available DAC for pin 0x%x\n",
2268 __func__, nid);
2269 return -ENODEV;
2270 }
2271
2272 spec->multiout.dac_nids[i] = conn[j];
2273 spec->multiout.num_dacs++;
2274 if (conn_len > 1) {
2275 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2276 snd_hda_codec_write_cache(codec, nid, 0,
2277 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2278
7b043899
SL		 2279 }
2280 }
c7d4b2fa 2281
7b043899
SL		 2282 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2283 spec->multiout.num_dacs,
2284 spec->multiout.dac_nids[0],
2285 spec->multiout.dac_nids[1],
2286 spec->multiout.dac_nids[2],
2287 spec->multiout.dac_nids[3],
2288 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2289 return 0;
2290}
2291
eb06ed8f
TI		 2292/* create volume control/switch for the given prefx type */
2293static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2294{
2295 char name[32];
2296 int err;
2297
2298 sprintf(name, "%s Playback Volume", pfx);
2299 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2300 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2301 if (err < 0)
2302 return err;
2303 sprintf(name, "%s Playback Switch", pfx);
2304 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2305 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2306 if (err < 0)
2307 return err;
2308 return 0;
2309}
2310
ae0afd81
MR		 2311static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2312{
2313 if (!spec->multiout.hp_nid)
2314 spec->multiout.hp_nid = nid;
2315 else if (spec->multiout.num_dacs > 4) {
2316 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2317 return 1;
2318 } else {
2319 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2320 spec->multiout.num_dacs++;
2321 }
2322 return 0;
2323}
2324
2325static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2326{
2327 if (is_in_dac_nids(spec, nid))
2328 return 1;
2329 if (spec->multiout.hp_nid == nid)
2330 return 1;
2331 return 0;
2332}
2333
c7d4b2fa 2334/* add playback controls from the parsed DAC table */
0fb87bb4 2335static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2336 const struct auto_pin_cfg *cfg)
c7d4b2fa 2337{
19039bd0
TI		 2338 static const char *chname[4] = {
2339 "Front", "Surround", NULL /*CLFE*/, "Side"
2340 };
c7d4b2fa
M		 2341 hda_nid_t nid;
2342 int i, err;
2343
0fb87bb4 2344 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2345 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2346
2347
c7d4b2fa 2348 for (i = 0; i < cfg->line_outs; i++) {
403d1944 2349 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2350 continue;
2351
2352 nid = spec->multiout.dac_nids[i];
2353
2354 if (i == 2) {
2355 /* Center/LFE */
eb06ed8f
TI		 2356 err = create_controls(spec, "Center", nid, 1);
2357 if (err < 0)
c7d4b2fa 2358 return err;
eb06ed8f
TI		 2359 err = create_controls(spec, "LFE", nid, 2);
2360 if (err < 0)
c7d4b2fa 2361 return err;
0fb87bb4
ML		 2362
2363 wid_caps = get_wcaps(codec, nid);
2364
2365 if (wid_caps & AC_WCAP_LR_SWAP) {
2366 err = stac92xx_add_control(spec,
2367 STAC_CTL_WIDGET_CLFE_SWITCH,
2368 "Swap Center/LFE Playback Switch", nid);
2369
2370 if (err < 0)
2371 return err;
2372 }
2373
c7d4b2fa 2374 } else {
eb06ed8f
TI		 2375 err = create_controls(spec, chname[i], nid, 3);
2376 if (err < 0)
c7d4b2fa
M		 2377 return err;
2378 }
2379 }
2380
b5895dc8
MR		 2381 if (spec->line_switch) {
2382 nid = cfg->input_pins[AUTO_PIN_LINE];
2383 pincap = snd_hda_param_read(codec, nid,
2384 AC_PAR_PIN_CAP);
2385 if (pincap & AC_PINCAP_OUT) {
2386 err = stac92xx_add_control(spec,
2387 STAC_CTL_WIDGET_IO_SWITCH,
2388 "Line In as Output Switch", nid << 8);
2389 if (err < 0)
2390 return err;
2391 }
2392 }
403d1944 2393
b5895dc8 2394 if (spec->mic_switch) {
cace16f1 2395 unsigned int def_conf;
ae0afd81
MR		 2396 unsigned int mic_pin = AUTO_PIN_MIC;
2397again:
2398 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2399 def_conf = snd_hda_codec_read(codec, nid, 0,
2400 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2401 /* some laptops have an internal analog microphone
2402 * which can't be used as a output */
2403 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2404 pincap = snd_hda_param_read(codec, nid,
2405 AC_PAR_PIN_CAP);
2406 if (pincap & AC_PINCAP_OUT) {
2407 err = stac92xx_add_control(spec,
2408 STAC_CTL_WIDGET_IO_SWITCH,
2409 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2410 nid = snd_hda_codec_read(codec, nid, 0,
2411 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2412 if (!check_in_dac_nids(spec, nid))
2413 add_spec_dacs(spec, nid);
cace16f1
MR		 2414 if (err < 0)
2415 return err;
2416 }
ae0afd81
MR		 2417 } else if (mic_pin == AUTO_PIN_MIC) {
2418 mic_pin = AUTO_PIN_FRONT_MIC;
2419 goto again;
b5895dc8
MR		 2420 }
2421 }
403d1944 2422
c7d4b2fa
M		 2423 return 0;
2424}
2425
eb06ed8f
TI		 2426/* add playback controls for Speaker and HP outputs */
2427static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2428 struct auto_pin_cfg *cfg)
2429{
2430 struct sigmatel_spec *spec = codec->spec;
2431 hda_nid_t nid;
2432 int i, old_num_dacs, err;
2433
2434 old_num_dacs = spec->multiout.num_dacs;
2435 for (i = 0; i < cfg->hp_outs; i++) {
2436 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2437 if (wid_caps & AC_WCAP_UNSOL_CAP)
2438 spec->hp_detect = 1;
2439 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2440 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2441 if (check_in_dac_nids(spec, nid))
2442 nid = 0;
2443 if (! nid)
c7d4b2fa 2444 continue;
eb06ed8f
TI		 2445 add_spec_dacs(spec, nid);
2446 }
2447 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2448 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2449 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2450 if (check_in_dac_nids(spec, nid))
2451 nid = 0;
eb06ed8f
TI		 2452 if (! nid)
2453 continue;
2454 add_spec_dacs(spec, nid);
c7d4b2fa 2455 }
1b290a51
MR		 2456 for (i = 0; i < cfg->line_outs; i++) {
2457 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2458 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2459 if (check_in_dac_nids(spec, nid))
2460 nid = 0;
2461 if (! nid)
2462 continue;
2463 add_spec_dacs(spec, nid);
2464 }
eb06ed8f
TI		 2465 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2466 static const char *pfxs[] = {
2467 "Speaker", "External Speaker", "Speaker2",
2468 };
2469 err = create_controls(spec, pfxs[i - old_num_dacs],
2470 spec->multiout.dac_nids[i], 3);
2471 if (err < 0)
2472 return err;
2473 }
2474 if (spec->multiout.hp_nid) {
2475 const char *pfx;
6020c008 2476 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2477 pfx = "Master";
2478 else
2479 pfx = "Headphone";
2480 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2481 if (err < 0)
2482 return err;
2483 }
c7d4b2fa
M		 2484
2485 return 0;
2486}
2487
b22b4821
MR		 2488/* labels for mono mux outputs */
2489static const char *stac92xx_mono_labels[3] = {
2490 "DAC0", "DAC1", "Mixer"
2491};
2492
2493/* create mono mux for mono out on capable codecs */
2494static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2495{
2496 struct sigmatel_spec *spec = codec->spec;
2497 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2498 int i, num_cons;
2499 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2500
2501 num_cons = snd_hda_get_connections(codec,
2502 spec->mono_nid,
2503 con_lst,
2504 HDA_MAX_NUM_INPUTS);
2505 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2506 return -EINVAL;
2507
2508 for (i = 0; i < num_cons; i++) {
2509 mono_mux->items[mono_mux->num_items].label =
2510 stac92xx_mono_labels[i];
2511 mono_mux->items[mono_mux->num_items].index = i;
2512 mono_mux->num_items++;
2513 }
09a99959
MR		 2514
2515 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2516 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2517}
2518
8b65727b 2519/* labels for dmic mux inputs */
ddc2cec4 2520static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2521 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2522 "Digital Mic 3", "Digital Mic 4"
2523};
2524
2525/* create playback/capture controls for input pins on dmic capable codecs */
2526static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2527 const struct auto_pin_cfg *cfg)
2528{
2529 struct sigmatel_spec *spec = codec->spec;
2530 struct hda_input_mux *dimux = &spec->private_dimux;
2531 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2532 int err, i, j;
2533 char name[32];
8b65727b
MP		 2534
2535 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2536 dimux->items[dimux->num_items].index = 0;
2537 dimux->num_items++;
2538
2539 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2540 hda_nid_t nid;
8b65727b
MP		 2541 int index;
2542 int num_cons;
0678accd 2543 unsigned int wcaps;
8b65727b
MP		 2544 unsigned int def_conf;
2545
2546 def_conf = snd_hda_codec_read(codec,
2547 spec->dmic_nids[i],
2548 0,
2549 AC_VERB_GET_CONFIG_DEFAULT,
2550 0);
2551 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2552 continue;
2553
0678accd 2554 nid = spec->dmic_nids[i];
8b65727b 2555 num_cons = snd_hda_get_connections(codec,
e1f0d669 2556 spec->dmux_nids[0],
8b65727b
MP		 2557 con_lst,
2558 HDA_MAX_NUM_INPUTS);
2559 for (j = 0; j < num_cons; j++)
0678accd 2560 if (con_lst[j] == nid) {
8b65727b
MP		 2561 index = j;
2562 goto found;
2563 }
2564 continue;
2565found:
0678accd
MR		 2566 wcaps = get_wcaps(codec, nid);
2567
2568 if (wcaps & AC_WCAP_OUT_AMP) {
2569 sprintf(name, "%s Capture Volume",
2570 stac92xx_dmic_labels[dimux->num_items]);
2571
2572 err = stac92xx_add_control(spec,
2573 STAC_CTL_WIDGET_VOL,
2574 name,
2575 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2576 if (err < 0)
2577 return err;
2578 }
2579
8b65727b
MP		 2580 dimux->items[dimux->num_items].label =
2581 stac92xx_dmic_labels[dimux->num_items];
2582 dimux->items[dimux->num_items].index = index;
2583 dimux->num_items++;
2584 }
2585
2586 return 0;
2587}
2588
c7d4b2fa
M		 2589/* create playback/capture controls for input pins */
2590static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2591{
2592 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2593 struct hda_input_mux *imux = &spec->private_imux;
2594 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2595 int i, j, k;
2596
2597 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2598 int index;
2599
2600 if (!cfg->input_pins[i])
2601 continue;
2602 index = -1;
2603 for (j = 0; j < spec->num_muxes; j++) {
2604 int num_cons;
2605 num_cons = snd_hda_get_connections(codec,
2606 spec->mux_nids[j],
2607 con_lst,
2608 HDA_MAX_NUM_INPUTS);
2609 for (k = 0; k < num_cons; k++)
2610 if (con_lst[k] == cfg->input_pins[i]) {
2611 index = k;
2612 goto found;
2613 }
c7d4b2fa 2614 }
314634bc
TI		 2615 continue;
2616 found:
2617 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2618 imux->items[imux->num_items].index = index;
2619 imux->num_items++;
c7d4b2fa
M		 2620 }
2621
7b043899 2622 if (imux->num_items) {
62fe78e9
SR		 2623 /*
2624 * Set the current input for the muxes.
2625 * The STAC9221 has two input muxes with identical source
2626 * NID lists. Hopefully this won't get confused.
2627 */
2628 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2629 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2630 AC_VERB_SET_CONNECT_SEL,
2631 imux->items[0].index);
62fe78e9
SR		 2632 }
2633 }
2634
c7d4b2fa
M		 2635 return 0;
2636}
2637
c7d4b2fa
M		 2638static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2639{
2640 struct sigmatel_spec *spec = codec->spec;
2641 int i;
2642
2643 for (i = 0; i < spec->autocfg.line_outs; i++) {
2644 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2645 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2646 }
2647}
2648
2649static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2650{
2651 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2652 int i;
c7d4b2fa 2653
eb06ed8f
TI		 2654 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2655 hda_nid_t pin;
2656 pin = spec->autocfg.hp_pins[i];
2657 if (pin) /* connect to front */
2658 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2659 }
2660 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2661 hda_nid_t pin;
2662 pin = spec->autocfg.speaker_pins[i];
2663 if (pin) /* connect to front */
2664 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2665 }
c7d4b2fa
M		 2666}
2667
3cc08dc6 2668static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2669{
2670 struct sigmatel_spec *spec = codec->spec;
2671 int err;
bcecd9bd 2672 int hp_speaker_swap = 0;
c7d4b2fa 2673
8b65727b
MP		 2674 if ((err = snd_hda_parse_pin_def_config(codec,
2675 &spec->autocfg,
2676 spec->dmic_nids)) < 0)
c7d4b2fa 2677 return err;
82bc955f 2678 if (! spec->autocfg.line_outs)
869264c4 2679 return 0; /* can't find valid pin config */
19039bd0 2680
bcecd9bd
JZ		 2681 /* If we have no real line-out pin and multiple hp-outs, HPs should
2682 * be set up as multi-channel outputs.
2683 */
2684 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2685 spec->autocfg.hp_outs > 1) {
2686 /* Copy hp_outs to line_outs, backup line_outs in
2687 * speaker_outs so that the following routines can handle
2688 * HP pins as primary outputs.
2689 */
2690 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2691 sizeof(spec->autocfg.line_out_pins));
2692 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2693 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2694 sizeof(spec->autocfg.hp_pins));
2695 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2696 hp_speaker_swap = 1;
2697 }
09a99959
MR		 2698 if (spec->autocfg.mono_out_pin) {
2699 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2700 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2701 u32 caps = query_amp_caps(codec,
2702 spec->autocfg.mono_out_pin, dir);
2703 hda_nid_t conn_list[1];
2704
2705 /* get the mixer node and then the mono mux if it exists */
2706 if (snd_hda_get_connections(codec,
2707 spec->autocfg.mono_out_pin, conn_list, 1) &&
2708 snd_hda_get_connections(codec, conn_list[0],
2709 conn_list, 1)) {
2710
2711 int wcaps = get_wcaps(codec, conn_list[0]);
2712 int wid_type = (wcaps & AC_WCAP_TYPE)
2713 >> AC_WCAP_TYPE_SHIFT;
2714 /* LR swap check, some stac925x have a mux that
2715 * changes the DACs output path instead of the
2716 * mono-mux path.
2717 */
2718 if (wid_type == AC_WID_AUD_SEL &&
2719 !(wcaps & AC_WCAP_LR_SWAP))
2720 spec->mono_nid = conn_list[0];
2721 }
2722 /* all mono outs have a least a mute/unmute switch */
2723 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2724 "Mono Playback Switch",
2725 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2726 1, 0, dir));
2727 if (err < 0)
2728 return err;
2729 /* check to see if there is volume support for the amp */
2730 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2731 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2732 "Mono Playback Volume",
2733 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2734 1, 0, dir));
2735 if (err < 0)
2736 return err;
2737 }
2738
2739 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2740 AC_PINCTL_OUT_EN);
2741 }
bcecd9bd 2742
403d1944
MP		 2743 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2744 return err;
19039bd0
TI		 2745 if (spec->multiout.num_dacs == 0)
2746 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2747 return err;
c7d4b2fa 2748
0fb87bb4
ML		 2749 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2750
2751 if (err < 0)
2752 return err;
2753
bcecd9bd
JZ		 2754 if (hp_speaker_swap == 1) {
2755 /* Restore the hp_outs and line_outs */
2756 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2757 sizeof(spec->autocfg.line_out_pins));
2758 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2759 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2760 sizeof(spec->autocfg.speaker_pins));
2761 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2762 memset(spec->autocfg.speaker_pins, 0,
2763 sizeof(spec->autocfg.speaker_pins));
2764 spec->autocfg.speaker_outs = 0;
2765 }
2766
0fb87bb4
ML		 2767 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2768
2769 if (err < 0)
2770 return err;
2771
2772 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2773
2774 if (err < 0)
c7d4b2fa
M		 2775 return err;
2776
b22b4821
MR		 2777 if (spec->mono_nid > 0) {
2778 err = stac92xx_auto_create_mono_output_ctls(codec);
2779 if (err < 0)
2780 return err;
2781 }
2782
8b65727b
MP		 2783 if (spec->num_dmics > 0)
2784 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2785 &spec->autocfg)) < 0)
2786 return err;
2787
c7d4b2fa 2788 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2789 if (spec->multiout.max_channels > 2)
c7d4b2fa 2790 spec->surr_switch = 1;
c7d4b2fa 2791
82bc955f 2792 if (spec->autocfg.dig_out_pin)
3cc08dc6 2793 spec->multiout.dig_out_nid = dig_out;
82bc955f 2794 if (spec->autocfg.dig_in_pin)
3cc08dc6 2795 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2796
2797 if (spec->kctl_alloc)
2798 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2799
2800 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2801 if (!spec->dinput_mux)
2802 spec->dinput_mux = &spec->private_dimux;
b22b4821 2803 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2804
2805 return 1;
2806}
2807
82bc955f
TI		 2808/* add playback controls for HP output */
2809static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2810 struct auto_pin_cfg *cfg)
2811{
2812 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2813 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2814 unsigned int wid_caps;
2815
2816 if (! pin)
2817 return 0;
2818
2819 wid_caps = get_wcaps(codec, pin);
505cb341 2820 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2821 spec->hp_detect = 1;
82bc955f
TI		 2822
2823 return 0;
2824}
2825
160ea0dc
RF		 2826/* add playback controls for LFE output */
2827static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2828 struct auto_pin_cfg *cfg)
2829{
2830 struct sigmatel_spec *spec = codec->spec;
2831 int err;
2832 hda_nid_t lfe_pin = 0x0;
2833 int i;
2834
2835 /*
2836 * search speaker outs and line outs for a mono speaker pin
2837 * with an amp. If one is found, add LFE controls
2838 * for it.
2839 */
2840 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2841 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 2842 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2843 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2844 if (wcaps == AC_WCAP_OUT_AMP)
2845 /* found a mono speaker with an amp, must be lfe */
2846 lfe_pin = pin;
2847 }
2848
2849 /* if speaker_outs is 0, then speakers may be in line_outs */
2850 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2851 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2852 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 2853 unsigned int defcfg;
8b551785 2854 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 2855 AC_VERB_GET_CONFIG_DEFAULT,
2856 0x00);
8b551785 2857 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 2858 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2859 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2860 if (wcaps == AC_WCAP_OUT_AMP)
2861 /* found a mono speaker with an amp,
2862 must be lfe */
2863 lfe_pin = pin;
2864 }
2865 }
2866 }
2867
2868 if (lfe_pin) {
eb06ed8f 2869 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2870 if (err < 0)
2871 return err;
2872 }
2873
2874 return 0;
2875}
2876
c7d4b2fa
M		 2877static int stac9200_parse_auto_config(struct hda_codec *codec)
2878{
2879 struct sigmatel_spec *spec = codec->spec;
2880 int err;
2881
df694daa 2882 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2883 return err;
2884
2885 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2886 return err;
2887
82bc955f
TI		 2888 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2889 return err;
2890
160ea0dc
RF		 2891 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2892 return err;
2893
82bc955f 2894 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2895 spec->multiout.dig_out_nid = 0x05;
82bc955f 2896 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2897 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2898
2899 if (spec->kctl_alloc)
2900 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2901
2902 spec->input_mux = &spec->private_imux;
8b65727b 2903 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2904
2905 return 1;
2906}
2907
62fe78e9
SR		 2908/*
2909 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2910 * funky external mute control using GPIO pins.
2911 */
2912
76e1ddfb 2913static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 2914 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 2915{
2916 unsigned int gpiostate, gpiomask, gpiodir;
2917
2918 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2919 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 2920 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 2921
2922 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2923 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2924 gpiomask |= mask;
62fe78e9
SR		 2925
2926 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2927 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 2928 gpiodir |= dir_mask;
62fe78e9 2929
76e1ddfb 2930 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2931 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2932
2933 snd_hda_codec_write(codec, codec->afg, 0,
2934 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2935 snd_hda_codec_read(codec, codec->afg, 0,
2936 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2937
2938 msleep(1);
2939
76e1ddfb
TI		 2940 snd_hda_codec_read(codec, codec->afg, 0,
2941 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2942}
2943
314634bc
TI		 2944static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2945 unsigned int event)
2946{
2947 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2948 snd_hda_codec_write_cache(codec, nid, 0,
2949 AC_VERB_SET_UNSOLICITED_ENABLE,
2950 (AC_USRSP_EN | event));
314634bc
TI		 2951}
2952
a64135a2
MR		 2953static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2954{
2955 int i;
2956 for (i = 0; i < cfg->hp_outs; i++)
2957 if (cfg->hp_pins[i] == nid)
2958 return 1; /* nid is a HP-Out */
2959
2960 return 0; /* nid is not a HP-Out */
2961};
2962
b76c850f
MR		 2963static void stac92xx_power_down(struct hda_codec *codec)
2964{
2965 struct sigmatel_spec *spec = codec->spec;
2966
2967 /* power down inactive DACs */
2968 hda_nid_t *dac;
2969 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 2970 if (!is_in_dac_nids(spec, *dac) &&
2971 spec->multiout.hp_nid != *dac)
b76c850f
MR		 2972 snd_hda_codec_write_cache(codec, *dac, 0,
2973 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2974}
2975
c7d4b2fa
M		 2976static int stac92xx_init(struct hda_codec *codec)
2977{
2978 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2979 struct auto_pin_cfg *cfg = &spec->autocfg;
2980 int i;
c7d4b2fa 2981
c7d4b2fa
M		 2982 snd_hda_sequence_write(codec, spec->init);
2983
82bc955f
TI		 2984 /* set up pins */
2985 if (spec->hp_detect) {
505cb341 2986 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2987 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2988 enable_pin_detect(codec, cfg->hp_pins[i],
2989 STAC_HP_EVENT);
0a07acaf
TI		 2990 /* force to enable the first line-out; the others are set up
2991 * in unsol_event
2992 */
2993 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2994 AC_PINCTL_OUT_EN);
eb995a8c 2995 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2996 /* fake event to set up pins */
2997 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2998 } else {
2999 stac92xx_auto_init_multi_out(codec);
3000 stac92xx_auto_init_hp_out(codec);
3001 }
3002 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3003 hda_nid_t nid = cfg->input_pins[i];
3004 if (nid) {
3005 unsigned int pinctl = AC_PINCTL_IN_EN;
3006 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3007 pinctl |= stac92xx_get_vref(codec, nid);
3008 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3009 }
82bc955f 3010 }
a64135a2
MR		 3011 for (i = 0; i < spec->num_dmics; i++)
3012 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3013 AC_PINCTL_IN_EN);
3014 for (i = 0; i < spec->num_pwrs; i++) {
3015 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3016 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3017 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3018 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3019 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3020 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
a64135a2
MR		 3021 /* outputs are only ports capable of power management
3022 * any attempts on powering down a input port cause the
3023 * referenced VREF to act quirky.
3024 */
3025 if (pinctl & AC_PINCTL_IN_EN)
3026 continue;
bce6c2b5
MR		 3027 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED)
3028 continue;
a64135a2
MR		 3029 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3030 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3031 }
b76c850f
MR		 3032 if (spec->dac_list)
3033 stac92xx_power_down(codec);
82bc955f
TI		 3034 if (cfg->dig_out_pin)
3035 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3036 AC_PINCTL_OUT_EN);
3037 if (cfg->dig_in_pin)
3038 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3039 AC_PINCTL_IN_EN);
3040
4fe5195c
MR		 3041 stac_gpio_set(codec, spec->gpio_mask,
3042 spec->gpio_dir, spec->gpio_data);
62fe78e9 3043
c7d4b2fa
M		 3044 return 0;
3045}
3046
2f2f4251
M		 3047static void stac92xx_free(struct hda_codec *codec)
3048{
c7d4b2fa
M		 3049 struct sigmatel_spec *spec = codec->spec;
3050 int i;
3051
3052 if (! spec)
3053 return;
3054
3055 if (spec->kctl_alloc) {
3056 for (i = 0; i < spec->num_kctl_used; i++)
3057 kfree(spec->kctl_alloc[i].name);
3058 kfree(spec->kctl_alloc);
3059 }
3060
11b44bbd
RF		 3061 if (spec->bios_pin_configs)
3062 kfree(spec->bios_pin_configs);
3063
c7d4b2fa 3064 kfree(spec);
2f2f4251
M		 3065}
3066
4e55096e
M		 3067static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3068 unsigned int flag)
3069{
3070 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3071 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3072
f9acba43
TI		 3073 if (pin_ctl & AC_PINCTL_IN_EN) {
3074 /*
3075 * we need to check the current set-up direction of
3076 * shared input pins since they can be switched via
3077 * "xxx as Output" mixer switch
3078 */
3079 struct sigmatel_spec *spec = codec->spec;
3080 struct auto_pin_cfg *cfg = &spec->autocfg;
3081 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3082 spec->line_switch) ||
3083 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3084 spec->mic_switch))
3085 return;
3086 }
3087
7b043899
SL		 3088 /* if setting pin direction bits, clear the current
3089 direction bits first */
3090 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3091 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3092
82beb8fd 3093 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3094 AC_VERB_SET_PIN_WIDGET_CONTROL,
3095 pin_ctl | flag);
3096}
3097
3098static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3099 unsigned int flag)
3100{
3101 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3102 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3103 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3104 AC_VERB_SET_PIN_WIDGET_CONTROL,
3105 pin_ctl & ~flag);
3106}
3107
40c1d308 3108static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3109{
3110 if (!nid)
3111 return 0;
3112 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3113 & (1 << 31)) {
3114 unsigned int pinctl;
3115 pinctl = snd_hda_codec_read(codec, nid, 0,
3116 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3117 if (pinctl & AC_PINCTL_IN_EN)
3118 return 0; /* mic- or line-input */
3119 else
3120 return 1; /* HP-output */
3121 }
314634bc
TI		 3122 return 0;
3123}
3124
3125static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3126{
3127 struct sigmatel_spec *spec = codec->spec;
3128 struct auto_pin_cfg *cfg = &spec->autocfg;
3129 int i, presence;
3130
eb06ed8f 3131 presence = 0;
4fe5195c
MR		 3132 if (spec->gpio_mute)
3133 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3134 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3135
eb06ed8f 3136 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3137 if (presence)
3138 break;
4fe5195c 3139 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3140 }
4e55096e
M		 3141
3142 if (presence) {
3143 /* disable lineouts, enable hp */
3144 for (i = 0; i < cfg->line_outs; i++)
3145 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3146 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3147 for (i = 0; i < cfg->speaker_outs; i++)
3148 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3149 AC_PINCTL_OUT_EN);
4e55096e
M		 3150 } else {
3151 /* enable lineouts, disable hp */
3152 for (i = 0; i < cfg->line_outs; i++)
3153 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3154 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3155 for (i = 0; i < cfg->speaker_outs; i++)
3156 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3157 AC_PINCTL_OUT_EN);
4e55096e
M		 3158 }
3159}
3160
a64135a2
MR		 3161static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3162{
3163 struct sigmatel_spec *spec = codec->spec;
3164 hda_nid_t nid = spec->pwr_nids[idx];
3165 int presence, val;
3166 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3167 & 0x000000ff;
3168 presence = get_hp_pin_presence(codec, nid);
3169 idx = 1 << idx;
3170
3171 if (presence)
3172 val &= ~idx;
3173 else
3174 val |= idx;
3175
3176 /* power down unused output ports */
3177 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3178};
3179
314634bc
TI		 3180static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3181{
a64135a2
MR		 3182 struct sigmatel_spec *spec = codec->spec;
3183 int idx = res >> 26 & 0x0f;
3184
3185 switch ((res >> 26) & 0x30) {
314634bc
TI		 3186 case STAC_HP_EVENT:
3187 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3188 /* fallthru */
3189 case STAC_PWR_EVENT:
3190 if (spec->num_pwrs > 0)
3191 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3192 }
3193}
3194
cb53c626 3195#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3196static int stac92xx_resume(struct hda_codec *codec)
3197{
dc81bed1
TI		 3198 struct sigmatel_spec *spec = codec->spec;
3199
11b44bbd 3200 stac92xx_set_config_regs(codec);
dc81bed1 3201 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3202 stac_gpio_set(codec, spec->gpio_mask,
3203 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3204 snd_hda_codec_resume_amp(codec);
3205 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3206 /* power down inactive DACs */
3207 if (spec->dac_list)
3208 stac92xx_power_down(codec);
dc81bed1
TI		 3209 /* invoke unsolicited event to reset the HP state */
3210 if (spec->hp_detect)
3211 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3212 return 0;
3213}
3214#endif
3215
2f2f4251
M		 3216static struct hda_codec_ops stac92xx_patch_ops = {
3217 .build_controls = stac92xx_build_controls,
3218 .build_pcms = stac92xx_build_pcms,
3219 .init = stac92xx_init,
3220 .free = stac92xx_free,
4e55096e 3221 .unsol_event = stac92xx_unsol_event,
cb53c626 3222#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3223 .resume = stac92xx_resume,
3224#endif
2f2f4251
M		 3225};
3226
3227static int patch_stac9200(struct hda_codec *codec)
3228{
3229 struct sigmatel_spec *spec;
c7d4b2fa 3230 int err;
2f2f4251 3231
e560d8d8 3232 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3233 if (spec == NULL)
3234 return -ENOMEM;
3235
3236 codec->spec = spec;
a4eed138 3237 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3238 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3239 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3240 stac9200_models,
3241 stac9200_cfg_tbl);
11b44bbd
RF		 3242 if (spec->board_config < 0) {
3243 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3244 err = stac92xx_save_bios_config_regs(codec);
3245 if (err < 0) {
3246 stac92xx_free(codec);
3247 return err;
3248 }
3249 spec->pin_configs = spec->bios_pin_configs;
3250 } else {
403d1944
MP		 3251 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3252 stac92xx_set_config_regs(codec);
3253 }
2f2f4251
M		 3254
3255 spec->multiout.max_channels = 2;
3256 spec->multiout.num_dacs = 1;
3257 spec->multiout.dac_nids = stac9200_dac_nids;
3258 spec->adc_nids = stac9200_adc_nids;
3259 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3260 spec->num_muxes = 1;
8b65727b 3261 spec->num_dmics = 0;
9e05b7a3 3262 spec->num_adcs = 1;
a64135a2 3263 spec->num_pwrs = 0;
c7d4b2fa 3264
bf277785
TD		 3265 if (spec->board_config == STAC_9200_GATEWAY ||
3266 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3267 spec->init = stac9200_eapd_init;
3268 else
3269 spec->init = stac9200_core_init;
2f2f4251 3270 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3271
3272 err = stac9200_parse_auto_config(codec);
3273 if (err < 0) {
3274 stac92xx_free(codec);
3275 return err;
3276 }
2f2f4251
M		 3277
3278 codec->patch_ops = stac92xx_patch_ops;
3279
3280 return 0;
3281}
3282
8e21c34c
TD		 3283static int patch_stac925x(struct hda_codec *codec)
3284{
3285 struct sigmatel_spec *spec;
3286 int err;
3287
3288 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3289 if (spec == NULL)
3290 return -ENOMEM;
3291
3292 codec->spec = spec;
a4eed138 3293 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3294 spec->pin_nids = stac925x_pin_nids;
3295 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3296 stac925x_models,
3297 stac925x_cfg_tbl);
9e507abd 3298 again:
8e21c34c 3299 if (spec->board_config < 0) {
2c11f955
TD		 3300 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3301 "using BIOS defaults\n");
8e21c34c
TD		 3302 err = stac92xx_save_bios_config_regs(codec);
3303 if (err < 0) {
3304 stac92xx_free(codec);
3305 return err;
3306 }
3307 spec->pin_configs = spec->bios_pin_configs;
3308 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3309 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3310 stac92xx_set_config_regs(codec);
3311 }
3312
3313 spec->multiout.max_channels = 2;
3314 spec->multiout.num_dacs = 1;
3315 spec->multiout.dac_nids = stac925x_dac_nids;
3316 spec->adc_nids = stac925x_adc_nids;
3317 spec->mux_nids = stac925x_mux_nids;
3318 spec->num_muxes = 1;
9e05b7a3 3319 spec->num_adcs = 1;
a64135a2 3320 spec->num_pwrs = 0;
2c11f955
TD		 3321 switch (codec->vendor_id) {
3322 case 0x83847632: /* STAC9202 */
3323 case 0x83847633: /* STAC9202D */
3324 case 0x83847636: /* STAC9251 */
3325 case 0x83847637: /* STAC9251D */
f6e9852a 3326 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3327 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3328 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3329 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3330 break;
3331 default:
3332 spec->num_dmics = 0;
3333 break;
3334 }
8e21c34c
TD		 3335
3336 spec->init = stac925x_core_init;
3337 spec->mixer = stac925x_mixer;
3338
3339 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3340 if (!err) {
3341 if (spec->board_config < 0) {
3342 printk(KERN_WARNING "hda_codec: No auto-config is "
3343 "available, default to model=ref\n");
3344 spec->board_config = STAC_925x_REF;
3345 goto again;
3346 }
3347 err = -EINVAL;
3348 }
8e21c34c
TD		 3349 if (err < 0) {
3350 stac92xx_free(codec);
3351 return err;
3352 }
3353
3354 codec->patch_ops = stac92xx_patch_ops;
3355
3356 return 0;
3357}
3358
e1f0d669
MR		 3359static struct hda_input_mux stac92hd73xx_dmux = {
3360 .num_items = 4,
3361 .items = {
3362 { "Analog Inputs", 0x0b },
3363 { "CD", 0x08 },
3364 { "Digital Mic 1", 0x09 },
3365 { "Digital Mic 2", 0x0a },
3366 }
3367};
3368
3369static int patch_stac92hd73xx(struct hda_codec *codec)
3370{
3371 struct sigmatel_spec *spec;
3372 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3373 int err = 0;
3374
3375 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3376 if (spec == NULL)
3377 return -ENOMEM;
3378
3379 codec->spec = spec;
3380 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3381 spec->pin_nids = stac92hd73xx_pin_nids;
3382 spec->board_config = snd_hda_check_board_config(codec,
3383 STAC_92HD73XX_MODELS,
3384 stac92hd73xx_models,
3385 stac92hd73xx_cfg_tbl);
3386again:
3387 if (spec->board_config < 0) {
3388 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3389 " STAC92HD73XX, using BIOS defaults\n");
3390 err = stac92xx_save_bios_config_regs(codec);
3391 if (err < 0) {
3392 stac92xx_free(codec);
3393 return err;
3394 }
3395 spec->pin_configs = spec->bios_pin_configs;
3396 } else {
3397 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3398 stac92xx_set_config_regs(codec);
3399 }
3400
3401 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3402 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3403
3404 if (spec->multiout.num_dacs < 0) {
3405 printk(KERN_WARNING "hda_codec: Could not determine "
3406 "number of channels defaulting to DAC count\n");
3407 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3408 }
3409
3410 switch (spec->multiout.num_dacs) {
3411 case 0x3: /* 6 Channel */
3412 spec->mixer = stac92hd73xx_6ch_mixer;
3413 spec->init = stac92hd73xx_6ch_core_init;
3414 break;
3415 case 0x4: /* 8 Channel */
3416 spec->multiout.hp_nid = 0x18;
3417 spec->mixer = stac92hd73xx_8ch_mixer;
3418 spec->init = stac92hd73xx_8ch_core_init;
3419 break;
3420 case 0x5: /* 10 Channel */
3421 spec->multiout.hp_nid = 0x19;
3422 spec->mixer = stac92hd73xx_10ch_mixer;
3423 spec->init = stac92hd73xx_10ch_core_init;
3424 };
3425
3426 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3427 spec->aloopback_mask = 0x01;
3428 spec->aloopback_shift = 8;
3429
3430 spec->mux_nids = stac92hd73xx_mux_nids;
3431 spec->adc_nids = stac92hd73xx_adc_nids;
3432 spec->dmic_nids = stac92hd73xx_dmic_nids;
3433 spec->dmux_nids = stac92hd73xx_dmux_nids;
3434
3435 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3436 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3437 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3438 spec->dinput_mux = &stac92hd73xx_dmux;
3439 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3440 spec->gpio_mask = spec->gpio_dir = 0x1;
3441 spec->gpio_data = 0x01;
e1f0d669 3442
a7662640
MR		 3443 switch (spec->board_config) {
3444 case STAC_DELL_M6:
3445 switch (codec->subsystem_id) {
3446 case 0x1028025e: /* Analog Mics */
3447 case 0x1028025f:
3448 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3449 spec->num_dmics = 0;
3450 break;
3451 case 0x10280254: /* Digital Mics */
3452 case 0x10280255:
3453 case 0x10280271:
3454 case 0x10280272:
3455 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3456 spec->num_dmics = 1;
3457 break;
3458 case 0x10280256: /* Both */
3459 case 0x10280057:
3460 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3461 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3462 spec->num_dmics = 1;
3463 break;
3464 }
3465 break;
3466 default:
3467 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3468 }
3469
a64135a2
MR		 3470 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3471 spec->pwr_nids = stac92hd73xx_pwr_nids;
3472
e1f0d669
MR		 3473 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3474
3475 if (!err) {
3476 if (spec->board_config < 0) {
3477 printk(KERN_WARNING "hda_codec: No auto-config is "
3478 "available, default to model=ref\n");
3479 spec->board_config = STAC_92HD73XX_REF;
3480 goto again;
3481 }
3482 err = -EINVAL;
3483 }
3484
3485 if (err < 0) {
3486 stac92xx_free(codec);
3487 return err;
3488 }
3489
3490 codec->patch_ops = stac92xx_patch_ops;
3491
3492 return 0;
3493}
3494
e035b841
MR		 3495static int patch_stac92hd71bxx(struct hda_codec *codec)
3496{
3497 struct sigmatel_spec *spec;
3498 int err = 0;
3499
3500 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3501 if (spec == NULL)
3502 return -ENOMEM;
3503
3504 codec->spec = spec;
3505 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3506 spec->pin_nids = stac92hd71bxx_pin_nids;
3507 spec->board_config = snd_hda_check_board_config(codec,
3508 STAC_92HD71BXX_MODELS,
3509 stac92hd71bxx_models,
3510 stac92hd71bxx_cfg_tbl);
3511again:
3512 if (spec->board_config < 0) {
3513 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3514 " STAC92HD71BXX, using BIOS defaults\n");
3515 err = stac92xx_save_bios_config_regs(codec);
3516 if (err < 0) {
3517 stac92xx_free(codec);
3518 return err;
3519 }
3520 spec->pin_configs = spec->bios_pin_configs;
3521 } else {
3522 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3523 stac92xx_set_config_regs(codec);
3524 }
3525
541eee87
MR		 3526 switch (codec->vendor_id) {
3527 case 0x111d76b6: /* 4 Port without Analog Mixer */
3528 case 0x111d76b7:
3529 case 0x111d76b4: /* 6 Port without Analog Mixer */
3530 case 0x111d76b5:
3531 spec->mixer = stac92hd71bxx_mixer;
3532 spec->init = stac92hd71bxx_core_init;
3533 break;
3534 default:
3535 spec->mixer = stac92hd71bxx_analog_mixer;
3536 spec->init = stac92hd71bxx_analog_core_init;
3537 }
3538
3539 spec->aloopback_mask = 0x20;
3540 spec->aloopback_shift = 0;
3541
4fe5195c
MR		 3542 /* GPIO0 High = EAPD */
3543 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0x1;
e035b841 3544
e035b841
MR		 3545 spec->mux_nids = stac92hd71bxx_mux_nids;
3546 spec->adc_nids = stac92hd71bxx_adc_nids;
3547 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3548 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3549
3550 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3551 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3552 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3553 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3554
a64135a2
MR		 3555 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3556 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3557
aea7bb0a 3558 spec->multiout.num_dacs = 1;
e035b841
MR		 3559 spec->multiout.hp_nid = 0x11;
3560 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3561
3562 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3563 if (!err) {
3564 if (spec->board_config < 0) {
3565 printk(KERN_WARNING "hda_codec: No auto-config is "
3566 "available, default to model=ref\n");
3567 spec->board_config = STAC_92HD71BXX_REF;
3568 goto again;
3569 }
3570 err = -EINVAL;
3571 }
3572
3573 if (err < 0) {
3574 stac92xx_free(codec);
3575 return err;
3576 }
3577
3578 codec->patch_ops = stac92xx_patch_ops;
3579
3580 return 0;
3581};
3582
2f2f4251
M		 3583static int patch_stac922x(struct hda_codec *codec)
3584{
3585 struct sigmatel_spec *spec;
c7d4b2fa 3586 int err;
2f2f4251 3587
e560d8d8 3588 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3589 if (spec == NULL)
3590 return -ENOMEM;
3591
3592 codec->spec = spec;
a4eed138 3593 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3594 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3595 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3596 stac922x_models,
3597 stac922x_cfg_tbl);
5d5d3bc3 3598 if (spec->board_config == STAC_INTEL_MAC_V3) {
4fe5195c
MR		 3599 spec->gpio_mask = spec->gpio_dir = 0x03;
3600 spec->gpio_data = 0x03;
3fc24d85
TI		 3601 /* Intel Macs have all same PCI SSID, so we need to check
3602 * codec SSID to distinguish the exact models
3603 */
6f0778d8 3604 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3605 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3606
3607 case 0x106b0800:
3608 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3609 break;
5d5d3bc3
IZ		 3610 case 0x106b0600:
3611 case 0x106b0700:
3612 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3613 break;
5d5d3bc3
IZ		 3614 case 0x106b0e00:
3615 case 0x106b0f00:
3616 case 0x106b1600:
3617 case 0x106b1700:
3618 case 0x106b0200:
3619 case 0x106b1e00:
3620 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3621 break;
5d5d3bc3
IZ		 3622 case 0x106b1a00:
3623 case 0x00000100:
3624 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3625 break;
5d5d3bc3
IZ		 3626 case 0x106b0a00:
3627 case 0x106b2200:
3628 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3629 break;
3fc24d85
TI		 3630 }
3631 }
3632
9e507abd 3633 again:
11b44bbd
RF		 3634 if (spec->board_config < 0) {
3635 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3636 "using BIOS defaults\n");
3637 err = stac92xx_save_bios_config_regs(codec);
3638 if (err < 0) {
3639 stac92xx_free(codec);
3640 return err;
3641 }
3642 spec->pin_configs = spec->bios_pin_configs;
3643 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3644 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3645 stac92xx_set_config_regs(codec);
3646 }
2f2f4251 3647
c7d4b2fa
M		 3648 spec->adc_nids = stac922x_adc_nids;
3649 spec->mux_nids = stac922x_mux_nids;
2549413e 3650 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3651 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3652 spec->num_dmics = 0;
a64135a2 3653 spec->num_pwrs = 0;
c7d4b2fa
M		 3654
3655 spec->init = stac922x_core_init;
2f2f4251 3656 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3657
3658 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3659
3cc08dc6 3660 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3661 if (!err) {
3662 if (spec->board_config < 0) {
3663 printk(KERN_WARNING "hda_codec: No auto-config is "
3664 "available, default to model=ref\n");
3665 spec->board_config = STAC_D945_REF;
3666 goto again;
3667 }
3668 err = -EINVAL;
3669 }
3cc08dc6
MP		 3670 if (err < 0) {
3671 stac92xx_free(codec);
3672 return err;
3673 }
3674
3675 codec->patch_ops = stac92xx_patch_ops;
3676
807a4636
TI		 3677 /* Fix Mux capture level; max to 2 */
3678 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3679 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3680 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3681 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3682 (0 << AC_AMPCAP_MUTE_SHIFT));
3683
3cc08dc6
MP		 3684 return 0;
3685}
3686
3687static int patch_stac927x(struct hda_codec *codec)
3688{
3689 struct sigmatel_spec *spec;
3690 int err;
3691
3692 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3693 if (spec == NULL)
3694 return -ENOMEM;
3695
3696 codec->spec = spec;
a4eed138 3697 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3698 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3699 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3700 stac927x_models,
3701 stac927x_cfg_tbl);
9e507abd 3702 again:
8e9068b1
MR		 3703 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3704 if (spec->board_config < 0)
3705 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3706 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3707 err = stac92xx_save_bios_config_regs(codec);
3708 if (err < 0) {
3709 stac92xx_free(codec);
3710 return err;
3711 }
3712 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3713 } else {
3cc08dc6
MP		 3714 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3715 stac92xx_set_config_regs(codec);
3716 }
3717
8e9068b1
MR		 3718 spec->adc_nids = stac927x_adc_nids;
3719 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3720 spec->mux_nids = stac927x_mux_nids;
3721 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
b76c850f 3722 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 3723 spec->multiout.dac_nids = spec->dac_nids;
3724
81d3dbde 3725 switch (spec->board_config) {
93ed1503 3726 case STAC_D965_3ST:
93ed1503 3727 case STAC_D965_5ST:
8e9068b1 3728 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3729 spec->gpio_mask = spec->gpio_dir = 0x01;
3730 spec->gpio_data = 0x01;
8e9068b1
MR		 3731 spec->num_dmics = 0;
3732
93ed1503 3733 spec->init = d965_core_init;
9e05b7a3 3734 spec->mixer = stac927x_mixer;
81d3dbde 3735 break;
8e9068b1 3736 case STAC_DELL_BIOS:
03d7ca17
MR		 3737 /* configure the analog microphone on some laptops */
3738 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 3739 /* correct the front output jack as a hp out */
7989fba9 3740 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 3741 /* correct the front input jack as a mic */
3742 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3743 /* fallthru */
8e9068b1
MR		 3744 case STAC_DELL_3ST:
3745 /* GPIO2 High = Enable EAPD */
4fe5195c
MR		 3746 spec->gpio_mask = spec->gpio_dir = 0x04;
3747 spec->gpio_data = 0x04;
7f16859a
MR		 3748 spec->dmic_nids = stac927x_dmic_nids;
3749 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3750
8e9068b1
MR		 3751 spec->init = d965_core_init;
3752 spec->mixer = stac927x_mixer;
3753 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3754 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3755 break;
3756 default:
f1f208d0 3757 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3758 spec->gpio_mask = spec->gpio_dir = 0x1;
3759 spec->gpio_data = 0x01;
8e9068b1
MR		 3760 spec->num_dmics = 0;
3761
3762 spec->init = stac927x_core_init;
3763 spec->mixer = stac927x_mixer;
7f16859a
MR		 3764 }
3765
a64135a2 3766 spec->num_pwrs = 0;
e1f0d669
MR		 3767 spec->aloopback_mask = 0x40;
3768 spec->aloopback_shift = 0;
8e9068b1 3769
3cc08dc6 3770 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3771 if (!err) {
3772 if (spec->board_config < 0) {
3773 printk(KERN_WARNING "hda_codec: No auto-config is "
3774 "available, default to model=ref\n");
3775 spec->board_config = STAC_D965_REF;
3776 goto again;
3777 }
3778 err = -EINVAL;
3779 }
c7d4b2fa
M		 3780 if (err < 0) {
3781 stac92xx_free(codec);
3782 return err;
3783 }
2f2f4251
M		 3784
3785 codec->patch_ops = stac92xx_patch_ops;
3786
52987656
TI		 3787 /*
3788 * !!FIXME!!
3789 * The STAC927x seem to require fairly long delays for certain
3790 * command sequences. With too short delays (even if the answer
3791 * is set to RIRB properly), it results in the silence output
3792 * on some hardwares like Dell.
3793 *
3794 * The below flag enables the longer delay (see get_response
3795 * in hda_intel.c).
3796 */
3797 codec->bus->needs_damn_long_delay = 1;
3798
2f2f4251
M		 3799 return 0;
3800}
3801
f3302a59
MP		 3802static int patch_stac9205(struct hda_codec *codec)
3803{
3804 struct sigmatel_spec *spec;
8259980e 3805 int err;
f3302a59
MP		 3806
3807 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3808 if (spec == NULL)
3809 return -ENOMEM;
3810
3811 codec->spec = spec;
a4eed138 3812 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3813 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3814 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3815 stac9205_models,
3816 stac9205_cfg_tbl);
9e507abd 3817 again:
11b44bbd
RF		 3818 if (spec->board_config < 0) {
3819 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3820 err = stac92xx_save_bios_config_regs(codec);
3821 if (err < 0) {
3822 stac92xx_free(codec);
3823 return err;
3824 }
3825 spec->pin_configs = spec->bios_pin_configs;
3826 } else {
f3302a59
MP		 3827 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3828 stac92xx_set_config_regs(codec);
3829 }
3830
3831 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3832 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3833 spec->mux_nids = stac9205_mux_nids;
2549413e 3834 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3835 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3836 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3837 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3838 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3839 spec->num_pwrs = 0;
f3302a59
MP		 3840
3841 spec->init = stac9205_core_init;
3842 spec->mixer = stac9205_mixer;
3843
e1f0d669
MR		 3844 spec->aloopback_mask = 0x40;
3845 spec->aloopback_shift = 0;
f3302a59 3846 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3847
ae0a8ed8 3848 switch (spec->board_config){
ae0a8ed8 3849 case STAC_9205_DELL_M43:
87d48363
MR		 3850 /* Enable SPDIF in/out */
3851 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3852 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3853
4fe5195c
MR		 3854 /* Enable unsol response for GPIO4/Dock HP connection */
3855 snd_hda_codec_write(codec, codec->afg, 0,
3856 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3857 snd_hda_codec_write_cache(codec, codec->afg, 0,
3858 AC_VERB_SET_UNSOLICITED_ENABLE,
3859 (AC_USRSP_EN | STAC_HP_EVENT));
3860
3861 spec->gpio_dir = 0x0b;
3862 spec->gpio_mask = 0x1b;
3863 spec->gpio_mute = 0x10;
e2e7d624 3864 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 3865 * GPIO3 Low = DRM
87d48363 3866 */
4fe5195c 3867 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3868 break;
3869 default:
3870 /* GPIO0 High = EAPD */
4fe5195c
MR		 3871 spec->gpio_mask = spec->gpio_dir = 0x1;
3872 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3873 break;
3874 }
33382403 3875
f3302a59 3876 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3877 if (!err) {
3878 if (spec->board_config < 0) {
3879 printk(KERN_WARNING "hda_codec: No auto-config is "
3880 "available, default to model=ref\n");
3881 spec->board_config = STAC_9205_REF;
3882 goto again;
3883 }
3884 err = -EINVAL;
3885 }
f3302a59
MP		 3886 if (err < 0) {
3887 stac92xx_free(codec);
3888 return err;
3889 }
3890
3891 codec->patch_ops = stac92xx_patch_ops;
3892
3893 return 0;
3894}
3895
db064e50 3896/*
6d859065 3897 * STAC9872 hack
db064e50
TI		 3898 */
3899
99ccc560 3900/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3901static hda_nid_t vaio_dacs[] = { 0x2 };
3902#define VAIO_HP_DAC 0x5
3903static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3904static hda_nid_t vaio_mux_nids[] = { 0x15 };
3905
3906static struct hda_input_mux vaio_mux = {
a3a2f429 3907 .num_items = 3,
db064e50 3908 .items = {
d773781c 3909 /* { "HP", 0x0 }, */
1624cb9a
TI		 3910 { "Mic Jack", 0x1 },
3911 { "Internal Mic", 0x2 },
db064e50
TI		 3912 { "PCM", 0x3 },
3913 }
3914};
3915
3916static struct hda_verb vaio_init[] = {
3917 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3918 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3919 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3920 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3921 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3922 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3923 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3924 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3925 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3926 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3927 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3928 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3929 {}
3930};
3931
6d859065
GM		 3932static struct hda_verb vaio_ar_init[] = {
3933 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3934 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3935 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3936 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3937/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3938 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3939 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3940 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3941 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3942/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3943 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3944 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3945 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3946 {}
3947};
3948
db064e50 3949/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3950static struct hda_bind_ctls vaio_bind_master_vol = {
3951 .ops = &snd_hda_bind_vol,
3952 .values = {
3953 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3954 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3955 0
3956 },
3957};
db064e50
TI		 3958
3959/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3960static struct hda_bind_ctls vaio_bind_master_sw = {
3961 .ops = &snd_hda_bind_sw,
3962 .values = {
3963 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3964 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3965 0,
3966 },
3967};
db064e50
TI		 3968
3969static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3970 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3971 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3972 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3973 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3974 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3975 {
3976 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3977 .name = "Capture Source",
3978 .count = 1,
3979 .info = stac92xx_mux_enum_info,
3980 .get = stac92xx_mux_enum_get,
3981 .put = stac92xx_mux_enum_put,
3982 },
3983 {}
3984};
3985
6d859065 3986static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3987 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3988 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3989 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3990 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3991 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3992 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3993 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3994 {
3995 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3996 .name = "Capture Source",
3997 .count = 1,
3998 .info = stac92xx_mux_enum_info,
3999 .get = stac92xx_mux_enum_get,
4000 .put = stac92xx_mux_enum_put,
4001 },
4002 {}
4003};
4004
4005static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4006 .build_controls = stac92xx_build_controls,
4007 .build_pcms = stac92xx_build_pcms,
4008 .init = stac92xx_init,
4009 .free = stac92xx_free,
cb53c626 4010#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4011 .resume = stac92xx_resume,
4012#endif
4013};
4014
72e7b0dd
TI		 4015static int stac9872_vaio_init(struct hda_codec *codec)
4016{
4017 int err;
4018
4019 err = stac92xx_init(codec);
4020 if (err < 0)
4021 return err;
4022 if (codec->patch_ops.unsol_event)
4023 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4024 return 0;
4025}
4026
4027static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4028{
40c1d308 4029 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4030 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4031 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4032 } else {
4033 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4034 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4035 }
4036}
4037
4038static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4039{
4040 switch (res >> 26) {
4041 case STAC_HP_EVENT:
4042 stac9872_vaio_hp_detect(codec, res);
4043 break;
4044 }
4045}
4046
4047static struct hda_codec_ops stac9872_vaio_patch_ops = {
4048 .build_controls = stac92xx_build_controls,
4049 .build_pcms = stac92xx_build_pcms,
4050 .init = stac9872_vaio_init,
4051 .free = stac92xx_free,
4052 .unsol_event = stac9872_vaio_unsol_event,
4053#ifdef CONFIG_PM
4054 .resume = stac92xx_resume,
4055#endif
4056};
4057
6d859065
GM		 4058enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4059 CXD9872RD_VAIO,
4060 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4061 STAC9872AK_VAIO,
4062 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4063 STAC9872K_VAIO,
4064 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4065 CXD9872AKD_VAIO,
4066 STAC_9872_MODELS,
4067};
4068
4069static const char *stac9872_models[STAC_9872_MODELS] = {
4070 [CXD9872RD_VAIO] = "vaio",
4071 [CXD9872AKD_VAIO] = "vaio-ar",
4072};
4073
4074static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4075 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4076 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4077 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4078 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4079 {}
4080};
4081
6d859065 4082static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4083{
4084 struct sigmatel_spec *spec;
4085 int board_config;
4086
f5fcc13c
TI		 4087 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4088 stac9872_models,
4089 stac9872_cfg_tbl);
db064e50
TI		 4090 if (board_config < 0)
4091 /* unknown config, let generic-parser do its job... */
4092 return snd_hda_parse_generic_codec(codec);
4093
4094 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4095 if (spec == NULL)
4096 return -ENOMEM;
4097
4098 codec->spec = spec;
4099 switch (board_config) {
6d859065
GM		 4100 case CXD9872RD_VAIO:
4101 case STAC9872AK_VAIO:
4102 case STAC9872K_VAIO:
db064e50
TI		 4103 spec->mixer = vaio_mixer;
4104 spec->init = vaio_init;
4105 spec->multiout.max_channels = 2;
4106 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4107 spec->multiout.dac_nids = vaio_dacs;
4108 spec->multiout.hp_nid = VAIO_HP_DAC;
4109 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4110 spec->adc_nids = vaio_adcs;
a64135a2 4111 spec->num_pwrs = 0;
db064e50
TI		 4112 spec->input_mux = &vaio_mux;
4113 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4114 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4115 break;
6d859065
GM		 4116
4117 case CXD9872AKD_VAIO:
4118 spec->mixer = vaio_ar_mixer;
4119 spec->init = vaio_ar_init;
4120 spec->multiout.max_channels = 2;
4121 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4122 spec->multiout.dac_nids = vaio_dacs;
4123 spec->multiout.hp_nid = VAIO_HP_DAC;
4124 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4125 spec->num_pwrs = 0;
6d859065
GM		 4126 spec->adc_nids = vaio_adcs;
4127 spec->input_mux = &vaio_mux;
4128 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4129 codec->patch_ops = stac9872_patch_ops;
6d859065 4130 break;
db064e50
TI		 4131 }
4132
db064e50
TI		 4133 return 0;
4134}
4135
4136
2f2f4251
M		 4137/*
4138 * patch entries
4139 */
4140struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4141 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4142 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4143 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4144 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4145 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4146 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4147 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4148 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4149 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4150 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4151 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4152 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4153 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4154 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4155 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4156 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4157 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4158 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4159 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4160 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4161 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4162 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4163 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4164 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4165 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4166 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4167 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4168 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4169 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 4170 /* The following does not take into account .id=0x83847661 when subsys =
4171 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4172 * currently not fully supported.
4173 */
4174 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4175 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4176 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4177 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4178 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4179 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4180 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4181 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4182 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4183 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4184 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 4185 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4186 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4187 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4188 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
4189 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4190 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4191 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4192 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4193 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4194 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4195 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4196 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4197 {} /* terminator */
4198};
Linux kernel - Deliverables
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