Commit | Line | Data |
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2f2f4251 M |
1 | /* |
2 | * Universal Interface for Intel High Definition Audio Codec | |
3 | * | |
4 | * HD audio interface patch for SigmaTel STAC92xx | |
5 | * | |
6 | * Copyright (c) 2005 Embedded Alley Solutions, Inc. | |
403d1944 | 7 | * Matt Porter <mporter@embeddedalley.com> |
2f2f4251 M |
8 | * |
9 | * Based on patch_cmedia.c and patch_realtek.c | |
10 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> | |
11 | * | |
12 | * This driver is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This driver is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #include <sound/driver.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/slab.h> | |
31 | #include <linux/pci.h> | |
32 | #include <sound/core.h> | |
c7d4b2fa | 33 | #include <sound/asoundef.h> |
2f2f4251 M |
34 | #include "hda_codec.h" |
35 | #include "hda_local.h" | |
36 | ||
4e55096e M |
37 | #define NUM_CONTROL_ALLOC 32 |
38 | #define STAC_HP_EVENT 0x37 | |
4e55096e | 39 | |
f5fcc13c TI |
40 | enum { |
41 | STAC_REF, | |
dfe495d0 TI |
42 | STAC_9200_DELL_D21, |
43 | STAC_9200_DELL_D22, | |
44 | STAC_9200_DELL_D23, | |
45 | STAC_9200_DELL_M21, | |
46 | STAC_9200_DELL_M22, | |
47 | STAC_9200_DELL_M23, | |
48 | STAC_9200_DELL_M24, | |
49 | STAC_9200_DELL_M25, | |
50 | STAC_9200_DELL_M26, | |
51 | STAC_9200_DELL_M27, | |
1194b5b7 | 52 | STAC_9200_GATEWAY, |
f5fcc13c TI |
53 | STAC_9200_MODELS |
54 | }; | |
55 | ||
56 | enum { | |
57 | STAC_9205_REF, | |
dfe495d0 | 58 | STAC_9205_DELL_M42, |
ae0a8ed8 TD |
59 | STAC_9205_DELL_M43, |
60 | STAC_9205_DELL_M44, | |
f5fcc13c TI |
61 | STAC_9205_MODELS |
62 | }; | |
63 | ||
e035b841 MR |
64 | enum { |
65 | STAC_92HD71BXX_REF, | |
66 | STAC_92HD71BXX_MODELS | |
67 | }; | |
68 | ||
8e21c34c TD |
69 | enum { |
70 | STAC_925x_REF, | |
71 | STAC_M2_2, | |
72 | STAC_MA6, | |
2c11f955 | 73 | STAC_PA6, |
8e21c34c TD |
74 | STAC_925x_MODELS |
75 | }; | |
76 | ||
f5fcc13c TI |
77 | enum { |
78 | STAC_D945_REF, | |
79 | STAC_D945GTP3, | |
80 | STAC_D945GTP5, | |
5d5d3bc3 IZ |
81 | STAC_INTEL_MAC_V1, |
82 | STAC_INTEL_MAC_V2, | |
83 | STAC_INTEL_MAC_V3, | |
84 | STAC_INTEL_MAC_V4, | |
85 | STAC_INTEL_MAC_V5, | |
dfe495d0 | 86 | /* for backward compatibility */ |
f5fcc13c | 87 | STAC_MACMINI, |
3fc24d85 | 88 | STAC_MACBOOK, |
6f0778d8 NB |
89 | STAC_MACBOOK_PRO_V1, |
90 | STAC_MACBOOK_PRO_V2, | |
f16928fb | 91 | STAC_IMAC_INTEL, |
0dae0f83 | 92 | STAC_IMAC_INTEL_20, |
dfe495d0 TI |
93 | STAC_922X_DELL_D81, |
94 | STAC_922X_DELL_D82, | |
95 | STAC_922X_DELL_M81, | |
96 | STAC_922X_DELL_M82, | |
f5fcc13c TI |
97 | STAC_922X_MODELS |
98 | }; | |
99 | ||
100 | enum { | |
101 | STAC_D965_REF, | |
102 | STAC_D965_3ST, | |
103 | STAC_D965_5ST, | |
4ff076e5 | 104 | STAC_DELL_3ST, |
f5fcc13c TI |
105 | STAC_927X_MODELS |
106 | }; | |
403d1944 | 107 | |
2f2f4251 | 108 | struct sigmatel_spec { |
c8b6bf9b | 109 | struct snd_kcontrol_new *mixers[4]; |
c7d4b2fa M |
110 | unsigned int num_mixers; |
111 | ||
403d1944 | 112 | int board_config; |
c7d4b2fa | 113 | unsigned int surr_switch: 1; |
403d1944 MP |
114 | unsigned int line_switch: 1; |
115 | unsigned int mic_switch: 1; | |
3cc08dc6 | 116 | unsigned int alt_switch: 1; |
82bc955f | 117 | unsigned int hp_detect: 1; |
62fe78e9 | 118 | unsigned int gpio_mute: 1; |
c7d4b2fa | 119 | |
8259980e TI |
120 | unsigned int gpio_mask, gpio_data; |
121 | ||
2f2f4251 M |
122 | /* playback */ |
123 | struct hda_multi_out multiout; | |
3cc08dc6 | 124 | hda_nid_t dac_nids[5]; |
2f2f4251 M |
125 | |
126 | /* capture */ | |
127 | hda_nid_t *adc_nids; | |
2f2f4251 | 128 | unsigned int num_adcs; |
dabbed6f M |
129 | hda_nid_t *mux_nids; |
130 | unsigned int num_muxes; | |
8b65727b MP |
131 | hda_nid_t *dmic_nids; |
132 | unsigned int num_dmics; | |
133 | hda_nid_t dmux_nid; | |
dabbed6f | 134 | hda_nid_t dig_in_nid; |
2f2f4251 | 135 | |
2f2f4251 M |
136 | /* pin widgets */ |
137 | hda_nid_t *pin_nids; | |
138 | unsigned int num_pins; | |
2f2f4251 | 139 | unsigned int *pin_configs; |
11b44bbd | 140 | unsigned int *bios_pin_configs; |
2f2f4251 M |
141 | |
142 | /* codec specific stuff */ | |
143 | struct hda_verb *init; | |
c8b6bf9b | 144 | struct snd_kcontrol_new *mixer; |
2f2f4251 M |
145 | |
146 | /* capture source */ | |
8b65727b MP |
147 | struct hda_input_mux *dinput_mux; |
148 | unsigned int cur_dmux; | |
c7d4b2fa | 149 | struct hda_input_mux *input_mux; |
3cc08dc6 | 150 | unsigned int cur_mux[3]; |
2f2f4251 | 151 | |
403d1944 MP |
152 | /* i/o switches */ |
153 | unsigned int io_switch[2]; | |
0fb87bb4 | 154 | unsigned int clfe_swap; |
5f10c4a9 | 155 | unsigned int aloopback; |
2f2f4251 | 156 | |
c7d4b2fa M |
157 | struct hda_pcm pcm_rec[2]; /* PCM information */ |
158 | ||
159 | /* dynamic controls and input_mux */ | |
160 | struct auto_pin_cfg autocfg; | |
161 | unsigned int num_kctl_alloc, num_kctl_used; | |
c8b6bf9b | 162 | struct snd_kcontrol_new *kctl_alloc; |
8b65727b | 163 | struct hda_input_mux private_dimux; |
c7d4b2fa | 164 | struct hda_input_mux private_imux; |
2f2f4251 M |
165 | }; |
166 | ||
167 | static hda_nid_t stac9200_adc_nids[1] = { | |
168 | 0x03, | |
169 | }; | |
170 | ||
171 | static hda_nid_t stac9200_mux_nids[1] = { | |
172 | 0x0c, | |
173 | }; | |
174 | ||
175 | static hda_nid_t stac9200_dac_nids[1] = { | |
176 | 0x02, | |
177 | }; | |
178 | ||
e035b841 MR |
179 | static hda_nid_t stac92hd71bxx_adc_nids[2] = { |
180 | 0x12, 0x13, | |
181 | }; | |
182 | ||
183 | static hda_nid_t stac92hd71bxx_mux_nids[2] = { | |
184 | 0x1a, 0x1b | |
185 | }; | |
186 | ||
187 | static hda_nid_t stac92hd71bxx_dac_nids[2] = { | |
188 | 0x10, /*0x11, */ | |
189 | }; | |
190 | ||
191 | #define STAC92HD71BXX_NUM_DMICS 2 | |
192 | static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = { | |
193 | 0x18, 0x19, 0 | |
194 | }; | |
195 | ||
8e21c34c TD |
196 | static hda_nid_t stac925x_adc_nids[1] = { |
197 | 0x03, | |
198 | }; | |
199 | ||
200 | static hda_nid_t stac925x_mux_nids[1] = { | |
201 | 0x0f, | |
202 | }; | |
203 | ||
204 | static hda_nid_t stac925x_dac_nids[1] = { | |
205 | 0x02, | |
206 | }; | |
207 | ||
f6e9852a TI |
208 | #define STAC925X_NUM_DMICS 1 |
209 | static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = { | |
210 | 0x15, 0 | |
2c11f955 TD |
211 | }; |
212 | ||
2f2f4251 M |
213 | static hda_nid_t stac922x_adc_nids[2] = { |
214 | 0x06, 0x07, | |
215 | }; | |
216 | ||
217 | static hda_nid_t stac922x_mux_nids[2] = { | |
218 | 0x12, 0x13, | |
219 | }; | |
220 | ||
3cc08dc6 MP |
221 | static hda_nid_t stac927x_adc_nids[3] = { |
222 | 0x07, 0x08, 0x09 | |
223 | }; | |
224 | ||
225 | static hda_nid_t stac927x_mux_nids[3] = { | |
226 | 0x15, 0x16, 0x17 | |
227 | }; | |
228 | ||
7f16859a MR |
229 | #define STAC927X_NUM_DMICS 2 |
230 | static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = { | |
231 | 0x13, 0x14, 0 | |
232 | }; | |
233 | ||
f3302a59 MP |
234 | static hda_nid_t stac9205_adc_nids[2] = { |
235 | 0x12, 0x13 | |
236 | }; | |
237 | ||
238 | static hda_nid_t stac9205_mux_nids[2] = { | |
239 | 0x19, 0x1a | |
240 | }; | |
241 | ||
f6e9852a TI |
242 | #define STAC9205_NUM_DMICS 2 |
243 | static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = { | |
244 | 0x17, 0x18, 0 | |
8b65727b MP |
245 | }; |
246 | ||
c7d4b2fa | 247 | static hda_nid_t stac9200_pin_nids[8] = { |
93ed1503 TD |
248 | 0x08, 0x09, 0x0d, 0x0e, |
249 | 0x0f, 0x10, 0x11, 0x12, | |
2f2f4251 M |
250 | }; |
251 | ||
8e21c34c TD |
252 | static hda_nid_t stac925x_pin_nids[8] = { |
253 | 0x07, 0x08, 0x0a, 0x0b, | |
254 | 0x0c, 0x0d, 0x10, 0x11, | |
255 | }; | |
256 | ||
2f2f4251 M |
257 | static hda_nid_t stac922x_pin_nids[10] = { |
258 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
259 | 0x0f, 0x10, 0x11, 0x15, 0x1b, | |
260 | }; | |
261 | ||
e035b841 MR |
262 | static hda_nid_t stac92hd71bxx_pin_nids[10] = { |
263 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
264 | 0x0f, 0x14, 0x18, 0x19, 0x1e, | |
265 | }; | |
266 | ||
3cc08dc6 MP |
267 | static hda_nid_t stac927x_pin_nids[14] = { |
268 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
269 | 0x0f, 0x10, 0x11, 0x12, 0x13, | |
270 | 0x14, 0x21, 0x22, 0x23, | |
271 | }; | |
272 | ||
f3302a59 MP |
273 | static hda_nid_t stac9205_pin_nids[12] = { |
274 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | |
275 | 0x0f, 0x14, 0x16, 0x17, 0x18, | |
276 | 0x21, 0x22, | |
f3302a59 MP |
277 | }; |
278 | ||
8b65727b MP |
279 | static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol, |
280 | struct snd_ctl_elem_info *uinfo) | |
281 | { | |
282 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
283 | struct sigmatel_spec *spec = codec->spec; | |
284 | return snd_hda_input_mux_info(spec->dinput_mux, uinfo); | |
285 | } | |
286 | ||
287 | static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol, | |
288 | struct snd_ctl_elem_value *ucontrol) | |
289 | { | |
290 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
291 | struct sigmatel_spec *spec = codec->spec; | |
292 | ||
293 | ucontrol->value.enumerated.item[0] = spec->cur_dmux; | |
294 | return 0; | |
295 | } | |
296 | ||
297 | static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol, | |
298 | struct snd_ctl_elem_value *ucontrol) | |
299 | { | |
300 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
301 | struct sigmatel_spec *spec = codec->spec; | |
302 | ||
303 | return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol, | |
304 | spec->dmux_nid, &spec->cur_dmux); | |
305 | } | |
306 | ||
c8b6bf9b | 307 | static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
2f2f4251 M |
308 | { |
309 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
310 | struct sigmatel_spec *spec = codec->spec; | |
c7d4b2fa | 311 | return snd_hda_input_mux_info(spec->input_mux, uinfo); |
2f2f4251 M |
312 | } |
313 | ||
c8b6bf9b | 314 | static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
2f2f4251 M |
315 | { |
316 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
317 | struct sigmatel_spec *spec = codec->spec; | |
318 | unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); | |
319 | ||
320 | ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx]; | |
321 | return 0; | |
322 | } | |
323 | ||
c8b6bf9b | 324 | static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
2f2f4251 M |
325 | { |
326 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
327 | struct sigmatel_spec *spec = codec->spec; | |
328 | unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); | |
329 | ||
c7d4b2fa | 330 | return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol, |
2f2f4251 M |
331 | spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]); |
332 | } | |
333 | ||
5f10c4a9 ML |
334 | #define stac92xx_aloopback_info snd_ctl_boolean_mono_info |
335 | ||
336 | static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol, | |
337 | struct snd_ctl_elem_value *ucontrol) | |
338 | { | |
339 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
340 | struct sigmatel_spec *spec = codec->spec; | |
341 | ||
342 | ucontrol->value.integer.value[0] = spec->aloopback; | |
343 | return 0; | |
344 | } | |
345 | ||
346 | static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol, | |
347 | struct snd_ctl_elem_value *ucontrol) | |
348 | { | |
349 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
350 | struct sigmatel_spec *spec = codec->spec; | |
351 | unsigned int dac_mode; | |
352 | ||
353 | if (spec->aloopback == ucontrol->value.integer.value[0]) | |
354 | return 0; | |
355 | ||
356 | spec->aloopback = ucontrol->value.integer.value[0]; | |
357 | ||
358 | ||
359 | dac_mode = snd_hda_codec_read(codec, codec->afg, 0, | |
360 | kcontrol->private_value & 0xFFFF, 0x0); | |
361 | ||
362 | if (spec->aloopback) { | |
363 | snd_hda_power_up(codec); | |
364 | dac_mode |= 0x40; | |
365 | } else { | |
366 | snd_hda_power_down(codec); | |
367 | dac_mode &= ~0x40; | |
368 | } | |
369 | ||
370 | snd_hda_codec_write_cache(codec, codec->afg, 0, | |
371 | kcontrol->private_value >> 16, dac_mode); | |
372 | ||
373 | return 1; | |
374 | } | |
375 | ||
c7d4b2fa | 376 | static struct hda_verb stac9200_core_init[] = { |
2f2f4251 | 377 | /* set dac0mux for dac converter */ |
c7d4b2fa | 378 | { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, |
2f2f4251 M |
379 | {} |
380 | }; | |
381 | ||
1194b5b7 TI |
382 | static struct hda_verb stac9200_eapd_init[] = { |
383 | /* set dac0mux for dac converter */ | |
384 | {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
385 | {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, | |
386 | {} | |
387 | }; | |
388 | ||
e035b841 MR |
389 | static struct hda_verb stac92hd71bxx_core_init[] = { |
390 | /* set master volume and direct control */ | |
391 | { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
392 | /* connect headphone jack to dac1 */ | |
393 | { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
9b35947f MR |
394 | /* connect ports 0d and 0f to audio mixer */ |
395 | { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2}, | |
396 | { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2}, | |
397 | /* unmute dac0 input in audio mixer */ | |
398 | { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f}, | |
e035b841 MR |
399 | /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */ |
400 | { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
401 | { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
402 | { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
403 | /* unmute mono out node */ | |
404 | { 0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | |
405 | {} | |
406 | }; | |
407 | ||
8e21c34c TD |
408 | static struct hda_verb stac925x_core_init[] = { |
409 | /* set dac0mux for dac converter */ | |
410 | { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, | |
411 | {} | |
412 | }; | |
413 | ||
c7d4b2fa | 414 | static struct hda_verb stac922x_core_init[] = { |
2f2f4251 | 415 | /* set master volume and direct control */ |
c7d4b2fa | 416 | { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
2f2f4251 M |
417 | {} |
418 | }; | |
419 | ||
93ed1503 | 420 | static struct hda_verb d965_core_init[] = { |
19039bd0 | 421 | /* set master volume and direct control */ |
93ed1503 | 422 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
19039bd0 TI |
423 | /* unmute node 0x1b */ |
424 | { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, | |
425 | /* select node 0x03 as DAC */ | |
426 | { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, | |
427 | {} | |
428 | }; | |
429 | ||
3cc08dc6 MP |
430 | static struct hda_verb stac927x_core_init[] = { |
431 | /* set master volume and direct control */ | |
432 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
433 | {} | |
434 | }; | |
435 | ||
f3302a59 MP |
436 | static struct hda_verb stac9205_core_init[] = { |
437 | /* set master volume and direct control */ | |
438 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | |
439 | {} | |
440 | }; | |
441 | ||
47744f63 MR |
442 | #define STAC_DIGITAL_INPUT_SOURCE(cnt) \ |
443 | { \ | |
444 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
445 | .name = "Digital Input Source", \ | |
446 | .count = cnt, \ | |
447 | .info = stac92xx_dmux_enum_info, \ | |
448 | .get = stac92xx_dmux_enum_get, \ | |
449 | .put = stac92xx_dmux_enum_put,\ | |
450 | } | |
451 | ||
9e05b7a3 | 452 | #define STAC_INPUT_SOURCE(cnt) \ |
ca7c5a8b ML |
453 | { \ |
454 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
455 | .name = "Input Source", \ | |
9e05b7a3 | 456 | .count = cnt, \ |
ca7c5a8b ML |
457 | .info = stac92xx_mux_enum_info, \ |
458 | .get = stac92xx_mux_enum_get, \ | |
459 | .put = stac92xx_mux_enum_put, \ | |
460 | } | |
461 | ||
5f10c4a9 ML |
462 | #define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \ |
463 | { \ | |
464 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
465 | .name = "Analog Loopback", \ | |
466 | .count = 1, \ | |
467 | .info = stac92xx_aloopback_info, \ | |
468 | .get = stac92xx_aloopback_get, \ | |
469 | .put = stac92xx_aloopback_put, \ | |
470 | .private_value = verb_read | (verb_write << 16), \ | |
471 | } | |
472 | ||
9b35947f MR |
473 | #define STAC_VOLKNOB(knob_nid) \ |
474 | { \ | |
475 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
476 | .name = "Master Playback Volume", \ | |
477 | .count = 1, \ | |
478 | .info = stac92xx_volknob_info, \ | |
479 | .get = stac92xx_volknob_get, \ | |
480 | .put = stac92xx_volknob_put, \ | |
481 | .private_value = 127 | (knob_nid << 16), \ | |
482 | } | |
483 | ||
c8b6bf9b | 484 | static struct snd_kcontrol_new stac9200_mixer[] = { |
2f2f4251 M |
485 | HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT), |
486 | HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT), | |
9e05b7a3 | 487 | STAC_INPUT_SOURCE(1), |
2f2f4251 M |
488 | HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT), |
489 | HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT), | |
c7d4b2fa | 490 | HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT), |
2f2f4251 M |
491 | { } /* end */ |
492 | }; | |
493 | ||
e035b841 MR |
494 | static struct snd_kcontrol_new stac92hd71bxx_mixer[] = { |
495 | STAC_DIGITAL_INPUT_SOURCE(1), | |
496 | STAC_INPUT_SOURCE(2), | |
497 | STAC_VOLKNOB(0x28), | |
498 | ||
499 | /* hardware gain controls */ | |
9b35947f MR |
500 | HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x0, 0x18, 0x0, HDA_OUTPUT), |
501 | HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x1, 0x19, 0x0, HDA_OUTPUT), | |
502 | ||
503 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT), | |
504 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT), | |
505 | HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT), | |
506 | ||
507 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT), | |
508 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT), | |
509 | HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT), | |
e035b841 | 510 | |
9b35947f MR |
511 | HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT), |
512 | HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT), | |
e035b841 MR |
513 | { } /* end */ |
514 | }; | |
515 | ||
8e21c34c | 516 | static struct snd_kcontrol_new stac925x_mixer[] = { |
9e05b7a3 | 517 | STAC_INPUT_SOURCE(1), |
8e21c34c TD |
518 | HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT), |
519 | HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT), | |
520 | HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT), | |
521 | { } /* end */ | |
522 | }; | |
523 | ||
9e05b7a3 | 524 | static struct snd_kcontrol_new stac9205_mixer[] = { |
47744f63 | 525 | STAC_DIGITAL_INPUT_SOURCE(1), |
9e05b7a3 ML |
526 | STAC_INPUT_SOURCE(2), |
527 | STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0), | |
9e05b7a3 ML |
528 | |
529 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT), | |
530 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT), | |
531 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT), | |
532 | ||
533 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT), | |
534 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT), | |
535 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT), | |
536 | ||
2f2f4251 M |
537 | { } /* end */ |
538 | }; | |
539 | ||
19039bd0 | 540 | /* This needs to be generated dynamically based on sequence */ |
9e05b7a3 ML |
541 | static struct snd_kcontrol_new stac922x_mixer[] = { |
542 | STAC_INPUT_SOURCE(2), | |
9e05b7a3 ML |
543 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT), |
544 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT), | |
545 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT), | |
546 | ||
547 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT), | |
548 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT), | |
549 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT), | |
19039bd0 TI |
550 | { } /* end */ |
551 | }; | |
552 | ||
9e05b7a3 | 553 | |
d1d985f0 | 554 | static struct snd_kcontrol_new stac927x_mixer[] = { |
47744f63 | 555 | STAC_DIGITAL_INPUT_SOURCE(1), |
9e05b7a3 | 556 | STAC_INPUT_SOURCE(3), |
5f10c4a9 | 557 | STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB), |
3cc08dc6 | 558 | |
9e05b7a3 ML |
559 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT), |
560 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT), | |
561 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT), | |
562 | ||
563 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT), | |
564 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT), | |
565 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT), | |
566 | ||
567 | HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT), | |
568 | HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT), | |
569 | HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT), | |
f3302a59 MP |
570 | { } /* end */ |
571 | }; | |
572 | ||
2f2f4251 M |
573 | static int stac92xx_build_controls(struct hda_codec *codec) |
574 | { | |
575 | struct sigmatel_spec *spec = codec->spec; | |
576 | int err; | |
c7d4b2fa | 577 | int i; |
2f2f4251 M |
578 | |
579 | err = snd_hda_add_new_ctls(codec, spec->mixer); | |
580 | if (err < 0) | |
581 | return err; | |
c7d4b2fa M |
582 | |
583 | for (i = 0; i < spec->num_mixers; i++) { | |
584 | err = snd_hda_add_new_ctls(codec, spec->mixers[i]); | |
585 | if (err < 0) | |
586 | return err; | |
587 | } | |
588 | ||
dabbed6f M |
589 | if (spec->multiout.dig_out_nid) { |
590 | err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid); | |
591 | if (err < 0) | |
592 | return err; | |
593 | } | |
594 | if (spec->dig_in_nid) { | |
595 | err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid); | |
596 | if (err < 0) | |
597 | return err; | |
598 | } | |
599 | return 0; | |
2f2f4251 M |
600 | } |
601 | ||
403d1944 | 602 | static unsigned int ref9200_pin_configs[8] = { |
dabbed6f | 603 | 0x01c47010, 0x01447010, 0x0221401f, 0x01114010, |
2f2f4251 M |
604 | 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, |
605 | }; | |
606 | ||
dfe495d0 TI |
607 | /* |
608 | STAC 9200 pin configs for | |
609 | 102801A8 | |
610 | 102801DE | |
611 | 102801E8 | |
612 | */ | |
613 | static unsigned int dell9200_d21_pin_configs[8] = { | |
af6c016e TI |
614 | 0x400001f0, 0x400001f1, 0x02214030, 0x01014010, |
615 | 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, | |
dfe495d0 TI |
616 | }; |
617 | ||
618 | /* | |
619 | STAC 9200 pin configs for | |
620 | 102801C0 | |
621 | 102801C1 | |
622 | */ | |
623 | static unsigned int dell9200_d22_pin_configs[8] = { | |
af6c016e TI |
624 | 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010, |
625 | 0x01813020, 0x02a19021, 0x90100140, 0x400001f2, | |
dfe495d0 TI |
626 | }; |
627 | ||
628 | /* | |
629 | STAC 9200 pin configs for | |
630 | 102801C4 (Dell Dimension E310) | |
631 | 102801C5 | |
632 | 102801C7 | |
633 | 102801D9 | |
634 | 102801DA | |
635 | 102801E3 | |
636 | */ | |
637 | static unsigned int dell9200_d23_pin_configs[8] = { | |
af6c016e TI |
638 | 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010, |
639 | 0x01813020, 0x01a19021, 0x90100140, 0x400001f2, | |
dfe495d0 TI |
640 | }; |
641 | ||
642 | ||
643 | /* | |
644 | STAC 9200-32 pin configs for | |
645 | 102801B5 (Dell Inspiron 630m) | |
646 | 102801D8 (Dell Inspiron 640m) | |
647 | */ | |
648 | static unsigned int dell9200_m21_pin_configs[8] = { | |
af6c016e TI |
649 | 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310, |
650 | 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd, | |
dfe495d0 TI |
651 | }; |
652 | ||
653 | /* | |
654 | STAC 9200-32 pin configs for | |
655 | 102801C2 (Dell Latitude D620) | |
656 | 102801C8 | |
657 | 102801CC (Dell Latitude D820) | |
658 | 102801D4 | |
659 | 102801D6 | |
660 | */ | |
661 | static unsigned int dell9200_m22_pin_configs[8] = { | |
af6c016e TI |
662 | 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310, |
663 | 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc, | |
dfe495d0 TI |
664 | }; |
665 | ||
666 | /* | |
667 | STAC 9200-32 pin configs for | |
668 | 102801CE (Dell XPS M1710) | |
669 | 102801CF (Dell Precision M90) | |
670 | */ | |
671 | static unsigned int dell9200_m23_pin_configs[8] = { | |
672 | 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310, | |
673 | 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc, | |
674 | }; | |
675 | ||
676 | /* | |
677 | STAC 9200-32 pin configs for | |
678 | 102801C9 | |
679 | 102801CA | |
680 | 102801CB (Dell Latitude 120L) | |
681 | 102801D3 | |
682 | */ | |
683 | static unsigned int dell9200_m24_pin_configs[8] = { | |
af6c016e TI |
684 | 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310, |
685 | 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe, | |
dfe495d0 TI |
686 | }; |
687 | ||
688 | /* | |
689 | STAC 9200-32 pin configs for | |
690 | 102801BD (Dell Inspiron E1505n) | |
691 | 102801EE | |
692 | 102801EF | |
693 | */ | |
694 | static unsigned int dell9200_m25_pin_configs[8] = { | |
af6c016e TI |
695 | 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310, |
696 | 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd, | |
dfe495d0 TI |
697 | }; |
698 | ||
699 | /* | |
700 | STAC 9200-32 pin configs for | |
701 | 102801F5 (Dell Inspiron 1501) | |
702 | 102801F6 | |
703 | */ | |
704 | static unsigned int dell9200_m26_pin_configs[8] = { | |
af6c016e TI |
705 | 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310, |
706 | 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe, | |
dfe495d0 TI |
707 | }; |
708 | ||
709 | /* | |
710 | STAC 9200-32 | |
711 | 102801CD (Dell Inspiron E1705/9400) | |
712 | */ | |
713 | static unsigned int dell9200_m27_pin_configs[8] = { | |
af6c016e TI |
714 | 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310, |
715 | 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc, | |
dfe495d0 TI |
716 | }; |
717 | ||
718 | ||
f5fcc13c TI |
719 | static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = { |
720 | [STAC_REF] = ref9200_pin_configs, | |
dfe495d0 TI |
721 | [STAC_9200_DELL_D21] = dell9200_d21_pin_configs, |
722 | [STAC_9200_DELL_D22] = dell9200_d22_pin_configs, | |
723 | [STAC_9200_DELL_D23] = dell9200_d23_pin_configs, | |
724 | [STAC_9200_DELL_M21] = dell9200_m21_pin_configs, | |
725 | [STAC_9200_DELL_M22] = dell9200_m22_pin_configs, | |
726 | [STAC_9200_DELL_M23] = dell9200_m23_pin_configs, | |
727 | [STAC_9200_DELL_M24] = dell9200_m24_pin_configs, | |
728 | [STAC_9200_DELL_M25] = dell9200_m25_pin_configs, | |
729 | [STAC_9200_DELL_M26] = dell9200_m26_pin_configs, | |
730 | [STAC_9200_DELL_M27] = dell9200_m27_pin_configs, | |
403d1944 MP |
731 | }; |
732 | ||
f5fcc13c TI |
733 | static const char *stac9200_models[STAC_9200_MODELS] = { |
734 | [STAC_REF] = "ref", | |
dfe495d0 TI |
735 | [STAC_9200_DELL_D21] = "dell-d21", |
736 | [STAC_9200_DELL_D22] = "dell-d22", | |
737 | [STAC_9200_DELL_D23] = "dell-d23", | |
738 | [STAC_9200_DELL_M21] = "dell-m21", | |
739 | [STAC_9200_DELL_M22] = "dell-m22", | |
740 | [STAC_9200_DELL_M23] = "dell-m23", | |
741 | [STAC_9200_DELL_M24] = "dell-m24", | |
742 | [STAC_9200_DELL_M25] = "dell-m25", | |
743 | [STAC_9200_DELL_M26] = "dell-m26", | |
744 | [STAC_9200_DELL_M27] = "dell-m27", | |
1194b5b7 | 745 | [STAC_9200_GATEWAY] = "gateway", |
f5fcc13c TI |
746 | }; |
747 | ||
748 | static struct snd_pci_quirk stac9200_cfg_tbl[] = { | |
749 | /* SigmaTel reference board */ | |
750 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
751 | "DFI LanParty", STAC_REF), | |
e7377071 | 752 | /* Dell laptops have BIOS problem */ |
dfe495d0 TI |
753 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8, |
754 | "unknown Dell", STAC_9200_DELL_D21), | |
f5fcc13c | 755 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, |
dfe495d0 TI |
756 | "Dell Inspiron 630m", STAC_9200_DELL_M21), |
757 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd, | |
758 | "Dell Inspiron E1505n", STAC_9200_DELL_M25), | |
759 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0, | |
760 | "unknown Dell", STAC_9200_DELL_D22), | |
761 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1, | |
762 | "unknown Dell", STAC_9200_DELL_D22), | |
f5fcc13c | 763 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, |
dfe495d0 TI |
764 | "Dell Latitude D620", STAC_9200_DELL_M22), |
765 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5, | |
766 | "unknown Dell", STAC_9200_DELL_D23), | |
767 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7, | |
768 | "unknown Dell", STAC_9200_DELL_D23), | |
769 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8, | |
770 | "unknown Dell", STAC_9200_DELL_M22), | |
771 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9, | |
772 | "unknown Dell", STAC_9200_DELL_M24), | |
773 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca, | |
774 | "unknown Dell", STAC_9200_DELL_M24), | |
f5fcc13c | 775 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, |
dfe495d0 | 776 | "Dell Latitude 120L", STAC_9200_DELL_M24), |
877b866d | 777 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, |
dfe495d0 | 778 | "Dell Latitude D820", STAC_9200_DELL_M22), |
46f02ca3 | 779 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, |
dfe495d0 | 780 | "Dell Inspiron E1705/9400", STAC_9200_DELL_M27), |
46f02ca3 | 781 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, |
dfe495d0 | 782 | "Dell XPS M1710", STAC_9200_DELL_M23), |
f0f96745 | 783 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, |
dfe495d0 TI |
784 | "Dell Precision M90", STAC_9200_DELL_M23), |
785 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3, | |
786 | "unknown Dell", STAC_9200_DELL_M22), | |
787 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4, | |
788 | "unknown Dell", STAC_9200_DELL_M22), | |
8286c53e | 789 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, |
dfe495d0 | 790 | "unknown Dell", STAC_9200_DELL_M22), |
49c605db | 791 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, |
dfe495d0 TI |
792 | "Dell Inspiron 640m", STAC_9200_DELL_M21), |
793 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9, | |
794 | "unknown Dell", STAC_9200_DELL_D23), | |
795 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da, | |
796 | "unknown Dell", STAC_9200_DELL_D23), | |
797 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de, | |
798 | "unknown Dell", STAC_9200_DELL_D21), | |
799 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3, | |
800 | "unknown Dell", STAC_9200_DELL_D23), | |
801 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8, | |
802 | "unknown Dell", STAC_9200_DELL_D21), | |
803 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee, | |
804 | "unknown Dell", STAC_9200_DELL_M25), | |
805 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef, | |
806 | "unknown Dell", STAC_9200_DELL_M25), | |
49c605db | 807 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, |
dfe495d0 TI |
808 | "Dell Inspiron 1501", STAC_9200_DELL_M26), |
809 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6, | |
810 | "unknown Dell", STAC_9200_DELL_M26), | |
49c605db TD |
811 | /* Panasonic */ |
812 | SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF), | |
1194b5b7 TI |
813 | /* Gateway machines needs EAPD to be set on resume */ |
814 | SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY), | |
815 | SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", | |
816 | STAC_9200_GATEWAY), | |
817 | SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", | |
818 | STAC_9200_GATEWAY), | |
403d1944 MP |
819 | {} /* terminator */ |
820 | }; | |
821 | ||
8e21c34c TD |
822 | static unsigned int ref925x_pin_configs[8] = { |
823 | 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021, | |
824 | 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e, | |
825 | }; | |
826 | ||
827 | static unsigned int stac925x_MA6_pin_configs[8] = { | |
828 | 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021, | |
829 | 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e, | |
830 | }; | |
831 | ||
2c11f955 TD |
832 | static unsigned int stac925x_PA6_pin_configs[8] = { |
833 | 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021, | |
834 | 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e, | |
835 | }; | |
836 | ||
8e21c34c | 837 | static unsigned int stac925xM2_2_pin_configs[8] = { |
7353e14d SL |
838 | 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020, |
839 | 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e, | |
8e21c34c TD |
840 | }; |
841 | ||
842 | static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = { | |
843 | [STAC_REF] = ref925x_pin_configs, | |
844 | [STAC_M2_2] = stac925xM2_2_pin_configs, | |
845 | [STAC_MA6] = stac925x_MA6_pin_configs, | |
2c11f955 | 846 | [STAC_PA6] = stac925x_PA6_pin_configs, |
8e21c34c TD |
847 | }; |
848 | ||
849 | static const char *stac925x_models[STAC_925x_MODELS] = { | |
850 | [STAC_REF] = "ref", | |
851 | [STAC_M2_2] = "m2-2", | |
852 | [STAC_MA6] = "m6", | |
2c11f955 | 853 | [STAC_PA6] = "pa6", |
8e21c34c TD |
854 | }; |
855 | ||
856 | static struct snd_pci_quirk stac925x_cfg_tbl[] = { | |
857 | /* SigmaTel reference board */ | |
858 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), | |
2c11f955 | 859 | SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF), |
8e21c34c TD |
860 | SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF), |
861 | SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF), | |
862 | SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6), | |
2c11f955 | 863 | SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6), |
8e21c34c TD |
864 | SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2), |
865 | {} /* terminator */ | |
866 | }; | |
867 | ||
e035b841 MR |
868 | static unsigned int ref92hd71bxx_pin_configs[10] = { |
869 | 0x02214030, 0x02a19040, 0x01a19020, 0x01014010, | |
870 | 0x0181302e, 0x01114010, 0x01a19020, 0x90a000f0, | |
871 | 0x90a000f0, 0x01452050, | |
872 | }; | |
873 | ||
874 | static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = { | |
875 | [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs, | |
876 | }; | |
877 | ||
878 | static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = { | |
879 | [STAC_92HD71BXX_REF] = "ref", | |
880 | }; | |
881 | ||
882 | static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = { | |
883 | /* SigmaTel reference board */ | |
884 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
885 | "DFI LanParty", STAC_92HD71BXX_REF), | |
886 | {} /* terminator */ | |
887 | }; | |
888 | ||
403d1944 MP |
889 | static unsigned int ref922x_pin_configs[10] = { |
890 | 0x01014010, 0x01016011, 0x01012012, 0x0221401f, | |
891 | 0x01813122, 0x01011014, 0x01441030, 0x01c41030, | |
2f2f4251 M |
892 | 0x40000100, 0x40000100, |
893 | }; | |
894 | ||
dfe495d0 TI |
895 | /* |
896 | STAC 922X pin configs for | |
897 | 102801A7 | |
898 | 102801AB | |
899 | 102801A9 | |
900 | 102801D1 | |
901 | 102801D2 | |
902 | */ | |
903 | static unsigned int dell_922x_d81_pin_configs[10] = { | |
904 | 0x02214030, 0x01a19021, 0x01111012, 0x01114010, | |
905 | 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1, | |
906 | 0x01813122, 0x400001f2, | |
907 | }; | |
908 | ||
909 | /* | |
910 | STAC 922X pin configs for | |
911 | 102801AC | |
912 | 102801D0 | |
913 | */ | |
914 | static unsigned int dell_922x_d82_pin_configs[10] = { | |
915 | 0x02214030, 0x01a19021, 0x01111012, 0x01114010, | |
916 | 0x02a19020, 0x01117011, 0x01451140, 0x400001f0, | |
917 | 0x01813122, 0x400001f1, | |
918 | }; | |
919 | ||
920 | /* | |
921 | STAC 922X pin configs for | |
922 | 102801BF | |
923 | */ | |
924 | static unsigned int dell_922x_m81_pin_configs[10] = { | |
925 | 0x0321101f, 0x01112024, 0x01111222, 0x91174220, | |
926 | 0x03a11050, 0x01116221, 0x90a70330, 0x01452340, | |
927 | 0x40C003f1, 0x405003f0, | |
928 | }; | |
929 | ||
930 | /* | |
931 | STAC 9221 A1 pin configs for | |
932 | 102801D7 (Dell XPS M1210) | |
933 | */ | |
934 | static unsigned int dell_922x_m82_pin_configs[10] = { | |
7f9310c1 JZ |
935 | 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310, |
936 | 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2, | |
dfe495d0 TI |
937 | 0x508003f3, 0x405003f4, |
938 | }; | |
939 | ||
403d1944 | 940 | static unsigned int d945gtp3_pin_configs[10] = { |
869264c4 | 941 | 0x0221401f, 0x01a19022, 0x01813021, 0x01014010, |
403d1944 MP |
942 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, |
943 | 0x02a19120, 0x40000100, | |
944 | }; | |
945 | ||
946 | static unsigned int d945gtp5_pin_configs[10] = { | |
869264c4 MP |
947 | 0x0221401f, 0x01011012, 0x01813024, 0x01014010, |
948 | 0x01a19021, 0x01016011, 0x01452130, 0x40000100, | |
403d1944 MP |
949 | 0x02a19320, 0x40000100, |
950 | }; | |
951 | ||
5d5d3bc3 IZ |
952 | static unsigned int intel_mac_v1_pin_configs[10] = { |
953 | 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd, | |
954 | 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240, | |
955 | 0x400000fc, 0x400000fb, | |
956 | }; | |
957 | ||
958 | static unsigned int intel_mac_v2_pin_configs[10] = { | |
959 | 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd, | |
960 | 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa, | |
961 | 0x400000fc, 0x400000fb, | |
6f0778d8 NB |
962 | }; |
963 | ||
5d5d3bc3 IZ |
964 | static unsigned int intel_mac_v3_pin_configs[10] = { |
965 | 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd, | |
966 | 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240, | |
3fc24d85 TI |
967 | 0x400000fc, 0x400000fb, |
968 | }; | |
969 | ||
5d5d3bc3 IZ |
970 | static unsigned int intel_mac_v4_pin_configs[10] = { |
971 | 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f, | |
972 | 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240, | |
f16928fb SF |
973 | 0x400000fc, 0x400000fb, |
974 | }; | |
975 | ||
5d5d3bc3 IZ |
976 | static unsigned int intel_mac_v5_pin_configs[10] = { |
977 | 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f, | |
978 | 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240, | |
979 | 0x400000fc, 0x400000fb, | |
0dae0f83 TI |
980 | }; |
981 | ||
76c08828 | 982 | |
19039bd0 | 983 | static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = { |
f5fcc13c | 984 | [STAC_D945_REF] = ref922x_pin_configs, |
19039bd0 TI |
985 | [STAC_D945GTP3] = d945gtp3_pin_configs, |
986 | [STAC_D945GTP5] = d945gtp5_pin_configs, | |
5d5d3bc3 IZ |
987 | [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs, |
988 | [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs, | |
989 | [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs, | |
990 | [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs, | |
991 | [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs, | |
dfe495d0 | 992 | /* for backward compatibility */ |
5d5d3bc3 IZ |
993 | [STAC_MACMINI] = intel_mac_v3_pin_configs, |
994 | [STAC_MACBOOK] = intel_mac_v5_pin_configs, | |
995 | [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs, | |
996 | [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs, | |
997 | [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs, | |
998 | [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs, | |
dfe495d0 TI |
999 | [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs, |
1000 | [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs, | |
1001 | [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs, | |
1002 | [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs, | |
403d1944 MP |
1003 | }; |
1004 | ||
f5fcc13c TI |
1005 | static const char *stac922x_models[STAC_922X_MODELS] = { |
1006 | [STAC_D945_REF] = "ref", | |
1007 | [STAC_D945GTP5] = "5stack", | |
1008 | [STAC_D945GTP3] = "3stack", | |
5d5d3bc3 IZ |
1009 | [STAC_INTEL_MAC_V1] = "intel-mac-v1", |
1010 | [STAC_INTEL_MAC_V2] = "intel-mac-v2", | |
1011 | [STAC_INTEL_MAC_V3] = "intel-mac-v3", | |
1012 | [STAC_INTEL_MAC_V4] = "intel-mac-v4", | |
1013 | [STAC_INTEL_MAC_V5] = "intel-mac-v5", | |
dfe495d0 | 1014 | /* for backward compatibility */ |
f5fcc13c | 1015 | [STAC_MACMINI] = "macmini", |
3fc24d85 | 1016 | [STAC_MACBOOK] = "macbook", |
6f0778d8 NB |
1017 | [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1", |
1018 | [STAC_MACBOOK_PRO_V2] = "macbook-pro", | |
f16928fb | 1019 | [STAC_IMAC_INTEL] = "imac-intel", |
0dae0f83 | 1020 | [STAC_IMAC_INTEL_20] = "imac-intel-20", |
dfe495d0 TI |
1021 | [STAC_922X_DELL_D81] = "dell-d81", |
1022 | [STAC_922X_DELL_D82] = "dell-d82", | |
1023 | [STAC_922X_DELL_M81] = "dell-m81", | |
1024 | [STAC_922X_DELL_M82] = "dell-m82", | |
f5fcc13c TI |
1025 | }; |
1026 | ||
1027 | static struct snd_pci_quirk stac922x_cfg_tbl[] = { | |
1028 | /* SigmaTel reference board */ | |
1029 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1030 | "DFI LanParty", STAC_D945_REF), | |
1031 | /* Intel 945G based systems */ | |
1032 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101, | |
1033 | "Intel D945G", STAC_D945GTP3), | |
1034 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202, | |
1035 | "Intel D945G", STAC_D945GTP3), | |
1036 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606, | |
1037 | "Intel D945G", STAC_D945GTP3), | |
1038 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601, | |
1039 | "Intel D945G", STAC_D945GTP3), | |
1040 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111, | |
1041 | "Intel D945G", STAC_D945GTP3), | |
1042 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115, | |
1043 | "Intel D945G", STAC_D945GTP3), | |
1044 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116, | |
1045 | "Intel D945G", STAC_D945GTP3), | |
1046 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117, | |
1047 | "Intel D945G", STAC_D945GTP3), | |
1048 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118, | |
1049 | "Intel D945G", STAC_D945GTP3), | |
1050 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119, | |
1051 | "Intel D945G", STAC_D945GTP3), | |
1052 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826, | |
1053 | "Intel D945G", STAC_D945GTP3), | |
1054 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049, | |
1055 | "Intel D945G", STAC_D945GTP3), | |
1056 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055, | |
1057 | "Intel D945G", STAC_D945GTP3), | |
1058 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048, | |
1059 | "Intel D945G", STAC_D945GTP3), | |
1060 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110, | |
1061 | "Intel D945G", STAC_D945GTP3), | |
1062 | /* Intel D945G 5-stack systems */ | |
1063 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404, | |
1064 | "Intel D945G", STAC_D945GTP5), | |
1065 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303, | |
1066 | "Intel D945G", STAC_D945GTP5), | |
1067 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013, | |
1068 | "Intel D945G", STAC_D945GTP5), | |
1069 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417, | |
1070 | "Intel D945G", STAC_D945GTP5), | |
1071 | /* Intel 945P based systems */ | |
1072 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b, | |
1073 | "Intel D945P", STAC_D945GTP3), | |
1074 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112, | |
1075 | "Intel D945P", STAC_D945GTP3), | |
1076 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d, | |
1077 | "Intel D945P", STAC_D945GTP3), | |
1078 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909, | |
1079 | "Intel D945P", STAC_D945GTP3), | |
1080 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505, | |
1081 | "Intel D945P", STAC_D945GTP3), | |
1082 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707, | |
1083 | "Intel D945P", STAC_D945GTP5), | |
1084 | /* other systems */ | |
1085 | /* Apple Mac Mini (early 2006) */ | |
1086 | SND_PCI_QUIRK(0x8384, 0x7680, | |
5d5d3bc3 | 1087 | "Mac Mini", STAC_INTEL_MAC_V3), |
dfe495d0 TI |
1088 | /* Dell systems */ |
1089 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7, | |
1090 | "unknown Dell", STAC_922X_DELL_D81), | |
1091 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9, | |
1092 | "unknown Dell", STAC_922X_DELL_D81), | |
1093 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab, | |
1094 | "unknown Dell", STAC_922X_DELL_D81), | |
1095 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac, | |
1096 | "unknown Dell", STAC_922X_DELL_D82), | |
1097 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf, | |
1098 | "unknown Dell", STAC_922X_DELL_M81), | |
1099 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0, | |
1100 | "unknown Dell", STAC_922X_DELL_D82), | |
1101 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1, | |
1102 | "unknown Dell", STAC_922X_DELL_D81), | |
1103 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2, | |
1104 | "unknown Dell", STAC_922X_DELL_D81), | |
1105 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7, | |
1106 | "Dell XPS M1210", STAC_922X_DELL_M82), | |
403d1944 MP |
1107 | {} /* terminator */ |
1108 | }; | |
1109 | ||
3cc08dc6 | 1110 | static unsigned int ref927x_pin_configs[14] = { |
93ed1503 TD |
1111 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, |
1112 | 0x01a19040, 0x01011012, 0x01016011, 0x0101201f, | |
1113 | 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070, | |
1114 | 0x01c42190, 0x40000100, | |
3cc08dc6 MP |
1115 | }; |
1116 | ||
93ed1503 | 1117 | static unsigned int d965_3st_pin_configs[14] = { |
81d3dbde TD |
1118 | 0x0221401f, 0x02a19120, 0x40000100, 0x01014011, |
1119 | 0x01a19021, 0x01813024, 0x40000100, 0x40000100, | |
1120 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, | |
1121 | 0x40000100, 0x40000100 | |
1122 | }; | |
1123 | ||
93ed1503 TD |
1124 | static unsigned int d965_5st_pin_configs[14] = { |
1125 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, | |
1126 | 0x01a19040, 0x01011012, 0x01016011, 0x40000100, | |
1127 | 0x40000100, 0x40000100, 0x40000100, 0x01442070, | |
1128 | 0x40000100, 0x40000100 | |
1129 | }; | |
1130 | ||
4ff076e5 TD |
1131 | static unsigned int dell_3st_pin_configs[14] = { |
1132 | 0x02211230, 0x02a11220, 0x01a19040, 0x01114210, | |
1133 | 0x01111212, 0x01116211, 0x01813050, 0x01112214, | |
1134 | 0x403003fa, 0x40000100, 0x40000100, 0x404003fb, | |
1135 | 0x40c003fc, 0x40000100 | |
1136 | }; | |
1137 | ||
93ed1503 | 1138 | static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = { |
f5fcc13c | 1139 | [STAC_D965_REF] = ref927x_pin_configs, |
93ed1503 TD |
1140 | [STAC_D965_3ST] = d965_3st_pin_configs, |
1141 | [STAC_D965_5ST] = d965_5st_pin_configs, | |
4ff076e5 | 1142 | [STAC_DELL_3ST] = dell_3st_pin_configs, |
3cc08dc6 MP |
1143 | }; |
1144 | ||
f5fcc13c TI |
1145 | static const char *stac927x_models[STAC_927X_MODELS] = { |
1146 | [STAC_D965_REF] = "ref", | |
1147 | [STAC_D965_3ST] = "3stack", | |
1148 | [STAC_D965_5ST] = "5stack", | |
4ff076e5 | 1149 | [STAC_DELL_3ST] = "dell-3stack", |
f5fcc13c TI |
1150 | }; |
1151 | ||
1152 | static struct snd_pci_quirk stac927x_cfg_tbl[] = { | |
1153 | /* SigmaTel reference board */ | |
1154 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1155 | "DFI LanParty", STAC_D965_REF), | |
81d3dbde | 1156 | /* Intel 946 based systems */ |
f5fcc13c TI |
1157 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST), |
1158 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST), | |
93ed1503 | 1159 | /* 965 based 3 stack systems */ |
f5fcc13c TI |
1160 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST), |
1161 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST), | |
1162 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST), | |
1163 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST), | |
1164 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST), | |
1165 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST), | |
1166 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST), | |
1167 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST), | |
1168 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST), | |
1169 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST), | |
1170 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST), | |
1171 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST), | |
1172 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST), | |
1173 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST), | |
1174 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST), | |
1175 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST), | |
5e915bb3 | 1176 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_D965_3ST), |
4ff076e5 | 1177 | /* Dell 3 stack systems */ |
dfe495d0 | 1178 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST), |
4ff076e5 TD |
1179 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST), |
1180 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST), | |
93ed1503 | 1181 | /* 965 based 5 stack systems */ |
5e915bb3 | 1182 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_D965_5ST), |
f5fcc13c TI |
1183 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST), |
1184 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST), | |
1185 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST), | |
1186 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST), | |
1187 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST), | |
1188 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST), | |
1189 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST), | |
1190 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST), | |
1191 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST), | |
3cc08dc6 MP |
1192 | {} /* terminator */ |
1193 | }; | |
1194 | ||
f3302a59 MP |
1195 | static unsigned int ref9205_pin_configs[12] = { |
1196 | 0x40000100, 0x40000100, 0x01016011, 0x01014010, | |
8b65727b MP |
1197 | 0x01813122, 0x01a19021, 0x40000100, 0x40000100, |
1198 | 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030 | |
f3302a59 MP |
1199 | }; |
1200 | ||
dfe495d0 TI |
1201 | /* |
1202 | STAC 9205 pin configs for | |
1203 | 102801F1 | |
1204 | 102801F2 | |
1205 | 102801FC | |
1206 | 102801FD | |
1207 | 10280204 | |
1208 | 1028021F | |
1209 | */ | |
1210 | static unsigned int dell_9205_m42_pin_configs[12] = { | |
1211 | 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310, | |
1212 | 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9, | |
1213 | 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE, | |
1214 | }; | |
1215 | ||
1216 | /* | |
1217 | STAC 9205 pin configs for | |
1218 | 102801F9 | |
1219 | 102801FA | |
1220 | 102801FE | |
1221 | 102801FF (Dell Precision M4300) | |
1222 | 10280206 | |
1223 | 10280200 | |
1224 | 10280201 | |
1225 | */ | |
1226 | static unsigned int dell_9205_m43_pin_configs[12] = { | |
ae0a8ed8 TD |
1227 | 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310, |
1228 | 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9, | |
1229 | 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8, | |
1230 | }; | |
1231 | ||
dfe495d0 | 1232 | static unsigned int dell_9205_m44_pin_configs[12] = { |
ae0a8ed8 TD |
1233 | 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310, |
1234 | 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9, | |
1235 | 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe, | |
1236 | }; | |
1237 | ||
f5fcc13c | 1238 | static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = { |
ae0a8ed8 | 1239 | [STAC_9205_REF] = ref9205_pin_configs, |
dfe495d0 TI |
1240 | [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs, |
1241 | [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs, | |
1242 | [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs, | |
f3302a59 MP |
1243 | }; |
1244 | ||
f5fcc13c TI |
1245 | static const char *stac9205_models[STAC_9205_MODELS] = { |
1246 | [STAC_9205_REF] = "ref", | |
dfe495d0 | 1247 | [STAC_9205_DELL_M42] = "dell-m42", |
ae0a8ed8 TD |
1248 | [STAC_9205_DELL_M43] = "dell-m43", |
1249 | [STAC_9205_DELL_M44] = "dell-m44", | |
f5fcc13c TI |
1250 | }; |
1251 | ||
1252 | static struct snd_pci_quirk stac9205_cfg_tbl[] = { | |
1253 | /* SigmaTel reference board */ | |
1254 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | |
1255 | "DFI LanParty", STAC_9205_REF), | |
dfe495d0 TI |
1256 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, |
1257 | "unknown Dell", STAC_9205_DELL_M42), | |
1258 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, | |
1259 | "unknown Dell", STAC_9205_DELL_M42), | |
ae0a8ed8 | 1260 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8, |
b44ef2f1 MR |
1261 | "Dell Precision", STAC_9205_DELL_M43), |
1262 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c, | |
1263 | "Dell Precision", STAC_9205_DELL_M43), | |
ae0a8ed8 TD |
1264 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9, |
1265 | "Dell Precision", STAC_9205_DELL_M43), | |
e45e459e MR |
1266 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b, |
1267 | "Dell Precision", STAC_9205_DELL_M43), | |
ae0a8ed8 TD |
1268 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa, |
1269 | "Dell Precision", STAC_9205_DELL_M43), | |
dfe495d0 TI |
1270 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, |
1271 | "unknown Dell", STAC_9205_DELL_M42), | |
1272 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, | |
1273 | "unknown Dell", STAC_9205_DELL_M42), | |
ae0a8ed8 TD |
1274 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe, |
1275 | "Dell Precision", STAC_9205_DELL_M43), | |
1276 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff, | |
dfe495d0 | 1277 | "Dell Precision M4300", STAC_9205_DELL_M43), |
ae0a8ed8 TD |
1278 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206, |
1279 | "Dell Precision", STAC_9205_DELL_M43), | |
1280 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, | |
1281 | "Dell Inspiron", STAC_9205_DELL_M44), | |
1282 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, | |
1283 | "Dell Inspiron", STAC_9205_DELL_M44), | |
1284 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, | |
1285 | "Dell Inspiron", STAC_9205_DELL_M44), | |
1286 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, | |
1287 | "Dell Inspiron", STAC_9205_DELL_M44), | |
dfe495d0 TI |
1288 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204, |
1289 | "unknown Dell", STAC_9205_DELL_M42), | |
ae0a8ed8 TD |
1290 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f, |
1291 | "Dell Inspiron", STAC_9205_DELL_M44), | |
f3302a59 MP |
1292 | {} /* terminator */ |
1293 | }; | |
1294 | ||
11b44bbd RF |
1295 | static int stac92xx_save_bios_config_regs(struct hda_codec *codec) |
1296 | { | |
1297 | int i; | |
1298 | struct sigmatel_spec *spec = codec->spec; | |
1299 | ||
1300 | if (! spec->bios_pin_configs) { | |
1301 | spec->bios_pin_configs = kcalloc(spec->num_pins, | |
1302 | sizeof(*spec->bios_pin_configs), GFP_KERNEL); | |
1303 | if (! spec->bios_pin_configs) | |
1304 | return -ENOMEM; | |
1305 | } | |
1306 | ||
1307 | for (i = 0; i < spec->num_pins; i++) { | |
1308 | hda_nid_t nid = spec->pin_nids[i]; | |
1309 | unsigned int pin_cfg; | |
1310 | ||
1311 | pin_cfg = snd_hda_codec_read(codec, nid, 0, | |
1312 | AC_VERB_GET_CONFIG_DEFAULT, 0x00); | |
1313 | snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n", | |
1314 | nid, pin_cfg); | |
1315 | spec->bios_pin_configs[i] = pin_cfg; | |
1316 | } | |
1317 | ||
1318 | return 0; | |
1319 | } | |
1320 | ||
87d48363 MR |
1321 | static void stac92xx_set_config_reg(struct hda_codec *codec, |
1322 | hda_nid_t pin_nid, unsigned int pin_config) | |
1323 | { | |
1324 | int i; | |
1325 | snd_hda_codec_write(codec, pin_nid, 0, | |
1326 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_0, | |
1327 | pin_config & 0x000000ff); | |
1328 | snd_hda_codec_write(codec, pin_nid, 0, | |
1329 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_1, | |
1330 | (pin_config & 0x0000ff00) >> 8); | |
1331 | snd_hda_codec_write(codec, pin_nid, 0, | |
1332 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_2, | |
1333 | (pin_config & 0x00ff0000) >> 16); | |
1334 | snd_hda_codec_write(codec, pin_nid, 0, | |
1335 | AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, | |
1336 | pin_config >> 24); | |
1337 | i = snd_hda_codec_read(codec, pin_nid, 0, | |
1338 | AC_VERB_GET_CONFIG_DEFAULT, | |
1339 | 0x00); | |
1340 | snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n", | |
1341 | pin_nid, i); | |
1342 | } | |
1343 | ||
2f2f4251 M |
1344 | static void stac92xx_set_config_regs(struct hda_codec *codec) |
1345 | { | |
1346 | int i; | |
1347 | struct sigmatel_spec *spec = codec->spec; | |
2f2f4251 | 1348 | |
87d48363 MR |
1349 | if (!spec->pin_configs) |
1350 | return; | |
11b44bbd | 1351 | |
87d48363 MR |
1352 | for (i = 0; i < spec->num_pins; i++) |
1353 | stac92xx_set_config_reg(codec, spec->pin_nids[i], | |
1354 | spec->pin_configs[i]); | |
2f2f4251 | 1355 | } |
2f2f4251 | 1356 | |
8259980e | 1357 | static void stac92xx_enable_gpio_mask(struct hda_codec *codec) |
92a22beb | 1358 | { |
8259980e | 1359 | struct sigmatel_spec *spec = codec->spec; |
87d48363 | 1360 | /* Configure GPIOx as output */ |
82beb8fd TI |
1361 | snd_hda_codec_write_cache(codec, codec->afg, 0, |
1362 | AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask); | |
87d48363 | 1363 | /* Configure GPIOx as CMOS */ |
82beb8fd | 1364 | snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000); |
87d48363 | 1365 | /* Assert GPIOx */ |
82beb8fd TI |
1366 | snd_hda_codec_write_cache(codec, codec->afg, 0, |
1367 | AC_VERB_SET_GPIO_DATA, spec->gpio_data); | |
87d48363 | 1368 | /* Enable GPIOx */ |
82beb8fd TI |
1369 | snd_hda_codec_write_cache(codec, codec->afg, 0, |
1370 | AC_VERB_SET_GPIO_MASK, spec->gpio_mask); | |
92a22beb MR |
1371 | } |
1372 | ||
dabbed6f | 1373 | /* |
c7d4b2fa | 1374 | * Analog playback callbacks |
dabbed6f | 1375 | */ |
c7d4b2fa M |
1376 | static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo, |
1377 | struct hda_codec *codec, | |
c8b6bf9b | 1378 | struct snd_pcm_substream *substream) |
2f2f4251 | 1379 | { |
dabbed6f | 1380 | struct sigmatel_spec *spec = codec->spec; |
c7d4b2fa | 1381 | return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream); |
2f2f4251 M |
1382 | } |
1383 | ||
2f2f4251 M |
1384 | static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo, |
1385 | struct hda_codec *codec, | |
1386 | unsigned int stream_tag, | |
1387 | unsigned int format, | |
c8b6bf9b | 1388 | struct snd_pcm_substream *substream) |
2f2f4251 M |
1389 | { |
1390 | struct sigmatel_spec *spec = codec->spec; | |
403d1944 | 1391 | return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream); |
2f2f4251 M |
1392 | } |
1393 | ||
1394 | static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, | |
1395 | struct hda_codec *codec, | |
c8b6bf9b | 1396 | struct snd_pcm_substream *substream) |
2f2f4251 M |
1397 | { |
1398 | struct sigmatel_spec *spec = codec->spec; | |
1399 | return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout); | |
1400 | } | |
1401 | ||
dabbed6f M |
1402 | /* |
1403 | * Digital playback callbacks | |
1404 | */ | |
1405 | static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo, | |
1406 | struct hda_codec *codec, | |
c8b6bf9b | 1407 | struct snd_pcm_substream *substream) |
dabbed6f M |
1408 | { |
1409 | struct sigmatel_spec *spec = codec->spec; | |
1410 | return snd_hda_multi_out_dig_open(codec, &spec->multiout); | |
1411 | } | |
1412 | ||
1413 | static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo, | |
1414 | struct hda_codec *codec, | |
c8b6bf9b | 1415 | struct snd_pcm_substream *substream) |
dabbed6f M |
1416 | { |
1417 | struct sigmatel_spec *spec = codec->spec; | |
1418 | return snd_hda_multi_out_dig_close(codec, &spec->multiout); | |
1419 | } | |
1420 | ||
6b97eb45 TI |
1421 | static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo, |
1422 | struct hda_codec *codec, | |
1423 | unsigned int stream_tag, | |
1424 | unsigned int format, | |
1425 | struct snd_pcm_substream *substream) | |
1426 | { | |
1427 | struct sigmatel_spec *spec = codec->spec; | |
1428 | return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, | |
1429 | stream_tag, format, substream); | |
1430 | } | |
1431 | ||
dabbed6f | 1432 | |
2f2f4251 M |
1433 | /* |
1434 | * Analog capture callbacks | |
1435 | */ | |
1436 | static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo, | |
1437 | struct hda_codec *codec, | |
1438 | unsigned int stream_tag, | |
1439 | unsigned int format, | |
c8b6bf9b | 1440 | struct snd_pcm_substream *substream) |
2f2f4251 M |
1441 | { |
1442 | struct sigmatel_spec *spec = codec->spec; | |
1443 | ||
1444 | snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], | |
1445 | stream_tag, 0, format); | |
1446 | return 0; | |
1447 | } | |
1448 | ||
1449 | static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo, | |
1450 | struct hda_codec *codec, | |
c8b6bf9b | 1451 | struct snd_pcm_substream *substream) |
2f2f4251 M |
1452 | { |
1453 | struct sigmatel_spec *spec = codec->spec; | |
1454 | ||
1455 | snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0); | |
1456 | return 0; | |
1457 | } | |
1458 | ||
dabbed6f M |
1459 | static struct hda_pcm_stream stac92xx_pcm_digital_playback = { |
1460 | .substreams = 1, | |
1461 | .channels_min = 2, | |
1462 | .channels_max = 2, | |
1463 | /* NID is set in stac92xx_build_pcms */ | |
1464 | .ops = { | |
1465 | .open = stac92xx_dig_playback_pcm_open, | |
6b97eb45 TI |
1466 | .close = stac92xx_dig_playback_pcm_close, |
1467 | .prepare = stac92xx_dig_playback_pcm_prepare | |
dabbed6f M |
1468 | }, |
1469 | }; | |
1470 | ||
1471 | static struct hda_pcm_stream stac92xx_pcm_digital_capture = { | |
1472 | .substreams = 1, | |
1473 | .channels_min = 2, | |
1474 | .channels_max = 2, | |
1475 | /* NID is set in stac92xx_build_pcms */ | |
1476 | }; | |
1477 | ||
2f2f4251 M |
1478 | static struct hda_pcm_stream stac92xx_pcm_analog_playback = { |
1479 | .substreams = 1, | |
1480 | .channels_min = 2, | |
c7d4b2fa | 1481 | .channels_max = 8, |
2f2f4251 M |
1482 | .nid = 0x02, /* NID to query formats and rates */ |
1483 | .ops = { | |
1484 | .open = stac92xx_playback_pcm_open, | |
1485 | .prepare = stac92xx_playback_pcm_prepare, | |
1486 | .cleanup = stac92xx_playback_pcm_cleanup | |
1487 | }, | |
1488 | }; | |
1489 | ||
3cc08dc6 MP |
1490 | static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = { |
1491 | .substreams = 1, | |
1492 | .channels_min = 2, | |
1493 | .channels_max = 2, | |
1494 | .nid = 0x06, /* NID to query formats and rates */ | |
1495 | .ops = { | |
1496 | .open = stac92xx_playback_pcm_open, | |
1497 | .prepare = stac92xx_playback_pcm_prepare, | |
1498 | .cleanup = stac92xx_playback_pcm_cleanup | |
1499 | }, | |
1500 | }; | |
1501 | ||
2f2f4251 | 1502 | static struct hda_pcm_stream stac92xx_pcm_analog_capture = { |
2f2f4251 M |
1503 | .channels_min = 2, |
1504 | .channels_max = 2, | |
9e05b7a3 | 1505 | /* NID + .substreams is set in stac92xx_build_pcms */ |
2f2f4251 M |
1506 | .ops = { |
1507 | .prepare = stac92xx_capture_pcm_prepare, | |
1508 | .cleanup = stac92xx_capture_pcm_cleanup | |
1509 | }, | |
1510 | }; | |
1511 | ||
1512 | static int stac92xx_build_pcms(struct hda_codec *codec) | |
1513 | { | |
1514 | struct sigmatel_spec *spec = codec->spec; | |
1515 | struct hda_pcm *info = spec->pcm_rec; | |
1516 | ||
1517 | codec->num_pcms = 1; | |
1518 | codec->pcm_info = info; | |
1519 | ||
c7d4b2fa | 1520 | info->name = "STAC92xx Analog"; |
2f2f4251 | 1521 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback; |
2f2f4251 | 1522 | info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture; |
3cc08dc6 | 1523 | info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0]; |
9e05b7a3 | 1524 | info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs; |
3cc08dc6 MP |
1525 | |
1526 | if (spec->alt_switch) { | |
1527 | codec->num_pcms++; | |
1528 | info++; | |
1529 | info->name = "STAC92xx Analog Alt"; | |
1530 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback; | |
1531 | } | |
2f2f4251 | 1532 | |
dabbed6f M |
1533 | if (spec->multiout.dig_out_nid || spec->dig_in_nid) { |
1534 | codec->num_pcms++; | |
1535 | info++; | |
1536 | info->name = "STAC92xx Digital"; | |
1537 | if (spec->multiout.dig_out_nid) { | |
1538 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback; | |
1539 | info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid; | |
1540 | } | |
1541 | if (spec->dig_in_nid) { | |
1542 | info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture; | |
1543 | info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid; | |
1544 | } | |
1545 | } | |
1546 | ||
2f2f4251 M |
1547 | return 0; |
1548 | } | |
1549 | ||
c960a03b TI |
1550 | static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid) |
1551 | { | |
1552 | unsigned int pincap = snd_hda_param_read(codec, nid, | |
1553 | AC_PAR_PIN_CAP); | |
1554 | pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT; | |
1555 | if (pincap & AC_PINCAP_VREF_100) | |
1556 | return AC_PINCTL_VREF_100; | |
1557 | if (pincap & AC_PINCAP_VREF_80) | |
1558 | return AC_PINCTL_VREF_80; | |
1559 | if (pincap & AC_PINCAP_VREF_50) | |
1560 | return AC_PINCTL_VREF_50; | |
1561 | if (pincap & AC_PINCAP_VREF_GRD) | |
1562 | return AC_PINCTL_VREF_GRD; | |
1563 | return 0; | |
1564 | } | |
1565 | ||
403d1944 MP |
1566 | static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type) |
1567 | ||
1568 | { | |
82beb8fd TI |
1569 | snd_hda_codec_write_cache(codec, nid, 0, |
1570 | AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type); | |
403d1944 MP |
1571 | } |
1572 | ||
a5ce8890 | 1573 | #define stac92xx_io_switch_info snd_ctl_boolean_mono_info |
403d1944 MP |
1574 | |
1575 | static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) | |
1576 | { | |
1577 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
1578 | struct sigmatel_spec *spec = codec->spec; | |
1579 | int io_idx = kcontrol-> private_value & 0xff; | |
1580 | ||
1581 | ucontrol->value.integer.value[0] = spec->io_switch[io_idx]; | |
1582 | return 0; | |
1583 | } | |
1584 | ||
1585 | static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) | |
1586 | { | |
1587 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
1588 | struct sigmatel_spec *spec = codec->spec; | |
1589 | hda_nid_t nid = kcontrol->private_value >> 8; | |
1590 | int io_idx = kcontrol-> private_value & 0xff; | |
1591 | unsigned short val = ucontrol->value.integer.value[0]; | |
1592 | ||
1593 | spec->io_switch[io_idx] = val; | |
1594 | ||
1595 | if (val) | |
1596 | stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN); | |
c960a03b TI |
1597 | else { |
1598 | unsigned int pinctl = AC_PINCTL_IN_EN; | |
1599 | if (io_idx) /* set VREF for mic */ | |
1600 | pinctl |= stac92xx_get_vref(codec, nid); | |
1601 | stac92xx_auto_set_pinctl(codec, nid, pinctl); | |
1602 | } | |
403d1944 MP |
1603 | return 1; |
1604 | } | |
1605 | ||
0fb87bb4 ML |
1606 | #define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info |
1607 | ||
1608 | static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol, | |
1609 | struct snd_ctl_elem_value *ucontrol) | |
1610 | { | |
1611 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
1612 | struct sigmatel_spec *spec = codec->spec; | |
1613 | ||
1614 | ucontrol->value.integer.value[0] = spec->clfe_swap; | |
1615 | return 0; | |
1616 | } | |
1617 | ||
1618 | static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol, | |
1619 | struct snd_ctl_elem_value *ucontrol) | |
1620 | { | |
1621 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | |
1622 | struct sigmatel_spec *spec = codec->spec; | |
1623 | hda_nid_t nid = kcontrol->private_value & 0xff; | |
1624 | ||
1625 | if (spec->clfe_swap == ucontrol->value.integer.value[0]) | |
1626 | return 0; | |
1627 | ||
1628 | spec->clfe_swap = ucontrol->value.integer.value[0]; | |
1629 | ||
1630 | snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE, | |
1631 | spec->clfe_swap ? 0x4 : 0x0); | |
1632 | ||
1633 | return 1; | |
1634 | } | |
1635 | ||
403d1944 MP |
1636 | #define STAC_CODEC_IO_SWITCH(xname, xpval) \ |
1637 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
1638 | .name = xname, \ | |
1639 | .index = 0, \ | |
1640 | .info = stac92xx_io_switch_info, \ | |
1641 | .get = stac92xx_io_switch_get, \ | |
1642 | .put = stac92xx_io_switch_put, \ | |
1643 | .private_value = xpval, \ | |
1644 | } | |
1645 | ||
0fb87bb4 ML |
1646 | #define STAC_CODEC_CLFE_SWITCH(xname, xpval) \ |
1647 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
1648 | .name = xname, \ | |
1649 | .index = 0, \ | |
1650 | .info = stac92xx_clfe_switch_info, \ | |
1651 | .get = stac92xx_clfe_switch_get, \ | |
1652 | .put = stac92xx_clfe_switch_put, \ | |
1653 | .private_value = xpval, \ | |
1654 | } | |
403d1944 | 1655 | |
c7d4b2fa M |
1656 | enum { |
1657 | STAC_CTL_WIDGET_VOL, | |
1658 | STAC_CTL_WIDGET_MUTE, | |
403d1944 | 1659 | STAC_CTL_WIDGET_IO_SWITCH, |
0fb87bb4 | 1660 | STAC_CTL_WIDGET_CLFE_SWITCH |
c7d4b2fa M |
1661 | }; |
1662 | ||
c8b6bf9b | 1663 | static struct snd_kcontrol_new stac92xx_control_templates[] = { |
c7d4b2fa M |
1664 | HDA_CODEC_VOLUME(NULL, 0, 0, 0), |
1665 | HDA_CODEC_MUTE(NULL, 0, 0, 0), | |
403d1944 | 1666 | STAC_CODEC_IO_SWITCH(NULL, 0), |
0fb87bb4 | 1667 | STAC_CODEC_CLFE_SWITCH(NULL, 0), |
c7d4b2fa M |
1668 | }; |
1669 | ||
1670 | /* add dynamic controls */ | |
1671 | static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val) | |
1672 | { | |
c8b6bf9b | 1673 | struct snd_kcontrol_new *knew; |
c7d4b2fa M |
1674 | |
1675 | if (spec->num_kctl_used >= spec->num_kctl_alloc) { | |
1676 | int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC; | |
1677 | ||
1678 | knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */ | |
1679 | if (! knew) | |
1680 | return -ENOMEM; | |
1681 | if (spec->kctl_alloc) { | |
1682 | memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc); | |
1683 | kfree(spec->kctl_alloc); | |
1684 | } | |
1685 | spec->kctl_alloc = knew; | |
1686 | spec->num_kctl_alloc = num; | |
1687 | } | |
1688 | ||
1689 | knew = &spec->kctl_alloc[spec->num_kctl_used]; | |
1690 | *knew = stac92xx_control_templates[type]; | |
82fe0c58 | 1691 | knew->name = kstrdup(name, GFP_KERNEL); |
c7d4b2fa M |
1692 | if (! knew->name) |
1693 | return -ENOMEM; | |
1694 | knew->private_value = val; | |
1695 | spec->num_kctl_used++; | |
1696 | return 0; | |
1697 | } | |
1698 | ||
403d1944 MP |
1699 | /* flag inputs as additional dynamic lineouts */ |
1700 | static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg) | |
1701 | { | |
1702 | struct sigmatel_spec *spec = codec->spec; | |
7b043899 SL |
1703 | unsigned int wcaps, wtype; |
1704 | int i, num_dacs = 0; | |
1705 | ||
1706 | /* use the wcaps cache to count all DACs available for line-outs */ | |
1707 | for (i = 0; i < codec->num_nodes; i++) { | |
1708 | wcaps = codec->wcaps[i]; | |
1709 | wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT; | |
1710 | if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL)) | |
1711 | num_dacs++; | |
1712 | } | |
403d1944 | 1713 | |
7b043899 SL |
1714 | snd_printdd("%s: total dac count=%d\n", __func__, num_dacs); |
1715 | ||
403d1944 MP |
1716 | switch (cfg->line_outs) { |
1717 | case 3: | |
1718 | /* add line-in as side */ | |
7b043899 | 1719 | if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) { |
c480f79b TI |
1720 | cfg->line_out_pins[cfg->line_outs] = |
1721 | cfg->input_pins[AUTO_PIN_LINE]; | |
403d1944 MP |
1722 | spec->line_switch = 1; |
1723 | cfg->line_outs++; | |
1724 | } | |
1725 | break; | |
1726 | case 2: | |
1727 | /* add line-in as clfe and mic as side */ | |
7b043899 | 1728 | if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) { |
c480f79b TI |
1729 | cfg->line_out_pins[cfg->line_outs] = |
1730 | cfg->input_pins[AUTO_PIN_LINE]; | |
403d1944 MP |
1731 | spec->line_switch = 1; |
1732 | cfg->line_outs++; | |
1733 | } | |
7b043899 | 1734 | if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) { |
c480f79b TI |
1735 | cfg->line_out_pins[cfg->line_outs] = |
1736 | cfg->input_pins[AUTO_PIN_MIC]; | |
403d1944 MP |
1737 | spec->mic_switch = 1; |
1738 | cfg->line_outs++; | |
1739 | } | |
1740 | break; | |
1741 | case 1: | |
1742 | /* add line-in as surr and mic as clfe */ | |
7b043899 | 1743 | if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) { |
c480f79b TI |
1744 | cfg->line_out_pins[cfg->line_outs] = |
1745 | cfg->input_pins[AUTO_PIN_LINE]; | |
403d1944 MP |
1746 | spec->line_switch = 1; |
1747 | cfg->line_outs++; | |
1748 | } | |
7b043899 | 1749 | if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) { |
c480f79b TI |
1750 | cfg->line_out_pins[cfg->line_outs] = |
1751 | cfg->input_pins[AUTO_PIN_MIC]; | |
403d1944 MP |
1752 | spec->mic_switch = 1; |
1753 | cfg->line_outs++; | |
1754 | } | |
1755 | break; | |
1756 | } | |
1757 | ||
1758 | return 0; | |
1759 | } | |
1760 | ||
7b043899 SL |
1761 | |
1762 | static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid) | |
1763 | { | |
1764 | int i; | |
1765 | ||
1766 | for (i = 0; i < spec->multiout.num_dacs; i++) { | |
1767 | if (spec->multiout.dac_nids[i] == nid) | |
1768 | return 1; | |
1769 | } | |
1770 | ||
1771 | return 0; | |
1772 | } | |
1773 | ||
3cc08dc6 | 1774 | /* |
7b043899 SL |
1775 | * Fill in the dac_nids table from the parsed pin configuration |
1776 | * This function only works when every pin in line_out_pins[] | |
1777 | * contains atleast one DAC in its connection list. Some 92xx | |
1778 | * codecs are not connected directly to a DAC, such as the 9200 | |
1779 | * and 9202/925x. For those, dac_nids[] must be hard-coded. | |
3cc08dc6 | 1780 | */ |
19039bd0 | 1781 | static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec, |
df802952 | 1782 | struct auto_pin_cfg *cfg) |
c7d4b2fa M |
1783 | { |
1784 | struct sigmatel_spec *spec = codec->spec; | |
7b043899 SL |
1785 | int i, j, conn_len = 0; |
1786 | hda_nid_t nid, conn[HDA_MAX_CONNECTIONS]; | |
1787 | unsigned int wcaps, wtype; | |
1788 | ||
c7d4b2fa M |
1789 | for (i = 0; i < cfg->line_outs; i++) { |
1790 | nid = cfg->line_out_pins[i]; | |
7b043899 SL |
1791 | conn_len = snd_hda_get_connections(codec, nid, conn, |
1792 | HDA_MAX_CONNECTIONS); | |
1793 | for (j = 0; j < conn_len; j++) { | |
1794 | wcaps = snd_hda_param_read(codec, conn[j], | |
1795 | AC_PAR_AUDIO_WIDGET_CAP); | |
1796 | wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT; | |
1797 | ||
1798 | if (wtype != AC_WID_AUD_OUT || | |
1799 | (wcaps & AC_WCAP_DIGITAL)) | |
1800 | continue; | |
1801 | /* conn[j] is a DAC routed to this line-out */ | |
1802 | if (!is_in_dac_nids(spec, conn[j])) | |
1803 | break; | |
1804 | } | |
1805 | ||
1806 | if (j == conn_len) { | |
df802952 TI |
1807 | if (spec->multiout.num_dacs > 0) { |
1808 | /* we have already working output pins, | |
1809 | * so let's drop the broken ones again | |
1810 | */ | |
1811 | cfg->line_outs = spec->multiout.num_dacs; | |
1812 | break; | |
1813 | } | |
7b043899 SL |
1814 | /* error out, no available DAC found */ |
1815 | snd_printk(KERN_ERR | |
1816 | "%s: No available DAC for pin 0x%x\n", | |
1817 | __func__, nid); | |
1818 | return -ENODEV; | |
1819 | } | |
1820 | ||
1821 | spec->multiout.dac_nids[i] = conn[j]; | |
1822 | spec->multiout.num_dacs++; | |
1823 | if (conn_len > 1) { | |
1824 | /* select this DAC in the pin's input mux */ | |
82beb8fd TI |
1825 | snd_hda_codec_write_cache(codec, nid, 0, |
1826 | AC_VERB_SET_CONNECT_SEL, j); | |
c7d4b2fa | 1827 | |
7b043899 SL |
1828 | } |
1829 | } | |
c7d4b2fa | 1830 | |
7b043899 SL |
1831 | snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n", |
1832 | spec->multiout.num_dacs, | |
1833 | spec->multiout.dac_nids[0], | |
1834 | spec->multiout.dac_nids[1], | |
1835 | spec->multiout.dac_nids[2], | |
1836 | spec->multiout.dac_nids[3], | |
1837 | spec->multiout.dac_nids[4]); | |
c7d4b2fa M |
1838 | return 0; |
1839 | } | |
1840 | ||
eb06ed8f TI |
1841 | /* create volume control/switch for the given prefx type */ |
1842 | static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs) | |
1843 | { | |
1844 | char name[32]; | |
1845 | int err; | |
1846 | ||
1847 | sprintf(name, "%s Playback Volume", pfx); | |
1848 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name, | |
1849 | HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT)); | |
1850 | if (err < 0) | |
1851 | return err; | |
1852 | sprintf(name, "%s Playback Switch", pfx); | |
1853 | err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name, | |
1854 | HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT)); | |
1855 | if (err < 0) | |
1856 | return err; | |
1857 | return 0; | |
1858 | } | |
1859 | ||
c7d4b2fa | 1860 | /* add playback controls from the parsed DAC table */ |
0fb87bb4 | 1861 | static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec, |
19039bd0 | 1862 | const struct auto_pin_cfg *cfg) |
c7d4b2fa | 1863 | { |
19039bd0 TI |
1864 | static const char *chname[4] = { |
1865 | "Front", "Surround", NULL /*CLFE*/, "Side" | |
1866 | }; | |
c7d4b2fa M |
1867 | hda_nid_t nid; |
1868 | int i, err; | |
1869 | ||
0fb87bb4 ML |
1870 | struct sigmatel_spec *spec = codec->spec; |
1871 | unsigned int wid_caps; | |
1872 | ||
1873 | ||
c7d4b2fa | 1874 | for (i = 0; i < cfg->line_outs; i++) { |
403d1944 | 1875 | if (!spec->multiout.dac_nids[i]) |
c7d4b2fa M |
1876 | continue; |
1877 | ||
1878 | nid = spec->multiout.dac_nids[i]; | |
1879 | ||
1880 | if (i == 2) { | |
1881 | /* Center/LFE */ | |
eb06ed8f TI |
1882 | err = create_controls(spec, "Center", nid, 1); |
1883 | if (err < 0) | |
c7d4b2fa | 1884 | return err; |
eb06ed8f TI |
1885 | err = create_controls(spec, "LFE", nid, 2); |
1886 | if (err < 0) | |
c7d4b2fa | 1887 | return err; |
0fb87bb4 ML |
1888 | |
1889 | wid_caps = get_wcaps(codec, nid); | |
1890 | ||
1891 | if (wid_caps & AC_WCAP_LR_SWAP) { | |
1892 | err = stac92xx_add_control(spec, | |
1893 | STAC_CTL_WIDGET_CLFE_SWITCH, | |
1894 | "Swap Center/LFE Playback Switch", nid); | |
1895 | ||
1896 | if (err < 0) | |
1897 | return err; | |
1898 | } | |
1899 | ||
c7d4b2fa | 1900 | } else { |
eb06ed8f TI |
1901 | err = create_controls(spec, chname[i], nid, 3); |
1902 | if (err < 0) | |
c7d4b2fa M |
1903 | return err; |
1904 | } | |
1905 | } | |
1906 | ||
403d1944 MP |
1907 | if (spec->line_switch) |
1908 | if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0) | |
1909 | return err; | |
1910 | ||
1911 | if (spec->mic_switch) | |
1912 | if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0) | |
1913 | return err; | |
1914 | ||
c7d4b2fa M |
1915 | return 0; |
1916 | } | |
1917 | ||
eb06ed8f | 1918 | static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid) |
c7d4b2fa | 1919 | { |
7b043899 SL |
1920 | if (is_in_dac_nids(spec, nid)) |
1921 | return 1; | |
eb06ed8f TI |
1922 | if (spec->multiout.hp_nid == nid) |
1923 | return 1; | |
1924 | return 0; | |
1925 | } | |
c7d4b2fa | 1926 | |
eb06ed8f TI |
1927 | static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid) |
1928 | { | |
1929 | if (!spec->multiout.hp_nid) | |
1930 | spec->multiout.hp_nid = nid; | |
1931 | else if (spec->multiout.num_dacs > 4) { | |
1932 | printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid); | |
1933 | return 1; | |
1934 | } else { | |
1935 | spec->multiout.dac_nids[spec->multiout.num_dacs] = nid; | |
1936 | spec->multiout.num_dacs++; | |
1937 | } | |
1938 | return 0; | |
1939 | } | |
4e55096e | 1940 | |
eb06ed8f TI |
1941 | /* add playback controls for Speaker and HP outputs */ |
1942 | static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec, | |
1943 | struct auto_pin_cfg *cfg) | |
1944 | { | |
1945 | struct sigmatel_spec *spec = codec->spec; | |
1946 | hda_nid_t nid; | |
1947 | int i, old_num_dacs, err; | |
1948 | ||
1949 | old_num_dacs = spec->multiout.num_dacs; | |
1950 | for (i = 0; i < cfg->hp_outs; i++) { | |
1951 | unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]); | |
1952 | if (wid_caps & AC_WCAP_UNSOL_CAP) | |
1953 | spec->hp_detect = 1; | |
1954 | nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0, | |
1955 | AC_VERB_GET_CONNECT_LIST, 0) & 0xff; | |
1956 | if (check_in_dac_nids(spec, nid)) | |
1957 | nid = 0; | |
1958 | if (! nid) | |
c7d4b2fa | 1959 | continue; |
eb06ed8f TI |
1960 | add_spec_dacs(spec, nid); |
1961 | } | |
1962 | for (i = 0; i < cfg->speaker_outs; i++) { | |
7b043899 | 1963 | nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0, |
eb06ed8f TI |
1964 | AC_VERB_GET_CONNECT_LIST, 0) & 0xff; |
1965 | if (check_in_dac_nids(spec, nid)) | |
1966 | nid = 0; | |
eb06ed8f TI |
1967 | if (! nid) |
1968 | continue; | |
1969 | add_spec_dacs(spec, nid); | |
c7d4b2fa | 1970 | } |
1b290a51 MR |
1971 | for (i = 0; i < cfg->line_outs; i++) { |
1972 | nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0, | |
1973 | AC_VERB_GET_CONNECT_LIST, 0) & 0xff; | |
1974 | if (check_in_dac_nids(spec, nid)) | |
1975 | nid = 0; | |
1976 | if (! nid) | |
1977 | continue; | |
1978 | add_spec_dacs(spec, nid); | |
1979 | } | |
eb06ed8f TI |
1980 | for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) { |
1981 | static const char *pfxs[] = { | |
1982 | "Speaker", "External Speaker", "Speaker2", | |
1983 | }; | |
1984 | err = create_controls(spec, pfxs[i - old_num_dacs], | |
1985 | spec->multiout.dac_nids[i], 3); | |
1986 | if (err < 0) | |
1987 | return err; | |
1988 | } | |
1989 | if (spec->multiout.hp_nid) { | |
1990 | const char *pfx; | |
6020c008 | 1991 | if (old_num_dacs == spec->multiout.num_dacs) |
eb06ed8f TI |
1992 | pfx = "Master"; |
1993 | else | |
1994 | pfx = "Headphone"; | |
1995 | err = create_controls(spec, pfx, spec->multiout.hp_nid, 3); | |
1996 | if (err < 0) | |
1997 | return err; | |
1998 | } | |
c7d4b2fa M |
1999 | |
2000 | return 0; | |
2001 | } | |
2002 | ||
8b65727b | 2003 | /* labels for dmic mux inputs */ |
ddc2cec4 | 2004 | static const char *stac92xx_dmic_labels[5] = { |
8b65727b MP |
2005 | "Analog Inputs", "Digital Mic 1", "Digital Mic 2", |
2006 | "Digital Mic 3", "Digital Mic 4" | |
2007 | }; | |
2008 | ||
2009 | /* create playback/capture controls for input pins on dmic capable codecs */ | |
2010 | static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec, | |
2011 | const struct auto_pin_cfg *cfg) | |
2012 | { | |
2013 | struct sigmatel_spec *spec = codec->spec; | |
2014 | struct hda_input_mux *dimux = &spec->private_dimux; | |
2015 | hda_nid_t con_lst[HDA_MAX_NUM_INPUTS]; | |
2016 | int i, j; | |
2017 | ||
2018 | dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0]; | |
2019 | dimux->items[dimux->num_items].index = 0; | |
2020 | dimux->num_items++; | |
2021 | ||
2022 | for (i = 0; i < spec->num_dmics; i++) { | |
2023 | int index; | |
2024 | int num_cons; | |
2025 | unsigned int def_conf; | |
2026 | ||
2027 | def_conf = snd_hda_codec_read(codec, | |
2028 | spec->dmic_nids[i], | |
2029 | 0, | |
2030 | AC_VERB_GET_CONFIG_DEFAULT, | |
2031 | 0); | |
2032 | if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE) | |
2033 | continue; | |
2034 | ||
2035 | num_cons = snd_hda_get_connections(codec, | |
2036 | spec->dmux_nid, | |
2037 | con_lst, | |
2038 | HDA_MAX_NUM_INPUTS); | |
2039 | for (j = 0; j < num_cons; j++) | |
2040 | if (con_lst[j] == spec->dmic_nids[i]) { | |
2041 | index = j; | |
2042 | goto found; | |
2043 | } | |
2044 | continue; | |
2045 | found: | |
2046 | dimux->items[dimux->num_items].label = | |
2047 | stac92xx_dmic_labels[dimux->num_items]; | |
2048 | dimux->items[dimux->num_items].index = index; | |
2049 | dimux->num_items++; | |
2050 | } | |
2051 | ||
2052 | return 0; | |
2053 | } | |
2054 | ||
c7d4b2fa M |
2055 | /* create playback/capture controls for input pins */ |
2056 | static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg) | |
2057 | { | |
2058 | struct sigmatel_spec *spec = codec->spec; | |
c7d4b2fa M |
2059 | struct hda_input_mux *imux = &spec->private_imux; |
2060 | hda_nid_t con_lst[HDA_MAX_NUM_INPUTS]; | |
2061 | int i, j, k; | |
2062 | ||
2063 | for (i = 0; i < AUTO_PIN_LAST; i++) { | |
314634bc TI |
2064 | int index; |
2065 | ||
2066 | if (!cfg->input_pins[i]) | |
2067 | continue; | |
2068 | index = -1; | |
2069 | for (j = 0; j < spec->num_muxes; j++) { | |
2070 | int num_cons; | |
2071 | num_cons = snd_hda_get_connections(codec, | |
2072 | spec->mux_nids[j], | |
2073 | con_lst, | |
2074 | HDA_MAX_NUM_INPUTS); | |
2075 | for (k = 0; k < num_cons; k++) | |
2076 | if (con_lst[k] == cfg->input_pins[i]) { | |
2077 | index = k; | |
2078 | goto found; | |
2079 | } | |
c7d4b2fa | 2080 | } |
314634bc TI |
2081 | continue; |
2082 | found: | |
2083 | imux->items[imux->num_items].label = auto_pin_cfg_labels[i]; | |
2084 | imux->items[imux->num_items].index = index; | |
2085 | imux->num_items++; | |
c7d4b2fa M |
2086 | } |
2087 | ||
7b043899 | 2088 | if (imux->num_items) { |
62fe78e9 SR |
2089 | /* |
2090 | * Set the current input for the muxes. | |
2091 | * The STAC9221 has two input muxes with identical source | |
2092 | * NID lists. Hopefully this won't get confused. | |
2093 | */ | |
2094 | for (i = 0; i < spec->num_muxes; i++) { | |
82beb8fd TI |
2095 | snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0, |
2096 | AC_VERB_SET_CONNECT_SEL, | |
2097 | imux->items[0].index); | |
62fe78e9 SR |
2098 | } |
2099 | } | |
2100 | ||
c7d4b2fa M |
2101 | return 0; |
2102 | } | |
2103 | ||
c7d4b2fa M |
2104 | static void stac92xx_auto_init_multi_out(struct hda_codec *codec) |
2105 | { | |
2106 | struct sigmatel_spec *spec = codec->spec; | |
2107 | int i; | |
2108 | ||
2109 | for (i = 0; i < spec->autocfg.line_outs; i++) { | |
2110 | hda_nid_t nid = spec->autocfg.line_out_pins[i]; | |
2111 | stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN); | |
2112 | } | |
2113 | } | |
2114 | ||
2115 | static void stac92xx_auto_init_hp_out(struct hda_codec *codec) | |
2116 | { | |
2117 | struct sigmatel_spec *spec = codec->spec; | |
eb06ed8f | 2118 | int i; |
c7d4b2fa | 2119 | |
eb06ed8f TI |
2120 | for (i = 0; i < spec->autocfg.hp_outs; i++) { |
2121 | hda_nid_t pin; | |
2122 | pin = spec->autocfg.hp_pins[i]; | |
2123 | if (pin) /* connect to front */ | |
2124 | stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN); | |
2125 | } | |
2126 | for (i = 0; i < spec->autocfg.speaker_outs; i++) { | |
2127 | hda_nid_t pin; | |
2128 | pin = spec->autocfg.speaker_pins[i]; | |
2129 | if (pin) /* connect to front */ | |
2130 | stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN); | |
2131 | } | |
c7d4b2fa M |
2132 | } |
2133 | ||
3cc08dc6 | 2134 | static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in) |
c7d4b2fa M |
2135 | { |
2136 | struct sigmatel_spec *spec = codec->spec; | |
2137 | int err; | |
bcecd9bd | 2138 | int hp_speaker_swap = 0; |
c7d4b2fa | 2139 | |
8b65727b MP |
2140 | if ((err = snd_hda_parse_pin_def_config(codec, |
2141 | &spec->autocfg, | |
2142 | spec->dmic_nids)) < 0) | |
c7d4b2fa | 2143 | return err; |
82bc955f | 2144 | if (! spec->autocfg.line_outs) |
869264c4 | 2145 | return 0; /* can't find valid pin config */ |
19039bd0 | 2146 | |
bcecd9bd JZ |
2147 | /* If we have no real line-out pin and multiple hp-outs, HPs should |
2148 | * be set up as multi-channel outputs. | |
2149 | */ | |
2150 | if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT && | |
2151 | spec->autocfg.hp_outs > 1) { | |
2152 | /* Copy hp_outs to line_outs, backup line_outs in | |
2153 | * speaker_outs so that the following routines can handle | |
2154 | * HP pins as primary outputs. | |
2155 | */ | |
2156 | memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins, | |
2157 | sizeof(spec->autocfg.line_out_pins)); | |
2158 | spec->autocfg.speaker_outs = spec->autocfg.line_outs; | |
2159 | memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins, | |
2160 | sizeof(spec->autocfg.hp_pins)); | |
2161 | spec->autocfg.line_outs = spec->autocfg.hp_outs; | |
2162 | hp_speaker_swap = 1; | |
2163 | } | |
2164 | ||
403d1944 MP |
2165 | if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0) |
2166 | return err; | |
19039bd0 TI |
2167 | if (spec->multiout.num_dacs == 0) |
2168 | if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0) | |
2169 | return err; | |
c7d4b2fa | 2170 | |
0fb87bb4 ML |
2171 | err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg); |
2172 | ||
2173 | if (err < 0) | |
2174 | return err; | |
2175 | ||
bcecd9bd JZ |
2176 | if (hp_speaker_swap == 1) { |
2177 | /* Restore the hp_outs and line_outs */ | |
2178 | memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins, | |
2179 | sizeof(spec->autocfg.line_out_pins)); | |
2180 | spec->autocfg.hp_outs = spec->autocfg.line_outs; | |
2181 | memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins, | |
2182 | sizeof(spec->autocfg.speaker_pins)); | |
2183 | spec->autocfg.line_outs = spec->autocfg.speaker_outs; | |
2184 | memset(spec->autocfg.speaker_pins, 0, | |
2185 | sizeof(spec->autocfg.speaker_pins)); | |
2186 | spec->autocfg.speaker_outs = 0; | |
2187 | } | |
2188 | ||
0fb87bb4 ML |
2189 | err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg); |
2190 | ||
2191 | if (err < 0) | |
2192 | return err; | |
2193 | ||
2194 | err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg); | |
2195 | ||
2196 | if (err < 0) | |
c7d4b2fa M |
2197 | return err; |
2198 | ||
8b65727b MP |
2199 | if (spec->num_dmics > 0) |
2200 | if ((err = stac92xx_auto_create_dmic_input_ctls(codec, | |
2201 | &spec->autocfg)) < 0) | |
2202 | return err; | |
2203 | ||
c7d4b2fa | 2204 | spec->multiout.max_channels = spec->multiout.num_dacs * 2; |
403d1944 | 2205 | if (spec->multiout.max_channels > 2) |
c7d4b2fa | 2206 | spec->surr_switch = 1; |
c7d4b2fa | 2207 | |
82bc955f | 2208 | if (spec->autocfg.dig_out_pin) |
3cc08dc6 | 2209 | spec->multiout.dig_out_nid = dig_out; |
82bc955f | 2210 | if (spec->autocfg.dig_in_pin) |
3cc08dc6 | 2211 | spec->dig_in_nid = dig_in; |
c7d4b2fa M |
2212 | |
2213 | if (spec->kctl_alloc) | |
2214 | spec->mixers[spec->num_mixers++] = spec->kctl_alloc; | |
2215 | ||
2216 | spec->input_mux = &spec->private_imux; | |
8b65727b | 2217 | spec->dinput_mux = &spec->private_dimux; |
c7d4b2fa M |
2218 | |
2219 | return 1; | |
2220 | } | |
2221 | ||
82bc955f TI |
2222 | /* add playback controls for HP output */ |
2223 | static int stac9200_auto_create_hp_ctls(struct hda_codec *codec, | |
2224 | struct auto_pin_cfg *cfg) | |
2225 | { | |
2226 | struct sigmatel_spec *spec = codec->spec; | |
eb06ed8f | 2227 | hda_nid_t pin = cfg->hp_pins[0]; |
82bc955f TI |
2228 | unsigned int wid_caps; |
2229 | ||
2230 | if (! pin) | |
2231 | return 0; | |
2232 | ||
2233 | wid_caps = get_wcaps(codec, pin); | |
505cb341 | 2234 | if (wid_caps & AC_WCAP_UNSOL_CAP) |
82bc955f | 2235 | spec->hp_detect = 1; |
82bc955f TI |
2236 | |
2237 | return 0; | |
2238 | } | |
2239 | ||
160ea0dc RF |
2240 | /* add playback controls for LFE output */ |
2241 | static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec, | |
2242 | struct auto_pin_cfg *cfg) | |
2243 | { | |
2244 | struct sigmatel_spec *spec = codec->spec; | |
2245 | int err; | |
2246 | hda_nid_t lfe_pin = 0x0; | |
2247 | int i; | |
2248 | ||
2249 | /* | |
2250 | * search speaker outs and line outs for a mono speaker pin | |
2251 | * with an amp. If one is found, add LFE controls | |
2252 | * for it. | |
2253 | */ | |
2254 | for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) { | |
2255 | hda_nid_t pin = spec->autocfg.speaker_pins[i]; | |
2256 | unsigned long wcaps = get_wcaps(codec, pin); | |
2257 | wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP); | |
2258 | if (wcaps == AC_WCAP_OUT_AMP) | |
2259 | /* found a mono speaker with an amp, must be lfe */ | |
2260 | lfe_pin = pin; | |
2261 | } | |
2262 | ||
2263 | /* if speaker_outs is 0, then speakers may be in line_outs */ | |
2264 | if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) { | |
2265 | for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) { | |
2266 | hda_nid_t pin = spec->autocfg.line_out_pins[i]; | |
2267 | unsigned long cfg; | |
2268 | cfg = snd_hda_codec_read(codec, pin, 0, | |
2269 | AC_VERB_GET_CONFIG_DEFAULT, | |
2270 | 0x00); | |
2271 | if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) { | |
2272 | unsigned long wcaps = get_wcaps(codec, pin); | |
2273 | wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP); | |
2274 | if (wcaps == AC_WCAP_OUT_AMP) | |
2275 | /* found a mono speaker with an amp, | |
2276 | must be lfe */ | |
2277 | lfe_pin = pin; | |
2278 | } | |
2279 | } | |
2280 | } | |
2281 | ||
2282 | if (lfe_pin) { | |
eb06ed8f | 2283 | err = create_controls(spec, "LFE", lfe_pin, 1); |
160ea0dc RF |
2284 | if (err < 0) |
2285 | return err; | |
2286 | } | |
2287 | ||
2288 | return 0; | |
2289 | } | |
2290 | ||
c7d4b2fa M |
2291 | static int stac9200_parse_auto_config(struct hda_codec *codec) |
2292 | { | |
2293 | struct sigmatel_spec *spec = codec->spec; | |
2294 | int err; | |
2295 | ||
df694daa | 2296 | if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0) |
c7d4b2fa M |
2297 | return err; |
2298 | ||
2299 | if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0) | |
2300 | return err; | |
2301 | ||
82bc955f TI |
2302 | if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0) |
2303 | return err; | |
2304 | ||
160ea0dc RF |
2305 | if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0) |
2306 | return err; | |
2307 | ||
82bc955f | 2308 | if (spec->autocfg.dig_out_pin) |
c7d4b2fa | 2309 | spec->multiout.dig_out_nid = 0x05; |
82bc955f | 2310 | if (spec->autocfg.dig_in_pin) |
c7d4b2fa | 2311 | spec->dig_in_nid = 0x04; |
c7d4b2fa M |
2312 | |
2313 | if (spec->kctl_alloc) | |
2314 | spec->mixers[spec->num_mixers++] = spec->kctl_alloc; | |
2315 | ||
2316 | spec->input_mux = &spec->private_imux; | |
8b65727b | 2317 | spec->dinput_mux = &spec->private_dimux; |
c7d4b2fa M |
2318 | |
2319 | return 1; | |
2320 | } | |
2321 | ||
62fe78e9 SR |
2322 | /* |
2323 | * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a | |
2324 | * funky external mute control using GPIO pins. | |
2325 | */ | |
2326 | ||
2327 | static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted) | |
2328 | { | |
2329 | unsigned int gpiostate, gpiomask, gpiodir; | |
2330 | ||
2331 | gpiostate = snd_hda_codec_read(codec, codec->afg, 0, | |
2332 | AC_VERB_GET_GPIO_DATA, 0); | |
2333 | ||
2334 | if (!muted) | |
2335 | gpiostate |= (1 << pin); | |
2336 | else | |
2337 | gpiostate &= ~(1 << pin); | |
2338 | ||
2339 | gpiomask = snd_hda_codec_read(codec, codec->afg, 0, | |
2340 | AC_VERB_GET_GPIO_MASK, 0); | |
2341 | gpiomask |= (1 << pin); | |
2342 | ||
2343 | gpiodir = snd_hda_codec_read(codec, codec->afg, 0, | |
2344 | AC_VERB_GET_GPIO_DIRECTION, 0); | |
2345 | gpiodir |= (1 << pin); | |
2346 | ||
2347 | /* AppleHDA seems to do this -- WTF is this verb?? */ | |
2348 | snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0); | |
2349 | ||
2350 | snd_hda_codec_write(codec, codec->afg, 0, | |
2351 | AC_VERB_SET_GPIO_MASK, gpiomask); | |
2352 | snd_hda_codec_write(codec, codec->afg, 0, | |
2353 | AC_VERB_SET_GPIO_DIRECTION, gpiodir); | |
2354 | ||
2355 | msleep(1); | |
2356 | ||
2357 | snd_hda_codec_write(codec, codec->afg, 0, | |
2358 | AC_VERB_SET_GPIO_DATA, gpiostate); | |
2359 | } | |
2360 | ||
314634bc TI |
2361 | static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid, |
2362 | unsigned int event) | |
2363 | { | |
2364 | if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) | |
dc81bed1 TI |
2365 | snd_hda_codec_write_cache(codec, nid, 0, |
2366 | AC_VERB_SET_UNSOLICITED_ENABLE, | |
2367 | (AC_USRSP_EN | event)); | |
314634bc TI |
2368 | } |
2369 | ||
c7d4b2fa M |
2370 | static int stac92xx_init(struct hda_codec *codec) |
2371 | { | |
2372 | struct sigmatel_spec *spec = codec->spec; | |
82bc955f TI |
2373 | struct auto_pin_cfg *cfg = &spec->autocfg; |
2374 | int i; | |
c7d4b2fa | 2375 | |
c7d4b2fa M |
2376 | snd_hda_sequence_write(codec, spec->init); |
2377 | ||
82bc955f TI |
2378 | /* set up pins */ |
2379 | if (spec->hp_detect) { | |
505cb341 | 2380 | /* Enable unsolicited responses on the HP widget */ |
eb06ed8f | 2381 | for (i = 0; i < cfg->hp_outs; i++) |
314634bc TI |
2382 | enable_pin_detect(codec, cfg->hp_pins[i], |
2383 | STAC_HP_EVENT); | |
0a07acaf TI |
2384 | /* force to enable the first line-out; the others are set up |
2385 | * in unsol_event | |
2386 | */ | |
2387 | stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0], | |
2388 | AC_PINCTL_OUT_EN); | |
eb995a8c | 2389 | stac92xx_auto_init_hp_out(codec); |
82bc955f TI |
2390 | /* fake event to set up pins */ |
2391 | codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26); | |
2392 | } else { | |
2393 | stac92xx_auto_init_multi_out(codec); | |
2394 | stac92xx_auto_init_hp_out(codec); | |
2395 | } | |
2396 | for (i = 0; i < AUTO_PIN_LAST; i++) { | |
c960a03b TI |
2397 | hda_nid_t nid = cfg->input_pins[i]; |
2398 | if (nid) { | |
2399 | unsigned int pinctl = AC_PINCTL_IN_EN; | |
2400 | if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) | |
2401 | pinctl |= stac92xx_get_vref(codec, nid); | |
2402 | stac92xx_auto_set_pinctl(codec, nid, pinctl); | |
2403 | } | |
82bc955f | 2404 | } |
8b65727b MP |
2405 | if (spec->num_dmics > 0) |
2406 | for (i = 0; i < spec->num_dmics; i++) | |
2407 | stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i], | |
2408 | AC_PINCTL_IN_EN); | |
2409 | ||
82bc955f TI |
2410 | if (cfg->dig_out_pin) |
2411 | stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin, | |
2412 | AC_PINCTL_OUT_EN); | |
2413 | if (cfg->dig_in_pin) | |
2414 | stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin, | |
2415 | AC_PINCTL_IN_EN); | |
2416 | ||
62fe78e9 SR |
2417 | if (spec->gpio_mute) { |
2418 | stac922x_gpio_mute(codec, 0, 0); | |
2419 | stac922x_gpio_mute(codec, 1, 0); | |
2420 | } | |
2421 | ||
c7d4b2fa M |
2422 | return 0; |
2423 | } | |
2424 | ||
2f2f4251 M |
2425 | static void stac92xx_free(struct hda_codec *codec) |
2426 | { | |
c7d4b2fa M |
2427 | struct sigmatel_spec *spec = codec->spec; |
2428 | int i; | |
2429 | ||
2430 | if (! spec) | |
2431 | return; | |
2432 | ||
2433 | if (spec->kctl_alloc) { | |
2434 | for (i = 0; i < spec->num_kctl_used; i++) | |
2435 | kfree(spec->kctl_alloc[i].name); | |
2436 | kfree(spec->kctl_alloc); | |
2437 | } | |
2438 | ||
11b44bbd RF |
2439 | if (spec->bios_pin_configs) |
2440 | kfree(spec->bios_pin_configs); | |
2441 | ||
c7d4b2fa | 2442 | kfree(spec); |
2f2f4251 M |
2443 | } |
2444 | ||
4e55096e M |
2445 | static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid, |
2446 | unsigned int flag) | |
2447 | { | |
2448 | unsigned int pin_ctl = snd_hda_codec_read(codec, nid, | |
2449 | 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00); | |
7b043899 | 2450 | |
f9acba43 TI |
2451 | if (pin_ctl & AC_PINCTL_IN_EN) { |
2452 | /* | |
2453 | * we need to check the current set-up direction of | |
2454 | * shared input pins since they can be switched via | |
2455 | * "xxx as Output" mixer switch | |
2456 | */ | |
2457 | struct sigmatel_spec *spec = codec->spec; | |
2458 | struct auto_pin_cfg *cfg = &spec->autocfg; | |
2459 | if ((nid == cfg->input_pins[AUTO_PIN_LINE] && | |
2460 | spec->line_switch) || | |
2461 | (nid == cfg->input_pins[AUTO_PIN_MIC] && | |
2462 | spec->mic_switch)) | |
2463 | return; | |
2464 | } | |
2465 | ||
7b043899 SL |
2466 | /* if setting pin direction bits, clear the current |
2467 | direction bits first */ | |
2468 | if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN)) | |
2469 | pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN); | |
2470 | ||
82beb8fd | 2471 | snd_hda_codec_write_cache(codec, nid, 0, |
4e55096e M |
2472 | AC_VERB_SET_PIN_WIDGET_CONTROL, |
2473 | pin_ctl | flag); | |
2474 | } | |
2475 | ||
2476 | static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid, | |
2477 | unsigned int flag) | |
2478 | { | |
2479 | unsigned int pin_ctl = snd_hda_codec_read(codec, nid, | |
2480 | 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00); | |
82beb8fd | 2481 | snd_hda_codec_write_cache(codec, nid, 0, |
4e55096e M |
2482 | AC_VERB_SET_PIN_WIDGET_CONTROL, |
2483 | pin_ctl & ~flag); | |
2484 | } | |
2485 | ||
314634bc TI |
2486 | static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid) |
2487 | { | |
2488 | if (!nid) | |
2489 | return 0; | |
2490 | if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00) | |
2491 | & (1 << 31)) | |
2492 | return 1; | |
2493 | return 0; | |
2494 | } | |
2495 | ||
2496 | static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res) | |
4e55096e M |
2497 | { |
2498 | struct sigmatel_spec *spec = codec->spec; | |
2499 | struct auto_pin_cfg *cfg = &spec->autocfg; | |
2500 | int i, presence; | |
2501 | ||
eb06ed8f TI |
2502 | presence = 0; |
2503 | for (i = 0; i < cfg->hp_outs; i++) { | |
314634bc TI |
2504 | presence = get_pin_presence(codec, cfg->hp_pins[i]); |
2505 | if (presence) | |
2506 | break; | |
eb06ed8f | 2507 | } |
4e55096e M |
2508 | |
2509 | if (presence) { | |
2510 | /* disable lineouts, enable hp */ | |
2511 | for (i = 0; i < cfg->line_outs; i++) | |
2512 | stac92xx_reset_pinctl(codec, cfg->line_out_pins[i], | |
2513 | AC_PINCTL_OUT_EN); | |
eb06ed8f TI |
2514 | for (i = 0; i < cfg->speaker_outs; i++) |
2515 | stac92xx_reset_pinctl(codec, cfg->speaker_pins[i], | |
2516 | AC_PINCTL_OUT_EN); | |
4e55096e M |
2517 | } else { |
2518 | /* enable lineouts, disable hp */ | |
2519 | for (i = 0; i < cfg->line_outs; i++) | |
2520 | stac92xx_set_pinctl(codec, cfg->line_out_pins[i], | |
2521 | AC_PINCTL_OUT_EN); | |
eb06ed8f TI |
2522 | for (i = 0; i < cfg->speaker_outs; i++) |
2523 | stac92xx_set_pinctl(codec, cfg->speaker_pins[i], | |
2524 | AC_PINCTL_OUT_EN); | |
4e55096e M |
2525 | } |
2526 | } | |
2527 | ||
314634bc TI |
2528 | static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res) |
2529 | { | |
2530 | switch (res >> 26) { | |
2531 | case STAC_HP_EVENT: | |
2532 | stac92xx_hp_detect(codec, res); | |
2533 | break; | |
2534 | } | |
2535 | } | |
2536 | ||
cb53c626 | 2537 | #ifdef SND_HDA_NEEDS_RESUME |
ff6fdc37 M |
2538 | static int stac92xx_resume(struct hda_codec *codec) |
2539 | { | |
dc81bed1 TI |
2540 | struct sigmatel_spec *spec = codec->spec; |
2541 | ||
11b44bbd | 2542 | stac92xx_set_config_regs(codec); |
dc81bed1 TI |
2543 | snd_hda_sequence_write(codec, spec->init); |
2544 | if (spec->gpio_mute) { | |
2545 | stac922x_gpio_mute(codec, 0, 0); | |
2546 | stac922x_gpio_mute(codec, 1, 0); | |
2547 | } | |
82beb8fd TI |
2548 | snd_hda_codec_resume_amp(codec); |
2549 | snd_hda_codec_resume_cache(codec); | |
dc81bed1 TI |
2550 | /* invoke unsolicited event to reset the HP state */ |
2551 | if (spec->hp_detect) | |
2552 | codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26); | |
ff6fdc37 M |
2553 | return 0; |
2554 | } | |
2555 | #endif | |
2556 | ||
2f2f4251 M |
2557 | static struct hda_codec_ops stac92xx_patch_ops = { |
2558 | .build_controls = stac92xx_build_controls, | |
2559 | .build_pcms = stac92xx_build_pcms, | |
2560 | .init = stac92xx_init, | |
2561 | .free = stac92xx_free, | |
4e55096e | 2562 | .unsol_event = stac92xx_unsol_event, |
cb53c626 | 2563 | #ifdef SND_HDA_NEEDS_RESUME |
ff6fdc37 M |
2564 | .resume = stac92xx_resume, |
2565 | #endif | |
2f2f4251 M |
2566 | }; |
2567 | ||
2568 | static int patch_stac9200(struct hda_codec *codec) | |
2569 | { | |
2570 | struct sigmatel_spec *spec; | |
c7d4b2fa | 2571 | int err; |
2f2f4251 | 2572 | |
e560d8d8 | 2573 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); |
2f2f4251 M |
2574 | if (spec == NULL) |
2575 | return -ENOMEM; | |
2576 | ||
2577 | codec->spec = spec; | |
a4eed138 | 2578 | spec->num_pins = ARRAY_SIZE(stac9200_pin_nids); |
11b44bbd | 2579 | spec->pin_nids = stac9200_pin_nids; |
f5fcc13c TI |
2580 | spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS, |
2581 | stac9200_models, | |
2582 | stac9200_cfg_tbl); | |
11b44bbd RF |
2583 | if (spec->board_config < 0) { |
2584 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n"); | |
2585 | err = stac92xx_save_bios_config_regs(codec); | |
2586 | if (err < 0) { | |
2587 | stac92xx_free(codec); | |
2588 | return err; | |
2589 | } | |
2590 | spec->pin_configs = spec->bios_pin_configs; | |
2591 | } else { | |
403d1944 MP |
2592 | spec->pin_configs = stac9200_brd_tbl[spec->board_config]; |
2593 | stac92xx_set_config_regs(codec); | |
2594 | } | |
2f2f4251 M |
2595 | |
2596 | spec->multiout.max_channels = 2; | |
2597 | spec->multiout.num_dacs = 1; | |
2598 | spec->multiout.dac_nids = stac9200_dac_nids; | |
2599 | spec->adc_nids = stac9200_adc_nids; | |
2600 | spec->mux_nids = stac9200_mux_nids; | |
dabbed6f | 2601 | spec->num_muxes = 1; |
8b65727b | 2602 | spec->num_dmics = 0; |
9e05b7a3 | 2603 | spec->num_adcs = 1; |
c7d4b2fa | 2604 | |
1194b5b7 TI |
2605 | if (spec->board_config == STAC_9200_GATEWAY) |
2606 | spec->init = stac9200_eapd_init; | |
2607 | else | |
2608 | spec->init = stac9200_core_init; | |
2f2f4251 | 2609 | spec->mixer = stac9200_mixer; |
c7d4b2fa M |
2610 | |
2611 | err = stac9200_parse_auto_config(codec); | |
2612 | if (err < 0) { | |
2613 | stac92xx_free(codec); | |
2614 | return err; | |
2615 | } | |
2f2f4251 M |
2616 | |
2617 | codec->patch_ops = stac92xx_patch_ops; | |
2618 | ||
2619 | return 0; | |
2620 | } | |
2621 | ||
8e21c34c TD |
2622 | static int patch_stac925x(struct hda_codec *codec) |
2623 | { | |
2624 | struct sigmatel_spec *spec; | |
2625 | int err; | |
2626 | ||
2627 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
2628 | if (spec == NULL) | |
2629 | return -ENOMEM; | |
2630 | ||
2631 | codec->spec = spec; | |
a4eed138 | 2632 | spec->num_pins = ARRAY_SIZE(stac925x_pin_nids); |
8e21c34c TD |
2633 | spec->pin_nids = stac925x_pin_nids; |
2634 | spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS, | |
2635 | stac925x_models, | |
2636 | stac925x_cfg_tbl); | |
9e507abd | 2637 | again: |
8e21c34c | 2638 | if (spec->board_config < 0) { |
2c11f955 TD |
2639 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x," |
2640 | "using BIOS defaults\n"); | |
8e21c34c TD |
2641 | err = stac92xx_save_bios_config_regs(codec); |
2642 | if (err < 0) { | |
2643 | stac92xx_free(codec); | |
2644 | return err; | |
2645 | } | |
2646 | spec->pin_configs = spec->bios_pin_configs; | |
2647 | } else if (stac925x_brd_tbl[spec->board_config] != NULL){ | |
2648 | spec->pin_configs = stac925x_brd_tbl[spec->board_config]; | |
2649 | stac92xx_set_config_regs(codec); | |
2650 | } | |
2651 | ||
2652 | spec->multiout.max_channels = 2; | |
2653 | spec->multiout.num_dacs = 1; | |
2654 | spec->multiout.dac_nids = stac925x_dac_nids; | |
2655 | spec->adc_nids = stac925x_adc_nids; | |
2656 | spec->mux_nids = stac925x_mux_nids; | |
2657 | spec->num_muxes = 1; | |
9e05b7a3 | 2658 | spec->num_adcs = 1; |
2c11f955 TD |
2659 | switch (codec->vendor_id) { |
2660 | case 0x83847632: /* STAC9202 */ | |
2661 | case 0x83847633: /* STAC9202D */ | |
2662 | case 0x83847636: /* STAC9251 */ | |
2663 | case 0x83847637: /* STAC9251D */ | |
f6e9852a | 2664 | spec->num_dmics = STAC925X_NUM_DMICS; |
2c11f955 TD |
2665 | spec->dmic_nids = stac925x_dmic_nids; |
2666 | break; | |
2667 | default: | |
2668 | spec->num_dmics = 0; | |
2669 | break; | |
2670 | } | |
8e21c34c TD |
2671 | |
2672 | spec->init = stac925x_core_init; | |
2673 | spec->mixer = stac925x_mixer; | |
2674 | ||
2675 | err = stac92xx_parse_auto_config(codec, 0x8, 0x7); | |
9e507abd TI |
2676 | if (!err) { |
2677 | if (spec->board_config < 0) { | |
2678 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
2679 | "available, default to model=ref\n"); | |
2680 | spec->board_config = STAC_925x_REF; | |
2681 | goto again; | |
2682 | } | |
2683 | err = -EINVAL; | |
2684 | } | |
8e21c34c TD |
2685 | if (err < 0) { |
2686 | stac92xx_free(codec); | |
2687 | return err; | |
2688 | } | |
2689 | ||
2690 | codec->patch_ops = stac92xx_patch_ops; | |
2691 | ||
2692 | return 0; | |
2693 | } | |
2694 | ||
e035b841 MR |
2695 | static int patch_stac92hd71bxx(struct hda_codec *codec) |
2696 | { | |
2697 | struct sigmatel_spec *spec; | |
2698 | int err = 0; | |
2699 | ||
2700 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
2701 | if (spec == NULL) | |
2702 | return -ENOMEM; | |
2703 | ||
2704 | codec->spec = spec; | |
2705 | spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids); | |
2706 | spec->pin_nids = stac92hd71bxx_pin_nids; | |
2707 | spec->board_config = snd_hda_check_board_config(codec, | |
2708 | STAC_92HD71BXX_MODELS, | |
2709 | stac92hd71bxx_models, | |
2710 | stac92hd71bxx_cfg_tbl); | |
2711 | again: | |
2712 | if (spec->board_config < 0) { | |
2713 | snd_printdd(KERN_INFO "hda_codec: Unknown model for" | |
2714 | " STAC92HD71BXX, using BIOS defaults\n"); | |
2715 | err = stac92xx_save_bios_config_regs(codec); | |
2716 | if (err < 0) { | |
2717 | stac92xx_free(codec); | |
2718 | return err; | |
2719 | } | |
2720 | spec->pin_configs = spec->bios_pin_configs; | |
2721 | } else { | |
2722 | spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config]; | |
2723 | stac92xx_set_config_regs(codec); | |
2724 | } | |
2725 | ||
2726 | spec->gpio_mask = spec->gpio_data = 0x00000001; /* GPIO0 High = EAPD */ | |
2727 | stac92xx_enable_gpio_mask(codec); | |
2728 | ||
2729 | spec->init = stac92hd71bxx_core_init; | |
2730 | spec->mixer = stac92hd71bxx_mixer; | |
2731 | ||
2732 | spec->mux_nids = stac92hd71bxx_mux_nids; | |
2733 | spec->adc_nids = stac92hd71bxx_adc_nids; | |
2734 | spec->dmic_nids = stac92hd71bxx_dmic_nids; | |
2735 | spec->dmux_nid = 0x1c; | |
2736 | ||
2737 | spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids); | |
2738 | spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids); | |
2739 | spec->num_dmics = STAC92HD71BXX_NUM_DMICS; | |
2740 | ||
2741 | spec->multiout.num_dacs = 2; | |
2742 | spec->multiout.hp_nid = 0x11; | |
2743 | spec->multiout.dac_nids = stac92hd71bxx_dac_nids; | |
2744 | ||
2745 | err = stac92xx_parse_auto_config(codec, 0x21, 0x23); | |
2746 | if (!err) { | |
2747 | if (spec->board_config < 0) { | |
2748 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
2749 | "available, default to model=ref\n"); | |
2750 | spec->board_config = STAC_92HD71BXX_REF; | |
2751 | goto again; | |
2752 | } | |
2753 | err = -EINVAL; | |
2754 | } | |
2755 | ||
2756 | if (err < 0) { | |
2757 | stac92xx_free(codec); | |
2758 | return err; | |
2759 | } | |
2760 | ||
2761 | codec->patch_ops = stac92xx_patch_ops; | |
2762 | ||
2763 | return 0; | |
2764 | }; | |
2765 | ||
2f2f4251 M |
2766 | static int patch_stac922x(struct hda_codec *codec) |
2767 | { | |
2768 | struct sigmatel_spec *spec; | |
c7d4b2fa | 2769 | int err; |
2f2f4251 | 2770 | |
e560d8d8 | 2771 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); |
2f2f4251 M |
2772 | if (spec == NULL) |
2773 | return -ENOMEM; | |
2774 | ||
2775 | codec->spec = spec; | |
a4eed138 | 2776 | spec->num_pins = ARRAY_SIZE(stac922x_pin_nids); |
11b44bbd | 2777 | spec->pin_nids = stac922x_pin_nids; |
f5fcc13c TI |
2778 | spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS, |
2779 | stac922x_models, | |
2780 | stac922x_cfg_tbl); | |
5d5d3bc3 | 2781 | if (spec->board_config == STAC_INTEL_MAC_V3) { |
3fc24d85 TI |
2782 | spec->gpio_mute = 1; |
2783 | /* Intel Macs have all same PCI SSID, so we need to check | |
2784 | * codec SSID to distinguish the exact models | |
2785 | */ | |
6f0778d8 | 2786 | printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id); |
3fc24d85 | 2787 | switch (codec->subsystem_id) { |
5d5d3bc3 IZ |
2788 | |
2789 | case 0x106b0800: | |
2790 | spec->board_config = STAC_INTEL_MAC_V1; | |
c45e20eb | 2791 | break; |
5d5d3bc3 IZ |
2792 | case 0x106b0600: |
2793 | case 0x106b0700: | |
2794 | spec->board_config = STAC_INTEL_MAC_V2; | |
6f0778d8 | 2795 | break; |
5d5d3bc3 IZ |
2796 | case 0x106b0e00: |
2797 | case 0x106b0f00: | |
2798 | case 0x106b1600: | |
2799 | case 0x106b1700: | |
2800 | case 0x106b0200: | |
2801 | case 0x106b1e00: | |
2802 | spec->board_config = STAC_INTEL_MAC_V3; | |
3fc24d85 | 2803 | break; |
5d5d3bc3 IZ |
2804 | case 0x106b1a00: |
2805 | case 0x00000100: | |
2806 | spec->board_config = STAC_INTEL_MAC_V4; | |
f16928fb | 2807 | break; |
5d5d3bc3 IZ |
2808 | case 0x106b0a00: |
2809 | case 0x106b2200: | |
2810 | spec->board_config = STAC_INTEL_MAC_V5; | |
0dae0f83 | 2811 | break; |
3fc24d85 TI |
2812 | } |
2813 | } | |
2814 | ||
9e507abd | 2815 | again: |
11b44bbd RF |
2816 | if (spec->board_config < 0) { |
2817 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, " | |
2818 | "using BIOS defaults\n"); | |
2819 | err = stac92xx_save_bios_config_regs(codec); | |
2820 | if (err < 0) { | |
2821 | stac92xx_free(codec); | |
2822 | return err; | |
2823 | } | |
2824 | spec->pin_configs = spec->bios_pin_configs; | |
2825 | } else if (stac922x_brd_tbl[spec->board_config] != NULL) { | |
403d1944 MP |
2826 | spec->pin_configs = stac922x_brd_tbl[spec->board_config]; |
2827 | stac92xx_set_config_regs(codec); | |
2828 | } | |
2f2f4251 | 2829 | |
c7d4b2fa M |
2830 | spec->adc_nids = stac922x_adc_nids; |
2831 | spec->mux_nids = stac922x_mux_nids; | |
2549413e | 2832 | spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids); |
9e05b7a3 | 2833 | spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids); |
8b65727b | 2834 | spec->num_dmics = 0; |
c7d4b2fa M |
2835 | |
2836 | spec->init = stac922x_core_init; | |
2f2f4251 | 2837 | spec->mixer = stac922x_mixer; |
c7d4b2fa M |
2838 | |
2839 | spec->multiout.dac_nids = spec->dac_nids; | |
19039bd0 | 2840 | |
3cc08dc6 | 2841 | err = stac92xx_parse_auto_config(codec, 0x08, 0x09); |
9e507abd TI |
2842 | if (!err) { |
2843 | if (spec->board_config < 0) { | |
2844 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
2845 | "available, default to model=ref\n"); | |
2846 | spec->board_config = STAC_D945_REF; | |
2847 | goto again; | |
2848 | } | |
2849 | err = -EINVAL; | |
2850 | } | |
3cc08dc6 MP |
2851 | if (err < 0) { |
2852 | stac92xx_free(codec); | |
2853 | return err; | |
2854 | } | |
2855 | ||
2856 | codec->patch_ops = stac92xx_patch_ops; | |
2857 | ||
807a4636 TI |
2858 | /* Fix Mux capture level; max to 2 */ |
2859 | snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT, | |
2860 | (0 << AC_AMPCAP_OFFSET_SHIFT) | | |
2861 | (2 << AC_AMPCAP_NUM_STEPS_SHIFT) | | |
2862 | (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) | | |
2863 | (0 << AC_AMPCAP_MUTE_SHIFT)); | |
2864 | ||
3cc08dc6 MP |
2865 | return 0; |
2866 | } | |
2867 | ||
2868 | static int patch_stac927x(struct hda_codec *codec) | |
2869 | { | |
2870 | struct sigmatel_spec *spec; | |
2871 | int err; | |
2872 | ||
2873 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
2874 | if (spec == NULL) | |
2875 | return -ENOMEM; | |
2876 | ||
2877 | codec->spec = spec; | |
a4eed138 | 2878 | spec->num_pins = ARRAY_SIZE(stac927x_pin_nids); |
11b44bbd | 2879 | spec->pin_nids = stac927x_pin_nids; |
f5fcc13c TI |
2880 | spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS, |
2881 | stac927x_models, | |
2882 | stac927x_cfg_tbl); | |
9e507abd | 2883 | again: |
11b44bbd | 2884 | if (spec->board_config < 0) { |
3cc08dc6 | 2885 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n"); |
11b44bbd RF |
2886 | err = stac92xx_save_bios_config_regs(codec); |
2887 | if (err < 0) { | |
2888 | stac92xx_free(codec); | |
2889 | return err; | |
2890 | } | |
2891 | spec->pin_configs = spec->bios_pin_configs; | |
2892 | } else if (stac927x_brd_tbl[spec->board_config] != NULL) { | |
3cc08dc6 MP |
2893 | spec->pin_configs = stac927x_brd_tbl[spec->board_config]; |
2894 | stac92xx_set_config_regs(codec); | |
2895 | } | |
2896 | ||
81d3dbde | 2897 | switch (spec->board_config) { |
93ed1503 | 2898 | case STAC_D965_3ST: |
81d3dbde TD |
2899 | spec->adc_nids = stac927x_adc_nids; |
2900 | spec->mux_nids = stac927x_mux_nids; | |
2549413e | 2901 | spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids); |
9e05b7a3 | 2902 | spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids); |
93ed1503 | 2903 | spec->init = d965_core_init; |
9e05b7a3 | 2904 | spec->mixer = stac927x_mixer; |
81d3dbde | 2905 | break; |
93ed1503 TD |
2906 | case STAC_D965_5ST: |
2907 | spec->adc_nids = stac927x_adc_nids; | |
2908 | spec->mux_nids = stac927x_mux_nids; | |
2549413e | 2909 | spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids); |
9e05b7a3 | 2910 | spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids); |
93ed1503 | 2911 | spec->init = d965_core_init; |
9e05b7a3 | 2912 | spec->mixer = stac927x_mixer; |
81d3dbde TD |
2913 | break; |
2914 | default: | |
2915 | spec->adc_nids = stac927x_adc_nids; | |
2916 | spec->mux_nids = stac927x_mux_nids; | |
2549413e | 2917 | spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids); |
9e05b7a3 | 2918 | spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids); |
81d3dbde TD |
2919 | spec->init = stac927x_core_init; |
2920 | spec->mixer = stac927x_mixer; | |
2921 | } | |
3cc08dc6 | 2922 | |
7f16859a | 2923 | switch (codec->subsystem_id) { |
b222fe50 MR |
2924 | case 0x10280242: /* STAC 9228 */ |
2925 | case 0x102801f3: | |
2926 | case 0x1028020A: | |
2927 | case 0x10280209: | |
7f16859a MR |
2928 | spec->dmic_nids = stac927x_dmic_nids; |
2929 | spec->num_dmics = STAC927X_NUM_DMICS; | |
83eef75b | 2930 | spec->dmux_nid = 0x1b; |
f1f208d0 MR |
2931 | |
2932 | /* Enable DMIC0 */ | |
2933 | stac92xx_set_config_reg(codec, 0x13, 0x90a60040); | |
2934 | ||
2935 | /* GPIO2 High = Enable EAPD */ | |
2936 | spec->gpio_mask = spec->gpio_data = 0x00000004; | |
7f16859a MR |
2937 | break; |
2938 | default: | |
f1f208d0 MR |
2939 | spec->num_dmics = 0; |
2940 | ||
2941 | /* GPIO0 High = Enable EAPD */ | |
2942 | spec->gpio_mask = spec->gpio_data = 0x00000001; | |
7f16859a MR |
2943 | } |
2944 | ||
3cc08dc6 | 2945 | spec->multiout.dac_nids = spec->dac_nids; |
8259980e | 2946 | stac92xx_enable_gpio_mask(codec); |
92a22beb | 2947 | |
3cc08dc6 | 2948 | err = stac92xx_parse_auto_config(codec, 0x1e, 0x20); |
9e507abd TI |
2949 | if (!err) { |
2950 | if (spec->board_config < 0) { | |
2951 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
2952 | "available, default to model=ref\n"); | |
2953 | spec->board_config = STAC_D965_REF; | |
2954 | goto again; | |
2955 | } | |
2956 | err = -EINVAL; | |
2957 | } | |
c7d4b2fa M |
2958 | if (err < 0) { |
2959 | stac92xx_free(codec); | |
2960 | return err; | |
2961 | } | |
2f2f4251 M |
2962 | |
2963 | codec->patch_ops = stac92xx_patch_ops; | |
2964 | ||
2965 | return 0; | |
2966 | } | |
2967 | ||
f3302a59 MP |
2968 | static int patch_stac9205(struct hda_codec *codec) |
2969 | { | |
2970 | struct sigmatel_spec *spec; | |
8259980e | 2971 | int err; |
f3302a59 MP |
2972 | |
2973 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
2974 | if (spec == NULL) | |
2975 | return -ENOMEM; | |
2976 | ||
2977 | codec->spec = spec; | |
a4eed138 | 2978 | spec->num_pins = ARRAY_SIZE(stac9205_pin_nids); |
11b44bbd | 2979 | spec->pin_nids = stac9205_pin_nids; |
f5fcc13c TI |
2980 | spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS, |
2981 | stac9205_models, | |
2982 | stac9205_cfg_tbl); | |
9e507abd | 2983 | again: |
11b44bbd RF |
2984 | if (spec->board_config < 0) { |
2985 | snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n"); | |
2986 | err = stac92xx_save_bios_config_regs(codec); | |
2987 | if (err < 0) { | |
2988 | stac92xx_free(codec); | |
2989 | return err; | |
2990 | } | |
2991 | spec->pin_configs = spec->bios_pin_configs; | |
2992 | } else { | |
f3302a59 MP |
2993 | spec->pin_configs = stac9205_brd_tbl[spec->board_config]; |
2994 | stac92xx_set_config_regs(codec); | |
2995 | } | |
2996 | ||
2997 | spec->adc_nids = stac9205_adc_nids; | |
9e05b7a3 | 2998 | spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids); |
f3302a59 | 2999 | spec->mux_nids = stac9205_mux_nids; |
2549413e | 3000 | spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids); |
8b65727b | 3001 | spec->dmic_nids = stac9205_dmic_nids; |
f6e9852a | 3002 | spec->num_dmics = STAC9205_NUM_DMICS; |
8b65727b | 3003 | spec->dmux_nid = 0x1d; |
f3302a59 MP |
3004 | |
3005 | spec->init = stac9205_core_init; | |
3006 | spec->mixer = stac9205_mixer; | |
3007 | ||
3008 | spec->multiout.dac_nids = spec->dac_nids; | |
87d48363 | 3009 | |
ae0a8ed8 | 3010 | switch (spec->board_config){ |
ae0a8ed8 | 3011 | case STAC_9205_DELL_M43: |
87d48363 MR |
3012 | /* Enable SPDIF in/out */ |
3013 | stac92xx_set_config_reg(codec, 0x1f, 0x01441030); | |
3014 | stac92xx_set_config_reg(codec, 0x20, 0x1c410030); | |
3015 | ||
8259980e | 3016 | spec->gpio_mask = 0x00000007; /* GPIO0-2 */ |
87d48363 MR |
3017 | /* GPIO0 High = EAPD, GPIO1 Low = DRM, |
3018 | * GPIO2 High = Headphone Mute | |
3019 | */ | |
8259980e | 3020 | spec->gpio_data = 0x00000005; |
ae0a8ed8 TD |
3021 | break; |
3022 | default: | |
3023 | /* GPIO0 High = EAPD */ | |
3024 | spec->gpio_mask = spec->gpio_data = 0x00000001; | |
3025 | break; | |
3026 | } | |
33382403 | 3027 | |
8259980e | 3028 | stac92xx_enable_gpio_mask(codec); |
f3302a59 | 3029 | err = stac92xx_parse_auto_config(codec, 0x1f, 0x20); |
9e507abd TI |
3030 | if (!err) { |
3031 | if (spec->board_config < 0) { | |
3032 | printk(KERN_WARNING "hda_codec: No auto-config is " | |
3033 | "available, default to model=ref\n"); | |
3034 | spec->board_config = STAC_9205_REF; | |
3035 | goto again; | |
3036 | } | |
3037 | err = -EINVAL; | |
3038 | } | |
f3302a59 MP |
3039 | if (err < 0) { |
3040 | stac92xx_free(codec); | |
3041 | return err; | |
3042 | } | |
3043 | ||
3044 | codec->patch_ops = stac92xx_patch_ops; | |
3045 | ||
3046 | return 0; | |
3047 | } | |
3048 | ||
db064e50 | 3049 | /* |
6d859065 | 3050 | * STAC9872 hack |
db064e50 TI |
3051 | */ |
3052 | ||
99ccc560 | 3053 | /* static config for Sony VAIO FE550G and Sony VAIO AR */ |
db064e50 TI |
3054 | static hda_nid_t vaio_dacs[] = { 0x2 }; |
3055 | #define VAIO_HP_DAC 0x5 | |
3056 | static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ }; | |
3057 | static hda_nid_t vaio_mux_nids[] = { 0x15 }; | |
3058 | ||
3059 | static struct hda_input_mux vaio_mux = { | |
a3a2f429 | 3060 | .num_items = 3, |
db064e50 | 3061 | .items = { |
d773781c | 3062 | /* { "HP", 0x0 }, */ |
1624cb9a TI |
3063 | { "Mic Jack", 0x1 }, |
3064 | { "Internal Mic", 0x2 }, | |
db064e50 TI |
3065 | { "PCM", 0x3 }, |
3066 | } | |
3067 | }; | |
3068 | ||
3069 | static struct hda_verb vaio_init[] = { | |
3070 | {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */ | |
72e7b0dd | 3071 | {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT}, |
db064e50 TI |
3072 | {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */ |
3073 | {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */ | |
3074 | {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */ | |
3075 | {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */ | |
1624cb9a | 3076 | {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ |
db064e50 TI |
3077 | {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */ |
3078 | {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */ | |
3079 | {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */ | |
3080 | {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */ | |
3081 | {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ | |
3082 | {} | |
3083 | }; | |
3084 | ||
6d859065 GM |
3085 | static struct hda_verb vaio_ar_init[] = { |
3086 | {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */ | |
3087 | {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */ | |
3088 | {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */ | |
3089 | {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */ | |
3090 | /* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */ | |
3091 | {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */ | |
1624cb9a | 3092 | {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ |
6d859065 GM |
3093 | {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */ |
3094 | {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */ | |
3095 | /* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */ | |
3096 | {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */ | |
3097 | {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */ | |
3098 | {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ | |
3099 | {} | |
3100 | }; | |
3101 | ||
db064e50 | 3102 | /* bind volumes of both NID 0x02 and 0x05 */ |
cca3b371 TI |
3103 | static struct hda_bind_ctls vaio_bind_master_vol = { |
3104 | .ops = &snd_hda_bind_vol, | |
3105 | .values = { | |
3106 | HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT), | |
3107 | HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT), | |
3108 | 0 | |
3109 | }, | |
3110 | }; | |
db064e50 TI |
3111 | |
3112 | /* bind volumes of both NID 0x02 and 0x05 */ | |
cca3b371 TI |
3113 | static struct hda_bind_ctls vaio_bind_master_sw = { |
3114 | .ops = &snd_hda_bind_sw, | |
3115 | .values = { | |
3116 | HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT), | |
3117 | HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT), | |
3118 | 0, | |
3119 | }, | |
3120 | }; | |
db064e50 TI |
3121 | |
3122 | static struct snd_kcontrol_new vaio_mixer[] = { | |
cca3b371 TI |
3123 | HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol), |
3124 | HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw), | |
db064e50 TI |
3125 | /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */ |
3126 | HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT), | |
3127 | HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT), | |
3128 | { | |
3129 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
3130 | .name = "Capture Source", | |
3131 | .count = 1, | |
3132 | .info = stac92xx_mux_enum_info, | |
3133 | .get = stac92xx_mux_enum_get, | |
3134 | .put = stac92xx_mux_enum_put, | |
3135 | }, | |
3136 | {} | |
3137 | }; | |
3138 | ||
6d859065 | 3139 | static struct snd_kcontrol_new vaio_ar_mixer[] = { |
cca3b371 TI |
3140 | HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol), |
3141 | HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw), | |
6d859065 GM |
3142 | /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */ |
3143 | HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT), | |
3144 | HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT), | |
3145 | /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT), | |
3146 | HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/ | |
3147 | { | |
3148 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
3149 | .name = "Capture Source", | |
3150 | .count = 1, | |
3151 | .info = stac92xx_mux_enum_info, | |
3152 | .get = stac92xx_mux_enum_get, | |
3153 | .put = stac92xx_mux_enum_put, | |
3154 | }, | |
3155 | {} | |
3156 | }; | |
3157 | ||
3158 | static struct hda_codec_ops stac9872_patch_ops = { | |
db064e50 TI |
3159 | .build_controls = stac92xx_build_controls, |
3160 | .build_pcms = stac92xx_build_pcms, | |
3161 | .init = stac92xx_init, | |
3162 | .free = stac92xx_free, | |
cb53c626 | 3163 | #ifdef SND_HDA_NEEDS_RESUME |
db064e50 TI |
3164 | .resume = stac92xx_resume, |
3165 | #endif | |
3166 | }; | |
3167 | ||
72e7b0dd TI |
3168 | static int stac9872_vaio_init(struct hda_codec *codec) |
3169 | { | |
3170 | int err; | |
3171 | ||
3172 | err = stac92xx_init(codec); | |
3173 | if (err < 0) | |
3174 | return err; | |
3175 | if (codec->patch_ops.unsol_event) | |
3176 | codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26); | |
3177 | return 0; | |
3178 | } | |
3179 | ||
3180 | static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res) | |
3181 | { | |
3182 | if (get_pin_presence(codec, 0x0a)) { | |
3183 | stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN); | |
3184 | stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN); | |
3185 | } else { | |
3186 | stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN); | |
3187 | stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN); | |
3188 | } | |
3189 | } | |
3190 | ||
3191 | static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res) | |
3192 | { | |
3193 | switch (res >> 26) { | |
3194 | case STAC_HP_EVENT: | |
3195 | stac9872_vaio_hp_detect(codec, res); | |
3196 | break; | |
3197 | } | |
3198 | } | |
3199 | ||
3200 | static struct hda_codec_ops stac9872_vaio_patch_ops = { | |
3201 | .build_controls = stac92xx_build_controls, | |
3202 | .build_pcms = stac92xx_build_pcms, | |
3203 | .init = stac9872_vaio_init, | |
3204 | .free = stac92xx_free, | |
3205 | .unsol_event = stac9872_vaio_unsol_event, | |
3206 | #ifdef CONFIG_PM | |
3207 | .resume = stac92xx_resume, | |
3208 | #endif | |
3209 | }; | |
3210 | ||
6d859065 GM |
3211 | enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */ |
3212 | CXD9872RD_VAIO, | |
3213 | /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */ | |
3214 | STAC9872AK_VAIO, | |
3215 | /* Unknown. id=0x83847661 and subsys=0x104D1200. */ | |
3216 | STAC9872K_VAIO, | |
3217 | /* AR Series. id=0x83847664 and subsys=104D1300 */ | |
f5fcc13c TI |
3218 | CXD9872AKD_VAIO, |
3219 | STAC_9872_MODELS, | |
3220 | }; | |
3221 | ||
3222 | static const char *stac9872_models[STAC_9872_MODELS] = { | |
3223 | [CXD9872RD_VAIO] = "vaio", | |
3224 | [CXD9872AKD_VAIO] = "vaio-ar", | |
3225 | }; | |
3226 | ||
3227 | static struct snd_pci_quirk stac9872_cfg_tbl[] = { | |
3228 | SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO), | |
3229 | SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO), | |
3230 | SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO), | |
68e22543 | 3231 | SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO), |
db064e50 TI |
3232 | {} |
3233 | }; | |
3234 | ||
6d859065 | 3235 | static int patch_stac9872(struct hda_codec *codec) |
db064e50 TI |
3236 | { |
3237 | struct sigmatel_spec *spec; | |
3238 | int board_config; | |
3239 | ||
f5fcc13c TI |
3240 | board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS, |
3241 | stac9872_models, | |
3242 | stac9872_cfg_tbl); | |
db064e50 TI |
3243 | if (board_config < 0) |
3244 | /* unknown config, let generic-parser do its job... */ | |
3245 | return snd_hda_parse_generic_codec(codec); | |
3246 | ||
3247 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | |
3248 | if (spec == NULL) | |
3249 | return -ENOMEM; | |
3250 | ||
3251 | codec->spec = spec; | |
3252 | switch (board_config) { | |
6d859065 GM |
3253 | case CXD9872RD_VAIO: |
3254 | case STAC9872AK_VAIO: | |
3255 | case STAC9872K_VAIO: | |
db064e50 TI |
3256 | spec->mixer = vaio_mixer; |
3257 | spec->init = vaio_init; | |
3258 | spec->multiout.max_channels = 2; | |
3259 | spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs); | |
3260 | spec->multiout.dac_nids = vaio_dacs; | |
3261 | spec->multiout.hp_nid = VAIO_HP_DAC; | |
3262 | spec->num_adcs = ARRAY_SIZE(vaio_adcs); | |
3263 | spec->adc_nids = vaio_adcs; | |
3264 | spec->input_mux = &vaio_mux; | |
3265 | spec->mux_nids = vaio_mux_nids; | |
72e7b0dd | 3266 | codec->patch_ops = stac9872_vaio_patch_ops; |
db064e50 | 3267 | break; |
6d859065 GM |
3268 | |
3269 | case CXD9872AKD_VAIO: | |
3270 | spec->mixer = vaio_ar_mixer; | |
3271 | spec->init = vaio_ar_init; | |
3272 | spec->multiout.max_channels = 2; | |
3273 | spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs); | |
3274 | spec->multiout.dac_nids = vaio_dacs; | |
3275 | spec->multiout.hp_nid = VAIO_HP_DAC; | |
3276 | spec->num_adcs = ARRAY_SIZE(vaio_adcs); | |
3277 | spec->adc_nids = vaio_adcs; | |
3278 | spec->input_mux = &vaio_mux; | |
3279 | spec->mux_nids = vaio_mux_nids; | |
72e7b0dd | 3280 | codec->patch_ops = stac9872_patch_ops; |
6d859065 | 3281 | break; |
db064e50 TI |
3282 | } |
3283 | ||
db064e50 TI |
3284 | return 0; |
3285 | } | |
3286 | ||
3287 | ||
2f2f4251 M |
3288 | /* |
3289 | * patch entries | |
3290 | */ | |
3291 | struct hda_codec_preset snd_hda_preset_sigmatel[] = { | |
3292 | { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 }, | |
3293 | { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x }, | |
3294 | { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x }, | |
3295 | { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x }, | |
3296 | { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x }, | |
3297 | { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x }, | |
3298 | { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x }, | |
22a27c7f MP |
3299 | { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x }, |
3300 | { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x }, | |
3301 | { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x }, | |
3302 | { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x }, | |
3303 | { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x }, | |
3304 | { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x }, | |
3cc08dc6 MP |
3305 | { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x }, |
3306 | { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x }, | |
3307 | { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x }, | |
3308 | { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x }, | |
3309 | { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x }, | |
3310 | { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x }, | |
3311 | { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x }, | |
3312 | { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x }, | |
3313 | { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x }, | |
3314 | { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x }, | |
8e21c34c TD |
3315 | { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x }, |
3316 | { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x }, | |
3317 | { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x }, | |
3318 | { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x }, | |
3319 | { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x }, | |
3320 | { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x }, | |
6d859065 GM |
3321 | /* The following does not take into account .id=0x83847661 when subsys = |
3322 | * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are | |
3323 | * currently not fully supported. | |
3324 | */ | |
3325 | { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 }, | |
3326 | { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 }, | |
3327 | { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 }, | |
f3302a59 MP |
3328 | { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 }, |
3329 | { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 }, | |
3330 | { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 }, | |
3331 | { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 }, | |
3332 | { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 }, | |
3333 | { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 }, | |
3334 | { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 }, | |
3335 | { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 }, | |
e035b841 | 3336 | { .id = 0x111d76b0, .name = "92HD71BXX", .patch = patch_stac92hd71bxx }, |
2f2f4251 M |
3337 | {} /* terminator */ |
3338 | }; |