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ALSA: ice1712/wtm: fix coding style
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 39#define STAC_PWR_EVENT 0x20
40#define STAC_HP_EVENT 0x30
4e55096e 41
f5fcc13c
TI		 42enum {
43 STAC_REF,
bf277785 44 STAC_9200_OQO,
dfe495d0
TI		 45 STAC_9200_DELL_D21,
46 STAC_9200_DELL_D22,
47 STAC_9200_DELL_D23,
48 STAC_9200_DELL_M21,
49 STAC_9200_DELL_M22,
50 STAC_9200_DELL_M23,
51 STAC_9200_DELL_M24,
52 STAC_9200_DELL_M25,
53 STAC_9200_DELL_M26,
54 STAC_9200_DELL_M27,
1194b5b7 55 STAC_9200_GATEWAY,
117f257d 56 STAC_9200_PANASONIC,
f5fcc13c
TI		 57 STAC_9200_MODELS
58};
59
60enum {
61 STAC_9205_REF,
dfe495d0 62 STAC_9205_DELL_M42,
ae0a8ed8
TD		 63 STAC_9205_DELL_M43,
64 STAC_9205_DELL_M44,
f5fcc13c
TI		 65 STAC_9205_MODELS
66};
67
e1f0d669
MR		 68enum {
69 STAC_92HD73XX_REF,
a7662640 70 STAC_DELL_M6,
e1f0d669
MR		 71 STAC_92HD73XX_MODELS
72};
73
d0513fc6
MR		 74enum {
75 STAC_92HD83XXX_REF,
76 STAC_92HD83XXX_MODELS
77};
78
e035b841
MR		 79enum {
80 STAC_92HD71BXX_REF,
a7662640
MR		 81 STAC_DELL_M4_1,
82 STAC_DELL_M4_2,
e035b841
MR		 83 STAC_92HD71BXX_MODELS
84};
85
8e21c34c
TD		 86enum {
87 STAC_925x_REF,
88 STAC_M2_2,
89 STAC_MA6,
2c11f955 90 STAC_PA6,
8e21c34c
TD		 91 STAC_925x_MODELS
92};
93
f5fcc13c
TI		 94enum {
95 STAC_D945_REF,
96 STAC_D945GTP3,
97 STAC_D945GTP5,
5d5d3bc3
IZ		 98 STAC_INTEL_MAC_V1,
99 STAC_INTEL_MAC_V2,
100 STAC_INTEL_MAC_V3,
101 STAC_INTEL_MAC_V4,
102 STAC_INTEL_MAC_V5,
536319af
NB		 103 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
104 * is given, one of the above models will be
105 * chosen according to the subsystem id. */
dfe495d0 106 /* for backward compatibility */
f5fcc13c 107 STAC_MACMINI,
3fc24d85 108 STAC_MACBOOK,
6f0778d8
NB		 109 STAC_MACBOOK_PRO_V1,
110 STAC_MACBOOK_PRO_V2,
f16928fb 111 STAC_IMAC_INTEL,
0dae0f83 112 STAC_IMAC_INTEL_20,
8c650087 113 STAC_ECS_202,
dfe495d0
TI		 114 STAC_922X_DELL_D81,
115 STAC_922X_DELL_D82,
116 STAC_922X_DELL_M81,
117 STAC_922X_DELL_M82,
f5fcc13c
TI		 118 STAC_922X_MODELS
119};
120
121enum {
122 STAC_D965_REF,
123 STAC_D965_3ST,
124 STAC_D965_5ST,
4ff076e5 125 STAC_DELL_3ST,
8e9068b1 126 STAC_DELL_BIOS,
f5fcc13c
TI		 127 STAC_927X_MODELS
128};
403d1944 129
2f2f4251 130struct sigmatel_spec {
c8b6bf9b 131 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 132 unsigned int num_mixers;
133
403d1944 134 int board_config;
c7d4b2fa 135 unsigned int surr_switch: 1;
403d1944
MP		 136 unsigned int line_switch: 1;
137 unsigned int mic_switch: 1;
3cc08dc6 138 unsigned int alt_switch: 1;
82bc955f 139 unsigned int hp_detect: 1;
c7d4b2fa 140
4fe5195c 141 /* gpio lines */
0fc9dec4 142 unsigned int eapd_mask;
4fe5195c
MR		 143 unsigned int gpio_mask;
144 unsigned int gpio_dir;
145 unsigned int gpio_data;
146 unsigned int gpio_mute;
147
8daaaa97
MR		 148 /* stream */
149 unsigned int stream_delay;
150
4fe5195c 151 /* analog loopback */
e1f0d669
MR		 152 unsigned char aloopback_mask;
153 unsigned char aloopback_shift;
8259980e 154
a64135a2
MR		 155 /* power management */
156 unsigned int num_pwrs;
d0513fc6 157 unsigned int *pwr_mapping;
a64135a2 158 hda_nid_t *pwr_nids;
b76c850f 159 hda_nid_t *dac_list;
a64135a2 160
2f2f4251 161 /* playback */
b22b4821
MR		 162 struct hda_input_mux *mono_mux;
163 unsigned int cur_mmux;
2f2f4251 164 struct hda_multi_out multiout;
3cc08dc6 165 hda_nid_t dac_nids[5];
2f2f4251
M		 166
167 /* capture */
168 hda_nid_t *adc_nids;
2f2f4251 169 unsigned int num_adcs;
dabbed6f
M		 170 hda_nid_t *mux_nids;
171 unsigned int num_muxes;
8b65727b
MP		 172 hda_nid_t *dmic_nids;
173 unsigned int num_dmics;
e1f0d669 174 hda_nid_t *dmux_nids;
1697055e 175 unsigned int num_dmuxes;
dabbed6f 176 hda_nid_t dig_in_nid;
b22b4821 177 hda_nid_t mono_nid;
1cd2224c
MR		 178 hda_nid_t anabeep_nid;
179 hda_nid_t digbeep_nid;
2f2f4251 180
2f2f4251
M		 181 /* pin widgets */
182 hda_nid_t *pin_nids;
183 unsigned int num_pins;
2f2f4251 184 unsigned int *pin_configs;
11b44bbd 185 unsigned int *bios_pin_configs;
2f2f4251
M		 186
187 /* codec specific stuff */
188 struct hda_verb *init;
c8b6bf9b 189 struct snd_kcontrol_new *mixer;
2f2f4251
M		 190
191 /* capture source */
8b65727b 192 struct hda_input_mux *dinput_mux;
e1f0d669 193 unsigned int cur_dmux[2];
c7d4b2fa 194 struct hda_input_mux *input_mux;
3cc08dc6 195 unsigned int cur_mux[3];
8daaaa97 196 unsigned int powerdown_adcs;
2f2f4251 197
403d1944
MP		 198 /* i/o switches */
199 unsigned int io_switch[2];
0fb87bb4 200 unsigned int clfe_swap;
7c2ba97b 201 unsigned int hp_switch;
5f10c4a9 202 unsigned int aloopback;
2f2f4251 203
c7d4b2fa
M		 204 struct hda_pcm pcm_rec[2]; /* PCM information */
205
206 /* dynamic controls and input_mux */
207 struct auto_pin_cfg autocfg;
208 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 209 struct snd_kcontrol_new *kctl_alloc;
8b65727b 210 struct hda_input_mux private_dimux;
c7d4b2fa 211 struct hda_input_mux private_imux;
b22b4821 212 struct hda_input_mux private_mono_mux;
2f2f4251
M		 213};
214
215static hda_nid_t stac9200_adc_nids[1] = {
216 0x03,
217};
218
219static hda_nid_t stac9200_mux_nids[1] = {
220 0x0c,
221};
222
223static hda_nid_t stac9200_dac_nids[1] = {
224 0x02,
225};
226
a64135a2
MR		 227static hda_nid_t stac92hd73xx_pwr_nids[8] = {
228 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
229 0x0f, 0x10, 0x11
230};
231
e1f0d669
MR		 232static hda_nid_t stac92hd73xx_adc_nids[2] = {
233 0x1a, 0x1b
234};
235
236#define STAC92HD73XX_NUM_DMICS 2
237static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
238 0x13, 0x14, 0
239};
240
241#define STAC92HD73_DAC_COUNT 5
242static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
243 0x15, 0x16, 0x17, 0x18, 0x19,
244};
245
246static hda_nid_t stac92hd73xx_mux_nids[4] = {
247 0x28, 0x29, 0x2a, 0x2b,
248};
249
250static hda_nid_t stac92hd73xx_dmux_nids[2] = {
251 0x20, 0x21,
252};
253
d0513fc6
MR		 254#define STAC92HD83XXX_NUM_DMICS 2
255static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
256 0x11, 0x12, 0
257};
258
259#define STAC92HD81_DAC_COUNT 2
260#define STAC92HD83_DAC_COUNT 3
261static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
262 0x13, 0x14, 0x22,
263};
264
265static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
266 0x17, 0x18,
267};
268
269static hda_nid_t stac92hd83xxx_adc_nids[2] = {
270 0x15, 0x16,
271};
272
273static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
274 0xa, 0xb, 0xd, 0xe,
275};
276
277static unsigned int stac92hd83xxx_pwr_mapping[4] = {
278 0x03, 0x0c, 0x10, 0x40,
279};
280
a64135a2
MR		 281static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
282 0x0a, 0x0d, 0x0f
283};
284
e035b841
MR		 285static hda_nid_t stac92hd71bxx_adc_nids[2] = {
286 0x12, 0x13,
287};
288
289static hda_nid_t stac92hd71bxx_mux_nids[2] = {
290 0x1a, 0x1b
291};
292
e1f0d669
MR		 293static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
294 0x1c,
295};
296
aea7bb0a 297static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 298 0x10, /*0x11, */
299};
300
301#define STAC92HD71BXX_NUM_DMICS 2
302static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
303 0x18, 0x19, 0
304};
305
8e21c34c
TD		 306static hda_nid_t stac925x_adc_nids[1] = {
307 0x03,
308};
309
310static hda_nid_t stac925x_mux_nids[1] = {
311 0x0f,
312};
313
314static hda_nid_t stac925x_dac_nids[1] = {
315 0x02,
316};
317
f6e9852a
TI		 318#define STAC925X_NUM_DMICS 1
319static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
320 0x15, 0
2c11f955
TD		 321};
322
1697055e
TI		 323static hda_nid_t stac925x_dmux_nids[1] = {
324 0x14,
325};
326
2f2f4251
M		 327static hda_nid_t stac922x_adc_nids[2] = {
328 0x06, 0x07,
329};
330
331static hda_nid_t stac922x_mux_nids[2] = {
332 0x12, 0x13,
333};
334
3cc08dc6
MP		 335static hda_nid_t stac927x_adc_nids[3] = {
336 0x07, 0x08, 0x09
337};
338
339static hda_nid_t stac927x_mux_nids[3] = {
340 0x15, 0x16, 0x17
341};
342
b76c850f
MR		 343static hda_nid_t stac927x_dac_nids[6] = {
344 0x02, 0x03, 0x04, 0x05, 0x06, 0
345};
346
e1f0d669
MR		 347static hda_nid_t stac927x_dmux_nids[1] = {
348 0x1b,
349};
350
7f16859a
MR		 351#define STAC927X_NUM_DMICS 2
352static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
353 0x13, 0x14, 0
354};
355
f3302a59
MP		 356static hda_nid_t stac9205_adc_nids[2] = {
357 0x12, 0x13
358};
359
360static hda_nid_t stac9205_mux_nids[2] = {
361 0x19, 0x1a
362};
363
e1f0d669 364static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 365 0x1d,
e1f0d669
MR		 366};
367
f6e9852a
TI		 368#define STAC9205_NUM_DMICS 2
369static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
370 0x17, 0x18, 0
8b65727b
MP		 371};
372
c7d4b2fa 373static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 374 0x08, 0x09, 0x0d, 0x0e,
375 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 376};
377
8e21c34c
TD		 378static hda_nid_t stac925x_pin_nids[8] = {
379 0x07, 0x08, 0x0a, 0x0b,
380 0x0c, 0x0d, 0x10, 0x11,
381};
382
2f2f4251
M		 383static hda_nid_t stac922x_pin_nids[10] = {
384 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
385 0x0f, 0x10, 0x11, 0x15, 0x1b,
386};
387
a7662640 388static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 389 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
390 0x0f, 0x10, 0x11, 0x12, 0x13,
a7662640 391 0x14, 0x1e, 0x22
e1f0d669
MR		 392};
393
d0513fc6
MR		 394static hda_nid_t stac92hd83xxx_pin_nids[14] = {
395 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
396 0x0f, 0x10, 0x11, 0x12, 0x13,
397 0x1d, 0x1e, 0x1f, 0x20
398};
e035b841
MR		 399static hda_nid_t stac92hd71bxx_pin_nids[10] = {
400 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
401 0x0f, 0x14, 0x18, 0x19, 0x1e,
402};
403
3cc08dc6
MP		 404static hda_nid_t stac927x_pin_nids[14] = {
405 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
406 0x0f, 0x10, 0x11, 0x12, 0x13,
407 0x14, 0x21, 0x22, 0x23,
408};
409
f3302a59
MP		 410static hda_nid_t stac9205_pin_nids[12] = {
411 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
412 0x0f, 0x14, 0x16, 0x17, 0x18,
413 0x21, 0x22,
f3302a59
MP		 414};
415
8b65727b
MP		 416static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
417 struct snd_ctl_elem_info *uinfo)
418{
419 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
420 struct sigmatel_spec *spec = codec->spec;
421 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
422}
423
424static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
425 struct snd_ctl_elem_value *ucontrol)
426{
427 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
428 struct sigmatel_spec *spec = codec->spec;
e1f0d669 429 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 430
e1f0d669 431 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 432 return 0;
433}
434
435static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
436 struct snd_ctl_elem_value *ucontrol)
437{
438 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
439 struct sigmatel_spec *spec = codec->spec;
e1f0d669 440 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 441
442 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 443 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 444}
445
c8b6bf9b 446static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 447{
448 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
449 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 450 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 451}
452
c8b6bf9b 453static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 454{
455 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
456 struct sigmatel_spec *spec = codec->spec;
457 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
458
459 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
460 return 0;
461}
462
c8b6bf9b 463static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 464{
465 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
466 struct sigmatel_spec *spec = codec->spec;
467 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
468
c7d4b2fa 469 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 470 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
471}
472
b22b4821
MR		 473static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
474 struct snd_ctl_elem_info *uinfo)
475{
476 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
477 struct sigmatel_spec *spec = codec->spec;
478 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
479}
480
481static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
482 struct snd_ctl_elem_value *ucontrol)
483{
484 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
485 struct sigmatel_spec *spec = codec->spec;
486
487 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
488 return 0;
489}
490
491static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
492 struct snd_ctl_elem_value *ucontrol)
493{
494 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
495 struct sigmatel_spec *spec = codec->spec;
496
497 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
498 spec->mono_nid, &spec->cur_mmux);
499}
500
5f10c4a9
ML		 501#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
502
503static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
504 struct snd_ctl_elem_value *ucontrol)
505{
506 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 507 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 508 struct sigmatel_spec *spec = codec->spec;
509
e1f0d669
MR		 510 ucontrol->value.integer.value[0] = !!(spec->aloopback &
511 (spec->aloopback_mask << idx));
5f10c4a9
ML		 512 return 0;
513}
514
515static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol)
517{
518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
519 struct sigmatel_spec *spec = codec->spec;
e1f0d669 520 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 521 unsigned int dac_mode;
e1f0d669 522 unsigned int val, idx_val;
5f10c4a9 523
e1f0d669
MR		 524 idx_val = spec->aloopback_mask << idx;
525 if (ucontrol->value.integer.value[0])
526 val = spec->aloopback | idx_val;
527 else
528 val = spec->aloopback & ~idx_val;
68ea7b2f 529 if (spec->aloopback == val)
5f10c4a9
ML		 530 return 0;
531
68ea7b2f 532 spec->aloopback = val;
5f10c4a9 533
e1f0d669
MR		 534 /* Only return the bits defined by the shift value of the
535 * first two bytes of the mask
536 */
5f10c4a9 537 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 538 kcontrol->private_value & 0xFFFF, 0x0);
539 dac_mode >>= spec->aloopback_shift;
5f10c4a9 540
e1f0d669 541 if (spec->aloopback & idx_val) {
5f10c4a9 542 snd_hda_power_up(codec);
e1f0d669 543 dac_mode |= idx_val;
5f10c4a9
ML		 544 } else {
545 snd_hda_power_down(codec);
e1f0d669 546 dac_mode &= ~idx_val;
5f10c4a9
ML		 547 }
548
549 snd_hda_codec_write_cache(codec, codec->afg, 0,
550 kcontrol->private_value >> 16, dac_mode);
551
552 return 1;
553}
554
c7d4b2fa 555static struct hda_verb stac9200_core_init[] = {
2f2f4251 556 /* set dac0mux for dac converter */
c7d4b2fa 557 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 558 {}
559};
560
1194b5b7
TI		 561static struct hda_verb stac9200_eapd_init[] = {
562 /* set dac0mux for dac converter */
563 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
564 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
565 {}
566};
567
e1f0d669
MR		 568static struct hda_verb stac92hd73xx_6ch_core_init[] = {
569 /* set master volume and direct control */
570 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
571 /* setup audio connections */
572 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
573 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
574 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
575 /* setup adcs to point to mixer */
576 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
577 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 578 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
579 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
580 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
581 /* setup import muxs */
582 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
583 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
584 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
585 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
586 {}
587};
588
d654a660
MR		 589static struct hda_verb dell_eq_core_init[] = {
590 /* set master volume to max value without distortion
591 * and direct control */
592 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
593 /* setup audio connections */
594 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
595 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
596 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
597 /* setup adcs to point to mixer */
598 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
599 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
600 /* setup import muxs */
601 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
602 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
603 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
604 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
605 {}
606};
607
52fe0f9d 608static struct hda_verb dell_m6_core_init[] = {
20f5f95d
MR		 609 /* set master volume to max value without distortion
610 * and direct control */
611 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
52fe0f9d 612 /* setup audio connections */
7747ecce
MR		 613 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
614 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 615 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
616 /* setup adcs to point to mixer */
617 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
618 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
619 /* setup import muxs */
620 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
621 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
622 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
623 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
624 {}
625};
626
e1f0d669
MR		 627static struct hda_verb stac92hd73xx_8ch_core_init[] = {
628 /* set master volume and direct control */
629 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
630 /* setup audio connections */
631 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
632 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
633 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
634 /* connect hp ports to dac3 */
635 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
636 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
637 /* setup adcs to point to mixer */
638 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
639 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 640 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
641 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
642 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
643 /* setup import muxs */
644 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
645 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
646 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
647 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
648 {}
649};
650
651static struct hda_verb stac92hd73xx_10ch_core_init[] = {
652 /* set master volume and direct control */
653 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
654 /* setup audio connections */
655 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
656 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
657 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
658 /* dac3 is connected to import3 mux */
659 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
660 /* connect hp ports to dac4 */
661 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
662 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
663 /* setup adcs to point to mixer */
664 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
665 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 666 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
667 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
668 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
669 /* setup import muxs */
670 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
671 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
672 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
673 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
674 {}
675};
676
d0513fc6
MR		 677static struct hda_verb stac92hd83xxx_core_init[] = {
678 /* start of config #1 */
679 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
680
681 /* start of config #2 */
682 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
683 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
684 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
685
686 /* power state controls amps */
687 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
688};
689
e035b841 690static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 691 /* set master volume and direct control */
692 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
693 /* connect headphone jack to dac1 */
694 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
695 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
696 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
697 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
698 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
699 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 700};
701
aafc4412 702#define HD_DISABLE_PORTF 3
541eee87 703static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 704 /* start of config #1 */
705
706 /* connect port 0f to audio mixer */
707 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
708 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
709 /* unmute right and left channels for node 0x0f */
710 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
711 /* start of config #2 */
712
e035b841
MR		 713 /* set master volume and direct control */
714 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
715 /* connect headphone jack to dac1 */
716 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 717 /* connect port 0d to audio mixer */
9b35947f 718 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
9b35947f
MR		 719 /* unmute dac0 input in audio mixer */
720 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
aafc4412 721 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 722 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
723 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 724 {}
725};
726
8e21c34c
TD		 727static struct hda_verb stac925x_core_init[] = {
728 /* set dac0mux for dac converter */
729 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
730 {}
731};
732
c7d4b2fa 733static struct hda_verb stac922x_core_init[] = {
2f2f4251 734 /* set master volume and direct control */
c7d4b2fa 735 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 736 {}
737};
738
93ed1503 739static struct hda_verb d965_core_init[] = {
19039bd0 740 /* set master volume and direct control */
93ed1503 741 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 742 /* unmute node 0x1b */
743 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
744 /* select node 0x03 as DAC */
745 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
746 {}
747};
748
3cc08dc6
MP		 749static struct hda_verb stac927x_core_init[] = {
750 /* set master volume and direct control */
751 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 752 /* enable analog pc beep path */
753 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 754 {}
755};
756
f3302a59
MP		 757static struct hda_verb stac9205_core_init[] = {
758 /* set master volume and direct control */
759 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 760 /* enable analog pc beep path */
761 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 762 {}
763};
764
b22b4821
MR		 765#define STAC_MONO_MUX \
766 { \
767 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
768 .name = "Mono Mux", \
769 .count = 1, \
770 .info = stac92xx_mono_mux_enum_info, \
771 .get = stac92xx_mono_mux_enum_get, \
772 .put = stac92xx_mono_mux_enum_put, \
773 }
774
9e05b7a3 775#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 776 { \
777 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
778 .name = "Input Source", \
9e05b7a3 779 .count = cnt, \
ca7c5a8b
ML		 780 .info = stac92xx_mux_enum_info, \
781 .get = stac92xx_mux_enum_get, \
782 .put = stac92xx_mux_enum_put, \
783 }
784
e1f0d669 785#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 786 { \
787 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
788 .name = "Analog Loopback", \
e1f0d669 789 .count = cnt, \
5f10c4a9
ML		 790 .info = stac92xx_aloopback_info, \
791 .get = stac92xx_aloopback_get, \
792 .put = stac92xx_aloopback_put, \
793 .private_value = verb_read | (verb_write << 16), \
794 }
795
c8b6bf9b 796static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 797 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
798 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 799 STAC_INPUT_SOURCE(1),
2f2f4251
M		 800 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
801 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 802 { } /* end */
803};
804
e1f0d669 805static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 806 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
807
e1f0d669
MR		 808 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
809 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
810
811 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
812 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
813
814 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
815 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
816
817 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
818 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
819
820 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
821 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
822
823 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
824 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
825
826 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
827 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
828 { } /* end */
829};
830
831static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 832 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
833
e1f0d669
MR		 834 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
835 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
836
837 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
838 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
839
840 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
841 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
842
843 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
844 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
845
846 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
847 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
848
849 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
850 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
851
852 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
853 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
854 { } /* end */
855};
856
857static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 858 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
859
e1f0d669
MR		 860 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
861 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
862
863 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
864 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
865
866 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
867 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
868
869 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
870 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
871
872 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
873 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
874
875 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
876 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
877
878 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
879 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
880 { } /* end */
881};
882
d0513fc6
MR		 883
884static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
885 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
886 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
887
888 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
889 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
890
891 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
892 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
893
894 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
895 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
896
897 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
898 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
899
900 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
901 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
902
903 /*
904 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
905 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
906 */
907 { } /* end */
908};
909
541eee87 910static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 911 STAC_INPUT_SOURCE(2),
e035b841 912
9b35947f
MR		 913 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
914 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 915
916 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
917 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 918 /* analog pc-beep replaced with digital beep support */
919 /*
f7c5dda2
MR		 920 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
921 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 922 */
f7c5dda2 923
9b35947f
MR		 924 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
925 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 926 { } /* end */
927};
928
541eee87 929static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 930 STAC_INPUT_SOURCE(2),
931 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
932
541eee87
MR		 933 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
934 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 935
936 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
937 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 938 { } /* end */
939};
940
8e21c34c 941static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 942 STAC_INPUT_SOURCE(1),
8e21c34c 943 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 944 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 945 { } /* end */
946};
947
9e05b7a3 948static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 949 STAC_INPUT_SOURCE(2),
e1f0d669 950 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 951
952 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
953 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 954
955 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
956 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 957 { } /* end */
958};
959
19039bd0 960/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 961static struct snd_kcontrol_new stac922x_mixer[] = {
962 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 963 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
964 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 965
966 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
967 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 968 { } /* end */
969};
970
9e05b7a3 971
d1d985f0 972static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 973 STAC_INPUT_SOURCE(3),
e1f0d669 974 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 975
9e05b7a3
ML		 976 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
977 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 978
979 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
980 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 981
982 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
983 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 984 { } /* end */
985};
986
1697055e
TI		 987static struct snd_kcontrol_new stac_dmux_mixer = {
988 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
989 .name = "Digital Input Source",
990 /* count set later */
991 .info = stac92xx_dmux_enum_info,
992 .get = stac92xx_dmux_enum_get,
993 .put = stac92xx_dmux_enum_put,
994};
995
2134ea4f
TI		 996static const char *slave_vols[] = {
997 "Front Playback Volume",
998 "Surround Playback Volume",
999 "Center Playback Volume",
1000 "LFE Playback Volume",
1001 "Side Playback Volume",
1002 "Headphone Playback Volume",
1003 "Headphone Playback Volume",
1004 "Speaker Playback Volume",
1005 "External Speaker Playback Volume",
1006 "Speaker2 Playback Volume",
1007 NULL
1008};
1009
1010static const char *slave_sws[] = {
1011 "Front Playback Switch",
1012 "Surround Playback Switch",
1013 "Center Playback Switch",
1014 "LFE Playback Switch",
1015 "Side Playback Switch",
1016 "Headphone Playback Switch",
1017 "Headphone Playback Switch",
1018 "Speaker Playback Switch",
1019 "External Speaker Playback Switch",
1020 "Speaker2 Playback Switch",
edb54a55 1021 "IEC958 Playback Switch",
2134ea4f
TI		 1022 NULL
1023};
1024
2f2f4251
M		 1025static int stac92xx_build_controls(struct hda_codec *codec)
1026{
1027 struct sigmatel_spec *spec = codec->spec;
1028 int err;
c7d4b2fa 1029 int i;
2f2f4251
M		 1030
1031 err = snd_hda_add_new_ctls(codec, spec->mixer);
1032 if (err < 0)
1033 return err;
c7d4b2fa
M		 1034
1035 for (i = 0; i < spec->num_mixers; i++) {
1036 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1037 if (err < 0)
1038 return err;
1039 }
1697055e
TI		 1040 if (spec->num_dmuxes > 0) {
1041 stac_dmux_mixer.count = spec->num_dmuxes;
1042 err = snd_ctl_add(codec->bus->card,
1043 snd_ctl_new1(&stac_dmux_mixer, codec));
1044 if (err < 0)
1045 return err;
1046 }
c7d4b2fa 1047
dabbed6f
M		 1048 if (spec->multiout.dig_out_nid) {
1049 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1050 if (err < 0)
1051 return err;
9a08160b
TI		 1052 err = snd_hda_create_spdif_share_sw(codec,
1053 &spec->multiout);
1054 if (err < 0)
1055 return err;
1056 spec->multiout.share_spdif = 1;
dabbed6f
M		 1057 }
1058 if (spec->dig_in_nid) {
1059 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1060 if (err < 0)
1061 return err;
1062 }
2134ea4f
TI		 1063
1064 /* if we have no master control, let's create it */
1065 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1066 unsigned int vmaster_tlv[4];
2134ea4f 1067 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1068 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1069 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1070 vmaster_tlv, slave_vols);
2134ea4f
TI		 1071 if (err < 0)
1072 return err;
1073 }
1074 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1075 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1076 NULL, slave_sws);
1077 if (err < 0)
1078 return err;
1079 }
1080
dabbed6f 1081 return 0;
2f2f4251
M		 1082}
1083
403d1944 1084static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1085 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1086 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1087};
1088
dfe495d0
TI		 1089/*
1090 STAC 9200 pin configs for
1091 102801A8
1092 102801DE
1093 102801E8
1094*/
1095static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1096 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1097 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1098};
1099
1100/*
1101 STAC 9200 pin configs for
1102 102801C0
1103 102801C1
1104*/
1105static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1106 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1107 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1108};
1109
1110/*
1111 STAC 9200 pin configs for
1112 102801C4 (Dell Dimension E310)
1113 102801C5
1114 102801C7
1115 102801D9
1116 102801DA
1117 102801E3
1118*/
1119static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1120 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1121 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1122};
1123
1124
1125/*
1126 STAC 9200-32 pin configs for
1127 102801B5 (Dell Inspiron 630m)
1128 102801D8 (Dell Inspiron 640m)
1129*/
1130static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1131 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1132 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1133};
1134
1135/*
1136 STAC 9200-32 pin configs for
1137 102801C2 (Dell Latitude D620)
1138 102801C8
1139 102801CC (Dell Latitude D820)
1140 102801D4
1141 102801D6
1142*/
1143static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1144 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1145 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1146};
1147
1148/*
1149 STAC 9200-32 pin configs for
1150 102801CE (Dell XPS M1710)
1151 102801CF (Dell Precision M90)
1152*/
1153static unsigned int dell9200_m23_pin_configs[8] = {
1154 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1155 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1156};
1157
1158/*
1159 STAC 9200-32 pin configs for
1160 102801C9
1161 102801CA
1162 102801CB (Dell Latitude 120L)
1163 102801D3
1164*/
1165static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1166 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1167 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1168};
1169
1170/*
1171 STAC 9200-32 pin configs for
1172 102801BD (Dell Inspiron E1505n)
1173 102801EE
1174 102801EF
1175*/
1176static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1177 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1178 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1179};
1180
1181/*
1182 STAC 9200-32 pin configs for
1183 102801F5 (Dell Inspiron 1501)
1184 102801F6
1185*/
1186static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1187 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1188 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1189};
1190
1191/*
1192 STAC 9200-32
1193 102801CD (Dell Inspiron E1705/9400)
1194*/
1195static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1196 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1197 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1198};
1199
bf277785
TD		 1200static unsigned int oqo9200_pin_configs[8] = {
1201 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1202 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1203};
1204
dfe495d0 1205
f5fcc13c
TI		 1206static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1207 [STAC_REF] = ref9200_pin_configs,
bf277785 1208 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1209 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1210 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1211 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1212 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1213 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1214 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1215 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1216 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1217 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1218 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1219 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1220};
1221
f5fcc13c
TI		 1222static const char *stac9200_models[STAC_9200_MODELS] = {
1223 [STAC_REF] = "ref",
bf277785 1224 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1225 [STAC_9200_DELL_D21] = "dell-d21",
1226 [STAC_9200_DELL_D22] = "dell-d22",
1227 [STAC_9200_DELL_D23] = "dell-d23",
1228 [STAC_9200_DELL_M21] = "dell-m21",
1229 [STAC_9200_DELL_M22] = "dell-m22",
1230 [STAC_9200_DELL_M23] = "dell-m23",
1231 [STAC_9200_DELL_M24] = "dell-m24",
1232 [STAC_9200_DELL_M25] = "dell-m25",
1233 [STAC_9200_DELL_M26] = "dell-m26",
1234 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1235 [STAC_9200_GATEWAY] = "gateway",
117f257d 1236 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1237};
1238
1239static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1240 /* SigmaTel reference board */
1241 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1242 "DFI LanParty", STAC_REF),
e7377071 1243 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1244 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1245 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1246 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1247 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1248 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1249 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1250 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1251 "unknown Dell", STAC_9200_DELL_D22),
1252 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1253 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1254 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1255 "Dell Latitude D620", STAC_9200_DELL_M22),
1256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1257 "unknown Dell", STAC_9200_DELL_D23),
1258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1259 "unknown Dell", STAC_9200_DELL_D23),
1260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1261 "unknown Dell", STAC_9200_DELL_M22),
1262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1263 "unknown Dell", STAC_9200_DELL_M24),
1264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1265 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1267 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1269 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1271 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1273 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1275 "Dell Precision M90", STAC_9200_DELL_M23),
1276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1277 "unknown Dell", STAC_9200_DELL_M22),
1278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1279 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1281 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1283 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1285 "unknown Dell", STAC_9200_DELL_D23),
1286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1287 "unknown Dell", STAC_9200_DELL_D23),
1288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1289 "unknown Dell", STAC_9200_DELL_D21),
1290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1291 "unknown Dell", STAC_9200_DELL_D23),
1292 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1293 "unknown Dell", STAC_9200_DELL_D21),
1294 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1295 "unknown Dell", STAC_9200_DELL_M25),
1296 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1297 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1298 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1299 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1300 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1301 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1302 /* Panasonic */
117f257d 1303 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1304 /* Gateway machines needs EAPD to be set on resume */
1305 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1306 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1307 STAC_9200_GATEWAY),
1308 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1309 STAC_9200_GATEWAY),
bf277785
TD		 1310 /* OQO Mobile */
1311 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1312 {} /* terminator */
1313};
1314
8e21c34c
TD		 1315static unsigned int ref925x_pin_configs[8] = {
1316 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1317 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1318};
1319
1320static unsigned int stac925x_MA6_pin_configs[8] = {
1321 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1322 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1323};
1324
2c11f955
TD		 1325static unsigned int stac925x_PA6_pin_configs[8] = {
1326 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1327 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1328};
1329
8e21c34c 1330static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1331 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1332 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1333};
1334
1335static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1336 [STAC_REF] = ref925x_pin_configs,
1337 [STAC_M2_2] = stac925xM2_2_pin_configs,
1338 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1339 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1340};
1341
1342static const char *stac925x_models[STAC_925x_MODELS] = {
1343 [STAC_REF] = "ref",
1344 [STAC_M2_2] = "m2-2",
1345 [STAC_MA6] = "m6",
2c11f955 1346 [STAC_PA6] = "pa6",
8e21c34c
TD		 1347};
1348
1349static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1350 /* SigmaTel reference board */
1351 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1352 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1353 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1354 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1355 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1356 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1357 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1358 {} /* terminator */
1359};
1360
a7662640 1361static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1362 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1363 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1364 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1365 0x01452050,
1366};
1367
1368static unsigned int dell_m6_pin_configs[13] = {
1369 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1370 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1371 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1372 0x4f0000f0,
e1f0d669
MR		 1373};
1374
1375static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1376 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1377 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1378};
1379
1380static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1381 [STAC_92HD73XX_REF] = "ref",
a7662640 1382 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1383};
1384
1385static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1386 /* SigmaTel reference board */
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1388 "DFI LanParty", STAC_92HD73XX_REF),
1389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1390 "unknown Dell", STAC_DELL_M6),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1392 "unknown Dell", STAC_DELL_M6),
1393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1394 "unknown Dell", STAC_DELL_M6),
1395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1396 "unknown Dell", STAC_DELL_M6),
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1398 "unknown Dell", STAC_DELL_M6),
1399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1400 "unknown Dell", STAC_DELL_M6),
1401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1402 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1403 {} /* terminator */
1404};
1405
d0513fc6
MR		 1406static unsigned int ref92hd83xxx_pin_configs[14] = {
1407 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1408 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1409 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1410 0x01451160, 0x98560170,
1411};
1412
1413static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1414 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1415};
1416
1417static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1418 [STAC_92HD83XXX_REF] = "ref",
1419};
1420
1421static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1422 /* SigmaTel reference board */
1423 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1424 "DFI LanParty", STAC_92HD71BXX_REF),
1425};
1426
e035b841
MR		 1427static unsigned int ref92hd71bxx_pin_configs[10] = {
1428 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1429 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1430 0x90a000f0, 0x01452050,
1431};
1432
aafc4412 1433static unsigned int dell_m4_1_pin_configs[10] = {
a7662640 1434 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1435 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
a7662640
MR		 1436 0x40f000f0, 0x4f0000f0,
1437};
1438
aafc4412 1439static unsigned int dell_m4_2_pin_configs[10] = {
a7662640
MR		 1440 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1441 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1442 0x40f000f0, 0x044413b0,
1443};
1444
e035b841
MR		 1445static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1446 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1447 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1448 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1449};
1450
1451static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1452 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1453 [STAC_DELL_M4_1] = "dell-m4-1",
1454 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1455};
1456
1457static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1458 /* SigmaTel reference board */
1459 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1460 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1461 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1462 "unknown Dell", STAC_DELL_M4_1),
1463 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1464 "unknown Dell", STAC_DELL_M4_1),
1465 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1466 "unknown Dell", STAC_DELL_M4_1),
1467 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1468 "unknown Dell", STAC_DELL_M4_1),
1469 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1470 "unknown Dell", STAC_DELL_M4_1),
1471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1472 "unknown Dell", STAC_DELL_M4_1),
1473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1474 "unknown Dell", STAC_DELL_M4_1),
1475 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1476 "unknown Dell", STAC_DELL_M4_2),
1477 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1478 "unknown Dell", STAC_DELL_M4_2),
1479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1480 "unknown Dell", STAC_DELL_M4_2),
1481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1482 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1483 {} /* terminator */
1484};
1485
403d1944
MP		 1486static unsigned int ref922x_pin_configs[10] = {
1487 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1488 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1489 0x40000100, 0x40000100,
1490};
1491
dfe495d0
TI		 1492/*
1493 STAC 922X pin configs for
1494 102801A7
1495 102801AB
1496 102801A9
1497 102801D1
1498 102801D2
1499*/
1500static unsigned int dell_922x_d81_pin_configs[10] = {
1501 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1502 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1503 0x01813122, 0x400001f2,
1504};
1505
1506/*
1507 STAC 922X pin configs for
1508 102801AC
1509 102801D0
1510*/
1511static unsigned int dell_922x_d82_pin_configs[10] = {
1512 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1513 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1514 0x01813122, 0x400001f1,
1515};
1516
1517/*
1518 STAC 922X pin configs for
1519 102801BF
1520*/
1521static unsigned int dell_922x_m81_pin_configs[10] = {
1522 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1523 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1524 0x40C003f1, 0x405003f0,
1525};
1526
1527/*
1528 STAC 9221 A1 pin configs for
1529 102801D7 (Dell XPS M1210)
1530*/
1531static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1532 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1533 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1534 0x508003f3, 0x405003f4,
1535};
1536
403d1944 1537static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1538 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1539 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1540 0x02a19120, 0x40000100,
1541};
1542
1543static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1544 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1545 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1546 0x02a19320, 0x40000100,
1547};
1548
5d5d3bc3
IZ		 1549static unsigned int intel_mac_v1_pin_configs[10] = {
1550 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1551 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1552 0x400000fc, 0x400000fb,
1553};
1554
1555static unsigned int intel_mac_v2_pin_configs[10] = {
1556 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1557 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1558 0x400000fc, 0x400000fb,
6f0778d8
NB		 1559};
1560
5d5d3bc3
IZ		 1561static unsigned int intel_mac_v3_pin_configs[10] = {
1562 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1563 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1564 0x400000fc, 0x400000fb,
1565};
1566
5d5d3bc3
IZ		 1567static unsigned int intel_mac_v4_pin_configs[10] = {
1568 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1569 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1570 0x400000fc, 0x400000fb,
1571};
1572
5d5d3bc3
IZ		 1573static unsigned int intel_mac_v5_pin_configs[10] = {
1574 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1575 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1576 0x400000fc, 0x400000fb,
0dae0f83
TI		 1577};
1578
8c650087
MCC		 1579static unsigned int ecs202_pin_configs[10] = {
1580 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1581 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1582 0x9037012e, 0x40e000f2,
1583};
76c08828 1584
19039bd0 1585static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1586 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1587 [STAC_D945GTP3] = d945gtp3_pin_configs,
1588 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1589 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1590 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1591 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1592 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1593 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1594 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1595 /* for backward compatibility */
5d5d3bc3
IZ		 1596 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1597 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1598 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1599 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1600 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1601 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1602 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1603 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1604 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1605 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1606 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1607};
1608
f5fcc13c
TI		 1609static const char *stac922x_models[STAC_922X_MODELS] = {
1610 [STAC_D945_REF] = "ref",
1611 [STAC_D945GTP5] = "5stack",
1612 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1613 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1614 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1615 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1616 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1617 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1618 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1619 /* for backward compatibility */
f5fcc13c 1620 [STAC_MACMINI] = "macmini",
3fc24d85 1621 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1622 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1623 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1624 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1625 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1626 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1627 [STAC_922X_DELL_D81] = "dell-d81",
1628 [STAC_922X_DELL_D82] = "dell-d82",
1629 [STAC_922X_DELL_M81] = "dell-m81",
1630 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1631};
1632
1633static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1634 /* SigmaTel reference board */
1635 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1636 "DFI LanParty", STAC_D945_REF),
1637 /* Intel 945G based systems */
1638 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1639 "Intel D945G", STAC_D945GTP3),
1640 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1641 "Intel D945G", STAC_D945GTP3),
1642 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1643 "Intel D945G", STAC_D945GTP3),
1644 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1645 "Intel D945G", STAC_D945GTP3),
1646 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1647 "Intel D945G", STAC_D945GTP3),
1648 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1649 "Intel D945G", STAC_D945GTP3),
1650 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1651 "Intel D945G", STAC_D945GTP3),
1652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1653 "Intel D945G", STAC_D945GTP3),
1654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1655 "Intel D945G", STAC_D945GTP3),
1656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1657 "Intel D945G", STAC_D945GTP3),
1658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1659 "Intel D945G", STAC_D945GTP3),
1660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1661 "Intel D945G", STAC_D945GTP3),
1662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1663 "Intel D945G", STAC_D945GTP3),
1664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1665 "Intel D945G", STAC_D945GTP3),
1666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1667 "Intel D945G", STAC_D945GTP3),
1668 /* Intel D945G 5-stack systems */
1669 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1670 "Intel D945G", STAC_D945GTP5),
1671 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1672 "Intel D945G", STAC_D945GTP5),
1673 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1674 "Intel D945G", STAC_D945GTP5),
1675 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1676 "Intel D945G", STAC_D945GTP5),
1677 /* Intel 945P based systems */
1678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1679 "Intel D945P", STAC_D945GTP3),
1680 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1681 "Intel D945P", STAC_D945GTP3),
1682 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1683 "Intel D945P", STAC_D945GTP3),
1684 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1685 "Intel D945P", STAC_D945GTP3),
1686 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1687 "Intel D945P", STAC_D945GTP3),
1688 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1689 "Intel D945P", STAC_D945GTP5),
1690 /* other systems */
536319af 1691 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1692 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1693 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1694 /* Dell systems */
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1696 "unknown Dell", STAC_922X_DELL_D81),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1698 "unknown Dell", STAC_922X_DELL_D81),
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1700 "unknown Dell", STAC_922X_DELL_D81),
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1702 "unknown Dell", STAC_922X_DELL_D82),
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1704 "unknown Dell", STAC_922X_DELL_M81),
1705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1706 "unknown Dell", STAC_922X_DELL_D82),
1707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1708 "unknown Dell", STAC_922X_DELL_D81),
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1710 "unknown Dell", STAC_922X_DELL_D81),
1711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1712 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1713 /* ECS/PC Chips boards */
1714 SND_PCI_QUIRK(0x1019, 0x2144,
1715 "ECS/PC chips", STAC_ECS_202),
1716 SND_PCI_QUIRK(0x1019, 0x2608,
1717 "ECS/PC chips", STAC_ECS_202),
1718 SND_PCI_QUIRK(0x1019, 0x2633,
1719 "ECS/PC chips P17G/1333", STAC_ECS_202),
1720 SND_PCI_QUIRK(0x1019, 0x2811,
1721 "ECS/PC chips", STAC_ECS_202),
1722 SND_PCI_QUIRK(0x1019, 0x2812,
1723 "ECS/PC chips", STAC_ECS_202),
1724 SND_PCI_QUIRK(0x1019, 0x2813,
1725 "ECS/PC chips", STAC_ECS_202),
1726 SND_PCI_QUIRK(0x1019, 0x2814,
1727 "ECS/PC chips", STAC_ECS_202),
1728 SND_PCI_QUIRK(0x1019, 0x2815,
1729 "ECS/PC chips", STAC_ECS_202),
1730 SND_PCI_QUIRK(0x1019, 0x2816,
1731 "ECS/PC chips", STAC_ECS_202),
1732 SND_PCI_QUIRK(0x1019, 0x2817,
1733 "ECS/PC chips", STAC_ECS_202),
1734 SND_PCI_QUIRK(0x1019, 0x2818,
1735 "ECS/PC chips", STAC_ECS_202),
1736 SND_PCI_QUIRK(0x1019, 0x2819,
1737 "ECS/PC chips", STAC_ECS_202),
1738 SND_PCI_QUIRK(0x1019, 0x2820,
1739 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1740 {} /* terminator */
1741};
1742
3cc08dc6 1743static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1744 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1745 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1746 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1747 0x01c42190, 0x40000100,
3cc08dc6
MP		 1748};
1749
93ed1503 1750static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1751 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1752 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1753 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1754 0x40000100, 0x40000100
1755};
1756
93ed1503
TD		 1757static unsigned int d965_5st_pin_configs[14] = {
1758 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1759 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1760 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1761 0x40000100, 0x40000100
1762};
1763
4ff076e5
TD		 1764static unsigned int dell_3st_pin_configs[14] = {
1765 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1766 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1767 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1768 0x40c003fc, 0x40000100
1769};
1770
93ed1503 1771static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1772 [STAC_D965_REF] = ref927x_pin_configs,
1773 [STAC_D965_3ST] = d965_3st_pin_configs,
1774 [STAC_D965_5ST] = d965_5st_pin_configs,
1775 [STAC_DELL_3ST] = dell_3st_pin_configs,
1776 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1777};
1778
f5fcc13c 1779static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1780 [STAC_D965_REF] = "ref",
1781 [STAC_D965_3ST] = "3stack",
1782 [STAC_D965_5ST] = "5stack",
1783 [STAC_DELL_3ST] = "dell-3stack",
1784 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1785};
1786
1787static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1788 /* SigmaTel reference board */
1789 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1790 "DFI LanParty", STAC_D965_REF),
81d3dbde 1791 /* Intel 946 based systems */
f5fcc13c
TI		 1792 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1793 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1794 /* 965 based 3 stack systems */
f5fcc13c
TI		 1795 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1796 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1797 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1798 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1800 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1801 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1802 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1804 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1805 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1806 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1808 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1809 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1810 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1811 /* Dell 3 stack systems */
8e9068b1 1812 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1814 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1816 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1818 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 1820 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1822 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1824 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1825 /* 965 based 5 stack systems */
f5fcc13c
TI		 1826 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1828 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1830 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1832 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1833 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1834 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1835 {} /* terminator */
1836};
1837
f3302a59
MP		 1838static unsigned int ref9205_pin_configs[12] = {
1839 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1840 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1841 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1842};
1843
dfe495d0
TI		 1844/*
1845 STAC 9205 pin configs for
1846 102801F1
1847 102801F2
1848 102801FC
1849 102801FD
1850 10280204
1851 1028021F
3fa2ef74 1852 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1853*/
1854static unsigned int dell_9205_m42_pin_configs[12] = {
1855 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1856 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1857 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1858};
1859
1860/*
1861 STAC 9205 pin configs for
1862 102801F9
1863 102801FA
1864 102801FE
1865 102801FF (Dell Precision M4300)
1866 10280206
1867 10280200
1868 10280201
1869*/
1870static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1871 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1872 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1873 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1874};
1875
dfe495d0 1876static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1877 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1878 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1879 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1880};
1881
f5fcc13c 1882static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1883 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1884 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1885 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1886 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1887};
1888
f5fcc13c
TI		 1889static const char *stac9205_models[STAC_9205_MODELS] = {
1890 [STAC_9205_REF] = "ref",
dfe495d0 1891 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1892 [STAC_9205_DELL_M43] = "dell-m43",
1893 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1894};
1895
1896static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1897 /* SigmaTel reference board */
1898 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1899 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1900 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1901 "unknown Dell", STAC_9205_DELL_M42),
1902 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1903 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1904 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 1905 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1906 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1907 "Dell Precision", STAC_9205_DELL_M43),
1908 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1909 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1910 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1911 "unknown Dell", STAC_9205_DELL_M42),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1913 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1914 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1915 "Dell Precision", STAC_9205_DELL_M43),
1916 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1917 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 1918 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1919 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 1920 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1921 "Dell Precision", STAC_9205_DELL_M43),
1922 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1923 "Dell Precision", STAC_9205_DELL_M43),
1924 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1925 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1926 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1927 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1928 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1929 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1930 {} /* terminator */
1931};
1932
11b44bbd
RF		 1933static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1934{
1935 int i;
1936 struct sigmatel_spec *spec = codec->spec;
1937
1938 if (! spec->bios_pin_configs) {
1939 spec->bios_pin_configs = kcalloc(spec->num_pins,
1940 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1941 if (! spec->bios_pin_configs)
1942 return -ENOMEM;
1943 }
1944
1945 for (i = 0; i < spec->num_pins; i++) {
1946 hda_nid_t nid = spec->pin_nids[i];
1947 unsigned int pin_cfg;
1948
1949 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1950 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1951 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1952 nid, pin_cfg);
1953 spec->bios_pin_configs[i] = pin_cfg;
1954 }
1955
1956 return 0;
1957}
1958
87d48363
MR		 1959static void stac92xx_set_config_reg(struct hda_codec *codec,
1960 hda_nid_t pin_nid, unsigned int pin_config)
1961{
1962 int i;
1963 snd_hda_codec_write(codec, pin_nid, 0,
1964 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1965 pin_config & 0x000000ff);
1966 snd_hda_codec_write(codec, pin_nid, 0,
1967 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1968 (pin_config & 0x0000ff00) >> 8);
1969 snd_hda_codec_write(codec, pin_nid, 0,
1970 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1971 (pin_config & 0x00ff0000) >> 16);
1972 snd_hda_codec_write(codec, pin_nid, 0,
1973 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1974 pin_config >> 24);
1975 i = snd_hda_codec_read(codec, pin_nid, 0,
1976 AC_VERB_GET_CONFIG_DEFAULT,
1977 0x00);
1978 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1979 pin_nid, i);
1980}
1981
2f2f4251
M		 1982static void stac92xx_set_config_regs(struct hda_codec *codec)
1983{
1984 int i;
1985 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1986
87d48363
MR		 1987 if (!spec->pin_configs)
1988 return;
11b44bbd 1989
87d48363
MR		 1990 for (i = 0; i < spec->num_pins; i++)
1991 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1992 spec->pin_configs[i]);
2f2f4251 1993}
2f2f4251 1994
dabbed6f 1995/*
c7d4b2fa 1996 * Analog playback callbacks
dabbed6f 1997 */
c7d4b2fa
M		 1998static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1999 struct hda_codec *codec,
c8b6bf9b 2000 struct snd_pcm_substream *substream)
2f2f4251 2001{
dabbed6f 2002 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2003 if (spec->stream_delay)
2004 msleep(spec->stream_delay);
9a08160b
TI		 2005 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2006 hinfo);
2f2f4251
M		 2007}
2008
2f2f4251
M		 2009static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2010 struct hda_codec *codec,
2011 unsigned int stream_tag,
2012 unsigned int format,
c8b6bf9b 2013 struct snd_pcm_substream *substream)
2f2f4251
M		 2014{
2015 struct sigmatel_spec *spec = codec->spec;
403d1944 2016 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2017}
2018
2019static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2020 struct hda_codec *codec,
c8b6bf9b 2021 struct snd_pcm_substream *substream)
2f2f4251
M		 2022{
2023 struct sigmatel_spec *spec = codec->spec;
2024 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2025}
2026
dabbed6f
M		 2027/*
2028 * Digital playback callbacks
2029 */
2030static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2031 struct hda_codec *codec,
c8b6bf9b 2032 struct snd_pcm_substream *substream)
dabbed6f
M		 2033{
2034 struct sigmatel_spec *spec = codec->spec;
2035 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2036}
2037
2038static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2039 struct hda_codec *codec,
c8b6bf9b 2040 struct snd_pcm_substream *substream)
dabbed6f
M		 2041{
2042 struct sigmatel_spec *spec = codec->spec;
2043 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2044}
2045
6b97eb45
TI		 2046static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2047 struct hda_codec *codec,
2048 unsigned int stream_tag,
2049 unsigned int format,
2050 struct snd_pcm_substream *substream)
2051{
2052 struct sigmatel_spec *spec = codec->spec;
2053 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2054 stream_tag, format, substream);
2055}
2056
dabbed6f 2057
2f2f4251
M		 2058/*
2059 * Analog capture callbacks
2060 */
2061static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2062 struct hda_codec *codec,
2063 unsigned int stream_tag,
2064 unsigned int format,
c8b6bf9b 2065 struct snd_pcm_substream *substream)
2f2f4251
M		 2066{
2067 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2068 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2069
8daaaa97
MR		 2070 if (spec->powerdown_adcs) {
2071 msleep(40);
2072 snd_hda_codec_write_cache(codec, nid, 0,
2073 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2074 }
2075 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2076 return 0;
2077}
2078
2079static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2080 struct hda_codec *codec,
c8b6bf9b 2081 struct snd_pcm_substream *substream)
2f2f4251
M		 2082{
2083 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2084 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2085
8daaaa97
MR		 2086 snd_hda_codec_cleanup_stream(codec, nid);
2087 if (spec->powerdown_adcs)
2088 snd_hda_codec_write_cache(codec, nid, 0,
2089 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2090 return 0;
2091}
2092
dabbed6f
M		 2093static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2094 .substreams = 1,
2095 .channels_min = 2,
2096 .channels_max = 2,
2097 /* NID is set in stac92xx_build_pcms */
2098 .ops = {
2099 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2100 .close = stac92xx_dig_playback_pcm_close,
2101 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2102 },
2103};
2104
2105static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2106 .substreams = 1,
2107 .channels_min = 2,
2108 .channels_max = 2,
2109 /* NID is set in stac92xx_build_pcms */
2110};
2111
2f2f4251
M		 2112static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2113 .substreams = 1,
2114 .channels_min = 2,
c7d4b2fa 2115 .channels_max = 8,
2f2f4251
M		 2116 .nid = 0x02, /* NID to query formats and rates */
2117 .ops = {
2118 .open = stac92xx_playback_pcm_open,
2119 .prepare = stac92xx_playback_pcm_prepare,
2120 .cleanup = stac92xx_playback_pcm_cleanup
2121 },
2122};
2123
3cc08dc6
MP		 2124static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2125 .substreams = 1,
2126 .channels_min = 2,
2127 .channels_max = 2,
2128 .nid = 0x06, /* NID to query formats and rates */
2129 .ops = {
2130 .open = stac92xx_playback_pcm_open,
2131 .prepare = stac92xx_playback_pcm_prepare,
2132 .cleanup = stac92xx_playback_pcm_cleanup
2133 },
2134};
2135
2f2f4251 2136static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2137 .channels_min = 2,
2138 .channels_max = 2,
9e05b7a3 2139 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2140 .ops = {
2141 .prepare = stac92xx_capture_pcm_prepare,
2142 .cleanup = stac92xx_capture_pcm_cleanup
2143 },
2144};
2145
2146static int stac92xx_build_pcms(struct hda_codec *codec)
2147{
2148 struct sigmatel_spec *spec = codec->spec;
2149 struct hda_pcm *info = spec->pcm_rec;
2150
2151 codec->num_pcms = 1;
2152 codec->pcm_info = info;
2153
c7d4b2fa 2154 info->name = "STAC92xx Analog";
2f2f4251 2155 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2156 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2157 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2158 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2159
2160 if (spec->alt_switch) {
2161 codec->num_pcms++;
2162 info++;
2163 info->name = "STAC92xx Analog Alt";
2164 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2165 }
2f2f4251 2166
dabbed6f
M		 2167 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2168 codec->num_pcms++;
2169 info++;
2170 info->name = "STAC92xx Digital";
7ba72ba1 2171 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2172 if (spec->multiout.dig_out_nid) {
2173 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2174 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2175 }
2176 if (spec->dig_in_nid) {
2177 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2178 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2179 }
2180 }
2181
2f2f4251
M		 2182 return 0;
2183}
2184
c960a03b
TI		 2185static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2186{
2187 unsigned int pincap = snd_hda_param_read(codec, nid,
2188 AC_PAR_PIN_CAP);
2189 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2190 if (pincap & AC_PINCAP_VREF_100)
2191 return AC_PINCTL_VREF_100;
2192 if (pincap & AC_PINCAP_VREF_80)
2193 return AC_PINCTL_VREF_80;
2194 if (pincap & AC_PINCAP_VREF_50)
2195 return AC_PINCTL_VREF_50;
2196 if (pincap & AC_PINCAP_VREF_GRD)
2197 return AC_PINCTL_VREF_GRD;
2198 return 0;
2199}
2200
403d1944
MP		 2201static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2202
2203{
82beb8fd
TI		 2204 snd_hda_codec_write_cache(codec, nid, 0,
2205 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2206}
2207
7c2ba97b
MR		 2208#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2209
2210static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2211 struct snd_ctl_elem_value *ucontrol)
2212{
2213 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2214 struct sigmatel_spec *spec = codec->spec;
2215
2216 ucontrol->value.integer.value[0] = spec->hp_switch;
2217 return 0;
2218}
2219
2220static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2221 struct snd_ctl_elem_value *ucontrol)
2222{
2223 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2224 struct sigmatel_spec *spec = codec->spec;
2225
2226 spec->hp_switch = ucontrol->value.integer.value[0];
2227
2228 /* check to be sure that the ports are upto date with
2229 * switch changes
2230 */
2231 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2232
2233 return 1;
2234}
2235
a5ce8890 2236#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2237
2238static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2239{
2240 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2241 struct sigmatel_spec *spec = codec->spec;
2242 int io_idx = kcontrol-> private_value & 0xff;
2243
2244 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2245 return 0;
2246}
2247
2248static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2249{
2250 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2251 struct sigmatel_spec *spec = codec->spec;
2252 hda_nid_t nid = kcontrol->private_value >> 8;
2253 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2254 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2255
2256 spec->io_switch[io_idx] = val;
2257
2258 if (val)
2259 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2260 else {
2261 unsigned int pinctl = AC_PINCTL_IN_EN;
2262 if (io_idx) /* set VREF for mic */
2263 pinctl |= stac92xx_get_vref(codec, nid);
2264 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2265 }
40c1d308
JZ		 2266
2267 /* check the auto-mute again: we need to mute/unmute the speaker
2268 * appropriately according to the pin direction
2269 */
2270 if (spec->hp_detect)
2271 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2272
403d1944
MP		 2273 return 1;
2274}
2275
0fb87bb4
ML		 2276#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2277
2278static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2279 struct snd_ctl_elem_value *ucontrol)
2280{
2281 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2282 struct sigmatel_spec *spec = codec->spec;
2283
2284 ucontrol->value.integer.value[0] = spec->clfe_swap;
2285 return 0;
2286}
2287
2288static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2289 struct snd_ctl_elem_value *ucontrol)
2290{
2291 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2292 struct sigmatel_spec *spec = codec->spec;
2293 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2294 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2295
68ea7b2f 2296 if (spec->clfe_swap == val)
0fb87bb4
ML		 2297 return 0;
2298
68ea7b2f 2299 spec->clfe_swap = val;
0fb87bb4
ML		 2300
2301 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2302 spec->clfe_swap ? 0x4 : 0x0);
2303
2304 return 1;
2305}
2306
7c2ba97b
MR		 2307#define STAC_CODEC_HP_SWITCH(xname) \
2308 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2309 .name = xname, \
2310 .index = 0, \
2311 .info = stac92xx_hp_switch_info, \
2312 .get = stac92xx_hp_switch_get, \
2313 .put = stac92xx_hp_switch_put, \
2314 }
2315
403d1944
MP		 2316#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2317 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2318 .name = xname, \
2319 .index = 0, \
2320 .info = stac92xx_io_switch_info, \
2321 .get = stac92xx_io_switch_get, \
2322 .put = stac92xx_io_switch_put, \
2323 .private_value = xpval, \
2324 }
2325
0fb87bb4
ML		 2326#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2327 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2328 .name = xname, \
2329 .index = 0, \
2330 .info = stac92xx_clfe_switch_info, \
2331 .get = stac92xx_clfe_switch_get, \
2332 .put = stac92xx_clfe_switch_put, \
2333 .private_value = xpval, \
2334 }
403d1944 2335
c7d4b2fa
M		 2336enum {
2337 STAC_CTL_WIDGET_VOL,
2338 STAC_CTL_WIDGET_MUTE,
09a99959 2339 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2340 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2341 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2342 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2343};
2344
c8b6bf9b 2345static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2346 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2347 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2348 STAC_MONO_MUX,
7c2ba97b 2349 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2350 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2351 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2352};
2353
2354/* add dynamic controls */
4682eee0
MR		 2355static int stac92xx_add_control_idx(struct sigmatel_spec *spec, int type,
2356 int idx, const char *name, unsigned long val)
c7d4b2fa 2357{
c8b6bf9b 2358 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2359
2360 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2361 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2362
2363 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2364 if (! knew)
2365 return -ENOMEM;
2366 if (spec->kctl_alloc) {
2367 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2368 kfree(spec->kctl_alloc);
2369 }
2370 spec->kctl_alloc = knew;
2371 spec->num_kctl_alloc = num;
2372 }
2373
2374 knew = &spec->kctl_alloc[spec->num_kctl_used];
2375 *knew = stac92xx_control_templates[type];
4682eee0 2376 knew->index = idx;
82fe0c58 2377 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2378 if (! knew->name)
2379 return -ENOMEM;
2380 knew->private_value = val;
2381 spec->num_kctl_used++;
2382 return 0;
2383}
2384
4682eee0
MR		 2385
2386/* add dynamic controls */
2387static int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2388 const char *name, unsigned long val)
2389{
2390 return stac92xx_add_control_idx(spec, type, 0, name, val);
2391}
2392
403d1944
MP		 2393/* flag inputs as additional dynamic lineouts */
2394static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2395{
2396 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2397 unsigned int wcaps, wtype;
2398 int i, num_dacs = 0;
2399
2400 /* use the wcaps cache to count all DACs available for line-outs */
2401 for (i = 0; i < codec->num_nodes; i++) {
2402 wcaps = codec->wcaps[i];
2403 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2404
7b043899
SL		 2405 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2406 num_dacs++;
2407 }
403d1944 2408
7b043899
SL		 2409 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2410
403d1944
MP		 2411 switch (cfg->line_outs) {
2412 case 3:
2413 /* add line-in as side */
7b043899 2414 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2415 cfg->line_out_pins[cfg->line_outs] =
2416 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2417 spec->line_switch = 1;
2418 cfg->line_outs++;
2419 }
2420 break;
2421 case 2:
2422 /* add line-in as clfe and mic as side */
7b043899 2423 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2424 cfg->line_out_pins[cfg->line_outs] =
2425 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2426 spec->line_switch = 1;
2427 cfg->line_outs++;
2428 }
7b043899 2429 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2430 cfg->line_out_pins[cfg->line_outs] =
2431 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2432 spec->mic_switch = 1;
2433 cfg->line_outs++;
2434 }
2435 break;
2436 case 1:
2437 /* add line-in as surr and mic as clfe */
7b043899 2438 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2439 cfg->line_out_pins[cfg->line_outs] =
2440 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2441 spec->line_switch = 1;
2442 cfg->line_outs++;
2443 }
7b043899 2444 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2445 cfg->line_out_pins[cfg->line_outs] =
2446 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2447 spec->mic_switch = 1;
2448 cfg->line_outs++;
2449 }
2450 break;
2451 }
2452
2453 return 0;
2454}
2455
7b043899
SL		 2456
2457static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2458{
2459 int i;
2460
2461 for (i = 0; i < spec->multiout.num_dacs; i++) {
2462 if (spec->multiout.dac_nids[i] == nid)
2463 return 1;
2464 }
2465
2466 return 0;
2467}
2468
3cc08dc6 2469/*
7b043899
SL		 2470 * Fill in the dac_nids table from the parsed pin configuration
2471 * This function only works when every pin in line_out_pins[]
2472 * contains atleast one DAC in its connection list. Some 92xx
2473 * codecs are not connected directly to a DAC, such as the 9200
2474 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2475 */
19039bd0 2476static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2477 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2478{
2479 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2480 int i, j, conn_len = 0;
2481 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2482 unsigned int wcaps, wtype;
2483
c7d4b2fa
M		 2484 for (i = 0; i < cfg->line_outs; i++) {
2485 nid = cfg->line_out_pins[i];
7b043899
SL		 2486 conn_len = snd_hda_get_connections(codec, nid, conn,
2487 HDA_MAX_CONNECTIONS);
2488 for (j = 0; j < conn_len; j++) {
2489 wcaps = snd_hda_param_read(codec, conn[j],
2490 AC_PAR_AUDIO_WIDGET_CAP);
2491 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2492 if (wtype != AC_WID_AUD_OUT ||
2493 (wcaps & AC_WCAP_DIGITAL))
2494 continue;
2495 /* conn[j] is a DAC routed to this line-out */
2496 if (!is_in_dac_nids(spec, conn[j]))
2497 break;
2498 }
2499
2500 if (j == conn_len) {
df802952
TI		 2501 if (spec->multiout.num_dacs > 0) {
2502 /* we have already working output pins,
2503 * so let's drop the broken ones again
2504 */
2505 cfg->line_outs = spec->multiout.num_dacs;
2506 break;
2507 }
7b043899
SL		 2508 /* error out, no available DAC found */
2509 snd_printk(KERN_ERR
2510 "%s: No available DAC for pin 0x%x\n",
2511 __func__, nid);
2512 return -ENODEV;
2513 }
2514
2515 spec->multiout.dac_nids[i] = conn[j];
2516 spec->multiout.num_dacs++;
2517 if (conn_len > 1) {
2518 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2519 snd_hda_codec_write_cache(codec, nid, 0,
2520 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2521
7b043899
SL		 2522 }
2523 }
c7d4b2fa 2524
7b043899
SL		 2525 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2526 spec->multiout.num_dacs,
2527 spec->multiout.dac_nids[0],
2528 spec->multiout.dac_nids[1],
2529 spec->multiout.dac_nids[2],
2530 spec->multiout.dac_nids[3],
2531 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2532 return 0;
2533}
2534
eb06ed8f
TI		 2535/* create volume control/switch for the given prefx type */
2536static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2537{
2538 char name[32];
2539 int err;
2540
2541 sprintf(name, "%s Playback Volume", pfx);
2542 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2543 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2544 if (err < 0)
2545 return err;
2546 sprintf(name, "%s Playback Switch", pfx);
2547 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2548 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2549 if (err < 0)
2550 return err;
2551 return 0;
2552}
2553
ae0afd81
MR		 2554static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2555{
2556 if (!spec->multiout.hp_nid)
2557 spec->multiout.hp_nid = nid;
2558 else if (spec->multiout.num_dacs > 4) {
2559 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2560 return 1;
2561 } else {
2562 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2563 spec->multiout.num_dacs++;
2564 }
2565 return 0;
2566}
2567
2568static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2569{
2570 if (is_in_dac_nids(spec, nid))
2571 return 1;
2572 if (spec->multiout.hp_nid == nid)
2573 return 1;
2574 return 0;
2575}
2576
c7d4b2fa 2577/* add playback controls from the parsed DAC table */
0fb87bb4 2578static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2579 const struct auto_pin_cfg *cfg)
c7d4b2fa 2580{
19039bd0
TI		 2581 static const char *chname[4] = {
2582 "Front", "Surround", NULL /*CLFE*/, "Side"
2583 };
c7d4b2fa
M		 2584 hda_nid_t nid;
2585 int i, err;
2586
0fb87bb4 2587 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2588 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2589
2590
40ac8c4f 2591 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2592 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2593 continue;
2594
2595 nid = spec->multiout.dac_nids[i];
2596
2597 if (i == 2) {
2598 /* Center/LFE */
eb06ed8f
TI		 2599 err = create_controls(spec, "Center", nid, 1);
2600 if (err < 0)
c7d4b2fa 2601 return err;
eb06ed8f
TI		 2602 err = create_controls(spec, "LFE", nid, 2);
2603 if (err < 0)
c7d4b2fa 2604 return err;
0fb87bb4
ML		 2605
2606 wid_caps = get_wcaps(codec, nid);
2607
2608 if (wid_caps & AC_WCAP_LR_SWAP) {
2609 err = stac92xx_add_control(spec,
2610 STAC_CTL_WIDGET_CLFE_SWITCH,
2611 "Swap Center/LFE Playback Switch", nid);
2612
2613 if (err < 0)
2614 return err;
2615 }
2616
c7d4b2fa 2617 } else {
eb06ed8f
TI		 2618 err = create_controls(spec, chname[i], nid, 3);
2619 if (err < 0)
c7d4b2fa
M		 2620 return err;
2621 }
2622 }
2623
7c2ba97b
MR		 2624 if (cfg->hp_outs > 1) {
2625 err = stac92xx_add_control(spec,
2626 STAC_CTL_WIDGET_HP_SWITCH,
2627 "Headphone as Line Out Switch", 0);
2628 if (err < 0)
2629 return err;
2630 }
2631
b5895dc8
MR		 2632 if (spec->line_switch) {
2633 nid = cfg->input_pins[AUTO_PIN_LINE];
2634 pincap = snd_hda_param_read(codec, nid,
2635 AC_PAR_PIN_CAP);
2636 if (pincap & AC_PINCAP_OUT) {
2637 err = stac92xx_add_control(spec,
2638 STAC_CTL_WIDGET_IO_SWITCH,
2639 "Line In as Output Switch", nid << 8);
2640 if (err < 0)
2641 return err;
2642 }
2643 }
403d1944 2644
b5895dc8 2645 if (spec->mic_switch) {
cace16f1 2646 unsigned int def_conf;
ae0afd81
MR		 2647 unsigned int mic_pin = AUTO_PIN_MIC;
2648again:
2649 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2650 def_conf = snd_hda_codec_read(codec, nid, 0,
2651 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2652 /* some laptops have an internal analog microphone
2653 * which can't be used as a output */
2654 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2655 pincap = snd_hda_param_read(codec, nid,
2656 AC_PAR_PIN_CAP);
2657 if (pincap & AC_PINCAP_OUT) {
2658 err = stac92xx_add_control(spec,
2659 STAC_CTL_WIDGET_IO_SWITCH,
2660 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2661 nid = snd_hda_codec_read(codec, nid, 0,
2662 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2663 if (!check_in_dac_nids(spec, nid))
2664 add_spec_dacs(spec, nid);
cace16f1
MR		 2665 if (err < 0)
2666 return err;
2667 }
ae0afd81
MR		 2668 } else if (mic_pin == AUTO_PIN_MIC) {
2669 mic_pin = AUTO_PIN_FRONT_MIC;
2670 goto again;
b5895dc8
MR		 2671 }
2672 }
403d1944 2673
c7d4b2fa
M		 2674 return 0;
2675}
2676
eb06ed8f
TI		 2677/* add playback controls for Speaker and HP outputs */
2678static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2679 struct auto_pin_cfg *cfg)
2680{
2681 struct sigmatel_spec *spec = codec->spec;
2682 hda_nid_t nid;
2683 int i, old_num_dacs, err;
2684
2685 old_num_dacs = spec->multiout.num_dacs;
2686 for (i = 0; i < cfg->hp_outs; i++) {
2687 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2688 if (wid_caps & AC_WCAP_UNSOL_CAP)
2689 spec->hp_detect = 1;
2690 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2691 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2692 if (check_in_dac_nids(spec, nid))
2693 nid = 0;
2694 if (! nid)
c7d4b2fa 2695 continue;
eb06ed8f
TI		 2696 add_spec_dacs(spec, nid);
2697 }
2698 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2699 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2700 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2701 if (check_in_dac_nids(spec, nid))
2702 nid = 0;
eb06ed8f
TI		 2703 if (! nid)
2704 continue;
2705 add_spec_dacs(spec, nid);
c7d4b2fa 2706 }
1b290a51
MR		 2707 for (i = 0; i < cfg->line_outs; i++) {
2708 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2709 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2710 if (check_in_dac_nids(spec, nid))
2711 nid = 0;
2712 if (! nid)
2713 continue;
2714 add_spec_dacs(spec, nid);
2715 }
eb06ed8f
TI		 2716 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2717 static const char *pfxs[] = {
2718 "Speaker", "External Speaker", "Speaker2",
2719 };
2720 err = create_controls(spec, pfxs[i - old_num_dacs],
2721 spec->multiout.dac_nids[i], 3);
2722 if (err < 0)
2723 return err;
2724 }
2725 if (spec->multiout.hp_nid) {
2626a263
TI		 2726 err = create_controls(spec, "Headphone",
2727 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2728 if (err < 0)
2729 return err;
2730 }
c7d4b2fa
M		 2731
2732 return 0;
2733}
2734
b22b4821 2735/* labels for mono mux outputs */
d0513fc6
MR		 2736static const char *stac92xx_mono_labels[4] = {
2737 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2738};
2739
2740/* create mono mux for mono out on capable codecs */
2741static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2742{
2743 struct sigmatel_spec *spec = codec->spec;
2744 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2745 int i, num_cons;
2746 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2747
2748 num_cons = snd_hda_get_connections(codec,
2749 spec->mono_nid,
2750 con_lst,
2751 HDA_MAX_NUM_INPUTS);
2752 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2753 return -EINVAL;
2754
2755 for (i = 0; i < num_cons; i++) {
2756 mono_mux->items[mono_mux->num_items].label =
2757 stac92xx_mono_labels[i];
2758 mono_mux->items[mono_mux->num_items].index = i;
2759 mono_mux->num_items++;
2760 }
09a99959
MR		 2761
2762 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2763 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2764}
2765
1cd2224c
MR		 2766/* create PC beep volume controls */
2767static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
2768 hda_nid_t nid)
2769{
2770 struct sigmatel_spec *spec = codec->spec;
2771 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
2772 int err;
2773
2774 /* check for mute support for the the amp */
2775 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
2776 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2777 "PC Beep Playback Switch",
2778 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
2779 if (err < 0)
2780 return err;
2781 }
2782
2783 /* check to see if there is volume support for the amp */
2784 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2785 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2786 "PC Beep Playback Volume",
2787 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
2788 if (err < 0)
2789 return err;
2790 }
2791 return 0;
2792}
2793
4682eee0
MR		 2794static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
2795{
2796 struct sigmatel_spec *spec = codec->spec;
2797 int wcaps, nid, i, err = 0;
2798
2799 for (i = 0; i < spec->num_muxes; i++) {
2800 nid = spec->mux_nids[i];
2801 wcaps = get_wcaps(codec, nid);
2802
2803 if (wcaps & AC_WCAP_OUT_AMP) {
2804 err = stac92xx_add_control_idx(spec,
2805 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
2806 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2807 if (err < 0)
2808 return err;
2809 }
2810 }
2811 return 0;
2812};
2813
8b65727b 2814/* labels for dmic mux inputs */
ddc2cec4 2815static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2816 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2817 "Digital Mic 3", "Digital Mic 4"
2818};
2819
2820/* create playback/capture controls for input pins on dmic capable codecs */
2821static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2822 const struct auto_pin_cfg *cfg)
2823{
2824 struct sigmatel_spec *spec = codec->spec;
2825 struct hda_input_mux *dimux = &spec->private_dimux;
2826 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2827 int err, i, j;
2828 char name[32];
8b65727b
MP		 2829
2830 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2831 dimux->items[dimux->num_items].index = 0;
2832 dimux->num_items++;
2833
2834 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2835 hda_nid_t nid;
8b65727b
MP		 2836 int index;
2837 int num_cons;
0678accd 2838 unsigned int wcaps;
8b65727b
MP		 2839 unsigned int def_conf;
2840
2841 def_conf = snd_hda_codec_read(codec,
2842 spec->dmic_nids[i],
2843 0,
2844 AC_VERB_GET_CONFIG_DEFAULT,
2845 0);
2846 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2847 continue;
2848
0678accd 2849 nid = spec->dmic_nids[i];
8b65727b 2850 num_cons = snd_hda_get_connections(codec,
e1f0d669 2851 spec->dmux_nids[0],
8b65727b
MP		 2852 con_lst,
2853 HDA_MAX_NUM_INPUTS);
2854 for (j = 0; j < num_cons; j++)
0678accd 2855 if (con_lst[j] == nid) {
8b65727b
MP		 2856 index = j;
2857 goto found;
2858 }
2859 continue;
2860found:
d0513fc6
MR		 2861 wcaps = get_wcaps(codec, nid) &
2862 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 2863
d0513fc6 2864 if (wcaps) {
0678accd
MR		 2865 sprintf(name, "%s Capture Volume",
2866 stac92xx_dmic_labels[dimux->num_items]);
2867
2868 err = stac92xx_add_control(spec,
2869 STAC_CTL_WIDGET_VOL,
2870 name,
d0513fc6
MR		 2871 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
2872 (wcaps & AC_WCAP_OUT_AMP) ?
2873 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 2874 if (err < 0)
2875 return err;
2876 }
2877
8b65727b
MP		 2878 dimux->items[dimux->num_items].label =
2879 stac92xx_dmic_labels[dimux->num_items];
2880 dimux->items[dimux->num_items].index = index;
2881 dimux->num_items++;
2882 }
2883
2884 return 0;
2885}
2886
c7d4b2fa
M		 2887/* create playback/capture controls for input pins */
2888static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2889{
2890 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2891 struct hda_input_mux *imux = &spec->private_imux;
2892 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2893 int i, j, k;
2894
2895 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2896 int index;
2897
2898 if (!cfg->input_pins[i])
2899 continue;
2900 index = -1;
2901 for (j = 0; j < spec->num_muxes; j++) {
2902 int num_cons;
2903 num_cons = snd_hda_get_connections(codec,
2904 spec->mux_nids[j],
2905 con_lst,
2906 HDA_MAX_NUM_INPUTS);
2907 for (k = 0; k < num_cons; k++)
2908 if (con_lst[k] == cfg->input_pins[i]) {
2909 index = k;
2910 goto found;
2911 }
c7d4b2fa 2912 }
314634bc
TI		 2913 continue;
2914 found:
2915 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2916 imux->items[imux->num_items].index = index;
2917 imux->num_items++;
c7d4b2fa
M		 2918 }
2919
7b043899 2920 if (imux->num_items) {
62fe78e9
SR		 2921 /*
2922 * Set the current input for the muxes.
2923 * The STAC9221 has two input muxes with identical source
2924 * NID lists. Hopefully this won't get confused.
2925 */
2926 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2927 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2928 AC_VERB_SET_CONNECT_SEL,
2929 imux->items[0].index);
62fe78e9
SR		 2930 }
2931 }
2932
c7d4b2fa
M		 2933 return 0;
2934}
2935
c7d4b2fa
M		 2936static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2937{
2938 struct sigmatel_spec *spec = codec->spec;
2939 int i;
2940
2941 for (i = 0; i < spec->autocfg.line_outs; i++) {
2942 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2943 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2944 }
2945}
2946
2947static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2948{
2949 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2950 int i;
c7d4b2fa 2951
eb06ed8f
TI		 2952 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2953 hda_nid_t pin;
2954 pin = spec->autocfg.hp_pins[i];
2955 if (pin) /* connect to front */
2956 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2957 }
2958 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2959 hda_nid_t pin;
2960 pin = spec->autocfg.speaker_pins[i];
2961 if (pin) /* connect to front */
2962 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2963 }
c7d4b2fa
M		 2964}
2965
3cc08dc6 2966static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2967{
2968 struct sigmatel_spec *spec = codec->spec;
2969 int err;
bcecd9bd 2970 int hp_speaker_swap = 0;
c7d4b2fa 2971
8b65727b
MP		 2972 if ((err = snd_hda_parse_pin_def_config(codec,
2973 &spec->autocfg,
2974 spec->dmic_nids)) < 0)
c7d4b2fa 2975 return err;
82bc955f 2976 if (! spec->autocfg.line_outs)
869264c4 2977 return 0; /* can't find valid pin config */
19039bd0 2978
bcecd9bd
JZ		 2979 /* If we have no real line-out pin and multiple hp-outs, HPs should
2980 * be set up as multi-channel outputs.
2981 */
2982 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2983 spec->autocfg.hp_outs > 1) {
2984 /* Copy hp_outs to line_outs, backup line_outs in
2985 * speaker_outs so that the following routines can handle
2986 * HP pins as primary outputs.
2987 */
2988 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2989 sizeof(spec->autocfg.line_out_pins));
2990 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2991 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2992 sizeof(spec->autocfg.hp_pins));
2993 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2994 hp_speaker_swap = 1;
2995 }
09a99959 2996 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 2997 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
2998 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 2999 u32 caps = query_amp_caps(codec,
3000 spec->autocfg.mono_out_pin, dir);
3001 hda_nid_t conn_list[1];
3002
3003 /* get the mixer node and then the mono mux if it exists */
3004 if (snd_hda_get_connections(codec,
3005 spec->autocfg.mono_out_pin, conn_list, 1) &&
3006 snd_hda_get_connections(codec, conn_list[0],
3007 conn_list, 1)) {
3008
3009 int wcaps = get_wcaps(codec, conn_list[0]);
3010 int wid_type = (wcaps & AC_WCAP_TYPE)
3011 >> AC_WCAP_TYPE_SHIFT;
3012 /* LR swap check, some stac925x have a mux that
3013 * changes the DACs output path instead of the
3014 * mono-mux path.
3015 */
3016 if (wid_type == AC_WID_AUD_SEL &&
3017 !(wcaps & AC_WCAP_LR_SWAP))
3018 spec->mono_nid = conn_list[0];
3019 }
d0513fc6
MR		 3020 if (dir) {
3021 hda_nid_t nid = spec->autocfg.mono_out_pin;
3022
3023 /* most mono outs have a least a mute/unmute switch */
3024 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3025 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3026 "Mono Playback Switch",
3027 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3028 if (err < 0)
3029 return err;
d0513fc6
MR		 3030 /* check for volume support for the amp */
3031 if ((caps & AC_AMPCAP_NUM_STEPS)
3032 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3033 err = stac92xx_add_control(spec,
3034 STAC_CTL_WIDGET_VOL,
3035 "Mono Playback Volume",
3036 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3037 if (err < 0)
3038 return err;
3039 }
09a99959
MR		 3040 }
3041
3042 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3043 AC_PINCTL_OUT_EN);
3044 }
bcecd9bd 3045
403d1944
MP		 3046 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3047 return err;
19039bd0
TI		 3048 if (spec->multiout.num_dacs == 0)
3049 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3050 return err;
c7d4b2fa 3051
0fb87bb4
ML		 3052 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3053
3054 if (err < 0)
3055 return err;
3056
1cd2224c
MR		 3057 /* setup analog beep controls */
3058 if (spec->anabeep_nid > 0) {
3059 err = stac92xx_auto_create_beep_ctls(codec,
3060 spec->anabeep_nid);
3061 if (err < 0)
3062 return err;
3063 }
3064
3065 /* setup digital beep controls and input device */
3066#ifdef CONFIG_SND_HDA_INPUT_BEEP
3067 if (spec->digbeep_nid > 0) {
3068 hda_nid_t nid = spec->digbeep_nid;
3069
3070 err = stac92xx_auto_create_beep_ctls(codec, nid);
3071 if (err < 0)
3072 return err;
3073 err = snd_hda_attach_beep_device(codec, nid);
3074 if (err < 0)
3075 return err;
3076 }
3077#endif
3078
bcecd9bd
JZ		 3079 if (hp_speaker_swap == 1) {
3080 /* Restore the hp_outs and line_outs */
3081 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3082 sizeof(spec->autocfg.line_out_pins));
3083 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3084 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3085 sizeof(spec->autocfg.speaker_pins));
3086 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3087 memset(spec->autocfg.speaker_pins, 0,
3088 sizeof(spec->autocfg.speaker_pins));
3089 spec->autocfg.speaker_outs = 0;
3090 }
3091
0fb87bb4
ML		 3092 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3093
3094 if (err < 0)
3095 return err;
3096
3097 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3098
3099 if (err < 0)
c7d4b2fa
M		 3100 return err;
3101
b22b4821
MR		 3102 if (spec->mono_nid > 0) {
3103 err = stac92xx_auto_create_mono_output_ctls(codec);
3104 if (err < 0)
3105 return err;
3106 }
3107
8b65727b
MP		 3108 if (spec->num_dmics > 0)
3109 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3110 &spec->autocfg)) < 0)
3111 return err;
4682eee0
MR		 3112 if (spec->num_muxes > 0) {
3113 err = stac92xx_auto_create_mux_input_ctls(codec);
3114 if (err < 0)
3115 return err;
3116 }
8b65727b 3117
c7d4b2fa 3118 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3119 if (spec->multiout.max_channels > 2)
c7d4b2fa 3120 spec->surr_switch = 1;
c7d4b2fa 3121
82bc955f 3122 if (spec->autocfg.dig_out_pin)
3cc08dc6 3123 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3124 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3125 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3126
3127 if (spec->kctl_alloc)
3128 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3129
3130 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 3131 if (!spec->dinput_mux)
3132 spec->dinput_mux = &spec->private_dimux;
b22b4821 3133 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3134
3135 return 1;
3136}
3137
82bc955f
TI		 3138/* add playback controls for HP output */
3139static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3140 struct auto_pin_cfg *cfg)
3141{
3142 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3143 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3144 unsigned int wid_caps;
3145
3146 if (! pin)
3147 return 0;
3148
3149 wid_caps = get_wcaps(codec, pin);
505cb341 3150 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3151 spec->hp_detect = 1;
82bc955f
TI		 3152
3153 return 0;
3154}
3155
160ea0dc
RF		 3156/* add playback controls for LFE output */
3157static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3158 struct auto_pin_cfg *cfg)
3159{
3160 struct sigmatel_spec *spec = codec->spec;
3161 int err;
3162 hda_nid_t lfe_pin = 0x0;
3163 int i;
3164
3165 /*
3166 * search speaker outs and line outs for a mono speaker pin
3167 * with an amp. If one is found, add LFE controls
3168 * for it.
3169 */
3170 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3171 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3172 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3173 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3174 if (wcaps == AC_WCAP_OUT_AMP)
3175 /* found a mono speaker with an amp, must be lfe */
3176 lfe_pin = pin;
3177 }
3178
3179 /* if speaker_outs is 0, then speakers may be in line_outs */
3180 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3181 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3182 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3183 unsigned int defcfg;
8b551785 3184 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3185 AC_VERB_GET_CONFIG_DEFAULT,
3186 0x00);
8b551785 3187 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3188 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3189 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3190 if (wcaps == AC_WCAP_OUT_AMP)
3191 /* found a mono speaker with an amp,
3192 must be lfe */
3193 lfe_pin = pin;
3194 }
3195 }
3196 }
3197
3198 if (lfe_pin) {
eb06ed8f 3199 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3200 if (err < 0)
3201 return err;
3202 }
3203
3204 return 0;
3205}
3206
c7d4b2fa
M		 3207static int stac9200_parse_auto_config(struct hda_codec *codec)
3208{
3209 struct sigmatel_spec *spec = codec->spec;
3210 int err;
3211
df694daa 3212 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3213 return err;
3214
3215 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3216 return err;
3217
82bc955f
TI		 3218 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3219 return err;
3220
160ea0dc
RF		 3221 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3222 return err;
3223
82bc955f 3224 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3225 spec->multiout.dig_out_nid = 0x05;
82bc955f 3226 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3227 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3228
3229 if (spec->kctl_alloc)
3230 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3231
3232 spec->input_mux = &spec->private_imux;
8b65727b 3233 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3234
3235 return 1;
3236}
3237
62fe78e9
SR		 3238/*
3239 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3240 * funky external mute control using GPIO pins.
3241 */
3242
76e1ddfb 3243static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3244 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3245{
3246 unsigned int gpiostate, gpiomask, gpiodir;
3247
3248 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3249 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3250 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3251
3252 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3253 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3254 gpiomask |= mask;
62fe78e9
SR		 3255
3256 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3257 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3258 gpiodir |= dir_mask;
62fe78e9 3259
76e1ddfb 3260 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3261 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3262
3263 snd_hda_codec_write(codec, codec->afg, 0,
3264 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3265 snd_hda_codec_read(codec, codec->afg, 0,
3266 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3267
3268 msleep(1);
3269
76e1ddfb
TI		 3270 snd_hda_codec_read(codec, codec->afg, 0,
3271 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3272}
3273
314634bc
TI		 3274static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3275 unsigned int event)
3276{
3277 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3278 snd_hda_codec_write_cache(codec, nid, 0,
3279 AC_VERB_SET_UNSOLICITED_ENABLE,
3280 (AC_USRSP_EN | event));
314634bc
TI		 3281}
3282
a64135a2
MR		 3283static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3284{
3285 int i;
3286 for (i = 0; i < cfg->hp_outs; i++)
3287 if (cfg->hp_pins[i] == nid)
3288 return 1; /* nid is a HP-Out */
3289
3290 return 0; /* nid is not a HP-Out */
3291};
3292
b76c850f
MR		 3293static void stac92xx_power_down(struct hda_codec *codec)
3294{
3295 struct sigmatel_spec *spec = codec->spec;
3296
3297 /* power down inactive DACs */
3298 hda_nid_t *dac;
3299 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3300 if (!is_in_dac_nids(spec, *dac) &&
3301 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3302 snd_hda_codec_write_cache(codec, *dac, 0,
3303 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3304}
3305
c7d4b2fa
M		 3306static int stac92xx_init(struct hda_codec *codec)
3307{
3308 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3309 struct auto_pin_cfg *cfg = &spec->autocfg;
3310 int i;
c7d4b2fa 3311
c7d4b2fa
M		 3312 snd_hda_sequence_write(codec, spec->init);
3313
8daaaa97
MR		 3314 /* power down adcs initially */
3315 if (spec->powerdown_adcs)
3316 for (i = 0; i < spec->num_adcs; i++)
3317 snd_hda_codec_write_cache(codec,
3318 spec->adc_nids[i], 0,
3319 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3320 /* set up pins */
3321 if (spec->hp_detect) {
505cb341 3322 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3323 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3324 enable_pin_detect(codec, cfg->hp_pins[i],
3325 STAC_HP_EVENT);
0a07acaf
TI		 3326 /* force to enable the first line-out; the others are set up
3327 * in unsol_event
3328 */
3329 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3330 AC_PINCTL_OUT_EN);
eb995a8c 3331 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3332 /* fake event to set up pins */
3333 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3334 } else {
3335 stac92xx_auto_init_multi_out(codec);
3336 stac92xx_auto_init_hp_out(codec);
3337 }
3338 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3339 hda_nid_t nid = cfg->input_pins[i];
3340 if (nid) {
3341 unsigned int pinctl = AC_PINCTL_IN_EN;
3342 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3343 pinctl |= stac92xx_get_vref(codec, nid);
3344 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3345 }
82bc955f 3346 }
a64135a2
MR		 3347 for (i = 0; i < spec->num_dmics; i++)
3348 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3349 AC_PINCTL_IN_EN);
3350 for (i = 0; i < spec->num_pwrs; i++) {
3351 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3352 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3353 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3354 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3355 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3356 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3357 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3358 /* outputs are only ports capable of power management
3359 * any attempts on powering down a input port cause the
3360 * referenced VREF to act quirky.
3361 */
3362 if (pinctl & AC_PINCTL_IN_EN)
3363 continue;
aafc4412
MR		 3364 /* skip any ports that don't have jacks since presence
3365 * detection is useless */
3366 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3367 continue;
a64135a2
MR		 3368 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3369 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3370 }
b76c850f
MR		 3371 if (spec->dac_list)
3372 stac92xx_power_down(codec);
82bc955f
TI		 3373 if (cfg->dig_out_pin)
3374 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3375 AC_PINCTL_OUT_EN);
3376 if (cfg->dig_in_pin)
3377 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3378 AC_PINCTL_IN_EN);
3379
4fe5195c
MR		 3380 stac_gpio_set(codec, spec->gpio_mask,
3381 spec->gpio_dir, spec->gpio_data);
62fe78e9 3382
c7d4b2fa
M		 3383 return 0;
3384}
3385
2f2f4251
M		 3386static void stac92xx_free(struct hda_codec *codec)
3387{
c7d4b2fa
M		 3388 struct sigmatel_spec *spec = codec->spec;
3389 int i;
3390
3391 if (! spec)
3392 return;
3393
3394 if (spec->kctl_alloc) {
3395 for (i = 0; i < spec->num_kctl_used; i++)
3396 kfree(spec->kctl_alloc[i].name);
3397 kfree(spec->kctl_alloc);
3398 }
3399
11b44bbd
RF		 3400 if (spec->bios_pin_configs)
3401 kfree(spec->bios_pin_configs);
3402
c7d4b2fa 3403 kfree(spec);
1cd2224c 3404 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3405}
3406
4e55096e
M		 3407static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3408 unsigned int flag)
3409{
3410 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3411 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3412
f9acba43
TI		 3413 if (pin_ctl & AC_PINCTL_IN_EN) {
3414 /*
3415 * we need to check the current set-up direction of
3416 * shared input pins since they can be switched via
3417 * "xxx as Output" mixer switch
3418 */
3419 struct sigmatel_spec *spec = codec->spec;
3420 struct auto_pin_cfg *cfg = &spec->autocfg;
3421 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3422 spec->line_switch) ||
3423 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3424 spec->mic_switch))
3425 return;
3426 }
3427
7b043899
SL		 3428 /* if setting pin direction bits, clear the current
3429 direction bits first */
3430 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3431 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3432
82beb8fd 3433 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3434 AC_VERB_SET_PIN_WIDGET_CONTROL,
3435 pin_ctl | flag);
3436}
3437
3438static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3439 unsigned int flag)
3440{
3441 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3442 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3443 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3444 AC_VERB_SET_PIN_WIDGET_CONTROL,
3445 pin_ctl & ~flag);
3446}
3447
40c1d308 3448static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3449{
3450 if (!nid)
3451 return 0;
3452 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3453 & (1 << 31)) {
3454 unsigned int pinctl;
3455 pinctl = snd_hda_codec_read(codec, nid, 0,
3456 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3457 if (pinctl & AC_PINCTL_IN_EN)
3458 return 0; /* mic- or line-input */
3459 else
3460 return 1; /* HP-output */
3461 }
314634bc
TI		 3462 return 0;
3463}
3464
3465static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3466{
3467 struct sigmatel_spec *spec = codec->spec;
3468 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3469 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3470 int i, presence;
3471
eb06ed8f 3472 presence = 0;
4fe5195c
MR		 3473 if (spec->gpio_mute)
3474 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3475 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3476
eb06ed8f 3477 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3478 if (presence)
3479 break;
7c2ba97b
MR		 3480 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3481 break;
4fe5195c 3482 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3483 }
4e55096e
M		 3484
3485 if (presence) {
3486 /* disable lineouts, enable hp */
7c2ba97b
MR		 3487 if (spec->hp_switch)
3488 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3489 for (i = 0; i < cfg->line_outs; i++)
3490 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3491 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3492 for (i = 0; i < cfg->speaker_outs; i++)
3493 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3494 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3495 if (spec->eapd_mask)
3496 stac_gpio_set(codec, spec->gpio_mask,
3497 spec->gpio_dir, spec->gpio_data &
3498 ~spec->eapd_mask);
4e55096e
M		 3499 } else {
3500 /* enable lineouts, disable hp */
7c2ba97b
MR		 3501 if (spec->hp_switch)
3502 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3503 for (i = 0; i < cfg->line_outs; i++)
3504 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3505 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3506 for (i = 0; i < cfg->speaker_outs; i++)
3507 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3508 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3509 if (spec->eapd_mask)
3510 stac_gpio_set(codec, spec->gpio_mask,
3511 spec->gpio_dir, spec->gpio_data |
3512 spec->eapd_mask);
4e55096e 3513 }
7c2ba97b
MR		 3514 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3515 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3516}
3517
a64135a2
MR		 3518static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3519{
3520 struct sigmatel_spec *spec = codec->spec;
3521 hda_nid_t nid = spec->pwr_nids[idx];
3522 int presence, val;
3523 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3524 & 0x000000ff;
3525 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3526
3527 /* several codecs have two power down bits */
3528 if (spec->pwr_mapping)
3529 idx = spec->pwr_mapping[idx];
3530 else
3531 idx = 1 << idx;
a64135a2
MR		 3532
3533 if (presence)
3534 val &= ~idx;
3535 else
3536 val |= idx;
3537
3538 /* power down unused output ports */
3539 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3540};
3541
314634bc
TI		 3542static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3543{
a64135a2
MR		 3544 struct sigmatel_spec *spec = codec->spec;
3545 int idx = res >> 26 & 0x0f;
3546
3547 switch ((res >> 26) & 0x30) {
314634bc
TI		 3548 case STAC_HP_EVENT:
3549 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3550 /* fallthru */
3551 case STAC_PWR_EVENT:
3552 if (spec->num_pwrs > 0)
3553 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3554 }
3555}
3556
cb53c626 3557#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3558static int stac92xx_resume(struct hda_codec *codec)
3559{
dc81bed1
TI		 3560 struct sigmatel_spec *spec = codec->spec;
3561
11b44bbd 3562 stac92xx_set_config_regs(codec);
dc81bed1 3563 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3564 stac_gpio_set(codec, spec->gpio_mask,
3565 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3566 snd_hda_codec_resume_amp(codec);
3567 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3568 /* power down inactive DACs */
3569 if (spec->dac_list)
3570 stac92xx_power_down(codec);
dc81bed1
TI		 3571 /* invoke unsolicited event to reset the HP state */
3572 if (spec->hp_detect)
3573 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3574 return 0;
3575}
3576#endif
3577
2f2f4251
M		 3578static struct hda_codec_ops stac92xx_patch_ops = {
3579 .build_controls = stac92xx_build_controls,
3580 .build_pcms = stac92xx_build_pcms,
3581 .init = stac92xx_init,
3582 .free = stac92xx_free,
4e55096e 3583 .unsol_event = stac92xx_unsol_event,
cb53c626 3584#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3585 .resume = stac92xx_resume,
3586#endif
2f2f4251
M		 3587};
3588
3589static int patch_stac9200(struct hda_codec *codec)
3590{
3591 struct sigmatel_spec *spec;
c7d4b2fa 3592 int err;
2f2f4251 3593
e560d8d8 3594 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3595 if (spec == NULL)
3596 return -ENOMEM;
3597
3598 codec->spec = spec;
a4eed138 3599 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3600 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3601 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3602 stac9200_models,
3603 stac9200_cfg_tbl);
11b44bbd
RF		 3604 if (spec->board_config < 0) {
3605 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3606 err = stac92xx_save_bios_config_regs(codec);
3607 if (err < 0) {
3608 stac92xx_free(codec);
3609 return err;
3610 }
3611 spec->pin_configs = spec->bios_pin_configs;
3612 } else {
403d1944
MP		 3613 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3614 stac92xx_set_config_regs(codec);
3615 }
2f2f4251
M		 3616
3617 spec->multiout.max_channels = 2;
3618 spec->multiout.num_dacs = 1;
3619 spec->multiout.dac_nids = stac9200_dac_nids;
3620 spec->adc_nids = stac9200_adc_nids;
3621 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3622 spec->num_muxes = 1;
8b65727b 3623 spec->num_dmics = 0;
9e05b7a3 3624 spec->num_adcs = 1;
a64135a2 3625 spec->num_pwrs = 0;
c7d4b2fa 3626
bf277785
TD		 3627 if (spec->board_config == STAC_9200_GATEWAY ||
3628 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3629 spec->init = stac9200_eapd_init;
3630 else
3631 spec->init = stac9200_core_init;
2f2f4251 3632 spec->mixer = stac9200_mixer;
c7d4b2fa 3633
117f257d
TI		 3634 if (spec->board_config == STAC_9200_PANASONIC) {
3635 spec->gpio_mask = spec->gpio_dir = 0x09;
3636 spec->gpio_data = 0x00;
3637 }
3638
c7d4b2fa
M		 3639 err = stac9200_parse_auto_config(codec);
3640 if (err < 0) {
3641 stac92xx_free(codec);
3642 return err;
3643 }
2f2f4251
M		 3644
3645 codec->patch_ops = stac92xx_patch_ops;
3646
3647 return 0;
3648}
3649
8e21c34c
TD		 3650static int patch_stac925x(struct hda_codec *codec)
3651{
3652 struct sigmatel_spec *spec;
3653 int err;
3654
3655 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3656 if (spec == NULL)
3657 return -ENOMEM;
3658
3659 codec->spec = spec;
a4eed138 3660 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3661 spec->pin_nids = stac925x_pin_nids;
3662 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3663 stac925x_models,
3664 stac925x_cfg_tbl);
9e507abd 3665 again:
8e21c34c 3666 if (spec->board_config < 0) {
2c11f955
TD		 3667 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3668 "using BIOS defaults\n");
8e21c34c
TD		 3669 err = stac92xx_save_bios_config_regs(codec);
3670 if (err < 0) {
3671 stac92xx_free(codec);
3672 return err;
3673 }
3674 spec->pin_configs = spec->bios_pin_configs;
3675 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3676 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3677 stac92xx_set_config_regs(codec);
3678 }
3679
3680 spec->multiout.max_channels = 2;
3681 spec->multiout.num_dacs = 1;
3682 spec->multiout.dac_nids = stac925x_dac_nids;
3683 spec->adc_nids = stac925x_adc_nids;
3684 spec->mux_nids = stac925x_mux_nids;
3685 spec->num_muxes = 1;
9e05b7a3 3686 spec->num_adcs = 1;
a64135a2 3687 spec->num_pwrs = 0;
2c11f955
TD		 3688 switch (codec->vendor_id) {
3689 case 0x83847632: /* STAC9202 */
3690 case 0x83847633: /* STAC9202D */
3691 case 0x83847636: /* STAC9251 */
3692 case 0x83847637: /* STAC9251D */
f6e9852a 3693 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3694 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3695 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3696 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3697 break;
3698 default:
3699 spec->num_dmics = 0;
3700 break;
3701 }
8e21c34c
TD		 3702
3703 spec->init = stac925x_core_init;
3704 spec->mixer = stac925x_mixer;
3705
3706 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3707 if (!err) {
3708 if (spec->board_config < 0) {
3709 printk(KERN_WARNING "hda_codec: No auto-config is "
3710 "available, default to model=ref\n");
3711 spec->board_config = STAC_925x_REF;
3712 goto again;
3713 }
3714 err = -EINVAL;
3715 }
8e21c34c
TD		 3716 if (err < 0) {
3717 stac92xx_free(codec);
3718 return err;
3719 }
3720
3721 codec->patch_ops = stac92xx_patch_ops;
3722
3723 return 0;
3724}
3725
e1f0d669
MR		 3726static struct hda_input_mux stac92hd73xx_dmux = {
3727 .num_items = 4,
3728 .items = {
3729 { "Analog Inputs", 0x0b },
3730 { "CD", 0x08 },
3731 { "Digital Mic 1", 0x09 },
3732 { "Digital Mic 2", 0x0a },
3733 }
3734};
3735
3736static int patch_stac92hd73xx(struct hda_codec *codec)
3737{
3738 struct sigmatel_spec *spec;
3739 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3740 int err = 0;
3741
3742 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3743 if (spec == NULL)
3744 return -ENOMEM;
3745
3746 codec->spec = spec;
3747 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3748 spec->pin_nids = stac92hd73xx_pin_nids;
3749 spec->board_config = snd_hda_check_board_config(codec,
3750 STAC_92HD73XX_MODELS,
3751 stac92hd73xx_models,
3752 stac92hd73xx_cfg_tbl);
3753again:
3754 if (spec->board_config < 0) {
3755 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3756 " STAC92HD73XX, using BIOS defaults\n");
3757 err = stac92xx_save_bios_config_regs(codec);
3758 if (err < 0) {
3759 stac92xx_free(codec);
3760 return err;
3761 }
3762 spec->pin_configs = spec->bios_pin_configs;
3763 } else {
3764 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3765 stac92xx_set_config_regs(codec);
3766 }
3767
3768 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3769 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3770
3771 if (spec->multiout.num_dacs < 0) {
3772 printk(KERN_WARNING "hda_codec: Could not determine "
3773 "number of channels defaulting to DAC count\n");
3774 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3775 }
3776
3777 switch (spec->multiout.num_dacs) {
3778 case 0x3: /* 6 Channel */
7c2ba97b 3779 spec->multiout.hp_nid = 0x17;
e1f0d669
MR		 3780 spec->mixer = stac92hd73xx_6ch_mixer;
3781 spec->init = stac92hd73xx_6ch_core_init;
3782 break;
3783 case 0x4: /* 8 Channel */
3784 spec->multiout.hp_nid = 0x18;
3785 spec->mixer = stac92hd73xx_8ch_mixer;
3786 spec->init = stac92hd73xx_8ch_core_init;
3787 break;
3788 case 0x5: /* 10 Channel */
3789 spec->multiout.hp_nid = 0x19;
3790 spec->mixer = stac92hd73xx_10ch_mixer;
3791 spec->init = stac92hd73xx_10ch_core_init;
3792 };
3793
3794 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3795 spec->aloopback_mask = 0x01;
3796 spec->aloopback_shift = 8;
3797
1cd2224c 3798 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 3799 spec->mux_nids = stac92hd73xx_mux_nids;
3800 spec->adc_nids = stac92hd73xx_adc_nids;
3801 spec->dmic_nids = stac92hd73xx_dmic_nids;
3802 spec->dmux_nids = stac92hd73xx_dmux_nids;
3803
3804 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3805 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3806 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3807 spec->dinput_mux = &stac92hd73xx_dmux;
3808 /* GPIO0 High = Enable EAPD */
0fc9dec4 3809 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 3810 spec->gpio_data = 0x01;
e1f0d669 3811
a7662640
MR		 3812 switch (spec->board_config) {
3813 case STAC_DELL_M6:
d654a660 3814 spec->init = dell_eq_core_init;
a7662640
MR		 3815 switch (codec->subsystem_id) {
3816 case 0x1028025e: /* Analog Mics */
3817 case 0x1028025f:
3818 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3819 spec->num_dmics = 0;
3820 break;
d654a660 3821 case 0x10280271: /* Digital Mics */
a7662640 3822 case 0x10280272:
d654a660
MR		 3823 spec->init = dell_m6_core_init;
3824 /* fall-through */
3825 case 0x10280254:
3826 case 0x10280255:
a7662640
MR		 3827 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3828 spec->num_dmics = 1;
3829 break;
3830 case 0x10280256: /* Both */
3831 case 0x10280057:
3832 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3833 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3834 spec->num_dmics = 1;
3835 break;
3836 }
3837 break;
3838 default:
3839 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3840 }
3841
a64135a2
MR		 3842 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3843 spec->pwr_nids = stac92hd73xx_pwr_nids;
3844
e1f0d669
MR		 3845 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3846
3847 if (!err) {
3848 if (spec->board_config < 0) {
3849 printk(KERN_WARNING "hda_codec: No auto-config is "
3850 "available, default to model=ref\n");
3851 spec->board_config = STAC_92HD73XX_REF;
3852 goto again;
3853 }
3854 err = -EINVAL;
3855 }
3856
3857 if (err < 0) {
3858 stac92xx_free(codec);
3859 return err;
3860 }
3861
3862 codec->patch_ops = stac92xx_patch_ops;
3863
3864 return 0;
3865}
3866
d0513fc6
MR		 3867static struct hda_input_mux stac92hd83xxx_dmux = {
3868 .num_items = 3,
3869 .items = {
3870 { "Analog Inputs", 0x03 },
3871 { "Digital Mic 1", 0x04 },
3872 { "Digital Mic 2", 0x05 },
3873 }
3874};
3875
3876static int patch_stac92hd83xxx(struct hda_codec *codec)
3877{
3878 struct sigmatel_spec *spec;
3879 int err;
3880
3881 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3882 if (spec == NULL)
3883 return -ENOMEM;
3884
3885 codec->spec = spec;
3886 spec->mono_nid = 0x19;
3887 spec->digbeep_nid = 0x21;
3888 spec->dmic_nids = stac92hd83xxx_dmic_nids;
3889 spec->dmux_nids = stac92hd83xxx_dmux_nids;
3890 spec->adc_nids = stac92hd83xxx_adc_nids;
3891 spec->pwr_nids = stac92hd83xxx_pwr_nids;
3892 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
3893 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
3894 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
3895
3896 spec->init = stac92hd83xxx_core_init;
3897 switch (codec->vendor_id) {
3898 case 0x111d7605:
3899 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
3900 break;
3901 default:
3902 spec->num_pwrs--;
3903 spec->init++; /* switch to config #2 */
3904 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
3905 }
3906
3907 spec->mixer = stac92hd83xxx_mixer;
3908 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
3909 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
3910 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
3911 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
3912 spec->dinput_mux = &stac92hd83xxx_dmux;
3913 spec->pin_nids = stac92hd83xxx_pin_nids;
3914 spec->board_config = snd_hda_check_board_config(codec,
3915 STAC_92HD83XXX_MODELS,
3916 stac92hd83xxx_models,
3917 stac92hd83xxx_cfg_tbl);
3918again:
3919 if (spec->board_config < 0) {
3920 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3921 " STAC92HD83XXX, using BIOS defaults\n");
3922 err = stac92xx_save_bios_config_regs(codec);
3923 if (err < 0) {
3924 stac92xx_free(codec);
3925 return err;
3926 }
3927 spec->pin_configs = spec->bios_pin_configs;
3928 } else {
3929 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
3930 stac92xx_set_config_regs(codec);
3931 }
3932
3933 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
3934 if (!err) {
3935 if (spec->board_config < 0) {
3936 printk(KERN_WARNING "hda_codec: No auto-config is "
3937 "available, default to model=ref\n");
3938 spec->board_config = STAC_92HD83XXX_REF;
3939 goto again;
3940 }
3941 err = -EINVAL;
3942 }
3943
3944 if (err < 0) {
3945 stac92xx_free(codec);
3946 return err;
3947 }
3948
3949 codec->patch_ops = stac92xx_patch_ops;
3950
3951 return 0;
3952}
3953
8daaaa97
MR		 3954#ifdef SND_HDA_NEEDS_RESUME
3955static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
3956{
3957 struct sigmatel_spec *spec = codec->spec;
3958 int i;
3959 snd_hda_codec_write_cache(codec, codec->afg, 0,
3960 AC_VERB_SET_POWER_STATE, pwr);
3961
3962 msleep(1);
3963 for (i = 0; i < spec->num_adcs; i++) {
3964 snd_hda_codec_write_cache(codec,
3965 spec->adc_nids[i], 0,
3966 AC_VERB_SET_POWER_STATE, pwr);
3967 }
3968};
3969
3970static int stac92hd71xx_resume(struct hda_codec *codec)
3971{
3972 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
3973 return stac92xx_resume(codec);
3974}
3975
3976static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
3977{
3978 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
3979 return 0;
3980};
3981
3982#endif
3983
3984static struct hda_codec_ops stac92hd71bxx_patch_ops = {
3985 .build_controls = stac92xx_build_controls,
3986 .build_pcms = stac92xx_build_pcms,
3987 .init = stac92xx_init,
3988 .free = stac92xx_free,
3989 .unsol_event = stac92xx_unsol_event,
3990#ifdef SND_HDA_NEEDS_RESUME
3991 .resume = stac92hd71xx_resume,
3992 .suspend = stac92hd71xx_suspend,
3993#endif
3994};
d0513fc6 3995
e035b841
MR		 3996static int patch_stac92hd71bxx(struct hda_codec *codec)
3997{
3998 struct sigmatel_spec *spec;
3999 int err = 0;
4000
4001 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4002 if (spec == NULL)
4003 return -ENOMEM;
4004
4005 codec->spec = spec;
8daaaa97 4006 codec->patch_ops = stac92xx_patch_ops;
e035b841 4007 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4008 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 4009 spec->pin_nids = stac92hd71bxx_pin_nids;
4010 spec->board_config = snd_hda_check_board_config(codec,
4011 STAC_92HD71BXX_MODELS,
4012 stac92hd71bxx_models,
4013 stac92hd71bxx_cfg_tbl);
4014again:
4015 if (spec->board_config < 0) {
4016 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4017 " STAC92HD71BXX, using BIOS defaults\n");
4018 err = stac92xx_save_bios_config_regs(codec);
4019 if (err < 0) {
4020 stac92xx_free(codec);
4021 return err;
4022 }
4023 spec->pin_configs = spec->bios_pin_configs;
4024 } else {
4025 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4026 stac92xx_set_config_regs(codec);
4027 }
4028
541eee87
MR		 4029 switch (codec->vendor_id) {
4030 case 0x111d76b6: /* 4 Port without Analog Mixer */
4031 case 0x111d76b7:
4032 case 0x111d76b4: /* 6 Port without Analog Mixer */
4033 case 0x111d76b5:
4034 spec->mixer = stac92hd71bxx_mixer;
4035 spec->init = stac92hd71bxx_core_init;
4036 break;
aafc4412 4037 case 0x111d7608: /* 5 Port with Analog Mixer */
8daaaa97
MR		 4038 if ((codec->revision_id & 0xf) == 0 ||
4039 (codec->revision_id & 0xf) == 1) {
4040#ifdef SND_HDA_NEEDS_RESUME
4041 codec->patch_ops = stac92hd71bxx_patch_ops;
4042#endif
4043 spec->stream_delay = 40; /* 40 milliseconds */
4044 }
4045
aafc4412
MR		 4046 /* no output amps */
4047 spec->num_pwrs = 0;
4048 spec->mixer = stac92hd71bxx_analog_mixer;
4049
4050 /* disable VSW */
4051 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4052 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4053 break;
4054 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4055 if ((codec->revision_id & 0xf) == 1) {
4056#ifdef SND_HDA_NEEDS_RESUME
4057 codec->patch_ops = stac92hd71bxx_patch_ops;
4058#endif
4059 spec->stream_delay = 40; /* 40 milliseconds */
4060 }
4061
aafc4412
MR		 4062 /* no output amps */
4063 spec->num_pwrs = 0;
4064 /* fallthru */
541eee87
MR		 4065 default:
4066 spec->mixer = stac92hd71bxx_analog_mixer;
4067 spec->init = stac92hd71bxx_analog_core_init;
4068 }
4069
4070 spec->aloopback_mask = 0x20;
4071 spec->aloopback_shift = 0;
4072
4fe5195c 4073 /* GPIO0 High = EAPD */
0fc9dec4
MR		 4074 spec->gpio_mask = 0x01;
4075 spec->gpio_dir = 0x01;
0fc9dec4 4076 spec->gpio_data = 0x01;
e035b841 4077
8daaaa97 4078 spec->powerdown_adcs = 1;
1cd2224c 4079 spec->digbeep_nid = 0x26;
e035b841
MR		 4080 spec->mux_nids = stac92hd71bxx_mux_nids;
4081 spec->adc_nids = stac92hd71bxx_adc_nids;
4082 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4083 spec->dmux_nids = stac92hd71bxx_dmux_nids;
aafc4412 4084 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4085
4086 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4087 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
4088 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 4089 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 4090
aea7bb0a 4091 spec->multiout.num_dacs = 1;
e035b841
MR		 4092 spec->multiout.hp_nid = 0x11;
4093 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4094
4095 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4096 if (!err) {
4097 if (spec->board_config < 0) {
4098 printk(KERN_WARNING "hda_codec: No auto-config is "
4099 "available, default to model=ref\n");
4100 spec->board_config = STAC_92HD71BXX_REF;
4101 goto again;
4102 }
4103 err = -EINVAL;
4104 }
4105
4106 if (err < 0) {
4107 stac92xx_free(codec);
4108 return err;
4109 }
4110
e035b841
MR		 4111 return 0;
4112};
4113
2f2f4251
M		 4114static int patch_stac922x(struct hda_codec *codec)
4115{
4116 struct sigmatel_spec *spec;
c7d4b2fa 4117 int err;
2f2f4251 4118
e560d8d8 4119 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4120 if (spec == NULL)
4121 return -ENOMEM;
4122
4123 codec->spec = spec;
a4eed138 4124 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4125 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4126 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4127 stac922x_models,
4128 stac922x_cfg_tbl);
536319af 4129 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4130 spec->gpio_mask = spec->gpio_dir = 0x03;
4131 spec->gpio_data = 0x03;
3fc24d85
TI		 4132 /* Intel Macs have all same PCI SSID, so we need to check
4133 * codec SSID to distinguish the exact models
4134 */
6f0778d8 4135 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4136 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4137
4138 case 0x106b0800:
4139 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4140 break;
5d5d3bc3
IZ		 4141 case 0x106b0600:
4142 case 0x106b0700:
4143 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4144 break;
5d5d3bc3
IZ		 4145 case 0x106b0e00:
4146 case 0x106b0f00:
4147 case 0x106b1600:
4148 case 0x106b1700:
4149 case 0x106b0200:
4150 case 0x106b1e00:
4151 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4152 break;
5d5d3bc3
IZ		 4153 case 0x106b1a00:
4154 case 0x00000100:
4155 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4156 break;
5d5d3bc3
IZ		 4157 case 0x106b0a00:
4158 case 0x106b2200:
4159 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4160 break;
536319af
NB		 4161 default:
4162 spec->board_config = STAC_INTEL_MAC_V3;
4163 break;
3fc24d85
TI		 4164 }
4165 }
4166
9e507abd 4167 again:
11b44bbd
RF		 4168 if (spec->board_config < 0) {
4169 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4170 "using BIOS defaults\n");
4171 err = stac92xx_save_bios_config_regs(codec);
4172 if (err < 0) {
4173 stac92xx_free(codec);
4174 return err;
4175 }
4176 spec->pin_configs = spec->bios_pin_configs;
4177 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4178 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4179 stac92xx_set_config_regs(codec);
4180 }
2f2f4251 4181
c7d4b2fa
M		 4182 spec->adc_nids = stac922x_adc_nids;
4183 spec->mux_nids = stac922x_mux_nids;
2549413e 4184 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4185 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4186 spec->num_dmics = 0;
a64135a2 4187 spec->num_pwrs = 0;
c7d4b2fa
M		 4188
4189 spec->init = stac922x_core_init;
2f2f4251 4190 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4191
4192 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4193
3cc08dc6 4194 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4195 if (!err) {
4196 if (spec->board_config < 0) {
4197 printk(KERN_WARNING "hda_codec: No auto-config is "
4198 "available, default to model=ref\n");
4199 spec->board_config = STAC_D945_REF;
4200 goto again;
4201 }
4202 err = -EINVAL;
4203 }
3cc08dc6
MP		 4204 if (err < 0) {
4205 stac92xx_free(codec);
4206 return err;
4207 }
4208
4209 codec->patch_ops = stac92xx_patch_ops;
4210
807a4636
TI		 4211 /* Fix Mux capture level; max to 2 */
4212 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4213 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4214 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4215 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4216 (0 << AC_AMPCAP_MUTE_SHIFT));
4217
3cc08dc6
MP		 4218 return 0;
4219}
4220
4221static int patch_stac927x(struct hda_codec *codec)
4222{
4223 struct sigmatel_spec *spec;
4224 int err;
4225
4226 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4227 if (spec == NULL)
4228 return -ENOMEM;
4229
4230 codec->spec = spec;
a4eed138 4231 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4232 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4233 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4234 stac927x_models,
4235 stac927x_cfg_tbl);
9e507abd 4236 again:
8e9068b1
MR		 4237 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4238 if (spec->board_config < 0)
4239 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4240 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4241 err = stac92xx_save_bios_config_regs(codec);
4242 if (err < 0) {
4243 stac92xx_free(codec);
4244 return err;
4245 }
4246 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4247 } else {
3cc08dc6
MP		 4248 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4249 stac92xx_set_config_regs(codec);
4250 }
4251
1cd2224c 4252 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4253 spec->adc_nids = stac927x_adc_nids;
4254 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4255 spec->mux_nids = stac927x_mux_nids;
4256 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
b76c850f 4257 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4258 spec->multiout.dac_nids = spec->dac_nids;
4259
81d3dbde 4260 switch (spec->board_config) {
93ed1503 4261 case STAC_D965_3ST:
93ed1503 4262 case STAC_D965_5ST:
8e9068b1 4263 /* GPIO0 High = Enable EAPD */
0fc9dec4 4264 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4265 spec->gpio_data = 0x01;
8e9068b1
MR		 4266 spec->num_dmics = 0;
4267
93ed1503 4268 spec->init = d965_core_init;
9e05b7a3 4269 spec->mixer = stac927x_mixer;
81d3dbde 4270 break;
8e9068b1 4271 case STAC_DELL_BIOS:
780c8be4
MR		 4272 switch (codec->subsystem_id) {
4273 case 0x10280209:
4274 case 0x1028022e:
4275 /* correct the device field to SPDIF out */
4276 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4277 break;
4278 };
03d7ca17
MR		 4279 /* configure the analog microphone on some laptops */
4280 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4281 /* correct the front output jack as a hp out */
7989fba9 4282 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4283 /* correct the front input jack as a mic */
4284 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4285 /* fallthru */
8e9068b1
MR		 4286 case STAC_DELL_3ST:
4287 /* GPIO2 High = Enable EAPD */
0fc9dec4 4288 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4289 spec->gpio_data = 0x04;
7f16859a
MR		 4290 spec->dmic_nids = stac927x_dmic_nids;
4291 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4292
8e9068b1
MR		 4293 spec->init = d965_core_init;
4294 spec->mixer = stac927x_mixer;
4295 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4296 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4297 break;
4298 default:
f1f208d0 4299 /* GPIO0 High = Enable EAPD */
0fc9dec4 4300 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4301 spec->gpio_data = 0x01;
8e9068b1
MR		 4302 spec->num_dmics = 0;
4303
4304 spec->init = stac927x_core_init;
4305 spec->mixer = stac927x_mixer;
7f16859a
MR		 4306 }
4307
a64135a2 4308 spec->num_pwrs = 0;
e1f0d669
MR		 4309 spec->aloopback_mask = 0x40;
4310 spec->aloopback_shift = 0;
8e9068b1 4311
3cc08dc6 4312 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4313 if (!err) {
4314 if (spec->board_config < 0) {
4315 printk(KERN_WARNING "hda_codec: No auto-config is "
4316 "available, default to model=ref\n");
4317 spec->board_config = STAC_D965_REF;
4318 goto again;
4319 }
4320 err = -EINVAL;
4321 }
c7d4b2fa
M		 4322 if (err < 0) {
4323 stac92xx_free(codec);
4324 return err;
4325 }
2f2f4251
M		 4326
4327 codec->patch_ops = stac92xx_patch_ops;
4328
52987656
TI		 4329 /*
4330 * !!FIXME!!
4331 * The STAC927x seem to require fairly long delays for certain
4332 * command sequences. With too short delays (even if the answer
4333 * is set to RIRB properly), it results in the silence output
4334 * on some hardwares like Dell.
4335 *
4336 * The below flag enables the longer delay (see get_response
4337 * in hda_intel.c).
4338 */
4339 codec->bus->needs_damn_long_delay = 1;
4340
2f2f4251
M		 4341 return 0;
4342}
4343
f3302a59
MP		 4344static int patch_stac9205(struct hda_codec *codec)
4345{
4346 struct sigmatel_spec *spec;
8259980e 4347 int err;
f3302a59
MP		 4348
4349 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4350 if (spec == NULL)
4351 return -ENOMEM;
4352
4353 codec->spec = spec;
a4eed138 4354 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4355 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4356 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4357 stac9205_models,
4358 stac9205_cfg_tbl);
9e507abd 4359 again:
11b44bbd
RF		 4360 if (spec->board_config < 0) {
4361 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4362 err = stac92xx_save_bios_config_regs(codec);
4363 if (err < 0) {
4364 stac92xx_free(codec);
4365 return err;
4366 }
4367 spec->pin_configs = spec->bios_pin_configs;
4368 } else {
f3302a59
MP		 4369 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4370 stac92xx_set_config_regs(codec);
4371 }
4372
1cd2224c 4373 spec->digbeep_nid = 0x23;
f3302a59 4374 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4375 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4376 spec->mux_nids = stac9205_mux_nids;
2549413e 4377 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 4378 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4379 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4380 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4381 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4382 spec->num_pwrs = 0;
f3302a59
MP		 4383
4384 spec->init = stac9205_core_init;
4385 spec->mixer = stac9205_mixer;
4386
e1f0d669
MR		 4387 spec->aloopback_mask = 0x40;
4388 spec->aloopback_shift = 0;
f3302a59 4389 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4390
ae0a8ed8 4391 switch (spec->board_config){
ae0a8ed8 4392 case STAC_9205_DELL_M43:
87d48363
MR		 4393 /* Enable SPDIF in/out */
4394 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4395 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4396
4fe5195c
MR		 4397 /* Enable unsol response for GPIO4/Dock HP connection */
4398 snd_hda_codec_write(codec, codec->afg, 0,
4399 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4400 snd_hda_codec_write_cache(codec, codec->afg, 0,
4401 AC_VERB_SET_UNSOLICITED_ENABLE,
4402 (AC_USRSP_EN | STAC_HP_EVENT));
4403
4404 spec->gpio_dir = 0x0b;
0fc9dec4 4405 spec->eapd_mask = 0x01;
4fe5195c
MR		 4406 spec->gpio_mask = 0x1b;
4407 spec->gpio_mute = 0x10;
e2e7d624 4408 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4409 * GPIO3 Low = DRM
87d48363 4410 */
4fe5195c 4411 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4412 break;
4413 default:
4414 /* GPIO0 High = EAPD */
0fc9dec4 4415 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4416 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4417 break;
4418 }
33382403 4419
f3302a59 4420 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4421 if (!err) {
4422 if (spec->board_config < 0) {
4423 printk(KERN_WARNING "hda_codec: No auto-config is "
4424 "available, default to model=ref\n");
4425 spec->board_config = STAC_9205_REF;
4426 goto again;
4427 }
4428 err = -EINVAL;
4429 }
f3302a59
MP		 4430 if (err < 0) {
4431 stac92xx_free(codec);
4432 return err;
4433 }
4434
4435 codec->patch_ops = stac92xx_patch_ops;
4436
4437 return 0;
4438}
4439
db064e50 4440/*
6d859065 4441 * STAC9872 hack
db064e50
TI		 4442 */
4443
99ccc560 4444/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4445static hda_nid_t vaio_dacs[] = { 0x2 };
4446#define VAIO_HP_DAC 0x5
4447static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4448static hda_nid_t vaio_mux_nids[] = { 0x15 };
4449
4450static struct hda_input_mux vaio_mux = {
a3a2f429 4451 .num_items = 3,
db064e50 4452 .items = {
d773781c 4453 /* { "HP", 0x0 }, */
1624cb9a
TI		 4454 { "Mic Jack", 0x1 },
4455 { "Internal Mic", 0x2 },
db064e50
TI		 4456 { "PCM", 0x3 },
4457 }
4458};
4459
4460static struct hda_verb vaio_init[] = {
4461 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4462 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4463 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4464 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4465 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4466 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4467 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4468 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4469 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4470 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4471 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4472 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4473 {}
4474};
4475
6d859065
GM		 4476static struct hda_verb vaio_ar_init[] = {
4477 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4478 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4479 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4480 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4481/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4482 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4483 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4484 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4485 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4486/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4487 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4488 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4489 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4490 {}
4491};
4492
db064e50 4493/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4494static struct hda_bind_ctls vaio_bind_master_vol = {
4495 .ops = &snd_hda_bind_vol,
4496 .values = {
4497 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4498 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4499 0
4500 },
4501};
db064e50
TI		 4502
4503/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4504static struct hda_bind_ctls vaio_bind_master_sw = {
4505 .ops = &snd_hda_bind_sw,
4506 .values = {
4507 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4508 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4509 0,
4510 },
4511};
db064e50
TI		 4512
4513static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4514 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4515 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4516 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4517 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4518 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4519 {
4520 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4521 .name = "Capture Source",
4522 .count = 1,
4523 .info = stac92xx_mux_enum_info,
4524 .get = stac92xx_mux_enum_get,
4525 .put = stac92xx_mux_enum_put,
4526 },
4527 {}
4528};
4529
6d859065 4530static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4531 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4532 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4533 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4534 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4535 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4536 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4537 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4538 {
4539 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4540 .name = "Capture Source",
4541 .count = 1,
4542 .info = stac92xx_mux_enum_info,
4543 .get = stac92xx_mux_enum_get,
4544 .put = stac92xx_mux_enum_put,
4545 },
4546 {}
4547};
4548
4549static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4550 .build_controls = stac92xx_build_controls,
4551 .build_pcms = stac92xx_build_pcms,
4552 .init = stac92xx_init,
4553 .free = stac92xx_free,
cb53c626 4554#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4555 .resume = stac92xx_resume,
4556#endif
4557};
4558
72e7b0dd
TI		 4559static int stac9872_vaio_init(struct hda_codec *codec)
4560{
4561 int err;
4562
4563 err = stac92xx_init(codec);
4564 if (err < 0)
4565 return err;
4566 if (codec->patch_ops.unsol_event)
4567 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4568 return 0;
4569}
4570
4571static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4572{
40c1d308 4573 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4574 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4575 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4576 } else {
4577 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4578 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4579 }
4580}
4581
4582static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4583{
4584 switch (res >> 26) {
4585 case STAC_HP_EVENT:
4586 stac9872_vaio_hp_detect(codec, res);
4587 break;
4588 }
4589}
4590
4591static struct hda_codec_ops stac9872_vaio_patch_ops = {
4592 .build_controls = stac92xx_build_controls,
4593 .build_pcms = stac92xx_build_pcms,
4594 .init = stac9872_vaio_init,
4595 .free = stac92xx_free,
4596 .unsol_event = stac9872_vaio_unsol_event,
4597#ifdef CONFIG_PM
4598 .resume = stac92xx_resume,
4599#endif
4600};
4601
6d859065
GM		 4602enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4603 CXD9872RD_VAIO,
4604 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4605 STAC9872AK_VAIO,
4606 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4607 STAC9872K_VAIO,
4608 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4609 CXD9872AKD_VAIO,
4610 STAC_9872_MODELS,
4611};
4612
4613static const char *stac9872_models[STAC_9872_MODELS] = {
4614 [CXD9872RD_VAIO] = "vaio",
4615 [CXD9872AKD_VAIO] = "vaio-ar",
4616};
4617
4618static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4619 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4620 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4621 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4622 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4623 {}
4624};
4625
6d859065 4626static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4627{
4628 struct sigmatel_spec *spec;
4629 int board_config;
4630
f5fcc13c
TI		 4631 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4632 stac9872_models,
4633 stac9872_cfg_tbl);
db064e50
TI		 4634 if (board_config < 0)
4635 /* unknown config, let generic-parser do its job... */
4636 return snd_hda_parse_generic_codec(codec);
4637
4638 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4639 if (spec == NULL)
4640 return -ENOMEM;
4641
4642 codec->spec = spec;
4643 switch (board_config) {
6d859065
GM		 4644 case CXD9872RD_VAIO:
4645 case STAC9872AK_VAIO:
4646 case STAC9872K_VAIO:
db064e50
TI		 4647 spec->mixer = vaio_mixer;
4648 spec->init = vaio_init;
4649 spec->multiout.max_channels = 2;
4650 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4651 spec->multiout.dac_nids = vaio_dacs;
4652 spec->multiout.hp_nid = VAIO_HP_DAC;
4653 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4654 spec->adc_nids = vaio_adcs;
a64135a2 4655 spec->num_pwrs = 0;
db064e50
TI		 4656 spec->input_mux = &vaio_mux;
4657 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4658 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4659 break;
6d859065
GM		 4660
4661 case CXD9872AKD_VAIO:
4662 spec->mixer = vaio_ar_mixer;
4663 spec->init = vaio_ar_init;
4664 spec->multiout.max_channels = 2;
4665 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4666 spec->multiout.dac_nids = vaio_dacs;
4667 spec->multiout.hp_nid = VAIO_HP_DAC;
4668 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4669 spec->num_pwrs = 0;
6d859065
GM		 4670 spec->adc_nids = vaio_adcs;
4671 spec->input_mux = &vaio_mux;
4672 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4673 codec->patch_ops = stac9872_patch_ops;
6d859065 4674 break;
db064e50
TI		 4675 }
4676
db064e50
TI		 4677 return 0;
4678}
4679
4680
2f2f4251
M		 4681/*
4682 * patch entries
4683 */
4684struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4685 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4686 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4687 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4688 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4689 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4690 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4691 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4692 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4693 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4694 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4695 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4696 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4697 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4698 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4699 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4700 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4701 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4702 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4703 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4704 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4705 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4706 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4707 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4708 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4709 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4710 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4711 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4712 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4713 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 4714 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4715 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 4716 /* The following does not take into account .id=0x83847661 when subsys =
4717 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4718 * currently not fully supported.
4719 */
4720 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4721 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4722 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4723 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4724 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4725 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4726 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4727 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4728 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4729 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4730 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 4731 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 4732 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
4733 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 4734 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 4735 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4736 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4737 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4738 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4739 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4740 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4741 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4742 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4743 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4744 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4745 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4746 {} /* terminator */
4747};
Linux kernel - Deliverables
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