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ALSA: Convert to snd_card_create() in sound/pci/*
[deliverable/linux.git] / sound / pci / ice1712 / ice1724.c
CommitLineData
1da177e4
LT		 1/*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
c1017a4c 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 6 * 2002 James Stafford <jstafford@ampltd.com>
7 * 2003 Takashi Iwai <tiwai@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
1de9fdc2 23 */
1da177e4 24
1de9fdc2 25#include <linux/io.h>
1da177e4
LT		 26#include <linux/delay.h>
27#include <linux/interrupt.h>
28#include <linux/init.h>
29#include <linux/pci.h>
30#include <linux/slab.h>
31#include <linux/moduleparam.h>
62932df8 32#include <linux/mutex.h>
1da177e4
LT		 33#include <sound/core.h>
34#include <sound/info.h>
aea3bfbc 35#include <sound/rawmidi.h>
1da177e4
LT		 36#include <sound/initval.h>
37
38#include <sound/asoundef.h>
39
40#include "ice1712.h"
41#include "envy24ht.h"
42
43/* lowlevel routines */
44#include "amp.h"
45#include "revo.h"
46#include "aureon.h"
47#include "vt1720_mobo.h"
48#include "pontis.h"
49#include "prodigy192.h"
6b8d6e55 50#include "prodigy_hifi.h"
1da177e4
LT		 51#include "juli.h"
52#include "phase.h"
f6cdab5f 53#include "wtm.h"
f31639b8 54#include "se.h"
1da177e4 55
c1017a4c 56MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 57MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
58MODULE_LICENSE("GPL");
59MODULE_SUPPORTED_DEVICE("{"
60 REVO_DEVICE_DESC
61 AMP_AUDIO2000_DEVICE_DESC
62 AUREON_DEVICE_DESC
63 VT1720_MOBO_DEVICE_DESC
64 PONTIS_DEVICE_DESC
65 PRODIGY192_DEVICE_DESC
6b8d6e55 66 PRODIGY_HIFI_DEVICE_DESC
1da177e4
LT		 67 JULI_DEVICE_DESC
68 PHASE_DEVICE_DESC
f6cdab5f 69 WTM_DEVICE_DESC
f31639b8 70 SE_DEVICE_DESC
1da177e4
LT		 71 "{VIA,VT1720},"
72 "{VIA,VT1724},"
73 "{ICEnsemble,Generic ICE1724},"
74 "{ICEnsemble,Generic Envy24HT}"
75 "{ICEnsemble,Generic Envy24PT}}");
76
77static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
78static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
79static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
80static char *model[SNDRV_CARDS];
81
82module_param_array(index, int, NULL, 0444);
83MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
84module_param_array(id, charp, NULL, 0444);
85MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
86module_param_array(enable, bool, NULL, 0444);
87MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
88module_param_array(model, charp, NULL, 0444);
89MODULE_PARM_DESC(model, "Use the given board model.");
90
1da177e4
LT		 91
92/* Both VT1720 and VT1724 have the same PCI IDs */
32b47da0 93static const struct pci_device_id snd_vt1724_ids[] = {
1da177e4
LT		 94 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
95 { 0, }
96};
97
98MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
99
100
101static int PRO_RATE_LOCKED;
102static int PRO_RATE_RESET = 1;
103static unsigned int PRO_RATE_DEFAULT = 44100;
104
105/*
106 * Basic I/O
107 */
1de9fdc2 108
d16be8ed
PH		 109/*
110 * default rates, default clock routines
111 */
112
1da177e4 113/* check whether the clock mode is spdif-in */
d16be8ed 114static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
1da177e4
LT		 115{
116 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
117}
118
ab0c7d72 119static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
1da177e4 120{
d16be8ed 121 return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
1da177e4
LT		 122}
123
124/*
125 * ac97 section
126 */
127
ab0c7d72 128static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
1da177e4
LT		 129{
130 unsigned char old_cmd;
131 int tm;
132 for (tm = 0; tm < 0x10000; tm++) {
133 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
134 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
135 continue;
136 if (!(old_cmd & VT1724_AC97_READY))
137 continue;
138 return old_cmd;
139 }
140 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
141 return old_cmd;
142}
143
ab0c7d72 144static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
1da177e4
LT		 145{
146 int tm;
147 for (tm = 0; tm < 0x10000; tm++)
148 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
149 return 0;
150 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
151 return -EIO;
152}
153
ab0c7d72 154static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 155 unsigned short reg,
156 unsigned short val)
157{
ab0c7d72 158 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 159 unsigned char old_cmd;
160
161 old_cmd = snd_vt1724_ac97_ready(ice);
162 old_cmd &= ~VT1724_AC97_ID_MASK;
163 old_cmd |= ac97->num;
164 outb(reg, ICEMT1724(ice, AC97_INDEX));
165 outw(val, ICEMT1724(ice, AC97_DATA));
166 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
167 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
168}
169
ab0c7d72 170static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 171{
ab0c7d72 172 struct snd_ice1712 *ice = ac97->private_data;
1da177e4
LT		 173 unsigned char old_cmd;
174
175 old_cmd = snd_vt1724_ac97_ready(ice);
176 old_cmd &= ~VT1724_AC97_ID_MASK;
177 old_cmd |= ac97->num;
178 outb(reg, ICEMT1724(ice, AC97_INDEX));
179 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
180 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
181 return ~0;
182 return inw(ICEMT1724(ice, AC97_DATA));
183}
184
185
186/*
187 * GPIO operations
188 */
189
190/* set gpio direction 0 = read, 1 = write */
ab0c7d72 191static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 192{
193 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
194 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
195}
196
197/* set the gpio mask (0 = writable) */
ab0c7d72 198static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 199{
200 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
1de9fdc2 201 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
1da177e4
LT		 202 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
203 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
204}
205
ab0c7d72 206static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
1da177e4
LT		 207{
208 outw(data, ICEREG1724(ice, GPIO_DATA));
1de9fdc2 209 if (!ice->vt1720)
1da177e4
LT		 210 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
211 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
212}
213
ab0c7d72 214static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
1da177e4
LT		 215{
216 unsigned int data;
1de9fdc2 217 if (!ice->vt1720)
1da177e4
LT		 218 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
219 else
220 data = 0;
221 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
222 return data;
223}
224
3a841d51 225/*
aea3bfbc 226 * MIDI
3a841d51 227 */
aea3bfbc
CL		 228
229static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
230{
231 unsigned int count;
232
233 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
234 inb(ICEREG1724(ice, MPU_DATA));
235}
236
237static inline struct snd_rawmidi_substream *
238get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
3a841d51 239{
aea3bfbc
CL		 240 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
241 struct snd_rawmidi_substream, list);
242}
243
244static void vt1724_midi_write(struct snd_ice1712 *ice)
245{
246 struct snd_rawmidi_substream *s;
247 int count, i;
248 u8 buffer[32];
249
250 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
251 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
252 if (count > 0) {
253 count = snd_rawmidi_transmit(s, buffer, count);
254 for (i = 0; i < count; ++i)
255 outb(buffer[i], ICEREG1724(ice, MPU_DATA));
256 }
257}
258
259static void vt1724_midi_read(struct snd_ice1712 *ice)
260{
261 struct snd_rawmidi_substream *s;
262 int count, i;
263 u8 buffer[32];
264
265 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
266 count = inb(ICEREG1724(ice, MPU_RXFIFO));
267 if (count > 0) {
268 count = min(count, 32);
269 for (i = 0; i < count; ++i)
270 buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
271 snd_rawmidi_receive(s, buffer, count);
272 }
273}
274
275static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
276 u8 flag, int enable)
277{
278 struct snd_ice1712 *ice = substream->rmidi->private_data;
279 u8 mask;
280
281 spin_lock_irq(&ice->reg_lock);
282 mask = inb(ICEREG1724(ice, IRQMASK));
283 if (enable)
284 mask &= ~flag;
3a841d51 285 else
aea3bfbc
CL		 286 mask |= flag;
287 outb(mask, ICEREG1724(ice, IRQMASK));
288 spin_unlock_irq(&ice->reg_lock);
3a841d51
TI		 289}
290
aea3bfbc 291static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
3a841d51 292{
aea3bfbc
CL		 293 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 1);
294 return 0;
295}
296
297static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
298{
299 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
300 return 0;
3a841d51
TI		 301}
302
aea3bfbc
CL		 303static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
304{
305 struct snd_ice1712 *ice = s->rmidi->private_data;
306 unsigned long flags;
307
308 spin_lock_irqsave(&ice->reg_lock, flags);
309 if (up) {
310 ice->midi_output = 1;
311 vt1724_midi_write(ice);
312 } else {
313 ice->midi_output = 0;
314 }
315 spin_unlock_irqrestore(&ice->reg_lock, flags);
316}
317
318static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
319{
320 struct snd_ice1712 *ice = s->rmidi->private_data;
321 unsigned long timeout;
322
323 /* 32 bytes should be transmitted in less than about 12 ms */
324 timeout = jiffies + msecs_to_jiffies(15);
325 do {
326 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
327 break;
328 schedule_timeout_uninterruptible(1);
329 } while (time_after(timeout, jiffies));
330}
331
332static struct snd_rawmidi_ops vt1724_midi_output_ops = {
333 .open = vt1724_midi_output_open,
334 .close = vt1724_midi_output_close,
335 .trigger = vt1724_midi_output_trigger,
336 .drain = vt1724_midi_output_drain,
337};
338
339static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
340{
341 vt1724_midi_clear_rx(s->rmidi->private_data);
342 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
343 return 0;
344}
345
346static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
347{
348 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
349 return 0;
350}
351
352static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
353{
354 struct snd_ice1712 *ice = s->rmidi->private_data;
355 unsigned long flags;
356
357 spin_lock_irqsave(&ice->reg_lock, flags);
358 if (up) {
359 ice->midi_input = 1;
360 vt1724_midi_read(ice);
361 } else {
362 ice->midi_input = 0;
363 }
364 spin_unlock_irqrestore(&ice->reg_lock, flags);
365}
366
367static struct snd_rawmidi_ops vt1724_midi_input_ops = {
368 .open = vt1724_midi_input_open,
369 .close = vt1724_midi_input_close,
370 .trigger = vt1724_midi_input_trigger,
371};
372
3a841d51 373
1da177e4
LT		 374/*
375 * Interrupt handler
376 */
377
7d12e780 378static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
1da177e4 379{
ab0c7d72 380 struct snd_ice1712 *ice = dev_id;
1da177e4 381 unsigned char status;
3a841d51
TI		 382 unsigned char status_mask =
383 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
1da177e4 384 int handled = 0;
3a841d51 385 int timeout = 0;
1da177e4
LT		 386
387 while (1) {
388 status = inb(ICEREG1724(ice, IRQSTAT));
3a841d51 389 status &= status_mask;
1da177e4
LT		 390 if (status == 0)
391 break;
3a841d51 392 if (++timeout > 10) {
1083206f
TI		 393 status = inb(ICEREG1724(ice, IRQSTAT));
394 printk(KERN_ERR "ice1724: Too long irq loop, "
395 "status = 0x%x\n", status);
396 if (status & VT1724_IRQ_MPU_TX) {
397 printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
6834d7ce
TI		 398 outb(inb(ICEREG1724(ice, IRQMASK)) |
399 VT1724_IRQ_MPU_TX,
1083206f
TI		 400 ICEREG1724(ice, IRQMASK));
401 }
3a841d51
TI		 402 break;
403 }
1de9fdc2 404 handled = 1;
3a841d51 405 if (status & VT1724_IRQ_MPU_TX) {
aea3bfbc
CL		 406 spin_lock(&ice->reg_lock);
407 if (ice->midi_output)
408 vt1724_midi_write(ice);
409 spin_unlock(&ice->reg_lock);
3a841d51
TI		 410 /* Due to mysterical reasons, MPU_TX is always
411 * generated (and can't be cleared) when a PCM
412 * playback is going. So let's ignore at the
413 * next loop.
414 */
415 status_mask &= ~VT1724_IRQ_MPU_TX;
416 }
417 if (status & VT1724_IRQ_MPU_RX) {
aea3bfbc
CL		 418 spin_lock(&ice->reg_lock);
419 if (ice->midi_input)
420 vt1724_midi_read(ice);
421 else
422 vt1724_midi_clear_rx(ice);
423 spin_unlock(&ice->reg_lock);
1da177e4 424 }
3a841d51
TI		 425 /* ack MPU irq */
426 outb(status, ICEREG1724(ice, IRQSTAT));
1da177e4
LT		 427 if (status & VT1724_IRQ_MTPCM) {
428 /*
429 * Multi-track PCM
430 * PCM assignment are:
431 * Playback DMA0 (M/C) = playback_pro_substream
432 * Playback DMA1 = playback_con_substream_ds[0]
433 * Playback DMA2 = playback_con_substream_ds[1]
434 * Playback DMA3 = playback_con_substream_ds[2]
435 * Playback DMA4 (SPDIF) = playback_con_substream
436 * Record DMA0 = capture_pro_substream
437 * Record DMA1 = capture_con_substream
438 */
439 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
440 if (mtstat & VT1724_MULTI_PDMA0) {
441 if (ice->playback_pro_substream)
442 snd_pcm_period_elapsed(ice->playback_pro_substream);
443 }
444 if (mtstat & VT1724_MULTI_RDMA0) {
445 if (ice->capture_pro_substream)
446 snd_pcm_period_elapsed(ice->capture_pro_substream);
447 }
448 if (mtstat & VT1724_MULTI_PDMA1) {
449 if (ice->playback_con_substream_ds[0])
450 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
451 }
452 if (mtstat & VT1724_MULTI_PDMA2) {
453 if (ice->playback_con_substream_ds[1])
454 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
455 }
456 if (mtstat & VT1724_MULTI_PDMA3) {
457 if (ice->playback_con_substream_ds[2])
458 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
459 }
460 if (mtstat & VT1724_MULTI_PDMA4) {
461 if (ice->playback_con_substream)
462 snd_pcm_period_elapsed(ice->playback_con_substream);
463 }
464 if (mtstat & VT1724_MULTI_RDMA1) {
465 if (ice->capture_con_substream)
466 snd_pcm_period_elapsed(ice->capture_con_substream);
467 }
468 /* ack anyway to avoid freeze */
469 outb(mtstat, ICEMT1724(ice, IRQ));
470 /* ought to really handle this properly */
471 if (mtstat & VT1724_MULTI_FIFO_ERR) {
472 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
1de9fdc2
AB		 473 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
474 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
1da177e4
LT		 475 /* If I don't do this, I get machine lockup due to continual interrupts */
476 }
477
478 }
479 }
480 return IRQ_RETVAL(handled);
481}
482
483/*
484 * PCM code - professional part (multitrack)
485 */
486
487static unsigned int rates[] = {
488 8000, 9600, 11025, 12000, 16000, 22050, 24000,
489 32000, 44100, 48000, 64000, 88200, 96000,
490 176400, 192000,
491};
492
ab0c7d72 493static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
1da177e4
LT		 494 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
495 .list = rates,
496 .mask = 0,
497};
498
ab0c7d72 499static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
1da177e4
LT		 500 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
501 .list = rates,
502 .mask = 0,
503};
504
ab0c7d72 505static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
1da177e4
LT		 506 .count = ARRAY_SIZE(rates),
507 .list = rates,
508 .mask = 0,
509};
510
511struct vt1724_pcm_reg {
512 unsigned int addr; /* ADDR register offset */
513 unsigned int size; /* SIZE register offset */
514 unsigned int count; /* COUNT register offset */
515 unsigned int start; /* start & pause bit */
516};
517
ab0c7d72 518static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 519{
ab0c7d72 520 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 521 unsigned char what;
522 unsigned char old;
ab0c7d72 523 struct snd_pcm_substream *s;
1da177e4
LT		 524
525 what = 0;
ef991b95 526 snd_pcm_group_for_each_entry(s, substream) {
29998d24
CL		 527 if (snd_pcm_substream_chip(s) == ice) {
528 const struct vt1724_pcm_reg *reg;
529 reg = s->runtime->private_data;
530 what |= reg->start;
531 snd_pcm_trigger_done(s, substream);
532 }
1da177e4
LT		 533 }
534
535 switch (cmd) {
536 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
537 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
538 spin_lock(&ice->reg_lock);
539 old = inb(ICEMT1724(ice, DMA_PAUSE));
540 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
541 old |= what;
542 else
543 old &= ~what;
544 outb(old, ICEMT1724(ice, DMA_PAUSE));
545 spin_unlock(&ice->reg_lock);
546 break;
547
548 case SNDRV_PCM_TRIGGER_START:
549 case SNDRV_PCM_TRIGGER_STOP:
550 spin_lock(&ice->reg_lock);
551 old = inb(ICEMT1724(ice, DMA_CONTROL));
552 if (cmd == SNDRV_PCM_TRIGGER_START)
553 old |= what;
554 else
555 old &= ~what;
556 outb(old, ICEMT1724(ice, DMA_CONTROL));
557 spin_unlock(&ice->reg_lock);
558 break;
559
560 default:
561 return -EINVAL;
562 }
563 return 0;
564}
565
566/*
567 */
568
569#define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
570 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
571#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
572 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
573
d16be8ed
PH		 574static const unsigned int stdclock_rate_list[16] = {
575 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
576 22050, 11025, 88200, 176400, 0, 192000, 64000
577};
578
579static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
1da177e4 580{
d16be8ed
PH		 581 unsigned int rate;
582 rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
583 return rate;
584}
585
586static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
587{
588 int i;
589 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
590 if (stdclock_rate_list[i] == rate) {
591 outb(i, ICEMT1724(ice, RATE));
592 return;
593 }
594 }
595}
596
597static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
598 unsigned int rate)
599{
600 unsigned char val, old;
601 /* check MT02 */
1da177e4 602 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
d16be8ed
PH		 603 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
604 if (rate > 96000)
605 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
1da177e4 606 else
d16be8ed
PH		 607 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
608 if (val != old) {
609 outb(val, ICEMT1724(ice, I2S_FORMAT));
610 /* master clock changed */
611 return 1;
612 }
613 }
614 /* no change in master clock */
615 return 0;
1da177e4
LT		 616}
617
ab0c7d72
TI		 618static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
619 int force)
1da177e4
LT		 620{
621 unsigned long flags;
d16be8ed
PH		 622 unsigned char mclk_change;
623 unsigned int i, old_rate;
1da177e4 624
d16be8ed 625 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
1da177e4 626 return;
1da177e4 627 spin_lock_irqsave(&ice->reg_lock, flags);
d16be8ed 628 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
1da177e4
LT		 629 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
630 /* running? we cannot change the rate now... */
631 spin_unlock_irqrestore(&ice->reg_lock, flags);
632 return;
633 }
634 if (!force && is_pro_rate_locked(ice)) {
635 spin_unlock_irqrestore(&ice->reg_lock, flags);
636 return;
637 }
638
d16be8ed
PH		 639 old_rate = ice->get_rate(ice);
640 if (force || (old_rate != rate))
641 ice->set_rate(ice, rate);
1da177e4
LT		 642 else if (rate == ice->cur_rate) {
643 spin_unlock_irqrestore(&ice->reg_lock, flags);
644 return;
645 }
646
647 ice->cur_rate = rate;
648
d16be8ed
PH		 649 /* setting master clock */
650 mclk_change = ice->set_mclk(ice, rate);
651
1da177e4
LT		 652 spin_unlock_irqrestore(&ice->reg_lock, flags);
653
654 if (mclk_change && ice->gpio.i2s_mclk_changed)
655 ice->gpio.i2s_mclk_changed(ice);
656 if (ice->gpio.set_pro_rate)
657 ice->gpio.set_pro_rate(ice, rate);
658
659 /* set up codecs */
660 for (i = 0; i < ice->akm_codecs; i++) {
661 if (ice->akm[i].ops.set_rate_val)
662 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
663 }
664 if (ice->spdif.ops.setup_rate)
665 ice->spdif.ops.setup_rate(ice, rate);
666}
667
ab0c7d72
TI		 668static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
669 struct snd_pcm_hw_params *hw_params)
1da177e4 670{
ab0c7d72 671 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 672 int i, chs;
673
674 chs = params_channels(hw_params);
62932df8 675 mutex_lock(&ice->open_mutex);
1da177e4
LT		 676 /* mark surround channels */
677 if (substream == ice->playback_pro_substream) {
678 /* PDMA0 can be multi-channel up to 8 */
679 chs = chs / 2 - 1;
680 for (i = 0; i < chs; i++) {
ab0c7d72
TI		 681 if (ice->pcm_reserved[i] &&
682 ice->pcm_reserved[i] != substream) {
62932df8 683 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 684 return -EBUSY;
685 }
686 ice->pcm_reserved[i] = substream;
687 }
688 for (; i < 3; i++) {
689 if (ice->pcm_reserved[i] == substream)
690 ice->pcm_reserved[i] = NULL;
691 }
692 } else {
693 for (i = 0; i < 3; i++) {
694 /* check individual playback stream */
695 if (ice->playback_con_substream_ds[i] == substream) {
ab0c7d72
TI		 696 if (ice->pcm_reserved[i] &&
697 ice->pcm_reserved[i] != substream) {
62932df8 698 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 699 return -EBUSY;
700 }
701 ice->pcm_reserved[i] = substream;
702 break;
703 }
704 }
705 }
62932df8 706 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 707 snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
708 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
709}
710
ab0c7d72 711static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4 712{
ab0c7d72 713 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 714 int i;
715
62932df8 716 mutex_lock(&ice->open_mutex);
1da177e4
LT		 717 /* unmark surround channels */
718 for (i = 0; i < 3; i++)
719 if (ice->pcm_reserved[i] == substream)
720 ice->pcm_reserved[i] = NULL;
62932df8 721 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 722 return snd_pcm_lib_free_pages(substream);
723}
724
ab0c7d72 725static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
1da177e4 726{
ab0c7d72 727 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 728 unsigned char val;
729 unsigned int size;
730
731 spin_lock_irq(&ice->reg_lock);
732 val = (8 - substream->runtime->channels) >> 1;
733 outb(val, ICEMT1724(ice, BURST));
734
735 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
736
737 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
1de9fdc2 738 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
1da177e4
LT		 739 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
740 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
741 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
1de9fdc2 742 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
1da177e4
LT		 743 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
744 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
745
746 spin_unlock_irq(&ice->reg_lock);
747
1de9fdc2 748 /* printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream)); */
1da177e4
LT		 749 return 0;
750}
751
ab0c7d72 752static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
1da177e4 753{
ab0c7d72 754 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 755 size_t ptr;
756
757 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
758 return 0;
759#if 0 /* read PLAYBACK_ADDR */
760 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
761 if (ptr < substream->runtime->dma_addr) {
762 snd_printd("ice1724: invalid negative ptr\n");
763 return 0;
764 }
765 ptr -= substream->runtime->dma_addr;
766 ptr = bytes_to_frames(substream->runtime, ptr);
767 if (ptr >= substream->runtime->buffer_size) {
ab0c7d72
TI		 768 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
769 (int)ptr, (int)substream->runtime->period_size);
1da177e4
LT		 770 return 0;
771 }
772#else /* read PLAYBACK_SIZE */
773 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
774 ptr = (ptr + 1) << 2;
775 ptr = bytes_to_frames(substream->runtime, ptr);
1de9fdc2 776 if (!ptr)
1da177e4
LT		 777 ;
778 else if (ptr <= substream->runtime->buffer_size)
779 ptr = substream->runtime->buffer_size - ptr;
780 else {
ab0c7d72
TI		 781 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
782 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT		 783 ptr = 0;
784 }
785#endif
786 return ptr;
787}
788
ab0c7d72 789static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
1da177e4 790{
ab0c7d72 791 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
32b47da0 792 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
1da177e4
LT		 793
794 spin_lock_irq(&ice->reg_lock);
795 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
ab0c7d72
TI		 796 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
797 ice->profi_port + reg->size);
798 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
799 ice->profi_port + reg->count);
1da177e4
LT		 800 spin_unlock_irq(&ice->reg_lock);
801 return 0;
802}
803
ab0c7d72 804static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 805{
ab0c7d72 806 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
32b47da0 807 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
1da177e4
LT		 808 size_t ptr;
809
810 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
811 return 0;
812#if 0 /* use ADDR register */
813 ptr = inl(ice->profi_port + reg->addr);
814 ptr -= substream->runtime->dma_addr;
815 return bytes_to_frames(substream->runtime, ptr);
816#else /* use SIZE register */
817 ptr = inw(ice->profi_port + reg->size);
818 ptr = (ptr + 1) << 2;
819 ptr = bytes_to_frames(substream->runtime, ptr);
1de9fdc2 820 if (!ptr)
1da177e4
LT		 821 ;
822 else if (ptr <= substream->runtime->buffer_size)
823 ptr = substream->runtime->buffer_size - ptr;
824 else {
ab0c7d72
TI		 825 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
826 (int)ptr, (int)substream->runtime->buffer_size);
1da177e4
LT		 827 ptr = 0;
828 }
829 return ptr;
830#endif
831}
832
32b47da0 833static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
1da177e4
LT		 834 .addr = VT1724_MT_PLAYBACK_ADDR,
835 .size = VT1724_MT_PLAYBACK_SIZE,
836 .count = VT1724_MT_PLAYBACK_COUNT,
837 .start = VT1724_PDMA0_START,
838};
839
32b47da0 840static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
1da177e4
LT		 841 .addr = VT1724_MT_CAPTURE_ADDR,
842 .size = VT1724_MT_CAPTURE_SIZE,
843 .count = VT1724_MT_CAPTURE_COUNT,
844 .start = VT1724_RDMA0_START,
845};
846
1de9fdc2 847static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
1da177e4
LT		 848 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
849 SNDRV_PCM_INFO_BLOCK_TRANSFER |
850 SNDRV_PCM_INFO_MMAP_VALID |
851 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
852 .formats = SNDRV_PCM_FMTBIT_S32_LE,
853 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
854 .rate_min = 8000,
855 .rate_max = 192000,
856 .channels_min = 2,
857 .channels_max = 8,
858 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
859 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
860 .period_bytes_max = (1UL << 21),
861 .periods_min = 2,
862 .periods_max = 1024,
863};
864
1de9fdc2 865static const struct snd_pcm_hardware snd_vt1724_spdif = {
1da177e4
LT		 866 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
867 SNDRV_PCM_INFO_BLOCK_TRANSFER |
868 SNDRV_PCM_INFO_MMAP_VALID |
869 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
870 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2dfbeca9
TI		 871 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
872 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
873 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
874 SNDRV_PCM_RATE_192000),
1da177e4 875 .rate_min = 32000,
2dfbeca9 876 .rate_max = 192000,
1da177e4
LT		 877 .channels_min = 2,
878 .channels_max = 2,
879 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
880 .period_bytes_min = 2 * 4 * 2,
881 .period_bytes_max = (1UL << 18),
882 .periods_min = 2,
883 .periods_max = 1024,
884};
885
1de9fdc2 886static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
1da177e4
LT		 887 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
888 SNDRV_PCM_INFO_BLOCK_TRANSFER |
889 SNDRV_PCM_INFO_MMAP_VALID |
890 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
891 .formats = SNDRV_PCM_FMTBIT_S32_LE,
892 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
893 .rate_min = 8000,
894 .rate_max = 192000,
895 .channels_min = 2,
896 .channels_max = 2,
897 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
898 .period_bytes_min = 2 * 4 * 2,
899 .period_bytes_max = (1UL << 18),
900 .periods_min = 2,
901 .periods_max = 1024,
902};
903
904/*
905 * set rate constraints
906 */
d16be8ed 907static void set_std_hw_rates(struct snd_ice1712 *ice)
1da177e4 908{
1da177e4
LT		 909 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
910 /* I2S */
911 /* VT1720 doesn't support more than 96kHz */
912 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
d16be8ed
PH		 913 ice->hw_rates = &hw_constraints_rates_192;
914 else
915 ice->hw_rates = &hw_constraints_rates_96;
916 } else {
1da177e4 917 /* ACLINK */
d16be8ed 918 ice->hw_rates = &hw_constraints_rates_48;
1da177e4 919 }
d16be8ed
PH		 920}
921
922static int set_rate_constraints(struct snd_ice1712 *ice,
923 struct snd_pcm_substream *substream)
924{
925 struct snd_pcm_runtime *runtime = substream->runtime;
926
927 runtime->hw.rate_min = ice->hw_rates->list[0];
928 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
929 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
930 return snd_pcm_hw_constraint_list(runtime, 0,
931 SNDRV_PCM_HW_PARAM_RATE,
932 ice->hw_rates);
1da177e4
LT		 933}
934
935/* multi-channel playback needs alignment 8x32bit regardless of the channels
936 * actually used
937 */
938#define VT1724_BUFFER_ALIGN 0x20
939
ab0c7d72 940static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1da177e4 941{
ab0c7d72
TI		 942 struct snd_pcm_runtime *runtime = substream->runtime;
943 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
a6b936b9 944 int chs, num_indeps;
1da177e4 945
32b47da0 946 runtime->private_data = (void *)&vt1724_playback_pro_reg;
1da177e4
LT		 947 ice->playback_pro_substream = substream;
948 runtime->hw = snd_vt1724_playback_pro;
949 snd_pcm_set_sync(substream);
950 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
951 set_rate_constraints(ice, substream);
62932df8 952 mutex_lock(&ice->open_mutex);
1da177e4 953 /* calculate the currently available channels */
a6b936b9
TI		 954 num_indeps = ice->num_total_dacs / 2 - 1;
955 for (chs = 0; chs < num_indeps; chs++) {
1da177e4
LT		 956 if (ice->pcm_reserved[chs])
957 break;
958 }
959 chs = (chs + 1) * 2;
960 runtime->hw.channels_max = chs;
961 if (chs > 2) /* channels must be even */
962 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
62932df8 963 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 964 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
965 VT1724_BUFFER_ALIGN);
966 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
967 VT1724_BUFFER_ALIGN);
968 return 0;
969}
970
ab0c7d72 971static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1da177e4 972{
ab0c7d72
TI		 973 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
974 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 975
32b47da0 976 runtime->private_data = (void *)&vt1724_capture_pro_reg;
1da177e4
LT		 977 ice->capture_pro_substream = substream;
978 runtime->hw = snd_vt1724_2ch_stereo;
979 snd_pcm_set_sync(substream);
980 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
981 set_rate_constraints(ice, substream);
982 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
983 VT1724_BUFFER_ALIGN);
984 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
985 VT1724_BUFFER_ALIGN);
986 return 0;
987}
988
ab0c7d72 989static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1da177e4 990{
ab0c7d72 991 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 992
993 if (PRO_RATE_RESET)
d16be8ed 994 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT		 995 ice->playback_pro_substream = NULL;
996
997 return 0;
998}
999
ab0c7d72 1000static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1da177e4 1001{
ab0c7d72 1002 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1003
1004 if (PRO_RATE_RESET)
d16be8ed 1005 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT		 1006 ice->capture_pro_substream = NULL;
1007 return 0;
1008}
1009
ab0c7d72 1010static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1da177e4
LT		 1011 .open = snd_vt1724_playback_pro_open,
1012 .close = snd_vt1724_playback_pro_close,
1013 .ioctl = snd_pcm_lib_ioctl,
1014 .hw_params = snd_vt1724_pcm_hw_params,
1015 .hw_free = snd_vt1724_pcm_hw_free,
1016 .prepare = snd_vt1724_playback_pro_prepare,
1017 .trigger = snd_vt1724_pcm_trigger,
1018 .pointer = snd_vt1724_playback_pro_pointer,
1019};
1020
ab0c7d72 1021static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1da177e4
LT		 1022 .open = snd_vt1724_capture_pro_open,
1023 .close = snd_vt1724_capture_pro_close,
1024 .ioctl = snd_pcm_lib_ioctl,
1025 .hw_params = snd_vt1724_pcm_hw_params,
1026 .hw_free = snd_vt1724_pcm_hw_free,
1027 .prepare = snd_vt1724_pcm_prepare,
1028 .trigger = snd_vt1724_pcm_trigger,
1029 .pointer = snd_vt1724_pcm_pointer,
1030};
1031
1de9fdc2 1032static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
1da177e4 1033{
ab0c7d72 1034 struct snd_pcm *pcm;
1da177e4
LT		 1035 int err;
1036
1037 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
1038 if (err < 0)
1039 return err;
1040
1041 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
1042 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
1043
1044 pcm->private_data = ice;
1045 pcm->info_flags = 0;
1046 strcpy(pcm->name, "ICE1724");
1047
1048 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI		 1049 snd_dma_pci_data(ice->pci),
1050 256*1024, 256*1024);
1da177e4
LT		 1051
1052 ice->pcm_pro = pcm;
1053
1054 return 0;
1055}
1056
1057
1058/*
1059 * SPDIF PCM
1060 */
1061
32b47da0 1062static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
1da177e4
LT		 1063 .addr = VT1724_MT_PDMA4_ADDR,
1064 .size = VT1724_MT_PDMA4_SIZE,
1065 .count = VT1724_MT_PDMA4_COUNT,
1066 .start = VT1724_PDMA4_START,
1067};
1068
32b47da0 1069static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
1da177e4
LT		 1070 .addr = VT1724_MT_RDMA1_ADDR,
1071 .size = VT1724_MT_RDMA1_SIZE,
1072 .count = VT1724_MT_RDMA1_COUNT,
1073 .start = VT1724_RDMA1_START,
1074};
1075
1076/* update spdif control bits; call with reg_lock */
ab0c7d72 1077static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1da177e4
LT		 1078{
1079 unsigned char cbit, disabled;
1080
1081 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
1082 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
1083 if (cbit != disabled)
1084 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
1085 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1086 if (cbit != disabled)
1087 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
1088 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1089}
1090
1091/* update SPDIF control bits according to the given rate */
ab0c7d72 1092static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1da177e4
LT		 1093{
1094 unsigned int val, nval;
1095 unsigned long flags;
1096
1097 spin_lock_irqsave(&ice->reg_lock, flags);
1098 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
1099 nval &= ~(7 << 12);
1100 switch (rate) {
1101 case 44100: break;
1102 case 48000: nval |= 2 << 12; break;
1103 case 32000: nval |= 3 << 12; break;
2dfbeca9
TI		 1104 case 88200: nval |= 4 << 12; break;
1105 case 96000: nval |= 5 << 12; break;
1106 case 192000: nval |= 6 << 12; break;
1107 case 176400: nval |= 7 << 12; break;
1da177e4
LT		 1108 }
1109 if (val != nval)
1110 update_spdif_bits(ice, nval);
1111 spin_unlock_irqrestore(&ice->reg_lock, flags);
1112}
1113
ab0c7d72 1114static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1da177e4 1115{
ab0c7d72 1116 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1de9fdc2 1117 if (!ice->force_pdma4)
1da177e4
LT		 1118 update_spdif_rate(ice, substream->runtime->rate);
1119 return snd_vt1724_pcm_prepare(substream);
1120}
1121
ab0c7d72 1122static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1da177e4 1123{
ab0c7d72
TI		 1124 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1125 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1126
32b47da0 1127 runtime->private_data = (void *)&vt1724_playback_spdif_reg;
1da177e4
LT		 1128 ice->playback_con_substream = substream;
1129 if (ice->force_pdma4) {
1130 runtime->hw = snd_vt1724_2ch_stereo;
1131 set_rate_constraints(ice, substream);
1132 } else
1133 runtime->hw = snd_vt1724_spdif;
1134 snd_pcm_set_sync(substream);
1135 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1136 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1137 VT1724_BUFFER_ALIGN);
1138 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1139 VT1724_BUFFER_ALIGN);
c93f5a1e
TI		 1140 if (ice->spdif.ops.open)
1141 ice->spdif.ops.open(ice, substream);
1da177e4
LT		 1142 return 0;
1143}
1144
ab0c7d72 1145static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1146{
ab0c7d72 1147 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1148
1149 if (PRO_RATE_RESET)
d16be8ed 1150 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4 1151 ice->playback_con_substream = NULL;
c93f5a1e
TI		 1152 if (ice->spdif.ops.close)
1153 ice->spdif.ops.close(ice, substream);
1da177e4
LT		 1154
1155 return 0;
1156}
1157
ab0c7d72 1158static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1da177e4 1159{
ab0c7d72
TI		 1160 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1161 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1162
32b47da0 1163 runtime->private_data = (void *)&vt1724_capture_spdif_reg;
1da177e4
LT		 1164 ice->capture_con_substream = substream;
1165 if (ice->force_rdma1) {
1166 runtime->hw = snd_vt1724_2ch_stereo;
1167 set_rate_constraints(ice, substream);
1168 } else
1169 runtime->hw = snd_vt1724_spdif;
1170 snd_pcm_set_sync(substream);
1171 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1172 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1173 VT1724_BUFFER_ALIGN);
1174 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1175 VT1724_BUFFER_ALIGN);
c93f5a1e
TI		 1176 if (ice->spdif.ops.open)
1177 ice->spdif.ops.open(ice, substream);
1da177e4
LT		 1178 return 0;
1179}
1180
ab0c7d72 1181static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1da177e4 1182{
ab0c7d72 1183 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1184
1185 if (PRO_RATE_RESET)
d16be8ed 1186 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4 1187 ice->capture_con_substream = NULL;
c93f5a1e
TI		 1188 if (ice->spdif.ops.close)
1189 ice->spdif.ops.close(ice, substream);
1da177e4
LT		 1190
1191 return 0;
1192}
1193
ab0c7d72 1194static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1da177e4
LT		 1195 .open = snd_vt1724_playback_spdif_open,
1196 .close = snd_vt1724_playback_spdif_close,
1197 .ioctl = snd_pcm_lib_ioctl,
1198 .hw_params = snd_vt1724_pcm_hw_params,
1199 .hw_free = snd_vt1724_pcm_hw_free,
1200 .prepare = snd_vt1724_playback_spdif_prepare,
1201 .trigger = snd_vt1724_pcm_trigger,
1202 .pointer = snd_vt1724_pcm_pointer,
1203};
1204
ab0c7d72 1205static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1da177e4
LT		 1206 .open = snd_vt1724_capture_spdif_open,
1207 .close = snd_vt1724_capture_spdif_close,
1208 .ioctl = snd_pcm_lib_ioctl,
1209 .hw_params = snd_vt1724_pcm_hw_params,
1210 .hw_free = snd_vt1724_pcm_hw_free,
1211 .prepare = snd_vt1724_pcm_prepare,
1212 .trigger = snd_vt1724_pcm_trigger,
1213 .pointer = snd_vt1724_pcm_pointer,
1214};
1215
1216
1de9fdc2 1217static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
1da177e4
LT		 1218{
1219 char *name;
ab0c7d72 1220 struct snd_pcm *pcm;
1da177e4
LT		 1221 int play, capt;
1222 int err;
1223
1224 if (ice->force_pdma4 ||
1225 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1226 play = 1;
1227 ice->has_spdif = 1;
1228 } else
1229 play = 0;
1230 if (ice->force_rdma1 ||
1231 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1232 capt = 1;
1233 ice->has_spdif = 1;
1234 } else
1235 capt = 0;
1de9fdc2 1236 if (!play && !capt)
1da177e4
LT		 1237 return 0; /* no spdif device */
1238
1239 if (ice->force_pdma4 || ice->force_rdma1)
1240 name = "ICE1724 Secondary";
1241 else
8eca7538 1242 name = "ICE1724 IEC958";
1da177e4
LT		 1243 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1244 if (err < 0)
1245 return err;
1246
1247 if (play)
1248 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1249 &snd_vt1724_playback_spdif_ops);
1250 if (capt)
1251 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1252 &snd_vt1724_capture_spdif_ops);
1253
1254 pcm->private_data = ice;
1255 pcm->info_flags = 0;
1256 strcpy(pcm->name, name);
1257
1258 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI		 1259 snd_dma_pci_data(ice->pci),
1260 64*1024, 64*1024);
1da177e4
LT		 1261
1262 ice->pcm = pcm;
1263
1264 return 0;
1265}
1266
1267
1268/*
1269 * independent surround PCMs
1270 */
1271
32b47da0 1272static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1da177e4
LT		 1273 {
1274 .addr = VT1724_MT_PDMA1_ADDR,
1275 .size = VT1724_MT_PDMA1_SIZE,
1276 .count = VT1724_MT_PDMA1_COUNT,
1277 .start = VT1724_PDMA1_START,
1278 },
1279 {
1280 .addr = VT1724_MT_PDMA2_ADDR,
1281 .size = VT1724_MT_PDMA2_SIZE,
1282 .count = VT1724_MT_PDMA2_COUNT,
1283 .start = VT1724_PDMA2_START,
1284 },
1285 {
1286 .addr = VT1724_MT_PDMA3_ADDR,
1287 .size = VT1724_MT_PDMA3_SIZE,
1288 .count = VT1724_MT_PDMA3_COUNT,
1289 .start = VT1724_PDMA3_START,
1290 },
1291};
1292
ab0c7d72 1293static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1da177e4 1294{
ab0c7d72 1295 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1296 unsigned char val;
1297
1298 spin_lock_irq(&ice->reg_lock);
1299 val = 3 - substream->number;
1300 if (inb(ICEMT1724(ice, BURST)) < val)
1301 outb(val, ICEMT1724(ice, BURST));
1302 spin_unlock_irq(&ice->reg_lock);
1303 return snd_vt1724_pcm_prepare(substream);
1304}
1305
ab0c7d72 1306static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1da177e4 1307{
ab0c7d72
TI		 1308 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1309 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 1310
62932df8 1311 mutex_lock(&ice->open_mutex);
1da177e4
LT		 1312 /* already used by PDMA0? */
1313 if (ice->pcm_reserved[substream->number]) {
62932df8 1314 mutex_unlock(&ice->open_mutex);
1da177e4
LT		 1315 return -EBUSY; /* FIXME: should handle blocking mode properly */
1316 }
62932df8 1317 mutex_unlock(&ice->open_mutex);
32b47da0 1318 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
1da177e4
LT		 1319 ice->playback_con_substream_ds[substream->number] = substream;
1320 runtime->hw = snd_vt1724_2ch_stereo;
1321 snd_pcm_set_sync(substream);
1322 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1323 set_rate_constraints(ice, substream);
1324 return 0;
1325}
1326
ab0c7d72 1327static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1da177e4 1328{
ab0c7d72 1329 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1da177e4
LT		 1330
1331 if (PRO_RATE_RESET)
d16be8ed 1332 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1da177e4
LT		 1333 ice->playback_con_substream_ds[substream->number] = NULL;
1334 ice->pcm_reserved[substream->number] = NULL;
1335
1336 return 0;
1337}
1338
ab0c7d72 1339static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1da177e4
LT		 1340 .open = snd_vt1724_playback_indep_open,
1341 .close = snd_vt1724_playback_indep_close,
1342 .ioctl = snd_pcm_lib_ioctl,
1343 .hw_params = snd_vt1724_pcm_hw_params,
1344 .hw_free = snd_vt1724_pcm_hw_free,
1345 .prepare = snd_vt1724_playback_indep_prepare,
1346 .trigger = snd_vt1724_pcm_trigger,
1347 .pointer = snd_vt1724_pcm_pointer,
1348};
1349
1350
1de9fdc2 1351static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
1da177e4 1352{
ab0c7d72 1353 struct snd_pcm *pcm;
1da177e4
LT		 1354 int play;
1355 int err;
1356
1357 play = ice->num_total_dacs / 2 - 1;
1358 if (play <= 0)
1359 return 0;
1360
1361 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1362 if (err < 0)
1363 return err;
1364
1365 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1366 &snd_vt1724_playback_indep_ops);
1367
1368 pcm->private_data = ice;
1369 pcm->info_flags = 0;
1370 strcpy(pcm->name, "ICE1724 Surround PCM");
1371
1372 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ab0c7d72
TI		 1373 snd_dma_pci_data(ice->pci),
1374 64*1024, 64*1024);
1da177e4
LT		 1375
1376 ice->pcm_ds = pcm;
1377
1378 return 0;
1379}
1380
1381
1382/*
1383 * Mixer section
1384 */
1385
1de9fdc2 1386static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
1da177e4
LT		 1387{
1388 int err;
1389
1de9fdc2 1390 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
ab0c7d72
TI		 1391 struct snd_ac97_bus *pbus;
1392 struct snd_ac97_template ac97;
1393 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1394 .write = snd_vt1724_ac97_write,
1395 .read = snd_vt1724_ac97_read,
1396 };
1397
1398 /* cold reset */
1399 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1400 mdelay(5); /* FIXME */
1401 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1402
1de9fdc2
AB		 1403 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
1404 if (err < 0)
1da177e4
LT		 1405 return err;
1406 memset(&ac97, 0, sizeof(ac97));
1407 ac97.private_data = ice;
1de9fdc2
AB		 1408 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1409 if (err < 0)
1da177e4
LT		 1410 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1411 else
1412 return 0;
1413 }
1414 /* I2S mixer only */
1415 strcat(ice->card->mixername, "ICE1724 - multitrack");
1416 return 0;
1417}
1418
1419/*
1420 *
1421 */
1422
ab0c7d72 1423static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1da177e4
LT		 1424{
1425 return (unsigned int)ice->eeprom.data[idx] | \
1426 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1427 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1428}
1429
1de9fdc2 1430static void snd_vt1724_proc_read(struct snd_info_entry *entry,
ab0c7d72 1431 struct snd_info_buffer *buffer)
1da177e4 1432{
ab0c7d72 1433 struct snd_ice1712 *ice = entry->private_data;
1da177e4
LT		 1434 unsigned int idx;
1435
1436 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1437 snd_iprintf(buffer, "EEPROM:\n");
1438
1439 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1440 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1441 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
ab0c7d72
TI		 1442 snd_iprintf(buffer, " System Config : 0x%x\n",
1443 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1444 snd_iprintf(buffer, " ACLink : 0x%x\n",
1445 ice->eeprom.data[ICE_EEP2_ACLINK]);
1446 snd_iprintf(buffer, " I2S : 0x%x\n",
1447 ice->eeprom.data[ICE_EEP2_I2S]);
1448 snd_iprintf(buffer, " S/PDIF : 0x%x\n",
1449 ice->eeprom.data[ICE_EEP2_SPDIF]);
1450 snd_iprintf(buffer, " GPIO direction : 0x%x\n",
1451 ice->eeprom.gpiodir);
1452 snd_iprintf(buffer, " GPIO mask : 0x%x\n",
1453 ice->eeprom.gpiomask);
1454 snd_iprintf(buffer, " GPIO state : 0x%x\n",
1455 ice->eeprom.gpiostate);
1da177e4 1456 for (idx = 0x12; idx < ice->eeprom.size; idx++)
ab0c7d72
TI		 1457 snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
1458 idx, ice->eeprom.data[idx]);
1da177e4
LT		 1459
1460 snd_iprintf(buffer, "\nRegisters:\n");
1461
ab0c7d72
TI		 1462 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
1463 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1da177e4 1464 for (idx = 0x0; idx < 0x20 ; idx++)
ab0c7d72
TI		 1465 snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
1466 idx, inb(ice->port+idx));
1da177e4 1467 for (idx = 0x0; idx < 0x30 ; idx++)
ab0c7d72
TI		 1468 snd_iprintf(buffer, " MT%02x : 0x%02x\n",
1469 idx, inb(ice->profi_port+idx));
1da177e4
LT		 1470}
1471
1de9fdc2 1472static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
1da177e4 1473{
ab0c7d72 1474 struct snd_info_entry *entry;
1da177e4 1475
1de9fdc2 1476 if (!snd_card_proc_new(ice->card, "ice1724", &entry))
bf850204 1477 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
1da177e4
LT		 1478}
1479
1480/*
1481 *
1482 */
1483
ab0c7d72
TI		 1484static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1485 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1486{
1487 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
ab0c7d72 1488 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1da177e4
LT		 1489 return 0;
1490}
1491
ab0c7d72
TI		 1492static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1493 struct snd_ctl_elem_value *ucontrol)
1da177e4 1494{
ab0c7d72 1495 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1de9fdc2 1496
1da177e4
LT		 1497 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1498 return 0;
1499}
1500
1b60f6b0 1501static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
1da177e4
LT		 1502 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1503 .name = "ICE1724 EEPROM",
1504 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1505 .info = snd_vt1724_eeprom_info,
1506 .get = snd_vt1724_eeprom_get
1507};
1508
1509/*
1510 */
ab0c7d72
TI		 1511static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1512 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1513{
1514 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1515 uinfo->count = 1;
1516 return 0;
1517}
1518
ab0c7d72 1519static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1da177e4 1520{
2dfbeca9 1521 unsigned int val, rbits;
1da177e4
LT		 1522
1523 val = diga->status[0] & 0x03; /* professional, non-audio */
1524 if (val & 0x01) {
1525 /* professional */
ab0c7d72
TI		 1526 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1527 IEC958_AES0_PRO_EMPHASIS_5015)
1da177e4 1528 val |= 1U << 3;
2dfbeca9
TI		 1529 rbits = (diga->status[4] >> 3) & 0x0f;
1530 if (rbits) {
1531 switch (rbits) {
1532 case 2: val |= 5 << 12; break; /* 96k */
1533 case 3: val |= 6 << 12; break; /* 192k */
1534 case 10: val |= 4 << 12; break; /* 88.2k */
1535 case 11: val |= 7 << 12; break; /* 176.4k */
1536 }
1537 } else {
1538 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1539 case IEC958_AES0_PRO_FS_44100:
1540 break;
1541 case IEC958_AES0_PRO_FS_32000:
1542 val |= 3U << 12;
1543 break;
1544 default:
1545 val |= 2U << 12;
1546 break;
1547 }
1da177e4
LT		 1548 }
1549 } else {
1550 /* consumer */
1551 val |= diga->status[1] & 0x04; /* copyright */
ab0c7d72
TI		 1552 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1553 IEC958_AES0_CON_EMPHASIS_5015)
1da177e4
LT		 1554 val |= 1U << 3;
1555 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1556 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1557 }
1558 return val;
1559}
1560
ab0c7d72 1561static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1da177e4
LT		 1562{
1563 memset(diga->status, 0, sizeof(diga->status));
1564 diga->status[0] = val & 0x03; /* professional, non-audio */
1565 if (val & 0x01) {
1566 /* professional */
1567 if (val & (1U << 3))
1568 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1569 switch ((val >> 12) & 0x7) {
1570 case 0:
1571 break;
1572 case 2:
1573 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1574 break;
1575 default:
1576 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1577 break;
1578 }
1579 } else {
1580 /* consumer */
1581 diga->status[0] |= val & (1U << 2); /* copyright */
1582 if (val & (1U << 3))
1583 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1584 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1585 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1586 }
1587}
1588
ab0c7d72
TI		 1589static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1590 struct snd_ctl_elem_value *ucontrol)
1da177e4 1591{
ab0c7d72 1592 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1593 unsigned int val;
1594 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1595 decode_spdif_bits(&ucontrol->value.iec958, val);
1596 return 0;
1597}
1598
ab0c7d72
TI		 1599static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1600 struct snd_ctl_elem_value *ucontrol)
1da177e4 1601{
ab0c7d72 1602 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1603 unsigned int val, old;
1604
1605 val = encode_spdif_bits(&ucontrol->value.iec958);
1606 spin_lock_irq(&ice->reg_lock);
1607 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1608 if (val != old)
1609 update_spdif_bits(ice, val);
1610 spin_unlock_irq(&ice->reg_lock);
1de9fdc2 1611 return val != old;
1da177e4
LT		 1612}
1613
1b60f6b0 1614static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
1da177e4
LT		 1615{
1616 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1de9fdc2 1617 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1da177e4
LT		 1618 .info = snd_vt1724_spdif_info,
1619 .get = snd_vt1724_spdif_default_get,
1620 .put = snd_vt1724_spdif_default_put
1621};
1622
ab0c7d72
TI		 1623static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1624 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1625{
1626 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1627 IEC958_AES0_PROFESSIONAL |
1628 IEC958_AES0_CON_NOT_COPYRIGHT |
1629 IEC958_AES0_CON_EMPHASIS;
1630 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1631 IEC958_AES1_CON_CATEGORY;
1632 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1633 return 0;
1634}
1635
ab0c7d72
TI		 1636static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1637 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1638{
1639 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1640 IEC958_AES0_PROFESSIONAL |
1641 IEC958_AES0_PRO_FS |
1642 IEC958_AES0_PRO_EMPHASIS;
1643 return 0;
1644}
1645
1b60f6b0 1646static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
1da177e4
LT		 1647{
1648 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1649 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1de9fdc2 1650 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1da177e4
LT		 1651 .info = snd_vt1724_spdif_info,
1652 .get = snd_vt1724_spdif_maskc_get,
1653};
1654
1b60f6b0 1655static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
1da177e4
LT		 1656{
1657 .access = SNDRV_CTL_ELEM_ACCESS_READ,
67ed4161 1658 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1de9fdc2 1659 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1da177e4
LT		 1660 .info = snd_vt1724_spdif_info,
1661 .get = snd_vt1724_spdif_maskp_get,
1662};
1663
a5ce8890 1664#define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
1da177e4 1665
ab0c7d72
TI		 1666static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1667 struct snd_ctl_elem_value *ucontrol)
1da177e4 1668{
ab0c7d72
TI		 1669 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1670 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1671 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1da177e4
LT		 1672 return 0;
1673}
1674
ab0c7d72
TI		 1675static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1676 struct snd_ctl_elem_value *ucontrol)
1da177e4 1677{
ab0c7d72 1678 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1679 unsigned char old, val;
1680
1681 spin_lock_irq(&ice->reg_lock);
1682 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1683 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1684 if (ucontrol->value.integer.value[0])
1685 val |= VT1724_CFG_SPDIF_OUT_EN;
1686 if (old != val)
1687 outb(val, ICEREG1724(ice, SPDIF_CFG));
1688 spin_unlock_irq(&ice->reg_lock);
1689 return old != val;
1690}
1691
1b60f6b0 1692static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
1da177e4
LT		 1693{
1694 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1695 /* FIXME: the following conflict with IEC958 Playback Route */
1de9fdc2
AB		 1696 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
1697 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
1da177e4
LT		 1698 .info = snd_vt1724_spdif_sw_info,
1699 .get = snd_vt1724_spdif_sw_get,
1700 .put = snd_vt1724_spdif_sw_put
1701};
1702
1703
1704#if 0 /* NOT USED YET */
1705/*
1706 * GPIO access from extern
1707 */
1708
a5ce8890 1709#define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
1da177e4 1710
ab0c7d72
TI		 1711int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
1712 struct snd_ctl_elem_value *ucontrol)
1da177e4 1713{
ab0c7d72 1714 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1715 int shift = kcontrol->private_value & 0xff;
1716 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1de9fdc2 1717
1da177e4 1718 snd_ice1712_save_gpio_status(ice);
ab0c7d72
TI		 1719 ucontrol->value.integer.value[0] =
1720 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1da177e4
LT		 1721 snd_ice1712_restore_gpio_status(ice);
1722 return 0;
1723}
1724
ab0c7d72
TI		 1725int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1726 struct snd_ctl_elem_value *ucontrol)
1da177e4 1727{
ab0c7d72 1728 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1729 int shift = kcontrol->private_value & 0xff;
1730 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1731 unsigned int val, nval;
1732
1733 if (kcontrol->private_value & (1 << 31))
1734 return -EPERM;
1735 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1736 snd_ice1712_save_gpio_status(ice);
1737 val = snd_ice1712_gpio_read(ice);
1738 nval |= val & ~(1 << shift);
1739 if (val != nval)
1740 snd_ice1712_gpio_write(ice, nval);
1741 snd_ice1712_restore_gpio_status(ice);
1742 return val != nval;
1743}
1744#endif /* NOT USED YET */
1745
1746/*
1747 * rate
1748 */
ab0c7d72
TI		 1749static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1750 struct snd_ctl_elem_info *uinfo)
1da177e4 1751{
ab0c7d72 1752 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1753
1754 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1755 uinfo->count = 1;
d16be8ed 1756 uinfo->value.enumerated.items = ice->hw_rates->count + 1;
1da177e4
LT		 1757 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1758 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
d16be8ed
PH		 1759 if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
1760 strcpy(uinfo->value.enumerated.name, "IEC958 Input");
1761 else
1762 sprintf(uinfo->value.enumerated.name, "%d",
1763 ice->hw_rates->list[uinfo->value.enumerated.item]);
1da177e4
LT		 1764 return 0;
1765}
1766
ab0c7d72
TI		 1767static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1768 struct snd_ctl_elem_value *ucontrol)
1da177e4 1769{
ab0c7d72 1770 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
d16be8ed 1771 unsigned int i, rate;
1de9fdc2 1772
1da177e4 1773 spin_lock_irq(&ice->reg_lock);
d16be8ed
PH		 1774 if (ice->is_spdif_master(ice)) {
1775 ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
1da177e4 1776 } else {
d16be8ed
PH		 1777 rate = ice->get_rate(ice);
1778 ucontrol->value.enumerated.item[0] = 0;
1779 for (i = 0; i < ice->hw_rates->count; i++) {
1780 if (ice->hw_rates->list[i] == rate) {
1781 ucontrol->value.enumerated.item[0] = i;
1782 break;
1783 }
1da177e4 1784 }
1da177e4
LT		 1785 }
1786 spin_unlock_irq(&ice->reg_lock);
1787 return 0;
1788}
1789
d16be8ed
PH		 1790/* setting clock to external - SPDIF */
1791static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
1792{
1793 unsigned char oval;
1794 unsigned char i2s_oval;
1795 oval = inb(ICEMT1724(ice, RATE));
1796 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1797 /* setting 256fs */
1798 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1799 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1800}
1801
ab0c7d72
TI		 1802static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1803 struct snd_ctl_elem_value *ucontrol)
1da177e4 1804{
ab0c7d72 1805 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
d16be8ed
PH		 1806 unsigned int old_rate, new_rate;
1807 unsigned int item = ucontrol->value.enumerated.item[0];
1808 unsigned int spdif = ice->hw_rates->count;
1809
1810 if (item > spdif)
1811 return -EINVAL;
1da177e4
LT		 1812
1813 spin_lock_irq(&ice->reg_lock);
d16be8ed
PH		 1814 if (ice->is_spdif_master(ice))
1815 old_rate = 0;
1816 else
1817 old_rate = ice->get_rate(ice);
1818 if (item == spdif) {
1819 /* switching to external clock via SPDIF */
1820 ice->set_spdif_clock(ice);
1821 new_rate = 0;
1da177e4 1822 } else {
d16be8ed
PH		 1823 /* internal on-card clock */
1824 new_rate = ice->hw_rates->list[item];
1825 ice->pro_rate_default = new_rate;
1826 spin_unlock_irq(&ice->reg_lock);
1827 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1828 spin_lock_irq(&ice->reg_lock);
1da177e4 1829 }
1da177e4
LT		 1830 spin_unlock_irq(&ice->reg_lock);
1831
d16be8ed
PH		 1832 /* the first reset to the SPDIF master mode? */
1833 if (old_rate != new_rate && !new_rate) {
1da177e4 1834 /* notify akm chips as well */
d16be8ed
PH		 1835 unsigned int i;
1836 if (ice->gpio.set_pro_rate)
1837 ice->gpio.set_pro_rate(ice, 0);
1838 for (i = 0; i < ice->akm_codecs; i++) {
1839 if (ice->akm[i].ops.set_rate_val)
1840 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1da177e4
LT		 1841 }
1842 }
d16be8ed 1843 return old_rate != new_rate;
1da177e4
LT		 1844}
1845
1b60f6b0 1846static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
1da177e4
LT		 1847 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1848 .name = "Multi Track Internal Clock",
1849 .info = snd_vt1724_pro_internal_clock_info,
1850 .get = snd_vt1724_pro_internal_clock_get,
1851 .put = snd_vt1724_pro_internal_clock_put
1852};
1853
a5ce8890 1854#define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
1da177e4 1855
ab0c7d72
TI		 1856static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1857 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1858{
1859 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1860 return 0;
1861}
1862
ab0c7d72
TI		 1863static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1864 struct snd_ctl_elem_value *ucontrol)
1da177e4 1865{
ab0c7d72 1866 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1867 int change = 0, nval;
1868
1869 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1870 spin_lock_irq(&ice->reg_lock);
1871 change = PRO_RATE_LOCKED != nval;
1872 PRO_RATE_LOCKED = nval;
1873 spin_unlock_irq(&ice->reg_lock);
1874 return change;
1875}
1876
1b60f6b0 1877static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
1da177e4
LT		 1878 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1879 .name = "Multi Track Rate Locking",
1880 .info = snd_vt1724_pro_rate_locking_info,
1881 .get = snd_vt1724_pro_rate_locking_get,
1882 .put = snd_vt1724_pro_rate_locking_put
1883};
1884
a5ce8890 1885#define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
1da177e4 1886
ab0c7d72
TI		 1887static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1888 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1889{
1890 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1891 return 0;
1892}
1893
ab0c7d72
TI		 1894static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1895 struct snd_ctl_elem_value *ucontrol)
1da177e4 1896{
ab0c7d72 1897 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1898 int change = 0, nval;
1899
1900 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1901 spin_lock_irq(&ice->reg_lock);
1902 change = PRO_RATE_RESET != nval;
1903 PRO_RATE_RESET = nval;
1904 spin_unlock_irq(&ice->reg_lock);
1905 return change;
1906}
1907
1b60f6b0 1908static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
1da177e4
LT		 1909 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1910 .name = "Multi Track Rate Reset",
1911 .info = snd_vt1724_pro_rate_reset_info,
1912 .get = snd_vt1724_pro_rate_reset_get,
1913 .put = snd_vt1724_pro_rate_reset_put
1914};
1915
1916
1917/*
1918 * routing
1919 */
ab0c7d72
TI		 1920static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
1921 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1922{
1923 static char *texts[] = {
1924 "PCM Out", /* 0 */
1925 "H/W In 0", "H/W In 1", /* 1-2 */
1926 "IEC958 In L", "IEC958 In R", /* 3-4 */
1927 };
1de9fdc2 1928
1da177e4
LT		 1929 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1930 uinfo->count = 1;
1931 uinfo->value.enumerated.items = 5;
1932 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1933 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1934 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1935 return 0;
1936}
1937
1938static inline int analog_route_shift(int idx)
1939{
1940 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
1941}
1942
1943static inline int digital_route_shift(int idx)
1944{
1945 return idx * 3;
1946}
1947
ab0c7d72 1948static int get_route_val(struct snd_ice1712 *ice, int shift)
1da177e4
LT		 1949{
1950 unsigned long val;
1951 unsigned char eitem;
32b47da0 1952 static const unsigned char xlate[8] = {
1da177e4
LT		 1953 0, 255, 1, 2, 255, 255, 3, 4,
1954 };
1955
1956 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1957 val >>= shift;
1de9fdc2 1958 val &= 7; /* we now have 3 bits per output */
1da177e4
LT		 1959 eitem = xlate[val];
1960 if (eitem == 255) {
1961 snd_BUG();
1962 return 0;
1963 }
1964 return eitem;
1965}
1966
ab0c7d72 1967static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
1da177e4
LT		 1968{
1969 unsigned int old_val, nval;
1970 int change;
32b47da0 1971 static const unsigned char xroute[8] = {
1da177e4
LT		 1972 0, /* PCM */
1973 2, /* PSDIN0 Left */
1974 3, /* PSDIN0 Right */
1975 6, /* SPDIN Left */
1976 7, /* SPDIN Right */
1977 };
1978
1979 nval = xroute[val % 5];
1980 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1981 val &= ~(0x07 << shift);
1982 val |= nval << shift;
1983 change = val != old_val;
1984 if (change)
1985 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
1986 return change;
1987}
1988
ab0c7d72
TI		 1989static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
1990 struct snd_ctl_elem_value *ucontrol)
1da177e4 1991{
ab0c7d72 1992 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 1993 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72
TI		 1994 ucontrol->value.enumerated.item[0] =
1995 get_route_val(ice, analog_route_shift(idx));
1da177e4
LT		 1996 return 0;
1997}
1998
ab0c7d72
TI		 1999static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2000 struct snd_ctl_elem_value *ucontrol)
1da177e4 2001{
ab0c7d72 2002 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2003 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2004 return put_route_val(ice, ucontrol->value.enumerated.item[0],
2005 analog_route_shift(idx));
2006}
2007
ab0c7d72
TI		 2008static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2009 struct snd_ctl_elem_value *ucontrol)
1da177e4 2010{
ab0c7d72 2011 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2012 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
ab0c7d72
TI		 2013 ucontrol->value.enumerated.item[0] =
2014 get_route_val(ice, digital_route_shift(idx));
1da177e4
LT		 2015 return 0;
2016}
2017
ab0c7d72
TI		 2018static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2019 struct snd_ctl_elem_value *ucontrol)
1da177e4 2020{
ab0c7d72 2021 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 2022 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2023 return put_route_val(ice, ucontrol->value.enumerated.item[0],
2024 digital_route_shift(idx));
2025}
2026
1b60f6b0 2027static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
1da177e4
LT		 2028 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2029 .name = "H/W Playback Route",
2030 .info = snd_vt1724_pro_route_info,
2031 .get = snd_vt1724_pro_route_analog_get,
2032 .put = snd_vt1724_pro_route_analog_put,
2033};
2034
1b60f6b0 2035static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
1da177e4 2036 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1de9fdc2 2037 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
1da177e4
LT		 2038 .info = snd_vt1724_pro_route_info,
2039 .get = snd_vt1724_pro_route_spdif_get,
2040 .put = snd_vt1724_pro_route_spdif_put,
2041 .count = 2,
2042};
2043
2044
ab0c7d72
TI		 2045static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
2046 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 2047{
2048 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2049 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
2050 uinfo->value.integer.min = 0;
2051 uinfo->value.integer.max = 255;
2052 return 0;
2053}
2054
ab0c7d72
TI		 2055static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
2056 struct snd_ctl_elem_value *ucontrol)
1da177e4 2057{
ab0c7d72 2058 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1da177e4 2059 int idx;
1de9fdc2 2060
1da177e4
LT		 2061 spin_lock_irq(&ice->reg_lock);
2062 for (idx = 0; idx < 22; idx++) {
2063 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
ab0c7d72
TI		 2064 ucontrol->value.integer.value[idx] =
2065 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
1da177e4
LT		 2066 }
2067 spin_unlock_irq(&ice->reg_lock);
2068 return 0;
2069}
2070
1b60f6b0 2071static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
1da177e4
LT		 2072 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2073 .name = "Multi Track Peak",
2074 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2075 .info = snd_vt1724_pro_peak_info,
2076 .get = snd_vt1724_pro_peak_get
2077};
2078
2079/*
2080 *
2081 */
2082
1b60f6b0 2083static struct snd_ice1712_card_info no_matched __devinitdata;
1da177e4 2084
1b60f6b0 2085static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
1da177e4 2086 snd_vt1724_revo_cards,
1de9fdc2 2087 snd_vt1724_amp_cards,
1da177e4
LT		 2088 snd_vt1724_aureon_cards,
2089 snd_vt1720_mobo_cards,
2090 snd_vt1720_pontis_cards,
6b8d6e55 2091 snd_vt1724_prodigy_hifi_cards,
1da177e4
LT		 2092 snd_vt1724_prodigy192_cards,
2093 snd_vt1724_juli_cards,
2094 snd_vt1724_phase_cards,
f6cdab5f 2095 snd_vt1724_wtm_cards,
f31639b8 2096 snd_vt1724_se_cards,
1da177e4
LT		 2097 NULL,
2098};
2099
2100
2101/*
2102 */
2103
ab0c7d72 2104static void wait_i2c_busy(struct snd_ice1712 *ice)
1da177e4
LT		 2105{
2106 int t = 0x10000;
2107 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
2108 ;
2109 if (t == -1)
2110 printk(KERN_ERR "ice1724: i2c busy timeout\n");
2111}
2112
ab0c7d72
TI		 2113unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
2114 unsigned char dev, unsigned char addr)
1da177e4
LT		 2115{
2116 unsigned char val;
2117
62932df8 2118 mutex_lock(&ice->i2c_mutex);
acec30ff 2119 wait_i2c_busy(ice);
1da177e4
LT		 2120 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2121 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2122 wait_i2c_busy(ice);
2123 val = inb(ICEREG1724(ice, I2C_DATA));
62932df8 2124 mutex_unlock(&ice->i2c_mutex);
1de9fdc2 2125 /* printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); */
1da177e4
LT		 2126 return val;
2127}
2128
ab0c7d72
TI		 2129void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
2130 unsigned char dev, unsigned char addr, unsigned char data)
1da177e4 2131{
62932df8 2132 mutex_lock(&ice->i2c_mutex);
1da177e4 2133 wait_i2c_busy(ice);
1de9fdc2 2134 /* printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); */
1da177e4
LT		 2135 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2136 outb(data, ICEREG1724(ice, I2C_DATA));
2137 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2138 wait_i2c_busy(ice);
62932df8 2139 mutex_unlock(&ice->i2c_mutex);
1da177e4
LT		 2140}
2141
ab0c7d72
TI		 2142static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
2143 const char *modelname)
1da177e4
LT		 2144{
2145 const int dev = 0xa0; /* EEPROM device address */
2146 unsigned int i, size;
1b60f6b0 2147 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4 2148
1de9fdc2 2149 if (!modelname || !*modelname) {
1da177e4
LT		 2150 ice->eeprom.subvendor = 0;
2151 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
2152 ice->eeprom.subvendor =
2153 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
1de9fdc2
AB		 2154 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
2155 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
1da177e4 2156 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
ab0c7d72
TI		 2157 if (ice->eeprom.subvendor == 0 ||
2158 ice->eeprom.subvendor == (unsigned int)-1) {
2159 /* invalid subvendor from EEPROM, try the PCI
2160 * subststem ID instead
2161 */
1da177e4 2162 u16 vendor, device;
ab0c7d72
TI		 2163 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2164 &vendor);
1da177e4 2165 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
ab0c7d72
TI		 2166 ice->eeprom.subvendor =
2167 ((unsigned int)swab16(vendor) << 16) | swab16(device);
2168 if (ice->eeprom.subvendor == 0 ||
2169 ice->eeprom.subvendor == (unsigned int)-1) {
1da177e4
LT		 2170 printk(KERN_ERR "ice1724: No valid ID is found\n");
2171 return -ENXIO;
2172 }
2173 }
2174 }
2175 for (tbl = card_tables; *tbl; tbl++) {
2176 for (c = *tbl; c->subvendor; c++) {
ab0c7d72 2177 if (modelname && c->model &&
1de9fdc2 2178 !strcmp(modelname, c->model)) {
ab0c7d72
TI		 2179 printk(KERN_INFO "ice1724: Using board model %s\n",
2180 c->name);
1da177e4
LT		 2181 ice->eeprom.subvendor = c->subvendor;
2182 } else if (c->subvendor != ice->eeprom.subvendor)
2183 continue;
1de9fdc2 2184 if (!c->eeprom_size || !c->eeprom_data)
1da177e4
LT		 2185 goto found;
2186 /* if the EEPROM is given by the driver, use it */
2187 snd_printdd("using the defined eeprom..\n");
2188 ice->eeprom.version = 2;
2189 ice->eeprom.size = c->eeprom_size + 6;
2190 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2191 goto read_skipped;
2192 }
2193 }
ab0c7d72
TI		 2194 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
2195 ice->eeprom.subvendor);
1da177e4
LT		 2196
2197 found:
2198 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2199 if (ice->eeprom.size < 6)
2200 ice->eeprom.size = 32;
2201 else if (ice->eeprom.size > 32) {
ab0c7d72
TI		 2202 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
2203 ice->eeprom.size);
1da177e4
LT		 2204 return -EIO;
2205 }
2206 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2207 if (ice->eeprom.version != 2)
ab0c7d72
TI		 2208 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
2209 ice->eeprom.version);
1da177e4
LT		 2210 size = ice->eeprom.size - 6;
2211 for (i = 0; i < size; i++)
2212 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2213
2214 read_skipped:
2215 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2216 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2217 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2218
2219 return 0;
2220}
2221
2222
2223
988f0664 2224static void __devinit snd_vt1724_chip_reset(struct snd_ice1712 *ice)
1da177e4
LT		 2225{
2226 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
988f0664 2227 msleep(10);
1da177e4 2228 outb(0, ICEREG1724(ice, CONTROL));
988f0664
KW		 2229 msleep(10);
2230}
2231
2232static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
2233{
1da177e4
LT		 2234 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2235 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2236 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2237 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2238
2239 ice->gpio.write_mask = ice->eeprom.gpiomask;
2240 ice->gpio.direction = ice->eeprom.gpiodir;
2241 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2242 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2243 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2244
2245 outb(0, ICEREG1724(ice, POWERDOWN));
2246
2247 return 0;
2248}
2249
ab0c7d72 2250static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2251{
2252 int err;
ab0c7d72 2253 struct snd_kcontrol *kctl;
1da177e4 2254
da3cec35
TI		 2255 if (snd_BUG_ON(!ice->pcm))
2256 return -EIO;
1da177e4
LT		 2257
2258 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2259 if (err < 0)
2260 return err;
2261
2262 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2263 if (err < 0)
2264 return err;
2265
2266 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2267 if (err < 0)
2268 return err;
2269 kctl->id.device = ice->pcm->device;
2270 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2271 if (err < 0)
2272 return err;
2273 kctl->id.device = ice->pcm->device;
2274 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2275 if (err < 0)
2276 return err;
2277 kctl->id.device = ice->pcm->device;
2278#if 0 /* use default only */
2279 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2280 if (err < 0)
2281 return err;
2282 kctl->id.device = ice->pcm->device;
2283 ice->spdif.stream_ctl = kctl;
2284#endif
2285 return 0;
2286}
2287
2288
ab0c7d72 2289static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
1da177e4
LT		 2290{
2291 int err;
2292
2293 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2294 if (err < 0)
2295 return err;
2296 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2297 if (err < 0)
2298 return err;
2299
2300 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2301 if (err < 0)
2302 return err;
2303 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2304 if (err < 0)
2305 return err;
2306
2307 if (ice->num_total_dacs > 0) {
ab0c7d72 2308 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
1da177e4
LT		 2309 tmp.count = ice->num_total_dacs;
2310 if (ice->vt1720 && tmp.count > 2)
2311 tmp.count = 2;
2312 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2313 if (err < 0)
2314 return err;
2315 }
2316
2317 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2318 if (err < 0)
2319 return err;
2320
2321 return 0;
2322}
2323
ab0c7d72 2324static int snd_vt1724_free(struct snd_ice1712 *ice)
1da177e4 2325{
1de9fdc2 2326 if (!ice->port)
1da177e4
LT		 2327 goto __hw_end;
2328 /* mask all interrupts */
2329 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2330 outb(0xff, ICEREG1724(ice, IRQMASK));
2331 /* --- */
1de9fdc2 2332__hw_end:
f000fd80 2333 if (ice->irq >= 0)
ab0c7d72 2334 free_irq(ice->irq, ice);
1da177e4
LT		 2335 pci_release_regions(ice->pci);
2336 snd_ice1712_akm4xxx_free(ice);
2337 pci_disable_device(ice->pci);
7cda8ba9 2338 kfree(ice->spec);
1da177e4
LT		 2339 kfree(ice);
2340 return 0;
2341}
2342
ab0c7d72 2343static int snd_vt1724_dev_free(struct snd_device *device)
1da177e4 2344{
ab0c7d72 2345 struct snd_ice1712 *ice = device->device_data;
1da177e4
LT		 2346 return snd_vt1724_free(ice);
2347}
2348
ab0c7d72 2349static int __devinit snd_vt1724_create(struct snd_card *card,
1da177e4
LT		 2350 struct pci_dev *pci,
2351 const char *modelname,
1de9fdc2 2352 struct snd_ice1712 **r_ice1712)
1da177e4 2353{
ab0c7d72 2354 struct snd_ice1712 *ice;
1da177e4 2355 int err;
ab0c7d72 2356 static struct snd_device_ops ops = {
1da177e4
LT		 2357 .dev_free = snd_vt1724_dev_free,
2358 };
2359
2360 *r_ice1712 = NULL;
2361
1de9fdc2
AB		 2362 /* enable PCI device */
2363 err = pci_enable_device(pci);
2364 if (err < 0)
1da177e4
LT		 2365 return err;
2366
e560d8d8 2367 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
1da177e4
LT		 2368 if (ice == NULL) {
2369 pci_disable_device(pci);
2370 return -ENOMEM;
2371 }
2372 ice->vt1724 = 1;
2373 spin_lock_init(&ice->reg_lock);
62932df8
IM		 2374 mutex_init(&ice->gpio_mutex);
2375 mutex_init(&ice->open_mutex);
2376 mutex_init(&ice->i2c_mutex);
1da177e4
LT		 2377 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2378 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2379 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2380 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2381 ice->card = card;
2382 ice->pci = pci;
2383 ice->irq = -1;
2384 pci_set_master(pci);
2385 snd_vt1724_proc_init(ice);
2386 synchronize_irq(pci->irq);
2387
1de9fdc2
AB		 2388 err = pci_request_regions(pci, "ICE1724");
2389 if (err < 0) {
1da177e4
LT		 2390 kfree(ice);
2391 pci_disable_device(pci);
2392 return err;
2393 }
2394 ice->port = pci_resource_start(pci, 0);
2395 ice->profi_port = pci_resource_start(pci, 1);
2396
ab0c7d72 2397 if (request_irq(pci->irq, snd_vt1724_interrupt,
437a5a46 2398 IRQF_SHARED, "ICE1724", ice)) {
99b359ba 2399 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 2400 snd_vt1724_free(ice);
2401 return -EIO;
2402 }
2403
2404 ice->irq = pci->irq;
2405
988f0664 2406 snd_vt1724_chip_reset(ice);
1da177e4
LT		 2407 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2408 snd_vt1724_free(ice);
2409 return -EIO;
2410 }
2411 if (snd_vt1724_chip_init(ice) < 0) {
2412 snd_vt1724_free(ice);
2413 return -EIO;
2414 }
2415
6834d7ce
TI		 2416 /* MPU_RX and TX irq masks are cleared later dynamically */
2417 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
4074ea21 2418
ab0c7d72
TI		 2419 /* don't handle FIFO overrun/underruns (just yet),
2420 * since they cause machine lockups
2421 */
1da177e4
LT		 2422 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2423
1de9fdc2
AB		 2424 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2425 if (err < 0) {
1da177e4 2426 snd_vt1724_free(ice);
1de9fdc2 2427 return err;
1da177e4
LT		 2428 }
2429
2430 snd_card_set_dev(card, &pci->dev);
2431
2432 *r_ice1712 = ice;
2433 return 0;
2434}
2435
2436
2437/*
2438 *
2439 * Registration
2440 *
2441 */
2442
2443static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2444 const struct pci_device_id *pci_id)
2445{
2446 static int dev;
ab0c7d72
TI		 2447 struct snd_card *card;
2448 struct snd_ice1712 *ice;
1da177e4 2449 int pcm_dev = 0, err;
1b60f6b0 2450 struct snd_ice1712_card_info * const *tbl, *c;
1da177e4
LT		 2451
2452 if (dev >= SNDRV_CARDS)
2453 return -ENODEV;
2454 if (!enable[dev]) {
2455 dev++;
2456 return -ENOENT;
2457 }
2458
e58de7ba
TI		 2459 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2460 if (err < 0)
2461 return err;
1da177e4
LT		 2462
2463 strcpy(card->driver, "ICE1724");
2464 strcpy(card->shortname, "ICEnsemble ICE1724");
1de9fdc2
AB		 2465
2466 err = snd_vt1724_create(card, pci, model[dev], &ice);
2467 if (err < 0) {
1da177e4
LT		 2468 snd_card_free(card);
2469 return err;
2470 }
2471
2472 for (tbl = card_tables; *tbl; tbl++) {
2473 for (c = *tbl; c->subvendor; c++) {
2474 if (c->subvendor == ice->eeprom.subvendor) {
2475 strcpy(card->shortname, c->name);
2476 if (c->driver) /* specific driver? */
2477 strcpy(card->driver, c->driver);
2478 if (c->chip_init) {
1de9fdc2
AB		 2479 err = c->chip_init(ice);
2480 if (err < 0) {
1da177e4
LT		 2481 snd_card_free(card);
2482 return err;
2483 }
2484 }
2485 goto __found;
2486 }
2487 }
2488 }
2489 c = &no_matched;
1de9fdc2
AB		 2490__found:
2491 /*
2492 * VT1724 has separate DMAs for the analog and the SPDIF streams while
2493 * ICE1712 has only one for both (mixed up).
2494 *
2495 * Confusingly the analog PCM is named "professional" here because it
2496 * was called so in ice1712 driver, and vt1724 driver is derived from
2497 * ice1712 driver.
2498 */
d16be8ed
PH		 2499 ice->pro_rate_default = PRO_RATE_DEFAULT;
2500 if (!ice->is_spdif_master)
2501 ice->is_spdif_master = stdclock_is_spdif_master;
2502 if (!ice->get_rate)
2503 ice->get_rate = stdclock_get_rate;
2504 if (!ice->set_rate)
2505 ice->set_rate = stdclock_set_rate;
2506 if (!ice->set_mclk)
2507 ice->set_mclk = stdclock_set_mclk;
2508 if (!ice->set_spdif_clock)
2509 ice->set_spdif_clock = stdclock_set_spdif_clock;
2510 if (!ice->hw_rates)
2511 set_std_hw_rates(ice);
1da177e4 2512
1de9fdc2
AB		 2513 err = snd_vt1724_pcm_profi(ice, pcm_dev++);
2514 if (err < 0) {
1da177e4
LT		 2515 snd_card_free(card);
2516 return err;
2517 }
1de9fdc2
AB		 2518
2519 err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
2520 if (err < 0) {
1da177e4
LT		 2521 snd_card_free(card);
2522 return err;
2523 }
1de9fdc2
AB		 2524
2525 err = snd_vt1724_pcm_indep(ice, pcm_dev++);
2526 if (err < 0) {
1da177e4
LT		 2527 snd_card_free(card);
2528 return err;
2529 }
2530
1de9fdc2
AB		 2531 err = snd_vt1724_ac97_mixer(ice);
2532 if (err < 0) {
1da177e4
LT		 2533 snd_card_free(card);
2534 return err;
2535 }
2536
1de9fdc2
AB		 2537 err = snd_vt1724_build_controls(ice);
2538 if (err < 0) {
1da177e4
LT		 2539 snd_card_free(card);
2540 return err;
2541 }
2542
2543 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
1de9fdc2
AB		 2544 err = snd_vt1724_spdif_build_controls(ice);
2545 if (err < 0) {
1da177e4
LT		 2546 snd_card_free(card);
2547 return err;
2548 }
2549 }
2550
2551 if (c->build_controls) {
1de9fdc2
AB		 2552 err = c->build_controls(ice);
2553 if (err < 0) {
1da177e4
LT		 2554 snd_card_free(card);
2555 return err;
2556 }
2557 }
2558
1de9fdc2 2559 if (!c->no_mpu401) {
1da177e4 2560 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
aea3bfbc
CL		 2561 struct snd_rawmidi *rmidi;
2562
2563 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
2564 if (err < 0) {
1da177e4
LT		 2565 snd_card_free(card);
2566 return err;
2567 }
aea3bfbc
CL		 2568 ice->rmidi[0] = rmidi;
2569 rmidi->private_data = ice;
2570 strcpy(rmidi->name, "ICE1724 MIDI");
2571 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
2572 SNDRV_RAWMIDI_INFO_INPUT |
2573 SNDRV_RAWMIDI_INFO_DUPLEX;
2574 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
2575 &vt1724_midi_output_ops);
2576 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
2577 &vt1724_midi_input_ops);
2578
3a841d51
TI		 2579 /* set watermarks */
2580 outb(VT1724_MPU_RX_FIFO | 0x1,
2581 ICEREG1724(ice, MPU_FIFO_WM));
2582 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
aea3bfbc
CL		 2583 /* set UART mode */
2584 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
1da177e4
LT		 2585 }
2586 }
2587
2588 sprintf(card->longname, "%s at 0x%lx, irq %i",
2589 card->shortname, ice->port, ice->irq);
2590
1de9fdc2
AB		 2591 err = snd_card_register(card);
2592 if (err < 0) {
1da177e4
LT		 2593 snd_card_free(card);
2594 return err;
2595 }
2596 pci_set_drvdata(pci, card);
2597 dev++;
2598 return 0;
2599}
2600
2601static void __devexit snd_vt1724_remove(struct pci_dev *pci)
2602{
2603 snd_card_free(pci_get_drvdata(pci));
2604 pci_set_drvdata(pci, NULL);
2605}
2606
2607static struct pci_driver driver = {
2608 .name = "ICE1724",
2609 .id_table = snd_vt1724_ids,
2610 .probe = snd_vt1724_probe,
2611 .remove = __devexit_p(snd_vt1724_remove),
2612};
2613
2614static int __init alsa_card_ice1724_init(void)
2615{
01d25d46 2616 return pci_register_driver(&driver);
1da177e4
LT		 2617}
2618
2619static void __exit alsa_card_ice1724_exit(void)
2620{
2621 pci_unregister_driver(&driver);
2622}
2623
2624module_init(alsa_card_ice1724_init)
2625module_exit(alsa_card_ice1724_exit)
Linux kernel - Deliverables
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