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[ALSA] Fix section mismatch errors in ALSA PCI drivers
[deliverable/linux.git] / sound / pci / nm256 / nm256.c
CommitLineData
1da177e4
LT		 1/*
2 * Driver for NeoMagic 256AV and 256ZX chipsets.
3 * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
4 *
5 * Based on nm256_audio.c OSS driver in linux kernel.
6 * The original author of OSS nm256 driver wishes to remain anonymous,
7 * so I just put my acknoledgment to him/her here.
8 * The original author's web page is found at
9 * http://www.uglx.org/sony.html
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <asm/io.h>
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/slab.h>
34#include <linux/moduleparam.h>
62932df8
IM		 35#include <linux/mutex.h>
36
1da177e4
LT		 37#include <sound/core.h>
38#include <sound/info.h>
39#include <sound/control.h>
40#include <sound/pcm.h>
41#include <sound/ac97_codec.h>
42#include <sound/initval.h>
43
44#define CARD_NAME "NeoMagic 256AV/ZX"
45#define DRIVER_NAME "NM256"
46
47MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
48MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
49MODULE_LICENSE("GPL");
50MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
51 "{NeoMagic,NM256ZX}}");
52
53/*
54 * some compile conditions.
55 */
56
8a3fb4d0
TI		 57static int index = SNDRV_DEFAULT_IDX1; /* Index */
58static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
59static int playback_bufsize = 16;
60static int capture_bufsize = 16;
61static int force_ac97; /* disabled as default */
62static int buffer_top; /* not specified */
63static int use_cache; /* disabled */
64static int vaio_hack; /* disabled */
65static int reset_workaround;
66static int reset_workaround_2;
67
68module_param(index, int, 0444);
1da177e4 69MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
8a3fb4d0 70module_param(id, charp, 0444);
1da177e4 71MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
8a3fb4d0 72module_param(playback_bufsize, int, 0444);
1da177e4 73MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
8a3fb4d0 74module_param(capture_bufsize, int, 0444);
1da177e4 75MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
8a3fb4d0 76module_param(force_ac97, bool, 0444);
1da177e4 77MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
8a3fb4d0 78module_param(buffer_top, int, 0444);
1da177e4 79MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
8a3fb4d0 80module_param(use_cache, bool, 0444);
1da177e4 81MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
8a3fb4d0 82module_param(vaio_hack, bool, 0444);
1da177e4 83MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
8a3fb4d0 84module_param(reset_workaround, bool, 0444);
1da177e4 85MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
8a3fb4d0 86module_param(reset_workaround_2, bool, 0444);
47530cf4 87MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
1da177e4 88
8a3fb4d0
TI		 89/* just for backward compatibility */
90static int enable;
91module_param(enable, bool, 0444);
92
93
94
1da177e4
LT		 95/*
96 * hw definitions
97 */
98
99/* The BIOS signature. */
100#define NM_SIGNATURE 0x4e4d0000
101/* Signature mask. */
102#define NM_SIG_MASK 0xffff0000
103
104/* Size of the second memory area. */
105#define NM_PORT2_SIZE 4096
106
107/* The base offset of the mixer in the second memory area. */
108#define NM_MIXER_OFFSET 0x600
109
110/* The maximum size of a coefficient entry. */
111#define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
112#define NM_MAX_RECORD_COEF_SIZE 0x1260
113
114/* The interrupt register. */
115#define NM_INT_REG 0xa04
116/* And its bits. */
117#define NM_PLAYBACK_INT 0x40
118#define NM_RECORD_INT 0x100
119#define NM_MISC_INT_1 0x4000
120#define NM_MISC_INT_2 0x1
121#define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
122
123/* The AV's "mixer ready" status bit and location. */
124#define NM_MIXER_STATUS_OFFSET 0xa04
125#define NM_MIXER_READY_MASK 0x0800
126#define NM_MIXER_PRESENCE 0xa06
127#define NM_PRESENCE_MASK 0x0050
128#define NM_PRESENCE_VALUE 0x0040
129
130/*
131 * For the ZX. It uses the same interrupt register, but it holds 32
132 * bits instead of 16.
133 */
134#define NM2_PLAYBACK_INT 0x10000
135#define NM2_RECORD_INT 0x80000
136#define NM2_MISC_INT_1 0x8
137#define NM2_MISC_INT_2 0x2
138#define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
139
140/* The ZX's "mixer ready" status bit and location. */
141#define NM2_MIXER_STATUS_OFFSET 0xa06
142#define NM2_MIXER_READY_MASK 0x0800
143
144/* The playback registers start from here. */
145#define NM_PLAYBACK_REG_OFFSET 0x0
146/* The record registers start from here. */
147#define NM_RECORD_REG_OFFSET 0x200
148
149/* The rate register is located 2 bytes from the start of the register area. */
150#define NM_RATE_REG_OFFSET 2
151
152/* Mono/stereo flag, number of bits on playback, and rate mask. */
153#define NM_RATE_STEREO 1
154#define NM_RATE_BITS_16 2
155#define NM_RATE_MASK 0xf0
156
157/* Playback enable register. */
158#define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
159#define NM_PLAYBACK_ENABLE_FLAG 1
160#define NM_PLAYBACK_ONESHOT 2
161#define NM_PLAYBACK_FREERUN 4
162
163/* Mutes the audio output. */
164#define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
165#define NM_AUDIO_MUTE_LEFT 0x8000
166#define NM_AUDIO_MUTE_RIGHT 0x0080
167
168/* Recording enable register. */
169#define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
170#define NM_RECORD_ENABLE_FLAG 1
171#define NM_RECORD_FREERUN 2
172
173/* coefficient buffer pointer */
174#define NM_COEFF_START_OFFSET 0x1c
175#define NM_COEFF_END_OFFSET 0x20
176
177/* DMA buffer offsets */
178#define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
179#define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
180#define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
181#define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
182
183#define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
184#define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
185#define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
186#define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
187
10754f53 188struct nm256_stream {
1da177e4 189
10754f53
TI		 190 struct nm256 *chip;
191 struct snd_pcm_substream *substream;
1da177e4 192 int running;
1204de32 193 int suspended;
1da177e4
LT		 194
195 u32 buf; /* offset from chip->buffer */
196 int bufsize; /* buffer size in bytes */
197 void __iomem *bufptr; /* mapped pointer */
198 unsigned long bufptr_addr; /* physical address of the mapped pointer */
199
200 int dma_size; /* buffer size of the substream in bytes */
201 int period_size; /* period size in bytes */
202 int periods; /* # of periods */
203 int shift; /* bit shifts */
204 int cur_period; /* current period # */
205
206};
207
10754f53 208struct nm256 {
1da177e4 209
10754f53 210 struct snd_card *card;
1da177e4
LT		 211
212 void __iomem *cport; /* control port */
213 struct resource *res_cport; /* its resource */
214 unsigned long cport_addr; /* physical address */
215
216 void __iomem *buffer; /* buffer */
217 struct resource *res_buffer; /* its resource */
218 unsigned long buffer_addr; /* buffer phyiscal address */
219
220 u32 buffer_start; /* start offset from pci resource 0 */
221 u32 buffer_end; /* end offset */
222 u32 buffer_size; /* total buffer size */
223
224 u32 all_coeff_buf; /* coefficient buffer */
225 u32 coeff_buf[2]; /* coefficient buffer for each stream */
226
227 unsigned int coeffs_current: 1; /* coeff. table is loaded? */
228 unsigned int use_cache: 1; /* use one big coef. table */
229 unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
47530cf4 230 unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
a23446c0 231 unsigned int in_resume: 1;
1da177e4
LT		 232
233 int mixer_base; /* register offset of ac97 mixer */
234 int mixer_status_offset; /* offset of mixer status reg. */
235 int mixer_status_mask; /* bit mask to test the mixer status */
236
237 int irq;
1204de32 238 int irq_acks;
1da177e4
LT		 239 irqreturn_t (*interrupt)(int, void *, struct pt_regs *);
240 int badintrcount; /* counter to check bogus interrupts */
62932df8 241 struct mutex irq_mutex;
1da177e4 242
10754f53 243 struct nm256_stream streams[2];
1da177e4 244
10754f53 245 struct snd_ac97 *ac97;
a23446c0 246 unsigned short *ac97_regs; /* register caches, only for valid regs */
1da177e4 247
10754f53 248 struct snd_pcm *pcm;
1da177e4
LT		 249
250 struct pci_dev *pci;
251
252 spinlock_t reg_lock;
253
254};
255
256
257/*
258 * include coefficient table
259 */
260#include "nm256_coef.c"
261
262
263/*
264 * PCI ids
265 */
f40b6890 266static struct pci_device_id snd_nm256_ids[] = {
1da177e4
LT		 267 {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
268 {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
269 {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
270 {0,},
271};
272
273MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
274
275
276/*
277 * lowlvel stuffs
278 */
279
77933d72 280static inline u8
10754f53 281snd_nm256_readb(struct nm256 *chip, int offset)
1da177e4
LT		 282{
283 return readb(chip->cport + offset);
284}
285
77933d72 286static inline u16
10754f53 287snd_nm256_readw(struct nm256 *chip, int offset)
1da177e4
LT		 288{
289 return readw(chip->cport + offset);
290}
291
77933d72 292static inline u32
10754f53 293snd_nm256_readl(struct nm256 *chip, int offset)
1da177e4
LT		 294{
295 return readl(chip->cport + offset);
296}
297
77933d72 298static inline void
10754f53 299snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
1da177e4
LT		 300{
301 writeb(val, chip->cport + offset);
302}
303
77933d72 304static inline void
10754f53 305snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
1da177e4
LT		 306{
307 writew(val, chip->cport + offset);
308}
309
77933d72 310static inline void
10754f53 311snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
1da177e4
LT		 312{
313 writel(val, chip->cport + offset);
314}
315
77933d72 316static inline void
10754f53 317snd_nm256_write_buffer(struct nm256 *chip, void *src, int offset, int size)
1da177e4
LT		 318{
319 offset -= chip->buffer_start;
99b359ba 320#ifdef CONFIG_SND_DEBUG
1da177e4 321 if (offset < 0 || offset >= chip->buffer_size) {
10754f53
TI		 322 snd_printk(KERN_ERR "write_buffer invalid offset = %d size = %d\n",
323 offset, size);
1da177e4
LT		 324 return;
325 }
326#endif
327 memcpy_toio(chip->buffer + offset, src, size);
328}
329
330/*
331 * coefficient handlers -- what a magic!
332 */
333
334static u16
335snd_nm256_get_start_offset(int which)
336{
337 u16 offset = 0;
338 while (which-- > 0)
339 offset += coefficient_sizes[which];
340 return offset;
341}
342
343static void
10754f53 344snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
1da177e4
LT		 345{
346 u32 coeff_buf = chip->coeff_buf[stream];
347 u16 offset = snd_nm256_get_start_offset(which);
348 u16 size = coefficient_sizes[which];
349
350 snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
351 snd_nm256_writel(chip, port, coeff_buf);
352 /* ??? Record seems to behave differently than playback. */
353 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
354 size--;
355 snd_nm256_writel(chip, port + 4, coeff_buf + size);
356}
357
358static void
10754f53 359snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
1da177e4
LT		 360{
361 /* The enable register for the specified engine. */
10754f53
TI		 362 u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
363 NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
1da177e4
LT		 364 u32 addr = NM_COEFF_START_OFFSET;
365
10754f53
TI		 366 addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
367 NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
1da177e4
LT		 368
369 if (snd_nm256_readb(chip, poffset) & 1) {
370 snd_printd("NM256: Engine was enabled while loading coefficients!\n");
371 return;
372 }
373
374 /* The recording engine uses coefficient values 8-15. */
375 number &= 7;
376 if (stream == SNDRV_PCM_STREAM_CAPTURE)
377 number += 8;
378
379 if (! chip->use_cache) {
380 snd_nm256_load_one_coefficient(chip, stream, addr, number);
381 return;
382 }
383 if (! chip->coeffs_current) {
384 snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
385 NM_TOTAL_COEFF_COUNT * 4);
386 chip->coeffs_current = 1;
387 } else {
388 u32 base = chip->all_coeff_buf;
389 u32 offset = snd_nm256_get_start_offset(number);
390 u32 end_offset = offset + coefficient_sizes[number];
391 snd_nm256_writel(chip, addr, base + offset);
392 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
393 end_offset--;
394 snd_nm256_writel(chip, addr + 4, base + end_offset);
395 }
396}
397
398
399/* The actual rates supported by the card. */
400static unsigned int samplerates[8] = {
401 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
402};
10754f53 403static struct snd_pcm_hw_constraint_list constraints_rates = {
1da177e4
LT		 404 .count = ARRAY_SIZE(samplerates),
405 .list = samplerates,
406 .mask = 0,
407};
408
409/*
410 * return the index of the target rate
411 */
412static int
413snd_nm256_fixed_rate(unsigned int rate)
414{
415 unsigned int i;
416 for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
417 if (rate == samplerates[i])
418 return i;
419 }
420 snd_BUG();
421 return 0;
422}
423
424/*
425 * set sample rate and format
426 */
427static void
10754f53
TI		 428snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
429 struct snd_pcm_substream *substream)
1da177e4 430{
10754f53 431 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 432 int rate_index = snd_nm256_fixed_rate(runtime->rate);
433 unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
434
435 s->shift = 0;
436 if (snd_pcm_format_width(runtime->format) == 16) {
437 ratebits |= NM_RATE_BITS_16;
438 s->shift++;
439 }
440 if (runtime->channels > 1) {
441 ratebits |= NM_RATE_STEREO;
442 s->shift++;
443 }
444
445 runtime->rate = samplerates[rate_index];
446
447 switch (substream->stream) {
448 case SNDRV_PCM_STREAM_PLAYBACK:
449 snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
450 snd_nm256_writeb(chip,
451 NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
452 ratebits);
453 break;
454 case SNDRV_PCM_STREAM_CAPTURE:
455 snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
456 snd_nm256_writeb(chip,
457 NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
458 ratebits);
459 break;
460 }
461}
462
1204de32 463/* acquire interrupt */
10754f53 464static int snd_nm256_acquire_irq(struct nm256 *chip)
1204de32 465{
62932df8 466 mutex_lock(&chip->irq_mutex);
1204de32 467 if (chip->irq < 0) {
65ca68b3 468 if (request_irq(chip->pci->irq, chip->interrupt, IRQF_DISABLED|IRQF_SHARED,
10754f53 469 chip->card->driver, chip)) {
99b359ba 470 snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->pci->irq);
62932df8 471 mutex_unlock(&chip->irq_mutex);
1204de32
TI		 472 return -EBUSY;
473 }
474 chip->irq = chip->pci->irq;
475 }
476 chip->irq_acks++;
62932df8 477 mutex_unlock(&chip->irq_mutex);
1204de32
TI		 478 return 0;
479}
480
481/* release interrupt */
10754f53 482static void snd_nm256_release_irq(struct nm256 *chip)
1204de32 483{
62932df8 484 mutex_lock(&chip->irq_mutex);
1204de32
TI		 485 if (chip->irq_acks > 0)
486 chip->irq_acks--;
487 if (chip->irq_acks == 0 && chip->irq >= 0) {
10754f53 488 free_irq(chip->irq, chip);
1204de32
TI		 489 chip->irq = -1;
490 }
62932df8 491 mutex_unlock(&chip->irq_mutex);
1204de32
TI		 492}
493
1da177e4
LT		 494/*
495 * start / stop
496 */
497
498/* update the watermark (current period) */
10754f53 499static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
1da177e4
LT		 500{
501 s->cur_period++;
502 s->cur_period %= s->periods;
503 snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
504}
505
506#define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
507#define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
508
509static void
10754f53
TI		 510snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
511 struct snd_pcm_substream *substream)
1da177e4
LT		 512{
513 /* program buffer pointers */
514 snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
515 snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
516 snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
517 snd_nm256_playback_mark(chip, s);
518
519 /* Enable playback engine and interrupts. */
520 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
521 NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
522 /* Enable both channels. */
523 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
524}
525
526static void
10754f53
TI		 527snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
528 struct snd_pcm_substream *substream)
1da177e4
LT		 529{
530 /* program buffer pointers */
531 snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
532 snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
533 snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
534 snd_nm256_capture_mark(chip, s);
535
536 /* Enable playback engine and interrupts. */
537 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
538 NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
539}
540
541/* Stop the play engine. */
542static void
10754f53 543snd_nm256_playback_stop(struct nm256 *chip)
1da177e4
LT		 544{
545 /* Shut off sound from both channels. */
546 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
547 NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
548 /* Disable play engine. */
549 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
550}
551
552static void
10754f53 553snd_nm256_capture_stop(struct nm256 *chip)
1da177e4
LT		 554{
555 /* Disable recording engine. */
556 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
557}
558
559static int
10754f53 560snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 561{
10754f53
TI		 562 struct nm256 *chip = snd_pcm_substream_chip(substream);
563 struct nm256_stream *s = substream->runtime->private_data;
1da177e4
LT		 564 int err = 0;
565
566 snd_assert(s != NULL, return -ENXIO);
567
568 spin_lock(&chip->reg_lock);
569 switch (cmd) {
1da177e4 570 case SNDRV_PCM_TRIGGER_RESUME:
1204de32
TI		 571 s->suspended = 0;
572 /* fallthru */
573 case SNDRV_PCM_TRIGGER_START:
1da177e4
LT		 574 if (! s->running) {
575 snd_nm256_playback_start(chip, s, substream);
576 s->running = 1;
577 }
578 break;
1da177e4 579 case SNDRV_PCM_TRIGGER_SUSPEND:
1204de32
TI		 580 s->suspended = 1;
581 /* fallthru */
582 case SNDRV_PCM_TRIGGER_STOP:
1da177e4
LT		 583 if (s->running) {
584 snd_nm256_playback_stop(chip);
585 s->running = 0;
586 }
587 break;
588 default:
589 err = -EINVAL;
590 break;
591 }
592 spin_unlock(&chip->reg_lock);
593 return err;
594}
595
596static int
10754f53 597snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 598{
10754f53
TI		 599 struct nm256 *chip = snd_pcm_substream_chip(substream);
600 struct nm256_stream *s = substream->runtime->private_data;
1da177e4
LT		 601 int err = 0;
602
603 snd_assert(s != NULL, return -ENXIO);
604
605 spin_lock(&chip->reg_lock);
606 switch (cmd) {
607 case SNDRV_PCM_TRIGGER_START:
608 case SNDRV_PCM_TRIGGER_RESUME:
609 if (! s->running) {
610 snd_nm256_capture_start(chip, s, substream);
611 s->running = 1;
612 }
613 break;
614 case SNDRV_PCM_TRIGGER_STOP:
615 case SNDRV_PCM_TRIGGER_SUSPEND:
616 if (s->running) {
617 snd_nm256_capture_stop(chip);
618 s->running = 0;
619 }
620 break;
621 default:
622 err = -EINVAL;
623 break;
624 }
625 spin_unlock(&chip->reg_lock);
626 return err;
627}
628
629
630/*
631 * prepare playback/capture channel
632 */
10754f53 633static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
1da177e4 634{
10754f53
TI		 635 struct nm256 *chip = snd_pcm_substream_chip(substream);
636 struct snd_pcm_runtime *runtime = substream->runtime;
637 struct nm256_stream *s = runtime->private_data;
1da177e4
LT		 638
639 snd_assert(s, return -ENXIO);
640 s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
641 s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
642 s->periods = substream->runtime->periods;
643 s->cur_period = 0;
644
645 spin_lock_irq(&chip->reg_lock);
646 s->running = 0;
647 snd_nm256_set_format(chip, s, substream);
648 spin_unlock_irq(&chip->reg_lock);
649
650 return 0;
651}
652
653
654/*
655 * get the current pointer
656 */
657static snd_pcm_uframes_t
10754f53 658snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 659{
10754f53
TI		 660 struct nm256 *chip = snd_pcm_substream_chip(substream);
661 struct nm256_stream *s = substream->runtime->private_data;
1da177e4
LT		 662 unsigned long curp;
663
664 snd_assert(s, return 0);
665 curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
666 curp %= s->dma_size;
667 return bytes_to_frames(substream->runtime, curp);
668}
669
670static snd_pcm_uframes_t
10754f53 671snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 672{
10754f53
TI		 673 struct nm256 *chip = snd_pcm_substream_chip(substream);
674 struct nm256_stream *s = substream->runtime->private_data;
1da177e4
LT		 675 unsigned long curp;
676
677 snd_assert(s != NULL, return 0);
678 curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
679 curp %= s->dma_size;
680 return bytes_to_frames(substream->runtime, curp);
681}
682
683/* Remapped I/O space can be accessible as pointer on i386 */
684/* This might be changed in the future */
685#ifndef __i386__
686/*
687 * silence / copy for playback
688 */
689static int
10754f53 690snd_nm256_playback_silence(struct snd_pcm_substream *substream,
1da177e4
LT		 691 int channel, /* not used (interleaved data) */
692 snd_pcm_uframes_t pos,
693 snd_pcm_uframes_t count)
694{
10754f53
TI		 695 struct snd_pcm_runtime *runtime = substream->runtime;
696 struct nm256_stream *s = runtime->private_data;
1da177e4
LT		 697 count = frames_to_bytes(runtime, count);
698 pos = frames_to_bytes(runtime, pos);
699 memset_io(s->bufptr + pos, 0, count);
700 return 0;
701}
702
703static int
10754f53 704snd_nm256_playback_copy(struct snd_pcm_substream *substream,
1da177e4
LT		 705 int channel, /* not used (interleaved data) */
706 snd_pcm_uframes_t pos,
707 void __user *src,
708 snd_pcm_uframes_t count)
709{
10754f53
TI		 710 struct snd_pcm_runtime *runtime = substream->runtime;
711 struct nm256_stream *s = runtime->private_data;
1da177e4
LT		 712 count = frames_to_bytes(runtime, count);
713 pos = frames_to_bytes(runtime, pos);
714 if (copy_from_user_toio(s->bufptr + pos, src, count))
715 return -EFAULT;
716 return 0;
717}
718
719/*
720 * copy to user
721 */
722static int
10754f53 723snd_nm256_capture_copy(struct snd_pcm_substream *substream,
1da177e4
LT		 724 int channel, /* not used (interleaved data) */
725 snd_pcm_uframes_t pos,
726 void __user *dst,
727 snd_pcm_uframes_t count)
728{
10754f53
TI		 729 struct snd_pcm_runtime *runtime = substream->runtime;
730 struct nm256_stream *s = runtime->private_data;
1da177e4
LT		 731 count = frames_to_bytes(runtime, count);
732 pos = frames_to_bytes(runtime, pos);
733 if (copy_to_user_fromio(dst, s->bufptr + pos, count))
734 return -EFAULT;
735 return 0;
736}
737
738#endif /* !__i386__ */
739
740
741/*
742 * update playback/capture watermarks
743 */
744
745/* spinlock held! */
746static void
10754f53 747snd_nm256_playback_update(struct nm256 *chip)
1da177e4 748{
10754f53 749 struct nm256_stream *s;
1da177e4
LT		 750
751 s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
752 if (s->running && s->substream) {
753 spin_unlock(&chip->reg_lock);
754 snd_pcm_period_elapsed(s->substream);
755 spin_lock(&chip->reg_lock);
756 snd_nm256_playback_mark(chip, s);
757 }
758}
759
760/* spinlock held! */
761static void
10754f53 762snd_nm256_capture_update(struct nm256 *chip)
1da177e4 763{
10754f53 764 struct nm256_stream *s;
1da177e4
LT		 765
766 s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
767 if (s->running && s->substream) {
768 spin_unlock(&chip->reg_lock);
769 snd_pcm_period_elapsed(s->substream);
770 spin_lock(&chip->reg_lock);
771 snd_nm256_capture_mark(chip, s);
772 }
773}
774
775/*
776 * hardware info
777 */
10754f53 778static struct snd_pcm_hardware snd_nm256_playback =
1da177e4
LT		 779{
780 .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
781 SNDRV_PCM_INFO_INTERLEAVED |
782 /*SNDRV_PCM_INFO_PAUSE |*/
783 SNDRV_PCM_INFO_RESUME,
784 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
785 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
786 .rate_min = 8000,
787 .rate_max = 48000,
788 .channels_min = 1,
789 .channels_max = 2,
790 .periods_min = 2,
791 .periods_max = 1024,
792 .buffer_bytes_max = 128 * 1024,
793 .period_bytes_min = 256,
794 .period_bytes_max = 128 * 1024,
795};
796
10754f53 797static struct snd_pcm_hardware snd_nm256_capture =
1da177e4
LT		 798{
799 .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
800 SNDRV_PCM_INFO_INTERLEAVED |
801 /*SNDRV_PCM_INFO_PAUSE |*/
802 SNDRV_PCM_INFO_RESUME,
803 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
804 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
805 .rate_min = 8000,
806 .rate_max = 48000,
807 .channels_min = 1,
808 .channels_max = 2,
809 .periods_min = 2,
810 .periods_max = 1024,
811 .buffer_bytes_max = 128 * 1024,
812 .period_bytes_min = 256,
813 .period_bytes_max = 128 * 1024,
814};
815
816
817/* set dma transfer size */
10754f53
TI		 818static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
819 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 820{
821 /* area and addr are already set and unchanged */
822 substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
823 return 0;
824}
825
826/*
827 * open
828 */
10754f53
TI		 829static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
830 struct snd_pcm_substream *substream,
831 struct snd_pcm_hardware *hw_ptr)
1da177e4 832{
10754f53 833 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 834
835 s->running = 0;
836 runtime->hw = *hw_ptr;
837 runtime->hw.buffer_bytes_max = s->bufsize;
838 runtime->hw.period_bytes_max = s->bufsize / 2;
4d23359b 839 runtime->dma_area = (void __force *) s->bufptr;
1da177e4
LT		 840 runtime->dma_addr = s->bufptr_addr;
841 runtime->dma_bytes = s->bufsize;
842 runtime->private_data = s;
843 s->substream = substream;
844
845 snd_pcm_set_sync(substream);
846 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
847 &constraints_rates);
848}
849
850static int
10754f53 851snd_nm256_playback_open(struct snd_pcm_substream *substream)
1da177e4 852{
10754f53 853 struct nm256 *chip = snd_pcm_substream_chip(substream);
1da177e4 854
1204de32
TI		 855 if (snd_nm256_acquire_irq(chip) < 0)
856 return -EBUSY;
1da177e4
LT		 857 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
858 substream, &snd_nm256_playback);
859 return 0;
860}
861
862static int
10754f53 863snd_nm256_capture_open(struct snd_pcm_substream *substream)
1da177e4 864{
10754f53 865 struct nm256 *chip = snd_pcm_substream_chip(substream);
1da177e4 866
1204de32
TI		 867 if (snd_nm256_acquire_irq(chip) < 0)
868 return -EBUSY;
1da177e4
LT		 869 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
870 substream, &snd_nm256_capture);
871 return 0;
872}
873
874/*
875 * close - we don't have to do special..
876 */
877static int
10754f53 878snd_nm256_playback_close(struct snd_pcm_substream *substream)
1da177e4 879{
10754f53 880 struct nm256 *chip = snd_pcm_substream_chip(substream);
1204de32
TI		 881
882 snd_nm256_release_irq(chip);
1da177e4
LT		 883 return 0;
884}
885
886
887static int
10754f53 888snd_nm256_capture_close(struct snd_pcm_substream *substream)
1da177e4 889{
10754f53 890 struct nm256 *chip = snd_pcm_substream_chip(substream);
1204de32
TI		 891
892 snd_nm256_release_irq(chip);
1da177e4
LT		 893 return 0;
894}
895
896/*
897 * create a pcm instance
898 */
10754f53 899static struct snd_pcm_ops snd_nm256_playback_ops = {
1da177e4
LT		 900 .open = snd_nm256_playback_open,
901 .close = snd_nm256_playback_close,
902 .ioctl = snd_pcm_lib_ioctl,
903 .hw_params = snd_nm256_pcm_hw_params,
904 .prepare = snd_nm256_pcm_prepare,
905 .trigger = snd_nm256_playback_trigger,
906 .pointer = snd_nm256_playback_pointer,
907#ifndef __i386__
908 .copy = snd_nm256_playback_copy,
909 .silence = snd_nm256_playback_silence,
910#endif
911 .mmap = snd_pcm_lib_mmap_iomem,
912};
913
10754f53 914static struct snd_pcm_ops snd_nm256_capture_ops = {
1da177e4
LT		 915 .open = snd_nm256_capture_open,
916 .close = snd_nm256_capture_close,
917 .ioctl = snd_pcm_lib_ioctl,
918 .hw_params = snd_nm256_pcm_hw_params,
919 .prepare = snd_nm256_pcm_prepare,
920 .trigger = snd_nm256_capture_trigger,
921 .pointer = snd_nm256_capture_pointer,
922#ifndef __i386__
923 .copy = snd_nm256_capture_copy,
924#endif
925 .mmap = snd_pcm_lib_mmap_iomem,
926};
927
928static int __devinit
10754f53 929snd_nm256_pcm(struct nm256 *chip, int device)
1da177e4 930{
10754f53 931 struct snd_pcm *pcm;
1da177e4
LT		 932 int i, err;
933
934 for (i = 0; i < 2; i++) {
10754f53 935 struct nm256_stream *s = &chip->streams[i];
1da177e4
LT		 936 s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
937 s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
938 }
939
940 err = snd_pcm_new(chip->card, chip->card->driver, device,
941 1, 1, &pcm);
942 if (err < 0)
943 return err;
944
945 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
946 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
947
948 pcm->private_data = chip;
949 pcm->info_flags = 0;
950 chip->pcm = pcm;
951
952 return 0;
953}
954
955
956/*
957 * Initialize the hardware.
958 */
959static void
10754f53 960snd_nm256_init_chip(struct nm256 *chip)
1da177e4 961{
1da177e4
LT		 962 /* Reset everything. */
963 snd_nm256_writeb(chip, 0x0, 0x11);
964 snd_nm256_writew(chip, 0x214, 0);
965 /* stop sounds.. */
966 //snd_nm256_playback_stop(chip);
967 //snd_nm256_capture_stop(chip);
1da177e4
LT		 968}
969
970
1204de32 971static irqreturn_t
10754f53 972snd_nm256_intr_check(struct nm256 *chip)
1da177e4
LT		 973{
974 if (chip->badintrcount++ > 1000) {
975 /*
976 * I'm not sure if the best thing is to stop the card from
977 * playing or just release the interrupt (after all, we're in
978 * a bad situation, so doing fancy stuff may not be such a good
979 * idea).
980 *
981 * I worry about the card engine continuing to play noise
982 * over and over, however--that could become a very
983 * obnoxious problem. And we know that when this usually
984 * happens things are fairly safe, it just means the user's
985 * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
986 */
987 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
988 snd_nm256_playback_stop(chip);
989 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
990 snd_nm256_capture_stop(chip);
991 chip->badintrcount = 0;
1204de32 992 return IRQ_HANDLED;
1da177e4 993 }
1204de32 994 return IRQ_NONE;
1da177e4
LT		 995}
996
997/*
998 * Handle a potential interrupt for the device referred to by DEV_ID.
999 *
1000 * I don't like the cut-n-paste job here either between the two routines,
1001 * but there are sufficient differences between the two interrupt handlers
1002 * that parameterizing it isn't all that great either. (Could use a macro,
1003 * I suppose...yucky bleah.)
1004 */
1005
1006static irqreturn_t
1007snd_nm256_interrupt(int irq, void *dev_id, struct pt_regs *dummy)
1008{
10754f53 1009 struct nm256 *chip = dev_id;
1da177e4
LT		 1010 u16 status;
1011 u8 cbyte;
1012
1013 status = snd_nm256_readw(chip, NM_INT_REG);
1014
1015 /* Not ours. */
1204de32
TI		 1016 if (status == 0)
1017 return snd_nm256_intr_check(chip);
1da177e4
LT		 1018
1019 chip->badintrcount = 0;
1020
1021 /* Rather boring; check for individual interrupts and process them. */
1022
1023 spin_lock(&chip->reg_lock);
1024 if (status & NM_PLAYBACK_INT) {
1025 status &= ~NM_PLAYBACK_INT;
1026 NM_ACK_INT(chip, NM_PLAYBACK_INT);
1027 snd_nm256_playback_update(chip);
1028 }
1029
1030 if (status & NM_RECORD_INT) {
1031 status &= ~NM_RECORD_INT;
1032 NM_ACK_INT(chip, NM_RECORD_INT);
1033 snd_nm256_capture_update(chip);
1034 }
1035
1036 if (status & NM_MISC_INT_1) {
1037 status &= ~NM_MISC_INT_1;
1038 NM_ACK_INT(chip, NM_MISC_INT_1);
1039 snd_printd("NM256: Got misc interrupt #1\n");
1040 snd_nm256_writew(chip, NM_INT_REG, 0x8000);
1041 cbyte = snd_nm256_readb(chip, 0x400);
1042 snd_nm256_writeb(chip, 0x400, cbyte | 2);
1043 }
1044
1045 if (status & NM_MISC_INT_2) {
1046 status &= ~NM_MISC_INT_2;
1047 NM_ACK_INT(chip, NM_MISC_INT_2);
1048 snd_printd("NM256: Got misc interrupt #2\n");
1049 cbyte = snd_nm256_readb(chip, 0x400);
1050 snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1051 }
1052
1053 /* Unknown interrupt. */
1054 if (status) {
1055 snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
1056 status);
1057 /* Pray. */
1058 NM_ACK_INT(chip, status);
1059 }
1060
1061 spin_unlock(&chip->reg_lock);
1062 return IRQ_HANDLED;
1063}
1064
1065/*
1066 * Handle a potential interrupt for the device referred to by DEV_ID.
1067 * This handler is for the 256ZX, and is very similar to the non-ZX
1068 * routine.
1069 */
1070
1071static irqreturn_t
1072snd_nm256_interrupt_zx(int irq, void *dev_id, struct pt_regs *dummy)
1073{
10754f53 1074 struct nm256 *chip = dev_id;
1da177e4
LT		 1075 u32 status;
1076 u8 cbyte;
1077
1078 status = snd_nm256_readl(chip, NM_INT_REG);
1079
1080 /* Not ours. */
1204de32
TI		 1081 if (status == 0)
1082 return snd_nm256_intr_check(chip);
1da177e4
LT		 1083
1084 chip->badintrcount = 0;
1085
1086 /* Rather boring; check for individual interrupts and process them. */
1087
1088 spin_lock(&chip->reg_lock);
1089 if (status & NM2_PLAYBACK_INT) {
1090 status &= ~NM2_PLAYBACK_INT;
1091 NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
1092 snd_nm256_playback_update(chip);
1093 }
1094
1095 if (status & NM2_RECORD_INT) {
1096 status &= ~NM2_RECORD_INT;
1097 NM2_ACK_INT(chip, NM2_RECORD_INT);
1098 snd_nm256_capture_update(chip);
1099 }
1100
1101 if (status & NM2_MISC_INT_1) {
1102 status &= ~NM2_MISC_INT_1;
1103 NM2_ACK_INT(chip, NM2_MISC_INT_1);
1104 snd_printd("NM256: Got misc interrupt #1\n");
1105 cbyte = snd_nm256_readb(chip, 0x400);
1106 snd_nm256_writeb(chip, 0x400, cbyte | 2);
1107 }
1108
1109 if (status & NM2_MISC_INT_2) {
1110 status &= ~NM2_MISC_INT_2;
1111 NM2_ACK_INT(chip, NM2_MISC_INT_2);
1112 snd_printd("NM256: Got misc interrupt #2\n");
1113 cbyte = snd_nm256_readb(chip, 0x400);
1114 snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1115 }
1116
1117 /* Unknown interrupt. */
1118 if (status) {
1119 snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
1120 status);
1121 /* Pray. */
1122 NM2_ACK_INT(chip, status);
1123 }
1124
1125 spin_unlock(&chip->reg_lock);
1126 return IRQ_HANDLED;
1127}
1128
1129/*
1130 * AC97 interface
1131 */
1132
1133/*
1134 * Waits for the mixer to become ready to be written; returns a zero value
1135 * if it timed out.
1136 */
1137static int
10754f53 1138snd_nm256_ac97_ready(struct nm256 *chip)
1da177e4
LT		 1139{
1140 int timeout = 10;
1141 u32 testaddr;
1142 u16 testb;
1143
1144 testaddr = chip->mixer_status_offset;
1145 testb = chip->mixer_status_mask;
1146
1147 /*
1148 * Loop around waiting for the mixer to become ready.
1149 */
1150 while (timeout-- > 0) {
1151 if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
1152 return 1;
1153 udelay(100);
1154 }
1155 return 0;
1156}
1157
a23446c0
FS		 1158/*
1159 * Initial register values to be written to the AC97 mixer.
1160 * While most of these are identical to the reset values, we do this
1161 * so that we have most of the register contents cached--this avoids
1162 * reading from the mixer directly (which seems to be problematic,
1163 * probably due to ignorance).
1164 */
1165
1166struct initialValues {
1167 unsigned short reg;
1168 unsigned short value;
1169};
1170
1171static struct initialValues nm256_ac97_init_val[] =
1172{
1173 { AC97_MASTER, 0x8000 },
1174 { AC97_HEADPHONE, 0x8000 },
1175 { AC97_MASTER_MONO, 0x8000 },
1176 { AC97_PC_BEEP, 0x8000 },
1177 { AC97_PHONE, 0x8008 },
1178 { AC97_MIC, 0x8000 },
1179 { AC97_LINE, 0x8808 },
1180 { AC97_CD, 0x8808 },
1181 { AC97_VIDEO, 0x8808 },
1182 { AC97_AUX, 0x8808 },
1183 { AC97_PCM, 0x8808 },
1184 { AC97_REC_SEL, 0x0000 },
1185 { AC97_REC_GAIN, 0x0B0B },
1186 { AC97_GENERAL_PURPOSE, 0x0000 },
1187 { AC97_3D_CONTROL, 0x8000 },
1188 { AC97_VENDOR_ID1, 0x8384 },
1189 { AC97_VENDOR_ID2, 0x7609 },
1190};
1191
1192static int nm256_ac97_idx(unsigned short reg)
1193{
1194 int i;
1195 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
1196 if (nm256_ac97_init_val[i].reg == reg)
1197 return i;
1198 return -1;
1199}
1200
1da177e4 1201/*
a23446c0
FS		 1202 * some nm256 easily crash when reading from mixer registers
1203 * thus we're treating it as a write-only mixer and cache the
1204 * written values
1da177e4
LT		 1205 */
1206static unsigned short
10754f53 1207snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 1208{
10754f53 1209 struct nm256 *chip = ac97->private_data;
a23446c0 1210 int idx = nm256_ac97_idx(reg);
1da177e4 1211
a23446c0 1212 if (idx < 0)
1da177e4 1213 return 0;
a23446c0 1214 return chip->ac97_regs[idx];
1da177e4
LT		 1215}
1216
1217/*
1218 */
1219static void
10754f53 1220snd_nm256_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 1221 unsigned short reg, unsigned short val)
1222{
10754f53 1223 struct nm256 *chip = ac97->private_data;
1da177e4 1224 int tries = 2;
a23446c0 1225 int idx = nm256_ac97_idx(reg);
1da177e4
LT		 1226 u32 base;
1227
a23446c0
FS		 1228 if (idx < 0)
1229 return;
1230
1da177e4
LT		 1231 base = chip->mixer_base;
1232
1233 snd_nm256_ac97_ready(chip);
1234
1235 /* Wait for the write to take, too. */
1236 while (tries-- > 0) {
1237 snd_nm256_writew(chip, base + reg, val);
1238 msleep(1); /* a little delay here seems better.. */
a23446c0
FS		 1239 if (snd_nm256_ac97_ready(chip)) {
1240 /* successful write: set cache */
1241 chip->ac97_regs[idx] = val;
1da177e4 1242 return;
a23446c0 1243 }
1da177e4
LT		 1244 }
1245 snd_printd("nm256: ac97 codec not ready..\n");
1246}
1247
a23446c0
FS		 1248/* static resolution table */
1249static struct snd_ac97_res_table nm256_res_table[] = {
1250 { AC97_MASTER, 0x1f1f },
1251 { AC97_HEADPHONE, 0x1f1f },
1252 { AC97_MASTER_MONO, 0x001f },
1253 { AC97_PC_BEEP, 0x001f },
1254 { AC97_PHONE, 0x001f },
1255 { AC97_MIC, 0x001f },
1256 { AC97_LINE, 0x1f1f },
1257 { AC97_CD, 0x1f1f },
1258 { AC97_VIDEO, 0x1f1f },
1259 { AC97_AUX, 0x1f1f },
1260 { AC97_PCM, 0x1f1f },
1261 { AC97_REC_GAIN, 0x0f0f },
1262 { } /* terminator */
1263};
1264
1da177e4
LT		 1265/* initialize the ac97 into a known state */
1266static void
10754f53 1267snd_nm256_ac97_reset(struct snd_ac97 *ac97)
1da177e4 1268{
10754f53 1269 struct nm256 *chip = ac97->private_data;
1da177e4
LT		 1270
1271 /* Reset the mixer. 'Tis magic! */
1272 snd_nm256_writeb(chip, 0x6c0, 1);
1273 if (! chip->reset_workaround) {
1274 /* Dell latitude LS will lock up by this */
1275 snd_nm256_writeb(chip, 0x6cc, 0x87);
1276 }
47530cf4
JL		 1277 if (! chip->reset_workaround_2) {
1278 /* Dell latitude CSx will lock up by this */
1279 snd_nm256_writeb(chip, 0x6cc, 0x80);
1280 snd_nm256_writeb(chip, 0x6cc, 0x0);
1281 }
a23446c0
FS		 1282 if (! chip->in_resume) {
1283 int i;
1284 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
1285 /* preload the cache, so as to avoid even a single
1286 * read of the mixer regs
1287 */
1288 snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
1289 nm256_ac97_init_val[i].value);
1290 }
1291 }
1da177e4
LT		 1292}
1293
1294/* create an ac97 mixer interface */
1295static int __devinit
10754f53 1296snd_nm256_mixer(struct nm256 *chip)
1da177e4 1297{
10754f53
TI		 1298 struct snd_ac97_bus *pbus;
1299 struct snd_ac97_template ac97;
a23446c0 1300 int err;
10754f53 1301 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1302 .reset = snd_nm256_ac97_reset,
1303 .write = snd_nm256_ac97_write,
1304 .read = snd_nm256_ac97_read,
1305 };
a23446c0
FS		 1306
1307 chip->ac97_regs = kcalloc(sizeof(short),
1308 ARRAY_SIZE(nm256_ac97_init_val), GFP_KERNEL);
1309 if (! chip->ac97_regs)
1310 return -ENOMEM;
1da177e4
LT		 1311
1312 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
1313 return err;
1314
1315 memset(&ac97, 0, sizeof(ac97));
1316 ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
1da177e4 1317 ac97.private_data = chip;
a23446c0 1318 ac97.res_table = nm256_res_table;
1204de32 1319 pbus->no_vra = 1;
1da177e4
LT		 1320 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1321 if (err < 0)
1322 return err;
1323 if (! (chip->ac97->id & (0xf0000000))) {
1324 /* looks like an invalid id */
1325 sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
1326 }
1327 return 0;
1328}
1329
1330/*
1331 * See if the signature left by the NM256 BIOS is intact; if so, we use
1332 * the associated address as the end of our audio buffer in the video
1333 * RAM.
1334 */
1335
1336static int __devinit
10754f53 1337snd_nm256_peek_for_sig(struct nm256 *chip)
1da177e4
LT		 1338{
1339 /* The signature is located 1K below the end of video RAM. */
1340 void __iomem *temp;
1341 /* Default buffer end is 5120 bytes below the top of RAM. */
1342 unsigned long pointer_found = chip->buffer_end - 0x1400;
1343 u32 sig;
1344
1345 temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
1346 if (temp == NULL) {
99b359ba 1347 snd_printk(KERN_ERR "Unable to scan for card signature in video RAM\n");
1da177e4
LT		 1348 return -EBUSY;
1349 }
1350
1351 sig = readl(temp);
1352 if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
1353 u32 pointer = readl(temp + 4);
1354
1355 /*
1356 * If it's obviously invalid, don't use it
1357 */
1358 if (pointer == 0xffffffff ||
1359 pointer < chip->buffer_size ||
1360 pointer > chip->buffer_end) {
99b359ba 1361 snd_printk(KERN_ERR "invalid signature found: 0x%x\n", pointer);
1da177e4
LT		 1362 iounmap(temp);
1363 return -ENODEV;
1364 } else {
1365 pointer_found = pointer;
10754f53
TI		 1366 printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n",
1367 pointer);
1da177e4
LT		 1368 }
1369 }
1370
1371 iounmap(temp);
1372 chip->buffer_end = pointer_found;
1373
1374 return 0;
1375}
1376
1377#ifdef CONFIG_PM
1378/*
1379 * APM event handler, so the card is properly reinitialized after a power
1380 * event.
1381 */
3fcf7d2c 1382static int nm256_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 1383{
3fcf7d2c
TI		 1384 struct snd_card *card = pci_get_drvdata(pci);
1385 struct nm256 *chip = card->private_data;
1da177e4 1386
3fcf7d2c 1387 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 1388 snd_pcm_suspend_all(chip->pcm);
1389 snd_ac97_suspend(chip->ac97);
1390 chip->coeffs_current = 0;
3fcf7d2c
TI		 1391 pci_disable_device(pci);
1392 pci_save_state(pci);
1da177e4
LT		 1393 return 0;
1394}
1395
3fcf7d2c 1396static int nm256_resume(struct pci_dev *pci)
1da177e4 1397{
3fcf7d2c
TI		 1398 struct snd_card *card = pci_get_drvdata(pci);
1399 struct nm256 *chip = card->private_data;
1204de32 1400 int i;
1da177e4
LT		 1401
1402 /* Perform a full reset on the hardware */
a23446c0 1403 chip->in_resume = 1;
3fcf7d2c
TI		 1404 pci_restore_state(pci);
1405 pci_enable_device(pci);
1da177e4
LT		 1406 snd_nm256_init_chip(chip);
1407
1408 /* restore ac97 */
1409 snd_ac97_resume(chip->ac97);
1410
1204de32 1411 for (i = 0; i < 2; i++) {
10754f53 1412 struct nm256_stream *s = &chip->streams[i];
1204de32
TI		 1413 if (s->substream && s->suspended) {
1414 spin_lock_irq(&chip->reg_lock);
1415 snd_nm256_set_format(chip, s, s->substream);
1416 spin_unlock_irq(&chip->reg_lock);
1417 }
1418 }
1419
3fcf7d2c 1420 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
a23446c0 1421 chip->in_resume = 0;
1da177e4
LT		 1422 return 0;
1423}
1424#endif /* CONFIG_PM */
1425
10754f53 1426static int snd_nm256_free(struct nm256 *chip)
1da177e4
LT		 1427{
1428 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
1429 snd_nm256_playback_stop(chip);
1430 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
1431 snd_nm256_capture_stop(chip);
1432
1433 if (chip->irq >= 0)
1434 synchronize_irq(chip->irq);
1435
1436 if (chip->cport)
1437 iounmap(chip->cport);
1438 if (chip->buffer)
1439 iounmap(chip->buffer);
b1d5776d
TI		 1440 release_and_free_resource(chip->res_cport);
1441 release_and_free_resource(chip->res_buffer);
1da177e4 1442 if (chip->irq >= 0)
10754f53 1443 free_irq(chip->irq, chip);
1da177e4
LT		 1444
1445 pci_disable_device(chip->pci);
a23446c0 1446 kfree(chip->ac97_regs);
1da177e4
LT		 1447 kfree(chip);
1448 return 0;
1449}
1450
10754f53 1451static int snd_nm256_dev_free(struct snd_device *device)
1da177e4 1452{
10754f53 1453 struct nm256 *chip = device->device_data;
1da177e4
LT		 1454 return snd_nm256_free(chip);
1455}
1456
1457static int __devinit
10754f53
TI		 1458snd_nm256_create(struct snd_card *card, struct pci_dev *pci,
1459 struct nm256 **chip_ret)
1da177e4 1460{
10754f53 1461 struct nm256 *chip;
1da177e4 1462 int err, pval;
10754f53 1463 static struct snd_device_ops ops = {
1da177e4
LT		 1464 .dev_free = snd_nm256_dev_free,
1465 };
1466 u32 addr;
1467
1468 *chip_ret = NULL;
1469
1470 if ((err = pci_enable_device(pci)) < 0)
1471 return err;
1472
e560d8d8 1473 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1474 if (chip == NULL) {
1475 pci_disable_device(pci);
1476 return -ENOMEM;
1477 }
1478
1479 chip->card = card;
1480 chip->pci = pci;
3f05f868 1481 chip->use_cache = use_cache;
1da177e4
LT		 1482 spin_lock_init(&chip->reg_lock);
1483 chip->irq = -1;
62932df8 1484 mutex_init(&chip->irq_mutex);
1da177e4 1485
3f05f868
TI		 1486 /* store buffer sizes in bytes */
1487 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
1488 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
1da177e4
LT		 1489
1490 /*
1491 * The NM256 has two memory ports. The first port is nothing
1492 * more than a chunk of video RAM, which is used as the I/O ring
1493 * buffer. The second port has the actual juicy stuff (like the
1494 * mixer and the playback engine control registers).
1495 */
1496
1497 chip->buffer_addr = pci_resource_start(pci, 0);
1498 chip->cport_addr = pci_resource_start(pci, 1);
1499
1500 /* Init the memory port info. */
1501 /* remap control port (#2) */
1502 chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
1503 card->driver);
1504 if (chip->res_cport == NULL) {
99b359ba 1505 snd_printk(KERN_ERR "memory region 0x%lx (size 0x%x) busy\n",
1da177e4
LT		 1506 chip->cport_addr, NM_PORT2_SIZE);
1507 err = -EBUSY;
1508 goto __error;
1509 }
1510 chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
1511 if (chip->cport == NULL) {
99b359ba 1512 snd_printk(KERN_ERR "unable to map control port %lx\n", chip->cport_addr);
1da177e4
LT		 1513 err = -ENOMEM;
1514 goto __error;
1515 }
1516
1517 if (!strcmp(card->driver, "NM256AV")) {
1518 /* Ok, try to see if this is a non-AC97 version of the hardware. */
1519 pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
1520 if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
3f05f868 1521 if (! force_ac97) {
1da177e4 1522 printk(KERN_ERR "nm256: no ac97 is found!\n");
10754f53
TI		 1523 printk(KERN_ERR " force the driver to load by "
1524 "passing in the module parameter\n");
1da177e4
LT		 1525 printk(KERN_ERR " force_ac97=1\n");
1526 printk(KERN_ERR " or try sb16 or cs423x drivers instead.\n");
1527 err = -ENXIO;
1528 goto __error;
1529 }
1530 }
1531 chip->buffer_end = 2560 * 1024;
1532 chip->interrupt = snd_nm256_interrupt;
1533 chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
1534 chip->mixer_status_mask = NM_MIXER_READY_MASK;
1535 } else {
1536 /* Not sure if there is any relevant detect for the ZX or not. */
1537 if (snd_nm256_readb(chip, 0xa0b) != 0)
1538 chip->buffer_end = 6144 * 1024;
1539 else
1540 chip->buffer_end = 4096 * 1024;
1541
1542 chip->interrupt = snd_nm256_interrupt_zx;
1543 chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
1544 chip->mixer_status_mask = NM2_MIXER_READY_MASK;
1545 }
1546
10754f53
TI		 1547 chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
1548 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1da177e4
LT		 1549 if (chip->use_cache)
1550 chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
1551 else
1552 chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
1553
3f05f868
TI		 1554 if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
1555 chip->buffer_end = buffer_top;
1da177e4
LT		 1556 else {
1557 /* get buffer end pointer from signature */
1558 if ((err = snd_nm256_peek_for_sig(chip)) < 0)
1559 goto __error;
1560 }
1561
1562 chip->buffer_start = chip->buffer_end - chip->buffer_size;
1563 chip->buffer_addr += chip->buffer_start;
1564
1565 printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
1566 chip->buffer_start, chip->buffer_end);
1567
1568 chip->res_buffer = request_mem_region(chip->buffer_addr,
1569 chip->buffer_size,
1570 card->driver);
1571 if (chip->res_buffer == NULL) {
99b359ba 1572 snd_printk(KERN_ERR "nm256: buffer 0x%lx (size 0x%x) busy\n",
1da177e4
LT		 1573 chip->buffer_addr, chip->buffer_size);
1574 err = -EBUSY;
1575 goto __error;
1576 }
1577 chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
1578 if (chip->buffer == NULL) {
1579 err = -ENOMEM;
99b359ba 1580 snd_printk(KERN_ERR "unable to map ring buffer at %lx\n", chip->buffer_addr);
1da177e4
LT		 1581 goto __error;
1582 }
1583
1584 /* set offsets */
1585 addr = chip->buffer_start;
1586 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
1587 addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
1588 chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
1589 addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1590 if (chip->use_cache) {
1591 chip->all_coeff_buf = addr;
1592 } else {
1593 chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
1594 addr += NM_MAX_PLAYBACK_COEF_SIZE;
1595 chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
1596 }
1597
1da177e4
LT		 1598 /* Fixed setting. */
1599 chip->mixer_base = NM_MIXER_OFFSET;
1600
1601 chip->coeffs_current = 0;
1602
1603 snd_nm256_init_chip(chip);
1604
1605 // pci_set_master(pci); /* needed? */
1606
1da177e4
LT		 1607 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
1608 goto __error;
1609
1610 snd_card_set_dev(card, &pci->dev);
1611
1612 *chip_ret = chip;
1613 return 0;
1614
1615__error:
1616 snd_nm256_free(chip);
1617 return err;
1618}
1619
1620
1621struct nm256_quirk {
1622 unsigned short vendor;
1623 unsigned short device;
1624 int type;
1625};
1626
47530cf4 1627enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
1da177e4
LT		 1628
1629static struct nm256_quirk nm256_quirks[] __devinitdata = {
1630 /* HP omnibook 4150 has cs4232 codec internally */
1631 { .vendor = 0x103c, .device = 0x0007, .type = NM_BLACKLISTED },
1632 /* Sony PCG-F305 */
1633 { .vendor = 0x104d, .device = 0x8041, .type = NM_RESET_WORKAROUND },
1634 /* Dell Latitude LS */
1635 { .vendor = 0x1028, .device = 0x0080, .type = NM_RESET_WORKAROUND },
47530cf4
JL		 1636 /* Dell Latitude CSx */
1637 { .vendor = 0x1028, .device = 0x0091, .type = NM_RESET_WORKAROUND_2 },
1da177e4
LT		 1638 { } /* terminator */
1639};
1640
1641
1642static int __devinit snd_nm256_probe(struct pci_dev *pci,
1643 const struct pci_device_id *pci_id)
1644{
10754f53
TI		 1645 struct snd_card *card;
1646 struct nm256 *chip;
1da177e4 1647 int err;
1da177e4
LT		 1648 struct nm256_quirk *q;
1649 u16 subsystem_vendor, subsystem_device;
1650
1da177e4
LT		 1651 pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);
1652 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &subsystem_device);
1653
1654 for (q = nm256_quirks; q->vendor; q++) {
1655 if (q->vendor == subsystem_vendor && q->device == subsystem_device) {
1656 switch (q->type) {
1657 case NM_BLACKLISTED:
10754f53
TI		 1658 printk(KERN_INFO "nm256: The device is blacklisted. "
1659 "Loading stopped\n");
1da177e4 1660 return -ENODEV;
47530cf4 1661 case NM_RESET_WORKAROUND_2:
8a3fb4d0 1662 reset_workaround_2 = 1;
47530cf4 1663 /* Fall-through */
1da177e4 1664 case NM_RESET_WORKAROUND:
8a3fb4d0 1665 reset_workaround = 1;
1da177e4
LT		 1666 break;
1667 }
1668 }
1669 }
1670
8a3fb4d0 1671 card = snd_card_new(index, id, THIS_MODULE, 0);
1da177e4
LT		 1672 if (card == NULL)
1673 return -ENOMEM;
1674
1675 switch (pci->device) {
1676 case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
1677 strcpy(card->driver, "NM256AV");
1678 break;
1679 case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
1680 strcpy(card->driver, "NM256ZX");
1681 break;
1682 case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
1683 strcpy(card->driver, "NM256XL+");
1684 break;
1685 default:
99b359ba 1686 snd_printk(KERN_ERR "invalid device id 0x%x\n", pci->device);
1da177e4
LT		 1687 snd_card_free(card);
1688 return -EINVAL;
1689 }
1690
8a3fb4d0 1691 if (vaio_hack)
3f05f868 1692 buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
8a3fb4d0
TI		 1693
1694 if (playback_bufsize < 4)
1695 playback_bufsize = 4;
1696 if (playback_bufsize > 128)
1697 playback_bufsize = 128;
1698 if (capture_bufsize < 4)
1699 capture_bufsize = 4;
1700 if (capture_bufsize > 128)
1701 capture_bufsize = 128;
3f05f868 1702 if ((err = snd_nm256_create(card, pci, &chip)) < 0) {
1da177e4
LT		 1703 snd_card_free(card);
1704 return err;
1705 }
3fcf7d2c 1706 card->private_data = chip;
1da177e4 1707
8a3fb4d0 1708 if (reset_workaround) {
1da177e4
LT		 1709 snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
1710 chip->reset_workaround = 1;
1711 }
1712
8a3fb4d0 1713 if (reset_workaround_2) {
47530cf4
JL		 1714 snd_printdd(KERN_INFO "nm256: reset_workaround_2 activated\n");
1715 chip->reset_workaround_2 = 1;
1716 }
1717
1da177e4
LT		 1718 if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
1719 (err = snd_nm256_mixer(chip)) < 0) {
1720 snd_card_free(card);
1721 return err;
1722 }
1723
1724 sprintf(card->shortname, "NeoMagic %s", card->driver);
1725 sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
1726 card->shortname,
1727 chip->buffer_addr, chip->cport_addr, chip->irq);
1728
1729 if ((err = snd_card_register(card)) < 0) {
1730 snd_card_free(card);
1731 return err;
1732 }
1733
1734 pci_set_drvdata(pci, card);
1da177e4
LT		 1735 return 0;
1736}
1737
1738static void __devexit snd_nm256_remove(struct pci_dev *pci)
1739{
1740 snd_card_free(pci_get_drvdata(pci));
1741 pci_set_drvdata(pci, NULL);
1742}
1743
1744
1745static struct pci_driver driver = {
1746 .name = "NeoMagic 256",
1747 .id_table = snd_nm256_ids,
1748 .probe = snd_nm256_probe,
1749 .remove = __devexit_p(snd_nm256_remove),
3fcf7d2c
TI		 1750#ifdef CONFIG_PM
1751 .suspend = nm256_suspend,
1752 .resume = nm256_resume,
1753#endif
1da177e4
LT		 1754};
1755
1756
1757static int __init alsa_card_nm256_init(void)
1758{
01d25d46 1759 return pci_register_driver(&driver);
1da177e4
LT		 1760}
1761
1762static void __exit alsa_card_nm256_exit(void)
1763{
1764 pci_unregister_driver(&driver);
1765}
1766
1767module_init(alsa_card_nm256_init)
1768module_exit(alsa_card_nm256_exit)
Linux kernel - Deliverables
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