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d0ce9946 CL |
1 | /* |
2 | * C-Media CMI8788 driver for C-Media's reference design and for the X-Meridian | |
3 | * | |
4 | * Copyright (c) Clemens Ladisch <clemens@ladisch.de> | |
5 | * | |
6 | * | |
7 | * This driver is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License, version 2. | |
9 | * | |
10 | * This driver is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this driver; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | /* | |
21 | * SPI 0 -> 1st AK4396 (front) | |
7113e958 | 22 | * SPI 1 -> 2nd AK4396 (surround) |
d0ce9946 CL |
23 | * SPI 2 -> 3rd AK4396 (center/LFE) |
24 | * SPI 3 -> WM8785 | |
7113e958 | 25 | * SPI 4 -> 4th AK4396 (back) |
d0ce9946 CL |
26 | * |
27 | * GPIO 0 -> DFS0 of AK5385 | |
28 | * GPIO 1 -> DFS1 of AK5385 | |
29 | */ | |
30 | ||
902b05c1 | 31 | #include <linux/mutex.h> |
d0ce9946 | 32 | #include <linux/pci.h> |
902b05c1 | 33 | #include <sound/ac97_codec.h> |
ccc80fb4 | 34 | #include <sound/control.h> |
d0ce9946 CL |
35 | #include <sound/core.h> |
36 | #include <sound/initval.h> | |
37 | #include <sound/pcm.h> | |
38 | #include <sound/pcm_params.h> | |
39 | #include <sound/tlv.h> | |
40 | #include "oxygen.h" | |
c626026d | 41 | #include "ak4396.h" |
f5b2368b | 42 | #include "wm8785.h" |
d0ce9946 CL |
43 | |
44 | MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); | |
45 | MODULE_DESCRIPTION("C-Media CMI8788 driver"); | |
d023dc0a | 46 | MODULE_LICENSE("GPL v2"); |
d0ce9946 CL |
47 | MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}"); |
48 | ||
49 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; | |
50 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; | |
51 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; | |
52 | ||
53 | module_param_array(index, int, NULL, 0444); | |
54 | MODULE_PARM_DESC(index, "card index"); | |
55 | module_param_array(id, charp, NULL, 0444); | |
56 | MODULE_PARM_DESC(id, "ID string"); | |
57 | module_param_array(enable, bool, NULL, 0444); | |
58 | MODULE_PARM_DESC(enable, "enable card"); | |
59 | ||
60 | static struct pci_device_id oxygen_ids[] __devinitdata = { | |
61 | { OXYGEN_PCI_SUBID(0x10b0, 0x0216) }, | |
62 | { OXYGEN_PCI_SUBID(0x10b0, 0x0218) }, | |
63 | { OXYGEN_PCI_SUBID(0x10b0, 0x0219) }, | |
64 | { OXYGEN_PCI_SUBID(0x13f6, 0x0001) }, | |
65 | { OXYGEN_PCI_SUBID(0x13f6, 0x0010) }, | |
66 | { OXYGEN_PCI_SUBID(0x13f6, 0x8788) }, | |
67 | { OXYGEN_PCI_SUBID(0x147a, 0xa017) }, | |
d0ce9946 CL |
68 | { OXYGEN_PCI_SUBID(0x1a58, 0x0910) }, |
69 | { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = 1 }, | |
70 | { OXYGEN_PCI_SUBID(0x7284, 0x9761) }, | |
71 | { } | |
72 | }; | |
73 | MODULE_DEVICE_TABLE(pci, oxygen_ids); | |
74 | ||
878ac3ee CL |
75 | |
76 | #define GPIO_AK5385_DFS_MASK 0x0003 | |
77 | #define GPIO_AK5385_DFS_NORMAL 0x0000 | |
78 | #define GPIO_AK5385_DFS_DOUBLE 0x0001 | |
79 | #define GPIO_AK5385_DFS_QUAD 0x0002 | |
80 | ||
7ef37cd9 CL |
81 | struct generic_data { |
82 | u8 ak4396_ctl2; | |
e58aee95 | 83 | u16 saved_wm8785_registers[2]; |
7ef37cd9 CL |
84 | }; |
85 | ||
d0ce9946 CL |
86 | static void ak4396_write(struct oxygen *chip, unsigned int codec, |
87 | u8 reg, u8 value) | |
88 | { | |
89 | /* maps ALSA channel pair number to SPI output */ | |
90 | static const u8 codec_spi_map[4] = { | |
7113e958 | 91 | 0, 1, 2, 4 |
d0ce9946 | 92 | }; |
c2353a08 | 93 | oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | |
d0ce9946 | 94 | OXYGEN_SPI_DATA_LENGTH_2 | |
2ea85986 | 95 | OXYGEN_SPI_CLOCK_160 | |
d0ce9946 | 96 | (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) | |
c2353a08 | 97 | OXYGEN_SPI_CEN_LATCH_CLOCK_HI, |
d0ce9946 CL |
98 | AK4396_WRITE | (reg << 8) | value); |
99 | } | |
100 | ||
101 | static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value) | |
102 | { | |
e58aee95 CL |
103 | struct generic_data *data = chip->model_data; |
104 | ||
c2353a08 | 105 | oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | |
d0ce9946 | 106 | OXYGEN_SPI_DATA_LENGTH_2 | |
2ea85986 | 107 | OXYGEN_SPI_CLOCK_160 | |
c2353a08 CL |
108 | (3 << OXYGEN_SPI_CODEC_SHIFT) | |
109 | OXYGEN_SPI_CEN_LATCH_CLOCK_LO, | |
d0ce9946 | 110 | (reg << 9) | value); |
e58aee95 CL |
111 | if (reg < ARRAY_SIZE(data->saved_wm8785_registers)) |
112 | data->saved_wm8785_registers[reg] = value; | |
d0ce9946 CL |
113 | } |
114 | ||
bbbfb552 CL |
115 | static void update_ak4396_volume(struct oxygen *chip) |
116 | { | |
117 | unsigned int i; | |
118 | ||
119 | for (i = 0; i < 4; ++i) { | |
120 | ak4396_write(chip, i, | |
121 | AK4396_LCH_ATT, chip->dac_volume[i * 2]); | |
122 | ak4396_write(chip, i, | |
123 | AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]); | |
124 | } | |
125 | } | |
126 | ||
d0ce9946 CL |
127 | static void ak4396_init(struct oxygen *chip) |
128 | { | |
7ef37cd9 | 129 | struct generic_data *data = chip->model_data; |
d0ce9946 CL |
130 | unsigned int i; |
131 | ||
e983532e | 132 | data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; |
d0ce9946 | 133 | for (i = 0; i < 4; ++i) { |
878ac3ee CL |
134 | ak4396_write(chip, i, |
135 | AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); | |
136 | ak4396_write(chip, i, | |
7ef37cd9 | 137 | AK4396_CONTROL_2, data->ak4396_ctl2); |
878ac3ee CL |
138 | ak4396_write(chip, i, |
139 | AK4396_CONTROL_3, AK4396_PCM); | |
d0ce9946 | 140 | } |
bbbfb552 | 141 | update_ak4396_volume(chip); |
d0ce9946 CL |
142 | snd_component_add(chip->card, "AK4396"); |
143 | } | |
144 | ||
145 | static void ak5385_init(struct oxygen *chip) | |
146 | { | |
878ac3ee CL |
147 | oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK); |
148 | oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK); | |
d0ce9946 CL |
149 | snd_component_add(chip->card, "AK5385"); |
150 | } | |
151 | ||
152 | static void wm8785_init(struct oxygen *chip) | |
153 | { | |
e58aee95 CL |
154 | struct generic_data *data = chip->model_data; |
155 | ||
156 | data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE | | |
157 | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST; | |
158 | data->saved_wm8785_registers[1] = WM8785_WL_24; | |
159 | ||
878ac3ee | 160 | wm8785_write(chip, WM8785_R7, 0); |
e58aee95 CL |
161 | wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]); |
162 | wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]); | |
163 | ||
d0ce9946 CL |
164 | snd_component_add(chip->card, "WM8785"); |
165 | } | |
166 | ||
167 | static void generic_init(struct oxygen *chip) | |
168 | { | |
169 | ak4396_init(chip); | |
170 | wm8785_init(chip); | |
171 | } | |
172 | ||
173 | static void meridian_init(struct oxygen *chip) | |
174 | { | |
175 | ak4396_init(chip); | |
176 | ak5385_init(chip); | |
177 | } | |
178 | ||
179 | static void generic_cleanup(struct oxygen *chip) | |
180 | { | |
181 | } | |
182 | ||
183 | static void set_ak4396_params(struct oxygen *chip, | |
184 | struct snd_pcm_hw_params *params) | |
185 | { | |
7ef37cd9 | 186 | struct generic_data *data = chip->model_data; |
d0ce9946 CL |
187 | unsigned int i; |
188 | u8 value; | |
189 | ||
7ef37cd9 | 190 | value = data->ak4396_ctl2 & ~AK4396_DFS_MASK; |
d0ce9946 CL |
191 | if (params_rate(params) <= 54000) |
192 | value |= AK4396_DFS_NORMAL; | |
236c4920 | 193 | else if (params_rate(params) <= 108000) |
d0ce9946 CL |
194 | value |= AK4396_DFS_DOUBLE; |
195 | else | |
196 | value |= AK4396_DFS_QUAD; | |
7ef37cd9 | 197 | data->ak4396_ctl2 = value; |
d0ce9946 | 198 | for (i = 0; i < 4; ++i) { |
878ac3ee CL |
199 | ak4396_write(chip, i, |
200 | AK4396_CONTROL_1, AK4396_DIF_24_MSB); | |
201 | ak4396_write(chip, i, | |
202 | AK4396_CONTROL_2, value); | |
203 | ak4396_write(chip, i, | |
204 | AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); | |
d0ce9946 CL |
205 | } |
206 | } | |
207 | ||
d0ce9946 CL |
208 | static void update_ak4396_mute(struct oxygen *chip) |
209 | { | |
7ef37cd9 | 210 | struct generic_data *data = chip->model_data; |
d0ce9946 CL |
211 | unsigned int i; |
212 | u8 value; | |
213 | ||
7ef37cd9 | 214 | value = data->ak4396_ctl2 & ~AK4396_SMUTE; |
d0ce9946 CL |
215 | if (chip->dac_mute) |
216 | value |= AK4396_SMUTE; | |
7ef37cd9 | 217 | data->ak4396_ctl2 = value; |
d0ce9946 | 218 | for (i = 0; i < 4; ++i) |
878ac3ee | 219 | ak4396_write(chip, i, AK4396_CONTROL_2, value); |
d0ce9946 CL |
220 | } |
221 | ||
222 | static void set_wm8785_params(struct oxygen *chip, | |
223 | struct snd_pcm_hw_params *params) | |
224 | { | |
225 | unsigned int value; | |
226 | ||
878ac3ee | 227 | wm8785_write(chip, WM8785_R7, 0); |
d0ce9946 | 228 | |
878ac3ee | 229 | value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST; |
71e22a4b CL |
230 | if (params_rate(params) <= 48000) |
231 | value |= WM8785_OSR_SINGLE; | |
232 | else if (params_rate(params) <= 96000) | |
d0ce9946 | 233 | value |= WM8785_OSR_DOUBLE; |
d0ce9946 | 234 | else |
71e22a4b | 235 | value |= WM8785_OSR_QUAD; |
878ac3ee | 236 | wm8785_write(chip, WM8785_R0, value); |
d0ce9946 CL |
237 | |
238 | if (snd_pcm_format_width(params_format(params)) <= 16) | |
239 | value = WM8785_WL_16; | |
240 | else | |
241 | value = WM8785_WL_24; | |
878ac3ee | 242 | wm8785_write(chip, WM8785_R1, value); |
d0ce9946 CL |
243 | } |
244 | ||
245 | static void set_ak5385_params(struct oxygen *chip, | |
246 | struct snd_pcm_hw_params *params) | |
247 | { | |
248 | unsigned int value; | |
249 | ||
250 | if (params_rate(params) <= 54000) | |
878ac3ee | 251 | value = GPIO_AK5385_DFS_NORMAL; |
d0ce9946 | 252 | else if (params_rate(params) <= 108000) |
878ac3ee | 253 | value = GPIO_AK5385_DFS_DOUBLE; |
d0ce9946 | 254 | else |
878ac3ee CL |
255 | value = GPIO_AK5385_DFS_QUAD; |
256 | oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, | |
257 | value, GPIO_AK5385_DFS_MASK); | |
d0ce9946 CL |
258 | } |
259 | ||
260 | static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0); | |
261 | ||
262 | static const struct oxygen_model model_generic = { | |
263 | .shortname = "C-Media CMI8788", | |
264 | .longname = "C-Media Oxygen HD Audio", | |
265 | .chip = "CMI8788", | |
266 | .owner = THIS_MODULE, | |
267 | .init = generic_init, | |
268 | .cleanup = generic_cleanup, | |
269 | .set_dac_params = set_ak4396_params, | |
270 | .set_adc_params = set_wm8785_params, | |
271 | .update_dac_volume = update_ak4396_volume, | |
272 | .update_dac_mute = update_ak4396_mute, | |
4972a177 | 273 | .dac_tlv = ak4396_db_scale, |
7ef37cd9 | 274 | .model_data_size = sizeof(struct generic_data), |
f009ad9b CL |
275 | .pcm_dev_cfg = PLAYBACK_0_TO_I2S | |
276 | PLAYBACK_1_TO_SPDIF | | |
277 | PLAYBACK_2_TO_AC97_1 | | |
278 | CAPTURE_0_FROM_I2S_1 | | |
279 | CAPTURE_1_FROM_SPDIF | | |
280 | CAPTURE_2_FROM_AC97_1, | |
976cd627 | 281 | .dac_channels = 8, |
193e8138 CL |
282 | .dac_volume_min = 0, |
283 | .dac_volume_max = 255, | |
87eedd2f CL |
284 | .function_flags = OXYGEN_FUNCTION_SPI | |
285 | OXYGEN_FUNCTION_ENABLE_SPI_4_5, | |
05855ba3 CL |
286 | .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, |
287 | .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, | |
d0ce9946 CL |
288 | }; |
289 | static const struct oxygen_model model_meridian = { | |
290 | .shortname = "C-Media CMI8788", | |
291 | .longname = "C-Media Oxygen HD Audio", | |
292 | .chip = "CMI8788", | |
293 | .owner = THIS_MODULE, | |
294 | .init = meridian_init, | |
295 | .cleanup = generic_cleanup, | |
296 | .set_dac_params = set_ak4396_params, | |
297 | .set_adc_params = set_ak5385_params, | |
298 | .update_dac_volume = update_ak4396_volume, | |
299 | .update_dac_mute = update_ak4396_mute, | |
4972a177 | 300 | .dac_tlv = ak4396_db_scale, |
7ef37cd9 | 301 | .model_data_size = sizeof(struct generic_data), |
f009ad9b CL |
302 | .pcm_dev_cfg = PLAYBACK_0_TO_I2S | |
303 | PLAYBACK_1_TO_SPDIF | | |
304 | PLAYBACK_2_TO_AC97_1 | | |
305 | CAPTURE_0_FROM_I2S_2 | | |
306 | CAPTURE_1_FROM_SPDIF | | |
307 | CAPTURE_2_FROM_AC97_1, | |
976cd627 | 308 | .dac_channels = 8, |
193e8138 CL |
309 | .dac_volume_min = 0, |
310 | .dac_volume_max = 255, | |
db12b8e3 | 311 | .misc_flags = OXYGEN_MISC_MIDI, |
87eedd2f CL |
312 | .function_flags = OXYGEN_FUNCTION_SPI | |
313 | OXYGEN_FUNCTION_ENABLE_SPI_4_5, | |
05855ba3 CL |
314 | .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, |
315 | .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, | |
d0ce9946 CL |
316 | }; |
317 | ||
318 | static int __devinit generic_oxygen_probe(struct pci_dev *pci, | |
319 | const struct pci_device_id *pci_id) | |
320 | { | |
321 | static int dev; | |
cd93dc8c | 322 | int is_meridian; |
d0ce9946 CL |
323 | int err; |
324 | ||
325 | if (dev >= SNDRV_CARDS) | |
326 | return -ENODEV; | |
327 | if (!enable[dev]) { | |
328 | ++dev; | |
329 | return -ENOENT; | |
330 | } | |
cd93dc8c | 331 | is_meridian = pci_id->driver_data; |
db12b8e3 | 332 | err = oxygen_pci_probe(pci, index[dev], id[dev], |
cd93dc8c | 333 | is_meridian ? &model_meridian : &model_generic); |
d0ce9946 CL |
334 | if (err >= 0) |
335 | ++dev; | |
336 | return err; | |
337 | } | |
338 | ||
339 | static struct pci_driver oxygen_driver = { | |
340 | .name = "CMI8788", | |
341 | .id_table = oxygen_ids, | |
342 | .probe = generic_oxygen_probe, | |
343 | .remove = __devexit_p(oxygen_pci_remove), | |
344 | }; | |
345 | ||
346 | static int __init alsa_card_oxygen_init(void) | |
347 | { | |
348 | return pci_register_driver(&oxygen_driver); | |
349 | } | |
350 | ||
351 | static void __exit alsa_card_oxygen_exit(void) | |
352 | { | |
353 | pci_unregister_driver(&oxygen_driver); | |
354 | } | |
355 | ||
356 | module_init(alsa_card_oxygen_init) | |
357 | module_exit(alsa_card_oxygen_exit) |