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d0ce9946 CL |
1 | /* |
2 | * C-Media CMI8788 driver for C-Media's reference design and for the X-Meridian | |
3 | * | |
4 | * Copyright (c) Clemens Ladisch <clemens@ladisch.de> | |
5 | * | |
6 | * | |
7 | * This driver is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License, version 2. | |
9 | * | |
10 | * This driver is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this driver; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | /* | |
21 | * SPI 0 -> 1st AK4396 (front) | |
7113e958 | 22 | * SPI 1 -> 2nd AK4396 (surround) |
d0ce9946 CL |
23 | * SPI 2 -> 3rd AK4396 (center/LFE) |
24 | * SPI 3 -> WM8785 | |
7113e958 | 25 | * SPI 4 -> 4th AK4396 (back) |
d0ce9946 CL |
26 | * |
27 | * GPIO 0 -> DFS0 of AK5385 | |
28 | * GPIO 1 -> DFS1 of AK5385 | |
29 | */ | |
30 | ||
df91bc23 | 31 | #include <linux/delay.h> |
902b05c1 | 32 | #include <linux/mutex.h> |
d0ce9946 | 33 | #include <linux/pci.h> |
902b05c1 | 34 | #include <sound/ac97_codec.h> |
ccc80fb4 | 35 | #include <sound/control.h> |
d0ce9946 CL |
36 | #include <sound/core.h> |
37 | #include <sound/initval.h> | |
38 | #include <sound/pcm.h> | |
39 | #include <sound/pcm_params.h> | |
40 | #include <sound/tlv.h> | |
41 | #include "oxygen.h" | |
c626026d | 42 | #include "ak4396.h" |
f5b2368b | 43 | #include "wm8785.h" |
d0ce9946 CL |
44 | |
45 | MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); | |
46 | MODULE_DESCRIPTION("C-Media CMI8788 driver"); | |
d023dc0a | 47 | MODULE_LICENSE("GPL v2"); |
d0ce9946 CL |
48 | MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}"); |
49 | ||
50 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; | |
51 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; | |
52 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; | |
53 | ||
54 | module_param_array(index, int, NULL, 0444); | |
55 | MODULE_PARM_DESC(index, "card index"); | |
56 | module_param_array(id, charp, NULL, 0444); | |
57 | MODULE_PARM_DESC(id, "ID string"); | |
58 | module_param_array(enable, bool, NULL, 0444); | |
59 | MODULE_PARM_DESC(enable, "enable card"); | |
60 | ||
2f1b0ec7 CL |
61 | enum { |
62 | MODEL_CMEDIA_REF, /* C-Media's reference design */ | |
63 | MODEL_MERIDIAN, /* AuzenTech X-Meridian */ | |
64 | }; | |
65 | ||
d0ce9946 | 66 | static struct pci_device_id oxygen_ids[] __devinitdata = { |
2f1b0ec7 CL |
67 | { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF }, |
68 | { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF }, | |
69 | { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF }, | |
70 | { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF }, | |
71 | { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF }, | |
72 | { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF }, | |
73 | { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF }, | |
74 | { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF }, | |
75 | { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN }, | |
76 | { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CMEDIA_REF }, | |
d0ce9946 CL |
77 | { } |
78 | }; | |
79 | MODULE_DEVICE_TABLE(pci, oxygen_ids); | |
80 | ||
878ac3ee CL |
81 | |
82 | #define GPIO_AK5385_DFS_MASK 0x0003 | |
83 | #define GPIO_AK5385_DFS_NORMAL 0x0000 | |
84 | #define GPIO_AK5385_DFS_DOUBLE 0x0001 | |
85 | #define GPIO_AK5385_DFS_QUAD 0x0002 | |
86 | ||
7ef37cd9 CL |
87 | struct generic_data { |
88 | u8 ak4396_ctl2; | |
e58aee95 | 89 | u16 saved_wm8785_registers[2]; |
7ef37cd9 CL |
90 | }; |
91 | ||
d0ce9946 CL |
92 | static void ak4396_write(struct oxygen *chip, unsigned int codec, |
93 | u8 reg, u8 value) | |
94 | { | |
95 | /* maps ALSA channel pair number to SPI output */ | |
96 | static const u8 codec_spi_map[4] = { | |
7113e958 | 97 | 0, 1, 2, 4 |
d0ce9946 | 98 | }; |
c2353a08 | 99 | oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | |
d0ce9946 | 100 | OXYGEN_SPI_DATA_LENGTH_2 | |
2ea85986 | 101 | OXYGEN_SPI_CLOCK_160 | |
d0ce9946 | 102 | (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) | |
c2353a08 | 103 | OXYGEN_SPI_CEN_LATCH_CLOCK_HI, |
d0ce9946 CL |
104 | AK4396_WRITE | (reg << 8) | value); |
105 | } | |
106 | ||
107 | static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value) | |
108 | { | |
e58aee95 CL |
109 | struct generic_data *data = chip->model_data; |
110 | ||
c2353a08 | 111 | oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | |
d0ce9946 | 112 | OXYGEN_SPI_DATA_LENGTH_2 | |
2ea85986 | 113 | OXYGEN_SPI_CLOCK_160 | |
c2353a08 CL |
114 | (3 << OXYGEN_SPI_CODEC_SHIFT) | |
115 | OXYGEN_SPI_CEN_LATCH_CLOCK_LO, | |
d0ce9946 | 116 | (reg << 9) | value); |
e58aee95 CL |
117 | if (reg < ARRAY_SIZE(data->saved_wm8785_registers)) |
118 | data->saved_wm8785_registers[reg] = value; | |
d0ce9946 CL |
119 | } |
120 | ||
bbbfb552 CL |
121 | static void update_ak4396_volume(struct oxygen *chip) |
122 | { | |
123 | unsigned int i; | |
124 | ||
125 | for (i = 0; i < 4; ++i) { | |
126 | ak4396_write(chip, i, | |
127 | AK4396_LCH_ATT, chip->dac_volume[i * 2]); | |
128 | ak4396_write(chip, i, | |
129 | AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]); | |
130 | } | |
131 | } | |
132 | ||
75146fc0 | 133 | static void ak4396_registers_init(struct oxygen *chip) |
d0ce9946 | 134 | { |
7ef37cd9 | 135 | struct generic_data *data = chip->model_data; |
d0ce9946 CL |
136 | unsigned int i; |
137 | ||
d0ce9946 | 138 | for (i = 0; i < 4; ++i) { |
878ac3ee CL |
139 | ak4396_write(chip, i, |
140 | AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); | |
141 | ak4396_write(chip, i, | |
7ef37cd9 | 142 | AK4396_CONTROL_2, data->ak4396_ctl2); |
878ac3ee CL |
143 | ak4396_write(chip, i, |
144 | AK4396_CONTROL_3, AK4396_PCM); | |
d0ce9946 | 145 | } |
bbbfb552 | 146 | update_ak4396_volume(chip); |
75146fc0 CL |
147 | } |
148 | ||
149 | static void ak4396_init(struct oxygen *chip) | |
150 | { | |
151 | struct generic_data *data = chip->model_data; | |
152 | ||
153 | data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; | |
154 | ak4396_registers_init(chip); | |
d0ce9946 CL |
155 | snd_component_add(chip->card, "AK4396"); |
156 | } | |
157 | ||
158 | static void ak5385_init(struct oxygen *chip) | |
159 | { | |
878ac3ee CL |
160 | oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK); |
161 | oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK); | |
d0ce9946 CL |
162 | snd_component_add(chip->card, "AK5385"); |
163 | } | |
164 | ||
75146fc0 | 165 | static void wm8785_registers_init(struct oxygen *chip) |
d0ce9946 | 166 | { |
e58aee95 CL |
167 | struct generic_data *data = chip->model_data; |
168 | ||
878ac3ee | 169 | wm8785_write(chip, WM8785_R7, 0); |
e58aee95 CL |
170 | wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]); |
171 | wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]); | |
75146fc0 | 172 | } |
e58aee95 | 173 | |
75146fc0 CL |
174 | static void wm8785_init(struct oxygen *chip) |
175 | { | |
176 | struct generic_data *data = chip->model_data; | |
177 | ||
178 | data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE | | |
179 | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST; | |
180 | data->saved_wm8785_registers[1] = WM8785_WL_24; | |
181 | wm8785_registers_init(chip); | |
d0ce9946 CL |
182 | snd_component_add(chip->card, "WM8785"); |
183 | } | |
184 | ||
185 | static void generic_init(struct oxygen *chip) | |
186 | { | |
187 | ak4396_init(chip); | |
188 | wm8785_init(chip); | |
189 | } | |
190 | ||
191 | static void meridian_init(struct oxygen *chip) | |
192 | { | |
193 | ak4396_init(chip); | |
194 | ak5385_init(chip); | |
195 | } | |
196 | ||
197 | static void generic_cleanup(struct oxygen *chip) | |
198 | { | |
199 | } | |
200 | ||
4a4bc53b CL |
201 | static void generic_resume(struct oxygen *chip) |
202 | { | |
203 | ak4396_registers_init(chip); | |
204 | wm8785_registers_init(chip); | |
205 | } | |
206 | ||
c2bc4ff5 CL |
207 | static void meridian_resume(struct oxygen *chip) |
208 | { | |
209 | ak4396_registers_init(chip); | |
210 | } | |
211 | ||
d0ce9946 CL |
212 | static void set_ak4396_params(struct oxygen *chip, |
213 | struct snd_pcm_hw_params *params) | |
214 | { | |
7ef37cd9 | 215 | struct generic_data *data = chip->model_data; |
d0ce9946 CL |
216 | unsigned int i; |
217 | u8 value; | |
218 | ||
7ef37cd9 | 219 | value = data->ak4396_ctl2 & ~AK4396_DFS_MASK; |
d0ce9946 CL |
220 | if (params_rate(params) <= 54000) |
221 | value |= AK4396_DFS_NORMAL; | |
236c4920 | 222 | else if (params_rate(params) <= 108000) |
d0ce9946 CL |
223 | value |= AK4396_DFS_DOUBLE; |
224 | else | |
225 | value |= AK4396_DFS_QUAD; | |
7ef37cd9 | 226 | data->ak4396_ctl2 = value; |
df91bc23 CL |
227 | |
228 | msleep(1); /* wait for the new MCLK to become stable */ | |
229 | ||
d0ce9946 | 230 | for (i = 0; i < 4; ++i) { |
878ac3ee CL |
231 | ak4396_write(chip, i, |
232 | AK4396_CONTROL_1, AK4396_DIF_24_MSB); | |
233 | ak4396_write(chip, i, | |
234 | AK4396_CONTROL_2, value); | |
235 | ak4396_write(chip, i, | |
236 | AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); | |
d0ce9946 CL |
237 | } |
238 | } | |
239 | ||
d0ce9946 CL |
240 | static void update_ak4396_mute(struct oxygen *chip) |
241 | { | |
7ef37cd9 | 242 | struct generic_data *data = chip->model_data; |
d0ce9946 CL |
243 | unsigned int i; |
244 | u8 value; | |
245 | ||
7ef37cd9 | 246 | value = data->ak4396_ctl2 & ~AK4396_SMUTE; |
d0ce9946 CL |
247 | if (chip->dac_mute) |
248 | value |= AK4396_SMUTE; | |
7ef37cd9 | 249 | data->ak4396_ctl2 = value; |
d0ce9946 | 250 | for (i = 0; i < 4; ++i) |
878ac3ee | 251 | ak4396_write(chip, i, AK4396_CONTROL_2, value); |
d0ce9946 CL |
252 | } |
253 | ||
254 | static void set_wm8785_params(struct oxygen *chip, | |
255 | struct snd_pcm_hw_params *params) | |
256 | { | |
257 | unsigned int value; | |
258 | ||
878ac3ee | 259 | wm8785_write(chip, WM8785_R7, 0); |
d0ce9946 | 260 | |
878ac3ee | 261 | value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST; |
71e22a4b CL |
262 | if (params_rate(params) <= 48000) |
263 | value |= WM8785_OSR_SINGLE; | |
264 | else if (params_rate(params) <= 96000) | |
d0ce9946 | 265 | value |= WM8785_OSR_DOUBLE; |
d0ce9946 | 266 | else |
71e22a4b | 267 | value |= WM8785_OSR_QUAD; |
878ac3ee | 268 | wm8785_write(chip, WM8785_R0, value); |
d0ce9946 CL |
269 | |
270 | if (snd_pcm_format_width(params_format(params)) <= 16) | |
271 | value = WM8785_WL_16; | |
272 | else | |
273 | value = WM8785_WL_24; | |
878ac3ee | 274 | wm8785_write(chip, WM8785_R1, value); |
d0ce9946 CL |
275 | } |
276 | ||
277 | static void set_ak5385_params(struct oxygen *chip, | |
278 | struct snd_pcm_hw_params *params) | |
279 | { | |
280 | unsigned int value; | |
281 | ||
282 | if (params_rate(params) <= 54000) | |
878ac3ee | 283 | value = GPIO_AK5385_DFS_NORMAL; |
d0ce9946 | 284 | else if (params_rate(params) <= 108000) |
878ac3ee | 285 | value = GPIO_AK5385_DFS_DOUBLE; |
d0ce9946 | 286 | else |
878ac3ee CL |
287 | value = GPIO_AK5385_DFS_QUAD; |
288 | oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, | |
289 | value, GPIO_AK5385_DFS_MASK); | |
d0ce9946 CL |
290 | } |
291 | ||
292 | static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0); | |
293 | ||
4bd0c3a6 CL |
294 | static int generic_probe(struct oxygen *chip, unsigned long driver_data) |
295 | { | |
296 | if (driver_data == MODEL_MERIDIAN) { | |
297 | chip->model.init = meridian_init; | |
c2bc4ff5 | 298 | chip->model.resume = meridian_resume; |
4bd0c3a6 | 299 | chip->model.set_adc_params = set_ak5385_params; |
d76596b1 CL |
300 | chip->model.device_config = PLAYBACK_0_TO_I2S | |
301 | PLAYBACK_1_TO_SPDIF | | |
302 | CAPTURE_0_FROM_I2S_2 | | |
303 | CAPTURE_1_FROM_SPDIF; | |
4bd0c3a6 | 304 | chip->model.misc_flags = OXYGEN_MISC_MIDI; |
dbbbd674 | 305 | chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT; |
4bd0c3a6 CL |
306 | } |
307 | return 0; | |
308 | } | |
309 | ||
d0ce9946 CL |
310 | static const struct oxygen_model model_generic = { |
311 | .shortname = "C-Media CMI8788", | |
312 | .longname = "C-Media Oxygen HD Audio", | |
313 | .chip = "CMI8788", | |
314 | .owner = THIS_MODULE, | |
4bd0c3a6 | 315 | .probe = generic_probe, |
d0ce9946 CL |
316 | .init = generic_init, |
317 | .cleanup = generic_cleanup, | |
4a4bc53b | 318 | .resume = generic_resume, |
d0ce9946 CL |
319 | .set_dac_params = set_ak4396_params, |
320 | .set_adc_params = set_wm8785_params, | |
321 | .update_dac_volume = update_ak4396_volume, | |
322 | .update_dac_mute = update_ak4396_mute, | |
4972a177 | 323 | .dac_tlv = ak4396_db_scale, |
7ef37cd9 | 324 | .model_data_size = sizeof(struct generic_data), |
d76596b1 CL |
325 | .device_config = PLAYBACK_0_TO_I2S | |
326 | PLAYBACK_1_TO_SPDIF | | |
327 | PLAYBACK_2_TO_AC97_1 | | |
328 | CAPTURE_0_FROM_I2S_1 | | |
329 | CAPTURE_1_FROM_SPDIF | | |
330 | CAPTURE_2_FROM_AC97_1, | |
976cd627 | 331 | .dac_channels = 8, |
193e8138 CL |
332 | .dac_volume_min = 0, |
333 | .dac_volume_max = 255, | |
87eedd2f CL |
334 | .function_flags = OXYGEN_FUNCTION_SPI | |
335 | OXYGEN_FUNCTION_ENABLE_SPI_4_5, | |
05855ba3 CL |
336 | .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, |
337 | .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, | |
d0ce9946 | 338 | }; |
d0ce9946 CL |
339 | |
340 | static int __devinit generic_oxygen_probe(struct pci_dev *pci, | |
341 | const struct pci_device_id *pci_id) | |
342 | { | |
343 | static int dev; | |
d0ce9946 CL |
344 | int err; |
345 | ||
346 | if (dev >= SNDRV_CARDS) | |
347 | return -ENODEV; | |
348 | if (!enable[dev]) { | |
349 | ++dev; | |
350 | return -ENOENT; | |
351 | } | |
db12b8e3 | 352 | err = oxygen_pci_probe(pci, index[dev], id[dev], |
4bd0c3a6 | 353 | &model_generic, pci_id->driver_data); |
d0ce9946 CL |
354 | if (err >= 0) |
355 | ++dev; | |
356 | return err; | |
357 | } | |
358 | ||
359 | static struct pci_driver oxygen_driver = { | |
360 | .name = "CMI8788", | |
361 | .id_table = oxygen_ids, | |
362 | .probe = generic_oxygen_probe, | |
363 | .remove = __devexit_p(oxygen_pci_remove), | |
4a4bc53b CL |
364 | #ifdef CONFIG_PM |
365 | .suspend = oxygen_pci_suspend, | |
366 | .resume = oxygen_pci_resume, | |
367 | #endif | |
d0ce9946 CL |
368 | }; |
369 | ||
370 | static int __init alsa_card_oxygen_init(void) | |
371 | { | |
372 | return pci_register_driver(&oxygen_driver); | |
373 | } | |
374 | ||
375 | static void __exit alsa_card_oxygen_exit(void) | |
376 | { | |
377 | pci_unregister_driver(&oxygen_driver); | |
378 | } | |
379 | ||
380 | module_init(alsa_card_oxygen_init) | |
381 | module_exit(alsa_card_oxygen_exit) |